From 0cf81a724511bec549f03d72b2640cda47196bfa Mon Sep 17 00:00:00 2001 From: Bertrand Songis Date: Mon, 6 Jun 2016 19:01:09 +0200 Subject: [PATCH] [Taranis] ADC DMA moved for X9E --- radio/src/targets/taranis/adc_driver.cpp | 20 ++++++++++---------- radio/src/targets/taranis/hal.h | 12 ++++++------ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/radio/src/targets/taranis/adc_driver.cpp b/radio/src/targets/taranis/adc_driver.cpp index 1b2f6b191..a5ff35924 100644 --- a/radio/src/targets/taranis/adc_driver.cpp +++ b/radio/src/targets/taranis/adc_driver.cpp @@ -112,35 +112,35 @@ void adcInit() void adcSingleRead() { - ADC1_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA + ADC1_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA ADC1->SR &= ~(uint32_t)(ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR); - ADC1_DMA->LIFCR = ADC1_DMA_FLAGS; // Write ones to clear bits - ADC1_DMA_Stream->CR |= DMA_SxCR_EN; // Enable DMA + ADC1_DMA->HIFCR = ADC1_DMA_FLAGS; // Write ones to clear bits + ADC1_DMA_Stream->CR |= DMA_SxCR_EN; // Enable DMA ADC1->CR2 |= (uint32_t) ADC_CR2_SWSTART; #if defined(REV9E) - ADC3_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA + ADC3_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA ADC3->SR &= ~(uint32_t) ( ADC_SR_EOC | ADC_SR_STRT | ADC_SR_OVR ); ADC3_DMA->LIFCR = ADC3_DMA_FLAGS; // Write ones to clear bits - ADC3_DMA_Stream->CR |= DMA_SxCR_EN; // Enable DMA + ADC3_DMA_Stream->CR |= DMA_SxCR_EN; // Enable DMA ADC3->CR2 |= (uint32_t)ADC_CR2_SWSTART; #endif // defined(REV9E) #if defined(REV9E) for (unsigned int i=0; i<10000; i++) { - if ((ADC1_DMA->LISR & ADC1_DMA_FLAG_TC) && (ADC3_DMA->LISR & ADC3_DMA_FLAG_TC)) { + if ((ADC1_DMA->HISR & ADC1_DMA_FLAG_TC) && (ADC3_DMA->LISR & ADC3_DMA_FLAG_TC)) { break; } } - ADC1_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA - ADC3_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA + ADC1_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA + ADC3_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA #else for (unsigned int i = 0; i < 10000; i++) { - if (ADC1_DMA->LISR & ADC1_DMA_FLAG_TC) { + if (ADC1_DMA->HISR & ADC1_DMA_FLAG_TC) { break; } } - ADC1_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA + ADC1_DMA_Stream->CR &= ~DMA_SxCR_EN; // Disable DMA #endif } diff --git a/radio/src/targets/taranis/hal.h b/radio/src/targets/taranis/hal.h index ed2513d08..9b2ea7a43 100644 --- a/radio/src/targets/taranis/hal.h +++ b/radio/src/targets/taranis/hal.h @@ -270,9 +270,9 @@ #define ADC_CHANNEL_STICK_LH ADC_Channel_2 // ADC1_IN2 #define ADC_CHANNEL_STICK_LV ADC_Channel_3 // ADC1_IN3 #define ADC1_DMA DMA2 -#define ADC1_DMA_Stream DMA2_Stream0 -#define ADC1_DMA_FLAGS (DMA_LIFCR_CTCIF0 | DMA_LIFCR_CHTIF0 | DMA_LIFCR_CTEIF0 | DMA_LIFCR_CDMEIF0 | DMA_LIFCR_CFEIF0) -#define ADC1_DMA_FLAG_TC DMA_LISR_TCIF0 +#define ADC1_DMA_Stream DMA2_Stream4 +#define ADC1_DMA_FLAGS (DMA_HIFCR_CTCIF4 | DMA_HIFCR_CHTIF4 | DMA_HIFCR_CTEIF4 | DMA_HIFCR_CDMEIF4 | DMA_HIFCR_CFEIF4) +#define ADC1_DMA_FLAG_TC DMA_HISR_TCIF4 #if defined(REV9E) #define ADC_GPIO_PIN_POT1 GPIO_Pin_8 // PF.08 #define ADC_GPIO_PIN_POT2 GPIO_Pin_0 // PB.00 @@ -293,9 +293,9 @@ #define ADC_CHANNEL_SLIDER4 ADC_Channel_9 // ADC1_IN9 #define ADC_CHANNEL_BATT ADC_Channel_10 // ADC1_IN10 #define ADC3_DMA DMA2 - #define ADC3_DMA_Stream DMA2_Stream1 - #define ADC3_DMA_FLAGS (DMA_LIFCR_CTCIF1 | DMA_LIFCR_CHTIF1 | DMA_LIFCR_CTEIF1 | DMA_LIFCR_CDMEIF1 | DMA_LIFCR_CFEIF1) - #define ADC3_DMA_FLAG_TC DMA_LISR_TCIF1 + #define ADC3_DMA_Stream DMA2_Stream0 + #define ADC3_DMA_FLAGS (DMA_LIFCR_CTCIF0 | DMA_LIFCR_CHTIF0 | DMA_LIFCR_CTEIF0 | DMA_LIFCR_CDMEIF0 | DMA_LIFCR_CFEIF0) + #define ADC3_DMA_FLAG_TC DMA_LISR_TCIF0 #elif defined(REVPLUS) #define ADC_GPIO_PIN_POT1 GPIO_Pin_6 // PA.06 #define ADC_GPIO_PIN_POT2 GPIO_Pin_0 // PB.00