From 1147db45a44bef98bc4e558474d4d615e775edfb Mon Sep 17 00:00:00 2001 From: Damjan Adamic Date: Fri, 4 Mar 2016 21:23:19 +0100 Subject: [PATCH] Re #3340: Cleanup Re #3340: Software reboot tested and working on Horus --- radio/src/targets/horus/board_horus.h | 6 ++-- radio/src/targets/horus/pwr_driver.cpp | 28 +++++++++++++++++++ .../targets/horus/startup_stm32f40_41xxx.s | 2 ++ 3 files changed, 34 insertions(+), 2 deletions(-) diff --git a/radio/src/targets/horus/board_horus.h b/radio/src/targets/horus/board_horus.h index cc9fc16a9..e6d066f77 100644 --- a/radio/src/targets/horus/board_horus.h +++ b/radio/src/targets/horus/board_horus.h @@ -204,8 +204,9 @@ void checkRotaryEncoder(void); void watchdogInit(unsigned int duration); #define wdt_enable(x) // watchdogInit(1500) #define wdt_reset() // IWDG->KR = 0xAAAA -#define WAS_RESET_BY_WATCHDOG() (RCC->CSR & (RCC_CSR_WDGRSTF | RCC_CSR_WWDGRSTF)) -#define WAS_RESET_BY_SOFTWARE() (RCC->CSR & RCC_CSR_SFTRSTF) +#define WAS_RESET_BY_WATCHDOG() (RCC->CSR & (RCC_CSR_WDGRSTF | RCC_CSR_WWDGRSTF)) +#define WAS_RESET_BY_SOFTWARE() (RCC->CSR & RCC_CSR_SFTRSTF) +#define WAS_RESET_BY_WATCHDOG_OR_SOFTWARE() (RCC->CSR & (RCC_CSR_WDGRSTF | RCC_CSR_WWDGRSTF | RCC_CSR_SFTRSTF)) #endif // ADC driver @@ -247,6 +248,7 @@ void pwrInit(void); uint32_t pwrCheck(void); void pwrOn(void); void pwrOff(void); +void pwrResetHandler(void); uint32_t pwrPressed(void); uint32_t pwrPressedDuration(void); #define UNEXPECTED_SHUTDOWN() (false) // (g_eeGeneral.unexpectedShutdown) diff --git a/radio/src/targets/horus/pwr_driver.cpp b/radio/src/targets/horus/pwr_driver.cpp index ab83fec2f..ab9583845 100644 --- a/radio/src/targets/horus/pwr_driver.cpp +++ b/radio/src/targets/horus/pwr_driver.cpp @@ -85,3 +85,31 @@ uint32_t pwrPressed() { return GPIO_ReadInputDataBit(PWR_GPIO, PWR_SWITCH_GPIO_PIN) == Bit_RESET; } + +void pwrResetHandler() +{ + RCC->AHB1ENR |= RCC_AHB1ENR_GPIOJEN; + + // these two NOPs are needed (see STM32F errata sheet) before the peripheral + // register can be written after the peripheral clock was enabled + __ASM volatile ("nop"); + __ASM volatile ("nop"); + + // Turn soft power ON now, but only if we got started because of the watchdog + // or software reset. If the radio was started by user pressing the power button + // then that button is providing power and we don't need to enable it here. + // + // If we were to turn it on here indiscriminately, then the radio can go into the + // power on/off loop after being powered off by the user. (issue #2790) + if (WAS_RESET_BY_WATCHDOG_OR_SOFTWARE()) { + GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitStructure.GPIO_Pin = PWR_ON_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(PWR_GPIO, &GPIO_InitStructure); + + pwrOn(); + } +} \ No newline at end of file diff --git a/radio/src/targets/horus/startup_stm32f40_41xxx.s b/radio/src/targets/horus/startup_stm32f40_41xxx.s index 4fb8604f7..8a6579aca 100644 --- a/radio/src/targets/horus/startup_stm32f40_41xxx.s +++ b/radio/src/targets/horus/startup_stm32f40_41xxx.s @@ -71,6 +71,8 @@ defined in linker script */ .type Reset_Handler, %function Reset_Handler: + bl pwrResetHandler /*jump to WDT reset handler where soft power control pin is turned on as soon as possible */ + /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit