Mike's bootloader sources + added as option, for Taranis only for now (not as clean as it could be, bootloader is always built even if not selected - didn't find how to nest ifs in makefile :\ ) (Issue #546)

This commit is contained in:
Andre Bernet
2014-01-18 20:00:31 +01:00
parent 34776b24c0
commit 229dfc1938
159 changed files with 66903 additions and 2000 deletions
File diff suppressed because it is too large Load Diff
+233
View File
@@ -0,0 +1,233 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Mass Storage class definitions.
///
/// See
/// - <a
/// href="http://www.usb.org/developers/devclass_docs/usb_msc_overview_1.2.pdf">
/// USB Mass Storage Class Spec. Overview</a>
/// - <a href="http://www.usb.org/developers/devclass_docs/usbmassbulk_10.pdf">
/// USB Mass Storage Class Bulk-Only Transport</a>
///
/// !Usage
///
/// -# Uses "MSD Requests" to check incoming requests from USB Host.
/// -# Uses "MSD Subclass Codes" and "MSD Protocol Codes" to fill %device
/// interface descriptors for a MSD %device.
/// -# Handle the incoming Bulk data with "MSD CBW Definitions" and MSCbw
/// structure.
/// -# Prepare the outgoing Bulk data with "MSD CSW Definitions" and MSCsw
/// structure.
//------------------------------------------------------------------------------
#ifndef MSD_H
#define MSD_H
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "MSD Requests"
/// This page lists MSD-specific requests ( Actually for Bulk-only protocol ).
///
/// !Requests
/// - MSD_BULK_ONLY_RESET
/// - MSD_GET_MAX_LUN
/// Reset the mass storage %device and its associated interface.
#define MSD_BULK_ONLY_RESET 0xFF
/// Return the maximum LUN number supported by the %device.
#define MSD_GET_MAX_LUN 0xFE
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "MSD Subclass Codes"
/// This page lists the Subclass Codes for bInterfaceSubClass field.
/// (Table 2.1, USB Mass Storage Class Spec. Overview)
///
/// !SubClasses
/// - MSD_SUBCLASS_RBC
/// - MSD_SUBCLASS_SFF_MCC
/// - MSD_SUBCLASS_QIC
/// - MSD_SUBCLASS_UFI
/// - MSD_SUBCLASS_SFF
/// - MSD_SUBCLASS_SCSI
/// Reduced Block Commands (RBC) T10
#define MSD_SUBCLASS_RBC 0x01
/// C/DVD devices
#define MSD_SUBCLASS_SFF_MCC 0x02
/// Tape device
#define MSD_SUBCLASS_QIC 0x03
/// Floppy disk drive (FDD) device
#define MSD_SUBCLASS_UFI 0x04
/// Floppy disk drive (FDD) device
#define MSD_SUBCLASS_SFF 0x05
/// SCSI transparent command set
#define MSD_SUBCLASS_SCSI 0x06
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "MSD Protocol Codes"
/// This page lists the Transport Protocol codes for MSD.
/// (Table 3.1, USB Mass Storage Class Spec. Overview)
///
/// !Protocols
/// - MSD_PROTOCOL_CBI_COMPLETION
/// - MSD_PROTOCOL_CBI
/// - MSD_PROTOCOL_BULK_ONLY
/// Control/Bulk/Interrupt (CBI) Transport (with command complete interrupt)
#define MSD_PROTOCOL_CBI_COMPLETION 0x00
/// Control/Bulk/Interrupt (CBI) Transport (no command complete interrupt)
#define MSD_PROTOCOL_CBI 0x01
/// Bulk-Only Transport
#define MSD_PROTOCOL_BULK_ONLY 0x50
//------------------------------------------------------------------------------
/// Test unit control:
#define CTRL_NOT_READY 0x00
#define CTRL_GOOD 0x01
#define CTRL_BUSY 0x02
//------------------------------------------------------------------------------
/// \page "MSD CBW Definitions"
/// This page lists the Command Block Wrapper (CBW) definitions.
///
/// !Constants
/// - MSD_CBW_SIZE
/// - MSD_CBW_SIGNATURE
///
/// !Fields
/// - MSD_CBW_DEVICE_TO_HOST
/// Command Block Wrapper Size
#define MSD_CBW_SIZE 31
/// 'USBC' 0x43425355
#define MSD_CBW_SIGNATURE 0x43425355
/// CBW bmCBWFlags field
#define MSD_CBW_DEVICE_TO_HOST (1 << 7)
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "MSD CSW Definitions"
/// This page lists the Command Status Wrapper (CSW) definitions.
///
/// !Constants
/// - MSD_CSW_SIZE
/// - MSD_CSW_SIGNATURE
///
/// !Command Block Status Values
/// (Table 5.3 , USB Mass Storage Class Bulk-Only Transport)
/// - MSD_CSW_COMMAND_PASSED
/// - MSD_CSW_COMMAND_FAILED
/// - MSD_CSW_PHASE_ERROR
/// Command Status Wrapper Size
#define MSD_CSW_SIZE 13
/// 'USBS' 0x53425355
#define MSD_CSW_SIGNATURE 0x53425355
/// Command Passed (good status)
#define MSD_CSW_COMMAND_PASSED 0
/// Command Failed
#define MSD_CSW_COMMAND_FAILED 1
/// Phase Error
#define MSD_CSW_PHASE_ERROR 2
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Structures
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// Command Block Wrapper (CBW),
/// See Table 5.1, USB Mass Storage Class Bulk-Only Transport.
///
/// The CBW shall start on a packet boundary and shall end as a
/// short packet with exactly 31 (1Fh) bytes transferred.
//------------------------------------------------------------------------------
typedef struct {
/// 'USBC' 0x43425355 (little endian)
unsigned int dCBWSignature;
/// Must be the same as dCSWTag
unsigned int dCBWTag;
/// Number of bytes transfer
unsigned int dCBWDataTransferLength;
/// Indicates the directin of the transfer:
/// 0x80=IN=device-to-host,
/// 0x00=OUT=host-to-device
unsigned char bmCBWFlags;
/// bits 0->3: bCBWLUN
unsigned char bCBWLUN :4,
bReserved1:4; /// reserved
/// bits 0->4: bCBWCBLength
unsigned char bCBWCBLength:5,
bReserved2 :3; /// reserved
/// Command block
unsigned char pCommand[16];
} MSCbw;
//------------------------------------------------------------------------------
/// Command Status Wrapper (CSW),
/// See Table 5.2, USB Mass Storage Class Bulk-Only Transport.
//------------------------------------------------------------------------------
typedef struct
{
/// 'USBS' 0x53425355 (little endian)
unsigned int dCSWSignature;
/// Must be the same as dCBWTag
unsigned int dCSWTag;
/// For Data-Out the device shall report in the dCSWDataResidue the
/// difference between the amount of data expected as stated in the
/// dCBWDataTransferLength, and the actual amount of data processed by
/// the device. For Data-In the device shall report in the dCSWDataResidue
/// the difference between the amount of data expected as stated in the
/// dCBWDataTransferLength and the actual amount of relevant data sent by
/// the device. The dCSWDataResidue shall not exceed the value sent in the
/// dCBWDataTransferLength.
unsigned int dCSWDataResidue;
/// Indicates the success or failure of the command.
unsigned char bCSWStatus;
} MSCsw;
#endif //#ifndef MSD_H
+75
View File
@@ -0,0 +1,75 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Mass storage %device driver implementation.
///
/// !Usage
///
/// -# Enable and setup USB related pins (see pio & board.h).
/// -# Configure the memory interfaces used for Mass Storage LUNs
/// (see memories, MSDLun.h).
/// -# Configure the USB MSD %driver using MSDDriver_Initialize.
/// -# Invoke MSDDriver_StateMachine in main loop to handle all Mass Storage
/// operations.
//------------------------------------------------------------------------------
#ifndef MSDDRIVER_H
#define MSDDRIVER_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "MSD.h"
#include "MSDLun.h"
// #include <utility/trace.h>
//------------------------------------------------------------------------------
// Global functions
//------------------------------------------------------------------------------
extern void MSDDriver_Initialize(MSDLun *luns, unsigned char numLuns);
extern void MSDDriver_RequestHandler(const USBGenericRequest *request);
extern void MSDDriver_StateMachine(void);
extern void MSDDriver_RemoteWakeUp(void);
extern void MSDDriver_DataCallback(unsigned char isRead,
unsigned int dataLength,
unsigned int nullCnt,
unsigned int fullCnt);
#endif // #ifndef MSDDRIVER_H
+161
View File
@@ -0,0 +1,161 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Logical Unit Number (LUN) used by the Mass Storage driver and the SCSI
/// protocol. Represents a logical hard-drive.
///
/// !Usage
/// -# Initialize Memory related pins (see pio & board.h).
/// -# Initialize a Media instance for the LUN (see memories).
/// -# Initlalize the LUN with LUN_Init, and link to the initialized Media.
/// -# To read data from the LUN linked media, uses LUN_Read.
/// -# To write data to the LUN linked media, uses LUN_Write.
/// -# To unlink the media, uses LUN_Eject.
//------------------------------------------------------------------------------
#ifndef MSDLUN_H
#define MSDLUN_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "SBC.h"
#include <Media.h>
#include <usb/device/massstorage/MSDIOFifo.h>
#include <usb/device/core/USBD.h>
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
/// LUN RC: success
#define LUN_STATUS_SUCCESS 0x00
/// LUN RC: error
#define LUN_STATUS_ERROR 0x02
/// Media of LUN is removed
#define LUN_NOT_PRESENT 0x00
/// LUN is ejected by host
#define LUN_EJECTED 0x01
/// Media of LUN is changed
#define LUN_CHANGED 0x10
/// LUN Not Ready to Ready transition
#define LUN_TRANS_READY LUN_CHANGED
/// Media of LUN is ready
#define LUN_READY 0x11
//------------------------------------------------------------------------------
// Structures
//------------------------------------------------------------------------------
/// LUN structure
typedef struct {
/// Pointer to a SBCInquiryData instance.
SBCInquiryData *inquiryData;
/// Fifo for USB transfer, must be assigned.
MSDIOFifo ioFifo;
/// Pointer to Media instance for the LUN.
Media *media;
/// Pointer to a Monitor Function to analyze the flow of LUN.
/// \param flowDirection 1 - device to host (READ10)
/// 0 - host to device (WRITE10)
/// \param dataLength Length of data transferred in bytes.
/// \param fifoNullCount Times that FIFO is NULL to wait
/// \param fifoFullCount Times that FIFO is filled to wait
void (*dataMonitor)(unsigned char flowDirection,
unsigned int dataLength,
unsigned int fifoNullCount,
unsigned int fifoFullCount);
/// The start position of the media (blocks) allocated to the LUN.
unsigned int baseAddress;
/// The size of the media (blocks) allocated to the LUN.
unsigned int size;
/// Sector size of the media in number of media blocks
unsigned short blockSize;
/// The LUN can be readonly even the media is writable
#ifdef __cplusplus
unsigned char protectd;
#else
unsigned char protected;
#endif
/// The LUN status (Ejected/Changed/)
unsigned char status;
/// Data for the RequestSense command.
SBCRequestSenseData requestSenseData;
/// Data for the ReadCapacity command.
SBCReadCapacity10Data readCapacityData;
} MSDLun;
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void LUN_Init(MSDLun *lun,
Media *media,
unsigned char *ioBuffer,
unsigned int ioBufferSize,
unsigned int baseAddress,
unsigned int size,
unsigned short blockSize,
#ifdef __cplusplus
unsigned char protectd,
#else
unsigned char protected,
#endif
void (*dataMonitor)(unsigned char flowDirection,
unsigned int dataLength,
unsigned int fifoNullCount,
unsigned int fifoFullCount));
extern unsigned char LUN_Eject(MSDLun *lun);
extern unsigned char LUN_Write(MSDLun *lun,
unsigned int blockAddress,
void *data,
unsigned int length,
TransferCallback callback,
void *argument);
extern unsigned char LUN_Read(MSDLun *lun,
unsigned int blockAddress,
void *data,
unsigned int length,
TransferCallback callback,
void *argument);
#endif //#ifndef MSDLUN_H
+288
View File
@@ -0,0 +1,288 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Generic Media type, which provides transparent access to all types of
/// memories.
///
/// \note The physical or HW related media operations (physical device
/// connection & protection detecting, PIO configurations and interface
/// driver initialization) are excluded.
///
/// !Usage
/// -# Do PIO initialization for peripheral interfaces.
/// -# Initialize peripheral interface driver & device driver.
/// -# Initialize specific media interface and link to this initialized driver.
///
//------------------------------------------------------------------------------
#ifndef MEDIA_H
#define MEDIA_H
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//! \brief Operation result code returned by media methods
#define MED_STATUS_SUCCESS 0x00
#define MED_STATUS_ERROR 0x01
#define MED_STATUS_BUSY 0x02
#define MED_STATUS_PROTECTED 0x04
//! \brief Media statuses
#define MED_STATE_READY 0x00 /// Media is ready for access
#define MED_STATE_BUSY 0x01 /// Media is busy
//------------------------------------------------------------------------------
// Types
//------------------------------------------------------------------------------
typedef struct _Media Media;
typedef void (*MediaCallback)(void *argument,
unsigned char status,
unsigned int transferred,
unsigned int remaining);
typedef unsigned char (*Media_write)(Media *media,
unsigned int address,
void *data,
unsigned int length,
MediaCallback callback,
void *argument);
typedef unsigned char (*Media_read)(Media *media,
unsigned int address,
void *data,
unsigned int length,
MediaCallback callback,
void *argument);
typedef unsigned char (*Media_cancelIo)(Media *media);
typedef unsigned char (*Media_lock)(Media *media,
unsigned int start,
unsigned int end,
unsigned int *pActualStart,
unsigned int *pActualEnd);
typedef unsigned char (*Media_unlock)(Media *media,
unsigned int start,
unsigned int end,
unsigned int *pActualStart,
unsigned int *pActualEnd);
typedef unsigned char (*Media_ioctl)(Media *media,
unsigned char ctrl,
void *buff);
typedef unsigned char (*Media_flush)(Media *media);
typedef void (*Media_handler)(Media *media);
//! \brief Media transfer
//! \see TransferCallback
typedef struct {
void *data; //!< Pointer to the data buffer
unsigned int address; //!< Address where to read/write the data
unsigned int length; //!< Size of the data to read/write
MediaCallback callback; //!< Callback to invoke when the transfer done
void *argument; //!< Callback argument
} MEDTransfer;
//! \brief Media object
//! \see MEDTransfer
struct _Media {
Media_write write; //!< Write method
Media_read read; //!< Read method
Media_cancelIo cancelIo; //!< Cancel pending IO method
Media_lock lock; //!< lock method if possible
Media_unlock unlock; //!< unlock method if possible
Media_flush flush; //!< Flush method
Media_handler handler; //!< Interrupt handler
unsigned int blockSize; //!< Block size in bytes (1, 512, 1K, 2K ...)
unsigned int baseAddress; //!< Base address of media in number of blocks
unsigned int size; //!< Size of media in number of blocks
MEDTransfer transfer; //!< Current transfer operation
void *interface; //!< Pointer to the physical interface used
unsigned char bReserved:4,
mappedRD:1, //!< Mapped to memory space to read
mappedWR:1, //!< Mapped to memory space to write
#ifdef __cplusplus
protectd:1, //!< Protected media?
#else
protected:1, //!< Protected media?
#endif
removable:1; //!< Removable/Fixed media?
unsigned char state; //!< Status of media
unsigned short reserved;
};
/// Available medias.
extern Media medias[];
/// Number of medias which are effectively used.
/// Defined by Media, shared usage by USB MSD & FS ...
extern unsigned int numMedias;
//------------------------------------------------------------------------------
// Inline Functions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
//! \brief Writes data on a media
//! \param media Pointer to a Media instance
//! \param address Address at which to write
//! \param data Pointer to the data to write
//! \param length Size of the data buffer
//! \param callback Optional pointer to a callback function to invoke when
//! the write operation terminates
//! \param argument Optional argument for the callback function
//! \return Operation result code
//! \see TransferCallback
//------------------------------------------------------------------------------
static inline unsigned char MED_Write(Media *media,
unsigned int address,
void *data,
unsigned int length,
MediaCallback callback,
void *argument)
{
return media->write(media, address, data, length, callback, argument);
}
//------------------------------------------------------------------------------
//! \brief Reads a specified amount of data from a media
//! \param media Pointer to a Media instance
//! \param address Address of the data to read
//! \param data Pointer to the buffer in which to store the retrieved
//! data
//! \param length Length of the buffer
//! \param callback Optional pointer to a callback function to invoke when
//! the operation is finished
//! \param argument Optional pointer to an argument for the callback
//! \return Operation result code
//! \see TransferCallback
//------------------------------------------------------------------------------
static inline unsigned char MED_Read(Media *media,
unsigned int address,
void *data,
unsigned int length,
MediaCallback callback,
void *argument)
{
return media->read(media, address, data, length, callback, argument);
}
//------------------------------------------------------------------------------
//! \brief Locks all the regions in the given address range.
//! \param media Pointer to a Media instance
/// \param start Start address of lock range.
/// \param end End address of lock range.
/// \param pActualStart Start address of the actual lock range (optional).
/// \param pActualEnd End address of the actual lock range (optional).
/// \return 0 if successful; otherwise returns an error code.
//------------------------------------------------------------------------------
static inline unsigned char MED_Lock(Media *media,
unsigned int start,
unsigned int end,
unsigned int *pActualStart,
unsigned int *pActualEnd)
{
if( media->lock ) {
return media->lock(media, start, end, pActualStart, pActualEnd);
}
else {
return MED_STATUS_SUCCESS;
}
}
//------------------------------------------------------------------------------
//! \brief Unlocks all the regions in the given address range
//! \param media Pointer to a Media instance
/// \param start Start address of unlock range.
/// \param end End address of unlock range.
/// \param pActualStart Start address of the actual unlock range (optional).
/// \param pActualEnd End address of the actual unlock range (optional).
/// \return 0 if successful; otherwise returns an error code.
//------------------------------------------------------------------------------
static inline unsigned char MED_Unlock(Media *media,
unsigned int start,
unsigned int end,
unsigned int *pActualStart,
unsigned int *pActualEnd)
{
if( media->unlock ) {
return media->unlock(media, start, end, pActualStart, pActualEnd);
}
else {
return MED_STATUS_SUCCESS;
}
}
//------------------------------------------------------------------------------
//! \brief
//! \param media Pointer to the Media instance to use
//------------------------------------------------------------------------------
static inline unsigned char MED_Flush(Media *media)
{
if (media->flush) {
return media->flush(media);
}
else {
return MED_STATUS_SUCCESS;
}
}
//------------------------------------------------------------------------------
//! \brief Invokes the interrupt handler of the specified media
//! \param media Pointer to the Media instance to use
//------------------------------------------------------------------------------
static inline void MED_Handler(Media *media)
{
if (media->handler) {
media->handler(media);
}
}
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void MED_HandleAll(Media *medias, unsigned char numMedias);
#endif // _MEDIA_H
+653
View File
@@ -0,0 +1,653 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// SCSI definitions.
///
/// !Usage
///
/// -# After command block received, Access and decode the SCSI command block
/// with SBCCommand structure.
//------------------------------------------------------------------------------
#ifndef SBC_H
#define SBC_H
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "SBC Operation Codes"
/// This page lists operation codes of commands described in the SBC-3
/// standard.
///
/// \note That most commands are actually defined in other standards,
/// like SPC-4. Optional commands are not included here.
///
/// \see sbc3r07.pdf - Section 5.1 - Table 12
/// \see spc4r06.pdf
/// \see SBCCommand
///
/// !Codes
/// - SBC_INQUIRY
/// - SBC_READ_10
/// - SBC_READ_CAPACITY_10
/// - SBC_REQUEST_SENSE
/// - SBC_TEST_UNIT_READY
/// - SBC_WRITE_10
///
/// !Optional Codes but required by Windows
/// - SBC_PREVENT_ALLOW_MEDIUM_REMOVAL
/// - SBC_MODE_SENSE_6
/// - SBC_VERIFY_10
/// - SBC_READ_FORMAT_CAPACITIES
/// Request information regarding parameters of the target and Logical Unit.
#define SBC_INQUIRY 0x12
/// Request the transfer data to the host.
#define SBC_READ_10 0x28
/// Request capacities of the currently installed medium.
#define SBC_READ_CAPACITY_10 0x25
/// Request that the device server transfer sense data.
#define SBC_REQUEST_SENSE 0x03
/// Check if the LUN is ready
#define SBC_TEST_UNIT_READY 0x00
/// Request that the device write the data transferred by the host.
#define SBC_WRITE_10 0x2A
/// Request that the target enable or disable the removal of the medium in
/// the Logical Unit.
#define SBC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
/// Report parameters.
#define SBC_MODE_SENSE_6 0x1A
/// Request that the %device verify the data on the medium.
#define SBC_VERIFY_10 0x2F
/// Request a list of the possible capacities that can be formatted on medium
#define SBC_READ_FORMAT_CAPACITIES 0x23
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "SBC Periph. Qualifiers"
/// This page lists the peripheral qualifier values specified in the INQUIRY
/// data
/// \see spc4r06.pdf - Section 6.4.2 - Table 83
/// \see SBCInquiryData
///
/// !Qualifiers
/// - SBC_PERIPHERAL_DEVICE_CONNECTED
/// - SBC_PERIPHERAL_DEVICE_NOT_CONNECTED
/// - SBC_PERIPHERAL_DEVICE_NOT_SUPPORTED
#define SBC_PERIPHERAL_DEVICE_CONNECTED 0x00
#define SBC_PERIPHERAL_DEVICE_NOT_CONNECTED 0x01
#define SBC_PERIPHERAL_DEVICE_NOT_SUPPORTED 0x03
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "SBC Periph. Types"
/// This page lists peripheral device types specified in the INQUIRY data
/// \see spc4r06.pdf - Section 6.4.2 - Table 84
/// \see SBCInquiryData
///
/// !Types
/// - SBC_DIRECT_ACCESS_BLOCK_DEVICE
/// - SBC_SEQUENTIAL_ACCESS_DEVICE
/// - SBC_PRINTER_DEVICE
/// - SBC_PROCESSOR_DEVICE
/// - SBC_WRITE_ONCE_DEVICE
/// - SBC_CD_DVD_DEVICE
/// - SBC_SCANNER_DEVICE
/// - SBC_OPTICAL_MEMORY_DEVICE
/// - SBC_MEDIA_CHANGER_DEVICE
/// - SBC_COMMUNICATION_DEVICE
/// - SBC_STORAGE_ARRAY_CONTROLLER_DEVICE
/// - SBC_ENCLOSURE_SERVICES_DEVICE
/// - SBC_SIMPLIFIED_DIRECT_ACCESS_DEVICE
/// - SBC_OPTICAL_CARD_READER_WRITER_DEVICE
/// - SBC_BRIDGE_CONTROLLER_COMMANDS
/// - SBC_OBJECT_BASED_STORAGE_DEVICE
#define SBC_DIRECT_ACCESS_BLOCK_DEVICE 0x00
#define SBC_SEQUENTIAL_ACCESS_DEVICE 0x01
#define SBC_PRINTER_DEVICE 0x02
#define SBC_PROCESSOR_DEVICE 0x03
#define SBC_WRITE_ONCE_DEVICE 0x04
#define SBC_CD_DVD_DEVICE 0x05
#define SBC_SCANNER_DEVICE 0x06
#define SBC_OPTICAL_MEMORY_DEVICE 0x07
#define SBC_MEDIA_CHANGER_DEVICE 0x08
#define SBC_COMMUNICATION_DEVICE 0x09
#define SBC_STORAGE_ARRAY_CONTROLLER_DEVICE 0x0C
#define SBC_ENCLOSURE_SERVICES_DEVICE 0x0D
#define SBC_SIMPLIFIED_DIRECT_ACCESS_DEVICE 0x0E
#define SBC_OPTICAL_CARD_READER_WRITER_DEVICE 0x0F
#define SBC_BRIDGE_CONTROLLER_COMMANDS 0x10
#define SBC_OBJECT_BASED_STORAGE_DEVICE 0x11
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \brief Version value for the SBC-3 specification
/// \see spc4r06.pdf - Section 6.4.2 - Table 85
#define SBC_SPC_VERSION_4 0x06
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \brief Values for the TPGS field returned in INQUIRY data
/// \see spc4r06.pdf - Section 6.4.2 - Table 86
#define SBC_TPGS_NONE 0x0
#define SBC_TPGS_ASYMMETRIC 0x1
#define SBC_TPGS_SYMMETRIC 0x2
#define SBC_TPGS_BOTH 0x3
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \brief Version descriptor value for the SBC-3 specification
/// \see spc4r06.pdf - Section 6.4.2 - Table 87
#define SBC_VERSION_DESCRIPTOR_SBC_3 0x04C0
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "SBC Sense Response Codes"
/// This page lists sense data response codes returned in REQUEST SENSE data
/// \see spc4r06.pdf - Section 4.5.1 - Table 12
///
/// !Codes
/// - SBC_SENSE_DATA_FIXED_CURRENT
/// - SBC_SENSE_DATA_FIXED_DEFERRED
/// - SBC_SENSE_DATA_DESCRIPTOR_CURRENT
/// - SBC_SENSE_DATA_DESCRIPTOR_DEFERRED
#define SBC_SENSE_DATA_FIXED_CURRENT 0x70
#define SBC_SENSE_DATA_FIXED_DEFERRED 0x71
#define SBC_SENSE_DATA_DESCRIPTOR_CURRENT 0x72
#define SBC_SENSE_DATA_DESCRIPTOR_DEFERRED 0x73
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "SBC Sense Keys"
/// This page lists sense key values returned in the REQUEST SENSE data
/// \see spc4r06.pdf - Section 4.5.6 - Table 27
///
/// !Keys
/// - SBC_SENSE_KEY_NO_SENSE
/// - SBC_SENSE_KEY_RECOVERED_ERROR
/// - SBC_SENSE_KEY_NOT_READY
/// - SBC_SENSE_KEY_MEDIUM_ERROR
/// - SBC_SENSE_KEY_HARDWARE_ERROR
/// - SBC_SENSE_KEY_ILLEGAL_REQUEST
/// - SBC_SENSE_KEY_UNIT_ATTENTION
/// - SBC_SENSE_KEY_DATA_PROTECT
/// - SBC_SENSE_KEY_BLANK_CHECK
/// - SBC_SENSE_KEY_VENDOR_SPECIFIC
/// - SBC_SENSE_KEY_COPY_ABORTED
/// - SBC_SENSE_KEY_ABORTED_COMMAND
/// - SBC_SENSE_KEY_VOLUME_OVERFLOW
/// - SBC_SENSE_KEY_MISCOMPARE
/// No specific sense key. Successful command.
#define SBC_SENSE_KEY_NO_SENSE 0x00
/// Command completed succesfully with some recovery action by the %device.
#define SBC_SENSE_KEY_RECOVERED_ERROR 0x01
/// The device can not be accessed.
#define SBC_SENSE_KEY_NOT_READY 0x02
/// Command terminated with a error condition that was probably caused by a
/// flaw in the medium or an error in the recorded data.
#define SBC_SENSE_KEY_MEDIUM_ERROR 0x03
/// Hardware failure while performing the command or during a self test.
#define SBC_SENSE_KEY_HARDWARE_ERROR 0x04
/// Illegal parameter found in the command or additional parameters.
#define SBC_SENSE_KEY_ILLEGAL_REQUEST 0x05
/// Removable medium may have been changed or the %device has been reset.
#define SBC_SENSE_KEY_UNIT_ATTENTION 0x06
/// Write on a block that is protected.
#define SBC_SENSE_KEY_DATA_PROTECT 0x07
/// Indicates that a write-once device or a sequential-access device
/// encountered blank medium or format-defined end-of-data indication while
/// reading or a write-once device encountered a non-blank medium while writing.
#define SBC_SENSE_KEY_BLANK_CHECK 0x08
/// Reporting vendor specific conditions.
#define SBC_SENSE_KEY_VENDOR_SPECIFIC 0x09
/// EXTENDED COPY command was aborted.
#define SBC_SENSE_KEY_COPY_ABORTED 0x0A
/// Device aborted the command.
#define SBC_SENSE_KEY_ABORTED_COMMAND 0x0B
/// A buffered peripheral device is overflow.
#define SBC_SENSE_KEY_VOLUME_OVERFLOW 0x0D
/// The source data did not match the data read from the medium.
#define SBC_SENSE_KEY_MISCOMPARE 0x0E
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "SBC Sense Additionals"
/// This page lists additional sense code values returned in REQUEST SENSE data
/// \see spc4r06.pdf - Section 4.5.6 - Table 28
///
/// !Additional Codes
/// - SBC_ASC_LOGICAL_UNIT_NOT_READY
/// - SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE
/// - SBC_ASC_INVALID_FIELD_IN_CDB
/// - SBC_ASC_WRITE_PROTECTED
/// - SBC_ASC_FORMAT_CORRUPTED
/// - SBC_ASC_INVALID_COMMAND_OPERATION_CODE
/// - SBC_ASC_TOO_MUCH_WRITE_DATA
/// - SBC_ASC_NOT_READY_TO_READY_CHANGE
/// - SBC_ASC_MEDIUM_NOT_PRESENT
#define SBC_ASC_LOGICAL_UNIT_NOT_READY 0x04
#define SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x21
#define SBC_ASC_INVALID_FIELD_IN_CDB 0x24
#define SBC_ASC_WRITE_PROTECTED 0x27
#define SBC_ASC_FORMAT_CORRUPTED 0x31
#define SBC_ASC_INVALID_COMMAND_OPERATION_CODE 0x20
#define SBC_ASC_TOO_MUCH_WRITE_DATA 0x26
#define SBC_ASC_NOT_READY_TO_READY_CHANGE 0x28
#define SBC_ASC_MEDIUM_NOT_PRESENT 0x3A
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \brief MEDIUM TYPE field value for direct-access block devices
/// \see sbc3r06.pdf - Section 6.3.1
#define SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE 0x00
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \brief MRIE field values
/// \see sbc3r06.pdf - Section 7.4.11 - Table 286
#define SBC_MRIE_NO_REPORTING 0x00
#define SBC_MRIE_ASYNCHRONOUS 0x01
#define SBC_MRIE_GENERATE_UNIT_ATTENTION 0x02
#define SBC_MRIE_COND_GENERATE_RECOVERED_ERROR 0x03
#define SBC_MRIE_UNCOND_GENERATE_RECOVERED_ERROR 0x04
#define SBC_MRIE_GENERATE_NO_SENSE 0x05
#define SBC_MRIE_ON_REQUEST 0x06
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \brief Supported mode pages
/// \see sbc3r06.pdf - Section 6.3.1 - Table 115
#define SBC_PAGE_READ_WRITE_ERROR_RECOVERY 0x01
#define SBC_PAGE_INFORMATIONAL_EXCEPTIONS_CONTROL 0x1C
#define SBC_PAGE_RETURN_ALL 0x3F
#define SBC_PAGE_VENDOR_SPECIFIC 0x00
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "MSD Endian Macros"
/// This page lists the macros for endianness conversion.
///
/// !Macros
/// - WORDB
/// - DWORDB
/// - STORE_DWORDB
/// - STORE_WORDB
/// \brief Converts a byte array to a word value using the big endian format
#define WORDB(bytes) ((unsigned short) ((bytes[0] << 8) | bytes[1]))
/// \brief Converts a byte array to a dword value using the big endian format
#define DWORDB(bytes) ((unsigned int) ((bytes[0] << 24) | (bytes[1] << 16) \
| (bytes[2] << 8) | bytes[3]))
/// \brief Stores a dword value in a byte array, in big endian format
#define STORE_DWORDB(dword, bytes) \
bytes[0] = (unsigned char) (((dword) >> 24) & 0xFF); \
bytes[1] = (unsigned char) (((dword) >> 16) & 0xFF); \
bytes[2] = (unsigned char) (((dword) >> 8) & 0xFF); \
bytes[3] = (unsigned char) ((dword) & 0xFF);
/// \brief Stores a word value in a byte array, in big endian format
#define STORE_WORDB(word, bytes) \
bytes[0] = (unsigned char) (((word) >> 8) & 0xFF); \
bytes[1] = (unsigned char) ((word) & 0xFF);
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Structures
//------------------------------------------------------------------------------
#ifdef __ICCARM__ // IAR
#pragma pack(1) // IAR
#define __attribute__(...) // IAR
#endif // IAR
//------------------------------------------------------------------------------
/// \brief Structure for the INQUIRY command
/// \see spc4r06.pdf - Section 6.4.1 - Table 81
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x12 : SBC_INQUIRY
unsigned char isEVPD:1, //!< Type of requested data
bReserved1:7; //!< Reserved bits
unsigned char bPageCode; //!< Specifies the VPD to return
unsigned char pAllocationLength[2]; //!< Size of host buffer
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCInquiry; // GCC
//------------------------------------------------------------------------------
/// \brief Standard INQUIRY data format returned by the device
/// \see spc4r06.pdf - Section 6.4.2 - Table 82
//------------------------------------------------------------------------------
typedef struct {
unsigned char bPeripheralDeviceType:5, //!< Peripheral device type
bPeripheralQualifier :3; //!< Peripheral qualifier
unsigned char bReserved1:7, //!< Reserved bits
isRMB :1; //!< Is media removable ?
unsigned char bVersion; //!< SPC version used
unsigned char bResponseDataFormat:4, //!< Must be 0x2
isHIGHSUP :1, //!< Hierarchical addressing used ?
isNORMACA :1, //!< ACA attribute supported ?
bObsolete1 :2; //!< Obsolete bits
unsigned char bAdditionalLength; //!< Length of remaining INQUIRY data
unsigned char isSCCS :1, //!< Embedded SCC ?
isACC :1, //!< Access control coordinator ?
bTPGS :2, //!< Target port support group
is3PC :1, //!< Third-party copy supported ?
bReserved2:2, //!< Reserved bits
isProtect :1; //!< Protection info supported ?
unsigned char bObsolete2:1, //!< Obsolete bit
isEncServ :1, //!< Embedded enclosure service comp?
isVS :1, //!< ???
isMultiP :1, //!< Multi-port device ?
bObsolete3:3, //!< Obsolete bits
bUnused1 :1; //!< Unused feature
unsigned char bUnused2:6, //!< Unused features
isCmdQue:1, //!< Task management model supported ?
isVS2 :1; //!< ???
unsigned char pVendorID[8]; //!< T10 vendor identification
unsigned char pProductID[16]; //!< Vendor-defined product ID
unsigned char pProductRevisionLevel[4];//!< Vendor-defined product revision
unsigned char pVendorSpecific[20]; //!< Vendor-specific data
unsigned char bUnused3; //!< Unused features
unsigned char bReserved3; //!< Reserved bits
unsigned short pVersionDescriptors[8]; //!< Standards the device complies to
unsigned char pReserved4[22]; //!< Reserved bytes
} __attribute__ ((packed)) SBCInquiryData; // GCC
//------------------------------------------------------------------------------
/// \brief Data structure for the READ (10) command
/// \see sbc3r07.pdf - Section 5.7 - Table 34
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x28 : SBC_READ_10
unsigned char bObsolete1:1, //!< Obsolete bit
isFUA_NV:1, //!< Cache control bit
bReserved1:1, //!< Reserved bit
isFUA:1, //!< Cache control bit
isDPO:1, //!< Cache control bit
bRdProtect:3; //!< Protection information to send
unsigned char pLogicalBlockAddress[4]; //!< Index of first block to read
unsigned char bGroupNumber:5, //!< Information grouping
bReserved2:3; //!< Reserved bits
unsigned char pTransferLength[2]; //!< Number of blocks to transmit
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCRead10; // GCC
//------------------------------------------------------------------------------
/// \brief Structure for the READ CAPACITY (10) command
/// \see sbc3r07.pdf - Section 5.11.1 - Table 40
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x25 : RBC_READ_CAPACITY
unsigned char bObsolete1:1, //!< Obsolete bit
bReserved1:7; //!< Reserved bits
unsigned char pLogicalBlockAddress[4]; //!< Block to evaluate if PMI is set
unsigned char pReserved2[2]; //!< Reserved bytes
unsigned char isPMI:1, //!< Partial medium indicator bit
bReserved3:7; //!< Reserved bits
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCReadCapacity10;
//------------------------------------------------------------------------------
/// \brief Data returned by the device after a READ CAPACITY (10) command
/// \see sbc3r07.pdf - Section 5.11.2 - Table 41
//------------------------------------------------------------------------------
typedef struct {
unsigned char pLogicalBlockAddress[4]; //!< Address of last logical block
unsigned char pLogicalBlockLength[4]; //!< Length of each logical block
} __attribute__ ((packed)) SBCReadCapacity10Data;
//------------------------------------------------------------------------------
/// \brief Structure for the REQUEST SENSE command
/// \see spc4r06.pdf - Section 6.26 - Table 170
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x03 : SBC_REQUEST_SENSE
unsigned char isDesc :1, //!< Type of information expected
bReserved1:7; //!< Reserved bits
unsigned char pReserved2[2]; //!< Reserved bytes
unsigned char bAllocationLength; //!< Size of host buffer
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCRequestSense;
//------------------------------------------------------------------------------
/// \brief Fixed format sense data returned after a REQUEST SENSE command has
/// been received with a DESC bit cleared.
/// \see spc4r06.pdf - Section 4.5.3 - Table 26
//------------------------------------------------------------------------------
typedef struct {
unsigned char bResponseCode:7, //!< Sense data format
isValid :1; //!< Information field is standard
unsigned char bObsolete1; //!< Obsolete byte
unsigned char bSenseKey :4, //!< Generic error information
bReserved1:1, //!< Reserved bit
isILI :1, //!< SSC
isEOM :1, //!< SSC
isFilemark:1; //!< SSC
unsigned char pInformation[4]; //!< Command-specific
unsigned char bAdditionalSenseLength; //!< sizeof(SBCRequestSense_data)-8
unsigned char pCommandSpecificInformation[4]; //!< Command-specific
unsigned char bAdditionalSenseCode; //!< Additional error information
unsigned char bAdditionalSenseCodeQualifier; //!< Further error information
unsigned char bFieldReplaceableUnitCode; //!< Specific component code
unsigned char bSenseKeySpecific:7, //!< Additional exception info
isSKSV :1; //!< Is sense key specific valid?
unsigned char pSenseKeySpecific[2]; //!< Additional exception info
} __attribute__ ((packed)) SBCRequestSenseData;
//------------------------------------------------------------------------------
/// \brief Data structure for the TEST UNIT READY command
/// \see spc4r06.pdf - Section 6.34 - Table 192
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x00 : SBC_TEST_UNIT_READY
unsigned char pReserved1[4]; //!< Reserved bits
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCTestUnitReady; // GCC
//------------------------------------------------------------------------------
/// \brief Structure for the WRITE (10) command
/// \see sbc3r07.pdf - Section 5.26 - Table 70
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x2A : SBC_WRITE_10
unsigned char bObsolete1:1, //!< Obsolete bit
isFUA_NV:1, //!< Cache control bit
bReserved1:1, //!< Reserved bit
isFUA:1, //!< Cache control bit
isDPO:1, //!< Cache control bit
bWrProtect:3; //!< Protection information to send
unsigned char pLogicalBlockAddress[4]; //!< First block to write
unsigned char bGroupNumber:5, //!< Information grouping
bReserved2:3; //!< Reserved bits
unsigned char pTransferLength[2]; //!< Number of blocks to write
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCWrite10;
//------------------------------------------------------------------------------
/// \brief Structure for the PREVENT/ALLOW MEDIUM REMOVAL command
/// \see sbc3r07.pdf - Section 5.5 - Table 30
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x1E : SBC_PREVENT_ALLOW_MEDIUM_REMOVAL
unsigned char pReserved1[3]; //!< Reserved bytes
unsigned char bPrevent:2, //!< Accept/prohibit removal
bReserved2:6; //!< Reserved bits
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCMediumRemoval; // GCC
//------------------------------------------------------------------------------
/// \brief Structure for the MODE SENSE (6) command
/// \see spc4r06 - Section 6.9.1 - Table 98
//------------------------------------------------------------------------------
typedef struct {
unsigned char bOperationCode; //!< 0x1A : SBC_MODE_SENSE_6
unsigned char bReserved1:3, //!< Reserved bits
isDBD:1, //!< Disable block descriptors bit
bReserved2:4; //!< Reserved bits
unsigned char bPageCode:6, //!< Mode page to return
bPC:2; //!< Type of parameter values to return
unsigned char bSubpageCode; //!< Mode subpage to return
unsigned char bAllocationLength; //!< Host buffer allocated size
unsigned char bControl; //!< 0x00
} __attribute__ ((packed)) SBCModeSense6; // GCC
//------------------------------------------------------------------------------
/// \brief Header for the data returned after a MODE SENSE (6) command
/// \see spc4r06.pdf - Section 7.4.3 - Table 268
//------------------------------------------------------------------------------
typedef struct {
unsigned char bModeDataLength; //!< Length of mode data to follow
unsigned char bMediumType; //!< Type of medium (SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE)
unsigned char bReserved1:4, //!< Reserved bits
isDPOFUA:1, //!< DPO/FUA bits supported ?
bReserved2:2, //!< Reserved bits
isWP:1; //!< Is medium write-protected ?
unsigned char bBlockDescriptorLength; //!< Length of all block descriptors
} __attribute__ ((packed)) SBCModeParameterHeader6; // GCC
//------------------------------------------------------------------------------
/// \brief Informational exceptions control mode page
/// \see spc4r06.pdf - Section 7.4.11 - Table 285
//------------------------------------------------------------------------------
typedef struct {
unsigned char bPageCode:6, //!< 0x1C : SBC_PAGE_INFORMATIONAL_EXCEPTIONS_CONTROL
isSPF:1, //!< Page or subpage data format
isPS:1; //!< Parameters saveable ?
unsigned char bPageLength; //!< Length of page data (0x0A)
unsigned char isLogErr:1, //!< Should informational exceptions be logged ?
isEBackErr:1, //!< Enable background error bit
isTest:1, //!< Create a device test failure ?
isDExcpt:1, //!< Disable exception control bit
isEWasc:1, //!< Report warnings ?
isEBF:1, //!< Enable background function bit
bReserved1:1, //!< Reserved bit
isPerf:1; //!< Delay acceptable when treating exceptions ?
unsigned char bMRIE:4, //!< Method of reporting informational exceptions
bReserved2:4; //!< Reserved bits
unsigned char pIntervalTimer[4]; //!< Error reporting period
unsigned char pReportCount[4]; //!< Maximum number of time a report can be issued
} __attribute__ ((packed)) SBCInformationalExceptionsControl; // GCC
//------------------------------------------------------------------------------
/// \brief Read/write error recovery mode page
/// \see sbc3r07.pdf - Section 6.3.5 - Table 122
//------------------------------------------------------------------------------
typedef struct {
unsigned char bPageCode:6, //!< 0x01 : SBC_PAGE_READ_WRITE_ERROR_RECOVERY
isSPF:1, //!< Page or subpage data format
isPS:1; //!< Parameters saveable ?
unsigned char bPageLength; //!< Length of page data (0x0A)
unsigned char isDCR:1, //!< Disable correction bit
isDTE:1, //!< Data terminate on error bit
isPER:1, //!< Post error bit
isEER:1, //!< Enable early recovery bit
isRC:1, //!< Read continuous bit
isTB:1, //!< Transfer block bit
isARRE:1, //!< Automatic read reallocation enabled bit
isAWRE:1; //!< Automatic write reallocation enabled bit
unsigned char bReadRetryCount; //!< Number of retries when reading
unsigned char pObsolete1[3]; //!< Obsolete bytes
unsigned char bReserved1; //!< Reserved byte
unsigned char bWriteRetryCount; //!< Number of retries when writing
unsigned char bReserved2; //!< Reserved byte
unsigned char pRecoveryTimeLimit[2]; //!< Maximum time duration for error recovery
} __attribute__ ((packed)) SBCReadWriteErrorRecovery; // GCC
//------------------------------------------------------------------------------
/// \brief Generic structure for holding information about SBC commands
/// \see SBCInquiry
/// \see SBCRead10
/// \see SBCReadCapacity10
/// \see SBCRequestSense
/// \see SBCTestUnitReady
/// \see SBCWrite10
/// \see SBCMediumRemoval
/// \see SBCModeSense6
//------------------------------------------------------------------------------
typedef union {
unsigned char bOperationCode; //!< Operation code of the command
SBCInquiry inquiry; //!< INQUIRY command
SBCRead10 read10; //!< READ (10) command
SBCReadCapacity10 readCapacity10; //!< READ CAPACITY (10) command
SBCRequestSense requestSense; //!< REQUEST SENSE command
SBCTestUnitReady testUnitReady; //!< TEST UNIT READY command
SBCWrite10 write10; //!< WRITE (10) command
SBCMediumRemoval mediumRemoval; //!< PREVENT/ALLOW MEDIUM REMOVAL command
SBCModeSense6 modeSense6; //!< MODE SENSE (6) command
} SBCCommand;
#ifdef __ICCARM__ // IAR
#pragma pack() // IAR
#endif // IAR
#endif //#ifndef SBC_H
+37
View File
@@ -0,0 +1,37 @@
/**
******************************************************************************
* @file Project/spi/spi.h
* @author X9D Application Team
* @Hardware version V0.2
* @date 11-July-2012
* @brief spi.c' Header file.
* *
******************************************************************************
*/
#ifndef _ASPI_H_
#define _ASPI_H_
#include "stm32f2xx.h"
#define LCD_NCS_HIGH() (GPIO_LCD->BSRRL = PIN_LCD_NCS)
#define LCD_NCS_LOW() (GPIO_LCD->BSRRH = PIN_LCD_NCS)
#define LCD_A0_HIGH() (GPIO_LCD->BSRRL = PIN_LCD_A0)
#define LCD_A0_LOW() (GPIO_LCD->BSRRH = PIN_LCD_A0)
#define LCD_RST_HIGH() (GPIO_LCD->BSRRL = PIN_LCD_RST)
#define LCD_RST_LOW() (GPIO_LCD->BSRRH = PIN_LCD_RST)
#define LCD_CLK_HIGH() (GPIO_LCD->BSRRL = PIN_LCD_CLK)
#define LCD_CLK_LOW() (GPIO_LCD->BSRRH = PIN_LCD_CLK)
#define LCD_MOSI_HIGH() (GPIO_LCD->BSRRL = PIN_LCD_MOSI)
#define LCD_MOSI_LOW() (GPIO_LCD->BSRRH = PIN_LCD_MOSI)
void AspiCmd(u8 Command_Byte);
void AspiData(u8 Para_data);
//u16 spiRegAccess(u8 addrByte, u8 writeValue);
#endif
+714
View File
@@ -0,0 +1,714 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2009, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/**
* \page sam3s_ek_board_desc "SAM3S-EK - Board Description"
*
* \section
* A file is dedicated to descibe the AT91SAM3S-EK board.
*
* \section Contents
* - The code for booting the board is provided by board_cstartup.S and
* board_lowlevel.c.
* - For using board PIOs, board characteristics (clock, etc.) and external
* components, see board.h.
* - For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
*
* To get more software details and the full list of parameters related to the
* SAM3S-EK board configuration, please have a look at the source file: \n
* \ref board.h\n
*
* This file can be used as a template and modified to fit a custom board, with
* specific PIOs usage or memory connections.
**/
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \file board.h
///
/// \par Purpose
///
/// Definition of AT91SAM3S-EK characteristics, AT91SAM3S-dependant PIOs and
/// external components interfacing.
///
/// \par Usage
/// -# For operating frequency information, see "SAM3S-EK - Operating frequencies".
/// -# For using portable PIO definitions, see "SAM3S-EK - PIO definitions".
/// -# Several USB definitions are included here (see "SAM3S-EK - USB device").
//------------------------------------------------------------------------------
#ifndef BOARD_H
#define BOARD_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */
#include <stdint.h>
#ifdef SIMU
#define CONVERT_PTR(x) ((uint32_t)(uint64_t)(x))
#else
//#include "core_cm3.h"
#define CONVERT_PTR(x) ((uint32_t)(x))
#endif
#ifndef SIMU
#include <stdbool.h>
#if defined(at91sam3s4)
#include "chip.h"
#include "AT91SAM3S4.h"
#else
#if defined(at91sam3s8)
#include "chip.h"
#include "AT91SAM3S4.h"
#else
#error Board does not support the specified chip.
#endif
#endif
#endif
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \par
/// This page lists several definition related to the board description.
///
/// Definitions
/// - BOARD_NAME
/// Name of the board.
#define BOARD_NAME "AT91SAM3S-EK"
/// Board definition.
#define at91sam3sek
/// Family definition (already defined).
#define at91sam3s
/// Core definition
#define cortexm3
//#define BOARD_REV_A
#define BOARD_REV_B
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies"
/// This page lists several definition related to the board operating frequency
/// (when using the initialization done by board_lowlevel.c).
///
/// !Definitions
/// - BOARD_MAINOSC
/// - BOARD_MCK
/// Frequency of the board main oscillator.
#define BOARD_MAINOSC 12000000
/// Master clock frequency (when using board_lowlevel.c).
//#define BOARD_MCK 48000000
#define BOARD_MCK 64000000
//------------------------------------------------------------------------------
// ADC
//------------------------------------------------------------------------------
/// Startup time max, return from Idle mode (in µs)
#define ADC_STARTUP_TIME_MAX 15
/// Track and hold Acquisition Time min (in ns)
#define ADC_TRACK_HOLD_TIME_MIN 1200
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions"
/// This pages lists all the pio definitions contained in board.h. The constants
/// are named using the following convention: PIN_* for a constant which defines
/// a single Pin instance (but may include several PIOs sharing the same
/// controller), and PINS_* for a list of Pin instances.
///
/// !ADC
/// - PIN_ADC0_AD0
/// - PIN_ADC0_AD1
/// - PIN_ADC0_AD2
/// - PIN_ADC0_AD3
/// - PIN_ADC0_AD4
/// - PIN_ADC0_AD5
/// - PIN_ADC0_AD6
/// - PIN_ADC0_AD7
/// - PINS_ADC0
///
/// !UART
/// - PINS_UART
///
/// !EBI
/// - PIN_EBI_DATA_BUS
/// - PIN_EBI_NCS0
/// - PIN_EBI_NRD
/// - PIN_EBI_NWE
/// - PIN_EBI_ADDR_BUS
/// - PIN_EBI_PSRAM_NBS
/// - PIN_EBI_A1
/// - PIN_EBI_LCD_RS
///
/// !LEDs
/// - PIN_LED_0
/// - PIN_LED_1
/// - PIN_LED_2
/// - PINS_LEDS
///
/// !MCI
/// - PINS_MCI
///
/// !Push buttons
/// - PIN_PUSHBUTTON_1
/// - PIN_PUSHBUTTON_2
/// - PINS_PUSHBUTTONS
/// - PUSHBUTTON_BP1
/// - PUSHBUTTON_BP2
///
/// !PWMC
/// - PIN_PWMC_PWMH0
/// - PIN_PWMC_PWML0
/// - PIN_PWMC_PWMH1
/// - PIN_PWMC_PWML1
/// - PIN_PWMC_PWMH2
/// - PIN_PWMC_PWML2
/// - PIN_PWMC_PWMH3
/// - PIN_PWMC_PWML3
/// - PIN_PWM_LED0
/// - PIN_PWM_LED1
/// - PIN_PWM_LED2
/// - CHANNEL_PWM_LED0
/// - CHANNEL_PWM_LED1
/// - CHANNEL_PWM_LED2
///
/// !SPI
/// - PIN_SPI_MISO
/// - PIN_SPI_MOSI
/// - PIN_SPI_SPCK
/// - PINS_SPI
/// - PIN_SPI_NPCS0_PA11
///
/// ! SSC
/// - PIN_SSC_TD
/// - PIN_SSC_TK
/// - PIN_SSC_TF
/// - PINS_SSC_CODEC
///
/// ! PCK0
/// - PIN_PCK0
///
/// !TWI
/// - PIN_TWI_TWD0
/// - PIN_TWI_TWCK0
/// - PINS_TWI
///
/// !USART0
/// - PIN_USART0_RXD
/// - PIN_USART0_TXD
/// - PIN_USART0_CTS
/// - PIN_USART0_RTS
/// - PIN_USART0_SCK
///
/// !USB
/// - PIN_USB_PULLUP
///
/// ADC_AD0 pin definition.
#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD1 pin definition.
#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD2 pin definition.
#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD3 pin definition.
#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD4 pin definition.
#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD5 pin definition.
#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD6 pin definition.
#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
/// ADC_AD7 pin definition.
#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
/// Pins ADC
#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/// EBI
#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
{1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */
#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */
#ifdef BOARD_REV_A
/** LED #0 pin definition. */
#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** LED #1 pin definition. */
#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/** LED #2 pin definition. */
#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
#endif
#ifdef BOARD_REV_B
/** LED #0 pin definition. */
#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
/** LED #1 pin definition. */
#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
/** LED #2 pin definition. */
#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
#endif
/** List of all LEDs definitions. */
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
/// MCI pins definition.
#define PINS_MCI {0x1f8, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \
{1 << 3, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/// MCI pin Card Detect
#define PIN_MCI_CD \
{AT91C_PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */
#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */
#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
/** List of all push button definitions. */
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
/** Push button #1 index. */
#define PUSHBUTTON_BP1 0
/** Push button #2 index. */
#define PUSHBUTTON_BP2 1
/// Simulated joystick LEFT index.
#define JOYSTICK_LEFT 0
/// Simulated joystick RIGHT index.
#define JOYSTICK_RIGHT 1
/** PWMC PWM0 pin definition. */
#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
/** PWMC PWM1 pin definition. */
#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
/** PWMC PWM2 pin definition. */
#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
/** PWMC PWM3 pin definition. */
#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
/** PWM pin definition for LED0 */
#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0
/** PWM pin definition for LED1 */
#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2
/** PWM pin definition for LED2 */
#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3
/** PWM channel for LED0 */
#define CHANNEL_PWM_LED0 0
/** PWM channel for LED1 */
#define CHANNEL_PWM_LED1 2
/** PWM channel for LED2 */
#define CHANNEL_PWM_LED2 3
/** SPI MISO pin definition. */
#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** SPI MOSI pin definition. */
#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** SPI SPCK pin definition. */
#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** SPI chip select pin definition. */
#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
/// SSC pins definition.
#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
/// PCK0
#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
/// TWI pins definition.
#define TWI_V3XX
#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
/// USART0
#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
/// USART1
#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
/// USB VBus monitoring pin definition.
#ifdef BOARD_REV_A
#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
#endif
#ifdef BOARD_REV_B
#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
#endif
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \par sam3s_ek_extcomp "SAM3S-EK - External components"
/// This page lists the definitions related to external on-board components
/// located in the board.h file for the AT91SAM3S-EK.
///
/// !AT45 Dataflash Card
/// - BOARD_AT45_A_SPI_BASE
/// - BOARD_AT45_A_SPI_ID
/// - BOARD_AT45_A_SPI_PINS
/// - BOARD_AT45_A_SPI
/// - BOARD_AT45_A_NPCS
/// - BOARD_AT45_A_NPCS_PIN
///
/// !AT45 Dataflash (serial onboard DataFlash)
/// - BOARD_AT45_B_SPI_BASE
/// - BOARD_AT45_B_SPI_ID
/// - BOARD_AT45_B_SPI_PINS
/// - BOARD_AT45_B_SPI
/// - BOARD_AT45_B_NPCS
/// - BOARD_AT45_B_NPCS_PIN
///
/// !AT26 Serial Flash
/// - BOARD_AT26_A_SPI_BASE
/// - BOARD_AT26_A_SPI_ID
/// - BOARD_AT26_A_SPI_PINS
/// - BOARD_AT26_A_SPI
/// - BOARD_AT26_A_NPCS
/// - BOARD_AT26_A_NPCS_PIN
///
/// !SD Card
/// - MCI2_INTERFACE
/// - BOARD_SD_MCI_BASE
/// - BOARD_SD_MCI_ID
/// - BOARD_SD_PINS
/// - BOARD_SD_SLOT
///
/// !PSRAM
/// - BOARD_PSRAM_PINS
///
/// !LCD
/// - BOARD_LCD_ILI9325
/// - BOARD_LCD_PINS
/// - BOARD_BACKLIGHT_PIN
/// - BOARD_LCD_BASE
/// - BOARD_LCD_RS
/// - BOARD_LCD_WIDTH
/// - BOARD_LCD_HEIGHT
///
/// !TouchScreen
/// - BOARD_TSC_ADS7843
/// - PIN_TCS_IRQ
/// - PIN_TCS_BUSY
/// - BOARD_TSC_SPI_BASE
/// - BOARD_TSC_SPI_ID
/// - BOARD_TSC_SPI_PINS
/// - BOARD_TSC_NPCS
/// - BOARD_TSC_NPCS_PIN
///
/// Base address of SPI peripheral connected to the dataflash.
//#define BOARD_AT45_A_SPI_BASE SPI0
///// Identifier of SPI peripheral connected to the dataflash.
//#define BOARD_AT45_A_SPI_ID ID_SPI0
///// Pins of the SPI peripheral connected to the dataflash.
//#define BOARD_AT45_A_SPI_PINS PINS_SPI0
///// Dataflahs SPI number.
//#define BOARD_AT45_A_SPI 0
///// Chip select connected to the dataflash.
//#define BOARD_AT45_A_NPCS 3
///// Chip select pin connected to the dataflash.
//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3
/// Base address of SPI peripheral connected to the dataflash.
//#define BOARD_AT45_B_SPI_BASE SPI1
///// Identifier of SPI peripheral connected to the dataflash.
//#define BOARD_AT45_B_SPI_ID ID_SPI1
///// Pins of the SPI peripheral connected to the dataflash.
//#define BOARD_AT45_B_SPI_PINS PINS_SPI1
///// Dataflahs SPI number.
//#define BOARD_AT45_B_SPI 1
///// Chip select connected to the dataflash.
//#define BOARD_AT45_B_NPCS 3
///// Chip select pin connected to the dataflash.
//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3
/// Base address of SPI peripheral connected to the serialflash.
//#define BOARD_AT26_A_SPI_BASE SPI0
///// Identifier of SPI peripheral connected to the serialflash.
//#define BOARD_AT26_A_SPI_ID ID_SPI0
///// Pins of the SPI peripheral connected to the serialflash.
//#define BOARD_AT26_A_SPI_PINS PINS_SPI0
///// Serialflash SPI number.
//#define BOARD_AT26_A_SPI 0
///// Chip select connected to the serialflash.
//#define BOARD_AT26_A_NPCS 3
///// Chip select pin connected to the serialflash.
//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3
/// ISO7816
/// - PIN_SMARTCARD_CONNECT
/// - PIN_ISO7816_RSTMC
/// - PINS_ISO7816
/// Smartcard detection pin
//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
/// PIN used for reset the smartcard
//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
/// Pins used for connect the smartcard
//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
/// Dma channel number
#define BOARD_MCI_DMA_CHANNEL 0
/// MCI0 DMA hardware handshaking ID
#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0
#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0
/// MCI1 DMA hardware handshaking ID
#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13
#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13
/// SD DMA hardware handshaking ID
#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0
#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0
/// HS MCI interface
#define MCI2_INTERFACE
/// Base address of the MCI peripheral connected to the SD card.
#define BOARD_SD_MCI_BASE MCI0//MCI
///// Peripheral identifier of the MCI connected to the SD card.
#define BOARD_SD_MCI_ID ID_MCI0 //ID_MCI
///// MCI pins that shall be configured to access the SD card.
#define BOARD_SD_PINS PINS_MCI
///// MCI slot to which the SD card is connected to.
#define BOARD_SD_SLOT MCI_SD_SLOTA
///// MCI Card Detect pin.
#define BOARD_SD_PIN_CD PIN_MCI_CD
/*
#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
*/
/** Indicates board has an ILI9325 external component to manage LCD. */
#define BOARD_LCD_ILI9325
/** LCD pins definition. */
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \
PIN_EBI_NCS1, PIN_EBI_LCD_RS
/** Backlight pin definition. */
#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT}
/** Define ILI9325 base address. */
#define BOARD_LCD_BASE 0x61000000
/** Define ILI9325 register select signal. */
#define BOARD_LCD_RS (1 << 1)
/** Display width in pixels. */
#define BOARD_LCD_WIDTH 240
/** Display height in pixels. */
#define BOARD_LCD_HEIGHT 320
/** Indicates board has an ADS7843 external component to manage Touch Screen */
#define BOARD_TSC_ADS7843
#ifdef BOARD_REV_A
/** Touchscreen controller IRQ pin definition. */
#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
#define PIN_TCS_IRQ_WUP_ID (1 << 3)
/** Touchscreen controller Busy pin definition. */
#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
#endif
#ifdef BOARD_REV_B
/** Touchscreen controller IRQ pin definition. */
#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
#define PIN_TCS_IRQ_WUP_ID (1 << 15)
/** Touchscreen controller Busy pin definition. */
#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
#endif
/** Base address of SPI peripheral connected to the touchscreen controller. */
#define BOARD_TSC_SPI_BASE SPI
/** Identifier of SPI peripheral connected to the touchscreen controller. */
#define BOARD_TSC_SPI_ID ID_SPI
/** Pins of the SPI peripheral connected to the touchscreen controller. */
#define BOARD_TSC_SPI_PINS PINS_SPI
/** Chip select connected to the touchscreen controller. */
#define BOARD_TSC_NPCS 0
/** Chip select pin connected to the touchscreen controller. */
#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \par sam3s_ek_mem "SAM3S-EK - Memories"
/// This page lists definitions related to internal & external on-board memories.
///
/// !Embedded Flash
/// - BOARD_FLASH_EFC
/// Internal SRAM address
#define AT91C_ISRAM AT91C_IRAM
#define AT91C_ISRAM_SIZE 0x00008000
#define AT91C_IFLASH_SIZE (0x40000)
#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes
#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512
#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes
#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \section sam3s_ek_extcomp "SAM3S-EK - External components"
/// This page lists the definitions related to external on-board components
/// located in the board.h file for the SAM3S-EK.
///
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition"
/// This page lists the definitions related to different chip's definition
/// located in the board.h file for the SAM3S-EK.
/// DBGU
#define BOARD_DBGU_ID ID_DBGU
/// Rtc
#define BOARD_RTC_ID ID_RTC
/// Twi eeprom
#define BOARD_ID_TWI_EEPROM ID_TWI1
#define BOARD_BASE_TWI_EEPROM TWI1
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
/// USART
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
#define BOARD_PIN_USART_EN PIN_USART1_EN
#define BOARD_USART_BASE USART1
#define BOARD_ID_USART ID_USART1
//------------------------------------------------------------------------------
#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
/// Nandflash chip enable pin definition.
#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
/// Nandflash ready/busy pin definition.
#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP}
/// Nandflash controller peripheral pins definition.
#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \
PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE
/// Address for transferring command bytes to the nandflash.
#define BOARD_NF_COMMAND_ADDR 0x60400000
/// Address for transferring address bytes to the nandflash.
#define BOARD_NF_ADDRESS_ADDR 0x60200000
/// Address for transferring data bytes to the nandflash.
#define BOARD_NF_DATA_ADDR 0x60000000
extern uint32_t Cmd_A41_resp ;
#define OCR_SD_CCS (1UL << 30)
#define SD_CSD(csd, bitfield, bits) ((csd[3-(bitfield)/32] >> ((bitfield)%32)) & ((1 << (bits)) - 1))
#define SD_CSD_C_SIZE(pSd) ((SD_CSD(pSd, 72, 2) << 10) + \
(SD_CSD(pSd, 64, 8) << 2) + \
SD_CSD(pSd, 62, 2)) ///< Device size
#define SD_CSD_C_SIZE_HC(csd) ((SD_CSD(csd, 64, 6) << 16) + \
(SD_CSD(csd, 56, 8) << 8) + \
SD_CSD(csd, 48, 8)) ///< Device size v2.0 High Capacity
#define SD_CSD_C_SIZE_MULT(pSd) SD_CSD(pSd, 47, 3) ///< Device size multiplier
#define SD_CSD_MULT(pSd) (1 << (SD_CSD_C_SIZE_MULT(pSd) + 2))
#define SD_CSD_BLKLEN(pSd) (1 << ( SD_CSD(pSd, 80, 4) - 9 ) )
#define SD_CSD_BLOCKNR(pSd) ((SD_CSD_C_SIZE(pSd) + 1) * SD_CSD_MULT(pSd)) * SD_CSD_BLKLEN(pSd)
#define SD_CSD_BLOCKNR_HC(pSd) ((SD_CSD_C_SIZE_HC(pSd) + 1) * 1024)
#if !defined(SIMU)
#define SD_IS_HC() (Cmd_A41_resp & OCR_SD_CCS)
#define SD_GET_BLOCKNR() (SD_IS_HC() ? (SD_CSD_BLOCKNR_HC(Card_CSD)) : (SD_CSD_BLOCKNR(Card_CSD)))
#define SD_GET_SPEED() (transSpeed)
#define SD_GET_SIZE_MB() (SD_GET_BLOCKNR() / 2048)
#endif
#endif //#ifndef BOARD_H
+130
View File
@@ -0,0 +1,130 @@
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Definition of AT91SAM3S4 characteristics and features
///
/// !Usage
/// -# For ARM core feature, see "AT91SAM3S4 - ARM core features".
/// -# For IP features, see "AT91SAM3S4 - IP features".
/// -# For misc, see "AT91SAM3S4 - Misc".
//------------------------------------------------------------------------------
#ifndef CHIP_H
#define CHIP_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "AT91SAM3S4 - ARM core features"
/// This page lists several characteristics related to the ARM core
///
//ARM core features
/// ARM core definition.
#define cortexm3
/// family definition.
#define at91sam3s
//------------------------------------------------------------------------------
/// \page "AT91SAM3S4 - IP features"
/// This page lists several characteristics related to the embedded IP
///
//IP FEATURES
// EFC GPNVM number
#define CHIP_EFC_NUM_GPNVMS 3
/// Indicates chip has an Enhanced EFC.
#define CHIP_FLASH_EEFC
// DMA channels number
#define CHIP_DMA_CHANNEL_NUM 4
// Indicate chip's MCI interface.
#define MCI2_INTERFACE
// Indicate chip SSC has DMA interface.
#define CHIP_SSC_DMA
// Indicate chip SPI has DMA interface.
#define CHIP_SPI_DMA
/// Indicates chip has an UDP Full Speed.
#define CHIP_USB_UDP
/// Indicates chip has an internal pull-up.
#define CHIP_USB_PULLUP_INTERNAL
/// Number of USB endpoints
#define CHIP_USB_NUMENDPOINTS 8
/// Endpoints max paxcket size
#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \
((i == 0) ? 64 : \
((i == 1) ? 64 : \
((i == 2) ? 64 : \
((i == 3) ? 64 : \
((i == 4) ? 512 : \
((i == 5) ? 512 : \
((i == 6) ? 64 : \
((i == 7) ? 64 : 0 ))))))))
/// Endpoints Number of Bank
#define CHIP_USB_ENDPOINTS_BANKS(i) \
((i == 0) ? 1 : \
((i == 1) ? 2 : \
((i == 2) ? 2 : \
((i == 3) ? 1 : \
((i == 4) ? 2 : \
((i == 5) ? 2 : \
((i == 6) ? 2 : \
((i == 7) ? 2 : 0 ))))))))
//------------------------------------------------------------------------------
/// \page "AT91SAM3S4 - Misc "
/// This page lists misc features
///
//Misc
#endif //#ifndef CHIP_H
File diff suppressed because it is too large Load Diff
+25
View File
@@ -0,0 +1,25 @@
#include <inttypes.h>
#define TRACE_DEBUG(...) { }
#define TRACE_DEBUG_WP(...) { }
#define TRACE_INFO(...) { }
#define TRACE_INFO_WP(...) { }
#define TRACE_WARNING(...) { }
#define TRACE_WARNING_WP(...) { }
#define TRACE_ERROR(...) { }
extern void handle_serial( void* pdata ) ;
//extern uint32_t read_switch( enum EnumKeys enuk ) ;
extern void txmit( uint8_t c ) ;
//extern void disp_mem( register uint32_t address ) ;
//extern void disp_256( uint32_t address, uint32_t lines ) ;
#ifdef __cplusplus
extern "C" void utxmit( uint8_t c ) ;
extern "C" void up8hex( uint32_t value ) ;
#else
extern void utxmit( uint8_t c ) ;
extern void up8hex( uint32_t value ) ;
#endif
+179
View File
@@ -0,0 +1,179 @@
/*
* Authors (alphabetical order)
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Jean-Pierre Parisy
* - Karl Szmutny <shadow@privy.de>
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* open9x is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/*-----------------------------------------------------------------------
/ Low level disk interface modlue include file (C)ChaN, 2010
/-----------------------------------------------------------------------*/
#ifndef DEF_DISKIO
#define DEF_DISKIO
#ifdef PCBSKY
#include "board.h"
#endif
#ifdef PCBX9D
#include "stm32f2xx.h"
#endif
#if !defined(SIMU)
#include "core_cm3.h"
#endif
#include "integer.h"
#define DN_MCI 0 /* Physical drive number for MCI */
#define DN_NAND 1 /* Physical drive number for NAND flash */
/* These functions are defined in asmfunc.S */
void Copy_al2un (BYTE *dst, const DWORD *src, int count); /* Copy aligned to unaligned. */
void Copy_un2al (DWORD *dst, const BYTE *src, int count); /* Copy unaligned to aligned. */
/* Status of Disk Functions */
typedef BYTE DSTATUS;
/* Results of Disk Functions */
typedef enum {
RES_OK = 0, /* 0: Successful */
RES_ERROR, /* 1: R/W Error */
RES_WRPRT, /* 2: Write Protected */
RES_NOTRDY, /* 3: Not Ready */
RES_PARERR /* 4: Invalid Parameter */
} DRESULT;
/*---------------------------------------*/
/* Prototypes for disk control functions */
DSTATUS disk_initialize (BYTE);
DSTATUS disk_status (BYTE);
#ifdef __cplusplus
extern "C" {
#endif
DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE);
DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE);
DRESULT disk_ioctl (BYTE, BYTE, BYTE*);
#ifdef __cplusplus
}
#endif
void disk_timerproc (void);
/* Disk Status Bits (DSTATUS) */
#define STA_NOINIT 0x01 /* Drive not initialized */
#define STA_NODISK 0x02 /* No medium in the drive */
#define STA_PROTECT 0x04 /* Write protected */
/* Command code for disk_ioctrl fucntion */
/* Generic ioctl command (defined for FatFs) */
#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
/* Generic ioctl command */
#define CTRL_POWER 5 /* Get/Set power status */
#define CTRL_LOCK 6 /* Lock/Unlock media removal */
#define CTRL_EJECT 7 /* Eject media */
/* MMC/SDC specific ioctl command */
#define MMC_GET_TYPE 10 /* Get card type */
#define MMC_GET_CSD 11 /* Get CSD */
#define MMC_GET_CID 12 /* Get CID */
#define MMC_GET_OCR 13 /* Get OCR */
#define MMC_GET_SDSTAT 14 /* Get SD status */
/* ATA/CF specific ioctl command */
#define ATA_GET_REV 20 /* Get F/W revision */
#define ATA_GET_MODEL 21 /* Get model name */
#define ATA_GET_SN 22 /* Get serial number */
/* NAND specific ioctl command */
#define NAND_FORMAT 30 /* Create physical format */
#ifdef PCBSKY
volatile extern BYTE Timer1, Timer2; /* 100Hz decrement timer */
#endif
//#ifdef PCBX9D
//volatile extern DWORD Timer1, Timer2; /* 100Hz decrement timer */
//#endif
//------------------------------------------------------------------------------
/// Detect if SD card is connected
//------------------------------------------------------------------------------
#define CardIsConnected() ( (PIOB->PIO_PDSR & PIO_PB7) == 0 )
extern uint32_t Card_ID[4] ;
extern uint32_t Card_SCR[2] ;
extern uint32_t Card_CSD[4] ;
extern uint32_t Sd_128_resp[4] ;
extern uint32_t Sd_rca ;
//extern uint32_t Cmd_55_resp ;
extern uint32_t SD_SetBusWidth( uint32_t busWidth) ;
extern void SD_EnableHsMode( uint8_t hsEnable) ;
extern uint32_t SD_SetSpeed( uint32_t mciSpeed ) ;
extern void SD_Reset( uint8_t keepSettings) ;
extern uint32_t sd_cmd55( void ) ;
extern uint32_t sd_acmd41( void ) ;
extern uint32_t sd_cmd2( void ) ;
extern uint32_t sd_cmd3( void ) ;
extern uint32_t sd_cmd7( void ) ;
extern uint32_t sd_cmd9( void ) ;
extern uint32_t sd_cmd16( void ) ;
extern uint32_t sd_acmd6( void ) ;
extern uint32_t sd_acmd51( uint32_t *presult ) ;
extern uint32_t sd_cmd13( uint32_t *status) ;
extern void sd_poll_10mS( void ) ;
#ifdef PCBX9D
extern void sdPoll10ms( void ) ;
extern void sdInit( void ) ;
#endif
extern uint32_t sd_card_ready( void ) ;
extern uint32_t sd_read_block( uint32_t block_no, uint32_t *data ) ;
extern DWORD socket_is_empty( void ) ;
extern int8_t SD_ReadSectors(uint8_t *buff, uint32_t sector, uint32_t count) ;
extern int8_t SD_WriteSectors(uint8_t *buff, uint32_t sector, uint32_t count) ;
#endif
+74
View File
@@ -0,0 +1,74 @@
#ifndef drivers_h
#define drivers_h
extern volatile uint32_t Spi_complete ;
extern void putEvent( register uint8_t evt) ;
extern void per10ms( void ) ;
extern uint8_t getEvent( void ) ;
extern void pauseEvents(uint8_t event) ;
extern void killEvents(uint8_t event) ;
extern void init_spi( void ) ;
extern void end_spi( void ) ;
//------------------------------------------------------------------------------
/// Detect if SD card is connected
//------------------------------------------------------------------------------
#ifdef PCBSKY
#define CardIsConnected() ( (PIOB->PIO_PDSR & PIO_PB7) == 0 )
#endif
extern uint32_t Card_ID[4] ;
extern uint32_t Card_SCR[2] ;
extern uint32_t Card_CSD[4] ;
extern uint32_t Sd_128_resp[4] ;
extern uint32_t Sd_rca ;
//extern uint32_t Cmd_55_resp ;
extern uint32_t Card_state ;
extern uint32_t SD_SetBusWidth( uint32_t busWidth) ;
extern void SD_EnableHsMode( uint8_t hsEnable) ;
extern uint32_t SD_SetSpeed( uint32_t mciSpeed ) ;
extern void SD_Reset( uint8_t keepSettings) ;
extern uint32_t sd_cmd55( void ) ;
extern uint32_t sd_acmd41( void ) ;
extern uint32_t sd_cmd2( void ) ;
extern uint32_t sd_cmd3( void ) ;
extern uint32_t sd_cmd7( void ) ;
extern uint32_t sd_cmd9( void ) ;
extern uint32_t sd_cmd17( uint32_t address, uint32_t *presult ) ;
extern uint32_t sd_acmd6( void ) ;
extern uint32_t sd_acmd51( uint32_t *presult ) ;
extern void sd_poll_10mS( void ) ;
extern uint32_t sd_card_ready( void ) ;
extern uint32_t sd_read_block( uint32_t block_no, uint32_t *data ) ;
class Key
{
#define FILTERBITS 4
#define FFVAL ((1<<FILTERBITS)-1)
#define KSTATE_OFF 0
#define KSTATE_RPTDELAY 95 // gruvin: longer dely before key repeating starts
//#define KSTATE_SHORT 96
#define KSTATE_START 97
#define KSTATE_PAUSE 98
#define KSTATE_KILLED 99
uint8_t m_vals:FILTERBITS; // key debounce? 4 = 40ms
uint8_t m_dblcnt:2;
uint8_t m_cnt;
uint8_t m_state;
public:
void input(bool val, EnumKeys enuk);
bool state() { return m_vals==FFVAL; }
void pauseEvents() { m_state = KSTATE_PAUSE; m_cnt = 0;}
void killEvents() { m_state = KSTATE_KILLED; m_dblcnt=0; }
uint8_t getDbl() { return m_dblcnt; }
};
extern Key keys[NUM_KEYS] ;
#endif
+48
View File
@@ -0,0 +1,48 @@
/*
* Authors (alphabetical order)
* - Andre Bernet <bernet.andre@gmail.com>
* - Andreas Weitl
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Gabriel Birkus
* - Jean-Pierre Parisy
* - Karl Szmutny
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* opentx is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef eeprom_rlc_h
#define eeprom_rlc_h
#include <inttypes.h>
#if !defined(EESIZE)
#define EESIZE (32*1024)
#endif
//uint32_t ee32_check_finished( void ) ;
#endif
+758
View File
@@ -0,0 +1,758 @@
/*
* Author - Mike Blandford
*
* Based on er9x by Erez Raviv <erezraviv@gmail.com>
*
* Based on th9x -> http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
// This version for ARM based ERSKY9X board
#ifndef ersky9x_h
#define ersky9x_h
#include <stdint.h>
#define FIX_MODE 1
#ifdef SIMU
#include "simpgmspace.h"
#else
// Items set to make things compile, will need to be sorted eventually
#define assert(x)
#ifdef PCBSKY
#define wdt_reset() (WDT->WDT_CR = 0xA5000001)
#endif
#ifdef PCBX9D
#define wdt_reset() (IWDG->KR = 0x0000AAAAL)
#endif
#endif
#define VERSION "V0.26"
#define GVARS 1
//#define DATE_STR "xx.xx.2012"
//#define TIME_STR "xx:xx:xx"
//#define SUB_VERS VERSION
//#define SVN_VERS "trunk-rxxx"
//#define MOD_VERS "Normal"
//#define STR2(s) #s
//#define DEFNUMSTR(s) STR2(s)
extern const char stamp1[] ;
extern const char stamp2[] ;
extern const char stamp3[] ;
extern const char stamp4[] ;
extern const char stamp5[] ;
//extern const char *Str_OFF ;
//extern const char *Str_ON ;
//extern const char *Str_Switches ;
//extern const char *Str_Switch_warn ;
#define CPU_INT int32_t
#define CPU_UINT uint32_t
#define BITMASK(bit) (1<<(bit))
extern const char * const *Language ;
extern const char * const English[] ;
extern const char * const French[] ;
extern const char * const German[] ;
extern const char * const Norwegian[] ;
extern const char * const Swedish[] ;
#define PSTR(a) Language[a]
#define XPSTR(a) (char *)a
#define PROGMEM const unsigned char
#define strcpy_P(a,b) strcpy(a,b)
#define strncpy_P(a,b,c) strncpy(a,b,c)
#define pgm_read_byte(p) (*(p))
#ifdef PCBX9D
#define NUMBER_ANALOG 9
#else
#ifdef REVX
#define NUMBER_ANALOG 10
#define CURRENT_ANALOG 8
#else
#ifdef REVB
#define NUMBER_ANALOG 9
#define CURRENT_ANALOG 8
#else
#define NUMBER_ANALOG 8
#endif
#endif
#endif
#define DIM(arr) (sizeof((arr))/sizeof((arr)[0]))
enum EnumKeys {
KEY_MENU ,
KEY_EXIT ,
KEY_DOWN ,
KEY_UP ,
KEY_RIGHT ,
KEY_LEFT ,
TRM_LH_DWN ,
TRM_LH_UP ,
TRM_LV_DWN ,
TRM_LV_UP ,
TRM_RV_DWN ,
TRM_RV_UP ,
TRM_RH_DWN ,
TRM_RH_UP ,
BTN_RE,
#ifdef PCBSKY
//SW_NC ,
//SW_ON ,
SW_ThrCt ,
SW_RuddDR ,
SW_ElevDR ,
SW_ID0 ,
SW_ID1 ,
SW_ID2 ,
SW_AileDR ,
SW_Gear ,
SW_Trainer
#endif
#ifdef PCBX9D
SW_SA0,
SW_SA1,
SW_SA2,
SW_SB0,
SW_SB1,
SW_SB2,
SW_SC0,
SW_SC1,
SW_SC2,
SW_SD0,
SW_SD1,
SW_SD2,
SW_SE0,
SW_SE1,
SW_SE2,
SW_SF0,
SW_SF2,
SW_SG0,
SW_SG1,
SW_SG2,
SW_SH0,
SW_SH2
#endif
};
// c17-c24 added for timer mode A display
//#define CURV_STR "\003---x>0x<0|x|f>0f<0|f|c1 c2 c3 c4 c5 c6 c7 c8 c9 c10c11c12c13c14c15c16c17c18c19c20c21c22c23c24"
#define CURVE_BASE 7
//#define CSWITCH_STR "---- v>ofs v<ofs |v|>ofs|v|<ofsAND OR XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 TimeOff"
#define CSW_LEN_FUNC 7
#define CS_OFF 0
#define CS_VPOS 1 //v>offset
#define CS_VNEG 2 //v<offset
#define CS_APOS 3 //|v|>offset
#define CS_ANEG 4 //|v|<offset
#define CS_AND 5
#define CS_OR 6
#define CS_XOR 7
#define CS_EQUAL 8
#define CS_NEQUAL 9
#define CS_GREATER 10
#define CS_LESS 11
#define CS_EGREATER 12
#define CS_ELESS 13
#define CS_TIME 14
#define CS_MAXF 14 //max function
#define CS_VOFS 0
#define CS_VBOOL 1
#define CS_VCOMP 2
#define CS_TIMER 3
#define CS_STATE(x) ((x)<CS_AND ? CS_VOFS : ((x)<CS_EQUAL ? CS_VBOOL : ((x)<CS_TIME ? CS_VCOMP : CS_TIMER)))
#ifdef PCBSKY
#define SW_BASE SW_ThrCt
#define SW_BASE_DIAG SW_ThrCt
#define MAX_PSWITCH (SW_Trainer-SW_ThrCt+1) // 9 physical switches
#define MAX_DRSWITCH (1+SW_Trainer-SW_ThrCt+1+NUM_CSW)
#define MAX_SKYDRSWITCH (1+SW_Trainer-SW_ThrCt+1+NUM_SKYCSW)
#endif
#ifdef PCBX9D
#define SW_BASE SW_SA0
#define SW_BASE_DIAG SW_SA0
#define MAX_PSWITCH (SW_SH2-SW_SA0+1) // 9 physical switches
#define MAX_DRSWITCH (1+SW_SH2-SW_SA0+1+NUM_CSW)
#define MAX_SKYDRSWITCH (1+SW_SH2-SW_SA0+1+NUM_SKYCSW)
#endif
#define SWP_RUD (SW_RuddDR-SW_BASE)
#define SWP_ELE (SW_ElevDR-SW_BASE)
#define SWP_AIL (SW_AileDR-SW_BASE)
#define SWP_THR (SW_ThrCt-SW_BASE)
#define SWP_GEA (SW_Gear-SW_BASE)
#define SWP_RUDB (1<<SWP_RUD)
#define SWP_ELEB (1<<SWP_ELE)
#define SWP_AILB (1<<SWP_AIL)
#define SWP_THRB (1<<SWP_THR)
#define SWP_GEAB (1<<SWP_GEA)
#define SWP_ID0 (SW_ID0-SW_BASE)
#define SWP_ID1 (SW_ID1-SW_BASE)
#define SWP_ID2 (SW_ID2-SW_BASE)
#define SWP_ID0B (1<<SWP_ID0)
#define SWP_ID1B (1<<SWP_ID1)
#define SWP_ID2B (1<<SWP_ID2)
//Switch Position Illigal states
#define SWP_IL1 (0)
#define SWP_IL2 (SWP_ID0B | SWP_ID1B)
#define SWP_IL3 (SWP_ID0B | SWP_ID2B)
#define SWP_IL4 (SWP_ID1B | SWP_ID2B)
#define SWP_IL5 (SWP_ID0B | SWP_ID1B | SWP_ID2B)
//#define SWITCHES_STR "THRRUDELEID0ID1ID2AILGEATRNSW1SW2SW3SW4SW5SW6SW7SW8SW9SWASWBSWCSWDSWESWFSWGSWHSWISWJSWKSWLSWMSWNSWO"
#define NUM_CSW 12 //number of custom switches
#define NUM_SKYCSW 24 //number of custom switches
#ifdef PCBSKY
#define CSW_INDEX 9 // Index of first custom switch
#endif
#ifdef PCBX9D
#define CSW_INDEX 22 // Index of first custom switch
#endif
#define NUM_KEYS BTN_RE+1
#define TRM_BASE TRM_LH_DWN
#define _MSK_KEY_REPT 0x40
#define _MSK_KEY_DBL 0x10
#define IS_KEY_BREAK(key) (((key)&0xf0) == 0x20)
#define EVT_KEY_BREAK(key) ((key)| 0x20)
#define EVT_KEY_FIRST(key) ((key)| _MSK_KEY_REPT|0x20)
#define EVT_KEY_REPT(key) ((key)| _MSK_KEY_REPT )
#define EVT_KEY_LONG(key) ((key)|0x80)
#define EVT_KEY_DBL(key) ((key)|_MSK_KEY_DBL)
//#define EVT_KEY_DBL(key) ((key)|0x10)
#define EVT_ENTRY (0xff - _MSK_KEY_REPT)
#define EVT_ENTRY_UP (0xfe - _MSK_KEY_REPT)
#define EVT_KEY_MASK 0x0f
#define HEART_TIMER_PULSES 1 ;
#define HEART_TIMER10ms 2;
#define INP_D_TRM_LH_UP 7
#define INP_D_TRM_LH_DWN 6
#define INP_D_TRM_RV_DWN 5
#define INP_D_TRM_RV_UP 4
#define INP_D_TRM_LV_DWN 3
#define INP_D_TRM_LV_UP 2
#define INP_D_TRM_RH_DWN 1
#define INP_D_TRM_RH_UP 0
#define RESX (1<<10) // 1024
#define RESXu 1024u
#define RESXul 1024ul
#define RESXl 1024l
#define RESKul 100ul
#define RESX_PLUS_TRIM (RESX+128)
#define TRIM_EXTENDED_MAX 500
#define NUM_PPM 8
//number of real outputchannels CH1-CH16
#define NUM_CHNOUT 16
#define NUM_SKYCHNOUT 24
///number of real input channels (1-9) plus virtual input channels X1-X4
#define PPM_BASE MIX_CYC3
#define CHOUT_BASE (PPM_BASE+NUM_PPM)
#define NUM_FSW 16
#define NUM_STICKS 4
//#define SWASH_TYPE_STR "--- ""120 ""120X ""140 ""90 "
#define SWASH_TYPE_120 1
#define SWASH_TYPE_120X 2
#define SWASH_TYPE_140 3
#define SWASH_TYPE_90 4
#define SWASH_TYPE_NUM 4
#define MIX_P1 5
#define MIX_P2 6
#ifdef PCBSKY
#define MIX_P3 7
#define MIX_MAX 8
#define MIX_FULL 9
#define MIX_CYC1 10
#define MIX_CYC2 11
#define MIX_CYC3 12
#endif
#ifdef PCBX9D
#define MIX_P3 7
#define MIX_P4 8
#define MIX_MAX 9
#define MIX_FULL 10
#define MIX_CYC1 11
#define MIX_CYC2 12
#define MIX_CYC3 13
#endif
#define DR_HIGH 0
#define DR_MID 1
#define DR_LOW 2
#define DR_EXPO 0
#define DR_WEIGHT 1
#define DR_RIGHT 0
#define DR_LEFT 1
#define DR_BOTH 2
#define DR_DRSW1 99
#define DR_DRSW2 98
#define DSW_THR 1
#define DSW_RUD 2
#define DSW_ELE 3
#define DSW_ID0 4
#define DSW_ID1 5
#define DSW_ID2 6
#define DSW_AIL 7
#define DSW_GEA 8
#define DSW_TRN 9
#define DSW_SW1 10
#define DSW_SW2 11
#define DSW_SW3 12
#define DSW_SW4 13
#define DSW_SW5 14
#define DSW_SW6 15
#define DSW_SW7 16
#define DSW_SW8 17
#define DSW_SW9 18
#define DSW_SWA 19
#define DSW_SWB 20
#define DSW_SWC 21
#define SCROLL_TH 64
#define INACTIVITY_THRESHOLD 256
#define THRCHK_DEADBAND 16
#define SPLASH_TIMEOUT (4*100) //400 msec - 4 seconds
uint8_t IS_THROTTLE( uint8_t x ) ;
uint8_t IS_EXPO_THROTTLE( uint8_t x ) ;
extern uint8_t Ee_lock ;
// Bit masks in Ee_lock
#define EE_LOCK 1
#define EE_TRIM_LOCK 2
#define EE_GENERAL 1
#define EE_MODEL 2
#define EE_TRIM 4 // Store model because of trim
#define INCDEC_SWITCH 0x08
#define TMR_VAROFS 4
#define TMRMODE_NONE 0
#define TMRMODE_ABS 1
#define TMRMODE_THR 2
#define TMRMODE_THR_REL 3
#define MAX_ALERT_TIME 60
#define PROTO_PPM 0
#define PROTO_PXX 1
#define PROTO_DSM2 2
#define PROT_MAX 2
#define PROTO_PPM16 3 // No longer needed
#define PROT_STR_LEN 6
#define DSM2_STR "\011LP4/LP5 DSM2only DSM2/DSMX9XR-DSM "
#define DSM2_STR_LEN 9
#define LPXDSM2 0
#define DSM2only 1
#define DSM2_DSMX 2
#define DSM_9XR 3
// PXX_SEND_RXNUM == BIND
#define PXX_BIND 0x01
#define PXX_SEND_FAILSAFE 0x10
#define PXX_RANGE_CHECK 0x20
#define POWER_OFF 0
#define POWER_ON 1
#define POWER_TRAINER 2
extern uint8_t pxxFlag;
extern uint8_t stickMoved;
#define FLASH_DURATION 50
extern uint16_t g_LightOffCounter;
template<class t> inline t min(t a, t b){ return a<b?a:b; }
template<class t> inline t max(t a, t b){ return a>b?a:b; }
template<class t> inline t limit(t mi, t x, t ma){ return min(max(mi,x),ma); }
// This doesn't need protection on this processor
#define get_tmr10ms() g_tmr10ms
#define sysFLAG_OLD_EEPROM (0x01)
extern uint8_t sysFlags;
extern uint8_t StickScrollAllowed ;
const char s_charTab[]=" ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789_-.";
#define NUMCHARS (sizeof(s_charTab)-1)
///number of real input channels (1-9) plus virtual input channels X1-X4
#define PPM_BASE MIX_CYC3
#define CHOUT_BASE (PPM_BASE+NUM_PPM)
//extern const char *Str_telemItems ;
extern const int8_t TelemIndex[] ;
extern int16_t convertTelemConstant( int8_t channel, int8_t value) ;
#define NUM_TELEM_ITEMS 35
#define NUM_XCHNRAW (CHOUT_BASE+NUM_CHNOUT) // NUMCH + P1P2P3+ AIL/RUD/ELE/THR + MAX/FULL + CYC1/CYC2/CYC3
#define NUM_SKYXCHNRAW (CHOUT_BASE+NUM_SKYCHNOUT) // NUMCH + P1P2P3+ AIL/RUD/ELE/THR + MAX/FULL + CYC1/CYC2/CYC3
///number of real output channels (CH1-CH8) plus virtual output channels X1-X4
#define NUM_XCHNOUT (NUM_CHNOUT) //(NUM_CHNOUT)//+NUM_VIRT)
#define NUM_SKYXCHNOUT (NUM_SKYCHNOUT) //(NUM_CHNOUT)//+NUM_VIRT)
#define MIX_3POS (NUM_SKYXCHNRAW+1)
inline int32_t calc100toRESX(register int8_t x)
{
return ((uint32_t)x*655)>>6 ;
}
inline int16_t calc1000toRESX( register int32_t x) // improve calc time by Pat MacKenzie
{
register int32_t y = x>>5;
x+=y;
y=y>>2;
x-=y;
return x+(y>>2);
// return x + x/32 - x/128 + x/512;
}
extern uint32_t Current_used ;
extern uint16_t Current_max ;
extern uint16_t MAh_used ;
extern uint16_t Run_time ;
#ifdef FIX_MODE
extern const char stickScramble[] ;
//extern const char modeFix[] ;
uint8_t modeFixValue( uint8_t value ) ;
#else
extern const char modn12x3[] ;
#endif
extern const uint8_t bchout_ar[] ;
//convert from mode 1 to mode g_eeGeneral.stickMode
//NOTICE! => 1..4 -> 1..4
extern uint8_t convert_mode_helper(uint8_t x) ;
#define CONVERT_MODE(x) (((x)<=4) ? convert_mode_helper(x) : (x))
//#define CHANNEL_ORDER(x) (chout_ar[g_eeGeneral.templateSetup*4 + (x)-1])
#define CHANNEL_ORDER(x) ( ( (bchout_ar[g_eeGeneral.templateSetup] >> (6-(x-1) * 2)) & 3 ) + 1 )
#define THR_STICK (2-(g_eeGeneral.stickMode&1))
#define ELE_STICK (1+(g_eeGeneral.stickMode&1))
#define AIL_STICK ((g_eeGeneral.stickMode&2) ? 0 : 3)
#define RUD_STICK ((g_eeGeneral.stickMode&2) ? 3 : 0)
#define STORE_MODELVARS_TRIM eeDirty(EE_MODEL|EE_TRIM)
#define STORE_MODELVARS eeDirty(EE_MODEL)
#define STORE_GENERALVARS eeDirty(EE_GENERAL)
#ifdef PCBSKY
#define BACKLIGHT_ON (PWM->PWM_CH_NUM[0].PWM_CDTY = g_eeGeneral.bright)
#define BACKLIGHT_OFF (PWM->PWM_CH_NUM[0].PWM_CDTY = 100)
#endif
#ifdef PCBX9D
extern void backlight_on( void ) ;
extern void backlight_off( void ) ;
#define BACKLIGHT_ON backlight_on()
#define BACKLIGHT_OFF backlight_off()
#endif
// Options for mainSequence()
#define NO_MENU 1
#define MENUS 0
extern uint16_t evalChkSum( void ) ;
struct t_calib
{
int16_t midVals[8];
int16_t loVals[8];
int16_t hiVals[8];
uint8_t idxState;
} ;
union t_xmem
{
// struct MixTab s_mixTab[MAX_MIXERS+NUM_XCHNOUT+1] ;
struct t_calib Cal_data ;
#ifndef CPUARM
char buf[sizeof(g_model.name)+5];
#endif
//#if defined(CPUM128) || defined(CPUM2561)
// uint8_t file_buffer[256];
//#else
// uint8_t file_buffer[128];
//#endif
} ;
extern union t_xmem Xmem ;
typedef void (*MenuFuncP)(uint8_t event);
typedef struct
{
unsigned char second; //enter the current time, date, month, and year
unsigned char minute;
unsigned char hour;
unsigned char date;
unsigned char month;
unsigned int year;
} t_time ;
extern t_time Time ;
extern bool checkIncDec_Ret;//global helper vars
extern uint8_t s_editMode; //global editmode
int16_t checkIncDec16(uint8_t event, int16_t i_pval, int16_t i_min, int16_t i_max, uint8_t i_flags);
int8_t checkIncDec(uint8_t event, int8_t i_val, int8_t i_min, int8_t i_max, uint8_t i_flags);
int8_t checkIncDec_hm(uint8_t event, int8_t i_val, int8_t i_min, int8_t i_max);
int8_t checkIncDec_vm(uint8_t event, int8_t i_val, int8_t i_min, int8_t i_max);
int8_t checkIncDec_hg(uint8_t event, int8_t i_val, int8_t i_min, int8_t i_max);
#define CHECK_INCDEC_H_GENVAR( event, var, min, max) \
var = checkIncDec_hg(event,var,min,max)
#define CHECK_INCDEC_H_MODELVAR( event, var, min, max) \
var = checkIncDec_hm(event,var,min,max)
#define CHECK_INCDEC_MODELSWITCH(event, var, min, max) \
var = checkIncDec(event,var,min,max,EE_MODEL|INCDEC_SWITCH)
#define CHECK_INCDEC_GENERALSWITCH( event, var, min, max) \
var = checkIncDec(event,var,min,max,EE_GENERAL|INCDEC_SWITCH)
extern uint8_t heartbeat ;
extern int16_t g_chans512[NUM_SKYCHNOUT];
//extern uint8_t eeprom[4096] ;
uint8_t char2idx(char c);
char idx2char(uint8_t idx);
//extern volatile uint32_t Timer2_count ; // Modified in interrupt routine
extern volatile uint16_t g_tmr10ms ;
extern volatile uint8_t g_blinkTmr10ms;
extern volatile uint8_t tick10ms ;
extern uint32_t Master_frequency ;
extern void alert(const char * s, bool defaults=false);
extern void message(const char * s);
void resetTimer();
//extern uint8_t Timer2_running ;
//extern uint16_t Timer2 ;
//void resetTimer2( void ) ;
extern void putsTime(uint8_t x,uint8_t y,int16_t tme,uint8_t att,uint8_t att2) ;
extern void putsVolts(uint8_t x,uint8_t y, uint8_t volts, uint8_t att) ;
extern void putsVBat(uint8_t x,uint8_t y,uint8_t att) ;
extern void putsVBat(uint8_t x,uint8_t y,uint8_t att) ;
extern void putsChnRaw(uint8_t x,uint8_t y,uint8_t idx,uint8_t att) ;
extern void putsChn(uint8_t x,uint8_t y,uint8_t idx1,uint8_t att) ;
extern void putsDrSwitches(uint8_t x,uint8_t y,int8_t idx1,uint8_t att) ; //, bool nc) ;
extern void putsTmrMode(uint8_t x, uint8_t y, uint8_t attr, uint8_t timer, uint8_t type ) ;
extern const char *get_switches_string( void ) ;
extern void interrupt5ms() ;
extern int16_t intpol(int16_t x, uint8_t idx);
extern uint16_t anaIn(uint8_t chan) ;
extern int8_t phyStick[4] ;
extern int16_t ex_chans[NUM_SKYCHNOUT];
extern void modelDefault( uint8_t id ) ;
extern uint8_t VoiceCheckFlag ;
//void eeWaitComplete( void ) ;
void eeDirty(uint8_t msk);
//void eeCheck(bool immediately=false ) ;
void eeReadAll( void ) ;
//void eeLoadModelName(uint8_t id,char*buf,uint8_t len);
//uint16_t eeFileSize(uint8_t id);
//void eeLoadModel(uint8_t id);
//void eeSaveModel(uint8_t id);
bool eeDuplicateModel(uint8_t id);
//bool eeModelExists(uint8_t id);
extern char idx2char(uint8_t idx) ;
extern uint8_t char2idx(char c) ;
extern int16_t g_ppmIns[];
extern uint8_t ppmInState ; //0=unsync 1..8= wait for value i-1
extern uint8_t ppmInValid ;
/// goto given Menu, but substitute current menu in menuStack
extern void chainMenu(MenuFuncP newMenu);
/// goto given Menu, store current menu in menuStack
extern void pushMenu(MenuFuncP newMenu);
///deliver address of last menu which was popped from
extern MenuFuncP lastPopMenu();
/// return to last menu in menustack
/// if uppermost is set true, thenmenu return to uppermost menu in menustack
void popMenu(bool uppermost=false);
#define NO_TRAINER 0x01
#define NO_INPUT 0x02
// Timeout, in seconds, stick scroll remains active
#define STICK_SCROLL_TIMEOUT 5
extern bool getSwitch(int8_t swtch, bool nc, uint8_t level = 0 ) ;
extern int8_t getMovedSwitch( void ) ;
extern uint8_t g_vbat100mV ;
//extern uint16_t Timer2 ;
extern void doSplash( void ) ;
extern void mainSequence( uint32_t no_menu ) ;
#ifdef FRSKY
extern uint8_t putsTelemValue(uint8_t x, uint8_t y, uint8_t val, uint8_t channel, uint8_t att, uint8_t scale) ;
extern void telem_byte_to_bt( uint8_t data ) ;
extern uint16_t scale_telem_value( uint16_t val, uint8_t channel, uint8_t times2, uint8_t *p_att ) ;
#endif
uint8_t telemItemValid( uint8_t index ) ;
extern int16_t get_telemetry_value( int8_t channel ) ;
extern void putVoiceQueue( uint16_t value ) ;
void voice_numeric( int16_t value, uint8_t num_decimals, uint8_t units_index ) ;
extern void voice_telem_item( int8_t index ) ;
extern uint8_t *cpystr( uint8_t *dest, uint8_t *source ) ;
extern int16_t m_to_ft( int16_t metres ) ;
uint8_t getCurrentSwitchStates( void ) ;
extern uint32_t check_soft_power( void ) ;
extern uint32_t getFlightPhase( void ) ;
extern int16_t getRawTrimValue( uint8_t phase, uint8_t idx ) ;
extern int16_t getTrimValue( uint8_t phase, uint8_t idx ) ;
extern void setTrimValue(uint8_t phase, uint8_t idx, int16_t trim) ;
extern void checkSwitches( void ) ;
extern void setLanguage( void ) ;
struct t_timer
{
uint16_t s_sum ;
uint8_t lastSwPos ;
uint8_t sw_toggled ;
uint16_t s_timeCumSw ; //laufzeit in 1/16 sec
uint8_t s_timerState ;
uint16_t s_timeCumThr ; //gewichtete laufzeit in 1/16 sec
uint16_t s_timeCum16ThrP ; //gewichtete laufzeit in 1/16 sec
int16_t s_timerVal ;
} ;
extern struct t_timer s_timer[] ;
// Rotary encoder movement states
#define ROTARY_MENU_LR 0
#define ROTARY_MENU_UD 1
#define ROTARY_SUBMENU_LR 2
#define ROTARY_VALUE 3
extern uint8_t RotaryState ; // Defaults to ROTARY_MENU_LR
#if GVARS
extern int8_t REG(int8_t x, int8_t min, int8_t max) ;
#endif
enum PowerState
{
e_power_on,
e_power_trainer,
e_power_usb,
e_power_off
} ;
struct t_p1
{
int16_t p1val ;
int16_t p1valdiff ;
int16_t p1valprev ;
int16_t p2valprev ;
int16_t p3valprev ;
} ;
extern struct t_p1 P1values ;
#ifdef PCBSKY
extern uint16_t ResetReason ;
#endif
#ifdef PCBX9D
extern uint32_t ResetReason ;
#endif
extern uint8_t unexpectedShutdown ;
extern uint8_t SdMounted ;
#ifdef PCBX9D
#include "stm32f2xx.h"
#include "rtc.h"
#include "stm32f2xx_rtc.h"
void rtcSetTime( t_time *t ) ;
void rtc_gettime( t_time *t ) ;
void rtcInit( void ) ;
#endif
extern void setVolume( uint8_t value ) ;
extern uint8_t HoldVolume ;
#ifdef PCBX9D
#define INTERNAL_MODULE 0
#define EXTERNAL_MODULE 1
#define TRAINER_MODULE 2
#endif
#endif
+575
View File
@@ -0,0 +1,575 @@
/*
* Authors (alphabetical order)
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Jean-Pierre Parisy
* - Karl Szmutny <shadow@privy.de>
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* open9x is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/*---------------------------------------------------------------------------/
/ FatFs - FAT file system module include file R0.08a (C)ChaN, 2010
/----------------------------------------------------------------------------/
/ FatFs module is a generic FAT file system module for small embedded systems.
/ This is a free software that opened for education, research and commercial
/ developments under license policy of following trems.
/
/ Copyright (C) 2010, ChaN, all right reserved.
/
/ * The FatFs module is a free software and there is NO WARRANTY.
/ * No restriction on use. You can use, modify and redistribute it for
/ personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY.
/ * Redistributions of source code must retain the above copyright notice.
/
/----------------------------------------------------------------------------*/
#ifndef _FATFS
#define _FATFS 8255 /* Revision ID */
#ifdef __cplusplus
extern "C" {
#endif
#include "inttypes.h"
#include "integer.h" /* Basic integer types */
#include "ffconf.h" /* FatFs configuration options */
#if _FATFS != _FFCONF
#error Wrong configuration file (ffconf.h).
#endif
/* DBCS code ranges and SBCS extend char conversion table */
#if _CODE_PAGE == 932 /* Japanese Shift-JIS */
#define _DF1S 0x81 /* DBC 1st byte range 1 start */
#define _DF1E 0x9F /* DBC 1st byte range 1 end */
#define _DF2S 0xE0 /* DBC 1st byte range 2 start */
#define _DF2E 0xFC /* DBC 1st byte range 2 end */
#define _DS1S 0x40 /* DBC 2nd byte range 1 start */
#define _DS1E 0x7E /* DBC 2nd byte range 1 end */
#define _DS2S 0x80 /* DBC 2nd byte range 2 start */
#define _DS2E 0xFC /* DBC 2nd byte range 2 end */
#elif _CODE_PAGE == 936 /* Simplified Chinese GBK */
#define _DF1S 0x81
#define _DF1E 0xFE
#define _DS1S 0x40
#define _DS1E 0x7E
#define _DS2S 0x80
#define _DS2E 0xFE
#elif _CODE_PAGE == 949 /* Korean */
#define _DF1S 0x81
#define _DF1E 0xFE
#define _DS1S 0x41
#define _DS1E 0x5A
#define _DS2S 0x61
#define _DS2E 0x7A
#define _DS3S 0x81
#define _DS3E 0xFE
#elif _CODE_PAGE == 950 /* Traditional Chinese Big5 */
#define _DF1S 0x81
#define _DF1E 0xFE
#define _DS1S 0x40
#define _DS1E 0x7E
#define _DS2S 0xA1
#define _DS2E 0xFE
#elif _CODE_PAGE == 437 /* U.S. (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 720 /* Arabic (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 737 /* Greek (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \
0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 775 /* Baltic (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 850 /* Multilingual Latin 1 (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 852 /* Latin 2 (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \
0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF}
#elif _CODE_PAGE == 855 /* Cyrillic (OEM) */
#define _DF1S 0
#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \
0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \
0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 857 /* Turkish (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \
0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 858 /* Multilingual Latin 1 + Euro (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \
0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 862 /* Hebrew (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 866 /* Russian (OEM) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 874 /* Thai (OEM, Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}
#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \
0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF}
#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \
0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}
#elif _CODE_PAGE == 1253 /* Greek (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \
0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF}
#elif _CODE_PAGE == 1254 /* Turkish (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \
0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}
#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 1256 /* Arabic (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF}
#elif _CODE_PAGE == 1257 /* Baltic (Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}
#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */
#define _DF1S 0
#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \
0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F}
#elif _CODE_PAGE == 1 /* ASCII (for only non-LFN cfg) */
#define _DF1S 0
#else
#error Unknown code page
#endif
/* Definitions of volume management */
#if _MULTI_PARTITION /* Multiple partition configuration */
#define LD2PD(vol) (VolToPart[vol].pd) /* Get physical drive# */
#define LD2PT(vol) (VolToPart[vol].pt) /* Get partition# */
typedef struct {
BYTE pd; /* Physical drive# */
BYTE pt; /* Partition # (0-3) */
} PARTITION;
extern const PARTITION VolToPart[]; /* Volume - Physical location resolution table */
#else /* Single partition configuration */
#define LD2PD(vol) (vol) /* Logical drive# is bound to the same physical drive# */
#define LD2PT(vol) 0 /* Always mounts the 1st partition */
#endif
/* Type of path name strings on FatFs API */
#if _LFN_UNICODE /* Unicode string */
#if !_USE_LFN
#error _LFN_UNICODE must be 0 in non-LFN cfg.
#endif
#ifndef _INC_TCHAR
typedef WCHAR TCHAR;
#define _T(x) L ## x
#define _TEXT(x) L ## x
#endif
#else /* ANSI/OEM string */
#ifndef _INC_TCHAR
typedef char TCHAR;
#define _T(x) x
#define _TEXT(x) x
#endif
#endif
/* File system object structure (FATFS) */
typedef struct {
BYTE fs_type; /* FAT sub-type (0:Not mounted) */
BYTE drv; /* Physical drive number */
BYTE csize; /* Sectors per cluster (1,2,4...128) */
BYTE n_fats; /* Number of FAT copies (1,2) */
BYTE wflag; /* win[] dirty flag (1:must be written back) */
BYTE fsi_flag; /* fsinfo dirty flag (1:must be written back) */
WORD id; /* File system mount ID */
WORD n_rootdir; /* Number of root directory entries (FAT12/16) */
#if _MAX_SS != 512
WORD ssize; /* Bytes per sector (512,1024,2048,4096) */
#endif
#if _FS_REENTRANT
_SYNC_t sobj; /* Identifier of sync object */
#endif
#if !_FS_READONLY
DWORD last_clust; /* Last allocated cluster */
DWORD free_clust; /* Number of free clusters */
DWORD fsi_sector; /* fsinfo sector (FAT32) */
#endif
#if _FS_RPATH
DWORD cdir; /* Current directory start cluster (0:root) */
#endif
DWORD n_fatent; /* Number of FAT entries (= number of clusters + 2) */
DWORD fsize; /* Sectors per FAT */
DWORD fatbase; /* FAT start sector */
DWORD dirbase; /* Root directory start sector (FAT32:Cluster#) */
DWORD database; /* Data start sector */
DWORD winsect; /* Current sector appearing in the win[] */
BYTE win[_MAX_SS]; /* Disk access window for Directory, FAT (and Data on tiny cfg) */
} FATFS;
/* File object structure (FIL) */
typedef struct {
FATFS* fs; /* Pointer to the owner file system object */
WORD id; /* Owner file system mount ID */
BYTE flag; /* File status flags */
BYTE pad1;
DWORD fptr; /* File read/write pointer (0 on file open) */
DWORD fsize; /* File size */
DWORD org_clust; /* File start cluster (0 when fsize==0) */
DWORD curr_clust; /* Current cluster */
DWORD dsect; /* Current data sector */
#if !_FS_READONLY
DWORD dir_sect; /* Sector containing the directory entry */
BYTE* dir_ptr; /* Ponter to the directory entry in the window */
#endif
#if _USE_FASTSEEK
DWORD* cltbl; /* Pointer to the cluster link map table (null on file open) */
#endif
#if _FS_SHARE
UINT lockid; /* File lock ID (index of file semaphore table) */
#endif
#if !_FS_TINY
BYTE buf[_MAX_SS]; /* File data read/write buffer */
#endif
} FIL;
/* Directory object structure (DIR) */
typedef struct {
FATFS* fs; /* Pointer to the owner file system object */
WORD id; /* Owner file system mount ID */
WORD index; /* Current read/write index number */
DWORD sclust; /* Table start cluster (0:Root dir) */
DWORD clust; /* Current cluster */
DWORD sect; /* Current sector */
BYTE* dir; /* Pointer to the current SFN entry in the win[] */
BYTE* fn; /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
#if _USE_LFN
WCHAR* lfn; /* Pointer to the LFN working buffer */
WORD lfn_idx; /* Last matched LFN index number (0xFFFF:No LFN) */
#endif
} DIR;
/* File status structure (FILINFO) */
typedef struct {
DWORD fsize; /* File size */
WORD fdate; /* Last modified date */
WORD ftime; /* Last modified time */
BYTE fattrib; /* Attribute */
TCHAR fname[13]; /* Short file name (8.3 format) */
#if _USE_LFN
TCHAR* lfname; /* Pointer to the LFN buffer */
UINT lfsize; /* Size of LFN buffer in TCHAR */
#endif
} FILINFO;
/* File function return code (FRESULT) */
typedef enum {
FR_OK = 0, // (0) Succeeded
FR_DISK_ERR, // (1) A hard error occured in the low level disk I/O layer
FR_INT_ERR, // (2) Assertion failed
FR_NOT_READY, // (3) The physical drive cannot work
FR_NO_FILE, // (4) Could not find the file
FR_NO_PATH, // (5) Could not find the path
FR_INVALID_NAME, // (6) The path name format is invalid
FR_DENIED, // (7) Acces denied due to prohibited access or directory full
FR_EXIST, // (8) Acces denied due to prohibited access
FR_INVALID_OBJECT, // (9) The file/directory object is invalid
FR_WRITE_PROTECTED, // (10) The physical drive is write protected
FR_INVALID_DRIVE, // (11) The logical drive number is invalid
FR_NOT_ENABLED, // (12) The volume has no work area
FR_NO_FILESYSTEM, // (13) There is no valid FAT volume on the physical drive
FR_MKFS_ABORTED, // (14) The f_mkfs() aborted due to any parameter error
FR_TIMEOUT, // (15) Could not get a grant to access the volume within defined period
FR_LOCKED, // (16) The operation is rejected according to the file shareing policy
FR_NOT_ENOUGH_CORE, // (17) LFN working buffer could not be allocated
FR_TOO_MANY_OPEN_FILES // (18) Number of open files > _FS_SHARE
} FRESULT;
/*--------------------------------------------------------------*/
/* FatFs module application interface */
FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */
FRESULT f_open (FIL*, const TCHAR*, BYTE); /* Open or create a file */
FRESULT f_read (FIL*, BYTE*, UINT, UINT*); /* Read data from a file */
FRESULT f_lseek (FIL*, DWORD); /* Move file pointer of a file object */
FRESULT f_close (FIL*); /* Close an open file object */
FRESULT f_opendir (DIR*, const TCHAR*); /* Open an existing directory */
FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */
FRESULT f_stat (const TCHAR*, FILINFO*); /* Get file status */
#if !_FS_READONLY
FRESULT f_write (FIL*, const BYTE *, UINT, UINT*); /* Write data to a file */
FRESULT f_getfree (const TCHAR*, DWORD*, FATFS**); /* Get number of free clusters on the drive */
FRESULT f_truncate (FIL*); /* Truncate file */
FRESULT f_sync (FIL*); /* Flush cached data of a writing file */
FRESULT f_unlink (const TCHAR*); /* Delete an existing file or directory */
FRESULT f_mkdir (const TCHAR*); /* Create a new directory */
FRESULT f_chmod (const TCHAR*, BYTE, BYTE); /* Change attriburte of the file/dir */
FRESULT f_utime (const TCHAR*, const FILINFO*); /* Change timestamp of the file/dir */
FRESULT f_rename (const TCHAR *oldf, const TCHAR *newf); /* Rename/Move a file or directory */
#endif
#if _USE_FORWARD
FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*); /* Forward data to the stream */
#endif
#if _USE_MKFS
FRESULT f_mkfs (BYTE, BYTE, UINT); /* Create a file system on the drive */
#endif
#if _FS_RPATH
FRESULT f_chdrive (BYTE); /* Change current drive */
FRESULT f_chdir (const TCHAR*); /* Change current directory */
FRESULT f_getcwd (TCHAR*, UINT); /* Get current directory */
#endif
#if _USE_STRFUNC
int f_putc (TCHAR, FIL*); /* Put a character to the file */
int f_puts (const TCHAR*, FIL*); /* Put a string to the file */
int f_printf (FIL*, const TCHAR*, ...); /* Put a formatted string to the file */
TCHAR* f_gets (TCHAR*, int, FIL*); /* Get a string from the file */
#ifndef EOF
#define EOF (-1)
#endif
#endif
#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0)
#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0)
#define f_tell(fp) ((fp)->fptr)
#define f_size(fp) ((fp)->fsize)
/*--------------------------------------------------------------*/
/* Additional user defined functions */
/* RTC function */
#if !_FS_READONLY
extern uint32_t o9x_get_fattime (void); /* Returns 32-bit packed date and time */
#endif
/* Unicode support functions */
#if _USE_LFN /* Unicode - OEM code conversion */
WCHAR ff_convert (WCHAR, UINT); /* OEM-Unicode bidirectional conversion */
WCHAR ff_wtoupper (WCHAR); /* Unicode upper-case conversion */
#if _USE_LFN == 3 /* Memory functions */
void* ff_memalloc (UINT); /* Allocate memory block */
void ff_memfree (void*); /* Free memory block */
#endif
#endif
/* Sync functions */
#if _FS_REENTRANT
int ff_cre_syncobj (BYTE, _SYNC_t*);/* Create a sync object */
int ff_del_syncobj (_SYNC_t); /* Delete a sync object */
int ff_req_grant (_SYNC_t); /* Lock sync object */
void ff_rel_grant (_SYNC_t); /* Unlock sync object */
#endif
/*--------------------------------------------------------------*/
/* Flags and offset address */
/* File access control and file status flags (FIL.flag) */
#define FA_READ 0x01
#define FA_OPEN_EXISTING 0x00
#define FA__ERROR 0x80
#if !_FS_READONLY
#define FA_WRITE 0x02
#define FA_CREATE_NEW 0x04
#define FA_CREATE_ALWAYS 0x08
#define FA_OPEN_ALWAYS 0x10
#define FA__WRITTEN 0x20
#define FA__DIRTY 0x40
#endif
/* FAT sub type (FATFS.fs_type) */
#define FS_FAT12 1
#define FS_FAT16 2
#define FS_FAT32 3
/* File attribute bits for directory entry */
#define AM_RDO 0x01 /* Read only */
#define AM_HID 0x02 /* Hidden */
#define AM_SYS 0x04 /* System */
#define AM_VOL 0x08 /* Volume label */
#define AM_LFN 0x0F /* LFN entry */
#define AM_DIR 0x10 /* Directory */
#define AM_ARC 0x20 /* Archive */
#define AM_MASK 0x3F /* Mask of defined bits */
/* Fast seek function */
#define CREATE_LINKMAP 0xFFFFFFFF
/*--------------------------------*/
/* Multi-byte word access macros */
#if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */
#define LD_WORD(ptr) (WORD)(*(WORD*)(BYTE*)(ptr))
#define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr))
#define ST_WORD(ptr,val) *(WORD*)(BYTE*)(ptr)=(WORD)(val)
#define ST_DWORD(ptr,val) *(DWORD*)(BYTE*)(ptr)=(DWORD)(val)
#else /* Use byte-by-byte access to the FAT structure */
#define LD_WORD(ptr) (WORD)(((WORD)*(BYTE*)((ptr)+1)<<8)|(WORD)*(BYTE*)(ptr))
#define LD_DWORD(ptr) (DWORD)(((DWORD)*(BYTE*)((ptr)+3)<<24)|((DWORD)*(BYTE*)((ptr)+2)<<16)|((WORD)*(BYTE*)((ptr)+1)<<8)|*(BYTE*)(ptr))
#define ST_WORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8)
#define ST_DWORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24)
#endif
#ifdef __cplusplus
}
#endif
#endif /* _FATFS */
+231
View File
@@ -0,0 +1,231 @@
/*
* Authors (alphabetical order)
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Jean-Pierre Parisy
* - Karl Szmutny <shadow@privy.de>
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* open9x is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/*---------------------------------------------------------------------------/
/ FatFs - FAT file system module configuration file R0.08a (C)ChaN, 2010
/----------------------------------------------------------------------------/
/
/ CAUTION! Do not forget to make clean the project after any changes to
/ the configuration options.
/
/----------------------------------------------------------------------------*/
#ifndef _FFCONF
#define _FFCONF 8255 /* Revision ID */
/*---------------------------------------------------------------------------/
/ Function and Buffer Configurations
/----------------------------------------------------------------------------*/
#define _FS_TINY 1 /* 0:Normal or 1:Tiny */
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
/ object instead of the sector buffer in the individual file object for file
/ data transfer. This reduces memory consumption 512 bytes each file object. */
#ifdef BOOT
#define _FS_READONLY 1 /* 0:Read/Write or 1:Read only */
#else
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
#endif
/* Setting _FS_READONLY to 1 defines read only configuration. This removes
/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename,
/ f_truncate and useless f_getfree. */
#ifdef BOOT
#define _FS_MINIMIZE 1 /* 0 to 3 */
#else
#define _FS_MINIMIZE 0 /* 0 to 3 */
#endif
/* The _FS_MINIMIZE option defines minimization level to remove some functions.
/
/ 0: Full function.
/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename
/ are removed.
/ 2: f_opendir and f_readdir are removed in addition to 1.
/ 3: f_lseek is removed in addition to 2. */
#ifdef BOOT
#define _USE_STRFUNC 0 /* 0:Disable or 1/2:Enable */
#else
#define _USE_STRFUNC 1 /* 0:Disable or 1/2:Enable */
#endif
/* To enable string functions, set _USE_STRFUNC to 1 or 2. */
#define _USE_MKFS 1 /* 0:Disable or 1:Enable */
/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */
#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */
/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */
#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */
/* To enable fast seek feature, set _USE_FASTSEEK to 1. */
/*---------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/----------------------------------------------------------------------------*/
#define _CODE_PAGE 437
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/
/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows)
/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows)
/ 949 - Korean (DBCS, OEM, Windows)
/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows)
/ 1250 - Central Europe (Windows)
/ 1251 - Cyrillic (Windows)
/ 1252 - Latin 1 (Windows)
/ 1253 - Greek (Windows)
/ 1254 - Turkish (Windows)
/ 1255 - Hebrew (Windows)
/ 1256 - Arabic (Windows)
/ 1257 - Baltic (Windows)
/ 1258 - Vietnam (OEM, Windows)
/ 437 - U.S. (OEM)
/ 720 - Arabic (OEM)
/ 737 - Greek (OEM)
/ 775 - Baltic (OEM)
/ 850 - Multilingual Latin 1 (OEM)
/ 858 - Multilingual Latin 1 + Euro (OEM)
/ 852 - Latin 2 (OEM)
/ 855 - Cyrillic (OEM)
/ 866 - Russian (OEM)
/ 857 - Turkish (OEM)
/ 862 - Hebrew (OEM)
/ 874 - Thai (OEM, Windows)
/ 1 - ASCII only (Valid for non LFN cfg.)
*/
#define _USE_LFN 2 /* 0 to 3 */
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
/* The _USE_LFN option switches the LFN support.
/
/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect.
/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant.
/ 2: Enable LFN with dynamic working buffer on the STACK.
/ 3: Enable LFN with dynamic working buffer on the HEAP.
/
/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN,
/ Unicode handling functions ff_convert() and ff_wtoupper() must be added
/ to the project. When enable to use heap, memory control functions
/ ff_memalloc() and ff_memfree() must be added to the project. */
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
/* To switch the character code set on FatFs API to Unicode,
/ enable LFN feature and set _LFN_UNICODE to 1. */
#define _FS_RPATH 2 /* 0 to 2 */
/* The _FS_RPATH option configures relative path feature.
/
/ 0: Disable relative path feature and remove related functions.
/ 1: Enable relative path. f_chdrive() and f_chdir() are available.
/ 2: f_getcwd() is available in addition to 1.
/
/ Note that output of the f_readdir fnction is affected by this option. */
/*---------------------------------------------------------------------------/
/ Physical Drive Configurations
/----------------------------------------------------------------------------*/
#define _VOLUMES 1
/* Number of volumes (logical drives) to be used. */
#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */
/* Maximum sector size to be handled.
/ Always set 512 for memory card and hard disk but a larger value may be
/ required for floppy disk (512/1024) and optical disk (512/2048).
/ When _MAX_SS is larger than 512, GET_SECTOR_SIZE command must be implememted
/ to the disk_ioctl function. */
#define _MULTI_PARTITION 0 /* 0:Single partition or 1:Multiple partition */
/* When set to 0, each volume is bound to the same physical drive number and
/ it can mount only first primaly partition. When it is set to 1, each volume
/ is tied to the partitions listed in VolToPart[]. */
#define _USE_ERASE 0 /* 0:Disable or 1:Enable */
/* To enable sector erase feature, set _USE_ERASE to 1. */
/*---------------------------------------------------------------------------/
/ System Configurations
/----------------------------------------------------------------------------*/
#define _WORD_ACCESS 0 /* 0 or 1 */
/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS
/ option defines which access method is used to the word data on the FAT volume.
/
/ 0: Byte-by-byte access.
/ 1: Word access. Do not choose this unless following condition is met.
/
/ When the byte order on the memory is big-endian or address miss-aligned word
/ access results incorrect behavior, the _WORD_ACCESS must be set to 0.
/ If it is not the case, the value can also be set to 1 to improve the
/ performance and code size. */
/* Include a header file here to define sync object types on the O/S */
/* #include <windows.h>, <ucos_ii.h.h>, <semphr.h> or ohters. */
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */
/* The _FS_REENTRANT option switches the reentrancy of the FatFs module.
/
/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect.
/ 1: Enable reentrancy. Also user provided synchronization handlers,
/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj
/ function must be added to the project. */
#define _FS_SHARE 0 /* 0:Disable or >=1:Enable */
/* To enable file shareing feature, set _FS_SHARE to 1 or greater. The value
defines how many files can be opened simultaneously. */
#endif /* _FFCONFIG */
+116
View File
@@ -0,0 +1,116 @@
/*
* Author - Erez Raviv <erezraviv@gmail.com>
*
* Based on th9x -> http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef file_h
#define file_h
#include <inttypes.h>
#include <stdint.h>
extern void init_eeprom( void ) ;
extern uint32_t ee32_check_finished( void ) ;
extern void ee32StoreGeneral( void ) ;
extern void ee32StoreModel( uint8_t modelNumber, uint8_t trim ) ;
extern bool ee32LoadGeneral( void ) ;
extern void ee32LoadModel(uint8_t id) ;
extern void ee32WaitLoadModel(uint8_t id) ;
extern void ee32_delete_model( uint8_t id ) ;
extern bool ee32ModelExists(uint8_t id) ;
extern void ee32_process( void ) ;
extern bool ee32CopyModel( uint8_t dst, uint8_t src ) ;
extern void ee32SwapModels( uint8_t id1, uint8_t id2 ) ;
extern uint32_t ee32_read_512( uint32_t sector, uint8_t *buffer ) ;
struct t_file_entry
{
uint32_t block_no ;
uint32_t sequence_no ;
uint16_t size ;
uint8_t flags ;
} ;
extern struct t_file_entry File_system[] ;
//extern unsigned char ModelNames[][sizeof(g_model.name)+1] ; // Allow for general
//extern EEGeneral g_eeGeneral;
//extern ModelData g_model;
extern uint8_t Spi_tx_buf[] ;
extern uint8_t Spi_rx_buf[] ;
/// fileId of general file
//#define FILE_GENERAL 0
/// convert model number 0..MAX_MODELS-1 int fileId
//#define FILE_MODEL(n) (1+n)
//#define FILE_TMP (1+16)
//bool EeFsOpen();
//int8_t EeFsck();
//void EeFsFormat();
//uint16_t EeFsGetFree();
//#define ERR_NONE 0
//#define ERR_FULL 1
//#define ERR_TMO 2
//class EFile
//{
// uint8_t m_fileId; //index of file in directory = filename
// uint16_t m_pos; //over all filepos
// uint8_t m_currBlk; //current block.id
// uint8_t m_ofs; //offset inside of the current block
// uint8_t m_bRlc; //control byte for run length decoder
// uint8_t m_err; //error reasons
// uint16_t m_stopTime10ms; //maximum point of time for writing
//public:
///remove contents of given file
// static void rm(uint8_t i_fileId);
///swap contents of file1 with them of file2
// static void swap(uint8_t i_fileId1,uint8_t i_fileId2);
///return true if the file with given fileid exists
// static bool exists(uint8_t i_fileId);
///open file for reading, no close necessary
///for writing use writeRlc() or create()
// uint8_t openRd(uint8_t i_fileId);
/// create a new file with given fileId,
/// !!! if this file already exists, then all blocks are reused
/// and all contents will be overwritten.
/// after writing closeTrunc has to be called
// void create(uint8_t i_fileId, uint8_t typ, uint16_t maxTme10ms);
/// close file and truncate the blockchain if to long.
// void closeTrunc();
///open file, write to file and close it.
///If file existed before, then contents is overwritten.
///If file was larger before, then unused blocks are freed
// uint16_t writeRlc(uint8_t i_fileId, uint8_t typ,uint8_t*buf,uint16_t i_len, uint8_t maxTme10ms);
// uint8_t read(uint8_t*buf,uint16_t i_len);
// uint8_t write(uint8_t*buf,uint8_t i_len);
///return size of compressed file without block overhead
// uint16_t size();
///read from opened file and decode rlc-coded data
// uint16_t readRlc(uint8_t*buf,uint16_t i_len);
///deliver current errno, this is reset in open
// uint8_t errno(){return m_err;}
//};
#endif
/*eof*/
+63
View File
@@ -0,0 +1,63 @@
/*
* Authors (alphabetical order)
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Jean-Pierre Parisy
* - Karl Szmutny <shadow@privy.de>
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* open9x is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef g9x_time_h
#define g9x_time_h
#include <inttypes.h>
#include <limits.h>
#undef CHAR_BIT
#define CHAR_BIT 8
typedef long int gtime_t;
struct gtm
{
int8_t tm_sec; /* Seconds. [0-60] (1 leap second) */
int8_t tm_min; /* Minutes. [0-59] */
int8_t tm_hour; /* Hours. [0-23] */
int8_t tm_mday; /* Day. [1-31] */
int8_t tm_mon; /* Month. [0-11] */
int8_t tm_year; /* Year - 1900. Limited to the year 2115. Oh no! :P */
int8_t tm_wday; /* Day of week. [0-6] */
int16_t tm_yday; /* Day of year. [0-365] Needed internally for calculations */
};
extern const unsigned short int __mon_yday[2][13];
extern gtime_t gmktime(struct gtm *tp);
extern gtime_t filltm(gtime_t *t, struct gtm *tp);
#endif
+254
View File
@@ -0,0 +1,254 @@
#ifndef _HAL_
#define _HAL_
/*
* GPIOS
*/
#define RCC_AHB1Periph_GPIOBUTTON (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE)
// Keys
#define PIN_BUTTON_PLUS GPIO_Pin_10 //SW3 PE.10
#define PIN_BUTTON_MINUS GPIO_Pin_11 //SW2 PE.11
#define PIN_BUTTON_ENTER GPIO_Pin_12 //SW1 PE.12
#define PIN_BUTTON_MENU GPIO_Pin_7 //SW4 PD.07
#define PIN_BUTTON_EXIT GPIO_Pin_2 //SW5 PD.02
#define PIN_BUTTON_PAGE GPIO_Pin_3 //SW6 PD.03
// Trims
#define PIN_TRIM1_UP GPIO_Pin_3 //PC.03
#define PIN_TRIM1_DN GPIO_Pin_2 //PC.02
#define PIN_TRIM2_UP GPIO_Pin_1 //PC.01
#define PIN_TRIM2_DN GPIO_Pin_13 //PC.13
#define PIN_TRIM3_UP GPIO_Pin_4 //PE.04
#define PIN_TRIM3_DN GPIO_Pin_3 //PE.03
#define PIN_TRIM4_UP GPIO_Pin_6 //PE.06
#define PIN_TRIM4_DN GPIO_Pin_5 //PE.05
// Switches
#if defined(REV3)
#define PIN_SW_A_L GPIO_Pin_14 //PE.14
#define PIN_SW_B_H GPIO_Pin_3 //PB.03
#define PIN_SW_B_L GPIO_Pin_4 //PB.04
#define PIN_SW_C_H GPIO_Pin_5 //PB.05
#define PIN_SW_C_L GPIO_Pin_6 //PB.06
#define PIN_SW_D_H GPIO_Pin_7 //PB.07
#define PIN_SW_D_L GPIO_Pin_2 //PE.02
#define PIN_SW_E_H GPIO_Pin_0 //PB.00
#define PIN_SW_E_L GPIO_Pin_5 //PA.05
#define PIN_SW_F_H GPIO_Pin_7 //PE.07
#define PIN_SW_F_L GPIO_Pin_1 //PB.01
#define PIN_SW_G_H GPIO_Pin_9 //PE.09
#define PIN_SW_G_L GPIO_Pin_8 //PE.08
#define PIN_SW_H_L GPIO_Pin_13 //PE.13
#else
#define PIN_SW_A_L GPIO_Pin_0 //PE.00
#define PIN_SW_A_H GPIO_Pin_5 //PB.05
#define PIN_SW_B_L GPIO_Pin_2 //PE.02
#define PIN_SW_B_H GPIO_Pin_1 //PE.01
#define PIN_SW_C_L GPIO_Pin_5 //PA.05
#define PIN_SW_C_H GPIO_Pin_15 //PE.15
#define PIN_SW_D_L GPIO_Pin_1 //PB.01
#define PIN_SW_D_H GPIO_Pin_7 //PE.07
#define PIN_SW_E_L GPIO_Pin_4 //PB.04
#define PIN_SW_E_H GPIO_Pin_3 //PB.03
#define PIN_SW_F GPIO_Pin_14 //PE.14
#define PIN_SW_G_L GPIO_Pin_8 //PE.08
#define PIN_SW_G_H GPIO_Pin_9 //PE.09
#define PIN_SW_H GPIO_Pin_13 //PE.13
#endif
// ADC
#define PIN_STK_J1 GPIO_Pin_0 //PA.00
#define PIN_STK_J2 GPIO_Pin_1 //PA.01
#define PIN_STK_J3 GPIO_Pin_2 //PA.02
#define PIN_STK_J4 GPIO_Pin_3 //PA.03
#define PIN_SLD_J1 GPIO_Pin_4 //PC.04
#define PIN_SLD_J2 GPIO_Pin_5 //PC.05
#define PIN_FLP_J1 GPIO_Pin_6 //PA.06
#define PIN_FLP_J2 GPIO_Pin_0 //PB.00
#define PIN_MVOLT GPIO_Pin_0 //PC.00
#define RCC_AHB1Periph_GPIOADC RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC
// DAC
#define PIN_AUDIO_DAC GPIO_Pin_4 //PA.04
// Power_OFF Delay and LED
#define PIN_PWR_LED GPIO_Pin_6 //PC.06
#define PIN_PWR_STATUS GPIO_Pin_1 //PD.01
#define PIN_MCU_PWR GPIO_Pin_0 //PD.00
#define RCC_AHB1Periph_GPIOPWR RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD
#define GPIOPWRLED GPIOC
#define GPIOPWR GPIOD
#define PIN_INT_RF_PWR GPIO_Pin_15
#define PIN_EXT_RF_PWR GPIO_Pin_8
// Smart-Port
#define PIN_SPORT_ON GPIO_Pin_4 //PD.04
#define PIN_SPORT_TX GPIO_Pin_5 //PD.05
#define PIN_SPORT_RX GPIO_Pin_6 //PD.06
// Trainer Port
#define GPIO_TR_INOUT GPIOC
#define PIN_TR_PPM_IN GPIO_Pin_8 //PC.08
#define PIN_TR_PPM_OUT GPIO_Pin_9 //PC.09
#define GPIOTRNDET GPIOA
#define PIN_TRNDET GPIO_Pin_8
// Cppm
#define RCC_AHB1Periph_GPIOCPPM RCC_AHB1Periph_GPIOA
#define RCC_AHB1Periph_GPIO_INTPPM RCC_AHB1Periph_GPIOA
#define PORT_INTPPM PIN_PORTA
#define GPIO_INTPPM GPIOA
#define PIN_INTPPM_OUT GPIO_Pin_10 //PA.10
#define PIN_CPPM_OUT GPIO_Pin_8 //PA.08
#define GPIOCPPM GPIOA
#define GPIO_PinSource_CPPM GPIO_PinSource8
#define PIN_EXTPPM_OUT GPIO_Pin_7 //PA.07
#define PORT_EXTPPM PIN_PORTA
#define GPIO_PinSource_EXTPPM GPIO_PinSource7
// Heart Beat
#define PIN_HEART_BEAT GPIO_Pin_7 //PC.07
// Update UART----RS232 ---UART3
#define PIN_UPDATE_UART_TX GPIO_Pin_10 //PB.10
#define PIN_UPDATE_UART_RX GPIO_Pin_11 //PB.11
// USB_OTG
#define PIN_FS_VBUS GPIO_Pin_9 //PA.09
#define PIN_FS_ID GPIO_Pin_10 //PA.10
#define PIN_FS_DM GPIO_Pin_11 //PA.11
#define PIN_FS_DP GPIO_Pin_12 //PA.12
// BackLight PB8
#define RCC_AHB1Periph_GPIOBL RCC_AHB1Periph_GPIOB
#define GPIO_Pin_BL GPIO_Pin_8 //PB.08
#define GPIOBL GPIOB
#define GPIO_PinSource_BL GPIO_PinSource8
// LCD GPIOD 10-14
#define RCC_AHB1Periph_LCD RCC_AHB1Periph_GPIOD
#define GPIO_LCD GPIOD
#define PIN_LCD_MOSI GPIO_Pin_10 //PD.10
#define PIN_LCD_CLK GPIO_Pin_11 //PD.11
#define PIN_LCD_NCS GPIO_Pin_14 //PD.14
#define PIN_LCD_A0 GPIO_Pin_13 //PD.13
#define PIN_LCD_RST GPIO_Pin_12 //pd12 test //RESET occurs when powered up,but should delay before initialize
// Audio----I2S3
//#define CODEC_I2S_ADDRESS 0x4000380C
#define CODEC_I2S SPI3
#define CODEC_I2S_CLK RCC_APB1Periph_SPI3
#define CODEC_I2S_GPIO_AF GPIO_AF_SPI3
#define CODEC_I2S_IRQ SPI3_IRQn
#define CODEC_I2S_GPIO_CLOCK (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC )//| RCC_AHB1Periph_GPIOE)
#define CODEC_I2S_WS_PIN GPIO_Pin_15 //PA.15
#define CODEC_I2S_SCK_PIN GPIO_Pin_10 //PC.10
#define CODEC_I2S_SD_PIN GPIO_Pin_12 //PC.12
#define CODEC_I2S_MCK_PIN GPIO_Pin_6 //DISABLED
#define CODEC_I2S_WS_PINSRC GPIO_PinSource15
#define CODEC_I2S_SCK_PINSRC GPIO_PinSource10
#define CODEC_I2S_SD_PINSRC GPIO_PinSource12
#define CODEC_I2S_MCK_PINSRC GPIO_PinSource6
#define CODEC_I2S_GPIO GPIOC
#define CODEC_I2S_MCK_GPIO GPIOC
#define CODEC_I2S_WS_GPIO GPIOA
#define CODEC_I2S_MUTE GPIO_Pin_11 //PC.11
//#define CODEC_I2S_FLT GPIO_Pin_ //IIR/FIR
//#define CODEC_I2S_MODE GPIO_Pin_ //Connect to GND=I2S_STANDARD
// Eeprom 5137
#define I2C_EE_GPIO GPIOB
#define I2C_EE_WP_GPIO GPIOB
#define I2C_EE_GPIO_CLK RCC_AHB1Periph_GPIOB
#define I2C_EE_SCL GPIO_Pin_6 //PB6
#define I2C_EE_SDA GPIO_Pin_7 //PB7
#define I2C_EE_WP GPIO_Pin_9 //PB9
// SD---spi2
#define SPI_SD SPI2
#define GPIO_AF_SD GPIO_AF_SPI2
#define RCC_AHB1Periph_GPIO_CS RCC_AHB1Periph_GPIOB
#define GPIO_SPI_SD GPIOB
#define GPIO_Pin_SPI_SD_CS GPIO_Pin_12 //PB.12
#define GPIO_Pin_SPI_SD_SCK GPIO_Pin_13 //PB.13
#define GPIO_Pin_SPI_SD_MISO GPIO_Pin_14 //PB.14
#define GPIO_Pin_SPI_SD_MOSI GPIO_Pin_15 //PB.15
#define GPIO_PinSource_CS GPIO_PinSource12
#define GPIO_PinSource_SCK GPIO_PinSource13
#define GPIO_PinSource_MISO GPIO_PinSource14
#define GPIO_PinSource_MOSI GPIO_PinSource15
#define RCC_APBPeriphClockCmd_SPI_SD RCC_APB1PeriphClockCmd
#define RCC_APBPeriph_SPI_SD RCC_APB1Periph_SPI2
#define RCC_AHBxPeriph_GPIO_WP RCC_AHB1Periph_GPIOD
#define RCC_AHBxPeriph_GPIO_CP RCC_AHB1Periph_GPIOD
#define GPIO_Mode_WP GPIO_Mode_OUT//lock?
#define GPIO_Mode_CP GPIO_Mode_IN //
#define GPIO_Pin_WP GPIO_Pin_8 //PD.08
#define GPIO_Pin_CP GPIO_Pin_9 //PD.09
#define GPIO_CTL_SD GPIOD
// Audio----I2S3-----SPI3
#define CODEC_MCLK_DISABLED
#define CODEC_USE_INT
//#define CODEC_USE_DMA
#define AudioFreq I2S_AudioFreq_44k
// EEPROM and CAT5137
//#define EE_M24C08 /* Support the device: M24C08. */
//#define EE_M24C64_32 /* Support the devices: M24C32 and M24C64 */
#define I2C_Speed 200000
#define I2C_FLASH_PAGESIZE 64
#define I2C_EEPROM_ADDRESS 0xA2
#define I2C_CAT5137_ADDRESS 0x5C //0101110
//#if defined (EE_M24C08)
// #define I2C_FLASH_PAGESIZE (16)
//#elif defined (EE_M24C64_32)
// #define I2C_FLASH_PAGESIZE (32)
//#endif
//#ifdef EE_M24C64_32
// #define EEPROM_HW_ADDRESS 0xA0 /* E0 = E1 = E2 = 0 */
//#elif defined (EE_M24C08)
////#define EEPROM_Block0_ADDRESS 0xA0 /* 000*/
//#define EEPROM_Block1_ADDRESS 0xA2 /* E3 E2 E1= 001 */
////#define EEPROM_Block2_ADDRESS 0xA4 /* 010 */
////#define EEPROM_Block3_ADDRESS 0xA6 /* 011 */
//#endif
//#define USE_CAT5137 /*Support the Volume Control*/
//#ifdef USE_CAT5137
//#define I2C_CAT5137_ADDRESS 0x5C//0101110
//#endif
// SD card----SPI2
// demo uses a command line option to define this (see Makefile):
// #define STM32_SD_USE_DMA
#ifdef STM32_SD_USE_DMA
// #warning "Information only: using DMA"
#pragma message "*** Using DMA ***"
#endif
/* set to 1 to provide a disk_ioctrl function even if not needed by the FatFs */
#define STM32_SD_DISK_IOCTRL_FORCE (0)
#define CARD_SUPPLY_SWITCHABLE (0) //0£¬power on not depend any IO
#define SOCKET_WP_CONNECTED (0)
#define SOCKET_CP_CONNECTED (0)
#define SPI_BaudRatePrescaler_SPI_SD SPI_BaudRatePrescaler_4 // - for SPI1 and full-speed APB2: 60MHz/4 =15MHZ < 20MHZ
// Selectable
// DMA
#define DMA_Channel_SPI_SD_RX DMA1_Channel2
#define DMA_Channel_SPI_SD_TX DMA1_Channel3
#define DMA_FLAG_SPI_SD_TC_RX DMA1_FLAG_TC2
#define DMA_FLAG_SPI_SD_TC_TX DMA1_FLAG_TC3
#endif
+52
View File
@@ -0,0 +1,52 @@
/**
******************************************************************************
* @file Project/ee_drivers/i2c_ee.h
* @author X9D Application Team
* @version V 0.2
* @date 12-JLY-2012
* @brief Header for i2c_ee.c module
******************************************************************************
* @copy
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion ------------------------------------ */
#ifndef __I2C_EE_H
#define __I2C_EE_H
#define EE_CMD_WRITE (0)
#define EE_CMD_READ (1)
//#define I2C_delay() //do { delayUsec(5); } while(0)
#define SCL_H do{I2C_EE_GPIO->BSRRL = I2C_EE_SCL;}while(0)
#define SCL_L do{I2C_EE_GPIO->BSRRH = I2C_EE_SCL;}while(0)
#define SDA_H do{I2C_EE_GPIO->BSRRL = I2C_EE_SDA;}while(0)
#define SDA_L do{I2C_EE_GPIO->BSRRH = I2C_EE_SDA;}while(0)
#define SCL_read (I2C_EE_GPIO->IDR & I2C_EE_SCL)
#define SDA_read (I2C_EE_GPIO->IDR & I2C_EE_SDA)
#define WP_H do{I2C_EE_WP_GPIO->BSRRL = I2C_EE_WP;}while(0)
#define WP_L do{I2C_EE_WP_GPIO->BSRRH = I2C_EE_WP;}while(0)
/* Exported functions ------------------------------------------------------- */
void I2C_EE_Init(void);
void I2C_EE_ByteWrite(uint8_t* pBuffer, uint16_t WriteAddr);
void I2C_EE_PageWrite(uint8_t* pBuffer, uint16_t WriteAddr, uint8_t NumByteToWrite);
void I2C_EE_BufferWrite(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t NumByteToWrite);
void I2C_EE_BufferRead(uint8_t* pBuffer, uint16_t ReadAddr, uint16_t NumByteToRead);
void I2C_EE_WaitEepromStandbyState(void);
void I2C_set_volume( uint8_t volume ) ;
uint8_t I2C_read_volume( void ) ;
#endif /* __I2C_EE_H */
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
+70
View File
@@ -0,0 +1,70 @@
/*
* Authors (alphabetical order)
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Jean-Pierre Parisy
* - Karl Szmutny <shadow@privy.de>
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* open9x is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/*-------------------------------------------*/
/* Integer type definitions for FatFs module */
/*-------------------------------------------*/
#ifndef _INTEGER
#define _INTEGER
#ifdef _WIN32 /* FatFs development platform */
#include <windows.h>
#include <tchar.h>
#else /* Embedded platform */
/* These types must be 16-bit, 32-bit or larger integer */
typedef int INT;
typedef unsigned int UINT;
/* These types must be 8-bit integer */
typedef char CHAR;
typedef unsigned char UCHAR;
typedef unsigned char BYTE;
/* These types must be 16-bit integer */
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types must be 32-bit integer */
typedef long LONG;
typedef unsigned long ULONG;
typedef unsigned long DWORD;
#endif
#endif
+122
View File
@@ -0,0 +1,122 @@
/*
* Author - Mike Blandford
*
* Based on er9x by Erez Raviv <erezraviv@gmail.com>
*
* which was Based on th9x -> http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
// This version for ARM based ERSKY9X board
#ifndef lcd_h
#define lcd_h
#ifdef PCBX9D
#define DISPLAY_W 212
#define DISPLAY_H 64
#endif
#ifdef PCBSKY
#define DISPLAY_W 128
#define DISPLAY_H 64
#endif
#define FW 6
#define FWNUM 5
#define FH 8
/* lcd common flags */
#define INVERS 0x01
#define BLINK 0x02
#define DBLSIZE 0x04
#define CONDENSED 0x08
// putsChnRaw flags
#define MIX_SOURCE 0x10
/* lcd outdez flags */
#define LEADING0 0x10
#define PREC1 0x20
#define PREC2 0x30 /* 4 modes in 2bits! */
#define LEFT 0x40 /* align left */
/* time & telemetry flags */
#define NO_UNIT 0x80
extern uint8_t LcdLock ;
extern uint8_t LcdInputs ;
extern uint8_t Lcd_lastPos;
extern uint8_t DisplayBuf[] ;
extern const uint8_t font_se_extra[] ;
extern const uint8_t font_fr_extra[] ;
extern const uint8_t font_de_extra[] ;
extern const uint8_t font_se_big_extra[] ;
extern const uint8_t font_fr_big_extra[] ;
extern const uint8_t font_de_big_extra[] ;
extern const uint8_t *ExtraFont ;
extern const uint8_t *ExtraBigFont ;
#define PLOT_XOR 0
#define PLOT_BLACK 1
#define PLOT_WHITE 2
extern uint8_t plotType ;
extern void lcd_putc(uint8_t x,uint8_t y,const char c ) ;
extern uint8_t lcd_putcAtt( uint8_t x, uint8_t y, const char c, uint8_t mode ) ;
extern void lcd_putsAttIdx(uint8_t x,uint8_t y,const char * s,uint8_t idx,uint8_t att) ;
extern void lcd_putsnAtt(uint8_t x,uint8_t y,const char * s,uint8_t len,uint8_t mode) ;
extern void lcd_putsn_P(uint8_t x,uint8_t y,const char * s,uint8_t len) ;
extern void lcd_outhex4(uint8_t x,uint8_t y,uint16_t val) ;
extern void lcd_outhex2(uint8_t x,uint8_t y,uint8_t val) ;
extern void lcd_img( uint8_t i_x, uint8_t i_y, const unsigned char *imgdat, uint8_t idx, uint8_t mode ) ;
extern uint8_t lcd_putsAtt( uint8_t x, uint8_t y, const char *s, uint8_t mode ) ;
extern void lcd_puts_Pleft( uint8_t y, const char *s ) ;
extern void lcd_puts_P( uint8_t x, uint8_t y, const char *s ) ;
extern void lcd_outdez( uint8_t x, uint8_t y, int16_t val ) ;
extern void lcd_outdezAtt( uint8_t x, uint8_t y, int16_t val, uint8_t mode ) ;
extern void lcd_outdezNAtt( uint8_t x, uint8_t y, int32_t val, uint8_t mode, int8_t len ) ;
extern void lcd_hbar( uint8_t x, uint8_t y, uint8_t w, uint8_t h, uint8_t percent ) ;
extern void lcd_rect(uint8_t x, uint8_t y, uint8_t w, uint8_t h ) ;
extern void lcd_char_inverse( uint8_t x, uint8_t y, uint8_t w, uint8_t blink ) ;
extern void lcd_plot( uint8_t x, uint8_t y ) ;
extern void lcd_hlineStip( unsigned char x, unsigned char y, signed char w, uint8_t pat ) ;
extern void lcd_hline( uint8_t x, uint8_t y, int8_t w ) ;
extern void lcd_vline( uint8_t x, uint8_t y, int8_t h ) ;
extern void lcd_clear( void ) ;
extern void lcd_init( void ) ;
extern void lcdSetRefVolt(uint8_t val) ;
extern void lcdSendCtl(uint8_t val) ;
extern void refreshDisplay( void ) ;
extern void putsTime(uint8_t x,uint8_t y,int16_t tme,uint8_t att,uint8_t att2) ;
extern void putsVolts(uint8_t x,uint8_t y, uint8_t volts, uint8_t att) ;
extern void putsVBat(uint8_t x,uint8_t y,uint8_t att) ;
#ifdef PCBX9D
extern void backlight_set( uint16_t brightness ) ;
#endif
#define BLINK_ON_PHASE (g_blinkTmr10ms & (1<<6))
#define BLINK_SYNC g_blinkTmr10ms = (3<<5)
#endif
+123
View File
@@ -0,0 +1,123 @@
/****************************************************************************
* Copyright (c) 2012 by Michael Blandford. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
****************************************************************************/
#ifdef PCBX9D
#define PIN_MODE_MASK 0x0003
#define PIN_INPUT 0x0000
#define PIN_OUTPUT 0x0001
#define PIN_PERIPHERAL 0x0002
#define PIN_ANALOG 0x0003
#define PIN_PULL_MASK 0x000C
#define PIN_PULLUP 0x0004
#define PIN_NO_PULLUP 0x0000
#define PIN_PULLDOWN 0x0008
#define PIN_NO_PULLDOWN 0x0000
#define PIN_NO_PULL 0x0000
#define PIN_PERI_MASK 0x00F0
//#define PIN_PERI_MASK_H 0x0020
#define PIN_PER_0 0x0000
#define PIN_PER_1 0x0010
#define PIN_PER_2 0x0020
#define PIN_PER_3 0x0030
#define PIN_PER_4 0x0040
#define PIN_PER_5 0x0050
#define PIN_PER_6 0x0060
#define PIN_PER_7 0x0070
#define PIN_PER_8 0x0080
#define PIN_PER_9 0x0090
#define PIN_PER_10 0x00A0
#define PIN_PER_11 0x00B0
#define PIN_PER_12 0x00C0
#define PIN_PER_13 0x00D0
#define PIN_PER_14 0x00E0
#define PIN_PER_15 0x00F0
#define PIN_PORT_MASK 0x0700
#define PIN_PORTA 0x0000
#define PIN_PORTB 0x0100
#define PIN_PORTC 0x0200
#define PIN_PORTD 0x0300
#define PIN_PORTE 0x0400
#define PIN_LOW 0x0000
#define PIN_HIGH 0x1000
#define PIN_SPEED_MASK 0x6000
#define PIN_OS2 0x0000
#define PIN_OS25 0x2000
#define PIN_OS50 0x4000
#define PIN_OS100 0x6000
#define PIN_PUSHPULL 0x0000
#define PIN_ODRAIN 0x8000
#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */
#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */
#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */
#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */
#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */
#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */
#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */
#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */
#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
#endif
#ifdef PCBSKY
#define PIN_ENABLE 0x001
#define PIN_PERIPHERAL 0x000
#define PIN_INPUT 0x002
#define PIN_OUTPUT 0x000
#define PIN_PULLUP 0x004
#define PIN_NO_PULLUP 0x000
#define PIN_PULLDOWN 0x008
#define PIN_NO_PULLDOWN 0x000
#define PIN_PERI_MASK_L 0x010
#define PIN_PERI_MASK_H 0x020
#define PIN_PER_A 0x000
#define PIN_PER_B 0x010
#define PIN_PER_C 0x020
#define PIN_PER_D 0x030
#define PIN_PORT_MASK 0x0C0
#define PIN_PORTA 0x000
#define PIN_PORTB 0x040
#define PIN_PORTC 0x080
#define PIN_LOW 0x000
#define PIN_HIGH 0x100
#endif
extern void configure_pins( uint32_t pins, uint16_t config ) ;
extern void init_keys( void ) ;
extern uint32_t read_keys( void ) ;
extern uint32_t read_trims( void ) ;
extern uint32_t keyState( enum EnumKeys enuk) ;
extern void init_trims( void ) ;
extern void setup_switches( void ) ;
extern void config_free_pins( void ) ;
#define GPIO_ResetBits( port, bits ) (port->BSRRH = bits)
#define GPIO_SetBits( port, bits ) (port->BSRRL = bits)
#define GPIO_ReadInputDataBit( port, bit) ( (port->IDR & bit) ? Bit_SET : Bit_RESET)
#ifdef PCBX9D
uint32_t switchPosition( uint32_t swtch ) ;
#endif
+178
View File
@@ -0,0 +1,178 @@
/**
******************************************************************************
* @file misc.h
* @author MCD Application Team
* @version V1.1.2
* @date 05-March-2012
* @brief This file contains all the functions prototypes for the miscellaneous
* firmware library functions (add-on to CMSIS functions).
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MISC_H
#define __MISC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx.h"
/** @addtogroup STM32F2xx_StdPeriph_Driver
* @{
*/
/** @addtogroup MISC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief NVIC Init Structure definition
*/
typedef struct
{
uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
This parameter can be an enumerator of @ref IRQn_Type
enumeration (For the complete STM32 Devices IRQ Channels
list, please refer to stm32f2xx.h file) */
uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
specified in NVIC_IRQChannel. This parameter can be a value
between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
A lower priority value indicates a higher priority */
uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
in NVIC_IRQChannel. This parameter can be a value
between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
A lower priority value indicates a higher priority */
FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
will be enabled or disabled.
This parameter can be set either to ENABLE or DISABLE */
} NVIC_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup MISC_Exported_Constants
* @{
*/
/** @defgroup MISC_Vector_Table_Base
* @{
*/
#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
((VECTTAB) == NVIC_VectTab_FLASH))
/**
* @}
*/
/** @defgroup MISC_System_Low_Power
* @{
*/
#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
((LP) == NVIC_LP_SLEEPDEEP) || \
((LP) == NVIC_LP_SLEEPONEXIT))
/**
* @}
*/
/** @defgroup MISC_Preemption_Priority_Group
* @{
*/
#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
4 bits for subpriority */
#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
3 bits for subpriority */
#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
2 bits for subpriority */
#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
1 bits for subpriority */
#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
0 bits for subpriority */
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
((GROUP) == NVIC_PriorityGroup_1) || \
((GROUP) == NVIC_PriorityGroup_2) || \
((GROUP) == NVIC_PriorityGroup_3) || \
((GROUP) == NVIC_PriorityGroup_4))
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
/**
* @}
*/
/** @defgroup MISC_SysTick_clock_source
* @{
*/
#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
((SOURCE) == SysTick_CLKSource_HCLK_Div8))
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
#ifdef __cplusplus
}
#endif
#endif /* __MISC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+527
View File
@@ -0,0 +1,527 @@
/*
* Author - Erez Raviv <erezraviv@gmail.com>
*
* Based on th9x -> http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef eeprom_h
#define eeprom_h
#include <inttypes.h>
//eeprom data
//#define EE_VERSION 2
#define MAX_MODELS 32
#define MAX_MIXERS 32
#define MAX_SKYMIXERS 48
#define MAX_CURVE5 8
#define MAX_CURVE9 8
#define MDVERS_r9 1
#define MDVERS_r14 2
#define MDVERS_r22 3
#define MDVERS_r77 4
#define MDVERS_r85 5
#define MDVERS_r261 6
#define MDVERS_r352 7
#define MDVERS_r365 8
#define MDVERS_r668 9
#define MDVERS_e119 10
#define MDVERS 11
#define MDSKYVERS 2
#define NUM_VOICE 8
//OBSOLETE - USE ONLY MDVERS NOW
//#define GENERAL_MYVER_r261 3
//#define GENERAL_MYVER_r365 4
//#define GENERAL_MYVER 5
// eeprom ver <9 => mdvers == 1
// eeprom ver >9 => mdvers ==2
#define WARN_THR_BIT 0x01
#define WARN_BEP_BIT 0x80
#define WARN_SW_BIT 0x02
#define WARN_MEM_BIT 0x04
#define WARN_BVAL_BIT 0x38
#define WARN_THR (!(g_eeGeneral.warnOpts & WARN_THR_BIT))
#define WARN_BEP (!(g_eeGeneral.warnOpts & WARN_BEP_BIT))
#define WARN_SW (!(g_eeGeneral.warnOpts & WARN_SW_BIT))
#define WARN_MEM (!(g_eeGeneral.warnOpts & WARN_MEM_BIT))
#define BEEP_VAL ( (g_eeGeneral.warnOpts & WARN_BVAL_BIT) >>3 )
// Bits in stickGain
#define STICK_LV_GAIN 0x40
#define STICK_LH_GAIN 0x10
#define STICK_RV_GAIN 0x04
#define STICK_RH_GAIN 0x01
#define GENERAL_OWNER_NAME_LEN 10
#define MODEL_NAME_LEN 10
#define MAX_GVARS 7
#define MAX_PHASES 6
#ifndef PACK
#define PACK( __Declaration__ ) __Declaration__ __attribute__((__packed__))
#endif
PACK(typedef struct t_TrainerMix {
uint8_t srcChn:3; //0-7 = ch1-8
int8_t swtch:5;
int8_t studWeight:6;
uint8_t mode:2; //off,add-mode,subst-mode
}) TrainerMix; //
PACK(typedef struct t_TrainerData {
int16_t calib[4];
TrainerMix mix[4];
}) TrainerData;
PACK(typedef struct t_EEGeneral {
uint8_t myVers;
int16_t calibMid[7];
int16_t calibSpanNeg[7];
int16_t calibSpanPos[7];
uint16_t chkSum;
uint8_t currModel; //0..15
uint8_t contrast;
uint8_t vBatWarn;
int8_t vBatCalib;
int8_t lightSw;
TrainerData trainer;
uint8_t view;
uint8_t disableThrottleWarning:1;
uint8_t disableSwitchWarning:1;
uint8_t disableMemoryWarning:1;
uint8_t beeperVal:3;
uint8_t reserveWarning:1;
uint8_t disableAlarmWarning:1;
uint8_t stickMode;
int8_t inactivityTimer;
uint8_t throttleReversed:1;
uint8_t minuteBeep:1;
uint8_t preBeep:1;
uint8_t flashBeep:1;
uint8_t disableSplashScreen:1;
uint8_t disablePotScroll:1;
uint8_t stickScroll:1 ;
uint8_t frskyinternalalarm:1;
uint8_t filterInput;
uint8_t lightAutoOff;
uint8_t templateSetup; //RETA order according to chout_ar array
int8_t PPM_Multiplier;
uint8_t FRSkyYellow:4;
uint8_t FRSkyOrange:4;
uint8_t FRSkyRed:4; //mike please check these are correct
uint8_t hideNameOnSplash:1;
uint8_t optrexDisplay:1;
uint8_t unexpectedShutdown:1;
uint8_t spare:1;
uint8_t speakerPitch;
uint8_t hapticStrength;
uint8_t speakerMode;
uint8_t lightOnStickMove;
char ownerName[GENERAL_OWNER_NAME_LEN];
uint8_t switchWarningStates;
uint8_t volume ;
uint8_t bright ; // backlight
uint8_t stickGain;
uint8_t mAh_alarm ;
uint16_t mAh_used ;
uint16_t run_time ;
int8_t current_calib ;
uint8_t bt_baudrate ;
uint8_t rotaryDivisor ;
uint8_t crosstrim:1;
uint8_t spare9:7;
int8_t rtcCal ;
int16_t x9dcalibMid ; // X9D
int16_t x9dcalibSpanNeg ; // X9D
int16_t x9dcalibSpanPos ; // X9D
uint8_t stickReverse ;
uint8_t language ;
}) EEGeneral;
//eeprom modelspec
//expo[3][2][2] //[Norm/Dr][expo/weight][R/L]
PACK(typedef struct t_ExpoData {
int8_t expo[3][2][2];
int8_t drSw1;
int8_t drSw2;
}) ExpoData;
PACK(typedef struct t_LimitData {
int8_t min;
int8_t max;
bool revert;
int16_t offset;
}) LimitData;
#define MLTPX_ADD 0
#define MLTPX_MUL 1
#define MLTPX_REP 2
PACK(typedef struct t_MixData {
uint8_t destCh; // 1..NUM_CHNOUT
uint8_t srcRaw; //
int8_t weight;
int8_t swtch;
uint8_t curve; //0=symmetrisch 1=no neg 2=no pos
uint8_t delayUp:4;
uint8_t delayDown:4;
uint8_t speedUp:4; // Servogeschwindigkeit aus Tabelle (10ms Cycle)
uint8_t speedDown:4; // 0 nichts
uint8_t carryTrim:1;
uint8_t mltpx:3; // multiplex method 0=+ 1=* 2=replace
uint8_t mixWarn:2; // mixer warning
uint8_t enableFmTrim:1;
uint8_t mixres:1;
int8_t sOffset;
int8_t res;
}) MixData;
PACK(typedef struct t_CSwData { // Custom Switches data
int8_t v1; //input
int8_t v2; //offset
uint8_t func:4;
uint8_t andsw:4;
}) CSwData;
PACK(typedef struct t_SafetySwData { // Custom Switches data
union opt
{
struct ss
{
int8_t swtch:6;
uint8_t mode:2;
int8_t val;
} ss ;
struct vs
{
uint8_t vswtch:5 ;
uint8_t vmode:3 ; // ON, OFF, BOTH, 15Secs, 30Secs, 60Secs, Varibl
uint8_t vval;
} vs ;
} opt ;
}) SafetySwData;
PACK(typedef struct t_FrSkyChannelData {
uint8_t ratio; // 0.0 means not used, 0.1V steps EG. 6.6 Volts = 66. 25.1V = 251, etc.
uint8_t alarms_value[2]; // 0.1V steps EG. 6.6 Volts = 66. 25.1V = 251, etc.
uint8_t alarms_level:4;
uint8_t alarms_greater:2; // 0=LT(<), 1=GT(>)
uint8_t type:2; // 0=volts, 1=raw, 2=volts*2, 3=Amps
}) FrSkyChannelData;
PACK(typedef struct t_FrSkyData {
FrSkyChannelData channels[2];
}) FrSkyData;
PACK(typedef struct t_FrSkyalarms
{
uint8_t frskyAlarmType ;
uint8_t frskyAlarmLimit ;
uint8_t frskyAlarmSound ;
}) FrSkyAlData;
PACK(typedef struct t_FrSkyAlarmData {
FrSkyAlData alarmData[8] ;
}) FrSkyAlarmData;
PACK(typedef struct t_TimerMode
{
uint8_t tmrModeA:7 ; // timer trigger source -> off, abs, stk, stk%, cx%
uint8_t tmrDir:1 ; // Timer direction
int8_t tmrModeB ; // timer trigger source -> !sw, none, sw, m_sw
uint16_t tmrVal ;
}) TimerMode ;
//PACK(typedef struct t_swVoice {
// uint8_t swtch:5 ;
// uint8_t mode:3 ; // ON, OFF, BOTH, 15Secs, 30Secs, 60Secs
// uint8_t val ;
//}) old_voiceSwData ;
PACK(typedef struct t_ModelData {
char name[MODEL_NAME_LEN]; // 10 must be first for eeLoadModelName
uint8_t modelVoice ; // Index to model name voice (261+value)
uint8_t RxNum ; // was timer trigger source, now RxNum for model match
uint8_t sparex:1; // was tmrDir, now use tmrVal>0 => count down
uint8_t traineron:1; // 0 disable trainer, 1 allow trainer
uint8_t spare22:1 ; // Start timer2 using throttle
uint8_t FrSkyUsrProto:1 ; // Protocol in FrSky User Data, 0=FrSky Hub, 1=WS HowHigh
uint8_t FrSkyGpsAlt:1 ; // Use Gps Altitude as main altitude reading
uint8_t FrSkyImperial:1 ; // Convert FrSky values to imperial units
uint8_t FrSkyAltAlarm:2;
uint8_t version ;
uint8_t spare_u8 ; // Was timerval
uint8_t protocol;
int8_t ppmNCH;
uint8_t thrTrim:1; // Enable Throttle Trim
uint8_t numBlades:2; // RPM scaling
uint8_t spare10:1;
uint8_t thrExpo:1; // Enable Throttle Expo
uint8_t spare11:3;
int8_t trimInc; // Trim Increments
int8_t ppmDelay;
int8_t trimSw;
uint8_t beepANACenter; // 1<<0->A1.. 1<<6->A7
uint8_t pulsePol:1;
uint8_t extendedLimits:1;
uint8_t swashInvertELE:1;
uint8_t swashInvertAIL:1;
uint8_t swashInvertCOL:1;
uint8_t swashType:3;
uint8_t swashCollectiveSource;
uint8_t swashRingValue;
int8_t ppmFrameLength; //0=22.5 (10msec-30msec) 0.5msec increments
MixData mixData[MAX_MIXERS];
LimitData limitData[NUM_CHNOUT];
ExpoData expoData[4];
int8_t trim[4];
int8_t curves5[MAX_CURVE5][5];
int8_t curves9[MAX_CURVE9][9];
CSwData customSw[NUM_CSW];
// uint8_t rxnum;
uint8_t frSkyVoltThreshold ;
uint8_t bt_telemetry;
uint8_t numVoice; // 0-16, rest are Safety switches
SafetySwData safetySw[NUM_CHNOUT];
FrSkyData frsky;
TimerMode timer[2] ;
FrSkyAlarmData frskyAlarms ;
// Add 6 bytes for custom telemetry screen
uint8_t customDisplayIndex[6] ;
}) ModelData;
#define TOTAL_EEPROM_USAGE (sizeof(ModelData)*MAX_MODELS + sizeof(EEGeneral))
extern EEGeneral g_eeGeneral;
extern ModelData g_oldmodel;
PACK(typedef struct t_PhaseData {
int16_t trim[4]; // -500..500 => trim value, 501 => use trim of phase 0, 502, 503, 504 => use trim of phases 1|2|3|4 instead
int8_t swtch; // swtch of phase[0] is not used
char name[6];
uint8_t fadeIn:4;
uint8_t fadeOut:4;
uint16_t spare ; // Future expansion
}) PhaseData;
PACK(typedef struct te_MixData {
uint8_t destCh; // 1..NUM_CHNOUT
uint8_t srcRaw; //
int8_t weight;
int8_t swtch;
int8_t curve; //0=symmetrisch 1=no neg 2=no pos
uint8_t delayUp;
uint8_t delayDown;
uint8_t speedUp; // Servogeschwindigkeit aus Tabelle (10ms Cycle)
uint8_t speedDown; // 0 nichts
uint8_t carryTrim:1;
uint8_t mltpx:2; // multiplex method 0=+ 1=* 2=replace
uint8_t lateOffset:1; // Add offset later
uint8_t mixWarn:2; // mixer warning
uint8_t enableFmTrim:1;
uint8_t differential:1 ;
int8_t sOffset;
uint8_t res[4];
}) SKYMixData;
PACK(typedef struct te_CSwData { // Custom Switches data
int8_t v1; //input
int8_t v2; //offset
uint8_t func;
int8_t andsw;
uint8_t res ;
}) SKYCSwData;
PACK(typedef struct te_SafetySwData { // Safety Switches data
union opt
{
struct ss
{
int8_t swtch ;
uint8_t mode ;
int8_t val ;
uint8_t res ;
} ss ;
struct vs
{
uint8_t vswtch ;
uint8_t vmode ; // ON, OFF, BOTH, 15Secs, 30Secs, 60Secs, Varibl
uint8_t vval;
uint8_t vres ;
} vs ;
} opt ;
}) SKYSafetySwData;
PACK(typedef struct te_FrSkyChannelData {
uint8_t ratio ; // 0.0 means not used, 0.1V steps EG. 6.6 Volts = 66. 25.1V = 251, etc.
uint8_t offset ; //
uint8_t gain ; //
uint8_t alarms_value[2] ; // 0.1V steps EG. 6.6 Volts = 66. 25.1V = 251, etc.
uint8_t alarms_level ;
uint8_t alarms_greater ; // 0=LT(<), 1=GT(>)
uint8_t type ; // 0=volts, 1=raw, 2=volts*2, 3=Amps
}) SKYFrSkyChannelData;
PACK(typedef struct te_FrSkyData {
SKYFrSkyChannelData channels[2];
}) SKYFrSkyData;
PACK(typedef struct te_swVoice {
uint8_t swtch ;
uint8_t mode ; // ON, OFF, BOTH, 15Secs, 30Secs, 60Secs
uint8_t val ;
uint8_t vres ;
}) voiceSwData ;
PACK(typedef struct t_FunctionData { // Function data
int8_t swtch ; //input
uint8_t func ;
uint8_t param[6] ;
uint8_t spare1 ;
uint8_t spare2 ;
}) FunctionData;
PACK(typedef struct t_Vario
{
uint8_t varioSource ;
int8_t swtch ;
uint8_t sinkTones:1 ;
uint8_t spare:1 ;
uint8_t param:6 ;
}) VarioData ;
PACK(typedef struct t_gvar {
int8_t gvar ;
uint8_t gvsource ;
// int8_t gvswitch ;
}) GvarData ;
PACK(typedef struct te_ModelData {
char name[MODEL_NAME_LEN]; // 10 must be first for eeLoadModelName
uint8_t modelVoice ; // Index to model name voice (261+value)
uint8_t RxNum ; // was timer trigger source, now RxNum for model match
uint8_t telemetryRxInvert:1 ; // was tmrDir, now use tmrVal>0 => count down
uint8_t traineron:1; // 0 disable trainer, 1 allow trainer
uint8_t spare15:1 ;
uint8_t FrSkyUsrProto:1 ; // Protocol in FrSky User Data, 0=FrSky Hub, 1=WS HowHigh
uint8_t FrSkyGpsAlt:1 ; // Use Gps Altitude as main altitude reading
uint8_t FrSkyImperial:1 ; // Convert FrSky values to imperial units
uint8_t FrSkyAltAlarm:2;
uint8_t modelVersion ;
uint8_t protocol:4 ;
uint8_t country:2 ;
uint8_t sub_protocol:2 ;
int8_t ppmNCH;
uint8_t thrTrim:1; // Enable Throttle Trim
uint8_t xnumBlades:2; // RPM scaling, now elsewhere as uint8_t
uint8_t extendedTrims:1; // Only applies to phases
uint8_t thrExpo:1; // Enable Throttle Expo
uint8_t frskyComPort:1;
uint8_t spare11:2;
int8_t trimInc; // Trim Increments
int8_t ppmDelay;
int8_t trimSw;
uint8_t beepANACenter; // 1<<0->A1.. 1<<6->A7
uint8_t pulsePol:1;
uint8_t extendedLimits:1;
uint8_t swashInvertELE:1;
uint8_t swashInvertAIL:1;
uint8_t swashInvertCOL:1;
uint8_t swashType:3;
uint8_t swashCollectiveSource;
uint8_t swashRingValue;
int8_t ppmFrameLength; //0=22.5 (10msec-30msec) 0.5msec increments
SKYMixData mixData[MAX_SKYMIXERS];
LimitData limitData[NUM_SKYCHNOUT];
ExpoData expoData[4];
int8_t trim[4];
int8_t curves5[MAX_CURVE5][5];
int8_t curves9[MAX_CURVE9][9];
int8_t curvexy[18];
SKYCSwData customSw[NUM_SKYCSW];
// uint8_t rxnum;
uint8_t frSkyVoltThreshold ;
uint8_t bt_telemetry;
uint8_t numVoice; // 0-16, rest are Safety switches
SKYSafetySwData safetySw[NUM_SKYCHNOUT];
voiceSwData voiceSwitches[NUM_VOICE] ;
SKYFrSkyData frsky;
TimerMode timer[2] ;
FrSkyAlarmData frskyAlarms ;
// Add 6 bytes for custom telemetry screen
uint8_t customDisplayIndex[6] ;
FunctionData functionData[NUM_FSW];
PhaseData phaseData[MAX_PHASES] ;
GvarData gvars[MAX_GVARS] ;
uint8_t numBlades ; // RPM scaling
uint8_t startChannel ; // for main output 0 = ch1
uint8_t startPPM2channel ; // for PPM2 output 0 follow
int8_t ppm2NCH ;
uint8_t sub_trim_limit ;
uint8_t FASoffset ; // 0.0 to 1.5
VarioData varioData ;
uint8_t anaVolume ; // analog volume control
int8_t pxxFailsafe[16] ;
int8_t logSwitch ;
uint8_t logRate ;
// X9D ext module
uint8_t xprotocol:4 ;
uint8_t xcountry:2 ;
uint8_t xsub_protocol:2 ;
int8_t xppmNCH ;
int8_t xppmDelay ;
uint8_t xpulsePol ;
int8_t xppmFrameLength; //0=22.5 (10msec-30msec) 0.5msec increments
uint8_t xstartChannel ; // for output 0 = ch1
uint8_t pxxRxNum ;
int8_t dsmMode ;
uint8_t xPxxRxNum ; // For external module
uint16_t modelswitchWarningStates ; // Enough bits for Taranis
int8_t enRssiOrange:2 ;
int8_t rssiOrange:6 ;
uint8_t enRssiRed:2 ;
int8_t rssiRed:6 ;
// uint8_t spare24:6 ;
// uint8_t curentSource ;
// uint8_t altSource ;
}) SKYModelData;
extern SKYModelData g_model;
#endif
/*eof*/
+64
View File
@@ -0,0 +1,64 @@
#include <stdint.h>
#ifdef PCBSKY
#define wdt_reset() (WDT->WDT_CR = 0xA5000001)
#endif
#ifdef PCBX9D
#define wdt_reset() (IWDG->KR = 0x0000AAAAL)
#endif
#define POWER_OFF 0
#define POWER_ON 1
#define DIM(arr) (sizeof((arr))/sizeof((arr)[0]))
#define BITMASK(bit) (1<<(bit))
#define _MSK_KEY_REPT 0x40
#define _MSK_KEY_DBL 0x10
#define IS_KEY_BREAK(key) (((key)&0xf0) == 0x20)
#define EVT_KEY_BREAK(key) ((key)| 0x20)
#define EVT_KEY_FIRST(key) ((key)| _MSK_KEY_REPT|0x20)
#define EVT_KEY_REPT(key) ((key)| _MSK_KEY_REPT )
#define EVT_KEY_LONG(key) ((key)|0x80)
#define EVT_KEY_DBL(key) ((key)|_MSK_KEY_DBL)
//#define EVT_KEY_DBL(key) ((key)|0x10)
#define EVT_ENTRY (0xff - _MSK_KEY_REPT)
#define EVT_ENTRY_UP (0xfe - _MSK_KEY_REPT)
#define EVT_KEY_MASK 0x0f
#define NUM_KEYS 6
#ifdef PCBSKY
enum EnumKeys {
KEY_MENU ,
KEY_EXIT ,
KEY_DOWN ,
KEY_UP ,
KEY_RIGHT ,
KEY_LEFT
} ;
#endif
#ifdef PCBX9D
enum EnumKeys {
KEY_MENU ,
KEY_EXIT ,
KEY_ENTER ,
KEY_PAGE ,
KEY_PLUS ,
KEY_MINUS
} ;
#endif
extern void init_SDcard( void ) ;
extern unsigned long Master_frequency ;
extern void init_soft_power( void ) ;
extern uint32_t check_soft_power( void ) ;
extern void soft_power_off( void ) ;
+71
View File
@@ -0,0 +1,71 @@
/*
* Authors (alphabetical order)
* - Andre Bernet <bernet.andre@gmail.com>
* - Andreas Weitl
* - Bertrand Songis <bsongis@gmail.com>
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
* - Cameron Weeks <th9xer@gmail.com>
* - Erez Raviv
* - Gabriel Birkus
* - Jean-Pierre Parisy
* - Karl Szmutny
* - Michael Blandford
* - Michal Hlavinka
* - Pat Mackenzie
* - Philip Moss
* - Rob Thomson
* - Romolo Manfredini <romolo.manfredini@gmail.com>
* - Thomas Husterer
*
* opentx is based on code named
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
* and the original (and ongoing) project by
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef RTC_H
#define RTC_H
#include <inttypes.h>
typedef long int gtime_t;
struct gtm
{
int8_t tm_sec; /* Seconds. [0-60] (1 leap second) */
int8_t tm_min; /* Minutes. [0-59] */
int8_t tm_hour; /* Hours. [0-23] */
int8_t tm_mday; /* Day. [1-31] */
int8_t tm_mon; /* Month. [0-11] */
int8_t tm_year; /* Year - 1900. Limited to the year 2115. Oh no! :P */
int8_t tm_wday; /* Day of week. [0-6] */
int16_t tm_yday; /* Day of year. [0-365] Needed internally for calculations */
};
extern gtime_t g_rtcTime;
extern uint8_t g_ms100; // global to allow time set function to reset to zero
void rtcInit();
#ifdef __cplusplus
extern "C" {
#endif
void rtcSetTime(struct gtm * tm);
void gettime(struct gtm * tm);
gtime_t gmktime (struct gtm *tm);
#ifdef __cplusplus
}
#endif
#endif
File diff suppressed because it is too large Load Diff
+340
View File
@@ -0,0 +1,340 @@
/**
******************************************************************************
* @file stm32f2xx_flash.h
* @author MCD Application Team
* @version V1.1.2
* @date 05-March-2012
* @brief This file contains all the functions prototypes for the FLASH
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F2xx_FLASH_H
#define __STM32F2xx_FLASH_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx.h"
/** @addtogroup STM32F2xx_StdPeriph_Driver
* @{
*/
/** @addtogroup FLASH
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief FLASH Status
*/
typedef enum
{
FLASH_BUSY = 1,
FLASH_ERROR_PGS,
FLASH_ERROR_PGP,
FLASH_ERROR_PGA,
FLASH_ERROR_WRP,
FLASH_ERROR_PROGRAM,
FLASH_ERROR_OPERATION,
FLASH_COMPLETE
}FLASH_Status;
/* Exported constants --------------------------------------------------------*/
/** @defgroup FLASH_Exported_Constants
* @{
*/
/** @defgroup Flash_Latency
* @{
*/
#define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
#define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
#define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
#define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
#define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
#define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
#define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
#define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
((LATENCY) == FLASH_Latency_1) || \
((LATENCY) == FLASH_Latency_2) || \
((LATENCY) == FLASH_Latency_3) || \
((LATENCY) == FLASH_Latency_4) || \
((LATENCY) == FLASH_Latency_5) || \
((LATENCY) == FLASH_Latency_6) || \
((LATENCY) == FLASH_Latency_7))
/**
* @}
*/
/** @defgroup FLASH_Voltage_Range
* @{
*/
#define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
#define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */
#define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */
#define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */
#define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \
((RANGE) == VoltageRange_2) || \
((RANGE) == VoltageRange_3) || \
((RANGE) == VoltageRange_4))
/**
* @}
*/
/** @defgroup FLASH_Sectors
* @{
*/
#define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
#define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
#define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
#define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
#define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
#define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
#define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
#define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
#define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
#define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
#define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
#define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_Sector_0) || ((SECTOR) == FLASH_Sector_1) ||\
((SECTOR) == FLASH_Sector_2) || ((SECTOR) == FLASH_Sector_3) ||\
((SECTOR) == FLASH_Sector_4) || ((SECTOR) == FLASH_Sector_5) ||\
((SECTOR) == FLASH_Sector_6) || ((SECTOR) == FLASH_Sector_7) ||\
((SECTOR) == FLASH_Sector_8) || ((SECTOR) == FLASH_Sector_9) ||\
((SECTOR) == FLASH_Sector_10) || ((SECTOR) == FLASH_Sector_11))
#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) ||\
(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) < 0x1FFF7A0F)))
/**
* @}
*/
/** @defgroup Option_Bytes_Write_Protection
* @{
*/
#define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
#define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
#define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
#define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
#define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
#define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
#define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
#define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
#define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
#define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
#define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
#define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
#define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
#define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
/**
* @}
*/
/** @defgroup FLASH_Option_Bytes_Read_Protection
* @{
*/
#define OB_RDP_Level_0 ((uint8_t)0xAA)
#define OB_RDP_Level_1 ((uint8_t)0x55)
/*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2
it's no more possible to go back to level 1 or 0 */
#define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
((LEVEL) == OB_RDP_Level_1))/*||\
((LEVEL) == OB_RDP_Level_2))*/
/**
* @}
*/
/** @defgroup FLASH_Option_Bytes_IWatchdog
* @{
*/
#define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
/**
* @}
*/
/** @defgroup FLASH_Option_Bytes_nRST_STOP
* @{
*/
#define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
/**
* @}
*/
/** @defgroup FLASH_Option_Bytes_nRST_STDBY
* @{
*/
#define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
/**
* @}
*/
/** @defgroup FLASH_BOR_Reset_Level
* @{
*/
#define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
#define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
#define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
#define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
#define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
/**
* @}
*/
/** @defgroup FLASH_Interrupts
* @{
*/
#define FLASH_IT_EOP ((uint32_t)0x01000000) /*!< End of FLASH Operation Interrupt source */
#define FLASH_IT_ERR ((uint32_t)0x02000000) /*!< Error Interrupt source */
#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000))
/**
* @}
*/
/** @defgroup FLASH_Flags
* @{
*/
#define FLASH_FLAG_EOP ((uint32_t)0x00000001) /*!< FLASH End of Operation flag */
#define FLASH_FLAG_OPERR ((uint32_t)0x00000002) /*!< FLASH operation Error flag */
#define FLASH_FLAG_WRPERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
#define FLASH_FLAG_PGAERR ((uint32_t)0x00000020) /*!< FLASH Programming Alignment error flag */
#define FLASH_FLAG_PGPERR ((uint32_t)0x00000040) /*!< FLASH Programming Parallelism error flag */
#define FLASH_FLAG_PGSERR ((uint32_t)0x00000080) /*!< FLASH Programming Sequence error flag */
#define FLASH_FLAG_BSY ((uint32_t)0x00010000) /*!< FLASH Busy flag */
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF0C) == 0x00000000) && ((FLAG) != 0x00000000))
#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \
((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \
((FLAG) == FLASH_FLAG_BSY))
/**
* @}
*/
/** @defgroup FLASH_Program_Parallelism
* @{
*/
#define FLASH_PSIZE_BYTE ((uint32_t)0x00000000)
#define FLASH_PSIZE_HALF_WORD ((uint32_t)0x00000100)
#define FLASH_PSIZE_WORD ((uint32_t)0x00000200)
#define FLASH_PSIZE_DOUBLE_WORD ((uint32_t)0x00000300)
#define CR_PSIZE_MASK ((uint32_t)0xFFFFFCFF)
/**
* @}
*/
/** @defgroup FLASH_Keys
* @{
*/
#define RDP_KEY ((uint16_t)0x00A5)
#define FLASH_KEY1 ((uint32_t)0x45670123)
#define FLASH_KEY2 ((uint32_t)0xCDEF89AB)
#define FLASH_OPT_KEY1 ((uint32_t)0x08192A3B)
#define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7F)
/**
* @}
*/
/**
* @brief ACR register byte 0 (Bits[8:0]) base address
*/
#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00)
/**
* @brief OPTCR register byte 3 (Bits[24:16]) base address
*/
#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/* FLASH Interface configuration functions ************************************/
void FLASH_SetLatency(uint32_t FLASH_Latency);
void FLASH_PrefetchBufferCmd(FunctionalState NewState);
void FLASH_InstructionCacheCmd(FunctionalState NewState);
void FLASH_DataCacheCmd(FunctionalState NewState);
void FLASH_InstructionCacheReset(void);
void FLASH_DataCacheReset(void);
/* FLASH Memory Programming functions *****************************************/
void FLASH_Unlock(void);
void FLASH_Lock(void);
FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange);
FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange);
FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data);
FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data);
/* Option Bytes Programming functions *****************************************/
void FLASH_OB_Unlock(void);
void FLASH_OB_Lock(void);
void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
void FLASH_OB_RDPConfig(uint8_t OB_RDP);
void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
void FLASH_OB_BORConfig(uint8_t OB_BOR);
FLASH_Status FLASH_OB_Launch(void);
uint8_t FLASH_OB_GetUser(void);
uint16_t FLASH_OB_GetWRP(void);
FlagStatus FLASH_OB_GetRDP(void);
uint8_t FLASH_OB_GetBOR(void);
/* Interrupts and flags management functions **********************************/
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
void FLASH_ClearFlag(uint32_t FLASH_FLAG);
FLASH_Status FLASH_GetStatus(void);
FLASH_Status FLASH_WaitForLastOperation(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F2xx_FLASH_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+411
View File
@@ -0,0 +1,411 @@
/**
******************************************************************************
* @file stm32f2xx_gpio.h
* @author MCD Application Team
* @version V1.1.2
* @date 05-March-2012
* @brief This file contains all the functions prototypes for the GPIO firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F2xx_GPIO_H
#define __STM32F2xx_GPIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx.h"
/** @addtogroup STM32F2xx_StdPeriph_Driver
* @{
*/
/** @addtogroup GPIO
* @{
*/
/* Exported types ------------------------------------------------------------*/
#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
((PERIPH) == GPIOB) || \
((PERIPH) == GPIOC) || \
((PERIPH) == GPIOD) || \
((PERIPH) == GPIOE) || \
((PERIPH) == GPIOF) || \
((PERIPH) == GPIOG) || \
((PERIPH) == GPIOH) || \
((PERIPH) == GPIOI))
/**
* @brief GPIO Configuration Mode enumeration
*/
typedef enum
{
GPIO_Mode_IN = 0x00, /*!< GPIO Input Mode */
GPIO_Mode_OUT = 0x01, /*!< GPIO Output Mode */
GPIO_Mode_AF = 0x02, /*!< GPIO Alternate function Mode */
GPIO_Mode_AN = 0x03 /*!< GPIO Analog Mode */
}GPIOMode_TypeDef;
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN) || ((MODE) == GPIO_Mode_OUT) || \
((MODE) == GPIO_Mode_AF)|| ((MODE) == GPIO_Mode_AN))
/**
* @brief GPIO Output type enumeration
*/
typedef enum
{
GPIO_OType_PP = 0x00,
GPIO_OType_OD = 0x01
}GPIOOType_TypeDef;
#define IS_GPIO_OTYPE(OTYPE) (((OTYPE) == GPIO_OType_PP) || ((OTYPE) == GPIO_OType_OD))
/**
* @brief GPIO Output Maximum frequency enumeration
*/
typedef enum
{
GPIO_Speed_2MHz = 0x00, /*!< Low speed */
GPIO_Speed_25MHz = 0x01, /*!< Medium speed */
GPIO_Speed_50MHz = 0x02, /*!< Fast speed */
GPIO_Speed_100MHz = 0x03 /*!< High speed on 30 pF (80 MHz Output max speed on 15 pF) */
}GPIOSpeed_TypeDef;
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_2MHz) || ((SPEED) == GPIO_Speed_25MHz) || \
((SPEED) == GPIO_Speed_50MHz)|| ((SPEED) == GPIO_Speed_100MHz))
/**
* @brief GPIO Configuration PullUp PullDown enumeration
*/
typedef enum
{
GPIO_PuPd_NOPULL = 0x00,
GPIO_PuPd_UP = 0x01,
GPIO_PuPd_DOWN = 0x02
}GPIOPuPd_TypeDef;
#define IS_GPIO_PUPD(PUPD) (((PUPD) == GPIO_PuPd_NOPULL) || ((PUPD) == GPIO_PuPd_UP) || \
((PUPD) == GPIO_PuPd_DOWN))
/**
* @brief GPIO Bit SET and Bit RESET enumeration
*/
typedef enum
{
Bit_RESET = 0,
Bit_SET
}BitAction;
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
/**
* @brief GPIO Init structure definition
*/
typedef struct
{
uint32_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
This parameter can be any value of @ref GPIO_pins_define */
GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
This parameter can be a value of @ref GPIOMode_TypeDef */
GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
This parameter can be a value of @ref GPIOSpeed_TypeDef */
GPIOOType_TypeDef GPIO_OType; /*!< Specifies the operating output type for the selected pins.
This parameter can be a value of @ref GPIOOType_TypeDef */
GPIOPuPd_TypeDef GPIO_PuPd; /*!< Specifies the operating Pull-up/Pull down for the selected pins.
This parameter can be a value of @ref GPIOPuPd_TypeDef */
}GPIO_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup GPIO_Exported_Constants
* @{
*/
/** @defgroup GPIO_pins_define
* @{
*/
#define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */
#define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */
#define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */
#define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */
#define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */
#define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */
#define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */
#define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */
#define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */
#define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */
#define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */
#define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */
#define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */
#define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */
#define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */
#define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */
#define GPIO_Pin_All ((uint16_t)0xFFFF) /* All pins selected */
#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
((PIN) == GPIO_Pin_1) || \
((PIN) == GPIO_Pin_2) || \
((PIN) == GPIO_Pin_3) || \
((PIN) == GPIO_Pin_4) || \
((PIN) == GPIO_Pin_5) || \
((PIN) == GPIO_Pin_6) || \
((PIN) == GPIO_Pin_7) || \
((PIN) == GPIO_Pin_8) || \
((PIN) == GPIO_Pin_9) || \
((PIN) == GPIO_Pin_10) || \
((PIN) == GPIO_Pin_11) || \
((PIN) == GPIO_Pin_12) || \
((PIN) == GPIO_Pin_13) || \
((PIN) == GPIO_Pin_14) || \
((PIN) == GPIO_Pin_15))
/**
* @}
*/
/** @defgroup GPIO_Pin_sources
* @{
*/
#define GPIO_PinSource0 ((uint8_t)0x00)
#define GPIO_PinSource1 ((uint8_t)0x01)
#define GPIO_PinSource2 ((uint8_t)0x02)
#define GPIO_PinSource3 ((uint8_t)0x03)
#define GPIO_PinSource4 ((uint8_t)0x04)
#define GPIO_PinSource5 ((uint8_t)0x05)
#define GPIO_PinSource6 ((uint8_t)0x06)
#define GPIO_PinSource7 ((uint8_t)0x07)
#define GPIO_PinSource8 ((uint8_t)0x08)
#define GPIO_PinSource9 ((uint8_t)0x09)
#define GPIO_PinSource10 ((uint8_t)0x0A)
#define GPIO_PinSource11 ((uint8_t)0x0B)
#define GPIO_PinSource12 ((uint8_t)0x0C)
#define GPIO_PinSource13 ((uint8_t)0x0D)
#define GPIO_PinSource14 ((uint8_t)0x0E)
#define GPIO_PinSource15 ((uint8_t)0x0F)
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
((PINSOURCE) == GPIO_PinSource1) || \
((PINSOURCE) == GPIO_PinSource2) || \
((PINSOURCE) == GPIO_PinSource3) || \
((PINSOURCE) == GPIO_PinSource4) || \
((PINSOURCE) == GPIO_PinSource5) || \
((PINSOURCE) == GPIO_PinSource6) || \
((PINSOURCE) == GPIO_PinSource7) || \
((PINSOURCE) == GPIO_PinSource8) || \
((PINSOURCE) == GPIO_PinSource9) || \
((PINSOURCE) == GPIO_PinSource10) || \
((PINSOURCE) == GPIO_PinSource11) || \
((PINSOURCE) == GPIO_PinSource12) || \
((PINSOURCE) == GPIO_PinSource13) || \
((PINSOURCE) == GPIO_PinSource14) || \
((PINSOURCE) == GPIO_PinSource15))
/**
* @}
*/
/** @defgroup GPIO_Alternat_function_selection_define
* @{
*/
/**
* @brief AF 0 selection
*/
#define GPIO_AF_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
#define GPIO_AF_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
#define GPIO_AF_TAMPER ((uint8_t)0x00) /* TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping */
#define GPIO_AF_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
#define GPIO_AF_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
/**
* @brief AF 1 selection
*/
#define GPIO_AF_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
#define GPIO_AF_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
/**
* @brief AF 2 selection
*/
#define GPIO_AF_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
#define GPIO_AF_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
#define GPIO_AF_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
/**
* @brief AF 3 selection
*/
#define GPIO_AF_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
#define GPIO_AF_TIM9 ((uint8_t)0x03) /* TIM9 Alternate Function mapping */
#define GPIO_AF_TIM10 ((uint8_t)0x03) /* TIM10 Alternate Function mapping */
#define GPIO_AF_TIM11 ((uint8_t)0x03) /* TIM11 Alternate Function mapping */
/**
* @brief AF 4 selection
*/
#define GPIO_AF_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
#define GPIO_AF_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
#define GPIO_AF_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
/**
* @brief AF 5 selection
*/
#define GPIO_AF_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
#define GPIO_AF_SPI2 ((uint8_t)0x05) /* SPI2/I2S2 Alternate Function mapping */
/**
* @brief AF 6 selection
*/
#define GPIO_AF_SPI3 ((uint8_t)0x06) /* SPI3/I2S3 Alternate Function mapping */
/**
* @brief AF 7 selection
*/
#define GPIO_AF_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
#define GPIO_AF_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
#define GPIO_AF_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
/**
* @brief AF 8 selection
*/
#define GPIO_AF_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
#define GPIO_AF_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
#define GPIO_AF_USART6 ((uint8_t)0x08) /* USART6 Alternate Function mapping */
/**
* @brief AF 9 selection
*/
#define GPIO_AF_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
#define GPIO_AF_CAN2 ((uint8_t)0x09) /* CAN2 Alternate Function mapping */
#define GPIO_AF_TIM12 ((uint8_t)0x09) /* TIM12 Alternate Function mapping */
#define GPIO_AF_TIM13 ((uint8_t)0x09) /* TIM13 Alternate Function mapping */
#define GPIO_AF_TIM14 ((uint8_t)0x09) /* TIM14 Alternate Function mapping */
/**
* @brief AF 10 selection
*/
#define GPIO_AF_OTG_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */
#define GPIO_AF_OTG_HS ((uint8_t)0xA) /* OTG_HS Alternate Function mapping */
/**
* @brief AF 11 selection
*/
#define GPIO_AF_ETH ((uint8_t)0x0B) /* ETHERNET Alternate Function mapping */
/**
* @brief AF 12 selection
*/
#define GPIO_AF_FSMC ((uint8_t)0xC) /* FSMC Alternate Function mapping */
#define GPIO_AF_OTG_HS_FS ((uint8_t)0xC) /* OTG HS configured in FS, Alternate Function mapping */
#define GPIO_AF_SDIO ((uint8_t)0xC) /* SDIO Alternate Function mapping */
/**
* @brief AF 13 selection
*/
#define GPIO_AF_DCMI ((uint8_t)0x0D) /* DCMI Alternate Function mapping */
/**
* @brief AF 15 selection
*/
#define GPIO_AF_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF_RTC_50Hz) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_MCO) || ((AF) == GPIO_AF_TAMPER) || \
((AF) == GPIO_AF_SWJ) || ((AF) == GPIO_AF_TRACE) || \
((AF) == GPIO_AF_TIM1) || ((AF) == GPIO_AF_TIM2) || \
((AF) == GPIO_AF_TIM3) || ((AF) == GPIO_AF_TIM4) || \
((AF) == GPIO_AF_TIM5) || ((AF) == GPIO_AF_TIM8) || \
((AF) == GPIO_AF_I2C1) || ((AF) == GPIO_AF_I2C2) || \
((AF) == GPIO_AF_I2C3) || ((AF) == GPIO_AF_SPI1) || \
((AF) == GPIO_AF_SPI2) || ((AF) == GPIO_AF_TIM13) || \
((AF) == GPIO_AF_SPI3) || ((AF) == GPIO_AF_TIM14) || \
((AF) == GPIO_AF_USART1) || ((AF) == GPIO_AF_USART2) || \
((AF) == GPIO_AF_USART3) || ((AF) == GPIO_AF_UART4) || \
((AF) == GPIO_AF_UART5) || ((AF) == GPIO_AF_USART6) || \
((AF) == GPIO_AF_CAN1) || ((AF) == GPIO_AF_CAN2) || \
((AF) == GPIO_AF_OTG_FS) || ((AF) == GPIO_AF_OTG_HS) || \
((AF) == GPIO_AF_ETH) || ((AF) == GPIO_AF_FSMC) || \
((AF) == GPIO_AF_OTG_HS_FS) || ((AF) == GPIO_AF_SDIO) || \
((AF) == GPIO_AF_DCMI) || ((AF) == GPIO_AF_EVENTOUT))
/**
* @}
*/
/** @defgroup GPIO_Legacy
* @{
*/
#define GPIO_Mode_AIN GPIO_Mode_AN
#define GPIO_AF_OTG1_FS GPIO_AF_OTG_FS
#define GPIO_AF_OTG2_HS GPIO_AF_OTG_HS
#define GPIO_AF_OTG2_FS GPIO_AF_OTG_HS_FS
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/* Function used to set the GPIO configuration to the default reset state ****/
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
/* Initialization and Configuration functions *********************************/
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
/* GPIO Read and Write functions **********************************************/
//uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
//void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
//void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
/* GPIO Alternate functions configuration function ****************************/
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF);
#ifdef __cplusplus
}
#endif
#endif /*__STM32F2xx_GPIO_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+515
View File
@@ -0,0 +1,515 @@
/**
******************************************************************************
* @file stm32f2xx_rcc.h
* @author MCD Application Team
* @version V1.1.2
* @date 05-March-2012
* @brief This file contains all the functions prototypes for the RCC firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F2xx_RCC_H
#define __STM32F2xx_RCC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx.h"
/** @addtogroup STM32F2xx_StdPeriph_Driver
* @{
*/
/** @addtogroup RCC
* @{
*/
/* Exported types ------------------------------------------------------------*/
typedef struct
{
uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency expressed in Hz */
uint32_t HCLK_Frequency; /*!< HCLK clock frequency expressed in Hz */
uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency expressed in Hz */
uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency expressed in Hz */
}RCC_ClocksTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup RCC_Exported_Constants
* @{
*/
/** @defgroup RCC_HSE_configuration
* @{
*/
#define RCC_HSE_OFF ((uint8_t)0x00)
#define RCC_HSE_ON ((uint8_t)0x01)
#define RCC_HSE_Bypass ((uint8_t)0x05)
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
((HSE) == RCC_HSE_Bypass))
/**
* @}
*/
/** @defgroup RCC_PLL_Clock_Source
* @{
*/
#define RCC_PLLSource_HSI ((uint32_t)0x00000000)
#define RCC_PLLSource_HSE ((uint32_t)0x00400000)
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI) || \
((SOURCE) == RCC_PLLSource_HSE))
#define IS_RCC_PLLM_VALUE(VALUE) ((VALUE) <= 63)
#define IS_RCC_PLLN_VALUE(VALUE) ((192 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLP_VALUE(VALUE) (((VALUE) == 2) || ((VALUE) == 4) || ((VALUE) == 6) || ((VALUE) == 8))
#define IS_RCC_PLLQ_VALUE(VALUE) ((4 <= (VALUE)) && ((VALUE) <= 15))
#define IS_RCC_PLLI2SN_VALUE(VALUE) ((192 <= (VALUE)) && ((VALUE) <= 432))
#define IS_RCC_PLLI2SR_VALUE(VALUE) ((2 <= (VALUE)) && ((VALUE) <= 7))
/**
* @}
*/
/** @defgroup RCC_System_Clock_Source
* @{
*/
#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
((SOURCE) == RCC_SYSCLKSource_HSE) || \
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
/**
* @}
*/
/** @defgroup RCC_AHB_Clock_Source
* @{
*/
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
((HCLK) == RCC_SYSCLK_Div512))
/**
* @}
*/
/** @defgroup RCC_APB1_APB2_Clock_Source
* @{
*/
#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
#define RCC_HCLK_Div2 ((uint32_t)0x00001000)
#define RCC_HCLK_Div4 ((uint32_t)0x00001400)
#define RCC_HCLK_Div8 ((uint32_t)0x00001800)
#define RCC_HCLK_Div16 ((uint32_t)0x00001C00)
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
((PCLK) == RCC_HCLK_Div16))
/**
* @}
*/
/** @defgroup RCC_Interrupt_Source
* @{
*/
#define RCC_IT_LSIRDY ((uint8_t)0x01)
#define RCC_IT_LSERDY ((uint8_t)0x02)
#define RCC_IT_HSIRDY ((uint8_t)0x04)
#define RCC_IT_HSERDY ((uint8_t)0x08)
#define RCC_IT_PLLRDY ((uint8_t)0x10)
#define RCC_IT_PLLI2SRDY ((uint8_t)0x20)
#define RCC_IT_CSS ((uint8_t)0x80)
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xC0) == 0x00) && ((IT) != 0x00))
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
((IT) == RCC_IT_PLLI2SRDY))
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x40) == 0x00) && ((IT) != 0x00))
/**
* @}
*/
/** @defgroup RCC_LSE_Configuration
* @{
*/
#define RCC_LSE_OFF ((uint8_t)0x00)
#define RCC_LSE_ON ((uint8_t)0x01)
#define RCC_LSE_Bypass ((uint8_t)0x04)
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
((LSE) == RCC_LSE_Bypass))
/**
* @}
*/
/** @defgroup RCC_RTC_Clock_Source
* @{
*/
#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
#define RCC_RTCCLKSource_HSE_Div2 ((uint32_t)0x00020300)
#define RCC_RTCCLKSource_HSE_Div3 ((uint32_t)0x00030300)
#define RCC_RTCCLKSource_HSE_Div4 ((uint32_t)0x00040300)
#define RCC_RTCCLKSource_HSE_Div5 ((uint32_t)0x00050300)
#define RCC_RTCCLKSource_HSE_Div6 ((uint32_t)0x00060300)
#define RCC_RTCCLKSource_HSE_Div7 ((uint32_t)0x00070300)
#define RCC_RTCCLKSource_HSE_Div8 ((uint32_t)0x00080300)
#define RCC_RTCCLKSource_HSE_Div9 ((uint32_t)0x00090300)
#define RCC_RTCCLKSource_HSE_Div10 ((uint32_t)0x000A0300)
#define RCC_RTCCLKSource_HSE_Div11 ((uint32_t)0x000B0300)
#define RCC_RTCCLKSource_HSE_Div12 ((uint32_t)0x000C0300)
#define RCC_RTCCLKSource_HSE_Div13 ((uint32_t)0x000D0300)
#define RCC_RTCCLKSource_HSE_Div14 ((uint32_t)0x000E0300)
#define RCC_RTCCLKSource_HSE_Div15 ((uint32_t)0x000F0300)
#define RCC_RTCCLKSource_HSE_Div16 ((uint32_t)0x00100300)
#define RCC_RTCCLKSource_HSE_Div17 ((uint32_t)0x00110300)
#define RCC_RTCCLKSource_HSE_Div18 ((uint32_t)0x00120300)
#define RCC_RTCCLKSource_HSE_Div19 ((uint32_t)0x00130300)
#define RCC_RTCCLKSource_HSE_Div20 ((uint32_t)0x00140300)
#define RCC_RTCCLKSource_HSE_Div21 ((uint32_t)0x00150300)
#define RCC_RTCCLKSource_HSE_Div22 ((uint32_t)0x00160300)
#define RCC_RTCCLKSource_HSE_Div23 ((uint32_t)0x00170300)
#define RCC_RTCCLKSource_HSE_Div24 ((uint32_t)0x00180300)
#define RCC_RTCCLKSource_HSE_Div25 ((uint32_t)0x00190300)
#define RCC_RTCCLKSource_HSE_Div26 ((uint32_t)0x001A0300)
#define RCC_RTCCLKSource_HSE_Div27 ((uint32_t)0x001B0300)
#define RCC_RTCCLKSource_HSE_Div28 ((uint32_t)0x001C0300)
#define RCC_RTCCLKSource_HSE_Div29 ((uint32_t)0x001D0300)
#define RCC_RTCCLKSource_HSE_Div30 ((uint32_t)0x001E0300)
#define RCC_RTCCLKSource_HSE_Div31 ((uint32_t)0x001F0300)
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
((SOURCE) == RCC_RTCCLKSource_LSI) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div2) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div3) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div4) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div5) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div6) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div7) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div8) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div9) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div10) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div11) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div12) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div13) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div14) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div15) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div16) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div17) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div18) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div19) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div20) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div21) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div22) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div23) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div24) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div25) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div26) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div27) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div28) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div29) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div30) || \
((SOURCE) == RCC_RTCCLKSource_HSE_Div31))
/**
* @}
*/
/** @defgroup RCC_I2S_Clock_Source
* @{
*/
#define RCC_I2S2CLKSource_PLLI2S ((uint8_t)0x00)
#define RCC_I2S2CLKSource_Ext ((uint8_t)0x01)
#define IS_RCC_I2SCLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_PLLI2S) || ((SOURCE) == RCC_I2S2CLKSource_Ext))
/**
* @}
*/
/** @defgroup RCC_AHB1_Peripherals
* @{
*/
#define RCC_AHB1Periph_GPIOA ((uint32_t)0x00000001)
#define RCC_AHB1Periph_GPIOB ((uint32_t)0x00000002)
#define RCC_AHB1Periph_GPIOC ((uint32_t)0x00000004)
#define RCC_AHB1Periph_GPIOD ((uint32_t)0x00000008)
#define RCC_AHB1Periph_GPIOE ((uint32_t)0x00000010)
#define RCC_AHB1Periph_GPIOF ((uint32_t)0x00000020)
#define RCC_AHB1Periph_GPIOG ((uint32_t)0x00000040)
#define RCC_AHB1Periph_GPIOH ((uint32_t)0x00000080)
#define RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100)
#define RCC_AHB1Periph_CRC ((uint32_t)0x00001000)
#define RCC_AHB1Periph_FLITF ((uint32_t)0x00008000)
#define RCC_AHB1Periph_SRAM1 ((uint32_t)0x00010000)
#define RCC_AHB1Periph_SRAM2 ((uint32_t)0x00020000)
#define RCC_AHB1Periph_BKPSRAM ((uint32_t)0x00040000)
#define RCC_AHB1Periph_DMA1 ((uint32_t)0x00200000)
#define RCC_AHB1Periph_DMA2 ((uint32_t)0x00400000)
#define RCC_AHB1Periph_ETH_MAC ((uint32_t)0x02000000)
#define RCC_AHB1Periph_ETH_MAC_Tx ((uint32_t)0x04000000)
#define RCC_AHB1Periph_ETH_MAC_Rx ((uint32_t)0x08000000)
#define RCC_AHB1Periph_ETH_MAC_PTP ((uint32_t)0x10000000)
#define RCC_AHB1Periph_OTG_HS ((uint32_t)0x20000000)
#define RCC_AHB1Periph_OTG_HS_ULPI ((uint32_t)0x40000000)
#define IS_RCC_AHB1_CLOCK_PERIPH(PERIPH) ((((PERIPH) & 0x819BEE00) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xDD9FEE00) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_AHB1_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0x81986E00) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
/** @defgroup RCC_AHB2_Peripherals
* @{
*/
#define RCC_AHB2Periph_DCMI ((uint32_t)0x00000001)
#define RCC_AHB2Periph_CRYP ((uint32_t)0x00000010)
#define RCC_AHB2Periph_HASH ((uint32_t)0x00000020)
#define RCC_AHB2Periph_RNG ((uint32_t)0x00000040)
#define RCC_AHB2Periph_OTG_FS ((uint32_t)0x00000080)
#define IS_RCC_AHB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFF0E) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
/** @defgroup RCC_AHB3_Peripherals
* @{
*/
#define RCC_AHB3Periph_FSMC ((uint32_t)0x00000001)
#define IS_RCC_AHB3_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFFE) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
/** @defgroup RCC_APB1_Peripherals
* @{
*/
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
#define RCC_APB1Periph_I2C3 ((uint32_t)0x00800000)
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC9013600) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
/** @defgroup RCC_APB2_Peripherals
* @{
*/
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000001)
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00000002)
#define RCC_APB2Periph_USART1 ((uint32_t)0x00000010)
#define RCC_APB2Periph_USART6 ((uint32_t)0x00000020)
#define RCC_APB2Periph_ADC ((uint32_t)0x00000100)
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000100)
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000200)
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00000400)
#define RCC_APB2Periph_SDIO ((uint32_t)0x00000800)
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
#define RCC_APB2Periph_SYSCFG ((uint32_t)0x00004000)
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00010000)
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00020000)
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00040000)
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A0CC) == 0x00) && ((PERIPH) != 0x00))
#define IS_RCC_APB2_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A6CC) == 0x00) && ((PERIPH) != 0x00))
/**
* @}
*/
/** @defgroup RCC_MCO1_Clock_Source_Prescaler
* @{
*/
#define RCC_MCO1Source_HSI ((uint32_t)0x00000000)
#define RCC_MCO1Source_LSE ((uint32_t)0x00200000)
#define RCC_MCO1Source_HSE ((uint32_t)0x00400000)
#define RCC_MCO1Source_PLLCLK ((uint32_t)0x00600000)
#define RCC_MCO1Div_1 ((uint32_t)0x00000000)
#define RCC_MCO1Div_2 ((uint32_t)0x04000000)
#define RCC_MCO1Div_3 ((uint32_t)0x05000000)
#define RCC_MCO1Div_4 ((uint32_t)0x06000000)
#define RCC_MCO1Div_5 ((uint32_t)0x07000000)
#define IS_RCC_MCO1SOURCE(SOURCE) (((SOURCE) == RCC_MCO1Source_HSI) || ((SOURCE) == RCC_MCO1Source_LSE) || \
((SOURCE) == RCC_MCO1Source_HSE) || ((SOURCE) == RCC_MCO1Source_PLLCLK))
#define IS_RCC_MCO1DIV(DIV) (((DIV) == RCC_MCO1Div_1) || ((DIV) == RCC_MCO1Div_2) || \
((DIV) == RCC_MCO1Div_3) || ((DIV) == RCC_MCO1Div_4) || \
((DIV) == RCC_MCO1Div_5))
/**
* @}
*/
/** @defgroup RCC_MCO2_Clock_Source_Prescaler
* @{
*/
#define RCC_MCO2Source_SYSCLK ((uint32_t)0x00000000)
#define RCC_MCO2Source_PLLI2SCLK ((uint32_t)0x40000000)
#define RCC_MCO2Source_HSE ((uint32_t)0x80000000)
#define RCC_MCO2Source_PLLCLK ((uint32_t)0xC0000000)
#define RCC_MCO2Div_1 ((uint32_t)0x00000000)
#define RCC_MCO2Div_2 ((uint32_t)0x20000000)
#define RCC_MCO2Div_3 ((uint32_t)0x28000000)
#define RCC_MCO2Div_4 ((uint32_t)0x30000000)
#define RCC_MCO2Div_5 ((uint32_t)0x38000000)
#define IS_RCC_MCO2SOURCE(SOURCE) (((SOURCE) == RCC_MCO2Source_SYSCLK) || ((SOURCE) == RCC_MCO2Source_PLLI2SCLK)|| \
((SOURCE) == RCC_MCO2Source_HSE) || ((SOURCE) == RCC_MCO2Source_PLLCLK))
#define IS_RCC_MCO2DIV(DIV) (((DIV) == RCC_MCO2Div_1) || ((DIV) == RCC_MCO2Div_2) || \
((DIV) == RCC_MCO2Div_3) || ((DIV) == RCC_MCO2Div_4) || \
((DIV) == RCC_MCO2Div_5))
/**
* @}
*/
/** @defgroup RCC_Flag
* @{
*/
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
#define RCC_FLAG_PLLI2SRDY ((uint8_t)0x3B)
#define RCC_FLAG_LSERDY ((uint8_t)0x41)
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
#define RCC_FLAG_BORRST ((uint8_t)0x79)
#define RCC_FLAG_PINRST ((uint8_t)0x7A)
#define RCC_FLAG_PORRST ((uint8_t)0x7B)
#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_BORRST) || \
((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \
((FLAG) == RCC_FLAG_PLLI2SRDY))
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/* Function used to set the RCC clock configuration to the default reset state */
void RCC_DeInit(void);
/* Internal/external clocks, PLL, CSS and MCO configuration functions *********/
void RCC_HSEConfig(uint8_t RCC_HSE);
ErrorStatus RCC_WaitForHSEStartUp(void);
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
void RCC_HSICmd(FunctionalState NewState);
void RCC_LSEConfig(uint8_t RCC_LSE);
void RCC_LSICmd(FunctionalState NewState);
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ);
void RCC_PLLCmd(FunctionalState NewState);
void RCC_PLLI2SConfig(uint32_t PLLI2SN, uint32_t PLLI2SR);
void RCC_PLLI2SCmd(FunctionalState NewState);
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div);
void RCC_MCO2Config(uint32_t RCC_MCO2Source, uint32_t RCC_MCO2Div);
/* System, AHB and APB busses clocks configuration functions ******************/
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
uint8_t RCC_GetSYSCLKSource(void);
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
void RCC_PCLK1Config(uint32_t RCC_HCLK);
void RCC_PCLK2Config(uint32_t RCC_HCLK);
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
/* Peripheral clocks configuration functions **********************************/
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
void RCC_RTCCLKCmd(FunctionalState NewState);
void RCC_BackupResetCmd(FunctionalState NewState);
void RCC_I2SCLKConfig(uint32_t RCC_I2SCLKSource);
void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphResetCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphResetCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphResetCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
void RCC_AHB1PeriphClockLPModeCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
void RCC_AHB2PeriphClockLPModeCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
void RCC_AHB3PeriphClockLPModeCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
void RCC_APB1PeriphClockLPModeCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
void RCC_APB2PeriphClockLPModeCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
/* Interrupts and flags management functions **********************************/
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
void RCC_ClearFlag(void);
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
void RCC_ClearITPendingBit(uint8_t RCC_IT);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F2xx_RCC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+650
View File
@@ -0,0 +1,650 @@
/**
******************************************************************************
* @file stm32f2xx_rtc.h
* @author MCD Application Team
* @version V1.1.2
* @date 05-March-2012
* @brief This file contains all the functions prototypes for the RTC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F2xx_RTC_H
#define __STM32F2xx_RTC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
//#include "X9D/stm32f2xx.h"
/** @addtogroup STM32F2xx_StdPeriph_Driver
* @{
*/
/** @addtogroup RTC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief RTC Init structures definition
*/
typedef struct
{
uint32_t RTC_HourFormat; /*!< Specifies the RTC Hour Format.
This parameter can be a value of @ref RTC_Hour_Formats */
uint32_t RTC_AsynchPrediv; /*!< Specifies the RTC Asynchronous Predivider value.
This parameter must be set to a value lower than 0x7F */
uint32_t RTC_SynchPrediv; /*!< Specifies the RTC Synchronous Predivider value.
This parameter must be set to a value lower than 0x1FFF */
}RTC_InitTypeDef;
/**
* @brief RTC Time structure definition
*/
typedef struct
{
uint8_t RTC_Hours; /*!< Specifies the RTC Time Hour.
This parameter must be set to a value in the 0-12 range
if the RTC_HourFormat_12 is selected or 0-23 range if
the RTC_HourFormat_24 is selected. */
uint8_t RTC_Minutes; /*!< Specifies the RTC Time Minutes.
This parameter must be set to a value in the 0-59 range. */
uint8_t RTC_Seconds; /*!< Specifies the RTC Time Seconds.
This parameter must be set to a value in the 0-59 range. */
uint8_t RTC_H12; /*!< Specifies the RTC AM/PM Time.
This parameter can be a value of @ref RTC_AM_PM_Definitions */
}RTC_TimeTypeDef;
/**
* @brief RTC Date structure definition
*/
typedef struct
{
uint8_t RTC_WeekDay; /*!< Specifies the RTC Date WeekDay.
This parameter can be a value of @ref RTC_WeekDay_Definitions */
uint8_t RTC_Month; /*!< Specifies the RTC Date Month (in BCD format).
This parameter can be a value of @ref RTC_Month_Date_Definitions */
uint8_t RTC_Date; /*!< Specifies the RTC Date.
This parameter must be set to a value in the 1-31 range. */
uint8_t RTC_Year; /*!< Specifies the RTC Date Year.
This parameter must be set to a value in the 0-99 range. */
}RTC_DateTypeDef;
/**
* @brief RTC Alarm structure definition
*/
typedef struct
{
RTC_TimeTypeDef RTC_AlarmTime; /*!< Specifies the RTC Alarm Time members. */
uint32_t RTC_AlarmMask; /*!< Specifies the RTC Alarm Masks.
This parameter can be a value of @ref RTC_AlarmMask_Definitions */
uint32_t RTC_AlarmDateWeekDaySel; /*!< Specifies the RTC Alarm is on Date or WeekDay.
This parameter can be a value of @ref RTC_AlarmDateWeekDay_Definitions */
uint8_t RTC_AlarmDateWeekDay; /*!< Specifies the RTC Alarm Date/WeekDay.
If the Alarm Date is selected, this parameter
must be set to a value in the 1-31 range.
If the Alarm WeekDay is selected, this
parameter can be a value of @ref RTC_WeekDay_Definitions */
}RTC_AlarmTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup RTC_Exported_Constants
* @{
*/
/** @defgroup RTC_Hour_Formats
* @{
*/
#define RTC_HourFormat_24 ((uint32_t)0x00000000)
#define RTC_HourFormat_12 ((uint32_t)0x00000040)
#define IS_RTC_HOUR_FORMAT(FORMAT) (((FORMAT) == RTC_HourFormat_12) || \
((FORMAT) == RTC_HourFormat_24))
/**
* @}
*/
/** @defgroup RTC_Asynchronous_Predivider
* @{
*/
#define IS_RTC_ASYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x7F)
/**
* @}
*/
/** @defgroup RTC_Synchronous_Predivider
* @{
*/
#define IS_RTC_SYNCH_PREDIV(PREDIV) ((PREDIV) <= 0x1FFF)
/**
* @}
*/
/** @defgroup RTC_Time_Definitions
* @{
*/
#define IS_RTC_HOUR12(HOUR) (((HOUR) > 0) && ((HOUR) <= 12))
#define IS_RTC_HOUR24(HOUR) ((HOUR) <= 23)
#define IS_RTC_MINUTES(MINUTES) ((MINUTES) <= 59)
#define IS_RTC_SECONDS(SECONDS) ((SECONDS) <= 59)
/**
* @}
*/
/** @defgroup RTC_AM_PM_Definitions
* @{
*/
#define RTC_H12_AM ((uint8_t)0x00)
#define RTC_H12_PM ((uint8_t)0x40)
#define IS_RTC_H12(PM) (((PM) == RTC_H12_AM) || ((PM) == RTC_H12_PM))
/**
* @}
*/
/** @defgroup RTC_Year_Date_Definitions
* @{
*/
#define IS_RTC_YEAR(YEAR) ((YEAR) <= 99)
/**
* @}
*/
/** @defgroup RTC_Month_Date_Definitions
* @{
*/
/* Coded in BCD format */
#define RTC_Month_January ((uint8_t)0x01)
#define RTC_Month_February ((uint8_t)0x02)
#define RTC_Month_March ((uint8_t)0x03)
#define RTC_Month_April ((uint8_t)0x04)
#define RTC_Month_May ((uint8_t)0x05)
#define RTC_Month_June ((uint8_t)0x06)
#define RTC_Month_July ((uint8_t)0x07)
#define RTC_Month_August ((uint8_t)0x08)
#define RTC_Month_September ((uint8_t)0x09)
#define RTC_Month_October ((uint8_t)0x10)
#define RTC_Month_November ((uint8_t)0x11)
#define RTC_Month_December ((uint8_t)0x12)
#define IS_RTC_MONTH(MONTH) (((MONTH) >= 1) && ((MONTH) <= 12))
#define IS_RTC_DATE(DATE) (((DATE) >= 1) && ((DATE) <= 31))
/**
* @}
*/
/** @defgroup RTC_WeekDay_Definitions
* @{
*/
#define RTC_Weekday_Monday ((uint8_t)0x01)
#define RTC_Weekday_Tuesday ((uint8_t)0x02)
#define RTC_Weekday_Wednesday ((uint8_t)0x03)
#define RTC_Weekday_Thursday ((uint8_t)0x04)
#define RTC_Weekday_Friday ((uint8_t)0x05)
#define RTC_Weekday_Saturday ((uint8_t)0x06)
#define RTC_Weekday_Sunday ((uint8_t)0x07)
#define IS_RTC_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
((WEEKDAY) == RTC_Weekday_Tuesday) || \
((WEEKDAY) == RTC_Weekday_Wednesday) || \
((WEEKDAY) == RTC_Weekday_Thursday) || \
((WEEKDAY) == RTC_Weekday_Friday) || \
((WEEKDAY) == RTC_Weekday_Saturday) || \
((WEEKDAY) == RTC_Weekday_Sunday))
/**
* @}
*/
/** @defgroup RTC_Alarm_Definitions
* @{
*/
#define IS_RTC_ALARM_DATE_WEEKDAY_DATE(DATE) (((DATE) > 0) && ((DATE) <= 31))
#define IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(WEEKDAY) (((WEEKDAY) == RTC_Weekday_Monday) || \
((WEEKDAY) == RTC_Weekday_Tuesday) || \
((WEEKDAY) == RTC_Weekday_Wednesday) || \
((WEEKDAY) == RTC_Weekday_Thursday) || \
((WEEKDAY) == RTC_Weekday_Friday) || \
((WEEKDAY) == RTC_Weekday_Saturday) || \
((WEEKDAY) == RTC_Weekday_Sunday))
/**
* @}
*/
/** @defgroup RTC_AlarmDateWeekDay_Definitions
* @{
*/
#define RTC_AlarmDateWeekDaySel_Date ((uint32_t)0x00000000)
#define RTC_AlarmDateWeekDaySel_WeekDay ((uint32_t)0x40000000)
#define IS_RTC_ALARM_DATE_WEEKDAY_SEL(SEL) (((SEL) == RTC_AlarmDateWeekDaySel_Date) || \
((SEL) == RTC_AlarmDateWeekDaySel_WeekDay))
/**
* @}
*/
/** @defgroup RTC_AlarmMask_Definitions
* @{
*/
#define RTC_AlarmMask_None ((uint32_t)0x00000000)
#define RTC_AlarmMask_DateWeekDay ((uint32_t)0x80000000)
#define RTC_AlarmMask_Hours ((uint32_t)0x00800000)
#define RTC_AlarmMask_Minutes ((uint32_t)0x00008000)
#define RTC_AlarmMask_Seconds ((uint32_t)0x00000080)
#define RTC_AlarmMask_All ((uint32_t)0x80808080)
#define IS_ALARM_MASK(MASK) (((MASK) & 0x7F7F7F7F) == (uint32_t)RESET)
/**
* @}
*/
/** @defgroup RTC_Alarms_Definitions
* @{
*/
#define RTC_Alarm_A ((uint32_t)0x00000100)
#define RTC_Alarm_B ((uint32_t)0x00000200)
#define IS_RTC_ALARM(ALARM) (((ALARM) == RTC_Alarm_A) || ((ALARM) == RTC_Alarm_B))
#define IS_RTC_CMD_ALARM(ALARM) (((ALARM) & (RTC_Alarm_A | RTC_Alarm_B)) != (uint32_t)RESET)
/**
* @}
*/
/** @defgroup RTC_Wakeup_Timer_Definitions
* @{
*/
#define RTC_WakeUpClock_RTCCLK_Div16 ((uint32_t)0x00000000)
#define RTC_WakeUpClock_RTCCLK_Div8 ((uint32_t)0x00000001)
#define RTC_WakeUpClock_RTCCLK_Div4 ((uint32_t)0x00000002)
#define RTC_WakeUpClock_RTCCLK_Div2 ((uint32_t)0x00000003)
#define RTC_WakeUpClock_CK_SPRE_16bits ((uint32_t)0x00000004)
#define RTC_WakeUpClock_CK_SPRE_17bits ((uint32_t)0x00000006)
#define IS_RTC_WAKEUP_CLOCK(CLOCK) (((CLOCK) == RTC_WakeUpClock_RTCCLK_Div16) || \
((CLOCK) == RTC_WakeUpClock_RTCCLK_Div8) || \
((CLOCK) == RTC_WakeUpClock_RTCCLK_Div4) || \
((CLOCK) == RTC_WakeUpClock_RTCCLK_Div2) || \
((CLOCK) == RTC_WakeUpClock_CK_SPRE_16bits) || \
((CLOCK) == RTC_WakeUpClock_CK_SPRE_17bits))
#define IS_RTC_WAKEUP_COUNTER(COUNTER) ((COUNTER) <= 0xFFFF)
/**
* @}
*/
/** @defgroup RTC_Time_Stamp_Edges_definitions
* @{
*/
#define RTC_TimeStampEdge_Rising ((uint32_t)0x00000000)
#define RTC_TimeStampEdge_Falling ((uint32_t)0x00000008)
#define IS_RTC_TIMESTAMP_EDGE(EDGE) (((EDGE) == RTC_TimeStampEdge_Rising) || \
((EDGE) == RTC_TimeStampEdge_Falling))
/**
* @}
*/
/** @defgroup RTC_Output_selection_Definitions
* @{
*/
#define RTC_Output_Disable ((uint32_t)0x00000000)
#define RTC_Output_AlarmA ((uint32_t)0x00200000)
#define RTC_Output_AlarmB ((uint32_t)0x00400000)
#define RTC_Output_WakeUp ((uint32_t)0x00600000)
#define IS_RTC_OUTPUT(OUTPUT) (((OUTPUT) == RTC_Output_Disable) || \
((OUTPUT) == RTC_Output_AlarmA) || \
((OUTPUT) == RTC_Output_AlarmB) || \
((OUTPUT) == RTC_Output_WakeUp))
/**
* @}
*/
/** @defgroup RTC_Output_Polarity_Definitions
* @{
*/
#define RTC_OutputPolarity_High ((uint32_t)0x00000000)
#define RTC_OutputPolarity_Low ((uint32_t)0x00100000)
#define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) || \
((POL) == RTC_OutputPolarity_Low))
/**
* @}
*/
/** @defgroup RTC_Digital_Calibration_Definitions
* @{
*/
#define RTC_CalibSign_Positive ((uint32_t)0x00000000)
#define RTC_CalibSign_Negative ((uint32_t)0x00000080)
#define IS_RTC_CALIB_SIGN(SIGN) (((SIGN) == RTC_CalibSign_Positive) || \
((SIGN) == RTC_CalibSign_Negative))
#define IS_RTC_CALIB_VALUE(VALUE) ((VALUE) < 0x20)
/**
* @}
*/
/** @defgroup RTC_DayLightSaving_Definitions
* @{
*/
#define RTC_DayLightSaving_SUB1H ((uint32_t)0x00020000)
#define RTC_DayLightSaving_ADD1H ((uint32_t)0x00010000)
#define IS_RTC_DAYLIGHT_SAVING(SAVE) (((SAVE) == RTC_DayLightSaving_SUB1H) || \
((SAVE) == RTC_DayLightSaving_ADD1H))
#define RTC_StoreOperation_Reset ((uint32_t)0x00000000)
#define RTC_StoreOperation_Set ((uint32_t)0x00040000)
#define IS_RTC_STORE_OPERATION(OPERATION) (((OPERATION) == RTC_StoreOperation_Reset) || \
((OPERATION) == RTC_StoreOperation_Set))
/**
* @}
*/
/** @defgroup RTC_Tamper_Trigger_Definitions
* @{
*/
#define RTC_TamperTrigger_RisingEdge ((uint32_t)0x00000000)
#define RTC_TamperTrigger_FallingEdge ((uint32_t)0x00000001)
#define IS_RTC_TAMPER_TRIGGER(TRIGGER) (((TRIGGER) == RTC_TamperTrigger_RisingEdge) || \
((TRIGGER) == RTC_TamperTrigger_FallingEdge))
/**
* @}
*/
/** @defgroup RTC_Tamper_Pins_Definitions
* @{
*/
#define RTC_Tamper_1 RTC_TAFCR_TAMP1E
#define IS_RTC_TAMPER(TAMPER) (((TAMPER) == RTC_Tamper_1))
/**
* @}
*/
/** @defgroup RTC_Tamper_Pin_Selection
* @{
*/
#define RTC_TamperPin_PC13 ((uint32_t)0x00000000)
#define RTC_TamperPin_PI8 ((uint32_t)0x00010000)
#define IS_RTC_TAMPER_PIN(PIN) (((PIN) == RTC_TamperPin_PC13) || \
((PIN) == RTC_TamperPin_PI8))
/**
* @}
*/
/** @defgroup RTC_TimeStamp_Pin_Selection
* @{
*/
#define RTC_TimeStampPin_PC13 ((uint32_t)0x00000000)
#define RTC_TimeStampPin_PI8 ((uint32_t)0x00020000)
#define IS_RTC_TIMESTAMP_PIN(PIN) (((PIN) == RTC_TimeStampPin_PC13) || \
((PIN) == RTC_TimeStampPin_PI8))
/**
* @}
*/
/** @defgroup RTC_Output_Type_ALARM_OUT
* @{
*/
#define RTC_OutputType_OpenDrain ((uint32_t)0x00000000)
#define RTC_OutputType_PushPull ((uint32_t)0x00040000)
#define IS_RTC_OUTPUT_TYPE(TYPE) (((TYPE) == RTC_OutputType_OpenDrain) || \
((TYPE) == RTC_OutputType_PushPull))
/**
* @}
*/
/** @defgroup RTC_Backup_Registers_Definitions
* @{
*/
#define RTC_BKP_DR0 ((uint32_t)0x00000000)
#define RTC_BKP_DR1 ((uint32_t)0x00000001)
#define RTC_BKP_DR2 ((uint32_t)0x00000002)
#define RTC_BKP_DR3 ((uint32_t)0x00000003)
#define RTC_BKP_DR4 ((uint32_t)0x00000004)
#define RTC_BKP_DR5 ((uint32_t)0x00000005)
#define RTC_BKP_DR6 ((uint32_t)0x00000006)
#define RTC_BKP_DR7 ((uint32_t)0x00000007)
#define RTC_BKP_DR8 ((uint32_t)0x00000008)
#define RTC_BKP_DR9 ((uint32_t)0x00000009)
#define RTC_BKP_DR10 ((uint32_t)0x0000000A)
#define RTC_BKP_DR11 ((uint32_t)0x0000000B)
#define RTC_BKP_DR12 ((uint32_t)0x0000000C)
#define RTC_BKP_DR13 ((uint32_t)0x0000000D)
#define RTC_BKP_DR14 ((uint32_t)0x0000000E)
#define RTC_BKP_DR15 ((uint32_t)0x0000000F)
#define RTC_BKP_DR16 ((uint32_t)0x00000010)
#define RTC_BKP_DR17 ((uint32_t)0x00000011)
#define RTC_BKP_DR18 ((uint32_t)0x00000012)
#define RTC_BKP_DR19 ((uint32_t)0x00000013)
#define IS_RTC_BKP(BKP) (((BKP) == RTC_BKP_DR0) || \
((BKP) == RTC_BKP_DR1) || \
((BKP) == RTC_BKP_DR2) || \
((BKP) == RTC_BKP_DR3) || \
((BKP) == RTC_BKP_DR4) || \
((BKP) == RTC_BKP_DR5) || \
((BKP) == RTC_BKP_DR6) || \
((BKP) == RTC_BKP_DR7) || \
((BKP) == RTC_BKP_DR8) || \
((BKP) == RTC_BKP_DR9) || \
((BKP) == RTC_BKP_DR10) || \
((BKP) == RTC_BKP_DR11) || \
((BKP) == RTC_BKP_DR12) || \
((BKP) == RTC_BKP_DR13) || \
((BKP) == RTC_BKP_DR14) || \
((BKP) == RTC_BKP_DR15) || \
((BKP) == RTC_BKP_DR16) || \
((BKP) == RTC_BKP_DR17) || \
((BKP) == RTC_BKP_DR18) || \
((BKP) == RTC_BKP_DR19))
/**
* @}
*/
/** @defgroup RTC_Input_parameter_format_definitions
* @{
*/
#define RTC_Format_BIN ((uint32_t)0x000000000)
#define RTC_Format_BCD ((uint32_t)0x000000001)
#define IS_RTC_FORMAT(FORMAT) (((FORMAT) == RTC_Format_BIN) || ((FORMAT) == RTC_Format_BCD))
/**
* @}
*/
/** @defgroup RTC_Flags_Definitions
* @{
*/
#define RTC_FLAG_TAMP1F ((uint32_t)0x00002000)
#define RTC_FLAG_TSOVF ((uint32_t)0x00001000)
#define RTC_FLAG_TSF ((uint32_t)0x00000800)
#define RTC_FLAG_WUTF ((uint32_t)0x00000400)
#define RTC_FLAG_ALRBF ((uint32_t)0x00000200)
#define RTC_FLAG_ALRAF ((uint32_t)0x00000100)
#define RTC_FLAG_INITF ((uint32_t)0x00000040)
#define RTC_FLAG_RSF ((uint32_t)0x00000020)
#define RTC_FLAG_INITS ((uint32_t)0x00000010)
#define RTC_FLAG_WUTWF ((uint32_t)0x00000004)
#define RTC_FLAG_ALRBWF ((uint32_t)0x00000002)
#define RTC_FLAG_ALRAWF ((uint32_t)0x00000001)
#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_TSOVF) || ((FLAG) == RTC_FLAG_TSF) || \
((FLAG) == RTC_FLAG_WUTF) || ((FLAG) == RTC_FLAG_ALRBF) || \
((FLAG) == RTC_FLAG_ALRAF) || ((FLAG) == RTC_FLAG_INITF) || \
((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_WUTWF) || \
((FLAG) == RTC_FLAG_ALRBWF) || ((FLAG) == RTC_FLAG_ALRAWF) || \
((FLAG) == RTC_FLAG_TAMP1F))
#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFFC0DF) == (uint32_t)RESET))
/**
* @}
*/
/** @defgroup RTC_Interrupts_Definitions
* @{
*/
#define RTC_IT_TS ((uint32_t)0x00008000)
#define RTC_IT_WUT ((uint32_t)0x00004000)
#define RTC_IT_ALRB ((uint32_t)0x00002000)
#define RTC_IT_ALRA ((uint32_t)0x00001000)
#define RTC_IT_TAMP ((uint32_t)0x00000004) /* Used only to Enable the Tamper Interrupt */
#define RTC_IT_TAMP1 ((uint32_t)0x00020000)
#define IS_RTC_CONFIG_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFF0FFB) == (uint32_t)RESET))
#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_TS) || ((IT) == RTC_IT_WUT) || \
((IT) == RTC_IT_ALRB) || ((IT) == RTC_IT_ALRA) || \
((IT) == RTC_IT_TAMP1))
#define IS_RTC_CLEAR_IT(IT) (((IT) != (uint32_t)RESET) && (((IT) & 0xFFFD0FFF) == (uint32_t)RESET))
/**
* @}
*/
/** @defgroup RTC_Legacy
* @{
*/
#define RTC_DigitalCalibConfig RTC_CoarseCalibConfig
#define RTC_DigitalCalibCmd RTC_CoarseCalibCmd
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/* Function used to set the RTC configuration to the default reset state *****/
ErrorStatus RTC_DeInit(void);
/* Initialization and Configuration functions *********************************/
ErrorStatus RTC_Init(RTC_InitTypeDef* RTC_InitStruct);
void RTC_StructInit(RTC_InitTypeDef* RTC_InitStruct);
void RTC_WriteProtectionCmd(FunctionalState NewState);
ErrorStatus RTC_EnterInitMode(void);
void RTC_ExitInitMode(void);
ErrorStatus RTC_WaitForSynchro(void);
ErrorStatus RTC_RefClockCmd(FunctionalState NewState);
/* Time and Date configuration functions **************************************/
ErrorStatus RTC_SetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
void RTC_TimeStructInit(RTC_TimeTypeDef* RTC_TimeStruct);
void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct);
ErrorStatus RTC_SetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
void RTC_DateStructInit(RTC_DateTypeDef* RTC_DateStruct);
void RTC_GetDate(uint32_t RTC_Format, RTC_DateTypeDef* RTC_DateStruct);
/* Alarms (Alarm A and Alarm B) configuration functions **********************/
void RTC_SetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
void RTC_AlarmStructInit(RTC_AlarmTypeDef* RTC_AlarmStruct);
void RTC_GetAlarm(uint32_t RTC_Format, uint32_t RTC_Alarm, RTC_AlarmTypeDef* RTC_AlarmStruct);
ErrorStatus RTC_AlarmCmd(uint32_t RTC_Alarm, FunctionalState NewState);
/* WakeUp Timer configuration functions ***************************************/
void RTC_WakeUpClockConfig(uint32_t RTC_WakeUpClock);
void RTC_SetWakeUpCounter(uint32_t RTC_WakeUpCounter);
uint32_t RTC_GetWakeUpCounter(void);
ErrorStatus RTC_WakeUpCmd(FunctionalState NewState);
/* Daylight Saving configuration functions ************************************/
void RTC_DayLightSavingConfig(uint32_t RTC_DayLightSaving, uint32_t RTC_StoreOperation);
uint32_t RTC_GetStoreOperation(void);
/* Output pin Configuration function ******************************************/
void RTC_OutputConfig(uint32_t RTC_Output, uint32_t RTC_OutputPolarity);
/* Coarse Calibration configuration functions *********************************/
ErrorStatus RTC_CoarseCalibConfig(uint32_t RTC_CalibSign, uint32_t Value);
ErrorStatus RTC_CoarseCalibCmd(FunctionalState NewState);
void RTC_CalibOutputCmd(FunctionalState NewState);
/* TimeStamp configuration functions ******************************************/
void RTC_TimeStampCmd(uint32_t RTC_TimeStampEdge, FunctionalState NewState);
void RTC_GetTimeStamp(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_StampTimeStruct,
RTC_DateTypeDef* RTC_StampDateStruct);
/* Tampers configuration functions ********************************************/
void RTC_TamperTriggerConfig(uint32_t RTC_Tamper, uint32_t RTC_TamperTrigger);
void RTC_TamperCmd(uint32_t RTC_Tamper, FunctionalState NewState);
/* Backup Data Registers configuration functions ******************************/
void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data);
uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR);
/* RTC Tamper and TimeStamp Pins Selection and Output Type Config configuration
functions ******************************************************************/
void RTC_TamperPinSelection(uint32_t RTC_TamperPin);
void RTC_TimeStampPinSelection(uint32_t RTC_TimeStampPin);
void RTC_OutputTypeConfig(uint32_t RTC_OutputType);
/* Interrupts and flags management functions **********************************/
void RTC_ITConfig(uint32_t RTC_IT, FunctionalState NewState);
FlagStatus RTC_GetFlagStatus(uint32_t RTC_FLAG);
void RTC_ClearFlag(uint32_t RTC_FLAG);
ITStatus RTC_GetITStatus(uint32_t RTC_IT);
void RTC_ClearITPendingBit(uint32_t RTC_IT);
#ifdef __cplusplus
}
#endif
#endif /*__STM32F2xx_RTC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+526
View File
@@ -0,0 +1,526 @@
/**
******************************************************************************
* @file stm32f2xx_spi.h
* @author MCD Application Team
* @version V1.1.2
* @date 05-March-2012
* @brief This file contains all the functions prototypes for the SPI
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F2xx_SPI_H
#define __STM32F2xx_SPI_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
//#include "../../CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h"
/** @addtogroup STM32F2xx_StdPeriph_Driver
* @{
*/
/** @addtogroup SPI
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief SPI Init structure definition
*/
typedef struct
{
uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
This parameter can be a value of @ref SPI_data_direction */
uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
This parameter can be a value of @ref SPI_mode */
uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
This parameter can be a value of @ref SPI_data_size */
uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
This parameter can be a value of @ref SPI_Clock_Polarity */
uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
This parameter can be a value of @ref SPI_Clock_Phase */
uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
hardware (NSS pin) or by software using the SSI bit.
This parameter can be a value of @ref SPI_Slave_Select_management */
uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
used to configure the transmit and receive SCK clock.
This parameter can be a value of @ref SPI_BaudRate_Prescaler
@note The communication clock is derived from the master
clock. The slave clock does not need to be set. */
uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
}SPI_InitTypeDef;
/**
* @brief I2S Init structure definition
*/
typedef struct
{
uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
This parameter can be a value of @ref I2S_Mode */
uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
This parameter can be a value of @ref I2S_Standard */
uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
This parameter can be a value of @ref I2S_Data_Format */
uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
This parameter can be a value of @ref I2S_MCLK_Output */
uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
This parameter can be a value of @ref I2S_Audio_Frequency */
uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
This parameter can be a value of @ref I2S_Clock_Polarity */
}I2S_InitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup SPI_Exported_Constants
* @{
*/
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
((PERIPH) == SPI2) || \
((PERIPH) == SPI3))
#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
((PERIPH) == SPI3))
/** @defgroup SPI_data_direction
* @{
*/
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
((MODE) == SPI_Direction_2Lines_RxOnly) || \
((MODE) == SPI_Direction_1Line_Rx) || \
((MODE) == SPI_Direction_1Line_Tx))
/**
* @}
*/
/** @defgroup SPI_mode
* @{
*/
#define SPI_Mode_Master ((uint16_t)0x0104)
#define SPI_Mode_Slave ((uint16_t)0x0000)
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
((MODE) == SPI_Mode_Slave))
/**
* @}
*/
/** @defgroup SPI_data_size
* @{
*/
#define SPI_DataSize_16b ((uint16_t)0x0800)
#define SPI_DataSize_8b ((uint16_t)0x0000)
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
((DATASIZE) == SPI_DataSize_8b))
/**
* @}
*/
/** @defgroup SPI_Clock_Polarity
* @{
*/
#define SPI_CPOL_Low ((uint16_t)0x0000)
#define SPI_CPOL_High ((uint16_t)0x0002)
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
((CPOL) == SPI_CPOL_High))
/**
* @}
*/
/** @defgroup SPI_Clock_Phase
* @{
*/
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
((CPHA) == SPI_CPHA_2Edge))
/**
* @}
*/
/** @defgroup SPI_Slave_Select_management
* @{
*/
#define SPI_NSS_Soft ((uint16_t)0x0200)
#define SPI_NSS_Hard ((uint16_t)0x0000)
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
((NSS) == SPI_NSS_Hard))
/**
* @}
*/
/** @defgroup SPI_BaudRate_Prescaler
* @{
*/
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
((PRESCALER) == SPI_BaudRatePrescaler_256))
/**
* @}
*/
/** @defgroup SPI_MSB_LSB_transmission
* @{
*/
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
#define SPI_FirstBit_LSB ((uint16_t)0x0080)
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
((BIT) == SPI_FirstBit_LSB))
/**
* @}
*/
/** @defgroup SPI_I2S_Mode
* @{
*/
#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
#define I2S_Mode_MasterTx ((uint16_t)0x0200)
#define I2S_Mode_MasterRx ((uint16_t)0x0300)
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
((MODE) == I2S_Mode_SlaveRx) || \
((MODE) == I2S_Mode_MasterTx)|| \
((MODE) == I2S_Mode_MasterRx))
/**
* @}
*/
/** @defgroup SPI_I2S_Standard
* @{
*/
#define I2S_Standard_Phillips ((uint16_t)0x0000)
#define I2S_Standard_MSB ((uint16_t)0x0010)
#define I2S_Standard_LSB ((uint16_t)0x0020)
#define I2S_Standard_PCMShort ((uint16_t)0x0030)
#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
((STANDARD) == I2S_Standard_MSB) || \
((STANDARD) == I2S_Standard_LSB) || \
((STANDARD) == I2S_Standard_PCMShort) || \
((STANDARD) == I2S_Standard_PCMLong))
/**
* @}
*/
/** @defgroup SPI_I2S_Data_Format
* @{
*/
#define I2S_DataFormat_16b ((uint16_t)0x0000)
#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
#define I2S_DataFormat_24b ((uint16_t)0x0003)
#define I2S_DataFormat_32b ((uint16_t)0x0005)
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
((FORMAT) == I2S_DataFormat_16bextended) || \
((FORMAT) == I2S_DataFormat_24b) || \
((FORMAT) == I2S_DataFormat_32b))
/**
* @}
*/
/** @defgroup SPI_I2S_MCLK_Output
* @{
*/
#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
((OUTPUT) == I2S_MCLKOutput_Disable))
/**
* @}
*/
/** @defgroup SPI_I2S_Audio_Frequency
* @{
*/
#define I2S_AudioFreq_192k ((uint32_t)192000)
#define I2S_AudioFreq_96k ((uint32_t)96000)
#define I2S_AudioFreq_48k ((uint32_t)48000)
#define I2S_AudioFreq_44k ((uint32_t)44100)
#define I2S_AudioFreq_32k ((uint32_t)32000)
#define I2S_AudioFreq_22k ((uint32_t)22050)
#define I2S_AudioFreq_16k ((uint32_t)16000)
#define I2S_AudioFreq_11k ((uint32_t)11025)
#define I2S_AudioFreq_8k ((uint32_t)8000)
#define I2S_AudioFreq_Default ((uint32_t)2)
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
((FREQ) <= I2S_AudioFreq_192k)) || \
((FREQ) == I2S_AudioFreq_Default))
/**
* @}
*/
/** @defgroup SPI_I2S_Clock_Polarity
* @{
*/
#define I2S_CPOL_Low ((uint16_t)0x0000)
#define I2S_CPOL_High ((uint16_t)0x0008)
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
((CPOL) == I2S_CPOL_High))
/**
* @}
*/
/** @defgroup SPI_I2S_DMA_transfer_requests
* @{
*/
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
/**
* @}
*/
/** @defgroup SPI_NSS_internal_software_management
* @{
*/
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
((INTERNAL) == SPI_NSSInternalSoft_Reset))
/**
* @}
*/
/** @defgroup SPI_CRC_Transmit_Receive
* @{
*/
#define SPI_CRC_Tx ((uint8_t)0x00)
#define SPI_CRC_Rx ((uint8_t)0x01)
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
/**
* @}
*/
/** @defgroup SPI_direction_transmit_receive
* @{
*/
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
#define SPI_Direction_Tx ((uint16_t)0x4000)
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
((DIRECTION) == SPI_Direction_Tx))
/**
* @}
*/
/** @defgroup SPI_I2S_interrupts_definition
* @{
*/
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
#define I2S_IT_UDR ((uint8_t)0x53)
#define SPI_I2S_IT_TIFRFE ((uint8_t)0x58)
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
((IT) == SPI_I2S_IT_RXNE) || \
((IT) == SPI_I2S_IT_ERR))
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
#define SPI_IT_MODF ((uint8_t)0x55)
#define SPI_IT_CRCERR ((uint8_t)0x54)
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE)|| ((IT) == SPI_I2S_IT_TXE) || \
((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \
((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\
((IT) == SPI_I2S_IT_TIFRFE))
/**
* @}
*/
/** @defgroup SPI_I2S_flags_definition
* @{
*/
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
#define I2S_FLAG_UDR ((uint16_t)0x0008)
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
#define SPI_FLAG_MODF ((uint16_t)0x0020)
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
#define SPI_I2S_FLAG_TIFRFE ((uint16_t)0x0100)
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
((FLAG) == SPI_I2S_FLAG_TIFRFE))
/**
* @}
*/
/** @defgroup SPI_CRC_polynomial
* @{
*/
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
/**
* @}
*/
/** @defgroup SPI_I2S_Legacy
* @{
*/
#define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
#define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
#define SPI_IT_TXE SPI_I2S_IT_TXE
#define SPI_IT_RXNE SPI_I2S_IT_RXNE
#define SPI_IT_ERR SPI_I2S_IT_ERR
#define SPI_IT_OVR SPI_I2S_IT_OVR
#define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
#define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
#define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
#define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
#define SPI_DeInit SPI_I2S_DeInit
#define SPI_ITConfig SPI_I2S_ITConfig
#define SPI_DMACmd SPI_I2S_DMACmd
#define SPI_SendData SPI_I2S_SendData
#define SPI_ReceiveData SPI_I2S_ReceiveData
#define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
#define SPI_ClearFlag SPI_I2S_ClearFlag
#define SPI_GetITStatus SPI_I2S_GetITStatus
#define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/* Function used to set the SPI configuration to the default reset state *****/
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
/* Initialization and Configuration functions *********************************/
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
/* Data transfers functions ***************************************************/
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
/* Hardware CRC Calculation functions *****************************************/
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
/* DMA transfers management functions *****************************************/
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
/* Interrupts and flags management functions **********************************/
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
#ifdef __cplusplus
}
#endif
#endif /*__STM32F2xx_SPI_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+105
View File
@@ -0,0 +1,105 @@
/**
******************************************************************************
* @file system_stm32f2xx.h
* @author MCD Application Team
* @version V1.1.3
* @date 05-March-2012
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f2xx_system
* @{
*/
/**
* @brief Define to prevent recursive inclusion
*/
#ifndef __SYSTEM_STM32F2XX_H
#define __SYSTEM_STM32F2XX_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup STM32F2xx_System_Includes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F2xx_System_Exported_types
* @{
*/
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* @}
*/
/** @addtogroup STM32F2xx_System_Exported_Constants
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F2xx_System_Exported_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F2xx_System_Exported_Functions
* @{
*/
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*__SYSTEM_STM32F2XX_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+45
View File
@@ -0,0 +1,45 @@
/****************************************************************************
* Copyright (c) 2012 by Michael Blandford. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
****************************************************************************/
void init5msTimer( void ) ;
void stop5msTimer( void ) ;
#ifdef PCBSKY
extern void start_timer0( void ) ;
extern void stop_timer0( void ) ;
extern void init_pwm( void ) ;
#endif
#ifdef PCBX9D
extern uint32_t Peri1_frequency ;
extern uint32_t Peri2_frequency ;
extern uint32_t Timer_mult1 ;
extern uint32_t Timer_mult2 ;
extern void init_hw_timer( void ) ;
extern void hw_delay( uint16_t time ) ;
extern void init_main_ppm( void ) ;
extern void disable_main_ppm( void ) ;
extern void init_trainer_ppm( void ) ;
extern void init_trainer_capture( void ) ;
extern void setupPulsesPXX(uint8_t module) ;
extern void setupPulses( unsigned int port ) ;
extern void setupPulsesPpm( void ) ;
#endif
+102
View File
@@ -0,0 +1,102 @@
/**
******************************************************************************
* @file usb_bsp.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Specific api's relative to the used hardware platform
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_BSP__H__
#define __USB_BSP__H__
/* Includes ------------------------------------------------------------------*/
#include "usb_core.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_BSP
* @brief This file is the
* @{
*/
/** @defgroup USB_BSP_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USB_BSP_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USB_BSP_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USB_BSP_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_BSP_Exported_FunctionsPrototype
* @{
*/
void BSP_Init(void);
void USB_OTG_BSP_Init (USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_BSP_uDelay (const uint32_t usec);
void USB_OTG_BSP_mDelay (const uint32_t msec);
void USB_OTG_BSP_EnableInterrupt (USB_OTG_CORE_HANDLE *pdev);
#ifdef USE_HOST_MODE
void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev,uint8_t state);
#endif
/**
* @}
*/
#endif //__USB_BSP__H__
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+175
View File
@@ -0,0 +1,175 @@
/**
******************************************************************************
* @file usb_conf.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief General low level driver configuration
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_CONF__H__
#define __USB_CONF__H__
#include "stm32f2xx.h"
#define HID_IN_EP 0x81
#define HID_OUT_EP 0x01
#define HID_IN_PACKET 4
#define HID_OUT_PACKET 4
/* USB Core and PHY interface configuration.
Tip: To avoid modifying these defines each time you need to change the USB
configuration, you can declare the needed define in your toolchain
compiler preprocessor.
*/
/****************** USB OTG FS PHY CONFIGURATION *******************************
* The USB OTG FS Core supports one on-chip Full Speed PHY.
*
* The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
* when FS core is used.
*******************************************************************************/
#ifndef USE_USB_OTG_FS
#define USE_USB_OTG_FS
#endif /* USE_USB_OTG_FS */
#ifdef USE_USB_OTG_FS
#define USB_OTG_FS_CORE
#endif
/*******************************************************************************
* FIFO Size Configuration in Device mode
*
* (i) Receive data FIFO size = RAM for setup packets +
* OUT endpoint control information +
* data OUT packets + miscellaneous
* Space = ONE 32-bits words
* --> RAM for setup packets = 10 spaces
* (n is the nbr of CTRL EPs the device core supports)
* --> OUT EP CTRL info = 1 space
* (one space for status information written to the FIFO along with each
* received packet)
* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
* (MINIMUM to receive packets)
* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
* (if high-bandwidth EP is enabled or multiple isochronous EPs)
* --> miscellaneous = 1 space per OUT EP
* (one space for transfer complete status information also pushed to the
* FIFO with each endpoint's last packet)
*
* (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
* that particular IN EP. More space allocated in the IN EP Tx FIFO results
* in a better performance on the USB and can hide latencies on the AHB.
*
* (iii) TXn min size = 16 words. (n : Transmit FIFO index)
* (iv) When a TxFIFO is not used, the Configuration should be as follows:
* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
* --> Txm can use the space allocated for Txn.
* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
* --> Txn should be configured with the minimum space of 16 words
* (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
* (vi) In HS case12 FIFO locations should be reserved for internal DMA registers
* so total FIFO size should be 1012 Only instead of 1024
*******************************************************************************/
/****************** USB OTG FS CONFIGURATION **********************************/
#ifdef USB_OTG_FS_CORE
#define RX_FIFO_FS_SIZE 128
#define TX0_FIFO_FS_SIZE 64
#define TX1_FIFO_FS_SIZE 128
#define TX2_FIFO_FS_SIZE 0
#define TX3_FIFO_FS_SIZE 0
// #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
#endif
/****************** USB OTG MISC CONFIGURATION ********************************/
#define VBUS_SENSING_ENABLED
/****************** USB OTG MODE CONFIGURATION ********************************/
//#define USE_HOST_MODE
#define USE_DEVICE_MODE
//#define USE_OTG_MODE
#ifndef USB_OTG_FS_CORE
#ifndef USB_OTG_HS_CORE
#error "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
#endif
#endif
#ifndef USE_DEVICE_MODE
#ifndef USE_HOST_MODE
#error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
#endif
#endif
#ifndef USE_USB_OTG_HS
#ifndef USE_USB_OTG_FS
#error "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
#endif
#else //USE_USB_OTG_HS
#ifndef USE_ULPI_PHY
#ifndef USE_EMBEDDED_PHY
#error "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
#endif
#endif
#endif
/****************** C Compilers dependant keywords ****************************/
/* In HS mode and when the DMA is used, all variables and data structures dealing
with the DMA during the transaction process should be 4-bytes aligned */
#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
#if defined (__GNUC__) /* GNU Compiler */
#define __ALIGN_END __attribute__ ((aligned (4)))
#define __ALIGN_BEGIN
#else
#define __ALIGN_END
#if defined (__CC_ARM) /* ARM Compiler */
#define __ALIGN_BEGIN __align(4)
#elif defined (__ICCARM__) /* IAR Compiler */
#define __ALIGN_BEGIN
#elif defined (__TASKING__) /* TASKING Compiler */
#define __ALIGN_BEGIN __align(4)
#endif /* __CC_ARM */
#endif /* __GNUC__ */
#else
#define __ALIGN_BEGIN
#define __ALIGN_END
#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
/* __packed keyword used to decrease the data type alignment to 1-byte */
#if defined (__CC_ARM) /* ARM Compiler */
#define __packed __packed
#elif defined (__ICCARM__) /* IAR Compiler */
#define __packed __packed
#elif defined ( __GNUC__ ) /* GNU Compiler */
#define __packed __attribute__ ((__packed__))
#elif defined (__TASKING__) /* TASKING Compiler */
#define __packed __unaligned
#endif /* __CC_ARM */
#endif //__USB_CONF__H__
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+417
View File
@@ -0,0 +1,417 @@
/**
******************************************************************************
* @file usb_core.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Header of the Core Layer
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_CORE_H__
#define __USB_CORE_H__
/* Includes ------------------------------------------------------------------*/
#include "usb_conf.h"
#include "usb_regs.h"
#include "usb_defines.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_CORE
* @brief usb otg driver core layer
* @{
*/
/** @defgroup USB_CORE_Exported_Defines
* @{
*/
#define USB_OTG_EP0_IDLE 0
#define USB_OTG_EP0_SETUP 1
#define USB_OTG_EP0_DATA_IN 2
#define USB_OTG_EP0_DATA_OUT 3
#define USB_OTG_EP0_STATUS_IN 4
#define USB_OTG_EP0_STATUS_OUT 5
#define USB_OTG_EP0_STALL 6
#define USB_OTG_EP_TX_DIS 0x0000
#define USB_OTG_EP_TX_STALL 0x0010
#define USB_OTG_EP_TX_NAK 0x0020
#define USB_OTG_EP_TX_VALID 0x0030
#define USB_OTG_EP_RX_DIS 0x0000
#define USB_OTG_EP_RX_STALL 0x1000
#define USB_OTG_EP_RX_NAK 0x2000
#define USB_OTG_EP_RX_VALID 0x3000
/**
* @}
*/
#define MAX_DATA_LENGTH 0x200
/** @defgroup USB_CORE_Exported_Types
* @{
*/
typedef enum {
USB_OTG_OK = 0,
USB_OTG_FAIL
}USB_OTG_STS;
typedef enum {
HC_IDLE = 0,
HC_XFRC,
HC_HALTED,
HC_NAK,
HC_NYET,
HC_STALL,
HC_XACTERR,
HC_BBLERR,
HC_DATATGLERR,
}HC_STATUS;
typedef enum {
URB_IDLE = 0,
URB_DONE,
URB_NOTREADY,
URB_ERROR,
URB_STALL
}URB_STATE;
typedef enum {
CTRL_START = 0,
CTRL_XFRC,
CTRL_HALTED,
CTRL_NAK,
CTRL_STALL,
CTRL_XACTERR,
CTRL_BBLERR,
CTRL_DATATGLERR,
CTRL_FAIL
}CTRL_STATUS;
typedef struct USB_OTG_hc
{
uint8_t dev_addr ;
uint8_t ep_num;
uint8_t ep_is_in;
uint8_t speed;
uint8_t do_ping;
uint8_t ep_type;
uint16_t max_packet;
uint8_t data_pid;
uint8_t *xfer_buff;
uint32_t xfer_len;
uint32_t xfer_count;
uint8_t toggle_in;
uint8_t toggle_out;
uint32_t dma_addr;
}
USB_OTG_HC , *PUSB_OTG_HC;
typedef struct USB_OTG_ep
{
uint8_t num;
uint8_t is_in;
uint8_t is_stall;
uint8_t type;
uint8_t data_pid_start;
uint8_t even_odd_frame;
uint16_t tx_fifo_num;
uint32_t maxpacket;
/* transaction level variables*/
uint8_t *xfer_buff;
uint32_t dma_addr;
uint32_t xfer_len;
uint32_t xfer_count;
/* Transfer level variables*/
uint32_t rem_data_len;
uint32_t total_data_len;
uint32_t ctl_data_len;
}
USB_OTG_EP , *PUSB_OTG_EP;
typedef struct USB_OTG_core_cfg
{
uint8_t host_channels;
uint8_t dev_endpoints;
uint8_t speed;
uint8_t dma_enable;
uint16_t mps;
uint16_t TotalFifoSize;
uint8_t phy_itface;
uint8_t Sof_output;
uint8_t low_power;
uint8_t coreID;
}
USB_OTG_CORE_CFGS, *PUSB_OTG_CORE_CFGS;
typedef struct usb_setup_req {
uint8_t bmRequest;
uint8_t bRequest;
uint16_t wValue;
uint16_t wIndex;
uint16_t wLength;
} USB_SETUP_REQ;
typedef struct _Device_TypeDef
{
uint8_t *(*GetDeviceDescriptor)( uint8_t speed , uint16_t *length);
uint8_t *(*GetLangIDStrDescriptor)( uint8_t speed , uint16_t *length);
uint8_t *(*GetManufacturerStrDescriptor)( uint8_t speed , uint16_t *length);
uint8_t *(*GetProductStrDescriptor)( uint8_t speed , uint16_t *length);
uint8_t *(*GetSerialStrDescriptor)( uint8_t speed , uint16_t *length);
uint8_t *(*GetConfigurationStrDescriptor)( uint8_t speed , uint16_t *length);
uint8_t *(*GetInterfaceStrDescriptor)( uint8_t speed , uint16_t *length);
} USBD_DEVICE, *pUSBD_DEVICE;
//typedef struct USB_OTG_hPort
//{
// void (*Disconnect) (void *phost);
// void (*Connect) (void *phost);
// uint8_t ConnStatus;
// uint8_t DisconnStatus;
// uint8_t ConnHandled;
// uint8_t DisconnHandled;
//} USB_OTG_hPort_TypeDef;
typedef struct _Device_cb
{
uint8_t (*Init) (void *pdev , uint8_t cfgidx);
uint8_t (*DeInit) (void *pdev , uint8_t cfgidx);
/* Control Endpoints*/
uint8_t (*Setup) (void *pdev , USB_SETUP_REQ *req);
uint8_t (*EP0_TxSent) (void *pdev );
uint8_t (*EP0_RxReady) (void *pdev );
/* Class Specific Endpoints*/
uint8_t (*DataIn) (void *pdev , uint8_t epnum);
uint8_t (*DataOut) (void *pdev , uint8_t epnum);
uint8_t (*SOF) (void *pdev);
uint8_t (*IsoINIncomplete) (void *pdev);
uint8_t (*IsoOUTIncomplete) (void *pdev);
uint8_t *(*GetConfigDescriptor)( uint8_t speed , uint16_t *length);
#ifdef USB_OTG_HS_CORE
uint8_t *(*GetOtherConfigDescriptor)( uint8_t speed , uint16_t *length);
#endif
#ifdef USB_SUPPORT_USER_STRING_DESC
uint8_t *(*GetUsrStrDescriptor)( uint8_t speed ,uint8_t index, uint16_t *length);
#endif
} USBD_Class_cb_TypeDef;
typedef struct _USBD_USR_PROP
{
void (*Init)(void);
void (*DeviceReset)(uint8_t speed);
void (*DeviceConfigured)(void);
void (*DeviceSuspended)(void);
void (*DeviceResumed)(void);
void (*DeviceConnected)(void);
void (*DeviceDisconnected)(void);
}
USBD_Usr_cb_TypeDef;
typedef struct _DCD
{
uint8_t device_config;
uint8_t device_state;
uint8_t device_status;
uint8_t device_old_status;
uint8_t device_address;
uint8_t connection_status;
uint8_t test_mode;
uint32_t DevRemoteWakeup;
USB_OTG_EP in_ep [USB_OTG_MAX_TX_FIFOS];
USB_OTG_EP out_ep [USB_OTG_MAX_TX_FIFOS];
uint8_t setup_packet [8*3];
USBD_Class_cb_TypeDef *class_cb;
USBD_Usr_cb_TypeDef *usr_cb;
USBD_DEVICE *usr_device;
uint8_t *pConfig_descriptor;
}
DCD_DEV , *DCD_PDEV;
typedef struct _HCD
{
uint8_t Rx_Buffer [MAX_DATA_LENGTH];
__IO uint32_t ConnSts;
__IO uint32_t ErrCnt[USB_OTG_MAX_TX_FIFOS];
__IO uint32_t XferCnt[USB_OTG_MAX_TX_FIFOS];
__IO HC_STATUS HC_Status[USB_OTG_MAX_TX_FIFOS];
__IO URB_STATE URB_State[USB_OTG_MAX_TX_FIFOS];
USB_OTG_HC hc [USB_OTG_MAX_TX_FIFOS];
uint16_t channel [USB_OTG_MAX_TX_FIFOS];
// USB_OTG_hPort_TypeDef *port_cb;
}
HCD_DEV , *USB_OTG_USBH_PDEV;
typedef struct _OTG
{
uint8_t OTG_State;
uint8_t OTG_PrevState;
uint8_t OTG_Mode;
}
OTG_DEV , *USB_OTG_USBO_PDEV;
typedef struct USB_OTG_handle
{
USB_OTG_CORE_CFGS cfg;
USB_OTG_CORE_REGS regs;
#ifdef USE_DEVICE_MODE
DCD_DEV dev;
#endif
#ifdef USE_HOST_MODE
HCD_DEV host;
#endif
#ifdef USE_OTG_MODE
OTG_DEV otg;
#endif
}
USB_OTG_CORE_HANDLE , *PUSB_OTG_CORE_HANDLE;
/**
* @}
*/
/** @defgroup USB_CORE_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USB_CORE_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_CORE_Exported_FunctionsPrototype
* @{
*/
USB_OTG_STS USB_OTG_CoreInit (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_SelectCore (USB_OTG_CORE_HANDLE *pdev,
USB_OTG_CORE_ID_TypeDef coreID);
USB_OTG_STS USB_OTG_EnableGlobalInt (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_DisableGlobalInt(USB_OTG_CORE_HANDLE *pdev);
void* USB_OTG_ReadPacket (USB_OTG_CORE_HANDLE *pdev ,
uint8_t *dest,
uint16_t len);
USB_OTG_STS USB_OTG_WritePacket (USB_OTG_CORE_HANDLE *pdev ,
uint8_t *src,
uint8_t ch_ep_num,
uint16_t len);
USB_OTG_STS USB_OTG_FlushTxFifo (USB_OTG_CORE_HANDLE *pdev , uint32_t num);
USB_OTG_STS USB_OTG_FlushRxFifo (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_ReadCoreItr (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_ReadOtgItr (USB_OTG_CORE_HANDLE *pdev);
uint8_t USB_OTG_IsHostMode (USB_OTG_CORE_HANDLE *pdev);
uint8_t USB_OTG_IsDeviceMode (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_GetMode (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_PhyInit (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_SetCurrentMode (USB_OTG_CORE_HANDLE *pdev,
uint8_t mode);
/*********************** HOST APIs ********************************************/
#ifdef USE_HOST_MODE
USB_OTG_STS USB_OTG_CoreInitHost (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_EnableHostInt (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_HC_Init (USB_OTG_CORE_HANDLE *pdev, uint8_t hc_num);
USB_OTG_STS USB_OTG_HC_Halt (USB_OTG_CORE_HANDLE *pdev, uint8_t hc_num);
USB_OTG_STS USB_OTG_HC_StartXfer (USB_OTG_CORE_HANDLE *pdev, uint8_t hc_num);
USB_OTG_STS USB_OTG_HC_DoPing (USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num);
uint32_t USB_OTG_ReadHostAllChannels_intr (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_ResetPort (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_ReadHPRT0 (USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_DriveVbus (USB_OTG_CORE_HANDLE *pdev, uint8_t state);
void USB_OTG_InitFSLSPClkSel (USB_OTG_CORE_HANDLE *pdev ,uint8_t freq);
uint8_t USB_OTG_IsEvenFrame (USB_OTG_CORE_HANDLE *pdev) ;
void USB_OTG_StopHost (USB_OTG_CORE_HANDLE *pdev);
#endif
/********************* DEVICE APIs ********************************************/
#ifdef USE_DEVICE_MODE
USB_OTG_STS USB_OTG_CoreInitDev (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_EnableDevInt (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_ReadDevAllInEPItr (USB_OTG_CORE_HANDLE *pdev);
enum USB_OTG_SPEED USB_OTG_GetDeviceSpeed (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_EP0Activate (USB_OTG_CORE_HANDLE *pdev);
USB_OTG_STS USB_OTG_EPActivate (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
USB_OTG_STS USB_OTG_EPDeactivate(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
USB_OTG_STS USB_OTG_EPStartXfer (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
USB_OTG_STS USB_OTG_EP0StartXfer(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
USB_OTG_STS USB_OTG_EPSetStall (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
USB_OTG_STS USB_OTG_EPClearStall (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
uint32_t USB_OTG_ReadDevAllOutEp_itr (USB_OTG_CORE_HANDLE *pdev);
uint32_t USB_OTG_ReadDevOutEP_itr (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
uint32_t USB_OTG_ReadDevAllInEPItr (USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_InitDevSpeed (USB_OTG_CORE_HANDLE *pdev , uint8_t speed);
uint8_t USBH_IsEvenFrame (USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_EP0_OutStart(USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_ActiveRemoteWakeup(USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_UngateClock(USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_StopDevice(USB_OTG_CORE_HANDLE *pdev);
void USB_OTG_SetEPStatus (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep , uint32_t Status);
uint32_t USB_OTG_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,USB_OTG_EP *ep);
#endif
/**
* @}
*/
#endif /* __USB_CORE_H__ */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+163
View File
@@ -0,0 +1,163 @@
/**
******************************************************************************
* @file usb_dcd.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Peripheral Driver Header file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DCD_H__
#define __DCD_H__
/* Includes ------------------------------------------------------------------*/
#include "usb_core.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_DCD
* @brief This file is the
* @{
*/
/** @defgroup USB_DCD_Exported_Defines
* @{
*/
#define USB_OTG_EP_CONTROL 0
#define USB_OTG_EP_ISOC 1
#define USB_OTG_EP_BULK 2
#define USB_OTG_EP_INT 3
#define USB_OTG_EP_MASK 3
/* Device Status */
#define USB_OTG_DEFAULT 1
#define USB_OTG_ADDRESSED 2
#define USB_OTG_CONFIGURED 3
#define USB_OTG_SUSPENDED 4
/**
* @}
*/
/** @defgroup USB_DCD_Exported_Types
* @{
*/
/********************************************************************************
Data structure type
********************************************************************************/
typedef struct
{
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bEndpointAddress;
uint8_t bmAttributes;
uint16_t wMaxPacketSize;
uint8_t bInterval;
}
EP_DESCRIPTOR , *PEP_DESCRIPTOR;
/**
* @}
*/
/** @defgroup USB_DCD_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USB_DCD_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_DCD_Exported_FunctionsPrototype
* @{
*/
/********************************************************************************
EXPORTED FUNCTION FROM THE USB-OTG LAYER
********************************************************************************/
void DCD_Init(USB_OTG_CORE_HANDLE *pdev ,
USB_OTG_CORE_ID_TypeDef coreID);
void DCD_DevConnect (USB_OTG_CORE_HANDLE *pdev);
void DCD_DevDisconnect (USB_OTG_CORE_HANDLE *pdev);
void DCD_EP_SetAddress (USB_OTG_CORE_HANDLE *pdev,
uint8_t address);
uint32_t DCD_EP_Open(USB_OTG_CORE_HANDLE *pdev ,
uint8_t ep_addr,
uint16_t ep_mps,
uint8_t ep_type);
uint32_t DCD_EP_Close (USB_OTG_CORE_HANDLE *pdev,
uint8_t ep_addr);
uint32_t DCD_EP_PrepareRx ( USB_OTG_CORE_HANDLE *pdev,
uint8_t ep_addr,
uint8_t *pbuf,
uint16_t buf_len);
uint32_t DCD_EP_Tx (USB_OTG_CORE_HANDLE *pdev,
uint8_t ep_addr,
uint8_t *pbuf,
uint32_t buf_len);
uint32_t DCD_EP_Stall (USB_OTG_CORE_HANDLE *pdev,
uint8_t epnum);
uint32_t DCD_EP_ClrStall (USB_OTG_CORE_HANDLE *pdev,
uint8_t epnum);
uint32_t DCD_EP_Flush (USB_OTG_CORE_HANDLE *pdev,
uint8_t epnum);
uint32_t DCD_Handle_ISR(USB_OTG_CORE_HANDLE *pdev);
uint32_t DCD_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,
uint8_t epnum);
void DCD_SetEPStatus (USB_OTG_CORE_HANDLE *pdev ,
uint8_t epnum ,
uint32_t Status);
/**
* @}
*/
#endif //__DCD_H__
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+127
View File
@@ -0,0 +1,127 @@
/**
******************************************************************************
* @file usb_dcd_int.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Peripheral Device Interface Layer
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef USB_DCD_INT_H__
#define USB_DCD_INT_H__
/* Includes ------------------------------------------------------------------*/
#include "usb_dcd.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_DCD_INT
* @brief This file is the
* @{
*/
/** @defgroup USB_DCD_INT_Exported_Defines
* @{
*/
typedef struct _USBD_DCD_INT
{
uint8_t (* DataOutStage) (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
uint8_t (* DataInStage) (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
uint8_t (* SetupStage) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* Reset) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* Suspend) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* Resume) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* IsoINIncomplete) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* IsoOUTIncomplete) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
}USBD_DCD_INT_cb_TypeDef;
extern USBD_DCD_INT_cb_TypeDef *USBD_DCD_INT_fops;
/**
* @}
*/
/** @defgroup USB_DCD_INT_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USB_DCD_INT_Exported_Macros
* @{
*/
#define CLEAR_IN_EP_INTR(epnum,intr) \
diepint.d32=0; \
diepint.b.intr = 1; \
USB_OTG_WRITE_REG32(&pdev->regs.INEP_REGS[epnum]->DIEPINT,diepint.d32);
#define CLEAR_OUT_EP_INTR(epnum,intr) \
doepint.d32=0; \
doepint.b.intr = 1; \
USB_OTG_WRITE_REG32(&pdev->regs.OUTEP_REGS[epnum]->DOEPINT,doepint.d32);
/**
* @}
*/
/** @defgroup USB_DCD_INT_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_DCD_INT_Exported_FunctionsPrototype
* @{
*/
uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
/**
* @}
*/
#endif // USB_DCD_INT_H__
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+249
View File
@@ -0,0 +1,249 @@
/**
******************************************************************************
* @file usb_defines.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief Header of the Core Layer
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_DEF_H__
#define __USB_DEF_H__
/* Includes ------------------------------------------------------------------*/
#include "usb_conf.h"
/** @addtogroup USB_OTG_DRIVER
* @{
*/
/** @defgroup USB_DEFINES
* @brief This file is the
* @{
*/
/** @defgroup USB_DEFINES_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup _CORE_DEFINES_
* @{
*/
#define USB_OTG_SPEED_PARAM_HIGH 0
#define USB_OTG_SPEED_PARAM_HIGH_IN_FULL 1
#define USB_OTG_SPEED_PARAM_FULL 3
#define USB_OTG_SPEED_HIGH 0
#define USB_OTG_SPEED_FULL 1
#define USB_OTG_ULPI_PHY 1
#define USB_OTG_EMBEDDED_PHY 2
/**
* @}
*/
/** @defgroup _GLOBAL_DEFINES_
* @{
*/
#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
#define GAHBCFG_GLBINT_ENABLE 1
#define GAHBCFG_INT_DMA_BURST_SINGLE 0
#define GAHBCFG_INT_DMA_BURST_INCR 1
#define GAHBCFG_INT_DMA_BURST_INCR4 3
#define GAHBCFG_INT_DMA_BURST_INCR8 5
#define GAHBCFG_INT_DMA_BURST_INCR16 7
#define GAHBCFG_DMAENABLE 1
#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
#define GRXSTS_PKTSTS_IN 2
#define GRXSTS_PKTSTS_IN_XFER_COMP 3
#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
#define GRXSTS_PKTSTS_CH_HALTED 7
/**
* @}
*/
/** @defgroup _OnTheGo_DEFINES_
* @{
*/
#define MODE_HNP_SRP_CAPABLE 0
#define MODE_SRP_ONLY_CAPABLE 1
#define MODE_NO_HNP_SRP_CAPABLE 2
#define MODE_SRP_CAPABLE_DEVICE 3
#define MODE_NO_SRP_CAPABLE_DEVICE 4
#define MODE_SRP_CAPABLE_HOST 5
#define MODE_NO_SRP_CAPABLE_HOST 6
#define A_HOST 1
#define A_SUSPEND 2
#define A_PERIPHERAL 3
#define B_PERIPHERAL 4
#define B_HOST 5
#define DEVICE_MODE 0
#define HOST_MODE 1
#define OTG_MODE 2
/**
* @}
*/
/** @defgroup __DEVICE_DEFINES_
* @{
*/
#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
#define DSTS_ENUMSPD_LS_PHY_6MHZ 2
#define DSTS_ENUMSPD_FS_PHY_48MHZ 3
#define DCFG_FRAME_INTERVAL_80 0
#define DCFG_FRAME_INTERVAL_85 1
#define DCFG_FRAME_INTERVAL_90 2
#define DCFG_FRAME_INTERVAL_95 3
#define DEP0CTL_MPS_64 0
#define DEP0CTL_MPS_32 1
#define DEP0CTL_MPS_16 2
#define DEP0CTL_MPS_8 3
#define EP_SPEED_LOW 0
#define EP_SPEED_FULL 1
#define EP_SPEED_HIGH 2
#define EP_TYPE_CTRL 0
#define EP_TYPE_ISOC 1
#define EP_TYPE_BULK 2
#define EP_TYPE_INTR 3
#define EP_TYPE_MSK 3
#define STS_GOUT_NAK 1
#define STS_DATA_UPDT 2
#define STS_XFER_COMP 3
#define STS_SETUP_COMP 4
#define STS_SETUP_UPDT 6
/**
* @}
*/
/** @defgroup __HOST_DEFINES_
* @{
*/
#define HC_PID_DATA0 0
#define HC_PID_DATA2 1
#define HC_PID_DATA1 2
#define HC_PID_SETUP 3
#define HPRT0_PRTSPD_HIGH_SPEED 0
#define HPRT0_PRTSPD_FULL_SPEED 1
#define HPRT0_PRTSPD_LOW_SPEED 2
#define HCFG_30_60_MHZ 0
#define HCFG_48_MHZ 1
#define HCFG_6_MHZ 2
#define HCCHAR_CTRL 0
#define HCCHAR_ISOC 1
#define HCCHAR_BULK 2
#define HCCHAR_INTR 3
#define MIN(a, b) (((a) < (b)) ? (a) : (b))
/**
* @}
*/
/** @defgroup USB_DEFINES_Exported_Types
* @{
*/
typedef enum
{
USB_OTG_HS_CORE_ID = 0,
USB_OTG_FS_CORE_ID = 1
}USB_OTG_CORE_ID_TypeDef;
/**
* @}
*/
/** @defgroup USB_DEFINES_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USB_DEFINES_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USB_DEFINES_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
/** @defgroup Internal_Macro's
* @{
*/
#define USB_OTG_READ_REG32(reg) (*(__IO uint32_t *)reg)
#define USB_OTG_WRITE_REG32(reg,value) (*(__IO uint32_t *)reg = value)
#define USB_OTG_MODIFY_REG32(reg,clear_mask,set_mask) \
USB_OTG_WRITE_REG32(reg, (((USB_OTG_READ_REG32(reg)) & ~clear_mask) | set_mask ) )
/********************************************************************************
ENUMERATION TYPE
********************************************************************************/
enum USB_OTG_SPEED {
USB_SPEED_UNKNOWN = 0,
USB_SPEED_LOW,
USB_SPEED_FULL,
USB_SPEED_HIGH
};
#endif //__USB_DEFINES__H__
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
File diff suppressed because it is too large Load Diff
+54
View File
@@ -0,0 +1,54 @@
/**
******************************************************************************
* @file usbd_conf.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief USB Device configuration file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_CONF__H__
#define __USBD_CONF__H__
/* Includes ------------------------------------------------------------------*/
#include "usb_conf.h"
#define USBD_CFG_MAX_NUM 1
#define USBD_ITF_MAX_NUM 1
#define USB_MAX_STR_DESC_SIZ 64
#define USBD_SELF_POWERED
/* Class Layer Parameter */
#define MSC_IN_EP 0x81
#define MSC_OUT_EP 0x01
#define MSC_MAX_PACKET 64
#define MSC_MEDIA_PACKET 4096
#endif //__USBD_CONF__H__
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+120
View File
@@ -0,0 +1,120 @@
/**
******************************************************************************
* @file usbd_core.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief Header file for usbd_core.c
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_CORE_H
#define __USBD_CORE_H
/* Includes ------------------------------------------------------------------*/
#include "usb_dcd.h"
#include "usbd_def.h"
#include "usbd_conf.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_CORE
* @brief This file is the Header file for usbd_core.c file
* @{
*/
/** @defgroup USBD_CORE_Exported_Defines
* @{
*/
typedef enum {
USBD_OK = 0,
USBD_BUSY,
USBD_FAIL,
}USBD_Status;
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_FunctionsPrototype
* @{
*/
void USBD_Init(USB_OTG_CORE_HANDLE *pdev,
USB_OTG_CORE_ID_TypeDef coreID,
USBD_DEVICE *pDevice,
USBD_Class_cb_TypeDef *class_cb,
USBD_Usr_cb_TypeDef *usr_cb);
USBD_Status USBD_DeInit(USB_OTG_CORE_HANDLE *pdev);
USBD_Status USBD_ClrCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx);
USBD_Status USBD_SetCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx);
/**
* @}
*/
#endif /* __USBD_CORE_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+156
View File
@@ -0,0 +1,156 @@
/**
******************************************************************************
* @file usbd_def.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief general defines for the usb device library
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_DEF_H
#define __USBD_DEF_H
/* Includes ------------------------------------------------------------------*/
#include "usbd_conf.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USB_DEF
* @brief general defines for the usb device library file
* @{
*/
/** @defgroup USB_DEF_Exported_Defines
* @{
*/
#ifndef NULL
#define NULL 0
#endif
#define USB_LEN_DEV_QUALIFIER_DESC 0x0A
#define USB_LEN_DEV_DESC 0x12
#define USB_LEN_CFG_DESC 0x09
#define USB_LEN_IF_DESC 0x09
#define USB_LEN_EP_DESC 0x07
#define USB_LEN_OTG_DESC 0x03
#define USBD_IDX_LANGID_STR 0x00
#define USBD_IDX_MFC_STR 0x01
#define USBD_IDX_PRODUCT_STR 0x02
#define USBD_IDX_SERIAL_STR 0x03
#define USBD_IDX_CONFIG_STR 0x04
#define USBD_IDX_INTERFACE_STR 0x05
#define USB_REQ_TYPE_STANDARD 0x00
#define USB_REQ_TYPE_CLASS 0x20
#define USB_REQ_TYPE_VENDOR 0x40
#define USB_REQ_TYPE_MASK 0x60
#define USB_REQ_RECIPIENT_DEVICE 0x00
#define USB_REQ_RECIPIENT_INTERFACE 0x01
#define USB_REQ_RECIPIENT_ENDPOINT 0x02
#define USB_REQ_RECIPIENT_MASK 0x03
#define USB_REQ_GET_STATUS 0x00
#define USB_REQ_CLEAR_FEATURE 0x01
#define USB_REQ_SET_FEATURE 0x03
#define USB_REQ_SET_ADDRESS 0x05
#define USB_REQ_GET_DESCRIPTOR 0x06
#define USB_REQ_SET_DESCRIPTOR 0x07
#define USB_REQ_GET_CONFIGURATION 0x08
#define USB_REQ_SET_CONFIGURATION 0x09
#define USB_REQ_GET_INTERFACE 0x0A
#define USB_REQ_SET_INTERFACE 0x0B
#define USB_REQ_SYNCH_FRAME 0x0C
#define USB_DESC_TYPE_DEVICE 1
#define USB_DESC_TYPE_CONFIGURATION 2
#define USB_DESC_TYPE_STRING 3
#define USB_DESC_TYPE_INTERFACE 4
#define USB_DESC_TYPE_ENDPOINT 5
#define USB_DESC_TYPE_DEVICE_QUALIFIER 6
#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7
#define USB_CONFIG_REMOTE_WAKEUP 2
#define USB_CONFIG_SELF_POWERED 1
#define USB_FEATURE_EP_HALT 0
#define USB_FEATURE_REMOTE_WAKEUP 1
#define USB_FEATURE_TEST_MODE 2
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_Macros
* @{
*/
#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \
(((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8))
#define LOBYTE(x) ((uint8_t)(x & 0x00FF))
#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8))
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DEF_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
#endif /* __USBD_DEF_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+120
View File
@@ -0,0 +1,120 @@
/**
******************************************************************************
* @file usbd_desc.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header file for the usbd_desc.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_DESC_H
#define __USB_DESC_H
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USB_DESC
* @brief general defines for the usb device library file
* @{
*/
/** @defgroup USB_DESC_Exported_Defines
* @{
*/
#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
#define USB_STRING_DESCRIPTOR_TYPE 0x03
#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
#define USB_SIZ_DEVICE_DESC 18
#define USB_SIZ_STRING_LANGID 4
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_Variables
* @{
*/
extern uint8_t USBD_DeviceDesc [USB_SIZ_DEVICE_DESC];
extern uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ];
extern uint8_t USBD_OtherSpeedCfgDesc[USB_LEN_CFG_DESC];
extern uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC];
extern uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID];
extern USBD_DEVICE USR_desc;
/**
* @}
*/
/** @defgroup USBD_DESC_Exported_FunctionsPrototype
* @{
*/
uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length);
uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length);
uint8_t * USBD_USR_ManufacturerStrDescriptor ( uint8_t speed , uint16_t *length);
uint8_t * USBD_USR_ProductStrDescriptor ( uint8_t speed , uint16_t *length);
uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length);
uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length);
uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length);
#ifdef USB_SUPPORT_USER_STRING_DESC
uint8_t * USBD_USR_USRStringDesc (uint8_t speed, uint8_t idx , uint16_t *length);
#endif /* USB_SUPPORT_USER_STRING_DESC */
/**
* @}
*/
#endif /* __USBD_DESC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+121
View File
@@ -0,0 +1,121 @@
/**
******************************************************************************
* @file usbd_ioreq.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header file for the usbd_ioreq.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_IOREQ_H_
#define __USBD_IOREQ_H_
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
#include "usbd_core.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_IOREQ
* @brief header file for the usbd_ioreq.c file
* @{
*/
/** @defgroup USBD_IOREQ_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype
* @{
*/
USBD_Status USBD_CtlSendData (USB_OTG_CORE_HANDLE *pdev,
uint8_t *buf,
uint16_t len);
USBD_Status USBD_CtlContinueSendData (USB_OTG_CORE_HANDLE *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_Status USBD_CtlPrepareRx (USB_OTG_CORE_HANDLE *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_Status USBD_CtlContinueRx (USB_OTG_CORE_HANDLE *pdev,
uint8_t *pbuf,
uint16_t len);
USBD_Status USBD_CtlSendStatus (USB_OTG_CORE_HANDLE *pdev);
USBD_Status USBD_CtlReceiveStatus (USB_OTG_CORE_HANDLE *pdev);
uint16_t USBD_GetRxCount (USB_OTG_CORE_HANDLE *pdev ,
uint8_t epnum);
/**
* @}
*/
#endif /* __USBD_IOREQ_H_ */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+153
View File
@@ -0,0 +1,153 @@
/**
******************************************************************************
* @file usbd_msc_bot.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header for the usbd_msc_bot.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#include "usbd_core.h"
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_MSC_BOT_H
#define __USBD_MSC_BOT_H
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup MSC_BOT
* @brief This file is the Header file for usbd_bot.c
* @{
*/
/** @defgroup USBD_CORE_Exported_Defines
* @{
*/
#define BOT_IDLE 0 /* Idle state */
#define BOT_DATA_OUT 1 /* Data Out state */
#define BOT_DATA_IN 2 /* Data In state */
#define BOT_LAST_DATA_IN 3 /* Last Data In Last */
#define BOT_SEND_DATA 4 /* Send Immediate data */
#define BOT_CBW_SIGNATURE 0x43425355
#define BOT_CSW_SIGNATURE 0x53425355
#define BOT_CBW_LENGTH 31
#define BOT_CSW_LENGTH 13
/* CSW Status Definitions */
#define CSW_CMD_PASSED 0x00
#define CSW_CMD_FAILED 0x01
#define CSW_PHASE_ERROR 0x02
/* BOT Status */
#define BOT_STATE_NORMAL 0
#define BOT_STATE_RECOVERY 1
#define BOT_STATE_ERROR 2
#define DIR_IN 0
#define DIR_OUT 1
#define BOTH_DIR 2
/**
* @}
*/
/** @defgroup MSC_CORE_Private_TypesDefinitions
* @{
*/
typedef struct _MSC_BOT_CBW
{
uint32_t dSignature;
uint32_t dTag;
uint32_t dDataLength;
uint8_t bmFlags;
uint8_t bLUN;
uint8_t bCBLength;
uint8_t CB[16];
}
MSC_BOT_CBW_TypeDef;
typedef struct _MSC_BOT_CSW
{
uint32_t dSignature;
uint32_t dTag;
uint32_t dDataResidue;
uint8_t bStatus;
}
MSC_BOT_CSW_TypeDef;
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_Types
* @{
*/
extern uint8_t MSC_BOT_Data[];
extern uint16_t MSC_BOT_DataLen;
extern uint8_t MSC_BOT_State;
extern uint8_t MSC_BOT_BurstMode;
extern MSC_BOT_CBW_TypeDef MSC_BOT_cbw;
extern MSC_BOT_CSW_TypeDef MSC_BOT_csw;
/**
* @}
*/
/** @defgroup USBD_CORE_Exported_FunctionsPrototypes
* @{
*/
void MSC_BOT_Init (USB_OTG_CORE_HANDLE *pdev);
void MSC_BOT_Reset (USB_OTG_CORE_HANDLE *pdev);
void MSC_BOT_DeInit (USB_OTG_CORE_HANDLE *pdev);
void MSC_BOT_DataIn (USB_OTG_CORE_HANDLE *pdev,
uint8_t epnum);
void MSC_BOT_DataOut (USB_OTG_CORE_HANDLE *pdev,
uint8_t epnum);
void MSC_BOT_SendCSW (USB_OTG_CORE_HANDLE *pdev,
uint8_t CSW_Status);
void MSC_BOT_CplClrFeature (USB_OTG_CORE_HANDLE *pdev,
uint8_t epnum);
/**
* @}
*/
#endif /* __USBD_MSC_BOT_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+77
View File
@@ -0,0 +1,77 @@
/**
******************************************************************************
* @file usbd_msc_core.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header for the usbd_msc_core.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef _USB_MSC_CORE_H_
#define _USB_MSC_CORE_H_
#include "usbd_ioreq.h"
/** @addtogroup USBD_MSC_BOT
* @{
*/
/** @defgroup USBD_MSC
* @brief This file is the Header file for USBD_msc.c
* @{
*/
/** @defgroup USBD_BOT_Exported_Defines
* @{
*/
#define BOT_GET_MAX_LUN 0xFE
#define BOT_RESET 0xFF
#define USB_MSC_CONFIG_DESC_SIZ 32
#define MSC_EPIN_SIZE MSC_MAX_PACKET
#define MSC_EPOUT_SIZE MSC_MAX_PACKET
/**
* @}
*/
/** @defgroup USB_CORE_Exported_Types
* @{
*/
extern USBD_Class_cb_TypeDef USBD_MSC_cb;
/**
* @}
*/
/**
* @}
*/
#endif // _USB_MSC_CORE_H_
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+104
View File
@@ -0,0 +1,104 @@
/**
******************************************************************************
* @file usbd_msc_data.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header for the usbd_msc_data.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef _USBD_MSC_DATA_H_
#define _USBD_MSC_DATA_H_
/* Includes ------------------------------------------------------------------*/
#include "usbd_conf.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USB_INFO
* @brief general defines for the usb device library file
* @{
*/
/** @defgroup USB_INFO_Exported_Defines
* @{
*/
#define MODE_SENSE6_LEN 8
#define MODE_SENSE10_LEN 8
#define LENGTH_INQUIRY_PAGE00 7
#define LENGTH_FORMAT_CAPACITIES 20
/**
* @}
*/
/** @defgroup USBD_INFO_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup USBD_INFO_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_INFO_Exported_Variables
* @{
*/
extern const uint8_t MSC_Page00_Inquiry_Data[];
extern const uint8_t MSC_Mode_Sense6_data[];
extern const uint8_t MSC_Mode_Sense10_data[] ;
/**
* @}
*/
/** @defgroup USBD_INFO_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
#endif /* _USBD_MSC_DATA_H_ */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+112
View File
@@ -0,0 +1,112 @@
/**
******************************************************************************
* @file usbd_msc_mem.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header for the STORAGE DISK file file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_MEM_H
#define __USBD_MEM_H
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_MEM
* @brief header file for the storage disk file
* @{
*/
/** @defgroup USBD_MEM_Exported_Defines
* @{
*/
#define USBD_STD_INQUIRY_LENGTH 36
/**
* @}
*/
/** @defgroup USBD_MEM_Exported_TypesDefinitions
* @{
*/
typedef struct _USBD_STORAGE
{
int8_t (* Init) (uint8_t lun);
int8_t (* GetCapacity) (uint8_t lun, uint32_t *block_num, uint32_t *block_size);
int8_t (* IsReady) (uint8_t lun);
int8_t (* IsWriteProtected) (uint8_t lun);
int8_t (* Read) (uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
int8_t (* Write)(uint8_t lun, uint8_t *buf, uint32_t blk_addr, uint16_t blk_len);
int8_t (* GetMaxLun)(void);
int8_t *pInquiry;
}USBD_STORAGE_cb_TypeDef;
/**
* @}
*/
/** @defgroup USBD_MEM_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_MEM_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_MEM_Exported_FunctionsPrototype
* @{
*/
extern USBD_STORAGE_cb_TypeDef *USBD_STORAGE_fops;
/**
* @}
*/
#endif /* __USBD_MEM_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+195
View File
@@ -0,0 +1,195 @@
/**
******************************************************************************
* @file usbd_msc_scsi.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header for the usbd_msc_scsi.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_MSC_SCSI_H
#define __USBD_MSC_SCSI_H
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_SCSI
* @brief header file for the storage disk file
* @{
*/
/** @defgroup USBD_SCSI_Exported_Defines
* @{
*/
#define SENSE_LIST_DEEPTH 4
/* SCSI Commands */
#define SCSI_FORMAT_UNIT 0x04
#define SCSI_INQUIRY 0x12
#define SCSI_MODE_SELECT6 0x15
#define SCSI_MODE_SELECT10 0x55
#define SCSI_MODE_SENSE6 0x1A
#define SCSI_MODE_SENSE10 0x5A
#define SCSI_ALLOW_MEDIUM_REMOVAL 0x1E
#define SCSI_READ6 0x08
#define SCSI_READ10 0x28
#define SCSI_READ12 0xA8
#define SCSI_READ16 0x88
#define SCSI_READ_CAPACITY10 0x25
#define SCSI_READ_CAPACITY16 0x9E
#define SCSI_REQUEST_SENSE 0x03
#define SCSI_START_STOP_UNIT 0x1B
#define SCSI_TEST_UNIT_READY 0x00
#define SCSI_WRITE6 0x0A
#define SCSI_WRITE10 0x2A
#define SCSI_WRITE12 0xAA
#define SCSI_WRITE16 0x8A
#define SCSI_VERIFY10 0x2F
#define SCSI_VERIFY12 0xAF
#define SCSI_VERIFY16 0x8F
#define SCSI_SEND_DIAGNOSTIC 0x1D
#define SCSI_READ_FORMAT_CAPACITIES 0x23
#define NO_SENSE 0
#define RECOVERED_ERROR 1
#define NOT_READY 2
#define MEDIUM_ERROR 3
#define HARDWARE_ERROR 4
#define ILLEGAL_REQUEST 5
#define UNIT_ATTENTION 6
#define DATA_PROTECT 7
#define BLANK_CHECK 8
#define VENDOR_SPECIFIC 9
#define COPY_ABORTED 10
#define ABORTED_COMMAND 11
#define VOLUME_OVERFLOW 13
#define MISCOMPARE 14
#define INVALID_CDB 0x20
#define INVALID_FIELED_IN_COMMAND 0x24
#define PARAMETER_LIST_LENGTH_ERROR 0x1A
#define INVALID_FIELD_IN_PARAMETER_LIST 0x26
#define ADDRESS_OUT_OF_RANGE 0x21
#define MEDIUM_NOT_PRESENT 0x3A
#define MEDIUM_HAVE_CHANGED 0x28
#define WRITE_PROTECTED 0x27
#define UNRECOVERED_READ_ERROR 0x11
#define WRITE_FAULT 0x03
#define READ_FORMAT_CAPACITY_DATA_LEN 0x0C
#define READ_CAPACITY10_DATA_LEN 0x08
#define MODE_SENSE10_DATA_LEN 0x08
#define MODE_SENSE6_DATA_LEN 0x04
#define REQUEST_SENSE_DATA_LEN 0x12
#define STANDARD_INQUIRY_DATA_LEN 0x24
#define BLKVFY 0x04
extern uint8_t Page00_Inquiry_Data[];
extern uint8_t Standard_Inquiry_Data[];
extern uint8_t Standard_Inquiry_Data2[];
extern uint8_t Mode_Sense6_data[];
extern uint8_t Mode_Sense10_data[];
extern uint8_t Scsi_Sense_Data[];
extern uint8_t ReadCapacity10_Data[];
extern uint8_t ReadFormatCapacity_Data [];
/**
* @}
*/
/** @defgroup USBD_SCSI_Exported_TypesDefinitions
* @{
*/
typedef struct _SENSE_ITEM {
char Skey;
union {
struct _ASCs {
char ASC;
char ASCQ;
}b;
unsigned int ASC;
char *pData;
} w;
} SCSI_Sense_TypeDef;
/**
* @}
*/
/** @defgroup USBD_SCSI_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_SCSI_Exported_Variables
* @{
*/
extern SCSI_Sense_TypeDef SCSI_Sense [SENSE_LIST_DEEPTH];
extern uint8_t SCSI_Sense_Head;
extern uint8_t SCSI_Sense_Tail;
/**
* @}
*/
/** @defgroup USBD_SCSI_Exported_FunctionsPrototype
* @{
*/
int8_t SCSI_ProcessCmd(USB_OTG_CORE_HANDLE *pdev,
uint8_t lun,
uint8_t *cmd);
void SCSI_SenseCode(uint8_t lun,
uint8_t sKey,
uint8_t ASC);
/**
* @}
*/
#endif /* __USBD_MSC_SCSI_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+108
View File
@@ -0,0 +1,108 @@
/**
******************************************************************************
* @file usbd_req.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief header file for the usbd_req.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USB_REQUEST_H_
#define __USB_REQUEST_H_
/* Includes ------------------------------------------------------------------*/
#include "usbd_def.h"
#include "usbd_core.h"
#include "usbd_conf.h"
/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
* @{
*/
/** @defgroup USBD_REQ
* @brief header file for the usbd_ioreq.c file
* @{
*/
/** @defgroup USBD_REQ_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup USBD_REQ_Exported_FunctionsPrototype
* @{
*/
USBD_Status USBD_StdDevReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req);
USBD_Status USBD_StdItfReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req);
USBD_Status USBD_StdEPReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req);
void USBD_ParseSetupRequest( USB_OTG_CORE_HANDLE *pdev,
USB_SETUP_REQ *req);
void USBD_CtlError( USB_OTG_CORE_HANDLE *pdev,
USB_SETUP_REQ *req);
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len);
/**
* @}
*/
#endif /* __USB_REQUEST_H_ */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+141
View File
@@ -0,0 +1,141 @@
/**
******************************************************************************
* @file usbd_usr.h
* @author MCD Application Team
* @version V1.1.0
* @date 19-March-2012
* @brief Header file for usbd_usr.c
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBD_USR_H__
#define __USBD_USR_H__
/* Includes ------------------------------------------------------------------*/
#include "usbd_core.h"
/** @addtogroup USBD_USER
* @{
*/
/** @addtogroup USBD_MSC_DEMO_USER_CALLBACKS
* @{
*/
/** @defgroup USBD_USR
* @brief This file is the Header file for usbd_usr.c
* @{
*/
/** @defgroup USBD_USR_Exported_Types
* @{
*/
extern USBD_Usr_cb_TypeDef USR_cb;
extern USBD_Usr_cb_TypeDef USR_FS_cb;
extern USBD_Usr_cb_TypeDef USR_HS_cb;
/**
* @}
*/
/** @defgroup USBD_USR_Exported_Defines
* @{
*/
/**
* @}
*/
/** @defgroup USBD_USR_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup USBD_USR_Exported_Variables
* @{
*/
void USBD_USR_Init(void);
void USBD_USR_DeviceReset (uint8_t speed);
void USBD_USR_DeviceConfigured (void);
void USBD_USR_DeviceSuspended(void);
void USBD_USR_DeviceResumed(void);
void USBD_USR_DeviceConnected(void);
void USBD_USR_DeviceDisconnected(void);
void USBD_USR_FS_Init(void);
void USBD_USR_FS_DeviceReset (uint8_t speed);
void USBD_USR_FS_DeviceConfigured (void);
void USBD_USR_FS_DeviceSuspended(void);
void USBD_USR_FS_DeviceResumed(void);
void USBD_USR_FS_DeviceConnected(void);
void USBD_USR_FS_DeviceDisconnected(void);
void USBD_USR_HS_Init(void);
void USBD_USR_HS_DeviceReset (uint8_t speed);
void USBD_USR_HS_DeviceConfigured (void);
void USBD_USR_HS_DeviceSuspended(void);
void USBD_USR_HS_DeviceResumed(void);
void USBD_USR_HS_DeviceConnected(void);
void USBD_USR_HS_DeviceDisconnected(void);
/**
* @}
*/
/** @defgroup USBD_USR_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
#endif /*__USBD_USR_H__*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/