Cleanup and streamlining
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@@ -25,12 +25,6 @@
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#include "hal.h"
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#include "timers_driver.h"
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#if defined(CROSSFIRE)
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#include "pulses/crossfire.h"
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#endif
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#define STOP_TIMER_ON_LAST_UPDATE
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static const stm32_pulse_timer_t extmoduleTimer = {
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.GPIOx = EXTMODULE_TX_GPIO,
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.GPIO_Pin = EXTMODULE_TX_GPIO_PIN,
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@@ -45,53 +39,23 @@ static const stm32_pulse_timer_t extmoduleTimer = {
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.DMA_IRQn = EXTMODULE_TIMER_DMA_STREAM_IRQn,
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};
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#if defined(STOP_TIMER_ON_LAST_UPDATE)
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static_assert(EXTMODULE_TIMER_Channel == LL_TIM_CHANNEL_CH1
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|| EXTMODULE_TIMER_Channel == LL_TIM_CHANNEL_CH1N
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|| EXTMODULE_TIMER_Channel == LL_TIM_CHANNEL_CH3,
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// Make sure the timer channel is supported
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static_assert(__STM32_PULSE_IS_TIMER_CHANNEL_SUPPORTED(EXTMODULE_TIMER_Channel),
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"Unsupported timer channel");
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static void set_compare_reg(uint32_t val)
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{
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switch(EXTMODULE_TIMER_Channel){
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case LL_TIM_CHANNEL_CH1:
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case LL_TIM_CHANNEL_CH1N:
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LL_TIM_OC_SetCompareCH1(EXTMODULE_TIMER, val);
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break;
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case LL_TIM_CHANNEL_CH3:
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LL_TIM_OC_SetCompareCH3(EXTMODULE_TIMER, val);
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break;
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}
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}
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// Make sure the DMA channel is supported
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static_assert(__STM32_PULSE_IS_DMA_STREAM_SUPPORTED(EXTMODULE_TIMER_DMA_STREAM_LL),
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"Unsupported DMA stream");
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extern "C" void EXTMODULE_TIMER_DMA_IRQHandler()
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{
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if (!LL_DMA_IsActiveFlag_TC5(EXTMODULE_TIMER_DMA))
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return;
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LL_DMA_ClearFlag_TC5(EXTMODULE_TIMER_DMA);
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LL_TIM_ClearFlag_UPDATE(EXTMODULE_TIMER);
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LL_TIM_EnableIT_UPDATE(EXTMODULE_TIMER);
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set_compare_reg(0);
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LL_TIM_OC_SetMode(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel, LL_TIM_OCMODE_PWM1);
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stm32_pulse_dma_tc_isr(&extmoduleTimer);
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}
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extern "C" void EXTMODULE_TIMER_IRQHandler()
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{
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if (!LL_TIM_IsActiveFlag_UPDATE(EXTMODULE_TIMER))
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return;
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LL_TIM_ClearFlag_UPDATE(EXTMODULE_TIMER);
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LL_TIM_DisableIT_UPDATE(EXTMODULE_TIMER);
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// Halt pulses and force to inactive level
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LL_TIM_OC_SetMode(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel,
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LL_TIM_OCMODE_FORCED_INACTIVE);
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stm32_pulse_tim_update_isr(&extmoduleTimer);
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}
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#endif
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void extmoduleStop()
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{
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@@ -135,23 +99,15 @@ void extmodulePpmStart(uint16_t ppm_delay, bool polarity)
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void extmoduleSendNextFramePpm(void* pulses, uint16_t length,
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uint16_t ppm_delay, bool polarity)
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{
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if (!stm32_pulse_stop_if_running(&extmoduleTimer))
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if (!stm32_pulse_if_not_running_disable(&extmoduleTimer))
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return;
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// Config output
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set_compare_reg(ppm_delay * 2);
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uint32_t ll_polarity;
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if (polarity) {
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ll_polarity = LL_TIM_OCPOLARITY_LOW;
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} else {
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ll_polarity = LL_TIM_OCPOLARITY_HIGH;
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}
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LL_TIM_OC_SetPolarity(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel, ll_polarity);
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LL_TIM_OC_SetMode(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel, LL_TIM_OCMODE_PWM1);
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// Set polarity
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stm32_pulse_set_polarity(&extmoduleTimer, !polarity);
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// Start DMA request and re-enable timer
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stm32_pulse_start_dma_req(&extmoduleTimer, pulses, length);
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stm32_pulse_start_dma_req(&extmoduleTimer, pulses, length,
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LL_TIM_OCMODE_PWM1, ppm_delay * 2);
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}
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#if defined(PXX1)
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@@ -174,14 +130,12 @@ void extmodulePxx1PulsesStart()
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void extmoduleSendNextFramePxx1(const void* pulses, uint16_t length)
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{
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if (!stm32_pulse_stop_if_running(&extmoduleTimer))
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if (!stm32_pulse_if_not_running_disable(&extmoduleTimer))
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return;
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set_compare_reg(9 * 2);
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LL_TIM_OC_SetMode(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel, LL_TIM_OCMODE_PWM1);
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// Start DMA request and re-enable timer
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stm32_pulse_start_dma_req(&extmoduleTimer, pulses, length);
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stm32_pulse_start_dma_req(&extmoduleTimer, pulses, length,
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LL_TIM_OCMODE_PWM1, 9 * 2);
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}
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#endif
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@@ -204,20 +158,14 @@ void extmoduleSerialStart()
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void extmoduleSendNextFrameSoftSerial(const void* pulses, uint16_t length, bool polarity)
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{
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if (!stm32_pulse_stop_if_running(&extmoduleTimer))
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if (!stm32_pulse_if_not_running_disable(&extmoduleTimer))
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return;
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uint32_t ll_polarity;
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if (polarity) {
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ll_polarity = LL_TIM_OCPOLARITY_HIGH;
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} else {
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ll_polarity = LL_TIM_OCPOLARITY_LOW;
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}
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LL_TIM_OC_SetPolarity(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel, ll_polarity);
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LL_TIM_OC_SetMode(EXTMODULE_TIMER, EXTMODULE_TIMER_Channel, LL_TIM_OCMODE_TOGGLE);
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// Set polarity
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stm32_pulse_set_polarity(&extmoduleTimer, polarity);
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// Start DMA request and re-enable timer
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stm32_pulse_start_dma_req(&extmoduleTimer, pulses, length);
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stm32_pulse_start_dma_req(&extmoduleTimer, pulses, length, LL_TIM_OCMODE_TOGGLE, 0);
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}
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// Delay based byte sending @ 57600 bps
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