From 2b367b6814a652e6a8065cd6a855093cb8ec379f Mon Sep 17 00:00:00 2001 From: Andre Bernet Date: Thu, 22 May 2014 23:40:24 +0200 Subject: [PATCH] Translation fixes --- radio/src/translations/en.h.txt | 2 +- radio/src/translations/fr.h.txt | 14 ++++++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/radio/src/translations/en.h.txt b/radio/src/translations/en.h.txt index a1bdf10d5..7dfad8e15 100644 --- a/radio/src/translations/en.h.txt +++ b/radio/src/translations/en.h.txt @@ -299,7 +299,7 @@ #if defined(PCBTARANIS) #define TR_TELEM_RSSI_RX "RSSI\0" #else - #define TR_TELEM_RSSI_RX TR("Rx\0 ", "Rx\0 ") + #define TR_TELEM_RSSI_RX TR("Rx\0 ", "Rx\0 ") #endif #if LCD_W >= 212 diff --git a/radio/src/translations/fr.h.txt b/radio/src/translations/fr.h.txt index e790a71d3..8e216df96 100644 --- a/radio/src/translations/fr.h.txt +++ b/radio/src/translations/fr.h.txt @@ -294,7 +294,13 @@ #define TR_A3_A4_MIN #endif -#define TR_ASPD_MAX "ViA+" +#define TR_ASPD_MAX TR("ViA+","VitA+") + +#if defined(PCBTARANIS) + #define TR_TELEM_RSSI_RX "RSSI\0" +#else + #define TR_TELEM_RSSI_RX TR("Rx\0 ", "Rx\0 ") +#endif #if LCD_W >= 212 #define TR_VTELEMCHNS "---\0 ""Batt\0" TR_TELEM_TIME TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE "Chr1\0""Chr2\0" TR_SWR "Tx\0 ""Rx\0 " TR_RX_BATT "A1\0 ""A2\0 " TR_A3_A4 "Alt\0 ""Rpm\0 ""Carbu""T1\0 ""T2\0 ""Vit\0 ""Dist\0""AltG""Elem\0""Velm\0""Vfas\0""Cour\0""Consm""Puiss""AccX\0""AccY\0""AccZ\0""Cap\0 ""VitV\0""VitA\0""dET\0 " TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE "A1-\0 ""A2-\0 " TR_A3_A4_MIN "Alt-\0""Alt+\0""Rpm+\0""T1+\0 ""T2+\0 ""Vit+\0""Dst+\0" TR_ASPD_MAX "Elem-""Els-\0""Vfas-""Curr+""Puis+" TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE TR_TELEM_RESERVE "Accel""Temps" @@ -406,11 +412,11 @@ #if defined(PCBTARANIS) #define TR_6POS_POTS "S11""S12""S13""S14""S15""S16""S21""S22""S23""S24""S25""S26""S31""S32""S33""S34""S35""S36" - #define TR_VSWITCHES "SA\300""SA-""SA\301""SB\300""SB-""SB\301""SC\300""SC-""SC\301""SD\300""SD-""SD\301""SE\300""SE-""SE\301""SF\300""SF\301""SG\300""SG-""SG\301""SH\300""SH\301" TR_6POS_POTS TR_TRIMS_SWITCHES TR_ROTENC_SWITCHES TR_LOGICALSW + #define TR_VSWITCHES "---""SA\300""SA-""SA\301""SB\300""SB-""SB\301""SC\300""SC-""SC\301""SD\300""SD-""SD\301""SE\300""SE-""SE\301""SF\300""SF\301""SG\300""SG-""SG\301""SH\300""SH\301" TR_6POS_POTS TR_TRIMS_SWITCHES TR_ROTENC_SWITCHES TR_LOGICALSW "ON\0" "Un" #elif defined(CPUARM) - #define TR_VSWITCHES TR_9X_3POS_SWITCHES "THR""RUD""ELE""AIL""GEA""TRN" TR_TRIMS_SWITCHES TR_ROTENC_SWITCHES TR_LOGICALSW + #define TR_VSWITCHES "---" TR_9X_3POS_SWITCHES "THR""RUD""ELE""AIL""GEA""TRN" TR_TRIMS_SWITCHES TR_ROTENC_SWITCHES TR_LOGICALSW "ON\0" "Un" #else - #define TR_VSWITCHES TR_9X_3POS_SWITCHES "THR""RUD""ELE""AIL""GEA""TRN" TR_TRIMS_SWITCHES TR_ROTENC_SWITCHES TR_LOGICALSW + #define TR_VSWITCHES "---" TR_9X_3POS_SWITCHES "THR""RUD""ELE""AIL""GEA""TRN" TR_TRIMS_SWITCHES TR_ROTENC_SWITCHES TR_LOGICALSW "ON\0" "Un" #endif #if defined(HELI)