Makefile now ok with the ersky9x board
This commit is contained in:
bsongis
+151
-12
@@ -21,9 +21,7 @@
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#include "inttypes.h"
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#include "string.h"
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extern PROGMEM s9xsplash[] ;
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volatile uint32_t Spi_complete ;
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// Logic for storing to EERPOM/loading from EEPROM
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// If main needs to wait for the eeprom, call mainsequence without actioning menus
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@@ -265,6 +263,105 @@ void ee32_update_name( uint32_t id, uint8_t *source )
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}
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}
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uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count )
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{
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register Spi *spiptr ;
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// register uint32_t result ;
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register uint32_t condition ;
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static uint8_t discard_rx_command[4] ;
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// PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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Spi_complete = 0 ;
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if ( comlen > 4 )
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{
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Spi_complete = 1 ;
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return 0x4FFFF ;
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}
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condition = SPI_SR_TXEMPTY ;
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spiptr = SPI ;
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spiptr->SPI_CR = 1 ; // Enable
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(void) spiptr->SPI_RDR ; // Dump any rx data
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(void) spiptr->SPI_SR ; // Clear error flags
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spiptr->SPI_RPR = (uint32_t)discard_rx_command ;
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spiptr->SPI_RCR = comlen ;
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if ( rx )
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{
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spiptr->SPI_RNPR = (uint32_t)rx ;
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spiptr->SPI_RNCR = count ;
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condition = SPI_SR_RXBUFF ;
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}
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spiptr->SPI_TPR = (uint32_t)command ;
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spiptr->SPI_TCR = comlen ;
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if ( tx )
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{
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spiptr->SPI_TNPR = (uint32_t)tx ;
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}
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else
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{
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spiptr->SPI_TNPR = (uint32_t)rx ;
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}
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spiptr->SPI_TNCR = count ;
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spiptr->SPI_PTCR = SPI_PTCR_RXTEN | SPI_PTCR_TXTEN ; // Start transfers
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// Wait for things to get started, avoids early interrupt
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for ( count = 0 ; count < 1000 ; count += 1 )
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{
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if ( ( spiptr->SPI_SR & SPI_SR_TXEMPTY ) == 0 )
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{
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break ;
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}
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}
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spiptr->SPI_IER = condition ;
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return 0 ;
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}
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uint32_t eeprom_write_one( uint8_t byte, uint8_t count )
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{
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register Spi *spiptr ;
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register uint32_t result ;
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spiptr = SPI ;
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spiptr->SPI_CR = 1 ; // Enable
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(void) spiptr->SPI_RDR ; // Dump any rx data
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spiptr->SPI_TDR = byte ;
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result = 0 ;
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while( ( spiptr->SPI_SR & SPI_SR_RDRF ) == 0 )
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{
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// wait for received
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if ( ++result > 10000 )
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{
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break ;
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}
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}
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if ( count == 0 )
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{
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spiptr->SPI_CR = 2 ; // Disable
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return spiptr->SPI_RDR ;
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}
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(void) spiptr->SPI_RDR ; // Dump the rx data
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spiptr->SPI_TDR = 0 ;
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result = 0 ;
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while( ( spiptr->SPI_SR & SPI_SR_RDRF ) == 0 )
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{
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// wait for received
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if ( ++result > 10000 )
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{
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break ;
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}
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}
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spiptr->SPI_CR = 2 ; // Disable
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return spiptr->SPI_RDR ;
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}
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void eeprom_write_enable()
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{
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eeprom_write_one( 6, 0 ) ;
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}
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// Read eeprom data starting at random address
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uint32_t read32_eeprom_data( uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate )
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@@ -435,15 +532,9 @@ bool ee32LoadGeneral()
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read32_eeprom_data( ( File_system[0].block_no << 12) + sizeof( struct t_eeprom_header), ( uint8_t *)&g_eeGeneral, size, 0 ) ;
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}
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for(uint8_t i=0; i<sizeof(g_eeGeneral.ownerName);i++) // makes sure name is valid
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{
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uint8_t idx = char2idx(g_eeGeneral.ownerName[i]);
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g_eeGeneral.ownerName[i] = idx2char(idx);
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}
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if(g_eeGeneral.myVers<MDVERS)
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/*if(g_eeGeneral.myVers<MDVERS)
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sysFlags |= sysFLAG_OLD_EEPROM; // if old EEPROM - Raise flag
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*/
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g_eeGeneral.myVers = MDVERS; // update myvers
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uint16_t sum=0;
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@@ -539,6 +630,54 @@ void fill_file_index()
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}
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}
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// TODO => eeprom_arm
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// SPI i/f to EEPROM (4Mb)
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// Peripheral ID 21 (0x00200000)
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// Connections:
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// SS PA11 (peripheral A)
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// MISO PA12 (peripheral A)
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// MOSI PA13 (peripheral A)
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// SCK PA14 (peripheral A)
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// Set clock to 3 MHz, AT25 device is rated to 70MHz, 18MHz would be better
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void init_spi()
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{
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register Pio *pioptr ;
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register Spi *spiptr ;
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register uint32_t timer ;
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register uint8_t *p ;
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uint8_t spi_buf[4] ;
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PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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/* Configure PIO */
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pioptr = PIOA ;
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pioptr->PIO_ABCDSR[0] &= ~0x00007800 ; // Peripheral A bits 14,13,12,11
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pioptr->PIO_ABCDSR[1] &= ~0x00007800 ; // Peripheral A
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pioptr->PIO_PDR = 0x00007800 ; // Assign to peripheral
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spiptr = SPI ;
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timer = ( Master_frequency / 3000000 ) << 8 ; // Baud rate 3Mb/s
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spiptr->SPI_MR = 0x14000011 ; // 0001 0100 0000 0000 0000 0000 0001 0001 Master
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spiptr->SPI_CSR[0] = 0x01180009 | timer ; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
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NVIC_EnableIRQ(SPI_IRQn) ;
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p = spi_buf ;
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// *p = 0x39 ; // Unprotect sector command
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// *(p+1) = 0 ;
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// *(p+2) = 0 ;
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// *(p+3) = 0 ; // 3 bytes address
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// spi_operation( p, spi_buf, 4 ) ;
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eeprom_write_enable() ;
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*p = 1 ; // Write status register command
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*(p+1) = 0 ;
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spi_operation( p, spi_buf, 2 ) ;
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}
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void init_ee32()
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{
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fill_file_index() ;
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@@ -1458,5 +1597,5 @@ uint32_t unprotect_eeprom()
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//}
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}
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