diff --git a/src/Makefile b/src/Makefile index 98a8cfd76..1ae663fce 100644 --- a/src/Makefile +++ b/src/Makefile @@ -428,12 +428,11 @@ endif RUN_FROM_FLASH = 1 ifeq ($(PCB), X9D) - # V4 ARM, so ... + # X9D, so ... OPT = 2 CPPDEFS += -DPCBX9D -DPCBARM -DAUDIO -DHAPTIC -DPXX -DDSM2 -DDSM2_PPM -DROTARY_ENCODERS=1 - EXTRAINCDIRS += ersky9x ersky9x/libraries ersky9x/libraries/board ersky9x/libraries/drivers CoOS/kernel CoOS/portable + EXTRAINCDIRS += ersky9x ersky9x/libraries ersky9x/libraries/drivers CoOS/kernel CoOS/portable BOARDSRC = board_ersky9x.cpp - SRC += ersky9x/libraries/usb/device/massstorage/SBCMethods.c ersky9x/libraries/memories/mci_cmd_pdc.c SRC += ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c SRC += CoOS/kernel/core.c CoOS/kernel/hook.c CoOS/kernel/task.c CoOS/kernel/event.c CoOS/kernel/time.c CoOS/kernel/timer.c CoOS/kernel/flag.c CoOS/kernel/mutex.c CoOS/kernel/serviceReq.c CoOS/portable/GCC/port.c CoOS/portable/arch.c SRC += ersky9x/libraries/usb/device/core/USBD_UDP.c ersky9x/libraries/drivers/pmc/pmc.c ersky9x/libraries/drivers/pio/pio.c ersky9x/libraries/drivers/pio/pio_it.c ersky9x/libraries/usb/common/core/USBEndpointDescriptor.c ersky9x/libraries/usb/common/core/USBGenericRequest.c ersky9x/libraries/usb/device/massstorage/MSDDriver.c ersky9x/libraries/usb/device/core/USBDDriver.c ersky9x/libraries/usb/common/core/USBFeatureRequest.c ersky9x/libraries/usb/device/massstorage/MSDDStateMachine.c @@ -441,10 +440,11 @@ ifeq ($(PCB), X9D) SRC += ersky9x/libraries/usb/device/core/USBDCallbacks_Resumed.c ersky9x/libraries/usb/device/core/USBDCallbacks_Reset.c ersky9x/libraries/usb/device/core/USBDCallbacks_Suspended.c ersky9x/libraries/usb/device/core/USBDCallbacks_Initialized.c ersky9x/libraries/usb/device/core/USBDDriverCb_IfSettingChanged.c # TODO remove them SRC += ersky9x/libraries/usb/device/massstorage/MSDLun.c ersky9x/libraries/usb/device/massstorage/MSDDriverDescriptors.c SRC += ersky9x/syscalls.c + SRC += ersky9x/libraries/usb/device/massstorage/SBCMethods.c ersky9x/libraries/memories/MEDSdcard.c EEPROMSRC = eeprom_arm.cpp PULSESSRC = pulses_arm.cpp CPPSRC += ersky9x/audio.cpp haptic.cpp - CPPSRC += ersky9x/sound_driver.cpp ersky9x/haptic_driver.cpp ersky9x/sdcard.cpp + CPPSRC += ersky9x/sound_driver.cpp ersky9x/haptic_driver.cpp ersky9x/sdcard_driver.cpp ifeq ($(SDCARD), YES) SRC += FatFs/ff.c FatFs/fattime.c FatFs/option/ccsbcs.c ersky9x/diskio.c @@ -463,19 +463,11 @@ ifeq ($(PCB), X9D) endif ifeq ($(PCB), ARM) - # Sky9x, so ... + # ARM, so ... OPT = 2 CPPDEFS += -DPCBARM -DAUDIO -DHAPTIC -DPXX -DDSM2 -DDSM2_PPM -DROTARY_ENCODERS=1 - EXTRAINCDIRS += ersky9x ersky9x/libraries ersky9x/libraries/board ersky9x/libraries/drivers CoOS/kernel CoOS/portable - BOARDSRC = board_ersky9x.cpp - - ifeq ($(SDCARD), YES) - SRC += FatFs/ff.c FatFs/fattime.c FatFs/option/ccsbcs.c ersky9x/diskio.c - CPPDEFS += -DVOICE - endif - - SRC += ersky9x/libraries/usb/device/massstorage/SBCMethods.c ersky9x/libraries/memories/Media.c ersky9x/libraries/memories/MEDSdmmc.c ersky9x/libraries/memories/mci_cmd_pdc.c - SRC += ersky9x/libraries/memories/sdmmc.c ersky9x/libraries/drivers/hsmci/hsmci_pdc.c + EXTRAINCDIRS += ersky9x ersky9x/libraries ersky9x/libraries/drivers CoOS/kernel CoOS/portable + BOARDSRC = board_ersky9x.cpp SRC += ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c SRC += CoOS/kernel/core.c CoOS/kernel/hook.c CoOS/kernel/task.c CoOS/kernel/event.c CoOS/kernel/time.c CoOS/kernel/timer.c CoOS/kernel/flag.c CoOS/kernel/mutex.c CoOS/kernel/serviceReq.c CoOS/portable/GCC/port.c CoOS/portable/arch.c SRC += ersky9x/libraries/usb/device/core/USBD_UDP.c ersky9x/libraries/drivers/pmc/pmc.c ersky9x/libraries/drivers/pio/pio.c ersky9x/libraries/drivers/pio/pio_it.c ersky9x/libraries/usb/common/core/USBEndpointDescriptor.c ersky9x/libraries/usb/common/core/USBGenericRequest.c ersky9x/libraries/usb/device/massstorage/MSDDriver.c ersky9x/libraries/usb/device/core/USBDDriver.c ersky9x/libraries/usb/common/core/USBFeatureRequest.c ersky9x/libraries/usb/device/massstorage/MSDDStateMachine.c @@ -483,11 +475,16 @@ ifeq ($(PCB), ARM) SRC += ersky9x/libraries/usb/device/core/USBDCallbacks_Resumed.c ersky9x/libraries/usb/device/core/USBDCallbacks_Reset.c ersky9x/libraries/usb/device/core/USBDCallbacks_Suspended.c ersky9x/libraries/usb/device/core/USBDCallbacks_Initialized.c ersky9x/libraries/usb/device/core/USBDDriverCb_IfSettingChanged.c # TODO remove them SRC += ersky9x/libraries/usb/device/massstorage/MSDLun.c ersky9x/libraries/usb/device/massstorage/MSDDriverDescriptors.c SRC += ersky9x/syscalls.c + SRC += ersky9x/libraries/usb/device/massstorage/SBCMethods.c ersky9x/libraries/memories/MEDSdcard.c EEPROMSRC = eeprom_arm.cpp PULSESSRC = pulses_arm.cpp CPPSRC += ersky9x/audio.cpp haptic.cpp - CPPSRC += ersky9x/sound_driver.cpp ersky9x/haptic_driver.cpp ersky9x/sdcard.cpp + CPPSRC += ersky9x/sound_driver.cpp ersky9x/haptic_driver.cpp ersky9x/sdcard_driver.cpp + ifeq ($(SDCARD), YES) + SRC += FatFs/ff.c FatFs/fattime.c FatFs/option/ccsbcs.c ersky9x/diskio.c + CPPDEFS += -DVOICE + endif ifeq ($(BLUETOOTH), YES) MODS:=${MODS}S diff --git a/src/board_ersky9x.cpp b/src/board_ersky9x.cpp index 15fc50741..da305f897 100644 --- a/src/board_ersky9x.cpp +++ b/src/board_ersky9x.cpp @@ -32,6 +32,7 @@ */ #include "open9x.h" +#include "ersky9x/board.h" uint32_t Master_frequency ; volatile uint32_t Tenms ; @@ -799,6 +800,8 @@ void board_init() init_rotary_encoder(); + init_SDcard(); + } #endif @@ -1228,29 +1231,3 @@ uint16_t getCurrent() return (current_scale * Current) / 8192; } #endif - -// CooCox global variables -OS_TID mixerTaskId; -OS_STK mixerStack[MIXER_STACK_SIZE]; - -OS_TID menusTaskId; -OS_STK menusStack[MENUS_STACK_SIZE]; - -OS_TID audioTaskId; -OS_STK audioStack[AUDIO_STACK_SIZE]; - -#if defined(BLUETOOTH) -OS_TID btTaskId; -OS_STK btStack[BT_STACK_SIZE]; -#endif - -#if defined(DEBUG) -OS_TID debugTaskId; -OS_STK debugStack[DEBUG_STACK_SIZE]; -#endif - -OS_TCID audioTimer; -OS_FlagID audioFlag; - -OS_MutexID audioMutex; -OS_MutexID mixerMutex; diff --git a/src/board_ersky9x.h b/src/board_ersky9x.h index 301144183..80d02e347 100644 --- a/src/board_ersky9x.h +++ b/src/board_ersky9x.h @@ -35,35 +35,7 @@ #define board_ersky9x_h #include - -#if !defined(SIMU) -#ifdef __cplusplus -extern "C" { -#endif -#include -#ifdef __cplusplus -} -#endif -#else -#define OS_MutexID int -#define OS_FlagID int -#define OS_TID int -#define OS_TCID int -#define OS_STK char -#define CoSetFlag(...) -#define CoClearFlag(...) -#define CoSetTmrCnt(...) -#define CoEnterISR(...) -#define CoExitISR(...) -#define CoStartTmr(...) -#define CoWaitForSingleFlag(...) 0 -#define CoEnterMutexSection(...) -#define CoLeaveMutexSection(...) -#define CoTickDelay(...) -#define CoCreateFlag(...) 0 -#endif - -#include "ersky9x/libraries/board/board.h" +#include "ersky9x/board.h" #include "ersky9x/sound_driver.h" #include "ersky9x/haptic_driver.h" #include "ersky9x/debug.h" @@ -72,6 +44,12 @@ extern "C" { #include "ersky9x/bluetooth.h" #endif +extern "C" { +extern void init_SDcard(); +extern void sdInit(); +extern void sdPoll10mS(); +} + #define PIN_ENABLE 0x001 #define PIN_PERIPHERAL 0x000 #define PIN_INPUT 0x002 @@ -111,69 +89,6 @@ extern uint32_t read_keys(); #define usbPlugged() (PIOC->PIO_PDSR & PIO_PC25) -// CooCox global variables - -#define MIXER_PRIO 5 -#define MENUS_PRIO 10 -#define AUDIO_PRIO 7 -#define BT_PRIO 15 -#define DEBUG_PRIO 10 - - -#define MIXER_STACK_SIZE 500 -#define MENUS_STACK_SIZE 2000 -#define AUDIO_STACK_SIZE 500 -#define BT_STACK_SIZE 500 -#define DEBUG_STACK_SIZE 500 - -extern OS_MutexID mixerMutex; -extern OS_TID mixerTaskId; -extern OS_TID menusTaskId; -extern OS_TID audioTaskId; - -#if defined(BLUETOOTH) -extern OS_TID btTaskId; -#endif - -#if defined(DEBUG) -extern OS_TID debugTaskId; -#endif - -extern OS_TCID audioTimer; -extern OS_FlagID audioFlag; - -extern OS_MutexID audioMutex; -extern OS_MutexID mixerMutex; - -extern uint32_t Master_frequency ; - -struct t_serial_tx -{ - uint8_t *buffer ; - uint16_t size ; - volatile uint16_t ready ; -}; - -#define SD_STATE_ERROR -1 -#define SD_STATE_STARTUP 0 -#define SD_STATE_CONNECTED 1 -#define SD_STATE_MOUNTED 3 - -extern volatile int8_t sdState; - -#define CardIsConnected() ( (PIOB->PIO_PDSR & PIO_PB7) == 0 ) -#define CardIsMounted() (CardIsConnected() && sdState==SD_STATE_MOUNTED) - -#include "ersky9x/debug.h" - -#ifdef SIMU -#define CONVERT_PTR(x) ((uint32_t)(uint64_t)(x)) -#else -#include "core_cm3.h" -#include "memories/sdmmc.h" -#define CONVERT_PTR(x) ((uint32_t)(x)) -#endif - #if defined(REVB) extern uint16_t Current_analogue; extern uint16_t Current_max; diff --git a/src/eeprom_arm.cpp b/src/eeprom_arm.cpp index 7d6ef483e..e1713b497 100644 --- a/src/eeprom_arm.cpp +++ b/src/eeprom_arm.cpp @@ -935,7 +935,7 @@ const pm_char * eeBackupModel(uint8_t i_fileSrc) DIR archiveFolder; UINT written; - if (!CardIsMounted()) { + if (!sd_card_mounted()) { return STR_NO_SDCARD; } @@ -1010,7 +1010,7 @@ const pm_char * eeRestoreModel(uint8_t i_fileDst, char *model_name) FIL restoreFile; UINT read; - if (!CardIsMounted()) { + if (!sd_card_mounted()) { return STR_NO_SDCARD; } diff --git a/src/ersky9x/libraries/board/at91sam3s2/AT91SAM3S2.h b/src/ersky9x/AT91SAM3S2.h similarity index 100% rename from src/ersky9x/libraries/board/at91sam3s2/AT91SAM3S2.h rename to src/ersky9x/AT91SAM3S2.h diff --git a/src/ersky9x/AT91SAM3S4.h b/src/ersky9x/AT91SAM3S4.h new file mode 100644 index 000000000..63fc2918a --- /dev/null +++ b/src/ersky9x/AT91SAM3S4.h @@ -0,0 +1,7119 @@ +/* ---------------------------------------------------------------------------- */ +/* Atmel Microcontroller Software Support */ +/* ---------------------------------------------------------------------------- */ +/* Copyright (c) 2009, Atmel Corporation */ +/* */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following condition is met: */ +/* */ +/* - Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the disclaimer below. */ +/* */ +/* Atmel's name may not be used to endorse or promote products derived from */ +/* this software without specific prior written permission. */ +/* */ +/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ +/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ +/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ +/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ +/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ +/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ---------------------------------------------------------------------------- */ +/* */ +/* File Name : AT91SAM3S.h */ +/* Object : AT91SAM3S definitions */ +/* Generated by : AT91 SW Application Group */ +/* Generated on : 2009-10-26 */ + +#ifndef AT91SAM3S_H +#define AT91SAM3S_H + +/** \addtogroup AT91SAM3S_definitions AT91SAM3S definitions + This file defines all structures and symbols for AT91SAM3S: + - registers and bitfields + - peripheral base address + - peripheral ID + - PIO definitions +*/ +/*@{*/ + +#ifdef __cplusplus + extern "C" { +#endif + +#ifndef __ASSEMBLY__ +#include +#ifndef __cplusplus +typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ +#else +typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ +#endif +typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */ +typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */ +#define CAST(type, value) ((type *) value) +#define REG_ACCESS(type, address) (*(type*)address) /**< C code: Register value */ +#else +#define CAST(type, value) (value) +#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */ +#endif + +/* ***************************************************************************** */ +/* CMSIS DEFINITIONS FOR AT91SAM3S */ +/* ***************************************************************************** */ +/** \addtogroup AT91SAM3S_cmsis CMSIS Definitions */ + +/*@{*/ + +/** + * \brief Configuration of the Cortex-M3 Processor and Core Peripherals + */ +#define __MPU_PRESENT 0 /**< AT91SAM3S does not provide a MPU present or not */ +#define __NVIC_PRIO_BITS 4 /**< AT91SAM3S uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ + +/**< Interrupt Number Definition */ +typedef enum IRQn +{ +/****** Cortex-M3 Processor Exceptions Numbers ***************************************/ + NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /**< 4 Cortex-M3 Memory Management Interrupt */ + BusFault_IRQn = -11, /**< 5 Cortex-M3 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /**< 6 Cortex-M3 Usage Fault Interrupt */ + SVCall_IRQn = -5, /**< 11 Cortex-M3 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /**< 12 Cortex-M3 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /**< 14 Cortex-M3 Pend SV Interrupt */ + SysTick_IRQn = -1, /**< 15 Cortex-M3 System Tick Interrupt */ +/****** AT91SAM3S specific Interrupt Numbers *****************************************/ + + SUPC_IRQn = 0, /**< 0 AT91SAM3S Supply Controller (SUPC) */ + RSTC_IRQn = 1, /**< 1 AT91SAM3S Reset Controller (RSTC) */ + RTC_IRQn = 2, /**< 2 AT91SAM3S Real Time Clock (RTC) */ + RTT_IRQn = 3, /**< 3 AT91SAM3S Real Time Timer (RTT) */ + WDT_IRQn = 4, /**< 4 AT91SAM3S Watchdog Timer (WDT) */ + PMC_IRQn = 5, /**< 5 AT91SAM3S Power Management Controller (PMC) */ + EFC_IRQn = 6, /**< 6 AT91SAM3S Enhanced Flash Controller (EFC) */ + UART0_IRQn = 8, /**< 8 AT91SAM3S UART 0 (UART0) */ + UART1_IRQn = 9, /**< 9 AT91SAM3S UART 1 (UART1) */ + SMC_IRQn = 10, /**< 10 AT91SAM3S Static Memory Controller (SMC) */ + PIOA_IRQn = 11, /**< 11 AT91SAM3S Parallel I/O Controller A (PIOA) */ + PIOB_IRQn = 12, /**< 12 AT91SAM3S Parallel I/O Controller B (PIOB) */ + PIOC_IRQn = 13, /**< 13 AT91SAM3S Parallel I/O Controller C (PIOC) */ + USART0_IRQn = 14, /**< 14 AT91SAM3S USART 0 (USART0) */ + USART1_IRQn = 15, /**< 15 AT91SAM3S USART 1 (USART1) */ + HSMCI_IRQn = 18, /**< 18 AT91SAM3S Multimedia Card Interface (HSMCI) */ + TWI0_IRQn = 19, /**< 19 AT91SAM3S Two Wire Interface 0 (TWI0) */ + TWI1_IRQn = 20, /**< 20 AT91SAM3S Two Wire Interface 1 (TWI1) */ + SPI_IRQn = 21, /**< 21 AT91SAM3S Serial Peripheral Interface (SPI) */ + SSC_IRQn = 22, /**< 22 AT91SAM3S Synchronous Serial Controler (SSC) */ + TC0_IRQn = 23, /**< 23 AT91SAM3S Timer/Counter 0 (TC0) */ + TC1_IRQn = 24, /**< 24 AT91SAM3S Timer/Counter 1 (TC1) */ + TC2_IRQn = 25, /**< 25 AT91SAM3S Timer/Counter 2 (TC2) */ + TC3_IRQn = 26, /**< 26 AT91SAM3S Timer/Counter 3 (TC3) */ + TC4_IRQn = 27, /**< 27 AT91SAM3S Timer/Counter 4 (TC4) */ + TC5_IRQn = 28, /**< 28 AT91SAM3S Timer/Counter 5 (TC5) */ + ADC_IRQn = 29, /**< 29 AT91SAM3S Analog To Digital Converter (ADC) */ + DACC_IRQn = 30, /**< 30 AT91SAM3S Digital To Analog Converter (DACC) */ + PWM_IRQn = 31, /**< 31 AT91SAM3S Pulse Width Modulation (PWM) */ + CRCCU_IRQn = 32, /**< 32 AT91SAM3S CRC Calculation Unit (CRCCU) */ + ACC_IRQn = 33, /**< 33 AT91SAM3S Analog Comparator (ACC) */ + UDP_IRQn = 34 /**< 34 AT91SAM3S USB Device Port (UDP) */ +} IRQn_Type; +/*@}*/ + +/* ***************************************************************************** */ +/** SOFTWARE PERIPHERAL API DEFINITION FOR AT91SAM3S */ +/* ***************************************************************************** */ +/** \addtogroup AT91SAM3S_api Peripheral Software API */ +/*@{*/ +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Analog Comparator Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_ACC Analog Comparator Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Acc hardware registers */ +typedef struct { + WoReg ACC_CR; /**< \brief (Acc Offset: 0x00) Control Register */ + RwReg ACC_MR; /**< \brief (Acc Offset: 0x04) Mode Register */ + RwReg Reserved1[7]; + WoReg ACC_IER; /**< \brief (Acc Offset: 0x24) Interrupt Enable Register */ + WoReg ACC_IDR; /**< \brief (Acc Offset: 0x28) Interrupt Disable Register */ + RoReg ACC_IMR; /**< \brief (Acc Offset: 0x2C) Interrupt Mask Register */ + RoReg ACC_ISR; /**< \brief (Acc Offset: 0x30) Interrupt Status Register */ + RwReg Reserved2[24]; + RwReg ACC_ACR; /**< \brief (Acc Offset: 0x94) Analog Control Register */ + RwReg Reserved3[19]; + RwReg ACC_WPMR; /**< \brief (Acc Offset: 0xE4) Write Protect Mode Register */ + RoReg ACC_WPSR; /**< \brief (Acc Offset: 0xE8) Write Protect Status Register */ +} Acc; +#endif /* __ASSEMBLY__ */ +/* -------- ACC_CR : (ACC Offset: 0x00) Control Register -------- */ +#define ACC_CR_SWRST (0x1 << 0) /**< \brief (ACC_CR) SoftWare ReSeT */ +/* -------- ACC_MR : (ACC Offset: 0x04) Mode Register -------- */ +#define ACC_MR_SELPLUS (0x7 << 0) /**< \brief (ACC_MR) SELection for PLUS comparator input */ +#define ACC_MR_SELMINUS (0x7 << 4) /**< \brief (ACC_MR) SELection for MINUS comparator input */ +#define ACC_MR_ACEN (0x1 << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ +#define ACC_MR_ACEN_EN (0x1 << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ +#define ACC_MR_ACEN_DIS (0x0 << 8) /**< \brief (ACC_MR) Analog Comparator Disable */ +#define ACC_MR_EDGETYP (0x3 << 9) /**< \brief (ACC_MR) EDGE TYPe */ +#define ACC_MR_EDGETYP_RISING (0x0 << 9) /**< \brief (ACC_MR) EDGE TYPe ,RISING edge*/ +#define ACC_MR_EDGETYP_FALLING (0x1 << 9) /**< \brief (ACC_MR) EDGE TYPe,falling edge */ +#define ACC_MR_EDGETYP_ANY (0x2 << 9) /**< \brief (ACC_MR) EDGE TYPe,any edge */ +#define ACC_MR_INV (0x1 << 12) /**< \brief (ACC_MR) INVert comparator output */ +#define ACC_MR_INV_EN (0x1 << 12) /**< \brief (ACC_MR) INVert comparator output */ +#define ACC_MR_INV_DIS (0x0 << 12) /**< \brief (ACC_MR) DIRECTLY */ +#define ACC_MR_SELFS (0x1 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ +#define ACC_MR_SELFS_CF (0x0 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ +#define ACC_MR_SELFS_OUTPUT (0x1 << 13) /**< \brief (ACC_MR) SELection of Fault Source */ +#define ACC_MR_FE (0x1 << 14) /**< \brief (ACC_MR) Fault Enable */ +#define ACC_MR_FE_EN (0x1 << 14) /**< \brief (ACC_MR) Fault Enable */ +#define ACC_MR_FE_DIS (0x0 << 14) /**< \brief (ACC_MR) Fault Enable */ +/* -------- ACC_IER : (ACC Offset: 0x24) Interrupt Enable Register -------- */ +#define ACC_IER_CE (0x1 << 0) /**< \brief (ACC_IER) Comparison Edge */ +/* -------- ACC_IDR : (ACC Offset: 0x28) Interrupt Disable Register -------- */ +#define ACC_IDR_CE (0x1 << 0) /**< \brief (ACC_IDR) Comparison Edge */ +/* -------- ACC_IMR : (ACC Offset: 0x2C) Interrupt Mask Register -------- */ +#define ACC_IMR_CE (0x1 << 0) /**< \brief (ACC_IMR) Comparison Edge */ +/* -------- ACC_ISR : (ACC Offset: 0x30) Interrupt Status Register -------- */ +#define ACC_ISR_CE (0x1 << 0) /**< \brief (ACC_ISR) Comparison Edge */ +#define ACC_ISR_SCO (0x1 << 1) /**< \brief (ACC_ISR) Synchronized Comparator Output */ +#define ACC_ISR_MASK (0x1 << 31) /**< \brief (ACC_ISR) */ +/* -------- ACC_ACR : (ACC Offset: 0x94) Analog Control Register -------- */ +#define ACC_ACR_ISEL (0x1 << 0) /**< \brief (ACC_ACR) Current SELection */ +#define ACC_ACR_HYST (0x3 << 1) /**< \brief (ACC_ACR) HYSTeresis selection */ +/* -------- ACC_WPMR : (ACC Offset: 0xE4) Write Protect Mode Register -------- */ +#define ACC_WPMR_WPEN (0x1 << 0) /**< \brief (ACC_WPMR) Write Protect Enable */ +#define ACC_WPMR_WPKEY (0xffffff << 8) /**< \brief (ACC_WPMR) Write Protect KEY */ +/* -------- ACC_WPSR : (ACC Offset: 0xE8) Write Protect Status Register -------- */ +#define ACC_WPSR_WPROTERR (0x1 << 0) /**< \brief (ACC_WPSR) Write PROTection ERRor */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_ADC Analog-to-digital Converter */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Adc hardware registers */ +typedef struct { + WoReg ADC_CR; /**< \brief (Adc Offset: 0x00) Control Register */ + RwReg ADC_MR; /**< \brief (Adc Offset: 0x04) Mode Register */ + RwReg ADC_SEQR1; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */ + RwReg ADC_SEQR2; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */ + WoReg ADC_CHER; /**< \brief (Adc Offset: 0x10) Channel Enable Register */ + WoReg ADC_CHDR; /**< \brief (Adc Offset: 0x14) Channel Disable Register */ + RoReg ADC_CHSR; /**< \brief (Adc Offset: 0x18) Channel Status Register */ + RwReg Reserved1[1]; + RoReg ADC_LCDR; /**< \brief (Adc Offset: 0x20) Last Converted Data Register */ + WoReg ADC_IER; /**< \brief (Adc Offset: 0x24) Interrupt Enable Register */ + WoReg ADC_IDR; /**< \brief (Adc Offset: 0x28) Interrupt Disable Register */ + RoReg ADC_IMR; /**< \brief (Adc Offset: 0x2C) Interrupt Mask Register */ + RoReg ADC_ISR; /**< \brief (Adc Offset: 0x30) Interrupt Status Register */ + RwReg Reserved2[2]; + RoReg ADC_OVER; /**< \brief (Adc Offset: 0x3C) Overrun Status Register */ + RwReg ADC_EMR; /**< \brief (Adc Offset: 0x40) Extended Mode Register */ + RwReg ADC_CWR; /**< \brief (Adc Offset: 0x44) Compare Window Register */ + RwReg ADC_CGR; /**< \brief (Adc Offset: 0x48) Channel Gain Register */ + RwReg ADC_COR; /**< \brief (Adc Offset: 0x4C) Channel Offset Register */ + RoReg ADC_CDR0; /**< \brief (Adc Offset: 0x50) Channel Data Register 0 */ + RoReg ADC_CDR1; /**< \brief (Adc Offset: 0x54) Channel Data Register 1 */ + RoReg ADC_CDR2; /**< \brief (Adc Offset: 0x58) Channel Data Register 2 */ + RoReg ADC_CDR3; /**< \brief (Adc Offset: 0x5C) Channel Data Register 3 */ + RoReg ADC_CDR4; /**< \brief (Adc Offset: 0x60) Channel Data Register 4 */ + RoReg ADC_CDR5; /**< \brief (Adc Offset: 0x64) Channel Data Register 5 */ + RoReg ADC_CDR6; /**< \brief (Adc Offset: 0x68) Channel Data Register 6 */ + RoReg ADC_CDR7; /**< \brief (Adc Offset: 0x6C) Channel Data Register 7 */ + RoReg ADC_CDR8; /**< \brief (Adc Offset: 0x70) Channel Data Register 8 */ + RoReg ADC_CDR9; /**< \brief (Adc Offset: 0x74) Channel Data Register 9 */ + RoReg ADC_CDR10; /**< \brief (Adc Offset: 0x78) Channel Data Register 10 */ + RoReg ADC_CDR11; /**< \brief (Adc Offset: 0x7C) Channel Data Register 11 */ + RoReg ADC_CDR12; /**< \brief (Adc Offset: 0x80) Channel Data Register 12 */ + RoReg ADC_CDR13; /**< \brief (Adc Offset: 0x84) Channel Data Register 13 */ + RoReg ADC_CDR14; /**< \brief (Adc Offset: 0x88) Channel Data Register 14 */ + RoReg ADC_CDR15; /**< \brief (Adc Offset: 0x8C) Channel Data Register 15 */ + RwReg Reserved3[1]; + RwReg ADC_ACR; /**< \brief (Adc Offset: 0x94) Analog Control Register */ + RwReg Reserved4[19]; + RwReg ADC_WPMR; /**< \brief (Adc Offset: 0xE4) Write Protect Mode Register */ + RoReg ADC_WPSR; /**< \brief (Adc Offset: 0xE8) Write Protect Status Register */ + RwReg Reserved5[5]; + RwReg ADC_RPR; /**< \brief (Adc Offset: 0x100) Receive Pointer Register */ + RwReg ADC_RCR; /**< \brief (Adc Offset: 0x104) Receive Counter Register */ + RwReg ADC_TPR; /**< \brief (Adc Offset: 0x108) Transmit Pointer Register */ + RwReg ADC_TCR; /**< \brief (Adc Offset: 0x10C) Transmit Counter Register */ + RwReg ADC_RNPR; /**< \brief (Adc Offset: 0x110) Receive Next Pointer Register */ + RwReg ADC_RNCR; /**< \brief (Adc Offset: 0x114) Receive Next Counter Register */ + RwReg ADC_TNPR; /**< \brief (Adc Offset: 0x118) Transmit Next Pointer Register */ + RwReg ADC_TNCR; /**< \brief (Adc Offset: 0x11C) Transmit Next Counter Register */ + WoReg ADC_PTCR; /**< \brief (Adc Offset: 0x120) Transfer Control Register */ + RoReg ADC_PTSR; /**< \brief (Adc Offset: 0x124) Transfer Status Register */ +} Adc; +#endif /* __ASSEMBLY__ */ +/* -------- ADC_CR : (ADC Offset: 0x00) Control Register -------- */ +#define ADC_CR_SWRST (0x1 << 0) /**< \brief (ADC_CR) Software Reset */ +#define ADC_CR_START (0x1 << 1) /**< \brief (ADC_CR) Start Conversion */ +/* -------- ADC_MR : (ADC Offset: 0x04) Mode Register -------- */ +#define ADC_MR_TRGEN (0x1 << 0) /**< \brief (ADC_MR) Trigger Enable */ +#define ADC_MR_TRGEN_DIS (0x0 << 0) /**< \brief (ADC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software.*/ +#define ADC_MR_TRGEN_EN (0x1) /**< (ADC) Hardware trigger selected by TRGSEL field is enabled.*/ +#define ADC_MR_TRGSEL (0x7 << 1) /**< \brief (ADC_MR) Trigger Selection */ +#define ADC_MR_TRGSEL_EXT (0x0 << 1) /**< \brief (ADC_MR) Selected TRGSEL = External Trigger*/ +#define ADC_MR_TRGSEL_TIOA0 (0x1 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO0*/ +#define ADC_MR_TRGSEL_TIOA1 (0x2 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO1*/ +#define ADC_MR_TRGSEL_TIOA2 (0x3 << 1) /**< \brief (ADC_MR) Selected TRGSEL = TIAO2*/ +#define ADC_MR_TRGSEL_PWM0_TRIG (0x4 << 1) /**< \brief (ADC_MR) Selected TRGSEL = PWM trigger*/ +#define ADC_MR_TRGSEL_PWM1_TRIG (0x5 << 1) /**< \brief (ADC_MR) Selected TRGSEL = PWM Trigger*/ +#define ADC_MR_TRGSEL_RESERVED (0x6 << 1) /**< \brief (ADC_MR) Selected TRGSEL = Reserved*/ +#define ADC_MR_LOWRES (0x1 << 4) /**< \brief (ADC_MR) Resolution */ +#define ADC_MR_LOWRES_12_BIT (0x0 << 4) /**< \brief (ADC_MR) 12-bit resolution*/ +#define ADC_MR_LOWRES_10_BIT (0x1 << 4) /**< \brief (ADC_MR) 10-bit resolution*/ +#define ADC_MR_SLEEP (0x1 << 5) /**< \brief (ADC_MR) Sleep Mode */ +#define ADC_MR_SLEEP_NORMAL (0x0 << 5) /**< \brief (ADC12B) Normal Mode*/ +#define ADC_MR_FWUP (0x1 << 6) /**< \brief (ADC_MR) Fast Wake Up */ +#define ADC_MR_FREERUN (0x1 << 7) /**< \brief (ADC_MR) Free Run Mode */ +#define ADC_MR_PRESCAL (0xff << 8) /**< \brief (ADC_MR) Prescaler Rate Selection */ +#define ADC_MR_STARTUP (0xf << 16) /**< \brief (ADC_MR) Start Up Time */ +#define ADC_MR_SETTLING (0x3 << 20) /**< \brief (ADC_MR) Analog Settling Time */ +#define ADC_MR_ANACH (0x1 << 23) /**< \brief (ADC_MR) Analog Change */ +#define ADC_MR_TRACKTIM (0xf << 24) /**< \brief (ADC_MR) Tracking Time */ +#define ADC_MR_TRANSFER (0x3 << 28) /**< \brief (ADC_MR) */ +#define ADC_MR_USEQ (0x1 << 31) /**< \brief (ADC_MR) User Sequence Enable */ +/* -------- ADC_SEQ1R : (ADC Offset: 0x08) Channel Sequence 1Register -------- */ +#define ADC_SEQ1R_USCH1 (0x7 << 0) /**< \brief (ADC_SEQ1R) User Sequence Number 1 */ +#define ADC_SEQ1R_USCH2 (0x7 << 4) /**< \brief (ADC_SEQ1R) User Sequence Number 2 */ +#define ADC_SEQ1R_USCH3 (0x7 << 8) /**< \brief (ADC_SEQ1R) User Sequence Number 3 */ +#define ADC_SEQ1R_USCH4 (0x7 << 12) /**< \brief (ADC_SEQ1R) User Sequence Number 4 */ +#define ADC_SEQ1R_USCH5 (0x7 << 16) /**< \brief (ADC_SEQ1R) User Sequence Number 5 */ +#define ADC_SEQ1R_USCH6 (0x7 << 20) /**< \brief (ADC_SEQ1R) User Sequence Number 6 */ +#define ADC_SEQ1R_USCH7 (0x7 << 24) /**< \brief (ADC_SEQ1R) User Sequence Number 7 */ +#define ADC_SEQ1R_USCH8 (0x7 << 28) /**< \brief (ADC_SEQ1R) User Sequence Number 8 */ +/* -------- ADC_SEQ2R : (ADC Offset: 0x0C) Channel Sequence 2 Register -------- */ +#define ADC_SEQ2R_USCH9 (0x7 << 0) /**< \brief (ADC_SEQ2R) User Sequence Number 9 */ +#define ADC_SEQ2R_USCH10 (0x7 << 4) /**< \brief (ADC_SEQ2R) User Sequence Number 10 */ +#define ADC_SEQ2R_USCH11 (0x7 << 8) /**< \brief (ADC_SEQ2R) User Sequence Number 11 */ +#define ADC_SEQ2R_USCH12 (0x7 << 12) /**< \brief (ADC_SEQ2R) User Sequence Number 12 */ +#define ADC_SEQ2R_USCH13 (0x7 << 16) /**< \brief (ADC_SEQ2R) User Sequence Number 13 */ +#define ADC_SEQ2R_USCH14 (0x7 << 20) /**< \brief (ADC_SEQ2R) User Sequence Number 14 */ +#define ADC_SEQ2R_USCH15 (0x7 << 24) /**< \brief (ADC_SEQ2R) User Sequence Number 15 */ +#define ADC_SEQ2R_USCH16 (0x7 << 28) /**< \brief (ADC_SEQ2R) User Sequence Number 16 */ +/* -------- ADC_CHER : (ADC Offset: 0x10) Channel Enable Register -------- */ +#define ADC_CHER_CH0 (0x1 << 0) /**< \brief (ADC_CHER) Channel 0 Enable */ +#define ADC_CHER_CH1 (0x1 << 1) /**< \brief (ADC_CHER) Channel 1 Enable */ +#define ADC_CHER_CH2 (0x1 << 2) /**< \brief (ADC_CHER) Channel 2 Enable */ +#define ADC_CHER_CH3 (0x1 << 3) /**< \brief (ADC_CHER) Channel 3 Enable */ +#define ADC_CHER_CH4 (0x1 << 4) /**< \brief (ADC_CHER) Channel 4 Enable */ +#define ADC_CHER_CH5 (0x1 << 5) /**< \brief (ADC_CHER) Channel 5 Enable */ +#define ADC_CHER_CH6 (0x1 << 6) /**< \brief (ADC_CHER) Channel 6 Enable */ +#define ADC_CHER_CH7 (0x1 << 7) /**< \brief (ADC_CHER) Channel 7 Enable */ +#define ADC_CHER_CH8 (0x1 << 8) /**< \brief (ADC_CHER) Channel 8 Enable */ +#define ADC_CHER_CH9 (0x1 << 9) /**< \brief (ADC_CHER) Channel 9 Enable */ +#define ADC_CHER_CH10 (0x1 << 10) /**< \brief (ADC_CHER) Channel 10 Enable */ +#define ADC_CHER_CH11 (0x1 << 11) /**< \brief (ADC_CHER) Channel 11 Enable */ +#define ADC_CHER_CH12 (0x1 << 12) /**< \brief (ADC_CHER) Channel 12 Enable */ +#define ADC_CHER_CH13 (0x1 << 13) /**< \brief (ADC_CHER) Channel 13 Enable */ +#define ADC_CHER_CH14 (0x1 << 14) /**< \brief (ADC_CHER) Channel 14 Enable */ +#define ADC_CHER_CH15 (0x1 << 15) /**< \brief (ADC_CHER) Channel 15 Enable */ +/* -------- ADC_CHDR : (ADC Offset: 0x14) Channel Disable Register -------- */ +#define ADC_CHDR_CH0 (0x1 << 0) /**< \brief (ADC_CHDR) Channel 0 Disable */ +#define ADC_CHDR_CH1 (0x1 << 1) /**< \brief (ADC_CHDR) Channel 1 Disable */ +#define ADC_CHDR_CH2 (0x1 << 2) /**< \brief (ADC_CHDR) Channel 2 Disable */ +#define ADC_CHDR_CH3 (0x1 << 3) /**< \brief (ADC_CHDR) Channel 3 Disable */ +#define ADC_CHDR_CH4 (0x1 << 4) /**< \brief (ADC_CHDR) Channel 4 Disable */ +#define ADC_CHDR_CH5 (0x1 << 5) /**< \brief (ADC_CHDR) Channel 5 Disable */ +#define ADC_CHDR_CH6 (0x1 << 6) /**< \brief (ADC_CHDR) Channel 6 Disable */ +#define ADC_CHDR_CH7 (0x1 << 7) /**< \brief (ADC_CHDR) Channel 7 Disable */ +#define ADC_CHDR_CH8 (0x1 << 8) /**< \brief (ADC_CHDR) Channel 8 Disable */ +#define ADC_CHDR_CH9 (0x1 << 9) /**< \brief (ADC_CHDR) Channel 9 Disable */ +#define ADC_CHDR_CH10 (0x1 << 10) /**< \brief (ADC_CHDR) Channel 10 Disable */ +#define ADC_CHDR_CH11 (0x1 << 11) /**< \brief (ADC_CHDR) Channel 11 Disable */ +#define ADC_CHDR_CH12 (0x1 << 12) /**< \brief (ADC_CHDR) Channel 12 Disable */ +#define ADC_CHDR_CH13 (0x1 << 13) /**< \brief (ADC_CHDR) Channel 13 Disable */ +#define ADC_CHDR_CH14 (0x1 << 14) /**< \brief (ADC_CHDR) Channel 14 Disable */ +#define ADC_CHDR_CH15 (0x1 << 15) /**< \brief (ADC_CHDR) Channel 15 Disable */ +/* -------- ADC_CHSR : (ADC Offset: 0x18) Channel Status Register -------- */ +#define ADC_CHSR_CH0 (0x1 << 0) /**< \brief (ADC_CHSR) Channel 0 Status */ +#define ADC_CHSR_CH1 (0x1 << 1) /**< \brief (ADC_CHSR) Channel 1 Status */ +#define ADC_CHSR_CH2 (0x1 << 2) /**< \brief (ADC_CHSR) Channel 2 Status */ +#define ADC_CHSR_CH3 (0x1 << 3) /**< \brief (ADC_CHSR) Channel 3 Status */ +#define ADC_CHSR_CH4 (0x1 << 4) /**< \brief (ADC_CHSR) Channel 4 Status */ +#define ADC_CHSR_CH5 (0x1 << 5) /**< \brief (ADC_CHSR) Channel 5 Status */ +#define ADC_CHSR_CH6 (0x1 << 6) /**< \brief (ADC_CHSR) Channel 6 Status */ +#define ADC_CHSR_CH7 (0x1 << 7) /**< \brief (ADC_CHSR) Channel 7 Status */ +#define ADC_CHSR_CH8 (0x1 << 8) /**< \brief (ADC_CHSR) Channel 8 Status */ +#define ADC_CHSR_CH9 (0x1 << 9) /**< \brief (ADC_CHSR) Channel 9 Status */ +#define ADC_CHSR_CH10 (0x1 << 10) /**< \brief (ADC_CHSR) Channel 10 Status */ +#define ADC_CHSR_CH11 (0x1 << 11) /**< \brief (ADC_CHSR) Channel 11 Status */ +#define ADC_CHSR_CH12 (0x1 << 12) /**< \brief (ADC_CHSR) Channel 12 Status */ +#define ADC_CHSR_CH13 (0x1 << 13) /**< \brief (ADC_CHSR) Channel 13 Status */ +#define ADC_CHSR_CH14 (0x1 << 14) /**< \brief (ADC_CHSR) Channel 14 Status */ +#define ADC_CHSR_CH15 (0x1 << 15) /**< \brief (ADC_CHSR) Channel 15 Status */ +/* -------- ADC_LCDR : (ADC Offset: 0x20) Last Converted Data Register -------- */ +#define ADC_LCDR_LDATA (0xfff << 0) /**< \brief (ADC_LCDR) Last Data Converted */ +#define ADC_LCDR_CHNB (0xf << 12) /**< \brief (ADC_LCDR) Channel Number */ +/* -------- ADC_IER : (ADC Offset: 0x24) Interrupt Enable Register -------- */ +#define ADC_IER_EOC0 (0x1 << 0) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 0 */ +#define ADC_IER_EOC1 (0x1 << 1) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 1 */ +#define ADC_IER_EOC2 (0x1 << 2) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 2 */ +#define ADC_IER_EOC3 (0x1 << 3) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 3 */ +#define ADC_IER_EOC4 (0x1 << 4) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 4 */ +#define ADC_IER_EOC5 (0x1 << 5) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 5 */ +#define ADC_IER_EOC6 (0x1 << 6) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 6 */ +#define ADC_IER_EOC7 (0x1 << 7) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 7 */ +#define ADC_IER_EOC8 (0x1 << 8) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 8 */ +#define ADC_IER_EOC9 (0x1 << 9) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 9 */ +#define ADC_IER_EOC10 (0x1 << 10) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 10 */ +#define ADC_IER_EOC11 (0x1 << 11) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 11 */ +#define ADC_IER_EOC12 (0x1 << 12) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 12 */ +#define ADC_IER_EOC13 (0x1 << 13) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 13 */ +#define ADC_IER_EOC14 (0x1 << 14) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 14 */ +#define ADC_IER_EOC15 (0x1 << 15) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 15 */ +#define ADC_IER_DRDY (0x1 << 24) /**< \brief (ADC_IER) Data Ready Interrupt Enable */ +#define ADC_IER_GOVRE (0x1 << 25) /**< \brief (ADC_IER) General Overrun Error Interrupt Enable */ +#define ADC_IER_COMPE (0x1 << 26) /**< \brief (ADC_IER) Comparison Event Interrupt Enable */ +#define ADC_IER_ENDRX (0x1 << 27) /**< \brief (ADC_IER) End of Receive Buffer Interrupt Enable */ +#define ADC_IER_RXBUFF (0x1 << 28) /**< \brief (ADC_IER) Receive Buffer Full Interrupt Enable */ +/* -------- ADC_IDR : (ADC Offset: 0x28) Interrupt Disable Register -------- */ +#define ADC_IDR_EOC0 (0x1 << 0) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 0 */ +#define ADC_IDR_EOC1 (0x1 << 1) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 1 */ +#define ADC_IDR_EOC2 (0x1 << 2) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 2 */ +#define ADC_IDR_EOC3 (0x1 << 3) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 3 */ +#define ADC_IDR_EOC4 (0x1 << 4) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 4 */ +#define ADC_IDR_EOC5 (0x1 << 5) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 5 */ +#define ADC_IDR_EOC6 (0x1 << 6) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 6 */ +#define ADC_IDR_EOC7 (0x1 << 7) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 7 */ +#define ADC_IDR_EOC8 (0x1 << 8) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 8 */ +#define ADC_IDR_EOC9 (0x1 << 9) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 9 */ +#define ADC_IDR_EOC10 (0x1 << 10) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 10 */ +#define ADC_IDR_EOC11 (0x1 << 11) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 11 */ +#define ADC_IDR_EOC12 (0x1 << 12) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 12 */ +#define ADC_IDR_EOC13 (0x1 << 13) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 13 */ +#define ADC_IDR_EOC14 (0x1 << 14) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 14 */ +#define ADC_IDR_EOC15 (0x1 << 15) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 15 */ +#define ADC_IDR_DRDY (0x1 << 24) /**< \brief (ADC_IDR) Data Ready Interrupt Disable */ +#define ADC_IDR_GOVRE (0x1 << 25) /**< \brief (ADC_IDR) General Overrun Error Interrupt Disable */ +#define ADC_IDR_COMPE (0x1 << 26) /**< \brief (ADC_IDR) Comparison Event Interrupt Disable */ +#define ADC_IDR_ENDRX (0x1 << 27) /**< \brief (ADC_IDR) End of Receive Buffer Interrupt Disable */ +#define ADC_IDR_RXBUFF (0x1 << 28) /**< \brief (ADC_IDR) Receive Buffer Full Interrupt Disable */ +/* -------- ADC_IMR : (ADC Offset: 0x2C) Interrupt Mask Register -------- */ +#define ADC_IMR_EOC0 (0x1 << 0) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 0 */ +#define ADC_IMR_EOC1 (0x1 << 1) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 1 */ +#define ADC_IMR_EOC2 (0x1 << 2) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 2 */ +#define ADC_IMR_EOC3 (0x1 << 3) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 3 */ +#define ADC_IMR_EOC4 (0x1 << 4) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 4 */ +#define ADC_IMR_EOC5 (0x1 << 5) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 5 */ +#define ADC_IMR_EOC6 (0x1 << 6) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 6 */ +#define ADC_IMR_EOC7 (0x1 << 7) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 7 */ +#define ADC_IMR_EOC8 (0x1 << 8) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 8 */ +#define ADC_IMR_EOC9 (0x1 << 9) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 9 */ +#define ADC_IMR_EOC10 (0x1 << 10) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 10 */ +#define ADC_IMR_EOC11 (0x1 << 11) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 11 */ +#define ADC_IMR_EOC12 (0x1 << 12) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 12 */ +#define ADC_IMR_EOC13 (0x1 << 13) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 13 */ +#define ADC_IMR_EOC14 (0x1 << 14) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 14 */ +#define ADC_IMR_EOC15 (0x1 << 15) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 15 */ +#define ADC_IMR_DRDY (0x1 << 24) /**< \brief (ADC_IMR) Data Ready Interrupt Mask */ +#define ADC_IMR_GOVRE (0x1 << 25) /**< \brief (ADC_IMR) General Overrun Error Interrupt Mask */ +#define ADC_IMR_COMPE (0x1 << 26) /**< \brief (ADC_IMR) Comparison Event Interrupt Mask */ +#define ADC_IMR_ENDRX (0x1 << 27) /**< \brief (ADC_IMR) End of Receive Buffer Interrupt Mask */ +#define ADC_IMR_RXBUFF (0x1 << 28) /**< \brief (ADC_IMR) Receive Buffer Full Interrupt Mask */ +/* -------- ADC_ISR : (ADC Offset: 0x30) Interrupt Status Register -------- */ +#define ADC_ISR_EOC0 (0x1 << 0) /**< \brief (ADC_ISR) End of Conversion 0 */ +#define ADC_ISR_EOC1 (0x1 << 1) /**< \brief (ADC_ISR) End of Conversion 1 */ +#define ADC_ISR_EOC2 (0x1 << 2) /**< \brief (ADC_ISR) End of Conversion 2 */ +#define ADC_ISR_EOC3 (0x1 << 3) /**< \brief (ADC_ISR) End of Conversion 3 */ +#define ADC_ISR_EOC4 (0x1 << 4) /**< \brief (ADC_ISR) End of Conversion 4 */ +#define ADC_ISR_EOC5 (0x1 << 5) /**< \brief (ADC_ISR) End of Conversion 5 */ +#define ADC_ISR_EOC6 (0x1 << 6) /**< \brief (ADC_ISR) End of Conversion 6 */ +#define ADC_ISR_EOC7 (0x1 << 7) /**< \brief (ADC_ISR) End of Conversion 7 */ +#define ADC_ISR_EOC8 (0x1 << 8) /**< \brief (ADC_ISR) End of Conversion 8 */ +#define ADC_ISR_EOC9 (0x1 << 9) /**< \brief (ADC_ISR) End of Conversion 9 */ +#define ADC_ISR_EOC10 (0x1 << 10) /**< \brief (ADC_ISR) End of Conversion 10 */ +#define ADC_ISR_EOC11 (0x1 << 11) /**< \brief (ADC_ISR) End of Conversion 11 */ +#define ADC_ISR_EOC12 (0x1 << 12) /**< \brief (ADC_ISR) End of Conversion 12 */ +#define ADC_ISR_EOC13 (0x1 << 13) /**< \brief (ADC_ISR) End of Conversion 13 */ +#define ADC_ISR_EOC14 (0x1 << 14) /**< \brief (ADC_ISR) End of Conversion 14 */ +#define ADC_ISR_EOC15 (0x1 << 15) /**< \brief (ADC_ISR) End of Conversion 15 */ +#define ADC_ISR_DRDY (0x1 << 24) /**< \brief (ADC_ISR) Data Ready */ +#define ADC_ISR_GOVRE (0x1 << 25) /**< \brief (ADC_ISR) General Overrun Error */ +#define ADC_ISR_COMPE (0x1 << 26) /**< \brief (ADC_ISR) Comparison Error */ +#define ADC_ISR_ENDRX (0x1 << 27) /**< \brief (ADC_ISR) End of RX Buffer */ +#define ADC_ISR_RXBUFF (0x1 << 28) /**< \brief (ADC_ISR) RX Buffer Full */ +/* -------- ADC_OVER : (ADC Offset: 0x3C) Overrun Status Register -------- */ +#define ADC_OVER_OVRE0 (0x1 << 0) /**< \brief (ADC_OVER) Overrun Error 0 */ +#define ADC_OVER_OVRE1 (0x1 << 1) /**< \brief (ADC_OVER) Overrun Error 1 */ +#define ADC_OVER_OVRE2 (0x1 << 2) /**< \brief (ADC_OVER) Overrun Error 2 */ +#define ADC_OVER_OVRE3 (0x1 << 3) /**< \brief (ADC_OVER) Overrun Error 3 */ +#define ADC_OVER_OVRE4 (0x1 << 4) /**< \brief (ADC_OVER) Overrun Error 4 */ +#define ADC_OVER_OVRE5 (0x1 << 5) /**< \brief (ADC_OVER) Overrun Error 5 */ +#define ADC_OVER_OVRE6 (0x1 << 6) /**< \brief (ADC_OVER) Overrun Error 6 */ +#define ADC_OVER_OVRE7 (0x1 << 7) /**< \brief (ADC_OVER) Overrun Error 7 */ +#define ADC_OVER_OVRE8 (0x1 << 8) /**< \brief (ADC_OVER) Overrun Error 8 */ +#define ADC_OVER_OVRE9 (0x1 << 9) /**< \brief (ADC_OVER) Overrun Error 9 */ +#define ADC_OVER_OVRE10 (0x1 << 10) /**< \brief (ADC_OVER) Overrun Error 10 */ +#define ADC_OVER_OVRE11 (0x1 << 11) /**< \brief (ADC_OVER) Overrun Error 11 */ +#define ADC_OVER_OVRE12 (0x1 << 12) /**< \brief (ADC_OVER) Overrun Error 12 */ +#define ADC_OVER_OVRE13 (0x1 << 13) /**< \brief (ADC_OVER) Overrun Error 13 */ +#define ADC_OVER_OVRE14 (0x1 << 14) /**< \brief (ADC_OVER) Overrun Error 14 */ +#define ADC_OVER_OVRE15 (0x1 << 15) /**< \brief (ADC_OVER) Overrun Error 15 */ +/* -------- ADC_EMR : (ADC Offset: 0x40) Extended Mode Register -------- */ +#define ADC_EMR_CMPMODE (0x3 << 0) /**< \brief (ADC_EMR) Comparison Mode */ +#define ADC_EMR_CMPMODE_LOW (0x0 << 0) /**< \brief (ADC_EMR) Comparison Mode,lower than low threshold */ +#define ADC_EMR_CMPMODE_HIGH (0x1 << 0) /**< \brief (ADC_EMR) Comparison Mode,higher than high threshold */ +#define ADC_EMR_CMPMODE_IN (0x2 << 0) /**< \brief (ADC_EMR) Comparison Mode, in the comparison window */ +#define ADC_EMR_CMPMODE_OUT (0x3 << 0) /**< \brief (ADC_EMR) Comparison Mode, out of the comparison window */ +#define ADC_EMR_CMPSEL (0xf << 4) /**< \brief (ADC_EMR) Comparison Selected Channel */ +#define ADC_EMR_CMPALL (0x1 << 9) /**< \brief (ADC_EMR) Compare All Channels */ +#define ADC_EMR_TAG (0x1 << 24) /**< \brief (ADC_EMR) TAG of ADC_LDCR register */ +/* -------- ADC_CWR : (ADC Offset: 0x44) Compare Window Register -------- */ +#define ADC_CWR_LOWTHRES (0xfff << 0) /**< \brief (ADC_CWR) Low Threshold */ +#define ADC_CWR_HIGHTHRES (0xfff << 16) /**< \brief (ADC_CWR) High Threshold */ +/* -------- ADC_CGR : (ADC Offset: 0x48) Channel Gain Register -------- */ +#define ADC_CGR_GAIN0 (0x3 << 0) /**< \brief (ADC_CGR) Gain for channel 0 */ +#define ADC_CGR_GAIN1 (0x3 << 2) /**< \brief (ADC_CGR) Gain for channel 1 */ +#define ADC_CGR_GAIN2 (0x3 << 4) /**< \brief (ADC_CGR) Gain for channel 2 */ +#define ADC_CGR_GAIN3 (0x3 << 6) /**< \brief (ADC_CGR) Gain for channel 3 */ +#define ADC_CGR_GAIN4 (0x3 << 8) /**< \brief (ADC_CGR) Gain for channel 4 */ +#define ADC_CGR_GAIN5 (0x3 << 10) /**< \brief (ADC_CGR) Gain for channel 5 */ +#define ADC_CGR_GAIN6 (0x3 << 12) /**< \brief (ADC_CGR) Gain for channel 6 */ +#define ADC_CGR_GAIN7 (0x3 << 14) /**< \brief (ADC_CGR) Gain for channel 7 */ +#define ADC_CGR_GAIN8 (0x3 << 16) /**< \brief (ADC_CGR) Gain for channel 8 */ +#define ADC_CGR_GAIN9 (0x3 << 18) /**< \brief (ADC_CGR) Gain for channel 9 */ +#define ADC_CGR_GAIN10 (0x3 << 20) /**< \brief (ADC_CGR) Gain for channel 10 */ +#define ADC_CGR_GAIN11 (0x3 << 22) /**< \brief (ADC_CGR) Gain for channel 11 */ +#define ADC_CGR_GAIN12 (0x3 << 24) /**< \brief (ADC_CGR) Gain for channel 12 */ +#define ADC_CGR_GAIN13 (0x3 << 26) /**< \brief (ADC_CGR) Gain for channel 13 */ +#define ADC_CGR_GAIN14 (0x3 << 28) /**< \brief (ADC_CGR) Gain for channel 14 */ +#define ADC_CGR_GAIN15 (0x3 << 30) /**< \brief (ADC_CGR) Gain for channel 15 */ +/* -------- ADC_COR : (ADC Offset: 0x4C) Channel Offset Register -------- */ +#define ADC_COR_OFF0 (0x1 << 0) /**< \brief (ADC_COR) Offset for channel 0 */ +#define ADC_COR_OFF1 (0x1 << 1) /**< \brief (ADC_COR) Offset for channel 1 */ +#define ADC_COR_OFF2 (0x1 << 2) /**< \brief (ADC_COR) Offset for channel 2 */ +#define ADC_COR_OFF3 (0x1 << 3) /**< \brief (ADC_COR) Offset for channel 3 */ +#define ADC_COR_OFF4 (0x1 << 4) /**< \brief (ADC_COR) Offset for channel 4 */ +#define ADC_COR_OFF5 (0x1 << 5) /**< \brief (ADC_COR) Offset for channel 5 */ +#define ADC_COR_OFF6 (0x1 << 6) /**< \brief (ADC_COR) Offset for channel 6 */ +#define ADC_COR_OFF7 (0x1 << 7) /**< \brief (ADC_COR) Offset for channel 7 */ +#define ADC_COR_OFF8 (0x1 << 8) /**< \brief (ADC_COR) Offset for channel 8 */ +#define ADC_COR_OFF9 (0x1 << 9) /**< \brief (ADC_COR) Offset for channel 9 */ +#define ADC_COR_OFF10 (0x1 << 10) /**< \brief (ADC_COR) Offset for channel 10 */ +#define ADC_COR_OFF11 (0x1 << 11) /**< \brief (ADC_COR) Offset for channel 11 */ +#define ADC_COR_OFF12 (0x1 << 12) /**< \brief (ADC_COR) Offset for channel 12 */ +#define ADC_COR_OFF13 (0x1 << 13) /**< \brief (ADC_COR) Offset for channel 13 */ +#define ADC_COR_OFF14 (0x1 << 14) /**< \brief (ADC_COR) Offset for channel 14 */ +#define ADC_COR_OFF15 (0x1 << 15) /**< \brief (ADC_COR) Offset for channel 15 */ +#define ADC_COR_DIFF0 (0x1 << 16) /**< \brief (ADC_COR) Differential inputs for channel 0 */ +#define ADC_COR_DIFF1 (0x1 << 17) /**< \brief (ADC_COR) Differential inputs for channel 1 */ +#define ADC_COR_DIFF2 (0x1 << 18) /**< \brief (ADC_COR) Differential inputs for channel 2 */ +#define ADC_COR_DIFF3 (0x1 << 19) /**< \brief (ADC_COR) Differential inputs for channel 3 */ +#define ADC_COR_DIFF4 (0x1 << 20) /**< \brief (ADC_COR) Differential inputs for channel 4 */ +#define ADC_COR_DIFF5 (0x1 << 21) /**< \brief (ADC_COR) Differential inputs for channel 5 */ +#define ADC_COR_DIFF6 (0x1 << 22) /**< \brief (ADC_COR) Differential inputs for channel 6 */ +#define ADC_COR_DIFF7 (0x1 << 23) /**< \brief (ADC_COR) Differential inputs for channel 7 */ +#define ADC_COR_DIFF8 (0x1 << 24) /**< \brief (ADC_COR) Differential inputs for channel 8 */ +#define ADC_COR_DIFF9 (0x1 << 25) /**< \brief (ADC_COR) Differential inputs for channel 9 */ +#define ADC_COR_DIFF10 (0x1 << 26) /**< \brief (ADC_COR) Differential inputs for channel 10 */ +#define ADC_COR_DIFF11 (0x1 << 27) /**< \brief (ADC_COR) Differential inputs for channel 11 */ +#define ADC_COR_DIFF12 (0x1 << 28) /**< \brief (ADC_COR) Differential inputs for channel 12 */ +#define ADC_COR_DIFF13 (0x1 << 29) /**< \brief (ADC_COR) Differential inputs for channel 13 */ +#define ADC_COR_DIFF14 (0x1 << 30) /**< \brief (ADC_COR) Differential inputs for channel 14 */ +#define ADC_COR_DIFF15 (0x1 << 31) /**< \brief (ADC_COR) Differential inputs for channel 15 */ +/* -------- ADC_CDR0 : (ADC Offset: 0x50) Channel Data Register 0 -------- */ +#define ADC_CDR0_DATA (0x3ff << 0) /**< \brief (ADC_CDR0) Converted Data */ +/* -------- ADC_CDR1 : (ADC Offset: 0x54) Channel Data Register 1 -------- */ +#define ADC_CDR1_DATA (0x3ff << 0) /**< \brief (ADC_CDR1) Converted Data */ +/* -------- ADC_CDR2 : (ADC Offset: 0x58) Channel Data Register 2 -------- */ +#define ADC_CDR2_DATA (0x3ff << 0) /**< \brief (ADC_CDR2) Converted Data */ +/* -------- ADC_CDR3 : (ADC Offset: 0x5C) Channel Data Register 3 -------- */ +#define ADC_CDR3_DATA (0x3ff << 0) /**< \brief (ADC_CDR3) Converted Data */ +/* -------- ADC_CDR4 : (ADC Offset: 0x60) Channel Data Register 4 -------- */ +#define ADC_CDR4_DATA (0x3ff << 0) /**< \brief (ADC_CDR4) Converted Data */ +/* -------- ADC_CDR5 : (ADC Offset: 0x64) Channel Data Register 5 -------- */ +#define ADC_CDR5_DATA (0x3ff << 0) /**< \brief (ADC_CDR5) Converted Data */ +/* -------- ADC_CDR6 : (ADC Offset: 0x68) Channel Data Register 6 -------- */ +#define ADC_CDR6_DATA (0x3ff << 0) /**< \brief (ADC_CDR6) Converted Data */ +/* -------- ADC_CDR15 : (ADC Offset: 0x6C) Channel Data Register 15 -------- */ +#define ADC_CDR15_DATA (0x3ff << 0) /**< \brief (ADC_CDR15) Converted Data */ +/* -------- ADC_ACR : (ADC Offset: 0x94) Analog Control Register -------- */ +#define ADC_ACR_TSON (0x1 << 4) /**< \brief (ADC_ACR) Temperature Sensor On */ +#define ADC_ACR_IBCTL (0x3 << 8) /**< \brief (ADC_ACR) ADC Bias Current Control */ +/* -------- ADC_WPMR : (ADC Offset: 0xE4) Write Protect Mode Register -------- */ +#define ADC_WPMR_WPEN (0x1 << 0) /**< \brief (ADC_WPMR) Write Protect Enable */ +#define ADC_WPMR_WPKEY (0xffffff << 8) /**< \brief (ADC_WPMR) Write Protect KEY */ +/* -------- ADC_WPSR : (ADC Offset: 0xE8) Write Protect Status Register -------- */ +#define ADC_WPSR_WPVS (0x1 << 0) /**< \brief (ADC_WPSR) Write Protect Violation Status */ +#define ADC_WPSR_WPVSRC (0xffff << 8) /**< \brief (ADC_WPSR) Write Protect Violation Source */ +/* -------- ADC_RPR : (ADC Offset: 0x100) Receive Pointer Register -------- */ +#define ADC_RPR_RXPTR (0xffffffff << 0) /**< \brief (ADC_RPR) Receive Pointer Register */ +/* -------- ADC_RCR : (ADC Offset: 0x104) Receive Counter Register -------- */ +#define ADC_RCR_RXCTR (0xffff << 0) /**< \brief (ADC_RCR) Receive Counter Register */ +/* -------- ADC_TPR : (ADC Offset: 0x108) Transmit Pointer Register -------- */ +#define ADC_TPR_TXPTR (0xffffffff << 0) /**< \brief (ADC_TPR) Transmit Counter Register */ +/* -------- ADC_TCR : (ADC Offset: 0x10C) Transmit Counter Register -------- */ +#define ADC_TCR_TXCTR (0xffff << 0) /**< \brief (ADC_TCR) Transmit Counter Register */ +/* -------- ADC_RNPR : (ADC Offset: 0x110) Receive Next Pointer Register -------- */ +#define ADC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (ADC_RNPR) Receive Next Pointer */ +/* -------- ADC_RNCR : (ADC Offset: 0x114) Receive Next Counter Register -------- */ +#define ADC_RNCR_RXNCTR (0xffff << 0) /**< \brief (ADC_RNCR) Receive Next Counter */ +/* -------- ADC_TNPR : (ADC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define ADC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (ADC_TNPR) Transmit Next Pointer */ +/* -------- ADC_TNCR : (ADC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define ADC_TNCR_TXNCTR (0xffff << 0) /**< \brief (ADC_TNCR) Transmit Counter Next */ +/* -------- ADC_PTCR : (ADC Offset: 0x120) Transfer Control Register -------- */ +#define ADC_PTCR_RXTEN (0x1 << 0) /**< \brief (ADC_PTCR) Receiver Transfer Enable */ +#define ADC_PTCR_RXTDIS (0x1 << 1) /**< \brief (ADC_PTCR) Receiver Transfer Disable */ +#define ADC_PTCR_TXTEN (0x1 << 8) /**< \brief (ADC_PTCR) Transmitter Transfer Enable */ +#define ADC_PTCR_TXTDIS (0x1 << 9) /**< \brief (ADC_PTCR) Transmitter Transfer Disable */ +/* -------- ADC_PTSR : (ADC Offset: 0x124) Transfer Status Register -------- */ +#define ADC_PTSR_RXTEN (0x1 << 0) /**< \brief (ADC_PTSR) Receiver Transfer Enable */ +#define ADC_PTSR_TXTEN (0x1 << 8) /**< \brief (ADC_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Chip Identifier */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_CHIPID Chip Identifier */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Chipid hardware registers */ +typedef struct { + RoReg CHIPID_CIDR; /**< \brief (Chipid Offset: 0x0) Chip ID Register */ + RoReg CHIPID_EXID; /**< \brief (Chipid Offset: 0x4) Chip ID Extension Register */ +} Chipid; +#endif /* __ASSEMBLY__ */ +/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ +#define CHIPID_CIDR_VERSION (0x1f << 0) /**< \brief (CHIPID_CIDR) Version of the Device */ +#define CHIPID_CIDR_EPROC (0x7 << 5) /**< \brief (CHIPID_CIDR) Embedded Processor */ +#define CHIPID_CIDR_NVPSIZ (0xf << 8) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Size */ +#define CHIPID_CIDR_NVPSIZ2 (0xf << 12) /**< \brief (CHIPID_CIDR) */ +#define CHIPID_CIDR_SRAMSIZ (0xf << 16) /**< \brief (CHIPID_CIDR) Internal SRAM Size */ +#define CHIPID_CIDR_ARCH (0xff << 20) /**< \brief (CHIPID_CIDR) Architecture Identifier */ +#define CHIPID_CIDR_NVPTYP (0x7 << 28) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Type */ +#define CHIPID_CIDR_EXT (0x1 << 31) /**< \brief (CHIPID_CIDR) Extension Flag */ +/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ +#define CHIPID_EXID_EXID (0xffffffff << 0) /**< \brief (CHIPID_EXID) Chip ID Extension */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Cyclic Redundancy Check Calculation Unit */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_CRCCU Cyclic Redundancy Check Calculation Unit */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Crccu hardware registers */ +typedef struct { + RwReg CRCCU_DSCR; /**< \brief (Crccu Offset: 0x00000000) CRCCU Descriptor Base Register */ + RwReg Reserved1[1]; + WoReg CRCCU_DMA_EN; /**< \brief (Crccu Offset: 0x00000008) CRCCU DMA Enable Register */ + WoReg CRCCU_DMA_DIS; /**< \brief (Crccu Offset: 0x0000000C) CRCCU DMA Disable Register */ + RoReg CRCCU_DMA_SR; /**< \brief (Crccu Offset: 0x00000010) CRCCU DMA Status Register */ + WoReg CRCCU_DMA_IER; /**< \brief (Crccu Offset: 0x00000014) CRCCU DMA Interrupt Enable Register */ + WoReg CRCCU_DMA_IDR; /**< \brief (Crccu Offset: 0x00000018) CRCCU DMA Interrupt Disable Register */ + RoReg CRCCU_DMA_IMR; /**< \brief (Crccu Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register */ + RoReg CRCCU_DMA_ISR; /**< \brief (Crccu Offset: 0x00000020) CRCCU DMA Interrupt Status Register */ + RwReg Reserved2[4]; + WoReg CRCCU_CR; /**< \brief (Crccu Offset: 0x00000034) CRCCU Control Register */ + RwReg CRCCU_MR; /**< \brief (Crccu Offset: 0x00000038) CRCCU Mode Register */ + RoReg CRCCU_SR; /**< \brief (Crccu Offset: 0x0000003C) CRCCU Status Register */ + WoReg CRCCU_IER; /**< \brief (Crccu Offset: 0x00000040) CRCCU Interrupt Enable Register */ + WoReg CRCCU_IDR; /**< \brief (Crccu Offset: 0x00000044) CRCCU Interrupt Disable Register */ + RoReg CRCCU_IMR; /**< \brief (Crccu Offset: 0x00000048) CRCCU Interrupt Mask Register */ + RoReg CRCCU_ISR; /**< \brief (Crccu Offset: 0x0000004C) CRCCU Interrupt Status Register */ +} Crccu; +#endif /* __ASSEMBLY__ */ +/* -------- CRCCU_DSCR : (CRCCU Offset: 0x00000000) CRCCU Descriptor Base Register -------- */ +#define CRCCU_DSCR_DSCR (0x7fffff << 9) /**< \brief (CRCCU_DSCR) Descriptor Base Address */ +/* -------- CRCCU_DMA_EN : (CRCCU Offset: 0x00000008) CRCCU DMA Enable Register -------- */ +#define CRCCU_DMA_EN_DMAEN (0x1 << 0) /**< \brief (CRCCU_DMA_EN) DMA Enable Register */ +/* -------- CRCCU_DMA_DIS : (CRCCU Offset: 0x0000000C) CRCCU DMA Disable Register -------- */ +#define CRCCU_DMA_DIS_DMADIS (0x1 << 0) /**< \brief (CRCCU_DMA_DIS) DMA Disable Register */ +/* -------- CRCCU_DMA_SR : (CRCCU Offset: 0x00000010) CRCCU DMA Status Register -------- */ +#define CRCCU_DMA_SR_DMASR (0x1 << 0) /**< \brief (CRCCU_DMA_SR) DMA Status Register */ +/* -------- CRCCU_DMA_IER : (CRCCU Offset: 0x00000014) CRCCU DMA Interrupt Enable Register -------- */ +#define CRCCU_DMA_IER_DMAIER (0x1 << 0) /**< \brief (CRCCU_DMA_IER) Interrupt Enable register */ +/* -------- CRCCU_DMA_IDR : (CRCCU Offset: 0x00000018) CRCCU DMA Interrupt Disable Register -------- */ +#define CRCCU_DMA_IDR_DMAIDR (0x1 << 0) /**< \brief (CRCCU_DMA_IDR) Interrupt Disable register */ +/* -------- CRCCU_DMA_IMR : (CRCCU Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register -------- */ +#define CRCCU_DMA_IMR_DMAIMR (0x1 << 0) /**< \brief (CRCCU_DMA_IMR) Interrupt Mask Register */ +/* -------- CRCCU_DMA_ISR : (CRCCU Offset: 0x00000020) CRCCU DMA Interrupt Status Register -------- */ +#define CRCCU_DMA_ISR_DMAISR (0x1 << 0) /**< \brief (CRCCU_DMA_ISR) Interrupt Status register */ +/* -------- CRCCU_CR : (CRCCU Offset: 0x00000034) CRCCU Control Register -------- */ +#define CRCCU_CR_RESET (0x1 << 0) /**< \brief (CRCCU_CR) CRC Computation Reset */ +/* -------- CRCCU_MR : (CRCCU Offset: 0x00000038) CRCCU Mode Register -------- */ +#define CRCCU_MR_ENABLE (0x1 << 0) /**< \brief (CRCCU_MR) CRC Enable */ +#define CRCCU_MR_COMPARE (0x1 << 1) /**< \brief (CRCCU_MR) CRC Compare */ +#define CRCCU_MR_PTYPE (0x3 << 2) /**< \brief (CRCCU_MR) Primitive Polynomial */ +#define CRCCU_MR_PTYPE_CCIT8023 (0x0 << 2) /**< \brief (CRCCU_MR) Polynom 0x04C11DB7 */ +#define CRCCU_MR_PTYPE_CASTAGNOLI (0x1 << 2) /**< \brief (CRCCU_MR) Polynom 0x1EDC6F41 */ +#define CRCCU_MR_PTYPE_CCIT16 (0x2 << 2) /**< \brief (CRCCU_MR) Polynom 0x1021 */ +#define CRCCU_MR_DIVIDER (0xf << 4) /**< \brief (CRCCU_MR) Request Divider */ +/* -------- CRCCU_SR : (CRCCU Offset: 0x0000003C) CRCCU Status Register -------- */ +#define CRCCU_SR_CRC (0xffffffff << 0) /**< \brief (CRCCU_SR) Cyclic Redundancy Check Value */ +/* -------- CRCCU_IER : (CRCCU Offset: 0x00000040) CRCCU Interrupt Enable Register -------- */ +#define CRCCU_IER_ERRIER (0x1 << 0) /**< \brief (CRCCU_IER) CRC Error Interrupt Enable */ +/* -------- CRCCU_IDR : (CRCCU Offset: 0x00000044) CRCCU Interrupt Disable Register -------- */ +#define CRCCU_IDR_ERRIDR (0x1 << 0) /**< \brief (CRCCU_IDR) CRC Error Interrupt Disable */ +/* -------- CRCCU_IMR : (CRCCU Offset: 0x00000048) CRCCU Interrupt Mask Register -------- */ +#define CRCCU_IMR_ERRIMR (0x1 << 0) /**< \brief (CRCCU_IMR) CRC Error Interrupt Mask */ +/* -------- CRCCU_ISR : (CRCCU Offset: 0x0000004C) CRCCU Interrupt Status Register -------- */ +#define CRCCU_ISR_ERRISR (0x1 << 0) /**< \brief (CRCCU_ISR) CRC Error Interrupt Status */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_DACC Digital-to-Analog Converter Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Dacc hardware registers */ +typedef struct { + WoReg DACC_CR; /**< \brief (Dacc Offset: 0x00) Control Register */ + RwReg DACC_MR; /**< \brief (Dacc Offset: 0x04) Mode Register */ + RwReg Reserved1[2]; + WoReg DACC_CHER; /**< \brief (Dacc Offset: 0x10) Channel Enable Register */ + WoReg DACC_CHDR; /**< \brief (Dacc Offset: 0x14) Channel Disable Register */ + RoReg DACC_CHSR; /**< \brief (Dacc Offset: 0x18) Channel Status Register */ + RwReg Reserved2[1]; + WoReg DACC_CDR; /**< \brief (Dacc Offset: 0x20) Conversion Data Register */ + WoReg DACC_IER; /**< \brief (Dacc Offset: 0x24) Interrupt Enable Register */ + WoReg DACC_IDR; /**< \brief (Dacc Offset: 0x28) Interrupt Disable Register */ + RoReg DACC_IMR; /**< \brief (Dacc Offset: 0x2C) Interrupt Mask Register */ + RoReg DACC_ISR; /**< \brief (Dacc Offset: 0x30) Interrupt Status Register */ + RwReg Reserved3[24]; + RwReg DACC_ACR; /**< \brief (Dacc Offset: 0x94) Analog Current Register */ + RwReg Reserved4[19]; + RwReg DACC_WPMR; /**< \brief (Dacc Offset: 0xE4) Write Protect Mode register */ + RoReg DACC_WPSR; /**< \brief (Dacc Offset: 0xE8) Write Protect Status register */ + RwReg Reserved5[5]; + RwReg DACC_RPR; /**< \brief (Dacc Offset: 0x100) Receive Pointer Register */ + RwReg DACC_RCR; /**< \brief (Dacc Offset: 0x104) Receive Counter Register */ + RwReg DACC_TPR; /**< \brief (Dacc Offset: 0x108) Transmit Pointer Register */ + RwReg DACC_TCR; /**< \brief (Dacc Offset: 0x10C) Transmit Counter Register */ + RwReg DACC_RNPR; /**< \brief (Dacc Offset: 0x110) Receive Next Pointer Register */ + RwReg DACC_RNCR; /**< \brief (Dacc Offset: 0x114) Receive Next Counter Register */ + RwReg DACC_TNPR; /**< \brief (Dacc Offset: 0x118) Transmit Next Pointer Register */ + RwReg DACC_TNCR; /**< \brief (Dacc Offset: 0x11C) Transmit Next Counter Register */ + WoReg DACC_PTCR; /**< \brief (Dacc Offset: 0x120) Transfer Control Register */ + RoReg DACC_PTSR; /**< \brief (Dacc Offset: 0x124) Transfer Status Register */ +} Dacc; +#endif /* __ASSEMBLY__ */ +/* -------- DACC_CR : (DACC Offset: 0x00) Control Register -------- */ +#define DACC_CR_SWRST (0x1 << 0) /**< \brief (DACC_CR) Software Reset */ +/* -------- DACC_MR : (DACC Offset: 0x04) Mode Register -------- */ +#define DACC_MR_TRGEN (0x1 << 0) /**< \brief (DACC_MR) Trigger Enable */ +#define DACC_MR_TRGEN_DIS (0x0 << 0) // (DACC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software. +#define DACC_MR_TRGEN_EN (0x1 << 0) // (DACC_MR) Hardware trigger selected by TRGSEL field is enabled. + +#define DACC_MR_TRGSEL (0x7 << 1) /**< \brief (DACC_MR) Trigger Selection */ +#define DACC_MR_TRGSEL_EXT_TRIG (0x0 << 1) // (DACC_MR) External trigger +#define DACC_MR_TRGSEL_TIOA_0 (0x1 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 0 +#define DACC_MR_TRGSEL_TIOA_1 (0x2 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 1 +#define DACC_MR_TRGSEL_TIOA_2 (0x3 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 2 +#define DACC_MR_TRGSEL_PWM_0 (0x4 << 1) // (DACC_MR) PWM Event Line 0 +#define DACC_MR_TRGSEL_PWM_1 (0x5 << 1) // (DACC_MR) PWM Event Line 1 +#define DACC_MR_WORD (0x1 << 4) /**< \brief (DACC_MR) Word Transfer */ +#define DACC_MR_WORD_HALF (0x0 << 4) /**< \brief (DACC_MR) Half-Word Transfer */ +#define DACC_MR_WORD_WORLD (0x1 << 4) /**< \brief (DACC_MR) Word Transfer */ +#define DACC_MR_SLEEP (0x1 << 5) /**< \brief (DACC_MR) Sleep Mode */ +#define DACC_MR_SLEEP_NORMAL (0x0 << 5) // (DACC_MR) Normal Mode +#define DACC_MR_SLEEP_SLEEP (0x1 << 5) // (DACC_MR) Sleep Modes +#define DACC_MR_FASTWKUP (0x1 << 6) /**< \brief (DACC_MR) Fast Wake up Mode */ +#define DACC_MR_REFRESH (0xff << 8) /**< \brief (DACC_MR) Refresh Period */ +#define DACC_MR_USER_SEL (0x3 << 16) /**< \brief (DACC_MR) User Channel Selection */ +#define DACC_MR_USER_SEL_0 (0x0 << 16) /**< \brief (DACC_MR) User Channel Selection */ +#define DACC_MR_USER_SEL_1 (0x1 << 16) /**< \brief (DACC_MR) User Channel Selection */ +#define DACC_MR_TAG (0x1 << 20) /**< \brief (DACC_MR) Tag Selection Mode */ +#define DACC_MR_MAXS (0x1 << 21) /**< \brief (DACC_MR) Max Speed Mode */ +#define DACC_MR_STARTUP (0x3f << 24) /**< \brief (DACC_MR) Startup Time Selection */ +/* -------- DACC_CHER : (DACC Offset: 0x10) Channel Enable Register -------- */ +#define DACC_CHER_CH0 (0x1 << 0) /**< \brief (DACC_CHER) Channel 0 Enable */ +#define DACC_CHER_CH1 (0x1 << 1) /**< \brief (DACC_CHER) Channel 1 Enable */ +#define DACC_CHER_CH2 (0x1 << 2) /**< \brief (DACC_CHER) Channel 2 Enable */ +/* -------- DACC_CHDR : (DACC Offset: 0x14) Channel Disable Register -------- */ +#define DACC_CHDR_CH0 (0x1 << 0) /**< \brief (DACC_CHDR) Channel 0 Disable */ +#define DACC_CHDR_CH1 (0x1 << 1) /**< \brief (DACC_CHDR) Channel 1 Disable */ +#define DACC_CHDR_CH2 (0x1 << 2) /**< \brief (DACC_CHDR) Channel 2 Disable */ +/* -------- DACC_CHSR : (DACC Offset: 0x18) Channel Status Register -------- */ +#define DACC_CHSR_CH0 (0x1 << 0) /**< \brief (DACC_CHSR) Channel 0 Status */ +#define DACC_CHSR_CH1 (0x1 << 1) /**< \brief (DACC_CHSR) Channel 1 Status */ +#define DACC_CHSR_CH2 (0x1 << 2) /**< \brief (DACC_CHSR) Channel 2 Status */ +/* -------- DACC_CDR : (DACC Offset: 0x20) Conversion Data Register -------- */ +#define DACC_CDR_DATA (0xffffffff << 0) /**< \brief (DACC_CDR) Data to Convert */ +/* -------- DACC_IER : (DACC Offset: 0x24) Interrupt Enable Register -------- */ +#define DACC_IER_TXRDY (0x1 << 0) /**< \brief (DACC_IER) Transmit Ready Interrupt Enable */ +#define DACC_IER_EOC (0x1 << 1) /**< \brief (DACC_IER) End of Conversion Interrupt Enable */ +#define DACC_IER_ENDTX (0x1 << 2) /**< \brief (DACC_IER) End of Transmit Buffer Interrupt Enable */ +#define DACC_IER_TXBUFE (0x1 << 3) /**< \brief (DACC_IER) Transmit Buffer Empty Interrupt Enable */ +/* -------- DACC_IDR : (DACC Offset: 0x28) Interrupt Disable Register -------- */ +#define DACC_IDR_TXRDY (0x1 << 0) /**< \brief (DACC_IDR) Transmit Ready Interrupt Disable. */ +#define DACC_IDR_EOC (0x1 << 1) /**< \brief (DACC_IDR) End of Conversion Interrupt Disable */ +#define DACC_IDR_ENDTX (0x1 << 2) /**< \brief (DACC_IDR) End of Transmit Buffer Interrupt Disable */ +#define DACC_IDR_TXBUFE (0x1 << 3) /**< \brief (DACC_IDR) Transmit Buffer Empty Interrupt Disable */ +/* -------- DACC_IMR : (DACC Offset: 0x2C) Interrupt Mask Register -------- */ +#define DACC_IMR_TXRDY (0x1 << 0) /**< \brief (DACC_IMR) Transmit Ready Interrupt Mask */ +#define DACC_IMR_EOC (0x1 << 1) /**< \brief (DACC_IMR) End of Conversion Interrupt Mask */ +#define DACC_IMR_ENDTX (0x1 << 2) /**< \brief (DACC_IMR) End of Transmit Buffer Interrupt Mask */ +#define DACC_IMR_TXBUFE (0x1 << 3) /**< \brief (DACC_IMR) Transmit Buffer Empty Interrupt Mask */ +/* -------- DACC_ISR : (DACC Offset: 0x30) Interrupt Status Register -------- */ +#define DACC_ISR_TXRDY (0x1 << 0) /**< \brief (DACC_ISR) Transmit Ready Interrupt Flag */ +#define DACC_ISR_EOC (0x1 << 1) /**< \brief (DACC_ISR) End of Conversion Interrupt Flag */ +#define DACC_ISR_ENDTX (0x1 << 2) /**< \brief (DACC_ISR) End of DMA Interrupt Flag */ +#define DACC_ISR_TXBUFE (0x1 << 3) /**< \brief (DACC_ISR) Transmit Buffer Empty */ +/* -------- DACC_ACR : (DACC Offset: 0x94) Analog Current Register -------- */ +#define DACC_ACR_IBCTLCH0 (0x3 << 0) /**< \brief (DACC_ACR) Analog Output Current Control */ +#define DACC_ACR_IBCTLCH1 (0x3 << 2) /**< \brief (DACC_ACR) Analog Output Current Control */ +#define DACC_ACR_IBCTLDACCORE (0x3 << 8) /**< \brief (DACC_ACR) Bias Current Control for DAC Core */ +/* -------- DACC_WPMR : (DACC Offset: 0xE4) Write Protect Mode register -------- */ +#define DACC_WPMR_WPEN (0x1 << 0) /**< \brief (DACC_WPMR) Write Protect Enable */ +#define DACC_WPMR_WPKEY (0xffffff << 8) /**< \brief (DACC_WPMR) Write Protect KEY */ +/* -------- DACC_WPSR : (DACC Offset: 0xE8) Write Protect Status register -------- */ +#define DACC_WPSR_WPROTERR (0x1 << 0) /**< \brief (DACC_WPSR) Write protection error */ +#define DACC_WPSR_WPROTADDR (0xff << 8) /**< \brief (DACC_WPSR) Write protection error address */ +/* -------- DACC_RPR : (DACC Offset: 0x100) Receive Pointer Register -------- */ +#define DACC_RPR_RXPTR (0xffffffff << 0) /**< \brief (DACC_RPR) Receive Pointer Register */ +/* -------- DACC_RCR : (DACC Offset: 0x104) Receive Counter Register -------- */ +#define DACC_RCR_RXCTR (0xffff << 0) /**< \brief (DACC_RCR) Receive Counter Register */ +/* -------- DACC_TPR : (DACC Offset: 0x108) Transmit Pointer Register -------- */ +#define DACC_TPR_TXPTR (0xffffffff << 0) /**< \brief (DACC_TPR) Transmit Counter Register */ +/* -------- DACC_TCR : (DACC Offset: 0x10C) Transmit Counter Register -------- */ +#define DACC_TCR_TXCTR (0xffff << 0) /**< \brief (DACC_TCR) Transmit Counter Register */ +/* -------- DACC_RNPR : (DACC Offset: 0x110) Receive Next Pointer Register -------- */ +#define DACC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (DACC_RNPR) Receive Next Pointer */ +/* -------- DACC_RNCR : (DACC Offset: 0x114) Receive Next Counter Register -------- */ +#define DACC_RNCR_RXNCTR (0xffff << 0) /**< \brief (DACC_RNCR) Receive Next Counter */ +/* -------- DACC_TNPR : (DACC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define DACC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (DACC_TNPR) Transmit Next Pointer */ +/* -------- DACC_TNCR : (DACC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define DACC_TNCR_TXNCTR (0xffff << 0) /**< \brief (DACC_TNCR) Transmit Counter Next */ +/* -------- DACC_PTCR : (DACC Offset: 0x120) Transfer Control Register -------- */ +#define DACC_PTCR_RXTEN (0x1 << 0) /**< \brief (DACC_PTCR) Receiver Transfer Enable */ +#define DACC_PTCR_RXTDIS (0x1 << 1) /**< \brief (DACC_PTCR) Receiver Transfer Disable */ +#define DACC_PTCR_TXTEN (0x1 << 8) /**< \brief (DACC_PTCR) Transmitter Transfer Enable */ +#define DACC_PTCR_TXTDIS (0x1 << 9) /**< \brief (DACC_PTCR) Transmitter Transfer Disable */ +/* -------- DACC_PTSR : (DACC Offset: 0x124) Transfer Status Register -------- */ +#define DACC_PTSR_RXTEN (0x1 << 0) /**< \brief (DACC_PTSR) Receiver Transfer Enable */ +#define DACC_PTSR_TXTEN (0x1 << 8) /**< \brief (DACC_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_EFC Embedded Flash Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Efc hardware registers */ +typedef struct { + RwReg EEFC_FMR; /**< \brief (Efc Offset: 0x00) EEFC Flash Mode Register */ + WoReg EEFC_FCR; /**< \brief (Efc Offset: 0x04) EEFC Flash Command Register */ + RoReg EEFC_FSR; /**< \brief (Efc Offset: 0x08) EEFC Flash Status Register */ + RoReg EEFC_FRR; /**< \brief (Efc Offset: 0x0C) EEFC Flash Result Register */ +} Efc; +#endif /* __ASSEMBLY__ */ +/* -------- EEFC_FMR : (EFC Offset: 0x00) EEFC Flash Mode Register -------- */ +#define EEFC_FMR_FRDY (0x1 << 0) /**< \brief (EEFC_FMR) Ready Interrupt Enable */ +#define EEFC_FMR_FWS (0xf << 8) /**< \brief (EEFC_FMR) Flash Wait State */ +#define EEFC_FMR_FAM (0x1 << 24) /**< \brief (EEFC_FMR) Flash Access Mode */ +/* -------- EEFC_FCR : (EFC Offset: 0x04) EEFC Flash Command Register -------- */ +#define EEFC_FCR_FCMD (0xff << 0) /**< \brief (EEFC_FCR) Flash Command */ +#define EEFC_FCR_FARG (0xffff << 8) /**< \brief (EEFC_FCR) Flash Command Argument */ +#define EEFC_FCR_FKEY (0xff << 24) /**< \brief (EEFC_FCR) Flash Writing Protection Key */ +/* -------- EEFC_FSR : (EFC Offset: 0x08) EEFC Flash Status Register -------- */ +#define EEFC_FSR_FRDY (0x1 << 0) /**< \brief (EEFC_FSR) Flash Ready Status */ +#define EEFC_FSR_FCMDE (0x1 << 1) /**< \brief (EEFC_FSR) Flash Command Error Status */ +#define EEFC_FSR_FLOCKE (0x1 << 2) /**< \brief (EEFC_FSR) Flash Lock Error Status */ +/* -------- EEFC_FRR : (EFC Offset: 0x0C) EEFC Flash Result Register -------- */ +#define EEFC_FRR_FVALUE (0xffffffff << 0) /**< \brief (EEFC_FRR) Flash Result Value */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_GPBR General Purpose Backup Register */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Gpbr hardware registers */ +typedef struct { + RwReg SYS_GPBR0; /**< \brief (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ + RwReg SYS_GPBR1; /**< \brief (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ + RwReg SYS_GPBR2; /**< \brief (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ + RwReg SYS_GPBR3; /**< \brief (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ +} Gpbr; +#endif /* __ASSEMBLY__ */ +/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ +#define SYS_GPBR0_GPBR_VALUE0 (0xffffffff << 0) /**< \brief (SYS_GPBR0) Value of GPBR x */ +/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ +#define SYS_GPBR1_GPBR_VALUE1 (0xffffffff << 0) /**< \brief (SYS_GPBR1) Value of GPBR x */ +/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ +#define SYS_GPBR2_GPBR_VALUE2 (0xffffffff << 0) /**< \brief (SYS_GPBR2) Value of GPBR x */ +/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ +#define SYS_GPBR3_GPBR_VALUE3 (0xffffffff << 0) /**< \brief (SYS_GPBR3) Value of GPBR x */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR High Speed MultiMedia Card Interface */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_HSMCI High Speed MultiMedia Card Interface */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Hsmci hardware registers */ +typedef struct { + WoReg HSMCI_CR; /**< \brief (Hsmci Offset: 0x00) Control Register */ + RwReg HSMCI_MR; /**< \brief (Hsmci Offset: 0x04) Mode Register */ + RwReg HSMCI_DTOR; /**< \brief (Hsmci Offset: 0x08) Data Timeout Register */ + RwReg HSMCI_SDCR; /**< \brief (Hsmci Offset: 0x0C) SD/SDIO Card Register */ + RwReg HSMCI_ARGR; /**< \brief (Hsmci Offset: 0x10) Argument Register */ + WoReg HSMCI_CMDR; /**< \brief (Hsmci Offset: 0x14) Command Register */ + RwReg HSMCI_BLKR; /**< \brief (Hsmci Offset: 0x18) Block Register */ + RwReg HSMCI_CSTOR; /**< \brief (Hsmci Offset: 0x1C) Completion Signal Timeout Register */ + RoReg HSMCI_RSPR[4]; /**< \brief (Hsmci Offset: 0x20) Response Register */ + RoReg HSMCI_RDR; /**< \brief (Hsmci Offset: 0x30) Receive Data Register */ + WoReg HSMCI_TDR; /**< \brief (Hsmci Offset: 0x34) Transmit Data Register */ + RwReg Reserved1[2]; + RoReg HSMCI_SR; /**< \brief (Hsmci Offset: 0x40) Status Register */ + WoReg HSMCI_IER; /**< \brief (Hsmci Offset: 0x44) Interrupt Enable Register */ + WoReg HSMCI_IDR; /**< \brief (Hsmci Offset: 0x48) Interrupt Disable Register */ + RoReg HSMCI_IMR; /**< \brief (Hsmci Offset: 0x4C) Interrupt Mask Register */ + RwReg Reserved2[1]; + RwReg HSMCI_CFG; /**< \brief (Hsmci Offset: 0x54) Configuration Register */ + RwReg Reserved3[35]; + RwReg HSMCI_WPMR; /**< \brief (Hsmci Offset: 0xE4) Write Protection Mode Register */ + RoReg HSMCI_WPSR; /**< \brief (Hsmci Offset: 0xE8) Write Protection Status Register */ + RwReg Reserved4[5]; + RwReg HSMCI_RPR; /**< \brief (Hsmci Offset: 0x100) Receive Pointer Register */ + RwReg HSMCI_RCR; /**< \brief (Hsmci Offset: 0x104) Receive Counter Register */ + RwReg HSMCI_TPR; /**< \brief (Hsmci Offset: 0x108) Transmit Pointer Register */ + RwReg HSMCI_TCR; /**< \brief (Hsmci Offset: 0x10C) Transmit Counter Register */ + RwReg HSMCI_RNPR; /**< \brief (Hsmci Offset: 0x110) Receive Next Pointer Register */ + RwReg HSMCI_RNCR; /**< \brief (Hsmci Offset: 0x114) Receive Next Counter Register */ + RwReg HSMCI_TNPR; /**< \brief (Hsmci Offset: 0x118) Transmit Next Pointer Register */ + RwReg HSMCI_TNCR; /**< \brief (Hsmci Offset: 0x11C) Transmit Next Counter Register */ + WoReg HSMCI_PTCR; /**< \brief (Hsmci Offset: 0x120) Transfer Control Register */ + RoReg HSMCI_PTSR; /**< \brief (Hsmci Offset: 0x124) Transfer Status Register */ +} Hsmci; +#endif /* __ASSEMBLY__ */ +/* -------- HSMCI_CR : (HSMCI Offset: 0x00) Control Register -------- */ +#define HSMCI_CR_MCIEN (0x1 << 0) /**< \brief (HSMCI_CR) Multi-Media Interface Enable */ +#define HSMCI_CR_MCIDIS (0x1 << 1) /**< \brief (HSMCI_CR) Multi-Media Interface Disable */ +#define HSMCI_CR_PWSEN (0x1 << 2) /**< \brief (HSMCI_CR) Power Save Mode Enable */ +#define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ +#define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */ +/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ +#define HSMCI_MR_CLKDIV_Pos 0 +#define HSMCI_MR_CLKDIV_Msk (0xffu << HSMCI_MR_CLKDIV_Pos) /**< \brief (HSMCI_MR) Clock Divider */ +#define HSMCI_MR_CLKDIV(value) ((HSMCI_MR_CLKDIV_Msk & ((value) << HSMCI_MR_CLKDIV_Pos))) +#define HSMCI_MR_PWSDIV_Pos 8 +#define HSMCI_MR_PWSDIV_Msk (0x7u << HSMCI_MR_PWSDIV_Pos) /**< \brief (HSMCI_MR) Power Saving Divider */ +#define HSMCI_MR_PWSDIV(value) ((HSMCI_MR_PWSDIV_Msk & ((value) << HSMCI_MR_PWSDIV_Pos))) +#define HSMCI_MR_RDPROOF (0x1u << 11) /**< \brief (HSMCI_MR) */ +#define HSMCI_MR_WRPROOF (0x1u << 12) /**< \brief (HSMCI_MR) */ +#define HSMCI_MR_FBYTE (0x1u << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ +#define HSMCI_MR_PADV (0x1u << 14) /**< \brief (HSMCI_MR) Padding Value */ +#define HSMCI_MR_PDCMODE (0x1u << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */ +#define HSMCI_MR_BLKLEN_Pos 16 +#define HSMCI_MR_BLKLEN_Msk (0xffffu << HSMCI_MR_BLKLEN_Pos) /**< \brief (HSMCI_MR) Data Block Length */ +#define HSMCI_MR_BLKLEN(value) ((HSMCI_MR_BLKLEN_Msk & ((value) << HSMCI_MR_BLKLEN_Pos))) +/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ +#define HSMCI_DTOR_DTOCYC_Pos 0 +#define HSMCI_DTOR_DTOCYC_Msk (0xfu << HSMCI_DTOR_DTOCYC_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ +#define HSMCI_DTOR_DTOCYC(value) ((HSMCI_DTOR_DTOCYC_Msk & ((value) << HSMCI_DTOR_DTOCYC_Pos))) +#define HSMCI_DTOR_DTOMUL_Pos 4 +#define HSMCI_DTOR_DTOMUL_Msk (0x7u << HSMCI_DTOR_DTOMUL_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ +#define HSMCI_DTOR_DTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_DTOR) DTOCYC */ +#define HSMCI_DTOR_DTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 16 */ +#define HSMCI_DTOR_DTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 128 */ +#define HSMCI_DTOR_DTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 256 */ +#define HSMCI_DTOR_DTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1024 */ +#define HSMCI_DTOR_DTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 4096 */ +#define HSMCI_DTOR_DTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 65536 */ +#define HSMCI_DTOR_DTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1048576 */ +/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ +#define HSMCI_SDCR_SDCSEL_Pos 0 +#define HSMCI_SDCR_SDCSEL_Msk (0x3u << HSMCI_SDCR_SDCSEL_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ +#define HSMCI_SDCR_SDCSEL_SLOTA (0x0u << 0) /**< \brief (HSMCI_SDCR) Slot A is selected. */ +#define HSMCI_SDCR_SDCSEL_SLOTB (0x1u << 0) /**< \brief (HSMCI_SDCR) - */ +#define HSMCI_SDCR_SDCSEL_SLOTC (0x2u << 0) /**< \brief (HSMCI_SDCR) - */ +#define HSMCI_SDCR_SDCSEL_SLOTD (0x3u << 0) /**< \brief (HSMCI_SDCR) - */ +#define HSMCI_SDCR_SDCBUS_Pos 6 +#define HSMCI_SDCR_SDCBUS_Msk (0x3u << HSMCI_SDCR_SDCBUS_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ +#define HSMCI_SDCR_SDCBUS_1 (0x0u << 6) /**< \brief (HSMCI_SDCR) 1 bit */ +#define HSMCI_SDCR_SDCBUS_4 (0x2u << 6) /**< \brief (HSMCI_SDCR) 4 bit */ +#define HSMCI_SDCR_SDCBUS_8 (0x3u << 6) /**< \brief (HSMCI_SDCR) 8 bit */ +/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ +#define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */ +/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ +#define HSMCI_CMDR_CMDNB_Pos 0 +#define HSMCI_CMDR_CMDNB_Msk (0x3fu << HSMCI_CMDR_CMDNB_Pos) /**< \brief (HSMCI_CMDR) Command Number */ +#define HSMCI_CMDR_CMDNB(value) ((HSMCI_CMDR_CMDNB_Msk & ((value) << HSMCI_CMDR_CMDNB_Pos))) +#define HSMCI_CMDR_RSPTYP_Pos 6 +#define HSMCI_CMDR_RSPTYP_Msk (0x3u << HSMCI_CMDR_RSPTYP_Pos) /**< \brief (HSMCI_CMDR) Response Type */ +#define HSMCI_CMDR_RSPTYP_NORESP (0x0u << 6) /**< \brief (HSMCI_CMDR) No response. */ +#define HSMCI_CMDR_RSPTYP_48_BIT (0x1u << 6) /**< \brief (HSMCI_CMDR) 48-bit response. */ +#define HSMCI_CMDR_RSPTYP_136_BIT (0x2u << 6) /**< \brief (HSMCI_CMDR) 136-bit response. */ +#define HSMCI_CMDR_RSPTYP_R1B (0x3u << 6) /**< \brief (HSMCI_CMDR) R1b response type */ +#define HSMCI_CMDR_SPCMD_Pos 8 +#define HSMCI_CMDR_SPCMD_Msk (0x7u << HSMCI_CMDR_SPCMD_Pos) /**< \brief (HSMCI_CMDR) Special Command */ +#define HSMCI_CMDR_SPCMD_STD (0x0u << 8) /**< \brief (HSMCI_CMDR) Not a special CMD. */ +#define HSMCI_CMDR_SPCMD_INIT (0x1u << 8) /**< \brief (HSMCI_CMDR) Initialization CMD:74 clock cycles for initialization sequence. */ +#define HSMCI_CMDR_SPCMD_SYNC (0x2u << 8) /**< \brief (HSMCI_CMDR) Synchronized CMD:Wait for the end of the current data block transfer before sending the pending command. */ +#define HSMCI_CMDR_SPCMD_CE_ATA (0x3u << 8) /**< \brief (HSMCI_CMDR) CE-ATA Completion Signal disable Command.The host cancels the ability for the device to return a command completion signal on the command line. */ +#define HSMCI_CMDR_SPCMD_IT_CMD (0x4u << 8) /**< \brief (HSMCI_CMDR) Interrupt command:Corresponds to the Interrupt Mode (CMD40). */ +#define HSMCI_CMDR_SPCMD_IT_RESP (0x5u << 8) /**< \brief (HSMCI_CMDR) Interrupt response:Corresponds to the Interrupt Mode (CMD40). */ +#define HSMCI_CMDR_SPCMD_BOR (0x6u << 8) /**< \brief (HSMCI_CMDR) Boot Operation Request.Start a boot operation mode, the host processor can read boot data from the MMC device directly. */ +#define HSMCI_CMDR_SPCMD_EBO (0x7u << 8) /**< \brief (HSMCI_CMDR) End Boot Operation.This command allows the host processor to terminate the boot operation mode. */ +#define HSMCI_CMDR_OPDCMD (0x1u << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ +#define HSMCI_CMDR_OPDCMD_PUSHPULL (0x0u << 11) /**< \brief (HSMCI_CMDR) Push pull command. */ +#define HSMCI_CMDR_OPDCMD_OPENDRAIN (0x1u << 11) /**< \brief (HSMCI_CMDR) Open drain command. */ +#define HSMCI_CMDR_MAXLAT (0x1u << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ +#define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */ +#define HSMCI_CMDR_MAXLAT_64 (0x1u << 12) /**< \brief (HSMCI_CMDR) 64-cycle max latency. */ +#define HSMCI_CMDR_TRCMD_Pos 16 +#define HSMCI_CMDR_TRCMD_Msk (0x3u << HSMCI_CMDR_TRCMD_Pos) /**< \brief (HSMCI_CMDR) Transfer Command */ +#define HSMCI_CMDR_TRCMD_NO_DATA (0x0u << 16) /**< \brief (HSMCI_CMDR) No data transfer */ +#define HSMCI_CMDR_TRCMD_START_DATA (0x1u << 16) /**< \brief (HSMCI_CMDR) Start data transfer */ +#define HSMCI_CMDR_TRCMD_STOP_DATA (0x2u << 16) /**< \brief (HSMCI_CMDR) Stop data transfer */ +#define HSMCI_CMDR_TRDIR (0x1u << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ +#define HSMCI_CMDR_TRDIR_WRITE (0x0u << 18) /**< \brief (HSMCI_CMDR) Write. */ +#define HSMCI_CMDR_TRDIR_READ (0x1u << 18) /**< \brief (HSMCI_CMDR) Read. */ +#define HSMCI_CMDR_TRTYP_Pos 19 +#define HSMCI_CMDR_TRTYP_Msk (0x7u << HSMCI_CMDR_TRTYP_Pos) /**< \brief (HSMCI_CMDR) Transfer Type */ +#define HSMCI_CMDR_TRTYP_SINGLE (0x0u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Single Block */ +#define HSMCI_CMDR_TRTYP_MULTIPLE (0x1u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Multiple Block */ +#define HSMCI_CMDR_TRTYP_STREAM (0x2u << 19) /**< \brief (HSMCI_CMDR) MMC Stream */ +#define HSMCI_CMDR_TRTYP_BYTE (0x4u << 19) /**< \brief (HSMCI_CMDR) SDIO Byte */ +#define HSMCI_CMDR_TRTYP_BLOCK (0x5u << 19) /**< \brief (HSMCI_CMDR) SDIO Block */ +#define HSMCI_CMDR_IOSPCMD_Pos 24 +#define HSMCI_CMDR_IOSPCMD_Msk (0x3u << HSMCI_CMDR_IOSPCMD_Pos) /**< \brief (HSMCI_CMDR) SDIO Special Command */ +#define HSMCI_CMDR_IOSPCMD_STD (0x0u << 24) /**< \brief (HSMCI_CMDR) Not an SDIO Special Command */ +#define HSMCI_CMDR_IOSPCMD_SUSPEND (0x1u << 24) /**< \brief (HSMCI_CMDR) SDIO Suspend Command */ +#define HSMCI_CMDR_IOSPCMD_RESUME (0x2u << 24) /**< \brief (HSMCI_CMDR) SDIO Resume Command */ +#define HSMCI_CMDR_ATACS (0x1u << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ +#define HSMCI_CMDR_ATACS_NORMAL (0x0u << 26) /**< \brief (HSMCI_CMDR) Normal operation mode. */ +#define HSMCI_CMDR_ATACS_COMPLETION (0x1u << 26) /**< \brief (HSMCI_CMDR) This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR). */ +#define HSMCI_CMDR_BOOT_ACK (0x1u << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ +/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ +#define HSMCI_BLKR_BCNT_Pos 0 +#define HSMCI_BLKR_BCNT_Msk (0xffffu << HSMCI_BLKR_BCNT_Pos) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ +#define HSMCI_BLKR_BCNT_MULTIPLE (0x0u << 0) /**< \brief (HSMCI_BLKR) MMC/SDCARD Multiple BlockFrom 1 to 65635: Value 0 corresponds to an infinite block transfer. */ +#define HSMCI_BLKR_BCNT_BYTE (0x4u << 0) /**< \brief (HSMCI_BLKR) SDIO ByteFrom 1 to 512 bytes: Value 0 corresponds to a 512-byte transfer.Values from 0x200 to 0xFFFF are forbidden. */ +#define HSMCI_BLKR_BCNT_BLOCK (0x5u << 0) /**< \brief (HSMCI_BLKR) SDIO BlockFrom 1 to 511 blocks: Value 0 corresponds to an infinite block transfer.Values from 0x200 to 0xFFFF are forbidden. */ +#define HSMCI_BLKR_BLKLEN_Pos 16 +#define HSMCI_BLKR_BLKLEN_Msk (0xffffu << HSMCI_BLKR_BLKLEN_Pos) /**< \brief (HSMCI_BLKR) Data Block Length */ +#define HSMCI_BLKR_BLKLEN(value) ((HSMCI_BLKR_BLKLEN_Msk & ((value) << HSMCI_BLKR_BLKLEN_Pos))) +/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ +#define HSMCI_CSTOR_CSTOCYC_Pos 0 +#define HSMCI_CSTOR_CSTOCYC_Msk (0xfu << HSMCI_CSTOR_CSTOCYC_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ +#define HSMCI_CSTOR_CSTOCYC(value) ((HSMCI_CSTOR_CSTOCYC_Msk & ((value) << HSMCI_CSTOR_CSTOCYC_Pos))) +#define HSMCI_CSTOR_CSTOMUL_Pos 4 +#define HSMCI_CSTOR_CSTOMUL_Msk (0x7u << HSMCI_CSTOR_CSTOMUL_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ +#define HSMCI_CSTOR_CSTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1 */ +#define HSMCI_CSTOR_CSTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 16 */ +#define HSMCI_CSTOR_CSTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 128 */ +#define HSMCI_CSTOR_CSTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 256 */ +#define HSMCI_CSTOR_CSTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1024 */ +#define HSMCI_CSTOR_CSTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 4096 */ +#define HSMCI_CSTOR_CSTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 65536 */ +#define HSMCI_CSTOR_CSTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1048576 */ +/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ +#define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */ +/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ +#define HSMCI_RDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_RDR) Data to Read */ +/* -------- HSMCI_TDR : (HSMCI Offset: 0x34) Transmit Data Register -------- */ +#define HSMCI_TDR_DATA (0xffffffff << 0) /**< \brief (HSMCI_TDR) Data to Write */ +/* -------- HSMCI_SR : (HSMCI Offset: 0x40) Status Register -------- */ +#define HSMCI_SR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_SR) Command Ready */ +#define HSMCI_SR_RXRDY (0x1 << 1) /**< \brief (HSMCI_SR) Receiver Ready */ +#define HSMCI_SR_TXRDY (0x1 << 2) /**< \brief (HSMCI_SR) Transmit Ready */ +#define HSMCI_SR_BLKE (0x1 << 3) /**< \brief (HSMCI_SR) Data Block Ended */ +#define HSMCI_SR_DTIP (0x1 << 4) /**< \brief (HSMCI_SR) Data Transfer in Progress */ +#define HSMCI_SR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_SR) HSMCI Not Busy */ +#define HSMCI_SR_ENDRX (0x1 << 6) /**< \brief (HSMCI_SR) End of RX Buffer */ +#define HSMCI_SR_ENDTX (0x1 << 7) /**< \brief (HSMCI_SR) End of TX Buffer */ +#define HSMCI_SR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_SR) SDIO Interrupt for Slot A */ +#define HSMCI_SR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_SR) SDIO Read Wait Operation Status */ +#define HSMCI_SR_CSRCV (0x1 << 13) /**< \brief (HSMCI_SR) CE-ATA Completion Signal Received */ +#define HSMCI_SR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_SR) RX Buffer Full */ +#define HSMCI_SR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_SR) TX Buffer Empty */ +#define HSMCI_SR_RINDE (0x1 << 16) /**< \brief (HSMCI_SR) Response Index Error */ +#define HSMCI_SR_RDIRE (0x1 << 17) /**< \brief (HSMCI_SR) Response Direction Error */ +#define HSMCI_SR_RCRCE (0x1 << 18) /**< \brief (HSMCI_SR) Response CRC Error */ +#define HSMCI_SR_RENDE (0x1 << 19) /**< \brief (HSMCI_SR) Response End Bit Error */ +#define HSMCI_SR_RTOE (0x1 << 20) /**< \brief (HSMCI_SR) Response Time-out Error */ +#define HSMCI_SR_DCRCE (0x1 << 21) /**< \brief (HSMCI_SR) Data CRC Error */ +#define HSMCI_SR_DTOE (0x1 << 22) /**< \brief (HSMCI_SR) Data Time-out Error */ +#define HSMCI_SR_CSTOE (0x1 << 23) /**< \brief (HSMCI_SR) Completion Signal Time-out Error */ +#define HSMCI_SR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_SR) FIFO empty flag */ +#define HSMCI_SR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_SR) Transfer Done flag */ +#define HSMCI_SR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Received */ +#define HSMCI_SR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Error */ +#define HSMCI_SR_OVRE (0x1 << 30) /**< \brief (HSMCI_SR) Overrun */ +#define HSMCI_SR_UNRE (0x1 << 31) /**< \brief (HSMCI_SR) Underrun */ +/* -------- HSMCI_IER : (HSMCI Offset: 0x44) Interrupt Enable Register -------- */ +#define HSMCI_IER_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IER) Command Ready Interrupt Enable */ +#define HSMCI_IER_RXRDY (0x1 << 1) /**< \brief (HSMCI_IER) Receiver Ready Interrupt Enable */ +#define HSMCI_IER_TXRDY (0x1 << 2) /**< \brief (HSMCI_IER) Transmit Ready Interrupt Enable */ +#define HSMCI_IER_BLKE (0x1 << 3) /**< \brief (HSMCI_IER) Data Block Ended Interrupt Enable */ +#define HSMCI_IER_DTIP (0x1 << 4) /**< \brief (HSMCI_IER) Data Transfer in Progress Interrupt Enable */ +#define HSMCI_IER_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IER) Data Not Busy Interrupt Enable */ +#define HSMCI_IER_ENDRX (0x1 << 6) /**< \brief (HSMCI_IER) End of Receive Buffer Interrupt Enable */ +#define HSMCI_IER_ENDTX (0x1 << 7) /**< \brief (HSMCI_IER) End of Transmit Buffer Interrupt Enable */ +#define HSMCI_IER_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IER) SDIO Interrupt for Slot A Interrupt Enable */ +#define HSMCI_IER_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IER) SDIO Read Wait Operation Status Interrupt Enable */ +#define HSMCI_IER_CSRCV (0x1 << 13) /**< \brief (HSMCI_IER) Completion Signal Received Interrupt Enable */ +#define HSMCI_IER_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IER) Receive Buffer Full Interrupt Enable */ +#define HSMCI_IER_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IER) Transmit Buffer Empty Interrupt Enable */ +#define HSMCI_IER_RINDE (0x1 << 16) /**< \brief (HSMCI_IER) Response Index Error Interrupt Enable */ +#define HSMCI_IER_RDIRE (0x1 << 17) /**< \brief (HSMCI_IER) Response Direction Error Interrupt Enable */ +#define HSMCI_IER_RCRCE (0x1 << 18) /**< \brief (HSMCI_IER) Response CRC Error Interrupt Enable */ +#define HSMCI_IER_RENDE (0x1 << 19) /**< \brief (HSMCI_IER) Response End Bit Error Interrupt Enable */ +#define HSMCI_IER_RTOE (0x1 << 20) /**< \brief (HSMCI_IER) Response Time-out Error Interrupt Enable */ +#define HSMCI_IER_DCRCE (0x1 << 21) /**< \brief (HSMCI_IER) Data CRC Error Interrupt Enable */ +#define HSMCI_IER_DTOE (0x1 << 22) /**< \brief (HSMCI_IER) Data Time-out Error Interrupt Enable */ +#define HSMCI_IER_CSTOE (0x1 << 23) /**< \brief (HSMCI_IER) Completion Signal Timeout Error Interrupt Enable */ +#define HSMCI_IER_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IER) FIFO empty Interrupt enable */ +#define HSMCI_IER_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IER) Transfer Done Interrupt enable */ +#define HSMCI_IER_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IER) Boot Acknowledge Interrupt Enable */ +#define HSMCI_IER_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IER) Boot Acknowledge Error Interrupt Enable */ +#define HSMCI_IER_OVRE (0x1 << 30) /**< \brief (HSMCI_IER) Overrun Interrupt Enable */ +#define HSMCI_IER_UNRE (0x1 << 31) /**< \brief (HSMCI_IER) Underrun Interrupt Enable */ +/* -------- HSMCI_IDR : (HSMCI Offset: 0x48) Interrupt Disable Register -------- */ +#define HSMCI_IDR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IDR) Command Ready Interrupt Disable */ +#define HSMCI_IDR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IDR) Receiver Ready Interrupt Disable */ +#define HSMCI_IDR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IDR) Transmit Ready Interrupt Disable */ +#define HSMCI_IDR_BLKE (0x1 << 3) /**< \brief (HSMCI_IDR) Data Block Ended Interrupt Disable */ +#define HSMCI_IDR_DTIP (0x1 << 4) /**< \brief (HSMCI_IDR) Data Transfer in Progress Interrupt Disable */ +#define HSMCI_IDR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IDR) Data Not Busy Interrupt Disable */ +#define HSMCI_IDR_ENDRX (0x1 << 6) /**< \brief (HSMCI_IDR) End of Receive Buffer Interrupt Disable */ +#define HSMCI_IDR_ENDTX (0x1 << 7) /**< \brief (HSMCI_IDR) End of Transmit Buffer Interrupt Disable */ +#define HSMCI_IDR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IDR) SDIO Interrupt for Slot A Interrupt Disable */ +#define HSMCI_IDR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IDR) SDIO Read Wait Operation Status Interrupt Disable */ +#define HSMCI_IDR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IDR) Completion Signal received interrupt Disable */ +#define HSMCI_IDR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IDR) Receive Buffer Full Interrupt Disable */ +#define HSMCI_IDR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IDR) Transmit Buffer Empty Interrupt Disable */ +#define HSMCI_IDR_RINDE (0x1 << 16) /**< \brief (HSMCI_IDR) Response Index Error Interrupt Disable */ +#define HSMCI_IDR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IDR) Response Direction Error Interrupt Disable */ +#define HSMCI_IDR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IDR) Response CRC Error Interrupt Disable */ +#define HSMCI_IDR_RENDE (0x1 << 19) /**< \brief (HSMCI_IDR) Response End Bit Error Interrupt Disable */ +#define HSMCI_IDR_RTOE (0x1 << 20) /**< \brief (HSMCI_IDR) Response Time-out Error Interrupt Disable */ +#define HSMCI_IDR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IDR) Data CRC Error Interrupt Disable */ +#define HSMCI_IDR_DTOE (0x1 << 22) /**< \brief (HSMCI_IDR) Data Time-out Error Interrupt Disable */ +#define HSMCI_IDR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IDR) Completion Signal Time out Error Interrupt Disable */ +#define HSMCI_IDR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IDR) FIFO empty Interrupt Disable */ +#define HSMCI_IDR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IDR) Transfer Done Interrupt Disable */ +#define HSMCI_IDR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IDR) Boot Acknowledge Interrupt Disable */ +#define HSMCI_IDR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IDR) Boot Acknowledge Error Interrupt Disable */ +#define HSMCI_IDR_OVRE (0x1 << 30) /**< \brief (HSMCI_IDR) Overrun Interrupt Disable */ +#define HSMCI_IDR_UNRE (0x1 << 31) /**< \brief (HSMCI_IDR) Underrun Interrupt Disable */ +/* -------- HSMCI_IMR : (HSMCI Offset: 0x4C) Interrupt Mask Register -------- */ +#define HSMCI_IMR_CMDRDY (0x1 << 0) /**< \brief (HSMCI_IMR) Command Ready Interrupt Mask */ +#define HSMCI_IMR_RXRDY (0x1 << 1) /**< \brief (HSMCI_IMR) Receiver Ready Interrupt Mask */ +#define HSMCI_IMR_TXRDY (0x1 << 2) /**< \brief (HSMCI_IMR) Transmit Ready Interrupt Mask */ +#define HSMCI_IMR_BLKE (0x1 << 3) /**< \brief (HSMCI_IMR) Data Block Ended Interrupt Mask */ +#define HSMCI_IMR_DTIP (0x1 << 4) /**< \brief (HSMCI_IMR) Data Transfer in Progress Interrupt Mask */ +#define HSMCI_IMR_NOTBUSY (0x1 << 5) /**< \brief (HSMCI_IMR) Data Not Busy Interrupt Mask */ +#define HSMCI_IMR_ENDRX (0x1 << 6) /**< \brief (HSMCI_IMR) End of Receive Buffer Interrupt Mask */ +#define HSMCI_IMR_ENDTX (0x1 << 7) /**< \brief (HSMCI_IMR) End of Transmit Buffer Interrupt Mask */ +#define HSMCI_IMR_SDIOIRQA (0x1 << 8) /**< \brief (HSMCI_IMR) SDIO Interrupt for Slot A Interrupt Mask */ +#define HSMCI_IMR_SDIOWAIT (0x1 << 12) /**< \brief (HSMCI_IMR) SDIO Read Wait Operation Status Interrupt Mask */ +#define HSMCI_IMR_CSRCV (0x1 << 13) /**< \brief (HSMCI_IMR) Completion Signal Received Interrupt Mask */ +#define HSMCI_IMR_RXBUFF (0x1 << 14) /**< \brief (HSMCI_IMR) Receive Buffer Full Interrupt Mask */ +#define HSMCI_IMR_TXBUFE (0x1 << 15) /**< \brief (HSMCI_IMR) Transmit Buffer Empty Interrupt Mask */ +#define HSMCI_IMR_RINDE (0x1 << 16) /**< \brief (HSMCI_IMR) Response Index Error Interrupt Mask */ +#define HSMCI_IMR_RDIRE (0x1 << 17) /**< \brief (HSMCI_IMR) Response Direction Error Interrupt Mask */ +#define HSMCI_IMR_RCRCE (0x1 << 18) /**< \brief (HSMCI_IMR) Response CRC Error Interrupt Mask */ +#define HSMCI_IMR_RENDE (0x1 << 19) /**< \brief (HSMCI_IMR) Response End Bit Error Interrupt Mask */ +#define HSMCI_IMR_RTOE (0x1 << 20) /**< \brief (HSMCI_IMR) Response Time-out Error Interrupt Mask */ +#define HSMCI_IMR_DCRCE (0x1 << 21) /**< \brief (HSMCI_IMR) Data CRC Error Interrupt Mask */ +#define HSMCI_IMR_DTOE (0x1 << 22) /**< \brief (HSMCI_IMR) Data Time-out Error Interrupt Mask */ +#define HSMCI_IMR_CSTOE (0x1 << 23) /**< \brief (HSMCI_IMR) Completion Signal Time-out Error Interrupt Mask */ +#define HSMCI_IMR_FIFOEMPTY (0x1 << 26) /**< \brief (HSMCI_IMR) FIFO Empty Interrupt Mask */ +#define HSMCI_IMR_XFRDONE (0x1 << 27) /**< \brief (HSMCI_IMR) Transfer Done Interrupt Mask */ +#define HSMCI_IMR_ACKRCV (0x1 << 28) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Received Interrupt Mask */ +#define HSMCI_IMR_ACKRCVE (0x1 << 29) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Error Interrupt Mask */ +#define HSMCI_IMR_OVRE (0x1 << 30) /**< \brief (HSMCI_IMR) Overrun Interrupt Mask */ +#define HSMCI_IMR_UNRE (0x1 << 31) /**< \brief (HSMCI_IMR) Underrun Interrupt Mask */ +/* -------- HSMCI_CFG : (HSMCI Offset: 0x54) Configuration Register -------- */ +#define HSMCI_CFG_FIFOMODE (0x1 << 0) /**< \brief (HSMCI_CFG) HSMCI Internal FIFO control mode */ +#define HSMCI_CFG_FERRCTRL (0x1 << 4) /**< \brief (HSMCI_CFG) Flow Error flag reset control mode */ +#define HSMCI_CFG_HSMODE (0x1 << 8) /**< \brief (HSMCI_CFG) High Speed Mode */ +#define HSMCI_CFG_LSYNC (0x1 << 12) /**< \brief (HSMCI_CFG) Synchronize on the last block */ +/* -------- HSMCI_WPMR : (HSMCI Offset: 0xE4) Write Protection Mode Register -------- */ +#define HSMCI_WPMR_WP_EN (0x1 << 0) /**< \brief (HSMCI_WPMR) Write Protection Enable */ +#define HSMCI_WPMR_WP_KEY (0xffffff << 8) /**< \brief (HSMCI_WPMR) Write Protection Key password */ +/* -------- HSMCI_WPSR : (HSMCI Offset: 0xE8) Write Protection Status Register -------- */ +#define HSMCI_WPSR_WP_VS (0xf << 0) /**< \brief (HSMCI_WPSR) Write Protection Violation Status */ +#define HSMCI_WPSR_WP_VSRC (0xffff << 8) /**< \brief (HSMCI_WPSR) Write Protection Violation SouRCe */ +/* -------- HSMCI_RPR : (HSMCI Offset: 0x100) Receive Pointer Register -------- */ +#define HSMCI_RPR_RXPTR (0xffffffff << 0) /**< \brief (HSMCI_RPR) Receive Pointer Register */ +/* -------- HSMCI_RCR : (HSMCI Offset: 0x104) Receive Counter Register -------- */ +#define HSMCI_RCR_RXCTR (0xffff << 0) /**< \brief (HSMCI_RCR) Receive Counter Register */ +/* -------- HSMCI_TPR : (HSMCI Offset: 0x108) Transmit Pointer Register -------- */ +#define HSMCI_TPR_TXPTR (0xffffffff << 0) /**< \brief (HSMCI_TPR) Transmit Counter Register */ +/* -------- HSMCI_TCR : (HSMCI Offset: 0x10C) Transmit Counter Register -------- */ +#define HSMCI_TCR_TXCTR (0xffff << 0) /**< \brief (HSMCI_TCR) Transmit Counter Register */ +/* -------- HSMCI_RNPR : (HSMCI Offset: 0x110) Receive Next Pointer Register -------- */ +#define HSMCI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (HSMCI_RNPR) Receive Next Pointer */ +/* -------- HSMCI_RNCR : (HSMCI Offset: 0x114) Receive Next Counter Register -------- */ +#define HSMCI_RNCR_RXNCTR (0xffff << 0) /**< \brief (HSMCI_RNCR) Receive Next Counter */ +/* -------- HSMCI_TNPR : (HSMCI Offset: 0x118) Transmit Next Pointer Register -------- */ +#define HSMCI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (HSMCI_TNPR) Transmit Next Pointer */ +/* -------- HSMCI_TNCR : (HSMCI Offset: 0x11C) Transmit Next Counter Register -------- */ +#define HSMCI_TNCR_TXNCTR (0xffff << 0) /**< \brief (HSMCI_TNCR) Transmit Counter Next */ +/* -------- HSMCI_PTCR : (HSMCI Offset: 0x120) Transfer Control Register -------- */ +#define HSMCI_PTCR_RXTEN (0x1 << 0) /**< \brief (HSMCI_PTCR) Receiver Transfer Enable */ +#define HSMCI_PTCR_RXTDIS (0x1 << 1) /**< \brief (HSMCI_PTCR) Receiver Transfer Disable */ +#define HSMCI_PTCR_TXTEN (0x1 << 8) /**< \brief (HSMCI_PTCR) Transmitter Transfer Enable */ +#define HSMCI_PTCR_TXTDIS (0x1 << 9) /**< \brief (HSMCI_PTCR) Transmitter Transfer Disable */ +/* -------- HSMCI_PTSR : (HSMCI Offset: 0x124) Transfer Status Register -------- */ +#define HSMCI_PTSR_RXTEN (0x1 << 0) /**< \brief (HSMCI_PTSR) Receiver Transfer Enable */ +#define HSMCI_PTSR_TXTEN (0x1 << 8) /**< \brief (HSMCI_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_MATRIX AHB Bus Matrix */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Matrix hardware registers */ +typedef struct { + RwReg MATRIX_MCFG[4]; /**< \brief (Matrix Offset: 0x0000) Master Configuration Register */ + RwReg Reserved1[12]; + RwReg MATRIX_SCFG[5]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration Register */ + RwReg Reserved2[11]; + RwReg MATRIX_PRAS0; /**< \brief (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ + RwReg Reserved3[1]; + RwReg MATRIX_PRAS1; /**< \brief (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ + RwReg Reserved4[1]; + RwReg MATRIX_PRAS2; /**< \brief (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ + RwReg Reserved5[1]; + RwReg MATRIX_PRAS3; /**< \brief (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ + RwReg Reserved6[1]; + RwReg MATRIX_PRAS4; /**< \brief (Matrix Offset: 0x00A0) Priority Register A for Slave 4 */ + RwReg Reserved7[28]; + RwReg CCFG_SYSIO; /**< \brief (Matrix Offset: 0x0114) System IO Configuration register */ + RwReg Reserved8[1]; + RwReg CCFG_SMCNFCS; /**< \brief (Matrix Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register */ + RwReg Reserved9[49]; + RwReg MATRIX_WPMR; /**< \brief (Matrix Offset: 0x1E4) Write Protect Mode Register */ + RoReg MATRIX_WPSR; /**< \brief (Matrix Offset: 0x1E8) Write Protect Status Register */ +} Matrix; +#endif /* __ASSEMBLY__ */ +/* -------- MATRIX_MCFG[4] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ +#define MATRIX_MCFG_ULBT (0x7 << 0) /**< \brief (MATRIX_MCFG[4]) Undefined Length Burst Type */ +/* -------- MATRIX_SCFG[5] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ +#define MATRIX_SCFG_SLOT_CYCLE (0xff << 0) /**< \brief (MATRIX_SCFG[5]) Maximum Number of Allowed Cycles for a Burst */ +#define MATRIX_SCFG_DEFMSTR_TYPE (0x3 << 16) /**< \brief (MATRIX_SCFG[5]) Default Master Type */ +#define MATRIX_SCFG_FIXED_DEFMSTR (0x7 << 18) /**< \brief (MATRIX_SCFG[5]) Fixed Default Master */ +#define MATRIX_SCFG_ARBT (0x3 << 24) /**< \brief (MATRIX_SCFG[5]) Arbitration Type */ +/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ +#define MATRIX_PRAS0_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS0) Master 0 Priority */ +#define MATRIX_PRAS0_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS0) Master 1 Priority */ +#define MATRIX_PRAS0_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS0) Master 2 Priority */ +#define MATRIX_PRAS0_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS0) Master 3 Priority */ +#define MATRIX_PRAS0_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS0) Master 4 Priority */ +/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ +#define MATRIX_PRAS1_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS1) Master 0 Priority */ +#define MATRIX_PRAS1_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS1) Master 1 Priority */ +#define MATRIX_PRAS1_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS1) Master 2 Priority */ +#define MATRIX_PRAS1_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS1) Master 3 Priority */ +#define MATRIX_PRAS1_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS1) Master 4 Priority */ +/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ +#define MATRIX_PRAS2_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS2) Master 0 Priority */ +#define MATRIX_PRAS2_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS2) Master 1 Priority */ +#define MATRIX_PRAS2_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS2) Master 2 Priority */ +#define MATRIX_PRAS2_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS2) Master 3 Priority */ +#define MATRIX_PRAS2_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS2) Master 4 Priority */ +/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ +#define MATRIX_PRAS3_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS3) Master 0 Priority */ +#define MATRIX_PRAS3_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS3) Master 1 Priority */ +#define MATRIX_PRAS3_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS3) Master 2 Priority */ +#define MATRIX_PRAS3_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS3) Master 3 Priority */ +#define MATRIX_PRAS3_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS3) Master 4 Priority */ +/* -------- MATRIX_PRAS4 : (MATRIX Offset: 0x00A0) Priority Register A for Slave 4 -------- */ +#define MATRIX_PRAS4_M0PR (0x3 << 0) /**< \brief (MATRIX_PRAS4) Master 0 Priority */ +#define MATRIX_PRAS4_M1PR (0x3 << 4) /**< \brief (MATRIX_PRAS4) Master 1 Priority */ +#define MATRIX_PRAS4_M2PR (0x3 << 8) /**< \brief (MATRIX_PRAS4) Master 2 Priority */ +#define MATRIX_PRAS4_M3PR (0x3 << 12) /**< \brief (MATRIX_PRAS4) Master 3 Priority */ +#define MATRIX_PRAS4_M4PR (0x3 << 16) /**< \brief (MATRIX_PRAS4) Master 4 Priority */ +/* -------- CCFG_SYSIO : (MATRIX Offset: 0x0114) System IO Configuration register -------- */ +#define CCFG_SYSIO_SYSIO4 (0x1 << 4) /**< \brief (CCFG_SYSIO) PB4 or TDI Assignment */ +#define CCFG_SYSIO_SYSIO5 (0x1 << 5) /**< \brief (CCFG_SYSIO) PB5 or TDO/TRACESWO Assignment */ +#define CCFG_SYSIO_SYSIO6 (0x1 << 6) /**< \brief (CCFG_SYSIO) PB6 or TMS/SWDIO Assignment */ +#define CCFG_SYSIO_SYSIO7 (0x1 << 7) /**< \brief (CCFG_SYSIO) PB7 or TCK/SWCLK Assignment */ +#define CCFG_SYSIO_SYSIO10 (0x1 << 10) /**< \brief (CCFG_SYSIO) PB10 or DDM Assignment */ +#define CCFG_SYSIO_SYSIO11 (0x1 << 11) /**< \brief (CCFG_SYSIO) PB11 or DDP Assignment */ +#define CCFG_SYSIO_SYSIO12 (0x1 << 12) /**< \brief (CCFG_SYSIO) PB12 or ERASE Assignment */ +/* -------- CCFG_SMCNFCS : (MATRIX Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register -------- */ +#define CCFG_SMCNFCS_SMC_NFCS0 (0x1 << 0) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 0 Assignment */ +#define CCFG_SMCNFCS_SMC_NFCS1 (0x1 << 1) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 1 Assignment */ +#define CCFG_SMCNFCS_SMC_NFCS2 (0x1 << 2) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 2 Assignment */ +#define CCFG_SMCNFCS_SMC_NFCS3 (0x1 << 3) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 3 Assignment */ +/* -------- MATRIX_WPMR : (MATRIX Offset: 0x1E4) Write Protect Mode Register -------- */ +#define MATRIX_WPMR_WPEN (0x1 << 0) /**< \brief (MATRIX_WPMR) Write Protect ENable */ +#define MATRIX_WPMR_WPKEY (0xffffff << 8) /**< \brief (MATRIX_WPMR) Write Protect KEY (Write-only) */ +/* -------- MATRIX_WPSR : (MATRIX Offset: 0x1E8) Write Protect Status Register -------- */ +#define MATRIX_WPSR_WPVS (0x1 << 0) /**< \brief (MATRIX_WPSR) Write Protect Violation Status */ +#define MATRIX_WPSR_WPVSRC (0xffff << 8) /**< \brief (MATRIX_WPSR) Write Protect Violation Source */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_PDC Peripheral DMA Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Pdc hardware registers */ +typedef struct { + RwReg Reserved1[64]; + RwReg PERIPH_RPR; /**< \brief (Pdc Offset: 0x100) Receive Pointer Register */ + RwReg PERIPH_RCR; /**< \brief (Pdc Offset: 0x104) Receive Counter Register */ + RwReg PERIPH_TPR; /**< \brief (Pdc Offset: 0x108) Transmit Pointer Register */ + RwReg PERIPH_TCR; /**< \brief (Pdc Offset: 0x10C) Transmit Counter Register */ + RwReg PERIPH_RNPR; /**< \brief (Pdc Offset: 0x110) Receive Next Pointer Register */ + RwReg PERIPH_RNCR; /**< \brief (Pdc Offset: 0x114) Receive Next Counter Register */ + RwReg PERIPH_TNPR; /**< \brief (Pdc Offset: 0x118) Transmit Next Pointer Register */ + RwReg PERIPH_TNCR; /**< \brief (Pdc Offset: 0x11C) Transmit Next Counter Register */ + WoReg PERIPH_PTCR; /**< \brief (Pdc Offset: 0x120) Transfer Control Register */ + RoReg PERIPH_PTSR; /**< \brief (Pdc Offset: 0x124) Transfer Status Register */ +} Pdc; +#endif /* __ASSEMBLY__ */ +/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ +#define PERIPH_RPR_RXPTR (0xffffffff << 0) /**< \brief (PERIPH_RPR) Receive Pointer Register */ +/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ +#define PERIPH_RCR_RXCTR (0xffff << 0) /**< \brief (PERIPH_RCR) Receive Counter Register */ +/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ +#define PERIPH_TPR_TXPTR (0xffffffff << 0) /**< \brief (PERIPH_TPR) Transmit Counter Register */ +/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ +#define PERIPH_TCR_TXCTR (0xffff << 0) /**< \brief (PERIPH_TCR) Transmit Counter Register */ +/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ +#define PERIPH_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PERIPH_RNPR) Receive Next Pointer */ +/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ +#define PERIPH_RNCR_RXNCTR (0xffff << 0) /**< \brief (PERIPH_RNCR) Receive Next Counter */ +/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define PERIPH_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PERIPH_TNPR) Transmit Next Pointer */ +/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define PERIPH_TNCR_TXNCTR (0xffff << 0) /**< \brief (PERIPH_TNCR) Transmit Counter Next */ +/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ +#define PERIPH_PTCR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTCR) Receiver Transfer Enable */ +#define PERIPH_PTCR_RXTDIS (0x1 << 1) /**< \brief (PERIPH_PTCR) Receiver Transfer Disable */ +#define PERIPH_PTCR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTCR) Transmitter Transfer Enable */ +#define PERIPH_PTCR_TXTDIS (0x1 << 9) /**< \brief (PERIPH_PTCR) Transmitter Transfer Disable */ +/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ +#define PERIPH_PTSR_RXTEN (0x1 << 0) /**< \brief (PERIPH_PTSR) Receiver Transfer Enable */ +#define PERIPH_PTSR_TXTEN (0x1 << 8) /**< \brief (PERIPH_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Parallel Input/Output */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_PIO Parallel Input/Output */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Pio hardware registers */ +typedef struct { + WoReg PIO_PER; /**< \brief (Pio Offset: 0x0000) PIO Enable Register */ + WoReg PIO_PDR; /**< \brief (Pio Offset: 0x0004) PIO Disable Register */ + RoReg PIO_PSR; /**< \brief (Pio Offset: 0x0008) PIO Status Register */ + RwReg Reserved1[1]; + WoReg PIO_OER; /**< \brief (Pio Offset: 0x0010) Output Enable Register */ + WoReg PIO_ODR; /**< \brief (Pio Offset: 0x0014) Output Disable Register */ + RoReg PIO_OSR; /**< \brief (Pio Offset: 0x0018) Output Status Register */ + RwReg Reserved2[1]; + WoReg PIO_IFER; /**< \brief (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ + WoReg PIO_IFDR; /**< \brief (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ + RoReg PIO_IFSR; /**< \brief (Pio Offset: 0x0028) Glitch Input Filter Status Register */ + RwReg Reserved3[1]; + WoReg PIO_SODR; /**< \brief (Pio Offset: 0x0030) Set Output Data Register */ + WoReg PIO_CODR; /**< \brief (Pio Offset: 0x0034) Clear Output Data Register */ + RwReg PIO_ODSR; /**< \brief (Pio Offset: 0x0038) Output Data Status Register */ + RoReg PIO_PDSR; /**< \brief (Pio Offset: 0x003C) Pin Data Status Register */ + WoReg PIO_IER; /**< \brief (Pio Offset: 0x0040) Interrupt Enable Register */ + WoReg PIO_IDR; /**< \brief (Pio Offset: 0x0044) Interrupt Disable Register */ + RoReg PIO_IMR; /**< \brief (Pio Offset: 0x0048) Interrupt Mask Register */ + RoReg PIO_ISR; /**< \brief (Pio Offset: 0x004C) Interrupt Status Register */ + WoReg PIO_MDER; /**< \brief (Pio Offset: 0x0050) Multi-driver Enable Register */ + WoReg PIO_MDDR; /**< \brief (Pio Offset: 0x0054) Multi-driver Disable Register */ + RoReg PIO_MDSR; /**< \brief (Pio Offset: 0x0058) Multi-driver Status Register */ + RwReg Reserved4[1]; + WoReg PIO_PUDR; /**< \brief (Pio Offset: 0x0060) Pull-up Disable Register */ + WoReg PIO_PUER; /**< \brief (Pio Offset: 0x0064) Pull-up Enable Register */ + RoReg PIO_PUSR; /**< \brief (Pio Offset: 0x0068) Pad Pull-up Status Register */ + RwReg Reserved5[1]; + RwReg PIO_ABCDSR[2]; /**< \brief (Pio Offset: 0x0070) Peripheral Select Register */ + RwReg Reserved6[2]; + WoReg PIO_SCIFSR; /**< \brief (Pio Offset: 0x0080) System Clock Glitch Input Filter Select Register */ + WoReg PIO_DIFSR; /**< \brief (Pio Offset: 0x0084) Debouncing Input Filter Select Register */ + RoReg PIO_IFDGSR; /**< \brief (Pio Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register */ + RwReg PIO_SCDR; /**< \brief (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ + WoReg PIO_PPDDR; /**< \brief (Pio Offset: 0x0090) Pad Pull-down Disable Register */ + WoReg PIO_PPDER; /**< \brief (Pio Offset: 0x0094) Pad Pull-down Enable Register */ + RoReg PIO_PPDSR; /**< \brief (Pio Offset: 0x0098) Pad Pull-down Status Register */ + RwReg Reserved7[1]; + WoReg PIO_OWER; /**< \brief (Pio Offset: 0x00A0) Output Write Enable */ + WoReg PIO_OWDR; /**< \brief (Pio Offset: 0x00A4) Output Write Disable */ + RoReg PIO_OWSR; /**< \brief (Pio Offset: 0x00A8) Output Write Status Register */ + RwReg Reserved8[1]; + WoReg PIO_AIMER; /**< \brief (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ + WoReg PIO_AIMDR; /**< \brief (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ + RoReg PIO_AIMMR; /**< \brief (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ + RwReg Reserved9[1]; + WoReg PIO_ESR; /**< \brief (Pio Offset: 0x00C0) Edge Select Register */ + WoReg PIO_LSR; /**< \brief (Pio Offset: 0x00C4) Level Select Register */ + RoReg PIO_ELSR; /**< \brief (Pio Offset: 0x00C8) Edge/Level Status Register */ + RwReg Reserved10[1]; + WoReg PIO_FELLSR; /**< \brief (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ + WoReg PIO_REHLSR; /**< \brief (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ + RoReg PIO_FRLHSR; /**< \brief (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ + RwReg Reserved11[1]; + RoReg PIO_LOCKSR; /**< \brief (Pio Offset: 0x00E0) Lock Status */ + RwReg PIO_WPMR; /**< \brief (Pio Offset: 0x00E4) Write Protect Mode Register */ + RoReg PIO_WPSR; /**< \brief (Pio Offset: 0x00E8) Write Protect Status Register */ + RwReg Reserved12[5]; + RwReg PIO_SCHMITT; /**< \brief (Pio Offset: 0x0100) Schmitt Trigger Register */ + RwReg Reserved13[19]; + RwReg PIO_PCMR; /**< \brief (Pio Offset: 0x150) Parallel Capture Mode Register */ + WoReg PIO_PCIER; /**< \brief (Pio Offset: 0x154) Parallel Capture Interrupt Enable Register */ + WoReg PIO_PCIDR; /**< \brief (Pio Offset: 0x158) Parallel Capture Interrupt Disable Register */ + RoReg PIO_PCIMR; /**< \brief (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register */ + RoReg PIO_PCISR; /**< \brief (Pio Offset: 0x160) Parallel Capture Interrupt Status Register */ + RoReg PIO_PCRHR; /**< \brief (Pio Offset: 0x164) Parallel Capture Reception Holding Register */ + RwReg Reserved14[38]; +} Pio; +#endif /* __ASSEMBLY__ */ +/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ +#define PIO_PER_P0 (0x1 << 0) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P1 (0x1 << 1) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P2 (0x1 << 2) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P3 (0x1 << 3) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P4 (0x1 << 4) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P5 (0x1 << 5) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P6 (0x1 << 6) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P7 (0x1 << 7) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P8 (0x1 << 8) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P9 (0x1 << 9) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P10 (0x1 << 10) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P11 (0x1 << 11) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P12 (0x1 << 12) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P13 (0x1 << 13) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P14 (0x1 << 14) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P15 (0x1 << 15) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P16 (0x1 << 16) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P17 (0x1 << 17) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P18 (0x1 << 18) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P19 (0x1 << 19) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P20 (0x1 << 20) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P21 (0x1 << 21) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P22 (0x1 << 22) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P23 (0x1 << 23) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P24 (0x1 << 24) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P25 (0x1 << 25) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P26 (0x1 << 26) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P27 (0x1 << 27) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P28 (0x1 << 28) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P29 (0x1 << 29) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P30 (0x1 << 30) /**< \brief (PIO_PER) PIO Enable */ +#define PIO_PER_P31 (0x1 << 31) /**< \brief (PIO_PER) PIO Enable */ +/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ +#define PIO_PDR_P0 (0x1 << 0) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P1 (0x1 << 1) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P2 (0x1 << 2) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P3 (0x1 << 3) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P4 (0x1 << 4) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P5 (0x1 << 5) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P6 (0x1 << 6) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P7 (0x1 << 7) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P8 (0x1 << 8) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P9 (0x1 << 9) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P10 (0x1 << 10) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P11 (0x1 << 11) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P12 (0x1 << 12) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P13 (0x1 << 13) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P14 (0x1 << 14) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P15 (0x1 << 15) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P16 (0x1 << 16) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P17 (0x1 << 17) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P18 (0x1 << 18) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P19 (0x1 << 19) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P20 (0x1 << 20) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P21 (0x1 << 21) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P22 (0x1 << 22) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P23 (0x1 << 23) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P24 (0x1 << 24) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P25 (0x1 << 25) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P26 (0x1 << 26) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P27 (0x1 << 27) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P28 (0x1 << 28) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P29 (0x1 << 29) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P30 (0x1 << 30) /**< \brief (PIO_PDR) PIO Disable */ +#define PIO_PDR_P31 (0x1 << 31) /**< \brief (PIO_PDR) PIO Disable */ +/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ +#define PIO_PSR_P0 (0x1 << 0) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P1 (0x1 << 1) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P2 (0x1 << 2) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P3 (0x1 << 3) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P4 (0x1 << 4) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P5 (0x1 << 5) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P6 (0x1 << 6) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P7 (0x1 << 7) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P8 (0x1 << 8) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P9 (0x1 << 9) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P10 (0x1 << 10) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P11 (0x1 << 11) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P12 (0x1 << 12) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P13 (0x1 << 13) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P14 (0x1 << 14) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P15 (0x1 << 15) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P16 (0x1 << 16) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P17 (0x1 << 17) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P18 (0x1 << 18) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P19 (0x1 << 19) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P20 (0x1 << 20) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P21 (0x1 << 21) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P22 (0x1 << 22) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P23 (0x1 << 23) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P24 (0x1 << 24) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P25 (0x1 << 25) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P26 (0x1 << 26) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P27 (0x1 << 27) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P28 (0x1 << 28) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P29 (0x1 << 29) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P30 (0x1 << 30) /**< \brief (PIO_PSR) PIO Status */ +#define PIO_PSR_P31 (0x1 << 31) /**< \brief (PIO_PSR) PIO Status */ +/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ +#define PIO_OER_P0 (0x1 << 0) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P1 (0x1 << 1) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P2 (0x1 << 2) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P3 (0x1 << 3) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P4 (0x1 << 4) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P5 (0x1 << 5) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P6 (0x1 << 6) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P7 (0x1 << 7) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P8 (0x1 << 8) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P9 (0x1 << 9) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P10 (0x1 << 10) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P11 (0x1 << 11) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P12 (0x1 << 12) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P13 (0x1 << 13) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P14 (0x1 << 14) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P15 (0x1 << 15) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P16 (0x1 << 16) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P17 (0x1 << 17) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P18 (0x1 << 18) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P19 (0x1 << 19) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P20 (0x1 << 20) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P21 (0x1 << 21) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P22 (0x1 << 22) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P23 (0x1 << 23) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P24 (0x1 << 24) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P25 (0x1 << 25) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P26 (0x1 << 26) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P27 (0x1 << 27) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P28 (0x1 << 28) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P29 (0x1 << 29) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P30 (0x1 << 30) /**< \brief (PIO_OER) Output Enable */ +#define PIO_OER_P31 (0x1 << 31) /**< \brief (PIO_OER) Output Enable */ +/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ +#define PIO_ODR_P0 (0x1 << 0) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P1 (0x1 << 1) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P2 (0x1 << 2) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P3 (0x1 << 3) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P4 (0x1 << 4) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P5 (0x1 << 5) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P6 (0x1 << 6) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P7 (0x1 << 7) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P8 (0x1 << 8) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P9 (0x1 << 9) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P10 (0x1 << 10) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P11 (0x1 << 11) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P12 (0x1 << 12) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P13 (0x1 << 13) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P14 (0x1 << 14) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P15 (0x1 << 15) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P16 (0x1 << 16) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P17 (0x1 << 17) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P18 (0x1 << 18) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P19 (0x1 << 19) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P20 (0x1 << 20) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P21 (0x1 << 21) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P22 (0x1 << 22) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P23 (0x1 << 23) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P24 (0x1 << 24) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P25 (0x1 << 25) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P26 (0x1 << 26) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P27 (0x1 << 27) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P28 (0x1 << 28) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P29 (0x1 << 29) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P30 (0x1 << 30) /**< \brief (PIO_ODR) Output Disable */ +#define PIO_ODR_P31 (0x1 << 31) /**< \brief (PIO_ODR) Output Disable */ +/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ +#define PIO_OSR_P0 (0x1 << 0) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P1 (0x1 << 1) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P2 (0x1 << 2) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P3 (0x1 << 3) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P4 (0x1 << 4) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P5 (0x1 << 5) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P6 (0x1 << 6) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P7 (0x1 << 7) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P8 (0x1 << 8) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P9 (0x1 << 9) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P10 (0x1 << 10) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P11 (0x1 << 11) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P12 (0x1 << 12) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P13 (0x1 << 13) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P14 (0x1 << 14) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P15 (0x1 << 15) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P16 (0x1 << 16) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P17 (0x1 << 17) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P18 (0x1 << 18) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P19 (0x1 << 19) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P20 (0x1 << 20) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P21 (0x1 << 21) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P22 (0x1 << 22) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P23 (0x1 << 23) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P24 (0x1 << 24) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P25 (0x1 << 25) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P26 (0x1 << 26) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P27 (0x1 << 27) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P28 (0x1 << 28) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P29 (0x1 << 29) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P30 (0x1 << 30) /**< \brief (PIO_OSR) Output Status */ +#define PIO_OSR_P31 (0x1 << 31) /**< \brief (PIO_OSR) Output Status */ +/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ +#define PIO_IFER_P0 (0x1 << 0) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P1 (0x1 << 1) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P2 (0x1 << 2) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P3 (0x1 << 3) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P4 (0x1 << 4) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P5 (0x1 << 5) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P6 (0x1 << 6) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P7 (0x1 << 7) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P8 (0x1 << 8) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P9 (0x1 << 9) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P10 (0x1 << 10) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P11 (0x1 << 11) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P12 (0x1 << 12) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P13 (0x1 << 13) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P14 (0x1 << 14) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P15 (0x1 << 15) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P16 (0x1 << 16) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P17 (0x1 << 17) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P18 (0x1 << 18) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P19 (0x1 << 19) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P20 (0x1 << 20) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P21 (0x1 << 21) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P22 (0x1 << 22) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P23 (0x1 << 23) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P24 (0x1 << 24) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P25 (0x1 << 25) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P26 (0x1 << 26) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P27 (0x1 << 27) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P28 (0x1 << 28) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P29 (0x1 << 29) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P30 (0x1 << 30) /**< \brief (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P31 (0x1 << 31) /**< \brief (PIO_IFER) Input Filter Enable */ +/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ +#define PIO_IFDR_P0 (0x1 << 0) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P1 (0x1 << 1) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P2 (0x1 << 2) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P3 (0x1 << 3) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P4 (0x1 << 4) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P5 (0x1 << 5) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P6 (0x1 << 6) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P7 (0x1 << 7) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P8 (0x1 << 8) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P9 (0x1 << 9) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P10 (0x1 << 10) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P11 (0x1 << 11) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P12 (0x1 << 12) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P13 (0x1 << 13) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P14 (0x1 << 14) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P15 (0x1 << 15) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P16 (0x1 << 16) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P17 (0x1 << 17) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P18 (0x1 << 18) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P19 (0x1 << 19) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P20 (0x1 << 20) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P21 (0x1 << 21) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P22 (0x1 << 22) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P23 (0x1 << 23) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P24 (0x1 << 24) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P25 (0x1 << 25) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P26 (0x1 << 26) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P27 (0x1 << 27) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P28 (0x1 << 28) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P29 (0x1 << 29) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P30 (0x1 << 30) /**< \brief (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P31 (0x1 << 31) /**< \brief (PIO_IFDR) Input Filter Disable */ +/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ +#define PIO_IFSR_P0 (0x1 << 0) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P1 (0x1 << 1) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P2 (0x1 << 2) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P3 (0x1 << 3) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P4 (0x1 << 4) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P5 (0x1 << 5) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P6 (0x1 << 6) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P7 (0x1 << 7) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P8 (0x1 << 8) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P9 (0x1 << 9) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P10 (0x1 << 10) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P11 (0x1 << 11) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P12 (0x1 << 12) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P13 (0x1 << 13) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P14 (0x1 << 14) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P15 (0x1 << 15) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P16 (0x1 << 16) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P17 (0x1 << 17) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P18 (0x1 << 18) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P19 (0x1 << 19) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P20 (0x1 << 20) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P21 (0x1 << 21) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P22 (0x1 << 22) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P23 (0x1 << 23) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P24 (0x1 << 24) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P25 (0x1 << 25) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P26 (0x1 << 26) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P27 (0x1 << 27) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P28 (0x1 << 28) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P29 (0x1 << 29) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P30 (0x1 << 30) /**< \brief (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P31 (0x1 << 31) /**< \brief (PIO_IFSR) Input Filer Status */ +/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ +#define PIO_SODR_P0 (0x1 << 0) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P1 (0x1 << 1) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P2 (0x1 << 2) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P3 (0x1 << 3) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P4 (0x1 << 4) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P5 (0x1 << 5) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P6 (0x1 << 6) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P7 (0x1 << 7) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P8 (0x1 << 8) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P9 (0x1 << 9) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P10 (0x1 << 10) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P11 (0x1 << 11) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P12 (0x1 << 12) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P13 (0x1 << 13) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P14 (0x1 << 14) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P15 (0x1 << 15) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P16 (0x1 << 16) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P17 (0x1 << 17) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P18 (0x1 << 18) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P19 (0x1 << 19) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P20 (0x1 << 20) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P21 (0x1 << 21) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P22 (0x1 << 22) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P23 (0x1 << 23) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P24 (0x1 << 24) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P25 (0x1 << 25) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P26 (0x1 << 26) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P27 (0x1 << 27) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P28 (0x1 << 28) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P29 (0x1 << 29) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P30 (0x1 << 30) /**< \brief (PIO_SODR) Set Output Data */ +#define PIO_SODR_P31 (0x1 << 31) /**< \brief (PIO_SODR) Set Output Data */ +/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ +#define PIO_CODR_P0 (0x1 << 0) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P1 (0x1 << 1) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P2 (0x1 << 2) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P3 (0x1 << 3) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P4 (0x1 << 4) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P5 (0x1 << 5) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P6 (0x1 << 6) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P7 (0x1 << 7) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P8 (0x1 << 8) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P9 (0x1 << 9) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P10 (0x1 << 10) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P11 (0x1 << 11) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P12 (0x1 << 12) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P13 (0x1 << 13) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P14 (0x1 << 14) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P15 (0x1 << 15) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P16 (0x1 << 16) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P17 (0x1 << 17) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P18 (0x1 << 18) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P19 (0x1 << 19) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P20 (0x1 << 20) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P21 (0x1 << 21) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P22 (0x1 << 22) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P23 (0x1 << 23) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P24 (0x1 << 24) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P25 (0x1 << 25) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P26 (0x1 << 26) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P27 (0x1 << 27) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P28 (0x1 << 28) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P29 (0x1 << 29) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P30 (0x1 << 30) /**< \brief (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P31 (0x1 << 31) /**< \brief (PIO_CODR) Clear Output Data */ +/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ +#define PIO_ODSR_P0 (0x1 << 0) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P1 (0x1 << 1) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P2 (0x1 << 2) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P3 (0x1 << 3) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P4 (0x1 << 4) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P5 (0x1 << 5) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P6 (0x1 << 6) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P7 (0x1 << 7) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P8 (0x1 << 8) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P9 (0x1 << 9) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P10 (0x1 << 10) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P11 (0x1 << 11) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P12 (0x1 << 12) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P13 (0x1 << 13) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P14 (0x1 << 14) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P15 (0x1 << 15) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P16 (0x1 << 16) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P17 (0x1 << 17) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P18 (0x1 << 18) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P19 (0x1 << 19) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P20 (0x1 << 20) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P21 (0x1 << 21) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P22 (0x1 << 22) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P23 (0x1 << 23) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P24 (0x1 << 24) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P25 (0x1 << 25) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P26 (0x1 << 26) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P27 (0x1 << 27) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P28 (0x1 << 28) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P29 (0x1 << 29) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P30 (0x1 << 30) /**< \brief (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P31 (0x1 << 31) /**< \brief (PIO_ODSR) Output Data Status */ +/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ +#define PIO_PDSR_P0 (0x1 << 0) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P1 (0x1 << 1) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P2 (0x1 << 2) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P3 (0x1 << 3) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P4 (0x1 << 4) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P5 (0x1 << 5) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P6 (0x1 << 6) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P7 (0x1 << 7) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P8 (0x1 << 8) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P9 (0x1 << 9) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P10 (0x1 << 10) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P11 (0x1 << 11) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P12 (0x1 << 12) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P13 (0x1 << 13) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P14 (0x1 << 14) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P15 (0x1 << 15) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P16 (0x1 << 16) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P17 (0x1 << 17) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P18 (0x1 << 18) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P19 (0x1 << 19) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P20 (0x1 << 20) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P21 (0x1 << 21) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P22 (0x1 << 22) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P23 (0x1 << 23) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P24 (0x1 << 24) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P25 (0x1 << 25) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P26 (0x1 << 26) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P27 (0x1 << 27) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P28 (0x1 << 28) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P29 (0x1 << 29) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P30 (0x1 << 30) /**< \brief (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P31 (0x1 << 31) /**< \brief (PIO_PDSR) Output Data Status */ +/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ +#define PIO_IER_P0 (0x1 << 0) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P1 (0x1 << 1) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P2 (0x1 << 2) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P3 (0x1 << 3) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P4 (0x1 << 4) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P5 (0x1 << 5) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P6 (0x1 << 6) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P7 (0x1 << 7) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P8 (0x1 << 8) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P9 (0x1 << 9) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P10 (0x1 << 10) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P11 (0x1 << 11) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P12 (0x1 << 12) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P13 (0x1 << 13) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P14 (0x1 << 14) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P15 (0x1 << 15) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P16 (0x1 << 16) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P17 (0x1 << 17) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P18 (0x1 << 18) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P19 (0x1 << 19) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P20 (0x1 << 20) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P21 (0x1 << 21) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P22 (0x1 << 22) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P23 (0x1 << 23) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P24 (0x1 << 24) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P25 (0x1 << 25) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P26 (0x1 << 26) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P27 (0x1 << 27) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P28 (0x1 << 28) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P29 (0x1 << 29) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P30 (0x1 << 30) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P31 (0x1 << 31) /**< \brief (PIO_IER) Input Change Interrupt Enable */ +/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ +#define PIO_IDR_P0 (0x1 << 0) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P1 (0x1 << 1) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P2 (0x1 << 2) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P3 (0x1 << 3) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P4 (0x1 << 4) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P5 (0x1 << 5) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P6 (0x1 << 6) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P7 (0x1 << 7) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P8 (0x1 << 8) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P9 (0x1 << 9) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P10 (0x1 << 10) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P11 (0x1 << 11) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P12 (0x1 << 12) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P13 (0x1 << 13) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P14 (0x1 << 14) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P15 (0x1 << 15) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P16 (0x1 << 16) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P17 (0x1 << 17) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P18 (0x1 << 18) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P19 (0x1 << 19) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P20 (0x1 << 20) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P21 (0x1 << 21) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P22 (0x1 << 22) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P23 (0x1 << 23) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P24 (0x1 << 24) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P25 (0x1 << 25) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P26 (0x1 << 26) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P27 (0x1 << 27) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P28 (0x1 << 28) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P29 (0x1 << 29) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P30 (0x1 << 30) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P31 (0x1 << 31) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ +/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ +#define PIO_IMR_P0 (0x1 << 0) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P1 (0x1 << 1) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P2 (0x1 << 2) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P3 (0x1 << 3) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P4 (0x1 << 4) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P5 (0x1 << 5) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P6 (0x1 << 6) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P7 (0x1 << 7) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P8 (0x1 << 8) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P9 (0x1 << 9) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P10 (0x1 << 10) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P11 (0x1 << 11) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P12 (0x1 << 12) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P13 (0x1 << 13) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P14 (0x1 << 14) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P15 (0x1 << 15) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P16 (0x1 << 16) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P17 (0x1 << 17) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P18 (0x1 << 18) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P19 (0x1 << 19) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P20 (0x1 << 20) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P21 (0x1 << 21) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P22 (0x1 << 22) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P23 (0x1 << 23) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P24 (0x1 << 24) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P25 (0x1 << 25) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P26 (0x1 << 26) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P27 (0x1 << 27) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P28 (0x1 << 28) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P29 (0x1 << 29) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P30 (0x1 << 30) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P31 (0x1 << 31) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ +/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ +#define PIO_ISR_P0 (0x1 << 0) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P1 (0x1 << 1) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P2 (0x1 << 2) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P3 (0x1 << 3) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P4 (0x1 << 4) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P5 (0x1 << 5) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P6 (0x1 << 6) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P7 (0x1 << 7) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P8 (0x1 << 8) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P9 (0x1 << 9) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P10 (0x1 << 10) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P11 (0x1 << 11) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P12 (0x1 << 12) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P13 (0x1 << 13) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P14 (0x1 << 14) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P15 (0x1 << 15) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P16 (0x1 << 16) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P17 (0x1 << 17) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P18 (0x1 << 18) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P19 (0x1 << 19) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P20 (0x1 << 20) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P21 (0x1 << 21) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P22 (0x1 << 22) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P23 (0x1 << 23) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P24 (0x1 << 24) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P25 (0x1 << 25) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P26 (0x1 << 26) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P27 (0x1 << 27) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P28 (0x1 << 28) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P29 (0x1 << 29) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P30 (0x1 << 30) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P31 (0x1 << 31) /**< \brief (PIO_ISR) Input Change Interrupt Status */ +/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ +#define PIO_MDER_P0 (0x1 << 0) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P1 (0x1 << 1) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P2 (0x1 << 2) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P3 (0x1 << 3) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P4 (0x1 << 4) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P5 (0x1 << 5) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P6 (0x1 << 6) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P7 (0x1 << 7) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P8 (0x1 << 8) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P9 (0x1 << 9) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P10 (0x1 << 10) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P11 (0x1 << 11) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P12 (0x1 << 12) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P13 (0x1 << 13) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P14 (0x1 << 14) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P15 (0x1 << 15) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P16 (0x1 << 16) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P17 (0x1 << 17) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P18 (0x1 << 18) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P19 (0x1 << 19) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P20 (0x1 << 20) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P21 (0x1 << 21) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P22 (0x1 << 22) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P23 (0x1 << 23) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P24 (0x1 << 24) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P25 (0x1 << 25) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P26 (0x1 << 26) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P27 (0x1 << 27) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P28 (0x1 << 28) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P29 (0x1 << 29) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P30 (0x1 << 30) /**< \brief (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P31 (0x1 << 31) /**< \brief (PIO_MDER) Multi Drive Enable. */ +/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ +#define PIO_MDDR_P0 (0x1 << 0) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P1 (0x1 << 1) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P2 (0x1 << 2) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P3 (0x1 << 3) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P4 (0x1 << 4) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P5 (0x1 << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P6 (0x1 << 6) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P7 (0x1 << 7) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P8 (0x1 << 8) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P9 (0x1 << 9) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P10 (0x1 << 10) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P11 (0x1 << 11) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P12 (0x1 << 12) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P13 (0x1 << 13) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P14 (0x1 << 14) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P15 (0x1 << 15) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P16 (0x1 << 16) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P17 (0x1 << 17) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P18 (0x1 << 18) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P19 (0x1 << 19) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P20 (0x1 << 20) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P21 (0x1 << 21) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P22 (0x1 << 22) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P23 (0x1 << 23) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P24 (0x1 << 24) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P25 (0x1 << 25) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P26 (0x1 << 26) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P27 (0x1 << 27) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P28 (0x1 << 28) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P29 (0x1 << 29) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P30 (0x1 << 30) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P31 (0x1 << 31) /**< \brief (PIO_MDDR) Multi Drive Disable. */ +/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ +#define PIO_MDSR_P0 (0x1 << 0) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P1 (0x1 << 1) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P2 (0x1 << 2) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P3 (0x1 << 3) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P4 (0x1 << 4) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P5 (0x1 << 5) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P6 (0x1 << 6) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P7 (0x1 << 7) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P8 (0x1 << 8) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P9 (0x1 << 9) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P10 (0x1 << 10) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P11 (0x1 << 11) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P12 (0x1 << 12) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P13 (0x1 << 13) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P14 (0x1 << 14) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P15 (0x1 << 15) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P16 (0x1 << 16) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P17 (0x1 << 17) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P18 (0x1 << 18) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P19 (0x1 << 19) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P20 (0x1 << 20) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P21 (0x1 << 21) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P22 (0x1 << 22) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P23 (0x1 << 23) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P24 (0x1 << 24) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P25 (0x1 << 25) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P26 (0x1 << 26) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P27 (0x1 << 27) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P28 (0x1 << 28) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P29 (0x1 << 29) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P30 (0x1 << 30) /**< \brief (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P31 (0x1 << 31) /**< \brief (PIO_MDSR) Multi Drive Status. */ +/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ +#define PIO_PUDR_P0 (0x1 << 0) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P1 (0x1 << 1) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P2 (0x1 << 2) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P3 (0x1 << 3) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P4 (0x1 << 4) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P5 (0x1 << 5) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P6 (0x1 << 6) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P7 (0x1 << 7) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P8 (0x1 << 8) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P9 (0x1 << 9) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P10 (0x1 << 10) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P11 (0x1 << 11) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P12 (0x1 << 12) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P13 (0x1 << 13) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P14 (0x1 << 14) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P15 (0x1 << 15) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P16 (0x1 << 16) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P17 (0x1 << 17) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P18 (0x1 << 18) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P19 (0x1 << 19) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P20 (0x1 << 20) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P21 (0x1 << 21) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P22 (0x1 << 22) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P23 (0x1 << 23) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P24 (0x1 << 24) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P25 (0x1 << 25) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P26 (0x1 << 26) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P27 (0x1 << 27) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P28 (0x1 << 28) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P29 (0x1 << 29) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P30 (0x1 << 30) /**< \brief (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P31 (0x1 << 31) /**< \brief (PIO_PUDR) Pull Up Disable. */ +/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ +#define PIO_PUER_P0 (0x1 << 0) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P1 (0x1 << 1) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P2 (0x1 << 2) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P3 (0x1 << 3) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P4 (0x1 << 4) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P5 (0x1 << 5) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P6 (0x1 << 6) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P7 (0x1 << 7) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P8 (0x1 << 8) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P9 (0x1 << 9) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P10 (0x1 << 10) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P11 (0x1 << 11) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P12 (0x1 << 12) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P13 (0x1 << 13) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P14 (0x1 << 14) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P15 (0x1 << 15) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P16 (0x1 << 16) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P17 (0x1 << 17) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P18 (0x1 << 18) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P19 (0x1 << 19) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P20 (0x1 << 20) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P21 (0x1 << 21) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P22 (0x1 << 22) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P23 (0x1 << 23) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P24 (0x1 << 24) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P25 (0x1 << 25) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P26 (0x1 << 26) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P27 (0x1 << 27) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P28 (0x1 << 28) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P29 (0x1 << 29) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P30 (0x1 << 30) /**< \brief (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P31 (0x1 << 31) /**< \brief (PIO_PUER) Pull Up Enable. */ +/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ +#define PIO_PUSR_P0 (0x1 << 0) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P1 (0x1 << 1) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P2 (0x1 << 2) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P3 (0x1 << 3) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P4 (0x1 << 4) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P5 (0x1 << 5) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P6 (0x1 << 6) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P7 (0x1 << 7) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P8 (0x1 << 8) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P9 (0x1 << 9) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P10 (0x1 << 10) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P11 (0x1 << 11) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P12 (0x1 << 12) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P13 (0x1 << 13) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P14 (0x1 << 14) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P15 (0x1 << 15) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P16 (0x1 << 16) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P17 (0x1 << 17) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P18 (0x1 << 18) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P19 (0x1 << 19) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P20 (0x1 << 20) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P21 (0x1 << 21) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P22 (0x1 << 22) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P23 (0x1 << 23) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P24 (0x1 << 24) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P25 (0x1 << 25) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P26 (0x1 << 26) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P27 (0x1 << 27) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P28 (0x1 << 28) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P29 (0x1 << 29) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P30 (0x1 << 30) /**< \brief (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P31 (0x1 << 31) /**< \brief (PIO_PUSR) Pull Up Status. */ +/* -------- PIO_ABCDSR[2] : (PIO Offset: 0x0070) Peripheral Select Register -------- */ +#define PIO_ABCDSR_P0 (0x1 << 0) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P1 (0x1 << 1) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P2 (0x1 << 2) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P3 (0x1 << 3) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P4 (0x1 << 4) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P5 (0x1 << 5) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P6 (0x1 << 6) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P7 (0x1 << 7) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P8 (0x1 << 8) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P9 (0x1 << 9) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P10 (0x1 << 10) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P11 (0x1 << 11) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P12 (0x1 << 12) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P13 (0x1 << 13) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P14 (0x1 << 14) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P15 (0x1 << 15) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P16 (0x1 << 16) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P17 (0x1 << 17) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P18 (0x1 << 18) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P19 (0x1 << 19) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P20 (0x1 << 20) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P21 (0x1 << 21) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P22 (0x1 << 22) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P23 (0x1 << 23) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P24 (0x1 << 24) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P25 (0x1 << 25) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P26 (0x1 << 26) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P27 (0x1 << 27) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P28 (0x1 << 28) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P29 (0x1 << 29) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P30 (0x1 << 30) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P31 (0x1 << 31) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ +/* -------- PIO_SCIFSR : (PIO Offset: 0x0080) System Clock Glitch Input Filter Select Register -------- */ +#define PIO_SCIFSR_P0 (0x1 << 0) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P1 (0x1 << 1) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P2 (0x1 << 2) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P3 (0x1 << 3) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P4 (0x1 << 4) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P5 (0x1 << 5) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P6 (0x1 << 6) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P7 (0x1 << 7) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P8 (0x1 << 8) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P9 (0x1 << 9) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P10 (0x1 << 10) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P11 (0x1 << 11) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P12 (0x1 << 12) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P13 (0x1 << 13) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P14 (0x1 << 14) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P15 (0x1 << 15) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P16 (0x1 << 16) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P17 (0x1 << 17) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P18 (0x1 << 18) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P19 (0x1 << 19) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P20 (0x1 << 20) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P21 (0x1 << 21) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P22 (0x1 << 22) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P23 (0x1 << 23) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P24 (0x1 << 24) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P25 (0x1 << 25) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P26 (0x1 << 26) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P27 (0x1 << 27) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P28 (0x1 << 28) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P29 (0x1 << 29) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P30 (0x1 << 30) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +#define PIO_SCIFSR_P31 (0x1 << 31) /**< \brief (PIO_SCIFSR) System Clock Glitch Filtering Select. */ +/* -------- PIO_DIFSR : (PIO Offset: 0x0084) Debouncing Input Filter Select Register -------- */ +#define PIO_DIFSR_P0 (0x1 << 0) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P1 (0x1 << 1) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P2 (0x1 << 2) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P3 (0x1 << 3) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P4 (0x1 << 4) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P5 (0x1 << 5) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P6 (0x1 << 6) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P7 (0x1 << 7) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P8 (0x1 << 8) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P9 (0x1 << 9) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P10 (0x1 << 10) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P11 (0x1 << 11) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P12 (0x1 << 12) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P13 (0x1 << 13) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P14 (0x1 << 14) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P15 (0x1 << 15) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P16 (0x1 << 16) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P17 (0x1 << 17) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P18 (0x1 << 18) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P19 (0x1 << 19) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P20 (0x1 << 20) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P21 (0x1 << 21) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P22 (0x1 << 22) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P23 (0x1 << 23) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P24 (0x1 << 24) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P25 (0x1 << 25) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P26 (0x1 << 26) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P27 (0x1 << 27) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P28 (0x1 << 28) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P29 (0x1 << 29) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P30 (0x1 << 30) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +#define PIO_DIFSR_P31 (0x1 << 31) /**< \brief (PIO_DIFSR) Debouncing Filtering Select. */ +/* -------- PIO_IFDGSR : (PIO Offset: 0x0088) Glitch or Debouncing Input Filter Clock Selection Status Register -------- */ +#define PIO_IFDGSR_P0 (0x1 << 0) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P1 (0x1 << 1) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P2 (0x1 << 2) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P3 (0x1 << 3) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P4 (0x1 << 4) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P5 (0x1 << 5) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P6 (0x1 << 6) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P7 (0x1 << 7) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P8 (0x1 << 8) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P9 (0x1 << 9) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P10 (0x1 << 10) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P11 (0x1 << 11) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P12 (0x1 << 12) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P13 (0x1 << 13) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P14 (0x1 << 14) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P15 (0x1 << 15) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P16 (0x1 << 16) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P17 (0x1 << 17) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P18 (0x1 << 18) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P19 (0x1 << 19) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P20 (0x1 << 20) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P21 (0x1 << 21) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P22 (0x1 << 22) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P23 (0x1 << 23) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P24 (0x1 << 24) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P25 (0x1 << 25) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P26 (0x1 << 26) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P27 (0x1 << 27) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P28 (0x1 << 28) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P29 (0x1 << 29) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P30 (0x1 << 30) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFDGSR_P31 (0x1 << 31) /**< \brief (PIO_IFDGSR) Glitch or Debouncing Filter Selection Status */ +/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ +#define PIO_SCDR_DIV0 (0x1 << 0) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV1 (0x1 << 1) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV2 (0x1 << 2) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV3 (0x1 << 3) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV4 (0x1 << 4) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV5 (0x1 << 5) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV6 (0x1 << 6) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV7 (0x1 << 7) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV8 (0x1 << 8) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV9 (0x1 << 9) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV10 (0x1 << 10) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV11 (0x1 << 11) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV12 (0x1 << 12) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV13 (0x1 << 13) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +/* -------- PIO_PPDDR : (PIO Offset: 0x0090) Pad Pull-down Disable Register -------- */ +#define PIO_PPDDR_P0 (0x1 << 0) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P1 (0x1 << 1) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P2 (0x1 << 2) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P3 (0x1 << 3) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P4 (0x1 << 4) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P5 (0x1 << 5) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P6 (0x1 << 6) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P7 (0x1 << 7) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P8 (0x1 << 8) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P9 (0x1 << 9) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P10 (0x1 << 10) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P11 (0x1 << 11) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P12 (0x1 << 12) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P13 (0x1 << 13) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P14 (0x1 << 14) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P15 (0x1 << 15) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P16 (0x1 << 16) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P17 (0x1 << 17) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P18 (0x1 << 18) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P19 (0x1 << 19) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P20 (0x1 << 20) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P21 (0x1 << 21) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P22 (0x1 << 22) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P23 (0x1 << 23) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P24 (0x1 << 24) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P25 (0x1 << 25) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P26 (0x1 << 26) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P27 (0x1 << 27) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P28 (0x1 << 28) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P29 (0x1 << 29) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P30 (0x1 << 30) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P31 (0x1 << 31) /**< \brief (PIO_PPDDR) Pull Down Disable. */ +/* -------- PIO_PPDER : (PIO Offset: 0x0094) Pad Pull-down Enable Register -------- */ +#define PIO_PPDER_P0 (0x1 << 0) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P1 (0x1 << 1) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P2 (0x1 << 2) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P3 (0x1 << 3) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P4 (0x1 << 4) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P5 (0x1 << 5) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P6 (0x1 << 6) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P7 (0x1 << 7) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P8 (0x1 << 8) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P9 (0x1 << 9) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P10 (0x1 << 10) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P11 (0x1 << 11) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P12 (0x1 << 12) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P13 (0x1 << 13) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P14 (0x1 << 14) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P15 (0x1 << 15) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P16 (0x1 << 16) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P17 (0x1 << 17) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P18 (0x1 << 18) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P19 (0x1 << 19) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P20 (0x1 << 20) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P21 (0x1 << 21) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P22 (0x1 << 22) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P23 (0x1 << 23) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P24 (0x1 << 24) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P25 (0x1 << 25) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P26 (0x1 << 26) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P27 (0x1 << 27) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P28 (0x1 << 28) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P29 (0x1 << 29) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P30 (0x1 << 30) /**< \brief (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P31 (0x1 << 31) /**< \brief (PIO_PPDER) Pull Down Enable. */ +/* -------- PIO_PPDSR : (PIO Offset: 0x0098) Pad Pull-down Status Register -------- */ +#define PIO_PPDSR_P0 (0x1 << 0) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P1 (0x1 << 1) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P2 (0x1 << 2) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P3 (0x1 << 3) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P4 (0x1 << 4) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P5 (0x1 << 5) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P6 (0x1 << 6) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P7 (0x1 << 7) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P8 (0x1 << 8) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P9 (0x1 << 9) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P10 (0x1 << 10) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P11 (0x1 << 11) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P12 (0x1 << 12) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P13 (0x1 << 13) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P14 (0x1 << 14) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P15 (0x1 << 15) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P16 (0x1 << 16) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P17 (0x1 << 17) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P18 (0x1 << 18) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P19 (0x1 << 19) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P20 (0x1 << 20) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P21 (0x1 << 21) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P22 (0x1 << 22) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P23 (0x1 << 23) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P24 (0x1 << 24) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P25 (0x1 << 25) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P26 (0x1 << 26) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P27 (0x1 << 27) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P28 (0x1 << 28) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P29 (0x1 << 29) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P30 (0x1 << 30) /**< \brief (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P31 (0x1 << 31) /**< \brief (PIO_PPDSR) Pull Down Status. */ +/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ +#define PIO_OWER_P0 (0x1 << 0) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P1 (0x1 << 1) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P2 (0x1 << 2) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P3 (0x1 << 3) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P4 (0x1 << 4) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P5 (0x1 << 5) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P6 (0x1 << 6) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P7 (0x1 << 7) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P8 (0x1 << 8) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P9 (0x1 << 9) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P10 (0x1 << 10) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P11 (0x1 << 11) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P12 (0x1 << 12) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P13 (0x1 << 13) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P14 (0x1 << 14) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P15 (0x1 << 15) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P16 (0x1 << 16) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P17 (0x1 << 17) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P18 (0x1 << 18) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P19 (0x1 << 19) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P20 (0x1 << 20) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P21 (0x1 << 21) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P22 (0x1 << 22) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P23 (0x1 << 23) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P24 (0x1 << 24) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P25 (0x1 << 25) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P26 (0x1 << 26) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P27 (0x1 << 27) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P28 (0x1 << 28) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P29 (0x1 << 29) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P30 (0x1 << 30) /**< \brief (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P31 (0x1 << 31) /**< \brief (PIO_OWER) Output Write Enable. */ +/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ +#define PIO_OWDR_P0 (0x1 << 0) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P1 (0x1 << 1) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P2 (0x1 << 2) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P3 (0x1 << 3) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P4 (0x1 << 4) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P5 (0x1 << 5) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P6 (0x1 << 6) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P7 (0x1 << 7) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P8 (0x1 << 8) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P9 (0x1 << 9) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P10 (0x1 << 10) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P11 (0x1 << 11) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P12 (0x1 << 12) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P13 (0x1 << 13) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P14 (0x1 << 14) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P15 (0x1 << 15) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P16 (0x1 << 16) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P17 (0x1 << 17) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P18 (0x1 << 18) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P19 (0x1 << 19) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P20 (0x1 << 20) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P21 (0x1 << 21) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P22 (0x1 << 22) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P23 (0x1 << 23) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P24 (0x1 << 24) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P25 (0x1 << 25) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P26 (0x1 << 26) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P27 (0x1 << 27) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P28 (0x1 << 28) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P29 (0x1 << 29) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P30 (0x1 << 30) /**< \brief (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P31 (0x1 << 31) /**< \brief (PIO_OWDR) Output Write Disable. */ +/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ +#define PIO_OWSR_P0 (0x1 << 0) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P1 (0x1 << 1) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P2 (0x1 << 2) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P3 (0x1 << 3) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P4 (0x1 << 4) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P5 (0x1 << 5) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P6 (0x1 << 6) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P7 (0x1 << 7) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P8 (0x1 << 8) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P9 (0x1 << 9) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P10 (0x1 << 10) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P11 (0x1 << 11) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P12 (0x1 << 12) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P13 (0x1 << 13) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P14 (0x1 << 14) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P15 (0x1 << 15) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P16 (0x1 << 16) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P17 (0x1 << 17) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P18 (0x1 << 18) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P19 (0x1 << 19) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P20 (0x1 << 20) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P21 (0x1 << 21) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P22 (0x1 << 22) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P23 (0x1 << 23) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P24 (0x1 << 24) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P25 (0x1 << 25) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P26 (0x1 << 26) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P27 (0x1 << 27) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P28 (0x1 << 28) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P29 (0x1 << 29) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P30 (0x1 << 30) /**< \brief (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P31 (0x1 << 31) /**< \brief (PIO_OWSR) Output Write Status. */ +/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ +#define PIO_AIMER_P0 (0x1 << 0) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P1 (0x1 << 1) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P2 (0x1 << 2) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P3 (0x1 << 3) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P4 (0x1 << 4) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P5 (0x1 << 5) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P6 (0x1 << 6) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P7 (0x1 << 7) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P8 (0x1 << 8) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P9 (0x1 << 9) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P10 (0x1 << 10) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P11 (0x1 << 11) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P12 (0x1 << 12) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P13 (0x1 << 13) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P14 (0x1 << 14) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P15 (0x1 << 15) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P16 (0x1 << 16) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P17 (0x1 << 17) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P18 (0x1 << 18) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P19 (0x1 << 19) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P20 (0x1 << 20) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P21 (0x1 << 21) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P22 (0x1 << 22) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P23 (0x1 << 23) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P24 (0x1 << 24) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P25 (0x1 << 25) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P26 (0x1 << 26) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P27 (0x1 << 27) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P28 (0x1 << 28) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P29 (0x1 << 29) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P30 (0x1 << 30) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P31 (0x1 << 31) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ +/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ +#define PIO_AIMDR_P0 (0x1 << 0) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P1 (0x1 << 1) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P2 (0x1 << 2) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P3 (0x1 << 3) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P4 (0x1 << 4) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P5 (0x1 << 5) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P6 (0x1 << 6) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P7 (0x1 << 7) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P8 (0x1 << 8) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P9 (0x1 << 9) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P10 (0x1 << 10) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P11 (0x1 << 11) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P12 (0x1 << 12) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P13 (0x1 << 13) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P14 (0x1 << 14) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P15 (0x1 << 15) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P16 (0x1 << 16) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P17 (0x1 << 17) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P18 (0x1 << 18) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P19 (0x1 << 19) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P20 (0x1 << 20) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P21 (0x1 << 21) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P22 (0x1 << 22) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P23 (0x1 << 23) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P24 (0x1 << 24) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P25 (0x1 << 25) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P26 (0x1 << 26) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P27 (0x1 << 27) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P28 (0x1 << 28) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P29 (0x1 << 29) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P30 (0x1 << 30) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P31 (0x1 << 31) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ +/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ +#define PIO_AIMMR_P0 (0x1 << 0) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P1 (0x1 << 1) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P2 (0x1 << 2) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P3 (0x1 << 3) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P4 (0x1 << 4) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P5 (0x1 << 5) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P6 (0x1 << 6) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P7 (0x1 << 7) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P8 (0x1 << 8) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P9 (0x1 << 9) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P10 (0x1 << 10) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P11 (0x1 << 11) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P12 (0x1 << 12) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P13 (0x1 << 13) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P14 (0x1 << 14) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P15 (0x1 << 15) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P16 (0x1 << 16) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P17 (0x1 << 17) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P18 (0x1 << 18) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P19 (0x1 << 19) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P20 (0x1 << 20) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P21 (0x1 << 21) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P22 (0x1 << 22) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P23 (0x1 << 23) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P24 (0x1 << 24) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P25 (0x1 << 25) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P26 (0x1 << 26) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P27 (0x1 << 27) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P28 (0x1 << 28) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P29 (0x1 << 29) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P30 (0x1 << 30) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P31 (0x1 << 31) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ +/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ +#define PIO_ESR_P0 (0x1 << 0) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P1 (0x1 << 1) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P2 (0x1 << 2) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P3 (0x1 << 3) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P4 (0x1 << 4) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P5 (0x1 << 5) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P6 (0x1 << 6) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P7 (0x1 << 7) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P8 (0x1 << 8) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P9 (0x1 << 9) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P10 (0x1 << 10) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P11 (0x1 << 11) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P12 (0x1 << 12) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P13 (0x1 << 13) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P14 (0x1 << 14) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P15 (0x1 << 15) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P16 (0x1 << 16) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P17 (0x1 << 17) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P18 (0x1 << 18) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P19 (0x1 << 19) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P20 (0x1 << 20) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P21 (0x1 << 21) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P22 (0x1 << 22) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P23 (0x1 << 23) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P24 (0x1 << 24) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P25 (0x1 << 25) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P26 (0x1 << 26) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P27 (0x1 << 27) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P28 (0x1 << 28) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P29 (0x1 << 29) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P30 (0x1 << 30) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P31 (0x1 << 31) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ +/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ +#define PIO_LSR_P0 (0x1 << 0) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P1 (0x1 << 1) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P2 (0x1 << 2) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P3 (0x1 << 3) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P4 (0x1 << 4) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P5 (0x1 << 5) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P6 (0x1 << 6) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P7 (0x1 << 7) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P8 (0x1 << 8) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P9 (0x1 << 9) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P10 (0x1 << 10) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P11 (0x1 << 11) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P12 (0x1 << 12) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P13 (0x1 << 13) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P14 (0x1 << 14) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P15 (0x1 << 15) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P16 (0x1 << 16) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P17 (0x1 << 17) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P18 (0x1 << 18) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P19 (0x1 << 19) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P20 (0x1 << 20) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P21 (0x1 << 21) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P22 (0x1 << 22) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P23 (0x1 << 23) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P24 (0x1 << 24) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P25 (0x1 << 25) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P26 (0x1 << 26) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P27 (0x1 << 27) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P28 (0x1 << 28) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P29 (0x1 << 29) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P30 (0x1 << 30) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P31 (0x1 << 31) /**< \brief (PIO_LSR) Level Interrupt Selection. */ +/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ +#define PIO_ELSR_P0 (0x1 << 0) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P1 (0x1 << 1) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P2 (0x1 << 2) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P3 (0x1 << 3) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P4 (0x1 << 4) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P5 (0x1 << 5) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P6 (0x1 << 6) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P7 (0x1 << 7) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P8 (0x1 << 8) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P9 (0x1 << 9) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P10 (0x1 << 10) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P11 (0x1 << 11) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P12 (0x1 << 12) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P13 (0x1 << 13) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P14 (0x1 << 14) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P15 (0x1 << 15) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P16 (0x1 << 16) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P17 (0x1 << 17) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P18 (0x1 << 18) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P19 (0x1 << 19) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P20 (0x1 << 20) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P21 (0x1 << 21) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P22 (0x1 << 22) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P23 (0x1 << 23) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P24 (0x1 << 24) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P25 (0x1 << 25) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P26 (0x1 << 26) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P27 (0x1 << 27) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P28 (0x1 << 28) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P29 (0x1 << 29) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P30 (0x1 << 30) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P31 (0x1 << 31) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ +/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ +#define PIO_FELLSR_P0 (0x1 << 0) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P1 (0x1 << 1) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P2 (0x1 << 2) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P3 (0x1 << 3) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P4 (0x1 << 4) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P5 (0x1 << 5) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P6 (0x1 << 6) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P7 (0x1 << 7) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P8 (0x1 << 8) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P9 (0x1 << 9) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P10 (0x1 << 10) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P11 (0x1 << 11) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P12 (0x1 << 12) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P13 (0x1 << 13) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P14 (0x1 << 14) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P15 (0x1 << 15) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P16 (0x1 << 16) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P17 (0x1 << 17) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P18 (0x1 << 18) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P19 (0x1 << 19) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P20 (0x1 << 20) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P21 (0x1 << 21) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P22 (0x1 << 22) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P23 (0x1 << 23) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P24 (0x1 << 24) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P25 (0x1 << 25) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P26 (0x1 << 26) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P27 (0x1 << 27) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P28 (0x1 << 28) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P29 (0x1 << 29) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P30 (0x1 << 30) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P31 (0x1 << 31) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ +#define PIO_REHLSR_P0 (0x1 << 0) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P1 (0x1 << 1) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P2 (0x1 << 2) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P3 (0x1 << 3) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P4 (0x1 << 4) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P5 (0x1 << 5) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P6 (0x1 << 6) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P7 (0x1 << 7) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P8 (0x1 << 8) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P9 (0x1 << 9) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P10 (0x1 << 10) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P11 (0x1 << 11) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P12 (0x1 << 12) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P13 (0x1 << 13) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P14 (0x1 << 14) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P15 (0x1 << 15) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P16 (0x1 << 16) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P17 (0x1 << 17) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P18 (0x1 << 18) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P19 (0x1 << 19) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P20 (0x1 << 20) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P21 (0x1 << 21) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P22 (0x1 << 22) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P23 (0x1 << 23) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P24 (0x1 << 24) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P25 (0x1 << 25) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P26 (0x1 << 26) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P27 (0x1 << 27) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P28 (0x1 << 28) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P29 (0x1 << 29) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P30 (0x1 << 30) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P31 (0x1 << 31) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ +#define PIO_FRLHSR_P0 (0x1 << 0) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P1 (0x1 << 1) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P2 (0x1 << 2) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P3 (0x1 << 3) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P4 (0x1 << 4) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P5 (0x1 << 5) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P6 (0x1 << 6) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P7 (0x1 << 7) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P8 (0x1 << 8) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P9 (0x1 << 9) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P10 (0x1 << 10) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P11 (0x1 << 11) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P12 (0x1 << 12) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P13 (0x1 << 13) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P14 (0x1 << 14) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P15 (0x1 << 15) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P16 (0x1 << 16) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P17 (0x1 << 17) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P18 (0x1 << 18) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P19 (0x1 << 19) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P20 (0x1 << 20) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P21 (0x1 << 21) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P22 (0x1 << 22) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P23 (0x1 << 23) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P24 (0x1 << 24) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P25 (0x1 << 25) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P26 (0x1 << 26) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P27 (0x1 << 27) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P28 (0x1 << 28) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P29 (0x1 << 29) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P30 (0x1 << 30) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P31 (0x1 << 31) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ +#define PIO_LOCKSR_P0 (0x1 << 0) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P1 (0x1 << 1) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P2 (0x1 << 2) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P3 (0x1 << 3) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P4 (0x1 << 4) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P5 (0x1 << 5) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P6 (0x1 << 6) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P7 (0x1 << 7) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P8 (0x1 << 8) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P9 (0x1 << 9) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P10 (0x1 << 10) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P11 (0x1 << 11) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P12 (0x1 << 12) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P13 (0x1 << 13) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P14 (0x1 << 14) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P15 (0x1 << 15) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P16 (0x1 << 16) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P17 (0x1 << 17) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P18 (0x1 << 18) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P19 (0x1 << 19) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P20 (0x1 << 20) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P21 (0x1 << 21) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P22 (0x1 << 22) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P23 (0x1 << 23) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P24 (0x1 << 24) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P25 (0x1 << 25) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P26 (0x1 << 26) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P27 (0x1 << 27) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P28 (0x1 << 28) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P29 (0x1 << 29) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P30 (0x1 << 30) /**< \brief (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P31 (0x1 << 31) /**< \brief (PIO_LOCKSR) Lock Status. */ +/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ +#define PIO_WPMR_WPEN (0x1 << 0) /**< \brief (PIO_WPMR) Write Protect Enable */ +#define PIO_WPMR_WPKEY (0xffffff << 8) /**< \brief (PIO_WPMR) Write Protect KEY */ +/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ +#define PIO_WPSR_WPVS (0x1 << 0) /**< \brief (PIO_WPSR) Write Protect Violation Status */ +#define PIO_WPSR_WPVSRC (0xffff << 8) /**< \brief (PIO_WPSR) Write Protect Violation Source */ +/* -------- PIO_SCHMITT : (PIO Offset: 0x0100) Schmitt Trigger Register -------- */ +#define PIO_SCHMITT_SCHMITT0 (0x1 << 0) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT1 (0x1 << 1) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT2 (0x1 << 2) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT3 (0x1 << 3) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT4 (0x1 << 4) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT5 (0x1 << 5) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT6 (0x1 << 6) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT7 (0x1 << 7) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT8 (0x1 << 8) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT9 (0x1 << 9) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT10 (0x1 << 10) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT11 (0x1 << 11) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT12 (0x1 << 12) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT13 (0x1 << 13) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT14 (0x1 << 14) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT15 (0x1 << 15) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT16 (0x1 << 16) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT17 (0x1 << 17) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT18 (0x1 << 18) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT19 (0x1 << 19) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT20 (0x1 << 20) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT21 (0x1 << 21) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT22 (0x1 << 22) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT23 (0x1 << 23) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT24 (0x1 << 24) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT25 (0x1 << 25) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT26 (0x1 << 26) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT27 (0x1 << 27) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT28 (0x1 << 28) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT29 (0x1 << 29) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT30 (0x1 << 30) /**< \brief (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT31 (0x1 << 31) /**< \brief (PIO_SCHMITT) */ +/* -------- PIO_PCMR : (PIO Offset: 0x150) Parallel Capture Mode Register -------- */ +#define PIO_PCMR_PCEN (0x1 << 0) /**< \brief (PIO_PCMR) Parallel Capture Mode Enable */ +#define PIO_PCMR_DSIZE (0x3 << 4) /**< \brief (PIO_PCMR) Parallel Capture Mode Data Size */ +#define PIO_PCMR_ALWYS (0x1 << 9) /**< \brief (PIO_PCMR) Parallel Capture Mode Always Sampling */ +#define PIO_PCMR_HALFS (0x1 << 10) /**< \brief (PIO_PCMR) Parallel Capture Mode Half Sampling */ +#define PIO_PCMR_FRSTS (0x1 << 11) /**< \brief (PIO_PCMR) Parallel Capture Mode First Sample */ +/* -------- PIO_PCIER : (PIO Offset: 0x154) Parallel Capture Interrupt Enable Register -------- */ +#define PIO_PCIER_DRDY (0x1 << 0) /**< \brief (PIO_PCIER) Parallel Capture Mode Data Ready Interrupt Enable */ +#define PIO_PCIER_OVRE (0x1 << 1) /**< \brief (PIO_PCIER) Parallel Capture Mode Overrun Error Interrupt Enable */ +#define PIO_PCIER_ENDRX (0x1 << 2) /**< \brief (PIO_PCIER) End of Reception Transfer Interrupt Enable */ +#define PIO_PCIER_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIER) Reception Buffer Full Interrupt Enable */ +/* -------- PIO_PCIDR : (PIO Offset: 0x158) Parallel Capture Interrupt Disable Register -------- */ +#define PIO_PCIDR_DRDY (0x1 << 0) /**< \brief (PIO_PCIDR) Parallel Capture Mode Data Ready Interrupt Disable */ +#define PIO_PCIDR_OVRE (0x1 << 1) /**< \brief (PIO_PCIDR) Parallel Capture Mode Overrun Error Interrupt Disable */ +#define PIO_PCIDR_ENDRX (0x1 << 2) /**< \brief (PIO_PCIDR) End of Reception Transfer Interrupt Disable */ +#define PIO_PCIDR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIDR) Reception Buffer Full Interrupt Disable */ +/* -------- PIO_PCIMR : (PIO Offset: 0x15C) Parallel Capture Interrupt Mask Register -------- */ +#define PIO_PCIMR_DRDY (0x1 << 0) /**< \brief (PIO_PCIMR) Parallel Capture Mode Data Ready Interrupt Mask */ +#define PIO_PCIMR_OVRE (0x1 << 1) /**< \brief (PIO_PCIMR) Parallel Capture Mode Overrun Error Interrupt Mask */ +#define PIO_PCIMR_ENDRX (0x1 << 2) /**< \brief (PIO_PCIMR) End of Reception Transfer Interrupt Mask */ +#define PIO_PCIMR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCIMR) Reception Buffer Full Interrupt Mask */ +/* -------- PIO_PCISR : (PIO Offset: 0x160) Parallel Capture Interrupt Status Register -------- */ +#define PIO_PCISR_DRDY (0x1 << 0) /**< \brief (PIO_PCISR) Parallel Capture Mode Data Ready */ +#define PIO_PCISR_OVRE (0x1 << 1) /**< \brief (PIO_PCISR) Parallel Capture Mode Overrun Error. */ +#define PIO_PCISR_ENDRX (0x1 << 2) /**< \brief (PIO_PCISR) End of Reception Transfer. */ +#define PIO_PCISR_RXBUFF (0x1 << 3) /**< \brief (PIO_PCISR) Reception Buffer Full */ +/* -------- PIO_PCRHR : (PIO Offset: 0x164) Parallel Capture Reception Holding Register -------- */ +#define PIO_PCRHR_RDATA (0xffffffff << 0) /**< \brief (PIO_PCRHR) Parallel Capture Mode Reception Data. */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Power Management Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_PMC Power Management Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Pmc hardware registers */ +typedef struct { + WoReg PMC_SCER; /**< \brief (Pmc Offset: 0x0000) System Clock Enable Register */ + WoReg PMC_SCDR; /**< \brief (Pmc Offset: 0x0004) System Clock Disable Register */ + RoReg PMC_SCSR; /**< \brief (Pmc Offset: 0x0008) System Clock Status Register */ + RwReg Reserved1[1]; + WoReg PMC_PCER0; /**< \brief (Pmc Offset: 0x0010) Peripheral Clock Enable Register 0 */ + WoReg PMC_PCDR0; /**< \brief (Pmc Offset: 0x0014) Peripheral Clock Disable Register 0 */ + RoReg PMC_PCSR0; /**< \brief (Pmc Offset: 0x0018) Peripheral Clock Status Register 0 */ + RwReg Reserved2[1]; + RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */ + RoReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */ + RwReg CKGR_PLLAR; /**< \brief (Pmc Offset: 0x0028) PLLA Register */ + RwReg CKGR_PLLBR; /**< \brief (Pmc Offset: 0x002C) PLLB Register */ + RwReg PMC_MCKR; /**< \brief (Pmc Offset: 0x0030) Master Clock Register */ + RwReg Reserved3[1]; + RwReg PMC_USB; /**< \brief (Pmc Offset: 0x0038) USB Clock Register */ + RwReg Reserved4[1]; + RwReg PMC_PCK[3]; /**< \brief (Pmc Offset: 0x0040) Programmable Clock 0 Register */ + RwReg Reserved5[5]; + WoReg PMC_IER; /**< \brief (Pmc Offset: 0x0060) Interrupt Enable Register */ + WoReg PMC_IDR; /**< \brief (Pmc Offset: 0x0064) Interrupt Disable Register */ + RoReg PMC_SR; /**< \brief (Pmc Offset: 0x0068) Status Register */ + RoReg PMC_IMR; /**< \brief (Pmc Offset: 0x006C) Interrupt Mask Register */ + RwReg PMC_FSMR; /**< \brief (Pmc Offset: 0x0070) Fast Startup Mode Register */ + RwReg PMC_FSPR; /**< \brief (Pmc Offset: 0x0074) Fast Startup Polarity Register */ + WoReg PMC_FOCR; /**< \brief (Pmc Offset: 0x0078) Fault Output Clear Register */ + RwReg Reserved6[26]; + RwReg PMC_WPMR; /**< \brief (Pmc Offset: 0x00E4) Write Protect Mode Register */ + RoReg PMC_WPSR; /**< \brief (Pmc Offset: 0x00E8) Write Protect Status Register */ + RwReg Reserved7[5]; + WoReg PMC_PCER1; /**< \brief (Pmc Offset: 0x0100) Peripheral Clock Enable Register 1 */ + WoReg PMC_PCDR1; /**< \brief (Pmc Offset: 0x0104) Peripheral Clock Disable Register 1 */ + RoReg PMC_PCSR1; /**< \brief (Pmc Offset: 0x0108) Peripheral Clock Status Register 1 */ + RwReg Reserved8[1]; + RwReg PMC_OCR; /**< \brief (Pmc Offset: 0x0110) Oscillator Calibration Register */ +} Pmc; +#endif /* __ASSEMBLY__ */ +/* -------- PMC_SCER : (PMC Offset: 0x0000) System Clock Enable Register -------- */ +#define PMC_SCER_UDP (0x1 << 7) /**< \brief (PMC_SCER) USB Device Port Clock Enable */ +#define PMC_SCER_PCK0 (0x1 << 8) /**< \brief (PMC_SCER) Programmable Clock 0 Output Enable */ +#define PMC_SCER_PCK1 (0x1 << 9) /**< \brief (PMC_SCER) Programmable Clock 1 Output Enable */ +#define PMC_SCER_PCK2 (0x1 << 10) /**< \brief (PMC_SCER) Programmable Clock 2 Output Enable */ +/* -------- PMC_SCDR : (PMC Offset: 0x0004) System Clock Disable Register -------- */ +#define PMC_SCDR_UDP (0x1 << 7) /**< \brief (PMC_SCDR) USB Device Port Clock Disable */ +#define PMC_SCDR_PCK0 (0x1 << 8) /**< \brief (PMC_SCDR) Programmable Clock 0 Output Disable */ +#define PMC_SCDR_PCK1 (0x1 << 9) /**< \brief (PMC_SCDR) Programmable Clock 1 Output Disable */ +#define PMC_SCDR_PCK2 (0x1 << 10) /**< \brief (PMC_SCDR) Programmable Clock 2 Output Disable */ +/* -------- PMC_SCSR : (PMC Offset: 0x0008) System Clock Status Register -------- */ +#define PMC_SCSR_UDP (0x1 << 7) /**< \brief (PMC_SCSR) USB Device Port Clock Status */ +#define PMC_SCSR_PCK0 (0x1 << 8) /**< \brief (PMC_SCSR) Programmable Clock 0 Output Status */ +#define PMC_SCSR_PCK1 (0x1 << 9) /**< \brief (PMC_SCSR) Programmable Clock 1 Output Status */ +#define PMC_SCSR_PCK2 (0x1 << 10) /**< \brief (PMC_SCSR) Programmable Clock 2 Output Status */ +/* -------- PMC_PCER0 : (PMC Offset: 0x0010) Peripheral Clock Enable Register 0 -------- */ +#define PMC_PCER0_PID2 (0x1 << 2) /**< \brief (PMC_PCER0) Peripheral Clock 2 Enable */ +#define PMC_PCER0_PID3 (0x1 << 3) /**< \brief (PMC_PCER0) Peripheral Clock 3 Enable */ +#define PMC_PCER0_PID4 (0x1 << 4) /**< \brief (PMC_PCER0) Peripheral Clock 4 Enable */ +#define PMC_PCER0_PID5 (0x1 << 5) /**< \brief (PMC_PCER0) Peripheral Clock 5 Enable */ +#define PMC_PCER0_PID6 (0x1 << 6) /**< \brief (PMC_PCER0) Peripheral Clock 6 Enable */ +#define PMC_PCER0_PID7 (0x1 << 7) /**< \brief (PMC_PCER0) Peripheral Clock 7 Enable */ +#define PMC_PCER0_PID8 (0x1 << 8) /**< \brief (PMC_PCER0) Peripheral Clock 8 Enable */ +#define PMC_PCER0_PID9 (0x1 << 9) /**< \brief (PMC_PCER0) Peripheral Clock 9 Enable */ +#define PMC_PCER0_PID10 (0x1 << 10) /**< \brief (PMC_PCER0) Peripheral Clock 10 Enable */ +#define PMC_PCER0_PID11 (0x1 << 11) /**< \brief (PMC_PCER0) Peripheral Clock 11 Enable */ +#define PMC_PCER0_PID12 (0x1 << 12) /**< \brief (PMC_PCER0) Peripheral Clock 12 Enable */ +#define PMC_PCER0_PID13 (0x1 << 13) /**< \brief (PMC_PCER0) Peripheral Clock 13 Enable */ +#define PMC_PCER0_PID14 (0x1 << 14) /**< \brief (PMC_PCER0) Peripheral Clock 14 Enable */ +#define PMC_PCER0_PID15 (0x1 << 15) /**< \brief (PMC_PCER0) Peripheral Clock 15 Enable */ +#define PMC_PCER0_PID16 (0x1 << 16) /**< \brief (PMC_PCER0) Peripheral Clock 16 Enable */ +#define PMC_PCER0_PID17 (0x1 << 17) /**< \brief (PMC_PCER0) Peripheral Clock 17 Enable */ +#define PMC_PCER0_PID18 (0x1 << 18) /**< \brief (PMC_PCER0) Peripheral Clock 18 Enable */ +#define PMC_PCER0_PID19 (0x1 << 19) /**< \brief (PMC_PCER0) Peripheral Clock 19 Enable */ +#define PMC_PCER0_PID20 (0x1 << 20) /**< \brief (PMC_PCER0) Peripheral Clock 20 Enable */ +#define PMC_PCER0_PID21 (0x1 << 21) /**< \brief (PMC_PCER0) Peripheral Clock 21 Enable */ +#define PMC_PCER0_PID22 (0x1 << 22) /**< \brief (PMC_PCER0) Peripheral Clock 22 Enable */ +#define PMC_PCER0_PID23 (0x1 << 23) /**< \brief (PMC_PCER0) Peripheral Clock 23 Enable */ +#define PMC_PCER0_PID24 (0x1 << 24) /**< \brief (PMC_PCER0) Peripheral Clock 24 Enable */ +#define PMC_PCER0_PID25 (0x1 << 25) /**< \brief (PMC_PCER0) Peripheral Clock 25 Enable */ +#define PMC_PCER0_PID26 (0x1 << 26) /**< \brief (PMC_PCER0) Peripheral Clock 26 Enable */ +#define PMC_PCER0_PID27 (0x1 << 27) /**< \brief (PMC_PCER0) Peripheral Clock 27 Enable */ +#define PMC_PCER0_PID28 (0x1 << 28) /**< \brief (PMC_PCER0) Peripheral Clock 28 Enable */ +#define PMC_PCER0_PID29 (0x1 << 29) /**< \brief (PMC_PCER0) Peripheral Clock 29 Enable */ +#define PMC_PCER0_PID30 (0x1 << 30) /**< \brief (PMC_PCER0) Peripheral Clock 30 Enable */ +#define PMC_PCER0_PID31 (0x1 << 31) /**< \brief (PMC_PCER0) Peripheral Clock 31 Enable */ +/* -------- PMC_PCDR0 : (PMC Offset: 0x0014) Peripheral Clock Disable Register 0 -------- */ +#define PMC_PCDR0_PID2 (0x1 << 2) /**< \brief (PMC_PCDR0) Peripheral Clock 2 Disable */ +#define PMC_PCDR0_PID3 (0x1 << 3) /**< \brief (PMC_PCDR0) Peripheral Clock 3 Disable */ +#define PMC_PCDR0_PID4 (0x1 << 4) /**< \brief (PMC_PCDR0) Peripheral Clock 4 Disable */ +#define PMC_PCDR0_PID5 (0x1 << 5) /**< \brief (PMC_PCDR0) Peripheral Clock 5 Disable */ +#define PMC_PCDR0_PID6 (0x1 << 6) /**< \brief (PMC_PCDR0) Peripheral Clock 6 Disable */ +#define PMC_PCDR0_PID7 (0x1 << 7) /**< \brief (PMC_PCDR0) Peripheral Clock 7 Disable */ +#define PMC_PCDR0_PID8 (0x1 << 8) /**< \brief (PMC_PCDR0) Peripheral Clock 8 Disable */ +#define PMC_PCDR0_PID9 (0x1 << 9) /**< \brief (PMC_PCDR0) Peripheral Clock 9 Disable */ +#define PMC_PCDR0_PID10 (0x1 << 10) /**< \brief (PMC_PCDR0) Peripheral Clock 10 Disable */ +#define PMC_PCDR0_PID11 (0x1 << 11) /**< \brief (PMC_PCDR0) Peripheral Clock 11 Disable */ +#define PMC_PCDR0_PID12 (0x1 << 12) /**< \brief (PMC_PCDR0) Peripheral Clock 12 Disable */ +#define PMC_PCDR0_PID13 (0x1 << 13) /**< \brief (PMC_PCDR0) Peripheral Clock 13 Disable */ +#define PMC_PCDR0_PID14 (0x1 << 14) /**< \brief (PMC_PCDR0) Peripheral Clock 14 Disable */ +#define PMC_PCDR0_PID15 (0x1 << 15) /**< \brief (PMC_PCDR0) Peripheral Clock 15 Disable */ +#define PMC_PCDR0_PID16 (0x1 << 16) /**< \brief (PMC_PCDR0) Peripheral Clock 16 Disable */ +#define PMC_PCDR0_PID17 (0x1 << 17) /**< \brief (PMC_PCDR0) Peripheral Clock 17 Disable */ +#define PMC_PCDR0_PID18 (0x1 << 18) /**< \brief (PMC_PCDR0) Peripheral Clock 18 Disable */ +#define PMC_PCDR0_PID19 (0x1 << 19) /**< \brief (PMC_PCDR0) Peripheral Clock 19 Disable */ +#define PMC_PCDR0_PID20 (0x1 << 20) /**< \brief (PMC_PCDR0) Peripheral Clock 20 Disable */ +#define PMC_PCDR0_PID21 (0x1 << 21) /**< \brief (PMC_PCDR0) Peripheral Clock 21 Disable */ +#define PMC_PCDR0_PID22 (0x1 << 22) /**< \brief (PMC_PCDR0) Peripheral Clock 22 Disable */ +#define PMC_PCDR0_PID23 (0x1 << 23) /**< \brief (PMC_PCDR0) Peripheral Clock 23 Disable */ +#define PMC_PCDR0_PID24 (0x1 << 24) /**< \brief (PMC_PCDR0) Peripheral Clock 24 Disable */ +#define PMC_PCDR0_PID25 (0x1 << 25) /**< \brief (PMC_PCDR0) Peripheral Clock 25 Disable */ +#define PMC_PCDR0_PID26 (0x1 << 26) /**< \brief (PMC_PCDR0) Peripheral Clock 26 Disable */ +#define PMC_PCDR0_PID27 (0x1 << 27) /**< \brief (PMC_PCDR0) Peripheral Clock 27 Disable */ +#define PMC_PCDR0_PID28 (0x1 << 28) /**< \brief (PMC_PCDR0) Peripheral Clock 28 Disable */ +#define PMC_PCDR0_PID29 (0x1 << 29) /**< \brief (PMC_PCDR0) Peripheral Clock 29 Disable */ +#define PMC_PCDR0_PID30 (0x1 << 30) /**< \brief (PMC_PCDR0) Peripheral Clock 30 Disable */ +#define PMC_PCDR0_PID31 (0x1 << 31) /**< \brief (PMC_PCDR0) Peripheral Clock 31 Disable */ +/* -------- PMC_PCSR0 : (PMC Offset: 0x0018) Peripheral Clock Status Register 0 -------- */ +#define PMC_PCSR0_PID2 (0x1 << 2) /**< \brief (PMC_PCSR0) Peripheral Clock 2 Status */ +#define PMC_PCSR0_PID3 (0x1 << 3) /**< \brief (PMC_PCSR0) Peripheral Clock 3 Status */ +#define PMC_PCSR0_PID4 (0x1 << 4) /**< \brief (PMC_PCSR0) Peripheral Clock 4 Status */ +#define PMC_PCSR0_PID5 (0x1 << 5) /**< \brief (PMC_PCSR0) Peripheral Clock 5 Status */ +#define PMC_PCSR0_PID6 (0x1 << 6) /**< \brief (PMC_PCSR0) Peripheral Clock 6 Status */ +#define PMC_PCSR0_PID7 (0x1 << 7) /**< \brief (PMC_PCSR0) Peripheral Clock 7 Status */ +#define PMC_PCSR0_PID8 (0x1 << 8) /**< \brief (PMC_PCSR0) Peripheral Clock 8 Status */ +#define PMC_PCSR0_PID9 (0x1 << 9) /**< \brief (PMC_PCSR0) Peripheral Clock 9 Status */ +#define PMC_PCSR0_PID10 (0x1 << 10) /**< \brief (PMC_PCSR0) Peripheral Clock 10 Status */ +#define PMC_PCSR0_PID11 (0x1 << 11) /**< \brief (PMC_PCSR0) Peripheral Clock 11 Status */ +#define PMC_PCSR0_PID12 (0x1 << 12) /**< \brief (PMC_PCSR0) Peripheral Clock 12 Status */ +#define PMC_PCSR0_PID13 (0x1 << 13) /**< \brief (PMC_PCSR0) Peripheral Clock 13 Status */ +#define PMC_PCSR0_PID14 (0x1 << 14) /**< \brief (PMC_PCSR0) Peripheral Clock 14 Status */ +#define PMC_PCSR0_PID15 (0x1 << 15) /**< \brief (PMC_PCSR0) Peripheral Clock 15 Status */ +#define PMC_PCSR0_PID16 (0x1 << 16) /**< \brief (PMC_PCSR0) Peripheral Clock 16 Status */ +#define PMC_PCSR0_PID17 (0x1 << 17) /**< \brief (PMC_PCSR0) Peripheral Clock 17 Status */ +#define PMC_PCSR0_PID18 (0x1 << 18) /**< \brief (PMC_PCSR0) Peripheral Clock 18 Status */ +#define PMC_PCSR0_PID19 (0x1 << 19) /**< \brief (PMC_PCSR0) Peripheral Clock 19 Status */ +#define PMC_PCSR0_PID20 (0x1 << 20) /**< \brief (PMC_PCSR0) Peripheral Clock 20 Status */ +#define PMC_PCSR0_PID21 (0x1 << 21) /**< \brief (PMC_PCSR0) Peripheral Clock 21 Status */ +#define PMC_PCSR0_PID22 (0x1 << 22) /**< \brief (PMC_PCSR0) Peripheral Clock 22 Status */ +#define PMC_PCSR0_PID23 (0x1 << 23) /**< \brief (PMC_PCSR0) Peripheral Clock 23 Status */ +#define PMC_PCSR0_PID24 (0x1 << 24) /**< \brief (PMC_PCSR0) Peripheral Clock 24 Status */ +#define PMC_PCSR0_PID25 (0x1 << 25) /**< \brief (PMC_PCSR0) Peripheral Clock 25 Status */ +#define PMC_PCSR0_PID26 (0x1 << 26) /**< \brief (PMC_PCSR0) Peripheral Clock 26 Status */ +#define PMC_PCSR0_PID27 (0x1 << 27) /**< \brief (PMC_PCSR0) Peripheral Clock 27 Status */ +#define PMC_PCSR0_PID28 (0x1 << 28) /**< \brief (PMC_PCSR0) Peripheral Clock 28 Status */ +#define PMC_PCSR0_PID29 (0x1 << 29) /**< \brief (PMC_PCSR0) Peripheral Clock 29 Status */ +#define PMC_PCSR0_PID30 (0x1 << 30) /**< \brief (PMC_PCSR0) Peripheral Clock 30 Status */ +#define PMC_PCSR0_PID31 (0x1 << 31) /**< \brief (PMC_PCSR0) Peripheral Clock 31 Status */ +/* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */ +#define CKGR_MOR_MOSCXTEN (0x1 << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */ +#define CKGR_MOR_MOSCXTBY (0x1 << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */ +#define CKGR_MOR_WAITMODE (0x1 << 2) /**< \brief (CKGR_MOR) Wait Mode Command */ +#define CKGR_MOR_MOSCRCEN (0x1 << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */ +#define CKGR_MOR_MOSCRCF (0x7 << 4) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Frequency Selection */ +#define CKGR_MOR_MOSCXTST (0xff << 8) /**< \brief (CKGR_MOR) Main Crystal Oscillator Start-up Time */ +#define CKGR_MOR_KEY (0xff << 16) /**< \brief (CKGR_MOR) Password */ +#define CKGR_MOR_MOSCSEL (0x1 << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */ +#define CKGR_MOR_CFDEN (0x1 << 25) /**< \brief (CKGR_MOR) Clock Failure Detector Enable */ +/* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */ +#define CKGR_MCFR_MAINF (0xffff << 0) /**< \brief (CKGR_MCFR) Main Clock Frequency */ +#define CKGR_MCFR_MAINFRDY (0x1 << 16) /**< \brief (CKGR_MCFR) Main Clock Ready */ +/* -------- CKGR_PLLAR : (PMC Offset: 0x0028) PLLA Register -------- */ +#define CKGR_PLLAR_DIVA (0xff << 0) /**< \brief (CKGR_PLLAR) Divider */ +#define CKGR_PLLAR_PLLACOUNT (0x3f << 8) /**< \brief (CKGR_PLLAR) PLLA Counter */ +#define CKGR_PLLAR_MULA (0x7ff << 16) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ +#define CKGR_PLLAR_STUCKTO1 (0x1 << 29) /**< \brief (CKGR_PLLAR) */ +/* -------- CKGR_PLLBR : (PMC Offset: 0x002C) PLLB Register -------- */ +#define CKGR_PLLBR_DIVB_Pos 0 +#define CKGR_PLLBR_DIVB_Msk (0xffu << CKGR_PLLBR_DIVB_Pos) /**< \brief (CKGR_PLLBR) Divider */ +#define CKGR_PLLBR_DIVB(value) ((CKGR_PLLBR_DIVB_Msk & ((value) << CKGR_PLLBR_DIVB_Pos))) +#define CKGR_PLLBR_PLLBCOUNT_Pos 8 +#define CKGR_PLLBR_PLLBCOUNT_Msk (0x3fu << CKGR_PLLBR_PLLBCOUNT_Pos) /**< \brief (CKGR_PLLBR) PLLB Counter */ +#define CKGR_PLLBR_PLLBCOUNT(value) ((CKGR_PLLBR_PLLBCOUNT_Msk & ((value) << CKGR_PLLBR_PLLBCOUNT_Pos))) +#define CKGR_PLLBR_MULB_Pos 16 +#define CKGR_PLLBR_MULB_Msk (0x7ffu << CKGR_PLLBR_MULB_Pos) /**< \brief (CKGR_PLLBR) PLLB Multiplier */ +#define CKGR_PLLBR_MULB(value) ((CKGR_PLLBR_MULB_Msk & ((value) << CKGR_PLLBR_MULB_Pos))) +/* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ +#define PMC_MCKR_CSS (0x3 << 0) /**< \brief (PMC_MCKR) Master Clock Source Selection */ +#define PMC_MCKR_CSS_SLOW_CLK (0x0 << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ +#define PMC_MCKR_CSS_MAIN_CLK (0x1 << 0) /**< \brief (PMC_MCKR) Main Clock is selected */ +#define PMC_MCKR_CSS_PLLA_CLK (0x2 << 0) /**< \brief (PMC_MCKR) PLLA Clock is selected */ +#define PMC_MCKR_CSS_PLLB_CLK (0x3 << 0) /**< \brief (PMC_MCKR) PLLB Clock is selected */ +#define PMC_MCKR_PRES (0x7 << 4) /**< \brief (PMC_MCKR) Processor Clock Prescaler */ +#define PMC_MCKR_PRES_CLK (0x0 << 4) /**< \brief (PMC_MCKR) Selected clock */ +#define PMC_MCKR_PRES_CLK_2 (0x1 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 2 */ +#define PMC_MCKR_PRES_CLK_4 (0x2 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 4 */ +#define PMC_MCKR_PRES_CLK_8 (0x3 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 8 */ +#define PMC_MCKR_PRES_CLK_16 (0x4 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 16 */ +#define PMC_MCKR_PRES_CLK_32 (0x5 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 32 */ +#define PMC_MCKR_PRES_CLK_64 (0x6 << 4) /**< \brief (PMC_MCKR) Selected clock divided by 64 */ +#define PMC_MCKR_PLLADIV2 (0x1 << 12) /**< \brief (PMC_MCKR) PLLA Divisor by 2 */ +#define PMC_MCKR_PLLBDIV2 (0x1 << 13) /**< \brief (PMC_MCKR) PLLB Divisor by 2 */ +/* -------- PMC_USB : (PMC Offset: 0x0038) USB Clock Register -------- */ +#define PMC_USB_USBS (0x1u << 0) /**< \brief (PMC_USB) USB Input Clock Selection */ +#define PMC_USB_USBDIV_Pos 8 +#define PMC_USB_USBDIV_Msk (0xfu << PMC_USB_USBDIV_Pos) /**< \brief (PMC_USB) Divider for USB Clock. */ +#define PMC_USB_USBDIV(value) ((PMC_USB_USBDIV_Msk & ((value) << PMC_USB_USBDIV_Pos))) +/* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ +#define PMC_PCK_CSS (0x7 << 0) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ +#define PMC_PCK_PRES (0x7 << 4) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ +/* -------- PMC_IER : (PMC Offset: 0x0060) Interrupt Enable Register -------- */ +#define PMC_IER_MOSCXTS (0x1 << 0) /**< \brief (PMC_IER) Main Crystal Oscillator Status Interrupt Enable */ +#define PMC_IER_LOCKA (0x1 << 1) /**< \brief (PMC_IER) PLLA Lock Interrupt Enable */ +#define PMC_IER_LOCKB (0x1 << 2) /**< \brief (PMC_IER) PLLB Lock Interrupt Enable */ +#define PMC_IER_MCKRDY (0x1 << 3) /**< \brief (PMC_IER) Master Clock Ready Interrupt Enable */ +#define PMC_IER_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IER) Programmable Clock Ready 0 Interrupt Enable */ +#define PMC_IER_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IER) Programmable Clock Ready 1 Interrupt Enable */ +#define PMC_IER_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IER) Programmable Clock Ready 2 Interrupt Enable */ +#define PMC_IER_MOSCSELS (0x1 << 16) /**< \brief (PMC_IER) Main Oscillator Selection Status Interrupt Enable */ +#define PMC_IER_MOSCRCS (0x1 << 17) /**< \brief (PMC_IER) Main On-Chip RC Status Interrupt Enable */ +#define PMC_IER_CFDEV (0x1 << 18) /**< \brief (PMC_IER) Clock Failure Detector Event Interrupt Enable */ +/* -------- PMC_IDR : (PMC Offset: 0x0064) Interrupt Disable Register -------- */ +#define PMC_IDR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IDR) Main Crystal Oscillator Status Interrupt Disable */ +#define PMC_IDR_LOCKA (0x1 << 1) /**< \brief (PMC_IDR) PLLA Lock Interrupt Disable */ +#define PMC_IDR_LOCKB (0x1 << 2) /**< \brief (PMC_IDR) PLLB Lock Interrupt Disable */ +#define PMC_IDR_MCKRDY (0x1 << 3) /**< \brief (PMC_IDR) Master Clock Ready Interrupt Disable */ +#define PMC_IDR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IDR) Programmable Clock Ready 0 Interrupt Disable */ +#define PMC_IDR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IDR) Programmable Clock Ready 1 Interrupt Disable */ +#define PMC_IDR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IDR) Programmable Clock Ready 2 Interrupt Disable */ +#define PMC_IDR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IDR) Main Oscillator Selection Status Interrupt Disable */ +#define PMC_IDR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IDR) Main On-Chip RC Status Interrupt Disable */ +#define PMC_IDR_CFDEV (0x1 << 18) /**< \brief (PMC_IDR) Clock Failure Detector Event Interrupt Disable */ +/* -------- PMC_SR : (PMC Offset: 0x0068) Status Register -------- */ +#define PMC_SR_MOSCXTS (0x1 << 0) /**< \brief (PMC_SR) Main XTAL Oscillator Status */ +#define PMC_SR_LOCKA (0x1 << 1) /**< \brief (PMC_SR) PLLA Lock Status */ +#define PMC_SR_LOCKB (0x1 << 2) /**< \brief (PMC_SR) PLLB Lock Status */ +#define PMC_SR_MCKRDY (0x1 << 3) /**< \brief (PMC_SR) Master Clock Status */ +#define PMC_SR_OSCSELS (0x1 << 7) /**< \brief (PMC_SR) Slow Clock Oscillator Selection */ +#define PMC_SR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_SR) Programmable Clock Ready Status */ +#define PMC_SR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_SR) Programmable Clock Ready Status */ +#define PMC_SR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_SR) Programmable Clock Ready Status */ +#define PMC_SR_MOSCSELS (0x1 << 16) /**< \brief (PMC_SR) Main Oscillator Selection Status */ +#define PMC_SR_MOSCRCS (0x1 << 17) /**< \brief (PMC_SR) Main On-Chip RC Oscillator Status */ +#define PMC_SR_CFDEV (0x1 << 18) /**< \brief (PMC_SR) Clock Failure Detector Event */ +#define PMC_SR_CFDS (0x1 << 19) /**< \brief (PMC_SR) Clock Failure Detector Status */ +#define PMC_SR_FOS (0x1 << 20) /**< \brief (PMC_SR) Clock Failure Detector Fault Output Status */ +/* -------- PMC_IMR : (PMC Offset: 0x006C) Interrupt Mask Register -------- */ +#define PMC_IMR_MOSCXTS (0x1 << 0) /**< \brief (PMC_IMR) Main Crystal Oscillator Status Interrupt Mask */ +#define PMC_IMR_LOCKA (0x1 << 1) /**< \brief (PMC_IMR) PLLA Lock Interrupt Mask */ +#define PMC_IMR_LOCKB (0x1 << 2) /**< \brief (PMC_IMR) PLLB Lock Interrupt Mask */ +#define PMC_IMR_MCKRDY (0x1 << 3) /**< \brief (PMC_IMR) Master Clock Ready Interrupt Mask */ +#define PMC_IMR_PCKRDY0 (0x1 << 8) /**< \brief (PMC_IMR) Programmable Clock Ready 0 Interrupt Mask */ +#define PMC_IMR_PCKRDY1 (0x1 << 9) /**< \brief (PMC_IMR) Programmable Clock Ready 1 Interrupt Mask */ +#define PMC_IMR_PCKRDY2 (0x1 << 10) /**< \brief (PMC_IMR) Programmable Clock Ready 2 Interrupt Mask */ +#define PMC_IMR_MOSCSELS (0x1 << 16) /**< \brief (PMC_IMR) Main Oscillator Selection Status Interrupt Mask */ +#define PMC_IMR_MOSCRCS (0x1 << 17) /**< \brief (PMC_IMR) Main On-Chip RC Status Interrupt Mask */ +#define PMC_IMR_CFDEV (0x1 << 18) /**< \brief (PMC_IMR) Clock Failure Detector Event Interrupt Mask */ +/* -------- PMC_FSMR : (PMC Offset: 0x0070) Fast Startup Mode Register -------- */ +#define PMC_FSMR_FSTT0 (0x1 << 0) /**< \brief (PMC_FSMR) Fast Startup Input Enable 0 */ +#define PMC_FSMR_FSTT1 (0x1 << 1) /**< \brief (PMC_FSMR) Fast Startup Input Enable 1 */ +#define PMC_FSMR_FSTT2 (0x1 << 2) /**< \brief (PMC_FSMR) Fast Startup Input Enable 2 */ +#define PMC_FSMR_FSTT3 (0x1 << 3) /**< \brief (PMC_FSMR) Fast Startup Input Enable 3 */ +#define PMC_FSMR_FSTT4 (0x1 << 4) /**< \brief (PMC_FSMR) Fast Startup Input Enable 4 */ +#define PMC_FSMR_FSTT5 (0x1 << 5) /**< \brief (PMC_FSMR) Fast Startup Input Enable 5 */ +#define PMC_FSMR_FSTT6 (0x1 << 6) /**< \brief (PMC_FSMR) Fast Startup Input Enable 6 */ +#define PMC_FSMR_FSTT7 (0x1 << 7) /**< \brief (PMC_FSMR) Fast Startup Input Enable 7 */ +#define PMC_FSMR_FSTT8 (0x1 << 8) /**< \brief (PMC_FSMR) Fast Startup Input Enable 8 */ +#define PMC_FSMR_FSTT9 (0x1 << 9) /**< \brief (PMC_FSMR) Fast Startup Input Enable 9 */ +#define PMC_FSMR_FSTT10 (0x1 << 10) /**< \brief (PMC_FSMR) Fast Startup Input Enable 10 */ +#define PMC_FSMR_FSTT11 (0x1 << 11) /**< \brief (PMC_FSMR) Fast Startup Input Enable 11 */ +#define PMC_FSMR_FSTT12 (0x1 << 12) /**< \brief (PMC_FSMR) Fast Startup Input Enable 12 */ +#define PMC_FSMR_FSTT13 (0x1 << 13) /**< \brief (PMC_FSMR) Fast Startup Input Enable 13 */ +#define PMC_FSMR_FSTT14 (0x1 << 14) /**< \brief (PMC_FSMR) Fast Startup Input Enable 14 */ +#define PMC_FSMR_FSTT15 (0x1 << 15) /**< \brief (PMC_FSMR) Fast Startup Input Enable 15 */ +#define PMC_FSMR_RTTAL (0x1 << 16) /**< \brief (PMC_FSMR) RTT Alarm Enable */ +#define PMC_FSMR_RTCAL (0x1 << 17) /**< \brief (PMC_FSMR) RTC Alarm Enable */ +#define PMC_FSMR_USBAL (0x1 << 18) /**< \brief (PMC_FSMR) USB Alarm Enable */ +#define PMC_FSMR_LPM (0x1 << 20) /**< \brief (PMC_FSMR) Low Power Mode */ +/* -------- PMC_FSPR : (PMC Offset: 0x0074) Fast Startup Polarity Register -------- */ +#define PMC_FSPR_FSTP0 (0x1 << 0) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP1 (0x1 << 1) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP2 (0x1 << 2) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP3 (0x1 << 3) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP4 (0x1 << 4) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP5 (0x1 << 5) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP6 (0x1 << 6) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP7 (0x1 << 7) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP8 (0x1 << 8) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP9 (0x1 << 9) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP10 (0x1 << 10) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP11 (0x1 << 11) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP12 (0x1 << 12) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP13 (0x1 << 13) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP14 (0x1 << 14) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +#define PMC_FSPR_FSTP15 (0x1 << 15) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ +/* -------- PMC_FOCR : (PMC Offset: 0x0078) Fault Output Clear Register -------- */ +#define PMC_FOCR_FOCLR (0x1 << 0) /**< \brief (PMC_FOCR) Fault Output Clear */ +/* -------- PMC_WPMR : (PMC Offset: 0x00E4) Write Protect Mode Register -------- */ +#define PMC_WPMR_WPEN (0x1 << 0) /**< \brief (PMC_WPMR) Write Protect Enable */ +#define PMC_WPMR_WPKEY (0xffffff << 8) /**< \brief (PMC_WPMR) Write Protect KEY */ +/* -------- PMC_WPSR : (PMC Offset: 0x00E8) Write Protect Status Register -------- */ +#define PMC_WPSR_WPVS (0x1 << 0) /**< \brief (PMC_WPSR) Write Protect Violation Status */ +#define PMC_WPSR_WPVSRC (0xffff << 8) /**< \brief (PMC_WPSR) Write Protect Violation Source */ +/* -------- PMC_PCER1 : (PMC Offset: 0x0100) Peripheral Clock Enable Register 1 -------- */ +#define PMC_PCER1_PID32 (0x1 << 0) /**< \brief (PMC_PCER1) Peripheral Clock 32 Enable */ +#define PMC_PCER1_PID33 (0x1 << 1) /**< \brief (PMC_PCER1) Peripheral Clock 33 Enable */ +#define PMC_PCER1_PID34 (0x1 << 2) /**< \brief (PMC_PCER1) Peripheral Clock 34 Enable */ +#define PMC_PCER1_PID35 (0x1 << 3) /**< \brief (PMC_PCER1) Peripheral Clock 35 Enable */ +#define PMC_PCER1_PID36 (0x1 << 4) /**< \brief (PMC_PCER1) Peripheral Clock 36 Enable */ +#define PMC_PCER1_PID37 (0x1 << 5) /**< \brief (PMC_PCER1) Peripheral Clock 37 Enable */ +#define PMC_PCER1_PID38 (0x1 << 6) /**< \brief (PMC_PCER1) Peripheral Clock 38 Enable */ +#define PMC_PCER1_PID39 (0x1 << 7) /**< \brief (PMC_PCER1) Peripheral Clock 39 Enable */ +#define PMC_PCER1_PID40 (0x1 << 8) /**< \brief (PMC_PCER1) Peripheral Clock 40 Enable */ +#define PMC_PCER1_PID41 (0x1 << 9) /**< \brief (PMC_PCER1) Peripheral Clock 41 Enable */ +#define PMC_PCER1_PID42 (0x1 << 10) /**< \brief (PMC_PCER1) Peripheral Clock 42 Enable */ +#define PMC_PCER1_PID43 (0x1 << 11) /**< \brief (PMC_PCER1) Peripheral Clock 43 Enable */ +#define PMC_PCER1_PID44 (0x1 << 12) /**< \brief (PMC_PCER1) Peripheral Clock 44 Enable */ +#define PMC_PCER1_PID45 (0x1 << 13) /**< \brief (PMC_PCER1) Peripheral Clock 45 Enable */ +#define PMC_PCER1_PID46 (0x1 << 14) /**< \brief (PMC_PCER1) Peripheral Clock 46 Enable */ +#define PMC_PCER1_PID47 (0x1 << 15) /**< \brief (PMC_PCER1) Peripheral Clock 47 Enable */ +#define PMC_PCER1_PID48 (0x1 << 16) /**< \brief (PMC_PCER1) Peripheral Clock 48 Enable */ +#define PMC_PCER1_PID49 (0x1 << 17) /**< \brief (PMC_PCER1) Peripheral Clock 49 Enable */ +#define PMC_PCER1_PID50 (0x1 << 18) /**< \brief (PMC_PCER1) Peripheral Clock 50 Enable */ +#define PMC_PCER1_PID51 (0x1 << 19) /**< \brief (PMC_PCER1) Peripheral Clock 51 Enable */ +#define PMC_PCER1_PID52 (0x1 << 20) /**< \brief (PMC_PCER1) Peripheral Clock 52 Enable */ +#define PMC_PCER1_PID53 (0x1 << 21) /**< \brief (PMC_PCER1) Peripheral Clock 53 Enable */ +#define PMC_PCER1_PID54 (0x1 << 22) /**< \brief (PMC_PCER1) Peripheral Clock 54 Enable */ +#define PMC_PCER1_PID55 (0x1 << 23) /**< \brief (PMC_PCER1) Peripheral Clock 55 Enable */ +#define PMC_PCER1_PID56 (0x1 << 24) /**< \brief (PMC_PCER1) Peripheral Clock 56 Enable */ +#define PMC_PCER1_PID57 (0x1 << 25) /**< \brief (PMC_PCER1) Peripheral Clock 57 Enable */ +#define PMC_PCER1_PID58 (0x1 << 26) /**< \brief (PMC_PCER1) Peripheral Clock 58 Enable */ +#define PMC_PCER1_PID59 (0x1 << 27) /**< \brief (PMC_PCER1) Peripheral Clock 59 Enable */ +#define PMC_PCER1_PID60 (0x1 << 28) /**< \brief (PMC_PCER1) Peripheral Clock 60 Enable */ +#define PMC_PCER1_PID61 (0x1 << 29) /**< \brief (PMC_PCER1) Peripheral Clock 61 Enable */ +#define PMC_PCER1_PID62 (0x1 << 30) /**< \brief (PMC_PCER1) Peripheral Clock 62 Enable */ +#define PMC_PCER1_PID63 (0x1 << 31) /**< \brief (PMC_PCER1) Peripheral Clock 63 Enable */ +/* -------- PMC_PCDR1 : (PMC Offset: 0x0104) Peripheral Clock Disable Register 1 -------- */ +#define PMC_PCDR1_PID32 (0x1 << 0) /**< \brief (PMC_PCDR1) Peripheral Clock 32 Disable */ +#define PMC_PCDR1_PID33 (0x1 << 1) /**< \brief (PMC_PCDR1) Peripheral Clock 33 Disable */ +#define PMC_PCDR1_PID34 (0x1 << 2) /**< \brief (PMC_PCDR1) Peripheral Clock 34 Disable */ +#define PMC_PCDR1_PID35 (0x1 << 3) /**< \brief (PMC_PCDR1) Peripheral Clock 35 Disable */ +#define PMC_PCDR1_PID36 (0x1 << 4) /**< \brief (PMC_PCDR1) Peripheral Clock 36 Disable */ +#define PMC_PCDR1_PID37 (0x1 << 5) /**< \brief (PMC_PCDR1) Peripheral Clock 37 Disable */ +#define PMC_PCDR1_PID38 (0x1 << 6) /**< \brief (PMC_PCDR1) Peripheral Clock 38 Disable */ +#define PMC_PCDR1_PID39 (0x1 << 7) /**< \brief (PMC_PCDR1) Peripheral Clock 39 Disable */ +#define PMC_PCDR1_PID40 (0x1 << 8) /**< \brief (PMC_PCDR1) Peripheral Clock 40 Disable */ +#define PMC_PCDR1_PID41 (0x1 << 9) /**< \brief (PMC_PCDR1) Peripheral Clock 41 Disable */ +#define PMC_PCDR1_PID42 (0x1 << 10) /**< \brief (PMC_PCDR1) Peripheral Clock 42 Disable */ +#define PMC_PCDR1_PID43 (0x1 << 11) /**< \brief (PMC_PCDR1) Peripheral Clock 43 Disable */ +#define PMC_PCDR1_PID44 (0x1 << 12) /**< \brief (PMC_PCDR1) Peripheral Clock 44 Disable */ +#define PMC_PCDR1_PID45 (0x1 << 13) /**< \brief (PMC_PCDR1) Peripheral Clock 45 Disable */ +#define PMC_PCDR1_PID46 (0x1 << 14) /**< \brief (PMC_PCDR1) Peripheral Clock 46 Disable */ +#define PMC_PCDR1_PID47 (0x1 << 15) /**< \brief (PMC_PCDR1) Peripheral Clock 47 Disable */ +#define PMC_PCDR1_PID48 (0x1 << 16) /**< \brief (PMC_PCDR1) Peripheral Clock 48 Disable */ +#define PMC_PCDR1_PID49 (0x1 << 17) /**< \brief (PMC_PCDR1) Peripheral Clock 49 Disable */ +#define PMC_PCDR1_PID50 (0x1 << 18) /**< \brief (PMC_PCDR1) Peripheral Clock 50 Disable */ +#define PMC_PCDR1_PID51 (0x1 << 19) /**< \brief (PMC_PCDR1) Peripheral Clock 51 Disable */ +#define PMC_PCDR1_PID52 (0x1 << 20) /**< \brief (PMC_PCDR1) Peripheral Clock 52 Disable */ +#define PMC_PCDR1_PID53 (0x1 << 21) /**< \brief (PMC_PCDR1) Peripheral Clock 53 Disable */ +#define PMC_PCDR1_PID54 (0x1 << 22) /**< \brief (PMC_PCDR1) Peripheral Clock 54 Disable */ +#define PMC_PCDR1_PID55 (0x1 << 23) /**< \brief (PMC_PCDR1) Peripheral Clock 55 Disable */ +#define PMC_PCDR1_PID56 (0x1 << 24) /**< \brief (PMC_PCDR1) Peripheral Clock 56 Disable */ +#define PMC_PCDR1_PID57 (0x1 << 25) /**< \brief (PMC_PCDR1) Peripheral Clock 57 Disable */ +#define PMC_PCDR1_PID58 (0x1 << 26) /**< \brief (PMC_PCDR1) Peripheral Clock 58 Disable */ +#define PMC_PCDR1_PID59 (0x1 << 27) /**< \brief (PMC_PCDR1) Peripheral Clock 59 Disable */ +#define PMC_PCDR1_PID60 (0x1 << 28) /**< \brief (PMC_PCDR1) Peripheral Clock 60 Disable */ +#define PMC_PCDR1_PID61 (0x1 << 29) /**< \brief (PMC_PCDR1) Peripheral Clock 61 Disable */ +#define PMC_PCDR1_PID62 (0x1 << 30) /**< \brief (PMC_PCDR1) Peripheral Clock 62 Disable */ +#define PMC_PCDR1_PID63 (0x1 << 31) /**< \brief (PMC_PCDR1) Peripheral Clock 63 Disable */ +/* -------- PMC_PCSR1 : (PMC Offset: 0x0108) Peripheral Clock Status Register 1 -------- */ +#define PMC_PCSR1_PID32 (0x1 << 0) /**< \brief (PMC_PCSR1) Peripheral Clock 32 Status */ +#define PMC_PCSR1_PID33 (0x1 << 1) /**< \brief (PMC_PCSR1) Peripheral Clock 33 Status */ +#define PMC_PCSR1_PID34 (0x1 << 2) /**< \brief (PMC_PCSR1) Peripheral Clock 34 Status */ +#define PMC_PCSR1_PID35 (0x1 << 3) /**< \brief (PMC_PCSR1) Peripheral Clock 35 Status */ +#define PMC_PCSR1_PID36 (0x1 << 4) /**< \brief (PMC_PCSR1) Peripheral Clock 36 Status */ +#define PMC_PCSR1_PID37 (0x1 << 5) /**< \brief (PMC_PCSR1) Peripheral Clock 37 Status */ +#define PMC_PCSR1_PID38 (0x1 << 6) /**< \brief (PMC_PCSR1) Peripheral Clock 38 Status */ +#define PMC_PCSR1_PID39 (0x1 << 7) /**< \brief (PMC_PCSR1) Peripheral Clock 39 Status */ +#define PMC_PCSR1_PID40 (0x1 << 8) /**< \brief (PMC_PCSR1) Peripheral Clock 40 Status */ +#define PMC_PCSR1_PID41 (0x1 << 9) /**< \brief (PMC_PCSR1) Peripheral Clock 41 Status */ +#define PMC_PCSR1_PID42 (0x1 << 10) /**< \brief (PMC_PCSR1) Peripheral Clock 42 Status */ +#define PMC_PCSR1_PID43 (0x1 << 11) /**< \brief (PMC_PCSR1) Peripheral Clock 43 Status */ +#define PMC_PCSR1_PID44 (0x1 << 12) /**< \brief (PMC_PCSR1) Peripheral Clock 44 Status */ +#define PMC_PCSR1_PID45 (0x1 << 13) /**< \brief (PMC_PCSR1) Peripheral Clock 45 Status */ +#define PMC_PCSR1_PID46 (0x1 << 14) /**< \brief (PMC_PCSR1) Peripheral Clock 46 Status */ +#define PMC_PCSR1_PID47 (0x1 << 15) /**< \brief (PMC_PCSR1) Peripheral Clock 47 Status */ +#define PMC_PCSR1_PID48 (0x1 << 16) /**< \brief (PMC_PCSR1) Peripheral Clock 48 Status */ +#define PMC_PCSR1_PID49 (0x1 << 17) /**< \brief (PMC_PCSR1) Peripheral Clock 49 Status */ +#define PMC_PCSR1_PID50 (0x1 << 18) /**< \brief (PMC_PCSR1) Peripheral Clock 50 Status */ +#define PMC_PCSR1_PID51 (0x1 << 19) /**< \brief (PMC_PCSR1) Peripheral Clock 51 Status */ +#define PMC_PCSR1_PID52 (0x1 << 20) /**< \brief (PMC_PCSR1) Peripheral Clock 52 Status */ +#define PMC_PCSR1_PID53 (0x1 << 21) /**< \brief (PMC_PCSR1) Peripheral Clock 53 Status */ +#define PMC_PCSR1_PID54 (0x1 << 22) /**< \brief (PMC_PCSR1) Peripheral Clock 54 Status */ +#define PMC_PCSR1_PID55 (0x1 << 23) /**< \brief (PMC_PCSR1) Peripheral Clock 55 Status */ +#define PMC_PCSR1_PID56 (0x1 << 24) /**< \brief (PMC_PCSR1) Peripheral Clock 56 Status */ +#define PMC_PCSR1_PID57 (0x1 << 25) /**< \brief (PMC_PCSR1) Peripheral Clock 57 Status */ +#define PMC_PCSR1_PID58 (0x1 << 26) /**< \brief (PMC_PCSR1) Peripheral Clock 58 Status */ +#define PMC_PCSR1_PID59 (0x1 << 27) /**< \brief (PMC_PCSR1) Peripheral Clock 59 Status */ +#define PMC_PCSR1_PID60 (0x1 << 28) /**< \brief (PMC_PCSR1) Peripheral Clock 60 Status */ +#define PMC_PCSR1_PID61 (0x1 << 29) /**< \brief (PMC_PCSR1) Peripheral Clock 61 Status */ +#define PMC_PCSR1_PID62 (0x1 << 30) /**< \brief (PMC_PCSR1) Peripheral Clock 62 Status */ +#define PMC_PCSR1_PID63 (0x1 << 31) /**< \brief (PMC_PCSR1) Peripheral Clock 63 Status */ +/* -------- PMC_OCR : (PMC Offset: 0x0110) Oscillator Calibration Register -------- */ +#define PMC_OCR_CAL4 (0x7f << 0) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 4 Mhz */ +#define PMC_OCR_SEL4 (0x1 << 7) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 4 Mhz */ +#define PMC_OCR_CAL8 (0x7f << 8) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 8 Mhz */ +#define PMC_OCR_SEL8 (0x1 << 15) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 8 Mhz */ +#define PMC_OCR_CAL12 (0x7f << 16) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 12 Mhz */ +#define PMC_OCR_SEL12 (0x1 << 23) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 12 Mhz */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_PWM Pulse Width Modulation Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief PwmCh_num hardware registers */ +typedef struct { + RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ + RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ + RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ + RwReg PWM_CPDR; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ + RwReg PWM_CPDRUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ + RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ + RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ + RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ +} PwmCh_num; +/** \brief Pwm hardware registers */ +typedef struct { + RwReg PWM_CLK; /**< \brief (Pwm Offset: 0x00) PWM Clock Register */ + WoReg PWM_ENA; /**< \brief (Pwm Offset: 0x04) PWM Enable Register */ + WoReg PWM_DIS; /**< \brief (Pwm Offset: 0x08) PWM Disable Register */ + RoReg PWM_SR; /**< \brief (Pwm Offset: 0x0C) PWM Status Register */ + WoReg PWM_IER1; /**< \brief (Pwm Offset: 0x10) PWM Interrupt Enable Register 1 */ + WoReg PWM_IDR1; /**< \brief (Pwm Offset: 0x14) PWM Interrupt Disable Register 1 */ + RoReg PWM_IMR1; /**< \brief (Pwm Offset: 0x18) PWM Interrupt Mask Register 1 */ + RoReg PWM_ISR1; /**< \brief (Pwm Offset: 0x1C) PWM Interrupt Status Register 1 */ + RwReg PWM_SCM; /**< \brief (Pwm Offset: 0x20) PWM Sync Channels Mode Register */ + RwReg Reserved1[1]; + RwReg PWM_SCUC; /**< \brief (Pwm Offset: 0x28) PWM Sync Channels Update Control Register */ + RwReg PWM_SCUP; /**< \brief (Pwm Offset: 0x2C) PWM Sync Channels Update Period Register */ + WoReg PWM_SCUPUPD; /**< \brief (Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register */ + WoReg PWM_IER2; /**< \brief (Pwm Offset: 0x34) PWM Interrupt Enable Register 2 */ + WoReg PWM_IDR2; /**< \brief (Pwm Offset: 0x38) PWM Interrupt Disable Register 2 */ + RoReg PWM_IMR2; /**< \brief (Pwm Offset: 0x3C) PWM Interrupt Mask Register 2 */ + RoReg PWM_ISR2; /**< \brief (Pwm Offset: 0x40) PWM Interrupt Status Register 2 */ + RwReg PWM_OOV; /**< \brief (Pwm Offset: 0x44) PWM Output Override Value Register */ + RwReg PWM_OS; /**< \brief (Pwm Offset: 0x48) PWM Output Selection Register */ + WoReg PWM_OSS; /**< \brief (Pwm Offset: 0x4C) PWM Output Selection Set Register */ + WoReg PWM_OSC; /**< \brief (Pwm Offset: 0x50) PWM Output Selection Clear Register */ + WoReg PWM_OSSUPD; /**< \brief (Pwm Offset: 0x54) PWM Output Selection Set Update Register */ + WoReg PWM_OSCUPD; /**< \brief (Pwm Offset: 0x58) PWM Output Selection Clear Update Register */ + RwReg PWM_FMR; /**< \brief (Pwm Offset: 0x5C) PWM Fault Mode Register */ + RoReg PWM_FSR; /**< \brief (Pwm Offset: 0x60) PWM Fault Status Register */ + WoReg PWM_FCR; /**< \brief (Pwm Offset: 0x64) PWM Fault Clear Register */ + RwReg PWM_FPV; /**< \brief (Pwm Offset: 0x68) PWM Fault Protection Value Register */ + RwReg PWM_FPE; /**< \brief (Pwm Offset: 0x6C) PWM Fault Protection Enable Register */ + RwReg Reserved2[3]; + RwReg PWM_ELxMR[2]; /**< \brief (Pwm Offset: 0x7C) PWM Event Line 0 Mode Register */ + RwReg Reserved3[11]; + RwReg PWM_SMMR; /**< \brief (Pwm Offset: 0xB0) PWM Stepper Motor Mode Register */ + RwReg Reserved4[12]; + WoReg PWM_WPCR; /**< \brief (Pwm Offset: 0xE4) PWM Write Protect Control Register */ + RoReg PWM_WPSR; /**< \brief (Pwm Offset: 0xE8) PWM Write Protect Status Register */ + RwReg Reserved5[5]; + RwReg PWM_RPR; /**< \brief (Pwm Offset: 0x100) Receive Pointer Register */ + RwReg PWM_RCR; /**< \brief (Pwm Offset: 0x104) Receive Counter Register */ + RwReg PWM_TPR; /**< \brief (Pwm Offset: 0x108) Transmit Pointer Register */ + RwReg PWM_TCR; /**< \brief (Pwm Offset: 0x10C) Transmit Counter Register */ + RwReg PWM_RNPR; /**< \brief (Pwm Offset: 0x110) Receive Next Pointer Register */ + RwReg PWM_RNCR; /**< \brief (Pwm Offset: 0x114) Receive Next Counter Register */ + RwReg PWM_TNPR; /**< \brief (Pwm Offset: 0x118) Transmit Next Pointer Register */ + RwReg PWM_TNCR; /**< \brief (Pwm Offset: 0x11C) Transmit Next Counter Register */ + WoReg PWM_PTCR; /**< \brief (Pwm Offset: 0x120) Transfer Control Register */ + RoReg PWM_PTSR; /**< \brief (Pwm Offset: 0x124) Transfer Status Register */ + RwReg Reserved6[2]; + RwReg PWM_CMP0V; /**< \brief (Pwm Offset: 0x130) PWM Comparison 0 Value Register */ + WoReg PWM_CMP0VUPD; /**< \brief (Pwm Offset: 0x134) PWM Comparison 0 Value Update Register */ + RwReg PWM_CMP0M; /**< \brief (Pwm Offset: 0x138) PWM Comparison 0 Mode Register */ + WoReg PWM_CMP0MUPD; /**< \brief (Pwm Offset: 0x13C) PWM Comparison 0 Mode Update Register */ + RwReg PWM_CMP1V; /**< \brief (Pwm Offset: 0x140) PWM Comparison 1 Value Register */ + WoReg PWM_CMP1VUPD; /**< \brief (Pwm Offset: 0x144) PWM Comparison 1 Value Update Register */ + RwReg PWM_CMP1M; /**< \brief (Pwm Offset: 0x148) PWM Comparison 1 Mode Register */ + WoReg PWM_CMP1MUPD; /**< \brief (Pwm Offset: 0x14C) PWM Comparison 1 Mode Update Register */ + RwReg PWM_CMP2V; /**< \brief (Pwm Offset: 0x150) PWM Comparison 2 Value Register */ + WoReg PWM_CMP2VUPD; /**< \brief (Pwm Offset: 0x154) PWM Comparison 2 Value Update Register */ + RwReg PWM_CMP2M; /**< \brief (Pwm Offset: 0x158) PWM Comparison 2 Mode Register */ + WoReg PWM_CMP2MUPD; /**< \brief (Pwm Offset: 0x15C) PWM Comparison 2 Mode Update Register */ + RwReg PWM_CMP3V; /**< \brief (Pwm Offset: 0x160) PWM Comparison 3 Value Register */ + WoReg PWM_CMP3VUPD; /**< \brief (Pwm Offset: 0x164) PWM Comparison 3 Value Update Register */ + RwReg PWM_CMP3M; /**< \brief (Pwm Offset: 0x168) PWM Comparison 3 Mode Register */ + WoReg PWM_CMP3MUPD; /**< \brief (Pwm Offset: 0x16C) PWM Comparison 3 Mode Update Register */ + RwReg PWM_CMP4V; /**< \brief (Pwm Offset: 0x170) PWM Comparison 4 Value Register */ + WoReg PWM_CMP4VUPD; /**< \brief (Pwm Offset: 0x174) PWM Comparison 4 Value Update Register */ + RwReg PWM_CMP4M; /**< \brief (Pwm Offset: 0x178) PWM Comparison 4 Mode Register */ + WoReg PWM_CMP4MUPD; /**< \brief (Pwm Offset: 0x17C) PWM Comparison 4 Mode Update Register */ + RwReg PWM_CMP5V; /**< \brief (Pwm Offset: 0x180) PWM Comparison 5 Value Register */ + WoReg PWM_CMP5VUPD; /**< \brief (Pwm Offset: 0x184) PWM Comparison 5 Value Update Register */ + RwReg PWM_CMP5M; /**< \brief (Pwm Offset: 0x188) PWM Comparison 5 Mode Register */ + WoReg PWM_CMP5MUPD; /**< \brief (Pwm Offset: 0x18C) PWM Comparison 5 Mode Update Register */ + RwReg PWM_CMP6V; /**< \brief (Pwm Offset: 0x190) PWM Comparison 6 Value Register */ + WoReg PWM_CMP6VUPD; /**< \brief (Pwm Offset: 0x194) PWM Comparison 6 Value Update Register */ + RwReg PWM_CMP6M; /**< \brief (Pwm Offset: 0x198) PWM Comparison 6 Mode Register */ + WoReg PWM_CMP6MUPD; /**< \brief (Pwm Offset: 0x19C) PWM Comparison 6 Mode Update Register */ + RwReg PWM_CMP7V; /**< \brief (Pwm Offset: 0x1A0) PWM Comparison 7 Value Register */ + WoReg PWM_CMP7VUPD; /**< \brief (Pwm Offset: 0x1A4) PWM Comparison 7 Value Update Register */ + RwReg PWM_CMP7M; /**< \brief (Pwm Offset: 0x1A8) PWM Comparison 7 Mode Register */ + WoReg PWM_CMP7MUPD; /**< \brief (Pwm Offset: 0x1AC) PWM Comparison 7 Mode Update Register */ + RwReg Reserved7[20]; + PwmCh_num PWM_CH_NUM[4]; /**< \brief (Pwm Offset: 0x200) ch_num = 0 .. 3 */ +} Pwm; +#endif /* __ASSEMBLY__ */ +/* -------- PWM_CLK : (PWM Offset: 0x00) PWM Clock Register -------- */ +#define PWM_CLK_DIVA (0xff << 0) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ +#define PWM_CLK_PREA (0xf << 8) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ +#define PWM_CLK_DIVB (0xff << 16) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ +#define PWM_CLK_PREB (0xf << 24) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ +/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ +#define PWM_ENA_CHID0 (0x1 << 0) /**< \brief (PWM_ENA) Channel ID */ +#define PWM_ENA_CHID1 (0x1 << 1) /**< \brief (PWM_ENA) Channel ID */ +#define PWM_ENA_CHID2 (0x1 << 2) /**< \brief (PWM_ENA) Channel ID */ +#define PWM_ENA_CHID3 (0x1 << 3) /**< \brief (PWM_ENA) Channel ID */ +/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ +#define PWM_DIS_CHID0 (0x1 << 0) /**< \brief (PWM_DIS) Channel ID */ +#define PWM_DIS_CHID1 (0x1 << 1) /**< \brief (PWM_DIS) Channel ID */ +#define PWM_DIS_CHID2 (0x1 << 2) /**< \brief (PWM_DIS) Channel ID */ +#define PWM_DIS_CHID3 (0x1 << 3) /**< \brief (PWM_DIS) Channel ID */ +/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ +#define PWM_SR_CHID0 (0x1 << 0) /**< \brief (PWM_SR) Channel ID */ +#define PWM_SR_CHID1 (0x1 << 1) /**< \brief (PWM_SR) Channel ID */ +#define PWM_SR_CHID2 (0x1 << 2) /**< \brief (PWM_SR) Channel ID */ +#define PWM_SR_CHID3 (0x1 << 3) /**< \brief (PWM_SR) Channel ID */ +/* -------- PWM_IER1 : (PWM Offset: 0x10) PWM Interrupt Enable Register 1 -------- */ +#define PWM_IER1_CHID0 (0x1 << 0) /**< \brief (PWM_IER1) Counter Event on Channel 0 Interrupt Enable */ +#define PWM_IER1_CHID1 (0x1 << 1) /**< \brief (PWM_IER1) Counter Event on Channel 1 Interrupt Enable */ +#define PWM_IER1_CHID2 (0x1 << 2) /**< \brief (PWM_IER1) Counter Event on Channel 2 Interrupt Enable */ +#define PWM_IER1_CHID3 (0x1 << 3) /**< \brief (PWM_IER1) Counter Event on Channel 3 Interrupt Enable */ +#define PWM_IER1_FCHID0 (0x1 << 16) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 0 Interrupt Enable */ +#define PWM_IER1_FCHID1 (0x1 << 17) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 1 Interrupt Enable */ +#define PWM_IER1_FCHID2 (0x1 << 18) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 2 Interrupt Enable */ +#define PWM_IER1_FCHID3 (0x1 << 19) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 3 Interrupt Enable */ +/* -------- PWM_IDR1 : (PWM Offset: 0x14) PWM Interrupt Disable Register 1 -------- */ +#define PWM_IDR1_CHID0 (0x1 << 0) /**< \brief (PWM_IDR1) Counter Event on Channel 0 Interrupt Disable */ +#define PWM_IDR1_CHID1 (0x1 << 1) /**< \brief (PWM_IDR1) Counter Event on Channel 1 Interrupt Disable */ +#define PWM_IDR1_CHID2 (0x1 << 2) /**< \brief (PWM_IDR1) Counter Event on Channel 2 Interrupt Disable */ +#define PWM_IDR1_CHID3 (0x1 << 3) /**< \brief (PWM_IDR1) Counter Event on Channel 3 Interrupt Disable */ +#define PWM_IDR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 0 Interrupt Disable */ +#define PWM_IDR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 1 Interrupt Disable */ +#define PWM_IDR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 2 Interrupt Disable */ +#define PWM_IDR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 3 Interrupt Disable */ +/* -------- PWM_IMR1 : (PWM Offset: 0x18) PWM Interrupt Mask Register 1 -------- */ +#define PWM_IMR1_CHID0 (0x1 << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask */ +#define PWM_IMR1_CHID1 (0x1 << 1) /**< \brief (PWM_IMR1) Counter Event on Channel 1 Interrupt Mask */ +#define PWM_IMR1_CHID2 (0x1 << 2) /**< \brief (PWM_IMR1) Counter Event on Channel 2 Interrupt Mask */ +#define PWM_IMR1_CHID3 (0x1 << 3) /**< \brief (PWM_IMR1) Counter Event on Channel 3 Interrupt Mask */ +#define PWM_IMR1_FCHID0 (0x1 << 16) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 0 Interrupt Mask */ +#define PWM_IMR1_FCHID1 (0x1 << 17) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 1 Interrupt Mask */ +#define PWM_IMR1_FCHID2 (0x1 << 18) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 2 Interrupt Mask */ +#define PWM_IMR1_FCHID3 (0x1 << 19) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 3 Interrupt Mask */ +/* -------- PWM_ISR1 : (PWM Offset: 0x1C) PWM Interrupt Status Register 1 -------- */ +#define PWM_ISR1_CHID0 (0x1 << 0) /**< \brief (PWM_ISR1) Counter Event on Channel 0 */ +#define PWM_ISR1_CHID1 (0x1 << 1) /**< \brief (PWM_ISR1) Counter Event on Channel 1 */ +#define PWM_ISR1_CHID2 (0x1 << 2) /**< \brief (PWM_ISR1) Counter Event on Channel 2 */ +#define PWM_ISR1_CHID3 (0x1 << 3) /**< \brief (PWM_ISR1) Counter Event on Channel 3 */ +#define PWM_ISR1_FCHID0 (0x1 << 16) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 0 */ +#define PWM_ISR1_FCHID1 (0x1 << 17) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 1 */ +#define PWM_ISR1_FCHID2 (0x1 << 18) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 2 */ +#define PWM_ISR1_FCHID3 (0x1 << 19) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 3 */ +/* -------- PWM_SCM : (PWM Offset: 0x20) PWM Sync Channels Mode Register -------- */ +#define PWM_SCM_SYNC0 (0x1 << 0) /**< \brief (PWM_SCM) Synchronous Channel 0 */ +#define PWM_SCM_SYNC1 (0x1 << 1) /**< \brief (PWM_SCM) Synchronous Channel 1 */ +#define PWM_SCM_SYNC2 (0x1 << 2) /**< \brief (PWM_SCM) Synchronous Channel 2 */ +#define PWM_SCM_SYNC3 (0x1 << 3) /**< \brief (PWM_SCM) Synchronous Channel 3 */ +#define PWM_SCM_UPDM (0x3 << 16) /**< \brief (PWM_SCM) Synchronous Channels Update Mode */ +#define PWM_SCM_PTRM (0x1 << 20) /**< \brief (PWM_SCM) PDC Transfer Request Mode */ +#define PWM_SCM_PTRCS (0x7 << 21) /**< \brief (PWM_SCM) PDC Transfer Request Comparison Selection */ +/* -------- PWM_SCUC : (PWM Offset: 0x28) PWM Sync Channels Update Control Register -------- */ +#define PWM_SCUC_UPDULOCK (0x1 << 0) /**< \brief (PWM_SCUC) Synchronous Channels Update Unlock */ +/* -------- PWM_SCUP : (PWM Offset: 0x2C) PWM Sync Channels Update Period Register -------- */ +#define PWM_SCUP_UPR (0xf << 0) /**< \brief (PWM_SCUP) Update Period */ +#define PWM_SCUP_UPRCNT (0xf << 4) /**< \brief (PWM_SCUP) Update Period Counter */ +/* -------- PWM_SCUPUPD : (PWM Offset: 0x30) PWM Sync Channels Update Period Update Register -------- */ +#define PWM_SCUPUPD_UPRUPD (0xf << 0) /**< \brief (PWM_SCUPUPD) Update Period Update */ +/* -------- PWM_IER2 : (PWM Offset: 0x34) PWM Interrupt Enable Register 2 -------- */ +#define PWM_IER2_WRDY (0x1 << 0) /**< \brief (PWM_IER2) Write Ready for Synchronous Channels Update Interrupt Enable */ +#define PWM_IER2_ENDTX (0x1 << 1) /**< \brief (PWM_IER2) PDC End of TX Buffer Interrupt Enable */ +#define PWM_IER2_TXBUFE (0x1 << 2) /**< \brief (PWM_IER2) PDC TX Buffer Empty Interrupt Enable */ +#define PWM_IER2_UNRE (0x1 << 3) /**< \brief (PWM_IER2) Synchronous Channels Update Underrun Error Interrupt Enable */ +#define PWM_IER2_CMPM0 (0x1 << 8) /**< \brief (PWM_IER2) Comparison 0 Match Interrupt Enable */ +#define PWM_IER2_CMPM1 (0x1 << 9) /**< \brief (PWM_IER2) Comparison 1 Match Interrupt Enable */ +#define PWM_IER2_CMPM2 (0x1 << 10) /**< \brief (PWM_IER2) Comparison 2 Match Interrupt Enable */ +#define PWM_IER2_CMPM3 (0x1 << 11) /**< \brief (PWM_IER2) Comparison 3 Match Interrupt Enable */ +#define PWM_IER2_CMPM4 (0x1 << 12) /**< \brief (PWM_IER2) Comparison 4 Match Interrupt Enable */ +#define PWM_IER2_CMPM5 (0x1 << 13) /**< \brief (PWM_IER2) Comparison 5 Match Interrupt Enable */ +#define PWM_IER2_CMPM6 (0x1 << 14) /**< \brief (PWM_IER2) Comparison 6 Match Interrupt Enable */ +#define PWM_IER2_CMPM7 (0x1 << 15) /**< \brief (PWM_IER2) Comparison 7 Match Interrupt Enable */ +#define PWM_IER2_CMPU0 (0x1 << 16) /**< \brief (PWM_IER2) Comparison 0 Update Interrupt Enable */ +#define PWM_IER2_CMPU1 (0x1 << 17) /**< \brief (PWM_IER2) Comparison 1 Update Interrupt Enable */ +#define PWM_IER2_CMPU2 (0x1 << 18) /**< \brief (PWM_IER2) Comparison 2 Update Interrupt Enable */ +#define PWM_IER2_CMPU3 (0x1 << 19) /**< \brief (PWM_IER2) Comparison 3 Update Interrupt Enable */ +#define PWM_IER2_CMPU4 (0x1 << 20) /**< \brief (PWM_IER2) Comparison 4 Update Interrupt Enable */ +#define PWM_IER2_CMPU5 (0x1 << 21) /**< \brief (PWM_IER2) Comparison 5 Update Interrupt Enable */ +#define PWM_IER2_CMPU6 (0x1 << 22) /**< \brief (PWM_IER2) Comparison 6 Update Interrupt Enable */ +#define PWM_IER2_CMPU7 (0x1 << 23) /**< \brief (PWM_IER2) Comparison 7 Update Interrupt Enable */ +/* -------- PWM_IDR2 : (PWM Offset: 0x38) PWM Interrupt Disable Register 2 -------- */ +#define PWM_IDR2_WRDY (0x1 << 0) /**< \brief (PWM_IDR2) Write Ready for Synchronous Channels Update Interrupt Disable */ +#define PWM_IDR2_ENDTX (0x1 << 1) /**< \brief (PWM_IDR2) PDC End of TX Buffer Interrupt Disable */ +#define PWM_IDR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IDR2) PDC TX Buffer Empty Interrupt Disable */ +#define PWM_IDR2_UNRE (0x1 << 3) /**< \brief (PWM_IDR2) Synchronous Channels Update Underrun Error Interrupt Disable */ +#define PWM_IDR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IDR2) Comparison 0 Match Interrupt Disable */ +#define PWM_IDR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IDR2) Comparison 1 Match Interrupt Disable */ +#define PWM_IDR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IDR2) Comparison 2 Match Interrupt Disable */ +#define PWM_IDR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IDR2) Comparison 3 Match Interrupt Disable */ +#define PWM_IDR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IDR2) Comparison 4 Match Interrupt Disable */ +#define PWM_IDR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IDR2) Comparison 5 Match Interrupt Disable */ +#define PWM_IDR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IDR2) Comparison 6 Match Interrupt Disable */ +#define PWM_IDR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IDR2) Comparison 7 Match Interrupt Disable */ +#define PWM_IDR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IDR2) Comparison 0 Update Interrupt Disable */ +#define PWM_IDR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IDR2) Comparison 1 Update Interrupt Disable */ +#define PWM_IDR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IDR2) Comparison 2 Update Interrupt Disable */ +#define PWM_IDR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IDR2) Comparison 3 Update Interrupt Disable */ +#define PWM_IDR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IDR2) Comparison 4 Update Interrupt Disable */ +#define PWM_IDR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IDR2) Comparison 5 Update Interrupt Disable */ +#define PWM_IDR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IDR2) Comparison 6 Update Interrupt Disable */ +#define PWM_IDR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IDR2) Comparison 7 Update Interrupt Disable */ +/* -------- PWM_IMR2 : (PWM Offset: 0x3C) PWM Interrupt Mask Register 2 -------- */ +#define PWM_IMR2_WRDY (0x1 << 0) /**< \brief (PWM_IMR2) Write Ready for Synchronous Channels Update Interrupt Mask */ +#define PWM_IMR2_ENDTX (0x1 << 1) /**< \brief (PWM_IMR2) PDC End of TX Buffer Interrupt Mask */ +#define PWM_IMR2_TXBUFE (0x1 << 2) /**< \brief (PWM_IMR2) PDC TX Buffer Empty Interrupt Mask */ +#define PWM_IMR2_UNRE (0x1 << 3) /**< \brief (PWM_IMR2) Synchronous Channels Update Underrun Error Interrupt Mask */ +#define PWM_IMR2_CMPM0 (0x1 << 8) /**< \brief (PWM_IMR2) Comparison 0 Match Interrupt Mask */ +#define PWM_IMR2_CMPM1 (0x1 << 9) /**< \brief (PWM_IMR2) Comparison 1 Match Interrupt Mask */ +#define PWM_IMR2_CMPM2 (0x1 << 10) /**< \brief (PWM_IMR2) Comparison 2 Match Interrupt Mask */ +#define PWM_IMR2_CMPM3 (0x1 << 11) /**< \brief (PWM_IMR2) Comparison 3 Match Interrupt Mask */ +#define PWM_IMR2_CMPM4 (0x1 << 12) /**< \brief (PWM_IMR2) Comparison 4 Match Interrupt Mask */ +#define PWM_IMR2_CMPM5 (0x1 << 13) /**< \brief (PWM_IMR2) Comparison 5 Match Interrupt Mask */ +#define PWM_IMR2_CMPM6 (0x1 << 14) /**< \brief (PWM_IMR2) Comparison 6 Match Interrupt Mask */ +#define PWM_IMR2_CMPM7 (0x1 << 15) /**< \brief (PWM_IMR2) Comparison 7 Match Interrupt Mask */ +#define PWM_IMR2_CMPU0 (0x1 << 16) /**< \brief (PWM_IMR2) Comparison 0 Update Interrupt Mask */ +#define PWM_IMR2_CMPU1 (0x1 << 17) /**< \brief (PWM_IMR2) Comparison 1 Update Interrupt Mask */ +#define PWM_IMR2_CMPU2 (0x1 << 18) /**< \brief (PWM_IMR2) Comparison 2 Update Interrupt Mask */ +#define PWM_IMR2_CMPU3 (0x1 << 19) /**< \brief (PWM_IMR2) Comparison 3 Update Interrupt Mask */ +#define PWM_IMR2_CMPU4 (0x1 << 20) /**< \brief (PWM_IMR2) Comparison 4 Update Interrupt Mask */ +#define PWM_IMR2_CMPU5 (0x1 << 21) /**< \brief (PWM_IMR2) Comparison 5 Update Interrupt Mask */ +#define PWM_IMR2_CMPU6 (0x1 << 22) /**< \brief (PWM_IMR2) Comparison 6 Update Interrupt Mask */ +#define PWM_IMR2_CMPU7 (0x1 << 23) /**< \brief (PWM_IMR2) Comparison 7 Update Interrupt Mask */ +/* -------- PWM_ISR2 : (PWM Offset: 0x40) PWM Interrupt Status Register 2 -------- */ +#define PWM_ISR2_WRDY (0x1 << 0) /**< \brief (PWM_ISR2) Write Ready for Synchronous Channels Update */ +#define PWM_ISR2_ENDTX (0x1 << 1) /**< \brief (PWM_ISR2) PDC End of TX Buffer */ +#define PWM_ISR2_TXBUFE (0x1 << 2) /**< \brief (PWM_ISR2) PDC TX Buffer Empty */ +#define PWM_ISR2_UNRE (0x1 << 3) /**< \brief (PWM_ISR2) Synchronous Channels Update Underrun Error */ +#define PWM_ISR2_CMPM0 (0x1 << 8) /**< \brief (PWM_ISR2) Comparison 0 Match */ +#define PWM_ISR2_CMPM1 (0x1 << 9) /**< \brief (PWM_ISR2) Comparison 1 Match */ +#define PWM_ISR2_CMPM2 (0x1 << 10) /**< \brief (PWM_ISR2) Comparison 2 Match */ +#define PWM_ISR2_CMPM3 (0x1 << 11) /**< \brief (PWM_ISR2) Comparison 3 Match */ +#define PWM_ISR2_CMPM4 (0x1 << 12) /**< \brief (PWM_ISR2) Comparison 4 Match */ +#define PWM_ISR2_CMPM5 (0x1 << 13) /**< \brief (PWM_ISR2) Comparison 5 Match */ +#define PWM_ISR2_CMPM6 (0x1 << 14) /**< \brief (PWM_ISR2) Comparison 6 Match */ +#define PWM_ISR2_CMPM7 (0x1 << 15) /**< \brief (PWM_ISR2) Comparison 7 Match */ +#define PWM_ISR2_CMPU0 (0x1 << 16) /**< \brief (PWM_ISR2) Comparison 0 Update */ +#define PWM_ISR2_CMPU1 (0x1 << 17) /**< \brief (PWM_ISR2) Comparison 1 Update */ +#define PWM_ISR2_CMPU2 (0x1 << 18) /**< \brief (PWM_ISR2) Comparison 2 Update */ +#define PWM_ISR2_CMPU3 (0x1 << 19) /**< \brief (PWM_ISR2) Comparison 3 Update */ +#define PWM_ISR2_CMPU4 (0x1 << 20) /**< \brief (PWM_ISR2) Comparison 4 Update */ +#define PWM_ISR2_CMPU5 (0x1 << 21) /**< \brief (PWM_ISR2) Comparison 5 Update */ +#define PWM_ISR2_CMPU6 (0x1 << 22) /**< \brief (PWM_ISR2) Comparison 6 Update */ +#define PWM_ISR2_CMPU7 (0x1 << 23) /**< \brief (PWM_ISR2) Comparison 7 Update */ +/* -------- PWM_OOV : (PWM Offset: 0x44) PWM Output Override Value Register -------- */ +#define PWM_OOV_OOVH0 (0x1 << 0) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 0 */ +#define PWM_OOV_OOVH1 (0x1 << 1) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 1 */ +#define PWM_OOV_OOVH2 (0x1 << 2) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 2 */ +#define PWM_OOV_OOVH3 (0x1 << 3) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 3 */ +#define PWM_OOV_OOVL0 (0x1 << 16) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 0 */ +#define PWM_OOV_OOVL1 (0x1 << 17) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 1 */ +#define PWM_OOV_OOVL2 (0x1 << 18) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 2 */ +#define PWM_OOV_OOVL3 (0x1 << 19) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 3 */ +/* -------- PWM_OS : (PWM Offset: 0x48) PWM Output Selection Register -------- */ +#define PWM_OS_OSH0 (0x1 << 0) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 0 */ +#define PWM_OS_OSH1 (0x1 << 1) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 1 */ +#define PWM_OS_OSH2 (0x1 << 2) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 2 */ +#define PWM_OS_OSH3 (0x1 << 3) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 3 */ +#define PWM_OS_OSL0 (0x1 << 16) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 0 */ +#define PWM_OS_OSL1 (0x1 << 17) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 1 */ +#define PWM_OS_OSL2 (0x1 << 18) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 2 */ +#define PWM_OS_OSL3 (0x1 << 19) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 3 */ +/* -------- PWM_OSS : (PWM Offset: 0x4C) PWM Output Selection Set Register -------- */ +#define PWM_OSS_OSSH0 (0x1 << 0) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 0 */ +#define PWM_OSS_OSSH1 (0x1 << 1) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 1 */ +#define PWM_OSS_OSSH2 (0x1 << 2) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 2 */ +#define PWM_OSS_OSSH3 (0x1 << 3) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 3 */ +#define PWM_OSS_OSSL0 (0x1 << 16) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 0 */ +#define PWM_OSS_OSSL1 (0x1 << 17) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 1 */ +#define PWM_OSS_OSSL2 (0x1 << 18) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 2 */ +#define PWM_OSS_OSSL3 (0x1 << 19) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 3 */ +/* -------- PWM_OSC : (PWM Offset: 0x50) PWM Output Selection Clear Register -------- */ +#define PWM_OSC_OSCH0 (0x1 << 0) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 0 */ +#define PWM_OSC_OSCH1 (0x1 << 1) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 1 */ +#define PWM_OSC_OSCH2 (0x1 << 2) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 2 */ +#define PWM_OSC_OSCH3 (0x1 << 3) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 3 */ +#define PWM_OSC_OSCL0 (0x1 << 16) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 0 */ +#define PWM_OSC_OSCL1 (0x1 << 17) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 1 */ +#define PWM_OSC_OSCL2 (0x1 << 18) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 2 */ +#define PWM_OSC_OSCL3 (0x1 << 19) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 3 */ +/* -------- PWM_OSSUPD : (PWM Offset: 0x54) PWM Output Selection Set Update Register -------- */ +#define PWM_OSSUPD_OSSUPH0 (0x1 << 0) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 0 */ +#define PWM_OSSUPD_OSSUPH1 (0x1 << 1) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 1 */ +#define PWM_OSSUPD_OSSUPH2 (0x1 << 2) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 2 */ +#define PWM_OSSUPD_OSSUPH3 (0x1 << 3) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 3 */ +#define PWM_OSSUPD_OSSUPL0 (0x1 << 16) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 0 */ +#define PWM_OSSUPD_OSSUPL1 (0x1 << 17) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 1 */ +#define PWM_OSSUPD_OSSUPL2 (0x1 << 18) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 2 */ +#define PWM_OSSUPD_OSSUPL3 (0x1 << 19) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 3 */ +/* -------- PWM_OSCUPD : (PWM Offset: 0x58) PWM Output Selection Clear Update Register -------- */ +#define PWM_OSCUPD_OSCUPH0 (0x1 << 0) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 0 */ +#define PWM_OSCUPD_OSCUPH1 (0x1 << 1) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 1 */ +#define PWM_OSCUPD_OSCUPH2 (0x1 << 2) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 2 */ +#define PWM_OSCUPD_OSCUPH3 (0x1 << 3) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 3 */ +#define PWM_OSCUPD_OSCUPL0 (0x1 << 16) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 0 */ +#define PWM_OSCUPD_OSCUPL1 (0x1 << 17) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 1 */ +#define PWM_OSCUPD_OSCUPL2 (0x1 << 18) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 2 */ +#define PWM_OSCUPD_OSCUPL3 (0x1 << 19) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 3 */ +/* -------- PWM_FMR : (PWM Offset: 0x5C) PWM Fault Mode Register -------- */ +#define PWM_FMR_FPOL0 (0x1 << 0) /**< \brief (PWM_FMR) Fault 0 Polarity */ +#define PWM_FMR_FPOL1 (0x1 << 1) /**< \brief (PWM_FMR) Fault 1 Polarity */ +#define PWM_FMR_FPOL2 (0x1 << 2) /**< \brief (PWM_FMR) Fault 2 Polarity */ +#define PWM_FMR_FPOL3 (0x1 << 3) /**< \brief (PWM_FMR) Fault 3 Polarity */ +#define PWM_FMR_FMOD0 (0x1 << 8) /**< \brief (PWM_FMR) Fault 0 Activation Mode */ +#define PWM_FMR_FMOD1 (0x1 << 9) /**< \brief (PWM_FMR) Fault 1 Activation Mode */ +#define PWM_FMR_FMOD2 (0x1 << 10) /**< \brief (PWM_FMR) Fault 2 Activation Mode */ +#define PWM_FMR_FMOD3 (0x1 << 11) /**< \brief (PWM_FMR) Fault 3 Activation Mode */ +#define PWM_FMR_FFIL0 (0x1 << 16) /**< \brief (PWM_FMR) Fault 0 Filtering */ +#define PWM_FMR_FFIL1 (0x1 << 17) /**< \brief (PWM_FMR) Fault 1 Filtering */ +#define PWM_FMR_FFIL2 (0x1 << 18) /**< \brief (PWM_FMR) Fault 2 Filtering */ +#define PWM_FMR_FFIL3 (0x1 << 19) /**< \brief (PWM_FMR) Fault 3 Filtering */ +/* -------- PWM_FSR : (PWM Offset: 0x60) PWM Fault Status Register -------- */ +#define PWM_FSR_FIV0 (0x1 << 0) /**< \brief (PWM_FSR) Fault Input 0 Value */ +#define PWM_FSR_FIV1 (0x1 << 1) /**< \brief (PWM_FSR) Fault Input 1 Value */ +#define PWM_FSR_FIV2 (0x1 << 2) /**< \brief (PWM_FSR) Fault Input 2 Value */ +#define PWM_FSR_FIV3 (0x1 << 3) /**< \brief (PWM_FSR) Fault Input 3 Value */ +#define PWM_FSR_FS0 (0x1 << 8) /**< \brief (PWM_FSR) Fault 0 Status */ +#define PWM_FSR_FS1 (0x1 << 9) /**< \brief (PWM_FSR) Fault 1 Status */ +#define PWM_FSR_FS2 (0x1 << 10) /**< \brief (PWM_FSR) Fault 2 Status */ +#define PWM_FSR_FS3 (0x1 << 11) /**< \brief (PWM_FSR) Fault 3 Status */ +/* -------- PWM_FCR : (PWM Offset: 0x64) PWM Fault Clear Register -------- */ +#define PWM_FCR_FCLR0 (0x1 << 0) /**< \brief (PWM_FCR) Fault 0 Clear */ +#define PWM_FCR_FCLR1 (0x1 << 1) /**< \brief (PWM_FCR) Fault 1 Clear */ +#define PWM_FCR_FCLR2 (0x1 << 2) /**< \brief (PWM_FCR) Fault 2 Clear */ +#define PWM_FCR_FCLR3 (0x1 << 3) /**< \brief (PWM_FCR) Fault 3 Clear */ +/* -------- PWM_FPV : (PWM Offset: 0x68) PWM Fault Protection Value Register -------- */ +#define PWM_FPV_FPVH0 (0x1 << 0) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 0 */ +#define PWM_FPV_FPVH1 (0x1 << 1) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 1 */ +#define PWM_FPV_FPVH2 (0x1 << 2) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 2 */ +#define PWM_FPV_FPVH3 (0x1 << 3) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 3 */ +#define PWM_FPV_FPVL0 (0x1 << 16) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 0 */ +#define PWM_FPV_FPVL1 (0x1 << 17) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 1 */ +#define PWM_FPV_FPVL2 (0x1 << 18) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 2 */ +#define PWM_FPV_FPVL3 (0x1 << 19) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 3 */ +/* -------- PWM_FPE : (PWM Offset: 0x6C) PWM Fault Protection Enable Register -------- */ +#define PWM_FPE_FPE0 (0xff << 0) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 0 for channel x */ +#define PWM_FPE_FPE1 (0xff << 8) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 1 for channel x */ +#define PWM_FPE_FPE2 (0xff << 16) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 2 for channel x */ +#define PWM_FPE_FPE3 (0xff << 24) /**< \brief (PWM_FPE) Fault Protection Enable with Fault 3 for channel x */ +/* -------- PWM_ELxMR[2] : (PWM Offset: 0x7C) PWM Event Line 0 Mode Register -------- */ +#define PWM_ELxMR_CSEL0 (0x1 << 0) /**< \brief (PWM_ELxMR[2]) Comparison 0 Selection */ +#define PWM_ELxMR_CSEL1 (0x1 << 1) /**< \brief (PWM_ELxMR[2]) Comparison 1 Selection */ +#define PWM_ELxMR_CSEL2 (0x1 << 2) /**< \brief (PWM_ELxMR[2]) Comparison 2 Selection */ +#define PWM_ELxMR_CSEL3 (0x1 << 3) /**< \brief (PWM_ELxMR[2]) Comparison 3 Selection */ +#define PWM_ELxMR_CSEL4 (0x1 << 4) /**< \brief (PWM_ELxMR[2]) Comparison 4 Selection */ +#define PWM_ELxMR_CSEL5 (0x1 << 5) /**< \brief (PWM_ELxMR[2]) Comparison 5 Selection */ +#define PWM_ELxMR_CSEL6 (0x1 << 6) /**< \brief (PWM_ELxMR[2]) Comparison 6 Selection */ +#define PWM_ELxMR_CSEL7 (0x1 << 7) /**< \brief (PWM_ELxMR[2]) Comparison 7 Selection */ +/* -------- PWM_SMMR : (PWM Offset: 0xB0) PWM Stepper Motor Mode Register -------- */ +#define PWM_SMMR_GCEN0 (0x1 << 0) /**< \brief (PWM_SMMR) Gray Count ENable */ +#define PWM_SMMR_GCEN1 (0x1 << 1) /**< \brief (PWM_SMMR) Gray Count ENable */ +#define PWM_SMMR_DOWN0 (0x1 << 16) /**< \brief (PWM_SMMR) DOWN Count */ +#define PWM_SMMR_DOWN1 (0x1 << 17) /**< \brief (PWM_SMMR) DOWN Count */ +/* -------- PWM_WPCR : (PWM Offset: 0xE4) PWM Write Protect Control Register -------- */ +#define PWM_WPCR_WPCMD (0x3 << 0) /**< \brief (PWM_WPCR) Write Protect Command */ +#define PWM_WPCR_WPRG0 (0x1 << 2) /**< \brief (PWM_WPCR) Write Protect Register Group 0 */ +#define PWM_WPCR_WPRG1 (0x1 << 3) /**< \brief (PWM_WPCR) Write Protect Register Group 1 */ +#define PWM_WPCR_WPRG2 (0x1 << 4) /**< \brief (PWM_WPCR) Write Protect Register Group 2 */ +#define PWM_WPCR_WPRG3 (0x1 << 5) /**< \brief (PWM_WPCR) Write Protect Register Group 3 */ +#define PWM_WPCR_WPRG4 (0x1 << 6) /**< \brief (PWM_WPCR) Write Protect Register Group 4 */ +#define PWM_WPCR_WPRG5 (0x1 << 7) /**< \brief (PWM_WPCR) Write Protect Register Group 5 */ +#define PWM_WPCR_WPKEY (0xffffff << 8) /**< \brief (PWM_WPCR) Write Protect Key */ +/* -------- PWM_WPSR : (PWM Offset: 0xE8) PWM Write Protect Status Register -------- */ +#define PWM_WPSR_WPSWS0 (0x1 << 0) /**< \brief (PWM_WPSR) Write Protect SW Status */ +#define PWM_WPSR_WPSWS1 (0x1 << 1) /**< \brief (PWM_WPSR) Write Protect SW Status */ +#define PWM_WPSR_WPSWS2 (0x1 << 2) /**< \brief (PWM_WPSR) Write Protect SW Status */ +#define PWM_WPSR_WPSWS3 (0x1 << 3) /**< \brief (PWM_WPSR) Write Protect SW Status */ +#define PWM_WPSR_WPSWS4 (0x1 << 4) /**< \brief (PWM_WPSR) Write Protect SW Status */ +#define PWM_WPSR_WPSWS5 (0x1 << 5) /**< \brief (PWM_WPSR) Write Protect SW Status */ +#define PWM_WPSR_WPVS (0x1 << 7) /**< \brief (PWM_WPSR) Write Protect Violation Status */ +#define PWM_WPSR_WPHWS0 (0x1 << 8) /**< \brief (PWM_WPSR) Write Protect HW Status */ +#define PWM_WPSR_WPHWS1 (0x1 << 9) /**< \brief (PWM_WPSR) Write Protect HW Status */ +#define PWM_WPSR_WPHWS2 (0x1 << 10) /**< \brief (PWM_WPSR) Write Protect HW Status */ +#define PWM_WPSR_WPHWS3 (0x1 << 11) /**< \brief (PWM_WPSR) Write Protect HW Status */ +#define PWM_WPSR_WPHWS4 (0x1 << 12) /**< \brief (PWM_WPSR) Write Protect HW Status */ +#define PWM_WPSR_WPHWS5 (0x1 << 13) /**< \brief (PWM_WPSR) Write Protect HW Status */ +#define PWM_WPSR_WPVSRC (0xffff << 16) /**< \brief (PWM_WPSR) Write Protect Violation Source */ +/* -------- PWM_RPR : (PWM Offset: 0x100) Receive Pointer Register -------- */ +#define PWM_RPR_RXPTR (0xffffffff << 0) /**< \brief (PWM_RPR) Receive Pointer Register */ +/* -------- PWM_RCR : (PWM Offset: 0x104) Receive Counter Register -------- */ +#define PWM_RCR_RXCTR (0xffff << 0) /**< \brief (PWM_RCR) Receive Counter Register */ +/* -------- PWM_TPR : (PWM Offset: 0x108) Transmit Pointer Register -------- */ +#define PWM_TPR_TXPTR (0xffffffff << 0) /**< \brief (PWM_TPR) Transmit Counter Register */ +/* -------- PWM_TCR : (PWM Offset: 0x10C) Transmit Counter Register -------- */ +#define PWM_TCR_TXCTR (0xffff << 0) /**< \brief (PWM_TCR) Transmit Counter Register */ +/* -------- PWM_RNPR : (PWM Offset: 0x110) Receive Next Pointer Register -------- */ +#define PWM_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (PWM_RNPR) Receive Next Pointer */ +/* -------- PWM_RNCR : (PWM Offset: 0x114) Receive Next Counter Register -------- */ +#define PWM_RNCR_RXNCTR (0xffff << 0) /**< \brief (PWM_RNCR) Receive Next Counter */ +/* -------- PWM_TNPR : (PWM Offset: 0x118) Transmit Next Pointer Register -------- */ +#define PWM_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (PWM_TNPR) Transmit Next Pointer */ +/* -------- PWM_TNCR : (PWM Offset: 0x11C) Transmit Next Counter Register -------- */ +#define PWM_TNCR_TXNCTR (0xffff << 0) /**< \brief (PWM_TNCR) Transmit Counter Next */ +/* -------- PWM_PTCR : (PWM Offset: 0x120) Transfer Control Register -------- */ +#define PWM_PTCR_RXTEN (0x1 << 0) /**< \brief (PWM_PTCR) Receiver Transfer Enable */ +#define PWM_PTCR_RXTDIS (0x1 << 1) /**< \brief (PWM_PTCR) Receiver Transfer Disable */ +#define PWM_PTCR_TXTEN (0x1 << 8) /**< \brief (PWM_PTCR) Transmitter Transfer Enable */ +#define PWM_PTCR_TXTDIS (0x1 << 9) /**< \brief (PWM_PTCR) Transmitter Transfer Disable */ +/* -------- PWM_PTSR : (PWM Offset: 0x124) Transfer Status Register -------- */ +#define PWM_PTSR_RXTEN (0x1 << 0) /**< \brief (PWM_PTSR) Receiver Transfer Enable */ +#define PWM_PTSR_TXTEN (0x1 << 8) /**< \brief (PWM_PTSR) Transmitter Transfer Enable */ +/* -------- PWM_CMP0V : (PWM Offset: 0x130) PWM Comparison 0 Value Register -------- */ +#define PWM_CMP0V_CV (0xffffff << 0) /**< \brief (PWM_CMP0V) Comparison x Value */ +#define PWM_CMP0V_CVM (0x1 << 24) /**< \brief (PWM_CMP0V) Comparison x Value Mode */ +/* -------- PWM_CMP0VUPD : (PWM Offset: 0x134) PWM Comparison 0 Value Update Register -------- */ +#define PWM_CMP0VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP0VUPD) Comparison x Value Update */ +#define PWM_CMP0VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP0VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP0M : (PWM Offset: 0x138) PWM Comparison 0 Mode Register -------- */ +#define PWM_CMP0M_CEN (0x1 << 0) /**< \brief (PWM_CMP0M) Comparison x Enable */ +#define PWM_CMP0M_CTR (0xf << 4) /**< \brief (PWM_CMP0M) Comparison x Trigger */ +#define PWM_CMP0M_CPR (0xf << 8) /**< \brief (PWM_CMP0M) Comparison x Period */ +#define PWM_CMP0M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP0M) Comparison x Period Counter */ +#define PWM_CMP0M_CUPR (0xf << 16) /**< \brief (PWM_CMP0M) Comparison x Update Period */ +#define PWM_CMP0M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP0M) Comparison x Update Period Counter */ +/* -------- PWM_CMP0MUPD : (PWM Offset: 0x13C) PWM Comparison 0 Mode Update Register -------- */ +#define PWM_CMP0MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP0MUPD) Comparison x Enable Update */ +#define PWM_CMP0MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP0MUPD) Comparison x Trigger Update */ +#define PWM_CMP0MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP0MUPD) Comparison x Period Update */ +#define PWM_CMP0MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP0MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP1V : (PWM Offset: 0x140) PWM Comparison 1 Value Register -------- */ +#define PWM_CMP1V_CV (0xffffff << 0) /**< \brief (PWM_CMP1V) Comparison x Value */ +#define PWM_CMP1V_CVM (0x1 << 24) /**< \brief (PWM_CMP1V) Comparison x Value Mode */ +/* -------- PWM_CMP1VUPD : (PWM Offset: 0x144) PWM Comparison 1 Value Update Register -------- */ +#define PWM_CMP1VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP1VUPD) Comparison x Value Update */ +#define PWM_CMP1VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP1VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP1M : (PWM Offset: 0x148) PWM Comparison 1 Mode Register -------- */ +#define PWM_CMP1M_CEN (0x1 << 0) /**< \brief (PWM_CMP1M) Comparison x Enable */ +#define PWM_CMP1M_CTR (0xf << 4) /**< \brief (PWM_CMP1M) Comparison x Trigger */ +#define PWM_CMP1M_CPR (0xf << 8) /**< \brief (PWM_CMP1M) Comparison x Period */ +#define PWM_CMP1M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP1M) Comparison x Period Counter */ +#define PWM_CMP1M_CUPR (0xf << 16) /**< \brief (PWM_CMP1M) Comparison x Update Period */ +#define PWM_CMP1M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP1M) Comparison x Update Period Counter */ +/* -------- PWM_CMP1MUPD : (PWM Offset: 0x14C) PWM Comparison 1 Mode Update Register -------- */ +#define PWM_CMP1MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP1MUPD) Comparison x Enable Update */ +#define PWM_CMP1MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP1MUPD) Comparison x Trigger Update */ +#define PWM_CMP1MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP1MUPD) Comparison x Period Update */ +#define PWM_CMP1MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP1MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP2V : (PWM Offset: 0x150) PWM Comparison 2 Value Register -------- */ +#define PWM_CMP2V_CV (0xffffff << 0) /**< \brief (PWM_CMP2V) Comparison x Value */ +#define PWM_CMP2V_CVM (0x1 << 24) /**< \brief (PWM_CMP2V) Comparison x Value Mode */ +/* -------- PWM_CMP2VUPD : (PWM Offset: 0x154) PWM Comparison 2 Value Update Register -------- */ +#define PWM_CMP2VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP2VUPD) Comparison x Value Update */ +#define PWM_CMP2VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP2VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP2M : (PWM Offset: 0x158) PWM Comparison 2 Mode Register -------- */ +#define PWM_CMP2M_CEN (0x1 << 0) /**< \brief (PWM_CMP2M) Comparison x Enable */ +#define PWM_CMP2M_CTR (0xf << 4) /**< \brief (PWM_CMP2M) Comparison x Trigger */ +#define PWM_CMP2M_CPR (0xf << 8) /**< \brief (PWM_CMP2M) Comparison x Period */ +#define PWM_CMP2M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP2M) Comparison x Period Counter */ +#define PWM_CMP2M_CUPR (0xf << 16) /**< \brief (PWM_CMP2M) Comparison x Update Period */ +#define PWM_CMP2M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP2M) Comparison x Update Period Counter */ +/* -------- PWM_CMP2MUPD : (PWM Offset: 0x15C) PWM Comparison 2 Mode Update Register -------- */ +#define PWM_CMP2MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP2MUPD) Comparison x Enable Update */ +#define PWM_CMP2MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP2MUPD) Comparison x Trigger Update */ +#define PWM_CMP2MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP2MUPD) Comparison x Period Update */ +#define PWM_CMP2MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP2MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP3V : (PWM Offset: 0x160) PWM Comparison 3 Value Register -------- */ +#define PWM_CMP3V_CV (0xffffff << 0) /**< \brief (PWM_CMP3V) Comparison x Value */ +#define PWM_CMP3V_CVM (0x1 << 24) /**< \brief (PWM_CMP3V) Comparison x Value Mode */ +/* -------- PWM_CMP3VUPD : (PWM Offset: 0x164) PWM Comparison 3 Value Update Register -------- */ +#define PWM_CMP3VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP3VUPD) Comparison x Value Update */ +#define PWM_CMP3VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP3VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP3M : (PWM Offset: 0x168) PWM Comparison 3 Mode Register -------- */ +#define PWM_CMP3M_CEN (0x1 << 0) /**< \brief (PWM_CMP3M) Comparison x Enable */ +#define PWM_CMP3M_CTR (0xf << 4) /**< \brief (PWM_CMP3M) Comparison x Trigger */ +#define PWM_CMP3M_CPR (0xf << 8) /**< \brief (PWM_CMP3M) Comparison x Period */ +#define PWM_CMP3M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP3M) Comparison x Period Counter */ +#define PWM_CMP3M_CUPR (0xf << 16) /**< \brief (PWM_CMP3M) Comparison x Update Period */ +#define PWM_CMP3M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP3M) Comparison x Update Period Counter */ +/* -------- PWM_CMP3MUPD : (PWM Offset: 0x16C) PWM Comparison 3 Mode Update Register -------- */ +#define PWM_CMP3MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP3MUPD) Comparison x Enable Update */ +#define PWM_CMP3MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP3MUPD) Comparison x Trigger Update */ +#define PWM_CMP3MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP3MUPD) Comparison x Period Update */ +#define PWM_CMP3MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP3MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP4V : (PWM Offset: 0x170) PWM Comparison 4 Value Register -------- */ +#define PWM_CMP4V_CV (0xffffff << 0) /**< \brief (PWM_CMP4V) Comparison x Value */ +#define PWM_CMP4V_CVM (0x1 << 24) /**< \brief (PWM_CMP4V) Comparison x Value Mode */ +/* -------- PWM_CMP4VUPD : (PWM Offset: 0x174) PWM Comparison 4 Value Update Register -------- */ +#define PWM_CMP4VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP4VUPD) Comparison x Value Update */ +#define PWM_CMP4VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP4VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP4M : (PWM Offset: 0x178) PWM Comparison 4 Mode Register -------- */ +#define PWM_CMP4M_CEN (0x1 << 0) /**< \brief (PWM_CMP4M) Comparison x Enable */ +#define PWM_CMP4M_CTR (0xf << 4) /**< \brief (PWM_CMP4M) Comparison x Trigger */ +#define PWM_CMP4M_CPR (0xf << 8) /**< \brief (PWM_CMP4M) Comparison x Period */ +#define PWM_CMP4M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP4M) Comparison x Period Counter */ +#define PWM_CMP4M_CUPR (0xf << 16) /**< \brief (PWM_CMP4M) Comparison x Update Period */ +#define PWM_CMP4M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP4M) Comparison x Update Period Counter */ +/* -------- PWM_CMP4MUPD : (PWM Offset: 0x17C) PWM Comparison 4 Mode Update Register -------- */ +#define PWM_CMP4MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP4MUPD) Comparison x Enable Update */ +#define PWM_CMP4MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP4MUPD) Comparison x Trigger Update */ +#define PWM_CMP4MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP4MUPD) Comparison x Period Update */ +#define PWM_CMP4MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP4MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP5V : (PWM Offset: 0x180) PWM Comparison 5 Value Register -------- */ +#define PWM_CMP5V_CV (0xffffff << 0) /**< \brief (PWM_CMP5V) Comparison x Value */ +#define PWM_CMP5V_CVM (0x1 << 24) /**< \brief (PWM_CMP5V) Comparison x Value Mode */ +/* -------- PWM_CMP5VUPD : (PWM Offset: 0x184) PWM Comparison 5 Value Update Register -------- */ +#define PWM_CMP5VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP5VUPD) Comparison x Value Update */ +#define PWM_CMP5VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP5VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP5M : (PWM Offset: 0x188) PWM Comparison 5 Mode Register -------- */ +#define PWM_CMP5M_CEN (0x1 << 0) /**< \brief (PWM_CMP5M) Comparison x Enable */ +#define PWM_CMP5M_CTR (0xf << 4) /**< \brief (PWM_CMP5M) Comparison x Trigger */ +#define PWM_CMP5M_CPR (0xf << 8) /**< \brief (PWM_CMP5M) Comparison x Period */ +#define PWM_CMP5M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP5M) Comparison x Period Counter */ +#define PWM_CMP5M_CUPR (0xf << 16) /**< \brief (PWM_CMP5M) Comparison x Update Period */ +#define PWM_CMP5M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP5M) Comparison x Update Period Counter */ +/* -------- PWM_CMP5MUPD : (PWM Offset: 0x18C) PWM Comparison 5 Mode Update Register -------- */ +#define PWM_CMP5MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP5MUPD) Comparison x Enable Update */ +#define PWM_CMP5MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP5MUPD) Comparison x Trigger Update */ +#define PWM_CMP5MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP5MUPD) Comparison x Period Update */ +#define PWM_CMP5MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP5MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP6V : (PWM Offset: 0x190) PWM Comparison 6 Value Register -------- */ +#define PWM_CMP6V_CV (0xffffff << 0) /**< \brief (PWM_CMP6V) Comparison x Value */ +#define PWM_CMP6V_CVM (0x1 << 24) /**< \brief (PWM_CMP6V) Comparison x Value Mode */ +/* -------- PWM_CMP6VUPD : (PWM Offset: 0x194) PWM Comparison 6 Value Update Register -------- */ +#define PWM_CMP6VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP6VUPD) Comparison x Value Update */ +#define PWM_CMP6VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP6VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP6M : (PWM Offset: 0x198) PWM Comparison 6 Mode Register -------- */ +#define PWM_CMP6M_CEN (0x1 << 0) /**< \brief (PWM_CMP6M) Comparison x Enable */ +#define PWM_CMP6M_CTR (0xf << 4) /**< \brief (PWM_CMP6M) Comparison x Trigger */ +#define PWM_CMP6M_CPR (0xf << 8) /**< \brief (PWM_CMP6M) Comparison x Period */ +#define PWM_CMP6M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP6M) Comparison x Period Counter */ +#define PWM_CMP6M_CUPR (0xf << 16) /**< \brief (PWM_CMP6M) Comparison x Update Period */ +#define PWM_CMP6M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP6M) Comparison x Update Period Counter */ +/* -------- PWM_CMP6MUPD : (PWM Offset: 0x19C) PWM Comparison 6 Mode Update Register -------- */ +#define PWM_CMP6MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP6MUPD) Comparison x Enable Update */ +#define PWM_CMP6MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP6MUPD) Comparison x Trigger Update */ +#define PWM_CMP6MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP6MUPD) Comparison x Period Update */ +#define PWM_CMP6MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP6MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMP7V : (PWM Offset: 0x1A0) PWM Comparison 7 Value Register -------- */ +#define PWM_CMP7V_CV (0xffffff << 0) /**< \brief (PWM_CMP7V) Comparison x Value */ +#define PWM_CMP7V_CVM (0x1 << 24) /**< \brief (PWM_CMP7V) Comparison x Value Mode */ +/* -------- PWM_CMP7VUPD : (PWM Offset: 0x1A4) PWM Comparison 7 Value Update Register -------- */ +#define PWM_CMP7VUPD_CVUPD (0xffffff << 0) /**< \brief (PWM_CMP7VUPD) Comparison x Value Update */ +#define PWM_CMP7VUPD_CVMUPD (0x1 << 24) /**< \brief (PWM_CMP7VUPD) Comparison x Value Mode Update */ +/* -------- PWM_CMP7M : (PWM Offset: 0x1A8) PWM Comparison 7 Mode Register -------- */ +#define PWM_CMP7M_CEN (0x1 << 0) /**< \brief (PWM_CMP7M) Comparison x Enable */ +#define PWM_CMP7M_CTR (0xf << 4) /**< \brief (PWM_CMP7M) Comparison x Trigger */ +#define PWM_CMP7M_CPR (0xf << 8) /**< \brief (PWM_CMP7M) Comparison x Period */ +#define PWM_CMP7M_CPRCNT (0xf << 12) /**< \brief (PWM_CMP7M) Comparison x Period Counter */ +#define PWM_CMP7M_CUPR (0xf << 16) /**< \brief (PWM_CMP7M) Comparison x Update Period */ +#define PWM_CMP7M_CUPRCNT (0xf << 20) /**< \brief (PWM_CMP7M) Comparison x Update Period Counter */ +/* -------- PWM_CMP7MUPD : (PWM Offset: 0x1AC) PWM Comparison 7 Mode Update Register -------- */ +#define PWM_CMP7MUPD_CENUPD (0x1 << 0) /**< \brief (PWM_CMP7MUPD) Comparison x Enable Update */ +#define PWM_CMP7MUPD_CTRUPD (0xf << 4) /**< \brief (PWM_CMP7MUPD) Comparison x Trigger Update */ +#define PWM_CMP7MUPD_CPRUPD (0xf << 8) /**< \brief (PWM_CMP7MUPD) Comparison x Period Update */ +#define PWM_CMP7MUPD_CUPRUPD (0xf << 16) /**< \brief (PWM_CMP7MUPD) Comparison x Update Period Update */ +/* -------- PWM_CMR0 : (PWM Offset: 0x200) PWM Channel Mode Register (ch_num = 0) -------- */ +#define PWM_CMR0_CPRE (0xf << 0) /**< \brief (PWM_CMR0) Channel Pre-scaler */ +#define PWM_CMR0_CALG (0x1 << 8) /**< \brief (PWM_CMR0) Channel Alignment */ +#define PWM_CMR0_CPOL (0x1 << 9) /**< \brief (PWM_CMR0) Channel Polarity */ +#define PWM_CMR0_CES (0x1 << 10) /**< \brief (PWM_CMR0) Counter Event Selection */ +#define PWM_CMR0_DTE (0x1 << 16) /**< \brief (PWM_CMR0) Dead-Time Generator Enable */ +#define PWM_CMR0_DTHI (0x1 << 17) /**< \brief (PWM_CMR0) Dead-Time PWMHx Output Inverted */ +#define PWM_CMR0_DTLI (0x1 << 18) /**< \brief (PWM_CMR0) Dead-Time PWMLx Output Inverted */ +/* -------- PWM_CDTY0 : (PWM Offset: 0x204) PWM Channel Duty Cycle Register (ch_num = 0) -------- */ +#define PWM_CDTY0_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY0) Channel Duty-Cycle */ +/* -------- PWM_CDTYUPD0 : (PWM Offset: 0x208) PWM Channel Duty Cycle Update Register (ch_num = 0) -------- */ +#define PWM_CDTYUPD0_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD0) Channel Duty-Cycle Update */ +/* -------- PWM_CPRD0 : (PWM Offset: 0x20C) PWM Channel Period Register (ch_num = 0) -------- */ +#define PWM_CPRD0_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD0) Channel Period */ +/* -------- PWM_CPRDUPD0 : (PWM Offset: 0x210) PWM Channel Period Update Register (ch_num = 0) -------- */ +#define PWM_CPRDUPD0_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD0) Channel Period Update */ +/* -------- PWM_CCNT0 : (PWM Offset: 0x214) PWM Channel Counter Register (ch_num = 0) -------- */ +#define PWM_CCNT0_CNT (0xffffff << 0) /**< \brief (PWM_CCNT0) Channel Counter Register */ +/* -------- PWM_DT0 : (PWM Offset: 0x218) PWM Channel Dead Time Register (ch_num = 0) -------- */ +#define PWM_DT0_DTH (0xffff << 0) /**< \brief (PWM_DT0) Dead-Time Value for PWMHx Output */ +#define PWM_DT0_DTL (0xffff << 16) /**< \brief (PWM_DT0) Dead-Time Value for PWMLx Output */ +/* -------- PWM_DTUPD0 : (PWM Offset: 0x21C) PWM Channel Dead Time Update Register (ch_num = 0) -------- */ +#define PWM_DTUPD0_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMHx Output */ +#define PWM_DTUPD0_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD0) Dead-Time Value Update for PWMLx Output */ +/* -------- PWM_CMR1 : (PWM Offset: 0x220) PWM Channel Mode Register (ch_num = 1) -------- */ +#define PWM_CMR1_CPRE (0xf << 0) /**< \brief (PWM_CMR1) Channel Pre-scaler */ +#define PWM_CMR1_CALG (0x1 << 8) /**< \brief (PWM_CMR1) Channel Alignment */ +#define PWM_CMR1_CPOL (0x1 << 9) /**< \brief (PWM_CMR1) Channel Polarity */ +#define PWM_CMR1_CES (0x1 << 10) /**< \brief (PWM_CMR1) Counter Event Selection */ +#define PWM_CMR1_DTE (0x1 << 16) /**< \brief (PWM_CMR1) Dead-Time Generator Enable */ +#define PWM_CMR1_DTHI (0x1 << 17) /**< \brief (PWM_CMR1) Dead-Time PWMHx Output Inverted */ +#define PWM_CMR1_DTLI (0x1 << 18) /**< \brief (PWM_CMR1) Dead-Time PWMLx Output Inverted */ +/* -------- PWM_CDTY1 : (PWM Offset: 0x224) PWM Channel Duty Cycle Register (ch_num = 1) -------- */ +#define PWM_CDTY1_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY1) Channel Duty-Cycle */ +/* -------- PWM_CDTYUPD1 : (PWM Offset: 0x228) PWM Channel Duty Cycle Update Register (ch_num = 1) -------- */ +#define PWM_CDTYUPD1_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD1) Channel Duty-Cycle Update */ +/* -------- PWM_CPRD1 : (PWM Offset: 0x22C) PWM Channel Period Register (ch_num = 1) -------- */ +#define PWM_CPRD1_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD1) Channel Period */ +/* -------- PWM_CPRDUPD1 : (PWM Offset: 0x230) PWM Channel Period Update Register (ch_num = 1) -------- */ +#define PWM_CPRDUPD1_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD1) Channel Period Update */ +/* -------- PWM_CCNT1 : (PWM Offset: 0x234) PWM Channel Counter Register (ch_num = 1) -------- */ +#define PWM_CCNT1_CNT (0xffffff << 0) /**< \brief (PWM_CCNT1) Channel Counter Register */ +/* -------- PWM_DT1 : (PWM Offset: 0x238) PWM Channel Dead Time Register (ch_num = 1) -------- */ +#define PWM_DT1_DTH (0xffff << 0) /**< \brief (PWM_DT1) Dead-Time Value for PWMHx Output */ +#define PWM_DT1_DTL (0xffff << 16) /**< \brief (PWM_DT1) Dead-Time Value for PWMLx Output */ +/* -------- PWM_DTUPD1 : (PWM Offset: 0x23C) PWM Channel Dead Time Update Register (ch_num = 1) -------- */ +#define PWM_DTUPD1_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMHx Output */ +#define PWM_DTUPD1_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD1) Dead-Time Value Update for PWMLx Output */ +/* -------- PWM_CMR2 : (PWM Offset: 0x240) PWM Channel Mode Register (ch_num = 2) -------- */ +#define PWM_CMR2_CPRE (0xf << 0) /**< \brief (PWM_CMR2) Channel Pre-scaler */ +#define PWM_CMR2_CALG (0x1 << 8) /**< \brief (PWM_CMR2) Channel Alignment */ +#define PWM_CMR2_CPOL (0x1 << 9) /**< \brief (PWM_CMR2) Channel Polarity */ +#define PWM_CMR2_CES (0x1 << 10) /**< \brief (PWM_CMR2) Counter Event Selection */ +#define PWM_CMR2_DTE (0x1 << 16) /**< \brief (PWM_CMR2) Dead-Time Generator Enable */ +#define PWM_CMR2_DTHI (0x1 << 17) /**< \brief (PWM_CMR2) Dead-Time PWMHx Output Inverted */ +#define PWM_CMR2_DTLI (0x1 << 18) /**< \brief (PWM_CMR2) Dead-Time PWMLx Output Inverted */ +/* -------- PWM_CDTY2 : (PWM Offset: 0x244) PWM Channel Duty Cycle Register (ch_num = 2) -------- */ +#define PWM_CDTY2_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY2) Channel Duty-Cycle */ +/* -------- PWM_CDTYUPD2 : (PWM Offset: 0x248) PWM Channel Duty Cycle Update Register (ch_num = 2) -------- */ +#define PWM_CDTYUPD2_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD2) Channel Duty-Cycle Update */ +/* -------- PWM_CPRD2 : (PWM Offset: 0x24C) PWM Channel Period Register (ch_num = 2) -------- */ +#define PWM_CPRD2_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD2) Channel Period */ +/* -------- PWM_CPRDUPD2 : (PWM Offset: 0x250) PWM Channel Period Update Register (ch_num = 2) -------- */ +#define PWM_CPRDUPD2_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD2) Channel Period Update */ +/* -------- PWM_CCNT2 : (PWM Offset: 0x254) PWM Channel Counter Register (ch_num = 2) -------- */ +#define PWM_CCNT2_CNT (0xffffff << 0) /**< \brief (PWM_CCNT2) Channel Counter Register */ +/* -------- PWM_DT2 : (PWM Offset: 0x258) PWM Channel Dead Time Register (ch_num = 2) -------- */ +#define PWM_DT2_DTH (0xffff << 0) /**< \brief (PWM_DT2) Dead-Time Value for PWMHx Output */ +#define PWM_DT2_DTL (0xffff << 16) /**< \brief (PWM_DT2) Dead-Time Value for PWMLx Output */ +/* -------- PWM_DTUPD2 : (PWM Offset: 0x25C) PWM Channel Dead Time Update Register (ch_num = 2) -------- */ +#define PWM_DTUPD2_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMHx Output */ +#define PWM_DTUPD2_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD2) Dead-Time Value Update for PWMLx Output */ +/* -------- PWM_CMR3 : (PWM Offset: 0x260) PWM Channel Mode Register (ch_num = 3) -------- */ +#define PWM_CMR3_CPRE (0xf << 0) /**< \brief (PWM_CMR3) Channel Pre-scaler */ +#define PWM_CMR3_CALG (0x1 << 8) /**< \brief (PWM_CMR3) Channel Alignment */ +#define PWM_CMR3_CPOL (0x1 << 9) /**< \brief (PWM_CMR3) Channel Polarity */ +#define PWM_CMR3_CES (0x1 << 10) /**< \brief (PWM_CMR3) Counter Event Selection */ +#define PWM_CMR3_DTE (0x1 << 16) /**< \brief (PWM_CMR3) Dead-Time Generator Enable */ +#define PWM_CMR3_DTHI (0x1 << 17) /**< \brief (PWM_CMR3) Dead-Time PWMHx Output Inverted */ +#define PWM_CMR3_DTLI (0x1 << 18) /**< \brief (PWM_CMR3) Dead-Time PWMLx Output Inverted */ +/* -------- PWM_CDTY3 : (PWM Offset: 0x264) PWM Channel Duty Cycle Register (ch_num = 3) -------- */ +#define PWM_CDTY3_CDTY (0xffffff << 0) /**< \brief (PWM_CDTY3) Channel Duty-Cycle */ +/* -------- PWM_CDTYUPD3 : (PWM Offset: 0x268) PWM Channel Duty Cycle Update Register (ch_num = 3) -------- */ +#define PWM_CDTYUPD3_CDTYUPD (0xffffff << 0) /**< \brief (PWM_CDTYUPD3) Channel Duty-Cycle Update */ +/* -------- PWM_CPRD3 : (PWM Offset: 0x26C) PWM Channel Period Register (ch_num = 3) -------- */ +#define PWM_CPRD3_CPRD (0xffffff << 0) /**< \brief (PWM_CPRD3) Channel Period */ +/* -------- PWM_CPRDUPD3 : (PWM Offset: 0x270) PWM Channel Period Update Register (ch_num = 3) -------- */ +#define PWM_CPRDUPD3_CPRDUPD (0xffffff << 0) /**< \brief (PWM_CPRDUPD3) Channel Period Update */ +/* -------- PWM_CCNT3 : (PWM Offset: 0x274) PWM Channel Counter Register (ch_num = 3) -------- */ +#define PWM_CCNT3_CNT (0xffffff << 0) /**< \brief (PWM_CCNT3) Channel Counter Register */ +/* -------- PWM_DT3 : (PWM Offset: 0x278) PWM Channel Dead Time Register (ch_num = 3) -------- */ +#define PWM_DT3_DTH (0xffff << 0) /**< \brief (PWM_DT3) Dead-Time Value for PWMHx Output */ +#define PWM_DT3_DTL (0xffff << 16) /**< \brief (PWM_DT3) Dead-Time Value for PWMLx Output */ +/* -------- PWM_DTUPD3 : (PWM Offset: 0x27C) PWM Channel Dead Time Update Register (ch_num = 3) -------- */ +#define PWM_DTUPD3_DTHUPD (0xffff << 0) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMHx Output */ +#define PWM_DTUPD3_DTLUPD (0xffff << 16) /**< \brief (PWM_DTUPD3) Dead-Time Value Update for PWMLx Output */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Reset Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_RSTC Reset Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Rstc hardware registers */ +typedef struct { + WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ + RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ + RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ +} Rstc; +#endif /* __ASSEMBLY__ */ +/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ +#define RSTC_CR_PROCRST (0x1 << 0) /**< \brief (RSTC_CR) Processor Reset */ +#define RSTC_CR_PERRST (0x1 << 2) /**< \brief (RSTC_CR) Peripheral Reset */ +#define RSTC_CR_EXTRST (0x1 << 3) /**< \brief (RSTC_CR) External Reset */ +#define RSTC_CR_KEY (0xff << 24) /**< \brief (RSTC_CR) Password */ +/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ +#define RSTC_SR_URSTS (0x1 << 0) /**< \brief (RSTC_SR) User Reset Status */ +#define RSTC_SR_RSTTYP (0x7 << 8) /**< \brief (RSTC_SR) Reset Type */ +#define RSTC_SR_NRSTL (0x1 << 16) /**< \brief (RSTC_SR) NRST Pin Level */ +#define RSTC_SR_SRCMP (0x1 << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ +/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ +#define RSTC_MR_URSTEN (0x1 << 0) /**< \brief (RSTC_MR) User Reset Enable */ +#define RSTC_MR_URSTIEN (0x1 << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ +#define RSTC_MR_ERSTL (0xf << 8) /**< \brief (RSTC_MR) External Reset Length */ +#define RSTC_MR_KEY (0xff << 24) /**< \brief (RSTC_MR) Password */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Real-time Clock */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_RTC Real-time Clock */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Rtc hardware registers */ +typedef struct { + RwReg RTC_CR; /**< \brief (Rtc Offset: 0x00) Control Register */ + RwReg RTC_MR; /**< \brief (Rtc Offset: 0x04) Mode Register */ + RwReg RTC_TIMR; /**< \brief (Rtc Offset: 0x08) Time Register */ + RwReg RTC_CALR; /**< \brief (Rtc Offset: 0x0C) Calendar Register */ + RwReg RTC_TIMALR; /**< \brief (Rtc Offset: 0x10) Time Alarm Register */ + RwReg RTC_CALALR; /**< \brief (Rtc Offset: 0x14) Calendar Alarm Register */ + RoReg RTC_SR; /**< \brief (Rtc Offset: 0x18) Status Register */ + WoReg RTC_SCCR; /**< \brief (Rtc Offset: 0x1C) Status Clear Command Register */ + WoReg RTC_IER; /**< \brief (Rtc Offset: 0x20) Interrupt Enable Register */ + WoReg RTC_IDR; /**< \brief (Rtc Offset: 0x24) Interrupt Disable Register */ + RoReg RTC_IMR; /**< \brief (Rtc Offset: 0x28) Interrupt Mask Register */ + RoReg RTC_VER; /**< \brief (Rtc Offset: 0x2C) Valid Entry Register */ +} Rtc; +#endif /* __ASSEMBLY__ */ +/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ +#define RTC_CR_UPDTIM (0x1 << 0) /**< \brief (RTC_CR) Update Request Time Register */ +#define RTC_CR_UPDCAL (0x1 << 1) /**< \brief (RTC_CR) Update Request Calendar Register */ +#define RTC_CR_TIMEVSEL (0x3 << 8) /**< \brief (RTC_CR) Time Event Selection */ +#define RTC_CR_TIMEVSEL_MINUTE (0x0 << 8) /**< \brief (RTC_CR) Minute change. */ +#define RTC_CR_TIMEVSEL_HOUR (0x1 << 8) /**< \brief (RTC_CR) Hour change. */ +#define RTC_CR_TIMEVSEL_DAY24 (0x2 << 8) /**< \brief (RTC_CR) Every day at midnight. */ +#define RTC_CR_TIMEVSEL_DAY12 (0x3 << 8) /**< \brief (RTC_CR) Every day at noon. */ +#define RTC_CR_CALEVSEL (0x3 << 16) /**< \brief (RTC_CR) Calendar Event Selection */ +#define RTC_CR_CALEVSEL_WEEK (0x0 << 16) /**< \brief (RTC_CR) Week change (every Monday at time 00:00:00). */ +#define RTC_CR_CALEVSEL_MONTH (0x1 << 16) /**< \brief (RTC_CR) Month change (every 01 of each month at time 00:00:00). */ +/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ +#define RTC_MR_HRMOD (0x1 << 0) /**< \brief (RTC_MR) 12-/24-hour Mode */ +/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ +#define RTC_TIMR_SEC (0x7f << 0) /**< \brief (RTC_TIMR) Current Second */ +#define RTC_TIMR_MIN (0x7f << 8) /**< \brief (RTC_TIMR) Current Minute */ +#define RTC_TIMR_HOUR (0x3f << 16) /**< \brief (RTC_TIMR) Current Hour */ +#define RTC_TIMR_AMPM (0x1 << 22) /**< \brief (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ +/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ +#define RTC_CALR_CENT (0x7f << 0) /**< \brief (RTC_CALR) Current Century */ +#define RTC_CALR_YEAR (0xff << 8) /**< \brief (RTC_CALR) Current Year */ +#define RTC_CALR_MONTH (0x1f << 16) /**< \brief (RTC_CALR) Current Month */ +#define RTC_CALR_DAY (0x7 << 21) /**< \brief (RTC_CALR) Current Day in Current Week */ +#define RTC_CALR_DATE (0x3f << 24) /**< \brief (RTC_CALR) Current Day in Current Month */ +/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ +#define RTC_TIMALR_SEC (0x7f << 0) /**< \brief (RTC_TIMALR) Second Alarm */ +#define RTC_TIMALR_SECEN (0x1 << 7) /**< \brief (RTC_TIMALR) Second Alarm Enable */ +#define RTC_TIMALR_MIN (0x7f << 8) /**< \brief (RTC_TIMALR) Minute Alarm */ +#define RTC_TIMALR_MINEN (0x1 << 15) /**< \brief (RTC_TIMALR) Minute Alarm Enable */ +#define RTC_TIMALR_HOUR (0x3f << 16) /**< \brief (RTC_TIMALR) Hour Alarm */ +#define RTC_TIMALR_AMPM (0x1 << 22) /**< \brief (RTC_TIMALR) AM/PM Indicator */ +#define RTC_TIMALR_HOUREN (0x1 << 23) /**< \brief (RTC_TIMALR) Hour Alarm Enable */ +/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ +#define RTC_CALALR_MONTH (0x1f << 16) /**< \brief (RTC_CALALR) Month Alarm */ +#define RTC_CALALR_MTHEN (0x1 << 23) /**< \brief (RTC_CALALR) Month Alarm Enable */ +#define RTC_CALALR_DATE (0x3f << 24) /**< \brief (RTC_CALALR) Date Alarm */ +#define RTC_CALALR_DATEEN (0x1 << 31) /**< \brief (RTC_CALALR) Date Alarm Enable */ +/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ +#define RTC_SR_ACKUPD (0x1 << 0) /**< \brief (RTC_SR) Acknowledge for Update */ +#define RTC_SR_ALARM (0x1 << 1) /**< \brief (RTC_SR) Alarm Flag */ +#define RTC_SR_SEC (0x1 << 2) /**< \brief (RTC_SR) Second Event */ +#define RTC_SR_TIMEV (0x1 << 3) /**< \brief (RTC_SR) Time Event */ +#define RTC_SR_CALEV (0x1 << 4) /**< \brief (RTC_SR) Calendar Event */ +/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ +#define RTC_SCCR_ACKCLR (0x1 << 0) /**< \brief (RTC_SCCR) Acknowledge Clear */ +#define RTC_SCCR_ALRCLR (0x1 << 1) /**< \brief (RTC_SCCR) Alarm Clear */ +#define RTC_SCCR_SECCLR (0x1 << 2) /**< \brief (RTC_SCCR) Second Clear */ +#define RTC_SCCR_TIMCLR (0x1 << 3) /**< \brief (RTC_SCCR) Time Clear */ +#define RTC_SCCR_CALCLR (0x1 << 4) /**< \brief (RTC_SCCR) Calendar Clear */ +/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ +#define RTC_IER_ACKEN (0x1 << 0) /**< \brief (RTC_IER) Acknowledge Update Interrupt Enable */ +#define RTC_IER_ALREN (0x1 << 1) /**< \brief (RTC_IER) Alarm Interrupt Enable */ +#define RTC_IER_SECEN (0x1 << 2) /**< \brief (RTC_IER) Second Event Interrupt Enable */ +#define RTC_IER_TIMEN (0x1 << 3) /**< \brief (RTC_IER) Time Event Interrupt Enable */ +#define RTC_IER_CALEN (0x1 << 4) /**< \brief (RTC_IER) Calendar Event Interrupt Enable */ +/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ +#define RTC_IDR_ACKDIS (0x1 << 0) /**< \brief (RTC_IDR) Acknowledge Update Interrupt Disable */ +#define RTC_IDR_ALRDIS (0x1 << 1) /**< \brief (RTC_IDR) Alarm Interrupt Disable */ +#define RTC_IDR_SECDIS (0x1 << 2) /**< \brief (RTC_IDR) Second Event Interrupt Disable */ +#define RTC_IDR_TIMDIS (0x1 << 3) /**< \brief (RTC_IDR) Time Event Interrupt Disable */ +#define RTC_IDR_CALDIS (0x1 << 4) /**< \brief (RTC_IDR) Calendar Event Interrupt Disable */ +/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ +#define RTC_IMR_ACK (0x1 << 0) /**< \brief (RTC_IMR) Acknowledge Update Interrupt Mask */ +#define RTC_IMR_ALR (0x1 << 1) /**< \brief (RTC_IMR) Alarm Interrupt Mask */ +#define RTC_IMR_SEC (0x1 << 2) /**< \brief (RTC_IMR) Second Event Interrupt Mask */ +#define RTC_IMR_TIM (0x1 << 3) /**< \brief (RTC_IMR) Time Event Interrupt Mask */ +#define RTC_IMR_CAL (0x1 << 4) /**< \brief (RTC_IMR) Calendar Event Interrupt Mask */ +/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ +#define RTC_VER_NVTIM (0x1 << 0) /**< \brief (RTC_VER) Non-valid Time */ +#define RTC_VER_NVCAL (0x1 << 1) /**< \brief (RTC_VER) Non-valid Calendar */ +#define RTC_VER_NVTIMALR (0x1 << 2) /**< \brief (RTC_VER) Non-valid Time Alarm */ +#define RTC_VER_NVCALALR (0x1 << 3) /**< \brief (RTC_VER) Non-valid Calendar Alarm */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Real-time Timer */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_RTT Real-time Timer */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Rtt hardware registers */ +typedef struct { + RwReg RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ + RwReg RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ + RoReg RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ + RoReg RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ +} Rtt; +#endif /* __ASSEMBLY__ */ +/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ +#define RTT_MR_RTPRES (0xffff << 0) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ +#define RTT_MR_ALMIEN (0x1 << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ +#define RTT_MR_RTTINCIEN (0x1 << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ +#define RTT_MR_RTTRST (0x1 << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ +/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ +#define RTT_AR_ALMV (0xffffffff << 0) /**< \brief (RTT_AR) Alarm Value */ +/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ +#define RTT_VR_CRTV (0xffffffff << 0) /**< \brief (RTT_VR) Current Real-time Value */ +/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ +#define RTT_SR_ALMS (0x1 << 0) /**< \brief (RTT_SR) Real-time Alarm Status */ +#define RTT_SR_RTTINC (0x1 << 1) /**< \brief (RTT_SR) Real-time Timer Increment */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Static Memory Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_SMC Static Memory Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief SmcCs_number hardware registers */ +typedef struct { + RwReg SMC_SETUP; /**< \brief (SmcCs_number Offset: 0x0) SMC Setup Register */ + RwReg SMC_PULSE; /**< \brief (SmcCs_number Offset: 0x4) SMC Pulse Register */ + RwReg SMC_CYCLE; /**< \brief (SmcCs_number Offset: 0x8) SMC Cycle Register */ + RwReg SMC_MODE; /**< \brief (SmcCs_number Offset: 0xC) SMC Mode Register */ +} SmcCs_number; +/** \brief Smc hardware registers */ +typedef struct { + SmcCs_number SMC_CS_NUMBER[5]; /**< \brief (Smc Offset: 0x0) CS_number = 0 .. 4 */ + RwReg Reserved1[12]; + RwReg SMC_OCMS; /**< \brief (Smc Offset: 0x80) SMC OCMS MODE Register */ + WoReg SMC_KEY1; /**< \brief (Smc Offset: 0x84) SMC OCMS KEY1 Register */ + WoReg SMC_KEY2; /**< \brief (Smc Offset: 0x88) SMC OCMS KEY2 Register */ + RwReg Reserved2[22]; + RwReg SMC_WPMR; /**< \brief (Smc Offset: 0xE4) SMC Write Protect Mode Register */ + RoReg SMC_WPSR; /**< \brief (Smc Offset: 0xE8) SMC Write Protect Status Register */ +} Smc; +#endif /* __ASSEMBLY__ */ +/* -------- SMC_SETUP0 : (SMC Offset: 0x0) SMC Setup Register (CS_number = 0) -------- */ +#define SMC_SETUP0_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP0) NWE Setup Length */ +#define SMC_SETUP0_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP0) NCS Setup Length in WRITE Access */ +#define SMC_SETUP0_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP0) NRD Setup Length */ +#define SMC_SETUP0_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP0) NCS Setup Length in READ Access */ +/* -------- SMC_PULSE0 : (SMC Offset: 0x4) SMC Pulse Register (CS_number = 0) -------- */ +#define SMC_PULSE0_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE0) NWE Pulse Length */ +#define SMC_PULSE0_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE0) NCS Pulse Length in WRITE Access */ +#define SMC_PULSE0_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE0) NRD Pulse Length */ +#define SMC_PULSE0_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE0) NCS Pulse Length in READ Access */ +/* -------- SMC_CYCLE0 : (SMC Offset: 0x8) SMC Cycle Register (CS_number = 0) -------- */ +#define SMC_CYCLE0_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE0) Total Write Cycle Length */ +#define SMC_CYCLE0_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE0) Total Read Cycle Length */ +/* -------- SMC_MODE0 : (SMC Offset: 0xC) SMC Mode Register (CS_number = 0) -------- */ +#define SMC_MODE0_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE0) */ +#define SMC_MODE0_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE0) */ +#define SMC_MODE0_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE0) NWAIT Mode */ +#define SMC_MODE0_DBW (0x3 << 12) /**< \brief (SMC_MODE0) Data Bus Width */ +#define SMC_MODE0_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE0) Data Float Time */ +#define SMC_MODE0_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE0) TDF Optimization */ +#define SMC_MODE0_PMEN (0x1 << 24) /**< \brief (SMC_MODE0) Page Mode Enabled */ +#define SMC_MODE0_PS (0x3 << 28) /**< \brief (SMC_MODE0) Page Size */ +/* -------- SMC_SETUP1 : (SMC Offset: 0x10) SMC Setup Register (CS_number = 1) -------- */ +#define SMC_SETUP1_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP1) NWE Setup Length */ +#define SMC_SETUP1_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP1) NCS Setup Length in WRITE Access */ +#define SMC_SETUP1_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP1) NRD Setup Length */ +#define SMC_SETUP1_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP1) NCS Setup Length in READ Access */ +/* -------- SMC_PULSE1 : (SMC Offset: 0x14) SMC Pulse Register (CS_number = 1) -------- */ +#define SMC_PULSE1_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE1) NWE Pulse Length */ +#define SMC_PULSE1_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE1) NCS Pulse Length in WRITE Access */ +#define SMC_PULSE1_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE1) NRD Pulse Length */ +#define SMC_PULSE1_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE1) NCS Pulse Length in READ Access */ +/* -------- SMC_CYCLE1 : (SMC Offset: 0x18) SMC Cycle Register (CS_number = 1) -------- */ +#define SMC_CYCLE1_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE1) Total Write Cycle Length */ +#define SMC_CYCLE1_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE1) Total Read Cycle Length */ +/* -------- SMC_MODE1 : (SMC Offset: 0x1C) SMC Mode Register (CS_number = 1) -------- */ +#define SMC_MODE1_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE1) */ +#define SMC_MODE1_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE1) */ +#define SMC_MODE1_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE1) NWAIT Mode */ +#define SMC_MODE1_DBW (0x3 << 12) /**< \brief (SMC_MODE1) Data Bus Width */ +#define SMC_MODE1_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE1) Data Float Time */ +#define SMC_MODE1_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE1) TDF Optimization */ +#define SMC_MODE1_PMEN (0x1 << 24) /**< \brief (SMC_MODE1) Page Mode Enabled */ +#define SMC_MODE1_PS (0x3 << 28) /**< \brief (SMC_MODE1) Page Size */ +/* -------- SMC_SETUP2 : (SMC Offset: 0x20) SMC Setup Register (CS_number = 2) -------- */ +#define SMC_SETUP2_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP2) NWE Setup Length */ +#define SMC_SETUP2_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP2) NCS Setup Length in WRITE Access */ +#define SMC_SETUP2_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP2) NRD Setup Length */ +#define SMC_SETUP2_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP2) NCS Setup Length in READ Access */ +/* -------- SMC_PULSE2 : (SMC Offset: 0x24) SMC Pulse Register (CS_number = 2) -------- */ +#define SMC_PULSE2_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE2) NWE Pulse Length */ +#define SMC_PULSE2_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE2) NCS Pulse Length in WRITE Access */ +#define SMC_PULSE2_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE2) NRD Pulse Length */ +#define SMC_PULSE2_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE2) NCS Pulse Length in READ Access */ +/* -------- SMC_CYCLE2 : (SMC Offset: 0x28) SMC Cycle Register (CS_number = 2) -------- */ +#define SMC_CYCLE2_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE2) Total Write Cycle Length */ +#define SMC_CYCLE2_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE2) Total Read Cycle Length */ +/* -------- SMC_MODE2 : (SMC Offset: 0x2C) SMC Mode Register (CS_number = 2) -------- */ +#define SMC_MODE2_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE2) */ +#define SMC_MODE2_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE2) */ +#define SMC_MODE2_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE2) NWAIT Mode */ +#define SMC_MODE2_DBW (0x3 << 12) /**< \brief (SMC_MODE2) Data Bus Width */ +#define SMC_MODE2_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE2) Data Float Time */ +#define SMC_MODE2_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE2) TDF Optimization */ +#define SMC_MODE2_PMEN (0x1 << 24) /**< \brief (SMC_MODE2) Page Mode Enabled */ +#define SMC_MODE2_PS (0x3 << 28) /**< \brief (SMC_MODE2) Page Size */ +/* -------- SMC_SETUP3 : (SMC Offset: 0x30) SMC Setup Register (CS_number = 3) -------- */ +#define SMC_SETUP3_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP3) NWE Setup Length */ +#define SMC_SETUP3_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP3) NCS Setup Length in WRITE Access */ +#define SMC_SETUP3_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP3) NRD Setup Length */ +#define SMC_SETUP3_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP3) NCS Setup Length in READ Access */ +/* -------- SMC_PULSE3 : (SMC Offset: 0x34) SMC Pulse Register (CS_number = 3) -------- */ +#define SMC_PULSE3_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE3) NWE Pulse Length */ +#define SMC_PULSE3_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE3) NCS Pulse Length in WRITE Access */ +#define SMC_PULSE3_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE3) NRD Pulse Length */ +#define SMC_PULSE3_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE3) NCS Pulse Length in READ Access */ +/* -------- SMC_CYCLE3 : (SMC Offset: 0x38) SMC Cycle Register (CS_number = 3) -------- */ +#define SMC_CYCLE3_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE3) Total Write Cycle Length */ +#define SMC_CYCLE3_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE3) Total Read Cycle Length */ +/* -------- SMC_MODE3 : (SMC Offset: 0x3C) SMC Mode Register (CS_number = 3) -------- */ +#define SMC_MODE3_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE3) */ +#define SMC_MODE3_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE3) */ +#define SMC_MODE3_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE3) NWAIT Mode */ +#define SMC_MODE3_DBW (0x3 << 12) /**< \brief (SMC_MODE3) Data Bus Width */ +#define SMC_MODE3_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE3) Data Float Time */ +#define SMC_MODE3_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE3) TDF Optimization */ +#define SMC_MODE3_PMEN (0x1 << 24) /**< \brief (SMC_MODE3) Page Mode Enabled */ +#define SMC_MODE3_PS (0x3 << 28) /**< \brief (SMC_MODE3) Page Size */ +/* -------- SMC_SETUP4 : (SMC Offset: 0x40) SMC Setup Register (CS_number = 4) -------- */ +#define SMC_SETUP4_NWE_SETUP (0x3f << 0) /**< \brief (SMC_SETUP4) NWE Setup Length */ +#define SMC_SETUP4_NCS_WR_SETUP (0x3f << 8) /**< \brief (SMC_SETUP4) NCS Setup Length in WRITE Access */ +#define SMC_SETUP4_NRD_SETUP (0x3f << 16) /**< \brief (SMC_SETUP4) NRD Setup Length */ +#define SMC_SETUP4_NCS_RD_SETUP (0x3f << 24) /**< \brief (SMC_SETUP4) NCS Setup Length in READ Access */ +/* -------- SMC_PULSE4 : (SMC Offset: 0x44) SMC Pulse Register (CS_number = 4) -------- */ +#define SMC_PULSE4_NWE_PULSE (0x7f << 0) /**< \brief (SMC_PULSE4) NWE Pulse Length */ +#define SMC_PULSE4_NCS_WR_PULSE (0x7f << 8) /**< \brief (SMC_PULSE4) NCS Pulse Length in WRITE Access */ +#define SMC_PULSE4_NRD_PULSE (0x7f << 16) /**< \brief (SMC_PULSE4) NRD Pulse Length */ +#define SMC_PULSE4_NCS_RD_PULSE (0x7f << 24) /**< \brief (SMC_PULSE4) NCS Pulse Length in READ Access */ +/* -------- SMC_CYCLE4 : (SMC Offset: 0x48) SMC Cycle Register (CS_number = 4) -------- */ +#define SMC_CYCLE4_NWE_CYCLE (0x1ff << 0) /**< \brief (SMC_CYCLE4) Total Write Cycle Length */ +#define SMC_CYCLE4_NRD_CYCLE (0x1ff << 16) /**< \brief (SMC_CYCLE4) Total Read Cycle Length */ +/* -------- SMC_MODE4 : (SMC Offset: 0x4C) SMC Mode Register (CS_number = 4) -------- */ +#define SMC_MODE4_READ_MODE (0x1 << 0) /**< \brief (SMC_MODE4) */ +#define SMC_MODE4_WRITE_MODE (0x1 << 1) /**< \brief (SMC_MODE4) */ +#define SMC_MODE4_EXNW_MODE (0x3 << 4) /**< \brief (SMC_MODE4) NWAIT Mode */ +#define SMC_MODE4_DBW (0x3 << 12) /**< \brief (SMC_MODE4) Data Bus Width */ +#define SMC_MODE4_TDF_CYCLES (0xf << 16) /**< \brief (SMC_MODE4) Data Float Time */ +#define SMC_MODE4_TDF_MODE (0x1 << 20) /**< \brief (SMC_MODE4) TDF Optimization */ +#define SMC_MODE4_PMEN (0x1 << 24) /**< \brief (SMC_MODE4) Page Mode Enabled */ +#define SMC_MODE4_PS (0x3 << 28) /**< \brief (SMC_MODE4) Page Size */ +/* -------- SMC_OCMS : (SMC Offset: 0x80) SMC OCMS MODE Register -------- */ +#define SMC_OCMS_SMSE (0x1 << 0) /**< \brief (SMC_OCMS) Static Memory Controller Scrambling Enable */ +#define SMC_OCMS_CS0SE (0x1 << 16) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ +#define SMC_OCMS_CS1SE (0x1 << 17) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ +#define SMC_OCMS_CS2SE (0x1 << 18) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ +#define SMC_OCMS_CS3SE (0x1 << 19) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ +/* -------- SMC_KEY1 : (SMC Offset: 0x84) SMC OCMS KEY1 Register -------- */ +#define SMC_KEY1_KEY1 (0xffffffff << 0) /**< \brief (SMC_KEY1) Off Chip Memory Scrambling (OCMS) Key Part 1 */ +/* -------- SMC_KEY2 : (SMC Offset: 0x88) SMC OCMS KEY2 Register -------- */ +#define SMC_KEY2_KEY2 (0xffffffff << 0) /**< \brief (SMC_KEY2) Off Chip Memory Scrambling (OCMS) Key Part 2 */ +/* -------- SMC_WPMR : (SMC Offset: 0xE4) SMC Write Protect Mode Register -------- */ +#define SMC_WPMR_WPEN (0x1 << 0) /**< \brief (SMC_WPMR) Write Protect Enable */ +#define SMC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SMC_WPMR) Write Protect KEY */ +/* -------- SMC_WPSR : (SMC Offset: 0xE8) SMC Write Protect Status Register -------- */ +#define SMC_WPSR_WPVS (0x1 << 0) /**< \brief (SMC_WPSR) Write Protect Enable */ +#define SMC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SMC_WPSR) Write Protect Violation Source */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_SPI Serial Peripheral Interface */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Spi hardware registers */ +typedef struct { + WoReg SPI_CR; /**< \brief (Spi Offset: 0x00) Control Register */ + RwReg SPI_MR; /**< \brief (Spi Offset: 0x04) Mode Register */ + RoReg SPI_RDR; /**< \brief (Spi Offset: 0x08) Receive Data Register */ + WoReg SPI_TDR; /**< \brief (Spi Offset: 0x0C) Transmit Data Register */ + RoReg SPI_SR; /**< \brief (Spi Offset: 0x10) Status Register */ + WoReg SPI_IER; /**< \brief (Spi Offset: 0x14) Interrupt Enable Register */ + WoReg SPI_IDR; /**< \brief (Spi Offset: 0x18) Interrupt Disable Register */ + RoReg SPI_IMR; /**< \brief (Spi Offset: 0x1C) Interrupt Mask Register */ + RwReg Reserved1[4]; + RwReg SPI_CSR[4]; /**< \brief (Spi Offset: 0x30) Chip Select Register */ + RwReg Reserved2[41]; + RwReg SPI_WPMR; /**< \brief (Spi Offset: 0xE4) Write Protection Control Register */ + RoReg SPI_WPSR; /**< \brief (Spi Offset: 0xE8) Write Protection Status Register */ + RwReg Reserved3[5]; + RwReg SPI_RPR; /**< \brief (Spi Offset: 0x100) Receive Pointer Register */ + RwReg SPI_RCR; /**< \brief (Spi Offset: 0x104) Receive Counter Register */ + RwReg SPI_TPR; /**< \brief (Spi Offset: 0x108) Transmit Pointer Register */ + RwReg SPI_TCR; /**< \brief (Spi Offset: 0x10C) Transmit Counter Register */ + RwReg SPI_RNPR; /**< \brief (Spi Offset: 0x110) Receive Next Pointer Register */ + RwReg SPI_RNCR; /**< \brief (Spi Offset: 0x114) Receive Next Counter Register */ + RwReg SPI_TNPR; /**< \brief (Spi Offset: 0x118) Transmit Next Pointer Register */ + RwReg SPI_TNCR; /**< \brief (Spi Offset: 0x11C) Transmit Next Counter Register */ + WoReg SPI_PTCR; /**< \brief (Spi Offset: 0x120) Transfer Control Register */ + RoReg SPI_PTSR; /**< \brief (Spi Offset: 0x124) Transfer Status Register */ +} Spi, AT91S_SPI, *AT91PS_SPI; +#endif /* __ASSEMBLY__ */ +/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ +#define SPI_CR_SPIEN (0x1 << 0) /**< \brief (SPI_CR) SPI Enable */ +#define SPI_CR_SPIDIS (0x1 << 1) /**< \brief (SPI_CR) SPI Disable */ +#define SPI_CR_SWRST (0x1 << 7) /**< \brief (SPI_CR) SPI Software Reset */ +#define SPI_CR_LASTXFER (0x1 << 24) /**< \brief (SPI_CR) Last Transfer */ +/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ +#define SPI_MR_MSTR (0x1 << 0) /**< \brief (SPI_MR) Master/Slave Mode */ +#define SPI_MR_PS (0x1 << 1) /**< \brief (SPI_MR) Peripheral Select */ +#define SPI_MR_PS_FIXED (0x0 << 1) /**< \brief (SPI_MR) Fixed Peripheral Select. */ +#define SPI_MR_PS_VARIABLE (0x1 << 1) /**< \brief (SPI_MR) Variable Peripheral Select. */ +#define SPI_MR_PCSDEC (0x1 << 2) /**< \brief (SPI_MR) Chip Select Decode */ +#define SPI_MR_MODFDIS (0x1 << 4) /**< \brief (SPI_MR) Mode Fault Detection */ +#define SPI_MR_WDRBT (0x1 << 5) /**< \brief (SPI_MR) Wait Data Read Before Transfer */ +#define SPI_MR_LLB (0x1 << 7) /**< \brief (SPI_MR) Local Loopback Enable */ +#define SPI_MR_PCS (0xf << 16) /**< \brief (SPI_MR) Peripheral Chip Select */ +#define SPI_MR_DLYBCS (0xff << 24) /**< \brief (SPI_MR) Delay Between Chip Selects */ +/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ +#define SPI_RDR_RD (0xffff << 0) /**< \brief (SPI_RDR) Receive Data */ +#define SPI_RDR_PCS (0xf << 16) /**< \brief (SPI_RDR) Peripheral Chip Select */ +/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ +#define SPI_TDR_TD (0xffff << 0) /**< \brief (SPI_TDR) Transmit Data */ +#define SPI_TDR_PCS (0xf << 16) /**< \brief (SPI_TDR) Peripheral Chip Select */ +#define SPI_TDR_LASTXFER (0x1 << 24) /**< \brief (SPI_TDR) Last Transfer */ +/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ +#define SPI_SR_RDRF (0x1 << 0) /**< \brief (SPI_SR) Receive Data Register Full */ +#define SPI_SR_TDRE (0x1 << 1) /**< \brief (SPI_SR) Transmit Data Register Empty */ +#define SPI_SR_MODF (0x1 << 2) /**< \brief (SPI_SR) Mode Fault Error */ +#define SPI_SR_OVRES (0x1 << 3) /**< \brief (SPI_SR) Overrun Error Status */ +#define SPI_SR_ENDRX (0x1 << 4) /**< \brief (SPI_SR) End of RX buffer */ +#define SPI_SR_ENDTX (0x1 << 5) /**< \brief (SPI_SR) End of TX buffer */ +#define SPI_SR_RXBUFF (0x1 << 6) /**< \brief (SPI_SR) RX Buffer Full */ +#define SPI_SR_TXBUFE (0x1 << 7) /**< \brief (SPI_SR) TX Buffer Empty */ +#define SPI_SR_NSSR (0x1 << 8) /**< \brief (SPI_SR) NSS Rising */ +#define SPI_SR_TXEMPTY (0x1 << 9) /**< \brief (SPI_SR) Transmission Registers Empty */ +#define SPI_SR_UNDES (0x1 << 10) /**< \brief (SPI_SR) Underrun Error Status (Slave Mode Only) */ +#define SPI_SR_SPIENS (0x1 << 16) /**< \brief (SPI_SR) SPI Enable Status */ +/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ +#define SPI_IER_RDRF (0x1 << 0) /**< \brief (SPI_IER) Receive Data Register Full Interrupt Enable */ +#define SPI_IER_TDRE (0x1 << 1) /**< \brief (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ +#define SPI_IER_MODF (0x1 << 2) /**< \brief (SPI_IER) Mode Fault Error Interrupt Enable */ +#define SPI_IER_OVRES (0x1 << 3) /**< \brief (SPI_IER) Overrun Error Interrupt Enable */ +#define SPI_IER_ENDRX (0x1 << 4) /**< \brief (SPI_IER) End of Receive Buffer Interrupt Enable */ +#define SPI_IER_ENDTX (0x1 << 5) /**< \brief (SPI_IER) End of Transmit Buffer Interrupt Enable */ +#define SPI_IER_RXBUFF (0x1 << 6) /**< \brief (SPI_IER) Receive Buffer Full Interrupt Enable */ +#define SPI_IER_TXBUFE (0x1 << 7) /**< \brief (SPI_IER) Transmit Buffer Empty Interrupt Enable */ +#define SPI_IER_NSSR (0x1 << 8) /**< \brief (SPI_IER) NSS Rising Interrupt Enable */ +#define SPI_IER_TXEMPTY (0x1 << 9) /**< \brief (SPI_IER) Transmission Registers Empty Enable */ +#define SPI_IER_UNDES (0x1 << 10) /**< \brief (SPI_IER) Underrun Error Interrupt Enable */ +/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ +#define SPI_IDR_RDRF (0x1 << 0) /**< \brief (SPI_IDR) Receive Data Register Full Interrupt Disable */ +#define SPI_IDR_TDRE (0x1 << 1) /**< \brief (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ +#define SPI_IDR_MODF (0x1 << 2) /**< \brief (SPI_IDR) Mode Fault Error Interrupt Disable */ +#define SPI_IDR_OVRES (0x1 << 3) /**< \brief (SPI_IDR) Overrun Error Interrupt Disable */ +#define SPI_IDR_ENDRX (0x1 << 4) /**< \brief (SPI_IDR) End of Receive Buffer Interrupt Disable */ +#define SPI_IDR_ENDTX (0x1 << 5) /**< \brief (SPI_IDR) End of Transmit Buffer Interrupt Disable */ +#define SPI_IDR_RXBUFF (0x1 << 6) /**< \brief (SPI_IDR) Receive Buffer Full Interrupt Disable */ +#define SPI_IDR_TXBUFE (0x1 << 7) /**< \brief (SPI_IDR) Transmit Buffer Empty Interrupt Disable */ +#define SPI_IDR_NSSR (0x1 << 8) /**< \brief (SPI_IDR) NSS Rising Interrupt Disable */ +#define SPI_IDR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IDR) Transmission Registers Empty Disable */ +#define SPI_IDR_UNDES (0x1 << 10) /**< \brief (SPI_IDR) Underrun Error Interrupt Disable */ +/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ +#define SPI_IMR_RDRF (0x1 << 0) /**< \brief (SPI_IMR) Receive Data Register Full Interrupt Mask */ +#define SPI_IMR_TDRE (0x1 << 1) /**< \brief (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ +#define SPI_IMR_MODF (0x1 << 2) /**< \brief (SPI_IMR) Mode Fault Error Interrupt Mask */ +#define SPI_IMR_OVRES (0x1 << 3) /**< \brief (SPI_IMR) Overrun Error Interrupt Mask */ +#define SPI_IMR_ENDRX (0x1 << 4) /**< \brief (SPI_IMR) End of Receive Buffer Interrupt Mask */ +#define SPI_IMR_ENDTX (0x1 << 5) /**< \brief (SPI_IMR) End of Transmit Buffer Interrupt Mask */ +#define SPI_IMR_RXBUFF (0x1 << 6) /**< \brief (SPI_IMR) Receive Buffer Full Interrupt Mask */ +#define SPI_IMR_TXBUFE (0x1 << 7) /**< \brief (SPI_IMR) Transmit Buffer Empty Interrupt Mask */ +#define SPI_IMR_NSSR (0x1 << 8) /**< \brief (SPI_IMR) NSS Rising Interrupt Mask */ +#define SPI_IMR_TXEMPTY (0x1 << 9) /**< \brief (SPI_IMR) Transmission Registers Empty Mask */ +#define SPI_IMR_UNDES (0x1 << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ +/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ +#define SPI_CSR_CPOL (0x1 << 0) /**< \brief (SPI_CSR[4]) Clock Polarity */ +#define SPI_CSR_NCPHA (0x1 << 1) /**< \brief (SPI_CSR[4]) Clock Phase */ +#define SPI_CSR_CSNAAT (0x1 << 2) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ +#define SPI_CSR_CSAAT (0x1 << 3) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ +#define SPI_CSR_BITS (0xf << 4) /**< \brief (SPI_CSR[4]) Bits Per Transfer (See the (Note:) below the register table; Section 9.9 "SPI Chip Select Register" on page 35.) */ +#define SPI_CSR_BITS_8 (0x0 << 4) /**< \brief (SPI_CSR[4]) 8 */ +#define SPI_CSR_BITS_9 (0x1 << 4) /**< \brief (SPI_CSR[4]) 9 */ +#define SPI_CSR_BITS_10 (0x2 << 4) /**< \brief (SPI_CSR[4]) 10 */ +#define SPI_CSR_BITS_11 (0x3 << 4) /**< \brief (SPI_CSR[4]) 11 */ +#define SPI_CSR_BITS_12 (0x4 << 4) /**< \brief (SPI_CSR[4]) 12 */ +#define SPI_CSR_BITS_13 (0x5 << 4) /**< \brief (SPI_CSR[4]) 13 */ +#define SPI_CSR_BITS_14 (0x6 << 4) /**< \brief (SPI_CSR[4]) 14 */ +#define SPI_CSR_BITS_15 (0x7 << 4) /**< \brief (SPI_CSR[4]) 15 */ +#define SPI_CSR_BITS_16 (0x8 << 4) /**< \brief (SPI_CSR[4]) 16 */ +#define SPI_CSR_SCBR (0xff << 8) /**< \brief (SPI_CSR[4]) Serial Clock Baud Rate */ +#define SPI_CSR_DLYBS (0xff << 16) /**< \brief (SPI_CSR[4]) Delay Before SPCK */ +#define SPI_CSR_DLYBCT (0xff << 24) /**< \brief (SPI_CSR[4]) Delay Between Consecutive Transfers */ +/* -------- SPI_WPMR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ +#define SPI_WPMR_SPIWPEN (0x1 << 0) /**< \brief (SPI_WPMR) SPI Write Protection Enable */ +#define SPI_WPMR_SPIWPKEY (0xffffff << 8) /**< \brief (SPI_WPMR) SPI Write Protection Key Password */ +/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ +#define SPI_WPSR_SPIWPVS (0x7 << 0) /**< \brief (SPI_WPSR) SPI Write Protection Violation Status */ +#define SPI_WPSR_SPIWPVSRC (0xff << 8) /**< \brief (SPI_WPSR) SPI Write Protection Violation Source */ +/* -------- SPI_RPR : (SPI Offset: 0x100) Receive Pointer Register -------- */ +#define SPI_RPR_RXPTR (0xffffffff << 0) /**< \brief (SPI_RPR) Receive Pointer Register */ +/* -------- SPI_RCR : (SPI Offset: 0x104) Receive Counter Register -------- */ +#define SPI_RCR_RXCTR (0xffff << 0) /**< \brief (SPI_RCR) Receive Counter Register */ +/* -------- SPI_TPR : (SPI Offset: 0x108) Transmit Pointer Register -------- */ +#define SPI_TPR_TXPTR (0xffffffff << 0) /**< \brief (SPI_TPR) Transmit Counter Register */ +/* -------- SPI_TCR : (SPI Offset: 0x10C) Transmit Counter Register -------- */ +#define SPI_TCR_TXCTR (0xffff << 0) /**< \brief (SPI_TCR) Transmit Counter Register */ +/* -------- SPI_RNPR : (SPI Offset: 0x110) Receive Next Pointer Register -------- */ +#define SPI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (SPI_RNPR) Receive Next Pointer */ +/* -------- SPI_RNCR : (SPI Offset: 0x114) Receive Next Counter Register -------- */ +#define SPI_RNCR_RXNCTR (0xffff << 0) /**< \brief (SPI_RNCR) Receive Next Counter */ +/* -------- SPI_TNPR : (SPI Offset: 0x118) Transmit Next Pointer Register -------- */ +#define SPI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (SPI_TNPR) Transmit Next Pointer */ +/* -------- SPI_TNCR : (SPI Offset: 0x11C) Transmit Next Counter Register -------- */ +#define SPI_TNCR_TXNCTR (0xffff << 0) /**< \brief (SPI_TNCR) Transmit Counter Next */ +/* -------- SPI_PTCR : (SPI Offset: 0x120) Transfer Control Register -------- */ +#define SPI_PTCR_RXTEN (0x1 << 0) /**< \brief (SPI_PTCR) Receiver Transfer Enable */ +#define SPI_PTCR_RXTDIS (0x1 << 1) /**< \brief (SPI_PTCR) Receiver Transfer Disable */ +#define SPI_PTCR_TXTEN (0x1 << 8) /**< \brief (SPI_PTCR) Transmitter Transfer Enable */ +#define SPI_PTCR_TXTDIS (0x1 << 9) /**< \brief (SPI_PTCR) Transmitter Transfer Disable */ +/* -------- SPI_PTSR : (SPI Offset: 0x124) Transfer Status Register -------- */ +#define SPI_PTSR_RXTEN (0x1 << 0) /**< \brief (SPI_PTSR) Receiver Transfer Enable */ +#define SPI_PTSR_TXTEN (0x1 << 8) /**< \brief (SPI_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_SSC Synchronous Serial Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Ssc hardware registers */ +typedef struct { + WoReg SSC_CR; /**< \brief (Ssc Offset: 0x0) Control Register */ + RwReg SSC_CMR; /**< \brief (Ssc Offset: 0x4) Clock Mode Register */ + RwReg Reserved1[2]; + RwReg SSC_RCMR; /**< \brief (Ssc Offset: 0x10) Receive Clock Mode Register */ + RwReg SSC_RFMR; /**< \brief (Ssc Offset: 0x14) Receive Frame Mode Register */ + RwReg SSC_TCMR; /**< \brief (Ssc Offset: 0x18) Transmit Clock Mode Register */ + RwReg SSC_TFMR; /**< \brief (Ssc Offset: 0x1C) Transmit Frame Mode Register */ + RoReg SSC_RHR; /**< \brief (Ssc Offset: 0x20) Receive Holding Register */ + WoReg SSC_THR; /**< \brief (Ssc Offset: 0x24) Transmit Holding Register */ + RwReg Reserved2[2]; + RoReg SSC_RSHR; /**< \brief (Ssc Offset: 0x30) Receive Sync. Holding Register */ + RwReg SSC_TSHR; /**< \brief (Ssc Offset: 0x34) Transmit Sync. Holding Register */ + RwReg SSC_RC0R; /**< \brief (Ssc Offset: 0x38) Receive Compare 0 Register */ + RwReg SSC_RC1R; /**< \brief (Ssc Offset: 0x3C) Receive Compare 1 Register */ + RoReg SSC_SR; /**< \brief (Ssc Offset: 0x40) Status Register */ + WoReg SSC_IER; /**< \brief (Ssc Offset: 0x44) Interrupt Enable Register */ + WoReg SSC_IDR; /**< \brief (Ssc Offset: 0x48) Interrupt Disable Register */ + RoReg SSC_IMR; /**< \brief (Ssc Offset: 0x4C) Interrupt Mask Register */ + RwReg Reserved3[37]; + RwReg SSC_WPMR; /**< \brief (Ssc Offset: 0xE4) Write Protect Mode Register */ + RoReg SSC_WPSR; /**< \brief (Ssc Offset: 0xE8) Write Protect Status Register */ + RwReg Reserved4[5]; + RwReg SSC_RPR; /**< \brief (Ssc Offset: 0x100) Receive Pointer Register */ + RwReg SSC_RCR; /**< \brief (Ssc Offset: 0x104) Receive Counter Register */ + RwReg SSC_TPR; /**< \brief (Ssc Offset: 0x108) Transmit Pointer Register */ + RwReg SSC_TCR; /**< \brief (Ssc Offset: 0x10C) Transmit Counter Register */ + RwReg SSC_RNPR; /**< \brief (Ssc Offset: 0x110) Receive Next Pointer Register */ + RwReg SSC_RNCR; /**< \brief (Ssc Offset: 0x114) Receive Next Counter Register */ + RwReg SSC_TNPR; /**< \brief (Ssc Offset: 0x118) Transmit Next Pointer Register */ + RwReg SSC_TNCR; /**< \brief (Ssc Offset: 0x11C) Transmit Next Counter Register */ + WoReg SSC_PTCR; /**< \brief (Ssc Offset: 0x120) Transfer Control Register */ + RoReg SSC_PTSR; /**< \brief (Ssc Offset: 0x124) Transfer Status Register */ +} Ssc; +#endif /* __ASSEMBLY__ */ +/* -------- SSC_CR : (SSC Offset: 0x0) Control Register -------- */ +#define SSC_CR_RXEN (0x1 << 0) /**< \brief (SSC_CR) Receive Enable */ +#define SSC_CR_RXDIS (0x1 << 1) /**< \brief (SSC_CR) Receive Disable */ +#define SSC_CR_TXEN (0x1 << 8) /**< \brief (SSC_CR) Transmit Enable */ +#define SSC_CR_TXDIS (0x1 << 9) /**< \brief (SSC_CR) Transmit Disable */ +#define SSC_CR_SWRST (0x1 << 15) /**< \brief (SSC_CR) Software Reset */ +/* -------- SSC_CMR : (SSC Offset: 0x4) Clock Mode Register -------- */ +#define SSC_CMR_DIV (0xfff << 0) /**< \brief (SSC_CMR) Clock Divider */ +/* -------- SSC_RCMR : (SSC Offset: 0x10) Receive Clock Mode Register -------- */ +#define SSC_RCMR_CKS (0x3 << 0) /**< \brief (SSC_RCMR) Receive Clock Selection */ +#define SSC_RCMR_CKS_DIV (0x0 << 0) /**< \brief (SSC_RCMR) Divided Clock */ +#define SSC_RCMR_CKS_TK (0x1 << 0) /**< \brief (SSC_RCMR) TK Clock signal */ +#define SSC_RCMR_CKS_RK (0x2 << 0) /**< \brief (SSC_RCMR) RK pin */ +#define SSC_RCMR_CKO (0x7 << 2) /**< \brief (SSC_RCMR) Receive Clock Output Mode Selection */ +#define SSC_RCMR_CKI (0x1 << 5) /**< \brief (SSC_RCMR) Receive Clock Inversion */ +#define SSC_RCMR_CKG (0x3 << 6) /**< \brief (SSC_RCMR) Receive Clock Gating Selection */ +#define SSC_RCMR_CKG_NONE (0x0 << 6) /**< \brief (SSC_RCMR) None, continuous clock */ +#define SSC_RCMR_CKG_LOW (0x1 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF Low */ +#define SSC_RCMR_CKG_HIGH (0x2 << 6) /**< \brief (SSC_RCMR) Receive Clock enabled only if RF High */ +#define SSC_RCMR_START (0xf << 8) /**< \brief (SSC_RCMR) Receive Start Selection */ +#define SSC_RCMR_STOP (0x1 << 12) /**< \brief (SSC_RCMR) Receive Stop Selection */ +#define SSC_RCMR_STTDLY (0xff << 16) /**< \brief (SSC_RCMR) Receive Start Delay */ +#define SSC_RCMR_PERIOD (0xff << 24) /**< \brief (SSC_RCMR) Receive Period Divider Selection */ +/* -------- SSC_RFMR : (SSC Offset: 0x14) Receive Frame Mode Register -------- */ +#define SSC_RFMR_DATLEN (0x1f << 0) /**< \brief (SSC_RFMR) Data Length */ +#define SSC_RFMR_LOOP (0x1 << 5) /**< \brief (SSC_RFMR) Loop Mode */ +#define SSC_RFMR_MSBF (0x1 << 7) /**< \brief (SSC_RFMR) Most Significant Bit First */ +#define SSC_RFMR_DATNB (0xf << 8) /**< \brief (SSC_RFMR) Data Number per Frame */ +#define SSC_RFMR_FSLEN (0xf << 16) /**< \brief (SSC_RFMR) Receive Frame Sync Length */ +#define SSC_RFMR_FSOS (0x7 << 20) /**< \brief (SSC_RFMR) Receive Frame Sync Output Selection */ +#define SSC_RFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_RFMR) Frame Sync Edge Detection */ +#define SSC_RFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_RFMR) FSLEN Field Extension */ +/* -------- SSC_TCMR : (SSC Offset: 0x18) Transmit Clock Mode Register -------- */ +#define SSC_TCMR_CKS (0x3 << 0) /**< \brief (SSC_TCMR) Transmit Clock Selection */ +#define SSC_TCMR_CKO (0x7 << 2) /**< \brief (SSC_TCMR) Transmit Clock Output Mode Selection */ +#define SSC_TCMR_CKI (0x1 << 5) /**< \brief (SSC_TCMR) Transmit Clock Inversion */ +#define SSC_TCMR_CKG (0x3 << 6) /**< \brief (SSC_TCMR) Transmit Clock Gating Selection */ +#define SSC_TCMR_START (0xf << 8) /**< \brief (SSC_TCMR) Transmit Start Selection */ +#define SSC_TCMR_STTDLY (0xff << 16) /**< \brief (SSC_TCMR) Transmit Start Delay */ +#define SSC_TCMR_PERIOD (0xff << 24) /**< \brief (SSC_TCMR) Transmit Period Divider Selection */ +/* -------- SSC_TFMR : (SSC Offset: 0x1C) Transmit Frame Mode Register -------- */ +#define SSC_TFMR_DATLEN (0x1f << 0) /**< \brief (SSC_TFMR) Data Length */ +#define SSC_TFMR_DATDEF (0x1 << 5) /**< \brief (SSC_TFMR) Data Default Value */ +#define SSC_TFMR_MSBF (0x1 << 7) /**< \brief (SSC_TFMR) Most Significant Bit First */ +#define SSC_TFMR_DATNB (0xf << 8) /**< \brief (SSC_TFMR) Data Number per frame */ +#define SSC_TFMR_FSLEN (0xf << 16) /**< \brief (SSC_TFMR) Transmit Frame Syn Length */ +#define SSC_TFMR_FSOS (0x7 << 20) /**< \brief (SSC_TFMR) Transmit Frame Sync Output Selection */ +#define SSC_TFMR_FSDEN (0x1 << 23) /**< \brief (SSC_TFMR) Frame Sync Data Enable */ +#define SSC_TFMR_FSEDGE (0x1 << 24) /**< \brief (SSC_TFMR) Frame Sync Edge Detection */ +#define SSC_TFMR_FSLEN_EXT (0xf << 28) /**< \brief (SSC_TFMR) FSLEN Field Extension */ +/* -------- SSC_RHR : (SSC Offset: 0x20) Receive Holding Register -------- */ +#define SSC_RHR_RDAT (0xffffffff << 0) /**< \brief (SSC_RHR) Receive Data */ +/* -------- SSC_THR : (SSC Offset: 0x24) Transmit Holding Register -------- */ +#define SSC_THR_TDAT (0xffffffff << 0) /**< \brief (SSC_THR) Transmit Data */ +/* -------- SSC_RSHR : (SSC Offset: 0x30) Receive Sync. Holding Register -------- */ +#define SSC_RSHR_RSDAT (0xffff << 0) /**< \brief (SSC_RSHR) Receive Synchronization Data */ +/* -------- SSC_TSHR : (SSC Offset: 0x34) Transmit Sync. Holding Register -------- */ +#define SSC_TSHR_TSDAT (0xffff << 0) /**< \brief (SSC_TSHR) Transmit Synchronization Data */ +/* -------- SSC_RC0R : (SSC Offset: 0x38) Receive Compare 0 Register -------- */ +#define SSC_RC0R_CP0 (0xffff << 0) /**< \brief (SSC_RC0R) Receive Compare Data 0 */ +/* -------- SSC_RC1R : (SSC Offset: 0x3C) Receive Compare 1 Register -------- */ +#define SSC_RC1R_CP1 (0xffff << 0) /**< \brief (SSC_RC1R) Receive Compare Data 1 */ +/* -------- SSC_SR : (SSC Offset: 0x40) Status Register -------- */ +#define SSC_SR_TXRDY (0x1 << 0) /**< \brief (SSC_SR) Transmit Ready */ +#define SSC_SR_TXEMPTY (0x1 << 1) /**< \brief (SSC_SR) Transmit Empty */ +#define SSC_SR_ENDTX (0x1 << 2) /**< \brief (SSC_SR) End of Transmission */ +#define SSC_SR_TXBUFE (0x1 << 3) /**< \brief (SSC_SR) Transmit Buffer Empty */ +#define SSC_SR_RXRDY (0x1 << 4) /**< \brief (SSC_SR) Receive Ready */ +#define SSC_SR_OVRUN (0x1 << 5) /**< \brief (SSC_SR) Receive Overrun */ +#define SSC_SR_ENDRX (0x1 << 6) /**< \brief (SSC_SR) End of Reception */ +#define SSC_SR_RXBUFF (0x1 << 7) /**< \brief (SSC_SR) Receive Buffer Full */ +#define SSC_SR_CP0 (0x1 << 8) /**< \brief (SSC_SR) Compare 0 */ +#define SSC_SR_CP1 (0x1 << 9) /**< \brief (SSC_SR) Compare 1 */ +#define SSC_SR_TXSYN (0x1 << 10) /**< \brief (SSC_SR) Transmit Sync */ +#define SSC_SR_RXSYN (0x1 << 11) /**< \brief (SSC_SR) Receive Sync */ +#define SSC_SR_TXEN (0x1 << 16) /**< \brief (SSC_SR) Transmit Enable */ +#define SSC_SR_RXEN (0x1 << 17) /**< \brief (SSC_SR) Receive Enable */ +/* -------- SSC_IER : (SSC Offset: 0x44) Interrupt Enable Register -------- */ +#define SSC_IER_TXRDY (0x1 << 0) /**< \brief (SSC_IER) Transmit Ready Interrupt Enable */ +#define SSC_IER_TXEMPTY (0x1 << 1) /**< \brief (SSC_IER) Transmit Empty Interrupt Enable */ +#define SSC_IER_ENDTX (0x1 << 2) /**< \brief (SSC_IER) End of Transmission Interrupt Enable */ +#define SSC_IER_TXBUFE (0x1 << 3) /**< \brief (SSC_IER) Transmit Buffer Empty Interrupt Enable */ +#define SSC_IER_RXRDY (0x1 << 4) /**< \brief (SSC_IER) Receive Ready Interrupt Enable */ +#define SSC_IER_OVRUN (0x1 << 5) /**< \brief (SSC_IER) Receive Overrun Interrupt Enable */ +#define SSC_IER_ENDRX (0x1 << 6) /**< \brief (SSC_IER) End of Reception Interrupt Enable */ +#define SSC_IER_RXBUFF (0x1 << 7) /**< \brief (SSC_IER) Receive Buffer Full Interrupt Enable */ +#define SSC_IER_CP0 (0x1 << 8) /**< \brief (SSC_IER) Compare 0 Interrupt Enable */ +#define SSC_IER_CP1 (0x1 << 9) /**< \brief (SSC_IER) Compare 1 Interrupt Enable */ +#define SSC_IER_TXSYN (0x1 << 10) /**< \brief (SSC_IER) Tx Sync Interrupt Enable */ +#define SSC_IER_RXSYN (0x1 << 11) /**< \brief (SSC_IER) Rx Sync Interrupt Enable */ +/* -------- SSC_IDR : (SSC Offset: 0x48) Interrupt Disable Register -------- */ +#define SSC_IDR_TXRDY (0x1 << 0) /**< \brief (SSC_IDR) Transmit Ready Interrupt Disable */ +#define SSC_IDR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IDR) Transmit Empty Interrupt Disable */ +#define SSC_IDR_ENDTX (0x1 << 2) /**< \brief (SSC_IDR) End of Transmission Interrupt Disable */ +#define SSC_IDR_TXBUFE (0x1 << 3) /**< \brief (SSC_IDR) Transmit Buffer Empty Interrupt Disable */ +#define SSC_IDR_RXRDY (0x1 << 4) /**< \brief (SSC_IDR) Receive Ready Interrupt Disable */ +#define SSC_IDR_OVRUN (0x1 << 5) /**< \brief (SSC_IDR) Receive Overrun Interrupt Disable */ +#define SSC_IDR_ENDRX (0x1 << 6) /**< \brief (SSC_IDR) End of Reception Interrupt Disable */ +#define SSC_IDR_RXBUFF (0x1 << 7) /**< \brief (SSC_IDR) Receive Buffer Full Interrupt Disable */ +#define SSC_IDR_CP0 (0x1 << 8) /**< \brief (SSC_IDR) Compare 0 Interrupt Disable */ +#define SSC_IDR_CP1 (0x1 << 9) /**< \brief (SSC_IDR) Compare 1 Interrupt Disable */ +#define SSC_IDR_TXSYN (0x1 << 10) /**< \brief (SSC_IDR) Tx Sync Interrupt Enable */ +#define SSC_IDR_RXSYN (0x1 << 11) /**< \brief (SSC_IDR) Rx Sync Interrupt Enable */ +/* -------- SSC_IMR : (SSC Offset: 0x4C) Interrupt Mask Register -------- */ +#define SSC_IMR_TXRDY (0x1 << 0) /**< \brief (SSC_IMR) Transmit Ready Interrupt Mask */ +#define SSC_IMR_TXEMPTY (0x1 << 1) /**< \brief (SSC_IMR) Transmit Empty Interrupt Mask */ +#define SSC_IMR_ENDTX (0x1 << 2) /**< \brief (SSC_IMR) End of Transmission Interrupt Mask */ +#define SSC_IMR_TXBUFE (0x1 << 3) /**< \brief (SSC_IMR) Transmit Buffer Empty Interrupt Mask */ +#define SSC_IMR_RXRDY (0x1 << 4) /**< \brief (SSC_IMR) Receive Ready Interrupt Mask */ +#define SSC_IMR_OVRUN (0x1 << 5) /**< \brief (SSC_IMR) Receive Overrun Interrupt Mask */ +#define SSC_IMR_ENDRX (0x1 << 6) /**< \brief (SSC_IMR) End of Reception Interrupt Mask */ +#define SSC_IMR_RXBUFF (0x1 << 7) /**< \brief (SSC_IMR) Receive Buffer Full Interrupt Mask */ +#define SSC_IMR_CP0 (0x1 << 8) /**< \brief (SSC_IMR) Compare 0 Interrupt Mask */ +#define SSC_IMR_CP1 (0x1 << 9) /**< \brief (SSC_IMR) Compare 1 Interrupt Mask */ +#define SSC_IMR_TXSYN (0x1 << 10) /**< \brief (SSC_IMR) Tx Sync Interrupt Mask */ +#define SSC_IMR_RXSYN (0x1 << 11) /**< \brief (SSC_IMR) Rx Sync Interrupt Mask */ +/* -------- SSC_WPMR : (SSC Offset: 0xE4) Write Protect Mode Register -------- */ +#define SSC_WPMR_WPEN (0x1 << 0) /**< \brief (SSC_WPMR) Write Protect Enable */ +#define SSC_WPMR_WPKEY (0xffffff << 8) /**< \brief (SSC_WPMR) Write Protect KEY */ +/* -------- SSC_WPSR : (SSC Offset: 0xE8) Write Protect Status Register -------- */ +#define SSC_WPSR_WPVS (0x1 << 0) /**< \brief (SSC_WPSR) Write Protect Violation Status */ +#define SSC_WPSR_WPVSRC (0xffff << 8) /**< \brief (SSC_WPSR) Write Protect Violation Source */ +/* -------- SSC_RPR : (SSC Offset: 0x100) Receive Pointer Register -------- */ +#define SSC_RPR_RXPTR (0xffffffff << 0) /**< \brief (SSC_RPR) Receive Pointer Register */ +/* -------- SSC_RCR : (SSC Offset: 0x104) Receive Counter Register -------- */ +#define SSC_RCR_RXCTR (0xffff << 0) /**< \brief (SSC_RCR) Receive Counter Register */ +/* -------- SSC_TPR : (SSC Offset: 0x108) Transmit Pointer Register -------- */ +#define SSC_TPR_TXPTR (0xffffffff << 0) /**< \brief (SSC_TPR) Transmit Counter Register */ +/* -------- SSC_TCR : (SSC Offset: 0x10C) Transmit Counter Register -------- */ +#define SSC_TCR_TXCTR (0xffff << 0) /**< \brief (SSC_TCR) Transmit Counter Register */ +/* -------- SSC_RNPR : (SSC Offset: 0x110) Receive Next Pointer Register -------- */ +#define SSC_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (SSC_RNPR) Receive Next Pointer */ +/* -------- SSC_RNCR : (SSC Offset: 0x114) Receive Next Counter Register -------- */ +#define SSC_RNCR_RXNCTR (0xffff << 0) /**< \brief (SSC_RNCR) Receive Next Counter */ +/* -------- SSC_TNPR : (SSC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define SSC_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (SSC_TNPR) Transmit Next Pointer */ +/* -------- SSC_TNCR : (SSC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define SSC_TNCR_TXNCTR (0xffff << 0) /**< \brief (SSC_TNCR) Transmit Counter Next */ +/* -------- SSC_PTCR : (SSC Offset: 0x120) Transfer Control Register -------- */ +#define SSC_PTCR_RXTEN (0x1 << 0) /**< \brief (SSC_PTCR) Receiver Transfer Enable */ +#define SSC_PTCR_RXTDIS (0x1 << 1) /**< \brief (SSC_PTCR) Receiver Transfer Disable */ +#define SSC_PTCR_TXTEN (0x1 << 8) /**< \brief (SSC_PTCR) Transmitter Transfer Enable */ +#define SSC_PTCR_TXTDIS (0x1 << 9) /**< \brief (SSC_PTCR) Transmitter Transfer Disable */ +/* -------- SSC_PTSR : (SSC Offset: 0x124) Transfer Status Register -------- */ +#define SSC_PTSR_RXTEN (0x1 << 0) /**< \brief (SSC_PTSR) Receiver Transfer Enable */ +#define SSC_PTSR_TXTEN (0x1 << 8) /**< \brief (SSC_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Supply Controller */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_SUPC Supply Controller */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Supc hardware registers */ +typedef struct { + WoReg SUPC_CR; /**< \brief (Supc Offset: 0x00) Supply Controller Control Register */ + RwReg SUPC_SMMR; /**< \brief (Supc Offset: 0x04) Supply Controller Supply Monitor Mode Register */ + RwReg SUPC_MR; /**< \brief (Supc Offset: 0x08) Supply Controller Mode Register */ + RwReg SUPC_WUMR; /**< \brief (Supc Offset: 0x0C) Supply Controller Wake Up Mode Register */ + RwReg SUPC_WUIR; /**< \brief (Supc Offset: 0x10) Supply Controller Wake Up Inputs Register */ + RoReg SUPC_SR; /**< \brief (Supc Offset: 0x14) Supply Controller Status Register */ +} Supc; +#endif /* __ASSEMBLY__ */ +/* -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- */ +#define SUPC_CR_VROFF (0x1 << 2) /**< \brief (SUPC_CR) Voltage Regulator Off */ +#define SUPC_CR_VROFF_NO_EFFECT (0x0 << 2) /**< \brief (SUPC_CR) no effect. */ +#define SUPC_CR_VROFF_STOP_VREG (0x1 << 2) /**< \brief (SUPC_CR) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. */ +#define SUPC_CR_XTALSEL (0x1 << 3) /**< \brief (SUPC_CR) Crystal Oscillator Select */ +#define SUPC_CR_XTALSEL_NO_EFFECT (0x0 << 3) /**< \brief (SUPC_CR) no effect. */ +#define SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1 << 3) /**< \brief (SUPC_CR) if KEY is correct, switches the slow clock on the crystal oscillator output. */ +#define SUPC_CR_KEY (0xff << 24) /**< \brief (SUPC_CR) Password */ +/* -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- */ +#define SUPC_SMMR_SMTH (0xf << 0) /**< \brief (SUPC_SMMR) Supply Monitor Threshold */ +#define SUPC_SMMR_SMTH_1_9V (0x0 << 0) /**< \brief (SUPC_SMMR) 1.9 V */ +#define SUPC_SMMR_SMTH_2_0V (0x1 << 0) /**< \brief (SUPC_SMMR) 2.0 V */ +#define SUPC_SMMR_SMTH_2_1V (0x2 << 0) /**< \brief (SUPC_SMMR) 2.1 V */ +#define SUPC_SMMR_SMTH_2_2V (0x3 << 0) /**< \brief (SUPC_SMMR) 2.2 V */ +#define SUPC_SMMR_SMTH_2_3V (0x4 << 0) /**< \brief (SUPC_SMMR) 2.3 V */ +#define SUPC_SMMR_SMTH_2_4V (0x5 << 0) /**< \brief (SUPC_SMMR) 2.4 V */ +#define SUPC_SMMR_SMTH_2_5V (0x6 << 0) /**< \brief (SUPC_SMMR) 2.5 V */ +#define SUPC_SMMR_SMTH_2_6V (0x7 << 0) /**< \brief (SUPC_SMMR) 2.6 V */ +#define SUPC_SMMR_SMTH_2_7V (0x8 << 0) /**< \brief (SUPC_SMMR) 2.7 V */ +#define SUPC_SMMR_SMTH_2_8V (0x9 << 0) /**< \brief (SUPC_SMMR) 2.8 V */ +#define SUPC_SMMR_SMTH_2_9V (0xA << 0) /**< \brief (SUPC_SMMR) 2.9 V */ +#define SUPC_SMMR_SMTH_3_0V (0xB << 0) /**< \brief (SUPC_SMMR) 3.0 V */ +#define SUPC_SMMR_SMTH_3_1V (0xC << 0) /**< \brief (SUPC_SMMR) 3.1 V */ +#define SUPC_SMMR_SMTH_3_2V (0xD << 0) /**< \brief (SUPC_SMMR) 3.2 V */ +#define SUPC_SMMR_SMTH_3_3V (0xE << 0) /**< \brief (SUPC_SMMR) 3.3 V */ +#define SUPC_SMMR_SMTH_3_4V (0xF << 0) /**< \brief (SUPC_SMMR) 3.4 V */ +#define SUPC_SMMR_SMSMPL (0x7 << 8) /**< \brief (SUPC_SMMR) Supply Monitor Sampling Period */ +#define SUPC_SMMR_SMSMPL_SMD (0x0 << 8) /**< \brief (SUPC_SMMR) Supply Monitor disabled */ +#define SUPC_SMMR_SMSMPL_CSM (0x1 << 8) /**< \brief (SUPC_SMMR) Continuous Supply Monitor */ +#define SUPC_SMMR_SMSMPL_32SLCK (0x2 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 32 SLCK periods */ +#define SUPC_SMMR_SMSMPL_256SLCK (0x3 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 256 SLCK periods */ +#define SUPC_SMMR_SMSMPL_2048SLCK (0x4 << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 2,048 SLCK periods */ +#define SUPC_SMMR_SMRSTEN (0x1 << 12) /**< \brief (SUPC_SMMR) Supply Monitor Reset Enable */ +#define SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_SMMR) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. */ +#define SUPC_SMMR_SMRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_SMMR) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. */ +#define SUPC_SMMR_SMIEN (0x1 << 13) /**< \brief (SUPC_SMMR) Supply Monitor Interrupt Enable */ +#define SUPC_SMMR_SMIEN_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is not affected when a supply monitor detection occurs. */ +#define SUPC_SMMR_SMIEN_ENABLE (0x1 << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is asserted when a supply monitor detection occurs. */ +/* -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- */ +#define SUPC_MR_BODRSTEN (0x1 << 12) /**< \brief (SUPC_MR) Brownout Detector Reset Enable */ +#define SUPC_MR_BODRSTEN_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_MR) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. */ +#define SUPC_MR_BODRSTEN_ENABLE (0x1 << 12) /**< \brief (SUPC_MR) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. */ +#define SUPC_MR_BODDIS (0x1 << 13) /**< \brief (SUPC_MR) Brownout Detector Disable */ +#define SUPC_MR_BODDIS_ENABLE (0x0 << 13) /**< \brief (SUPC_MR) the core brownout detector is enabled. */ +#define SUPC_MR_BODDIS_DISABLE (0x1 << 13) /**< \brief (SUPC_MR) the core brownout detector is disabled. */ +#define SUPC_MR_ONREG (0x1 << 14) /**< \brief (SUPC_MR) Voltage Regulator enable */ +#define SUPC_MR_ONREG_ONREG_UNUSED (0x0 << 14) /**< \brief (SUPC_MR) Voltage Regulator is not used */ +#define SUPC_MR_ONREG_ONREG_USED (0x1 << 14) /**< \brief (SUPC_MR) Voltage Regulator is used */ +#define SUPC_MR_OSCBYPASS (0x1 << 20) /**< \brief (SUPC_MR) Oscillator Bypass */ +#define SUPC_MR_OSCBYPASS_NO_EFFECT (0x0 << 20) /**< \brief (SUPC_MR) no effect. Clock selection depends on XTALSEL value. */ +#define SUPC_MR_OSCBYPASS_BYPASS (0x1 << 20) /**< \brief (SUPC_MR) the 32-KHz XTAL oscillator is selected and is put in bypass mode. */ +#define SUPC_MR_KEY (0xff << 24) /**< \brief (SUPC_MR) Password Key */ +/* -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- */ +#define SUPC_WUMR_SMEN (0x1 << 1) /**< \brief (SUPC_WUMR) Supply Monitor Wake Up Enable */ +#define SUPC_WUMR_SMEN_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection has no wake up effect. */ +#define SUPC_WUMR_SMEN_ENABLE (0x1 << 1) /**< \brief (SUPC_WUMR) the supply monitor detection forces the wake up of the core power supply. */ +#define SUPC_WUMR_RTTEN (0x1 << 2) /**< \brief (SUPC_WUMR) Real Time Timer Wake Up Enable */ +#define SUPC_WUMR_RTTEN_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal has no wake up effect. */ +#define SUPC_WUMR_RTTEN_ENABLE (0x1 << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal forces the wake up of the core power supply. */ +#define SUPC_WUMR_RTCEN (0x1 << 3) /**< \brief (SUPC_WUMR) Real Time Clock Wake Up Enable */ +#define SUPC_WUMR_RTCEN_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal has no wake up effect. */ +#define SUPC_WUMR_RTCEN_ENABLE (0x1 << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal forces the wake up of the core power supply. */ +#define SUPC_WUMR_WKUPDBC (0x7 << 12) /**< \brief (SUPC_WUMR) Wake Up Inputs Debouncer */ +#define SUPC_WUMR_WKUPDBC_1SCLK (0x0 << 12) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ +#define SUPC_WUMR_WKUPDBC_3SCLK (0x1 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 3 SLCK periods */ +#define SUPC_WUMR_WKUPDBC_32SCLK (0x2 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32 SLCK periods */ +#define SUPC_WUMR_WKUPDBC_512SCLK (0x3 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 512 SLCK periods */ +#define SUPC_WUMR_WKUPDBC_4096SCLK (0x4 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 4,096 SLCK periods */ +#define SUPC_WUMR_WKUPDBC_32768SCLK (0x5 << 12) /**< \brief (SUPC_WUMR) An enabled wake-up input shall be active for at least 32,768 SLCK periods */ +/* -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- */ +#define SUPC_WUIR_WKUPEN0 (0x1 << 0) /**< \brief (SUPC_WUIR) Wake Up Input Enable 0 */ +#define SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN0_ENABLE (0x1 << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN1 (0x1 << 1) /**< \brief (SUPC_WUIR) Wake Up Input Enable 1 */ +#define SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN1_ENABLE (0x1 << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN2 (0x1 << 2) /**< \brief (SUPC_WUIR) Wake Up Input Enable 2 */ +#define SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN2_ENABLE (0x1 << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN3 (0x1 << 3) /**< \brief (SUPC_WUIR) Wake Up Input Enable 3 */ +#define SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN3_ENABLE (0x1 << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN4 (0x1 << 4) /**< \brief (SUPC_WUIR) Wake Up Input Enable 4 */ +#define SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN4_ENABLE (0x1 << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN5 (0x1 << 5) /**< \brief (SUPC_WUIR) Wake Up Input Enable 5 */ +#define SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN5_ENABLE (0x1 << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN6 (0x1 << 6) /**< \brief (SUPC_WUIR) Wake Up Input Enable 6 */ +#define SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN6_ENABLE (0x1 << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN7 (0x1 << 7) /**< \brief (SUPC_WUIR) Wake Up Input Enable 7 */ +#define SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN7_ENABLE (0x1 << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN8 (0x1 << 8) /**< \brief (SUPC_WUIR) Wake Up Input Enable 8 */ +#define SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN8_ENABLE (0x1 << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN9 (0x1 << 9) /**< \brief (SUPC_WUIR) Wake Up Input Enable 9 */ +#define SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN9_ENABLE (0x1 << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN10 (0x1 << 10) /**< \brief (SUPC_WUIR) Wake Up Input Enable 10 */ +#define SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN10_ENABLE (0x1 << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN11 (0x1 << 11) /**< \brief (SUPC_WUIR) Wake Up Input Enable 11 */ +#define SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN11_ENABLE (0x1 << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN12 (0x1 << 12) /**< \brief (SUPC_WUIR) Wake Up Input Enable 12 */ +#define SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN12_ENABLE (0x1 << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN13 (0x1 << 13) /**< \brief (SUPC_WUIR) Wake Up Input Enable 13 */ +#define SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN13_ENABLE (0x1 << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN14 (0x1 << 14) /**< \brief (SUPC_WUIR) Wake Up Input Enable 14 */ +#define SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN14_ENABLE (0x1 << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPEN15 (0x1 << 15) /**< \brief (SUPC_WUIR) Wake Up Input Enable 15 */ +#define SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ +#define SUPC_WUIR_WKUPEN15_ENABLE (0x1 << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT0 (0x1 << 16) /**< \brief (SUPC_WUIR) Wake Up Input Transition 0 */ +#define SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0 << 16) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1 << 16) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT1 (0x1 << 17) /**< \brief (SUPC_WUIR) Wake Up Input Transition 1 */ +#define SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0 << 17) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1 << 17) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT2 (0x1 << 18) /**< \brief (SUPC_WUIR) Wake Up Input Transition 2 */ +#define SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0 << 18) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1 << 18) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT3 (0x1 << 19) /**< \brief (SUPC_WUIR) Wake Up Input Transition 3 */ +#define SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0 << 19) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1 << 19) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT4 (0x1 << 20) /**< \brief (SUPC_WUIR) Wake Up Input Transition 4 */ +#define SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0 << 20) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1 << 20) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT5 (0x1 << 21) /**< \brief (SUPC_WUIR) Wake Up Input Transition 5 */ +#define SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0 << 21) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1 << 21) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT6 (0x1 << 22) /**< \brief (SUPC_WUIR) Wake Up Input Transition 6 */ +#define SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0 << 22) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1 << 22) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT7 (0x1 << 23) /**< \brief (SUPC_WUIR) Wake Up Input Transition 7 */ +#define SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0 << 23) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1 << 23) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT8 (0x1 << 24) /**< \brief (SUPC_WUIR) Wake Up Input Transition 8 */ +#define SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0 << 24) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1 << 24) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT9 (0x1 << 25) /**< \brief (SUPC_WUIR) Wake Up Input Transition 9 */ +#define SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0 << 25) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1 << 25) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT10 (0x1 << 26) /**< \brief (SUPC_WUIR) Wake Up Input Transition 10 */ +#define SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0 << 26) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1 << 26) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT11 (0x1 << 27) /**< \brief (SUPC_WUIR) Wake Up Input Transition 11 */ +#define SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0 << 27) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1 << 27) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT12 (0x1 << 28) /**< \brief (SUPC_WUIR) Wake Up Input Transition 12 */ +#define SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0 << 28) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1 << 28) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT13 (0x1 << 29) /**< \brief (SUPC_WUIR) Wake Up Input Transition 13 */ +#define SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0 << 29) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1 << 29) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT14 (0x1 << 30) /**< \brief (SUPC_WUIR) Wake Up Input Transition 14 */ +#define SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0 << 30) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1 << 30) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT15 (0x1 << 31) /**< \brief (SUPC_WUIR) Wake Up Input Transition 15 */ +#define SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0 << 31) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +#define SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1 << 31) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ +/* -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- */ +#define SUPC_SR_WKUPS (0x1 << 1) /**< \brief (SUPC_SR) WKUP Wake Up Status */ +#define SUPC_SR_WKUPS_NO (0x0 << 1) /**< \brief (SUPC_SR) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ +#define SUPC_SR_WKUPS_PRESENT (0x1 << 1) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ +#define SUPC_SR_SMWS (0x1 << 2) /**< \brief (SUPC_SR) Supply Monitor Detection Wake Up Status */ +#define SUPC_SR_SMWS_NO (0x0 << 2) /**< \brief (SUPC_SR) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ +#define SUPC_SR_SMWS_PRESENT (0x1 << 2) /**< \brief (SUPC_SR) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ +#define SUPC_SR_BODRSTS (0x1 << 3) /**< \brief (SUPC_SR) Brownout Detector Reset Status */ +#define SUPC_SR_BODRSTS_NO (0x0 << 3) /**< \brief (SUPC_SR) no core brownout rising edge event has been detected since the last read of the SUPC_SR. */ +#define SUPC_SR_BODRSTS_PRESENT (0x1 << 3) /**< \brief (SUPC_SR) at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. */ +#define SUPC_SR_SMRSTS (0x1 << 4) /**< \brief (SUPC_SR) Supply Monitor Reset Status */ +#define SUPC_SR_SMRSTS_NO (0x0 << 4) /**< \brief (SUPC_SR) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ +#define SUPC_SR_SMRSTS_PRESENT (0x1 << 4) /**< \brief (SUPC_SR) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ +#define SUPC_SR_SMS (0x1 << 5) /**< \brief (SUPC_SR) Supply Monitor Status */ +#define SUPC_SR_SMS_NO (0x0 << 5) /**< \brief (SUPC_SR) no supply monitor detection since the last read of SUPC_SR. */ +#define SUPC_SR_SMS_PRESENT (0x1 << 5) /**< \brief (SUPC_SR) at least one supply monitor detection since the last read of SUPC_SR. */ +#define SUPC_SR_SMOS (0x1 << 6) /**< \brief (SUPC_SR) Supply Monitor Output Status */ +#define SUPC_SR_SMOS_HIGH (0x0 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO higher than its threshold at its last measurement. */ +#define SUPC_SR_SMOS_LOW (0x1 << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO lower than its threshold at its last measurement. */ +#define SUPC_SR_OSCSEL (0x1 << 7) /**< \brief (SUPC_SR) 32-kHz Oscillator Selection Status */ +#define SUPC_SR_OSCSEL_RC (0x0 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. */ +#define SUPC_SR_OSCSEL_CRYST (0x1 << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. */ +#define SUPC_SR_WKUPIS0 (0x1 << 16) /**< \brief (SUPC_SR) WKUP Input Status 0 */ +#define SUPC_SR_WKUPIS0_DIS (0x0 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS0_EN (0x1 << 16) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS1 (0x1 << 17) /**< \brief (SUPC_SR) WKUP Input Status 1 */ +#define SUPC_SR_WKUPIS1_DIS (0x0 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS1_EN (0x1 << 17) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS2 (0x1 << 18) /**< \brief (SUPC_SR) WKUP Input Status 2 */ +#define SUPC_SR_WKUPIS2_DIS (0x0 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS2_EN (0x1 << 18) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS3 (0x1 << 19) /**< \brief (SUPC_SR) WKUP Input Status 3 */ +#define SUPC_SR_WKUPIS3_DIS (0x0 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS3_EN (0x1 << 19) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS4 (0x1 << 20) /**< \brief (SUPC_SR) WKUP Input Status 4 */ +#define SUPC_SR_WKUPIS4_DIS (0x0 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS4_EN (0x1 << 20) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS5 (0x1 << 21) /**< \brief (SUPC_SR) WKUP Input Status 5 */ +#define SUPC_SR_WKUPIS5_DIS (0x0 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS5_EN (0x1 << 21) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS6 (0x1 << 22) /**< \brief (SUPC_SR) WKUP Input Status 6 */ +#define SUPC_SR_WKUPIS6_DIS (0x0 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS6_EN (0x1 << 22) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS7 (0x1 << 23) /**< \brief (SUPC_SR) WKUP Input Status 7 */ +#define SUPC_SR_WKUPIS7_DIS (0x0 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS7_EN (0x1 << 23) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS8 (0x1 << 24) /**< \brief (SUPC_SR) WKUP Input Status 8 */ +#define SUPC_SR_WKUPIS8_DIS (0x0 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS8_EN (0x1 << 24) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS9 (0x1 << 25) /**< \brief (SUPC_SR) WKUP Input Status 9 */ +#define SUPC_SR_WKUPIS9_DIS (0x0 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS9_EN (0x1 << 25) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS10 (0x1 << 26) /**< \brief (SUPC_SR) WKUP Input Status 10 */ +#define SUPC_SR_WKUPIS10_DIS (0x0 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS10_EN (0x1 << 26) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS11 (0x1 << 27) /**< \brief (SUPC_SR) WKUP Input Status 11 */ +#define SUPC_SR_WKUPIS11_DIS (0x0 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS11_EN (0x1 << 27) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS12 (0x1 << 28) /**< \brief (SUPC_SR) WKUP Input Status 12 */ +#define SUPC_SR_WKUPIS12_DIS (0x0 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS12_EN (0x1 << 28) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS13 (0x1 << 29) /**< \brief (SUPC_SR) WKUP Input Status 13 */ +#define SUPC_SR_WKUPIS13_DIS (0x0 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS13_EN (0x1 << 29) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS14 (0x1 << 30) /**< \brief (SUPC_SR) WKUP Input Status 14 */ +#define SUPC_SR_WKUPIS14_DIS (0x0 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS14_EN (0x1 << 30) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS15 (0x1 << 31) /**< \brief (SUPC_SR) WKUP Input Status 15 */ +#define SUPC_SR_WKUPIS15_DIS (0x0 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ +#define SUPC_SR_WKUPIS15_EN (0x1 << 31) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Timer Counter */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_TC Timer Counter */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief TcChannel hardware registers */ +typedef struct { + RwReg TC_CCR; /**< \brief (TcChannel Offset: 0x0) Channel Control Register */ + RwReg TC_CMR; /**< \brief (TcChannel Offset: 0x4) Channel Mode Register */ + RwReg Reserved1[2]; + RwReg TC_CV; /**< \brief (TcChannel Offset: 0x10) Counter Value */ + RwReg TC_RA; /**< \brief (TcChannel Offset: 0x14) Register A */ + RwReg TC_RB; /**< \brief (TcChannel Offset: 0x18) Register B */ + RwReg TC_RC; /**< \brief (TcChannel Offset: 0x1C) Register C */ + RwReg TC_SR; /**< \brief (TcChannel Offset: 0x20) Status Register */ + RwReg TC_IER; /**< \brief (TcChannel Offset: 0x24) Interrupt Enable Register */ + RwReg TC_IDR; /**< \brief (TcChannel Offset: 0x28) Interrupt Disable Register */ + RwReg TC_IMR; /**< \brief (TcChannel Offset: 0x2C) Interrupt Mask Register */ + RwReg Reserved2[4]; +} TcChannel; +/** \brief Tc hardware registers */ +typedef struct { + TcChannel TC_CHANNEL[3]; /**< \brief (Tc Offset: 0x0) channel = 0 .. 2 */ + WoReg TC_BCR; /**< \brief (Tc Offset: 0xC0) Block Control Register */ + RwReg TC_BMR; /**< \brief (Tc Offset: 0xC4) Block Mode Register */ + WoReg TC_QIER; /**< \brief (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ + WoReg TC_QIDR; /**< \brief (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ + RoReg TC_QIMR; /**< \brief (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ + RoReg TC_QISR; /**< \brief (Tc Offset: 0xD4) QDEC Interrupt Status Register */ + RwReg TC_FMR; /**< \brief (Tc Offset: 0xD8) Fault Mode Register */ + RwReg Reserved1[2]; + RwReg TC_WPMR; /**< \brief (Tc Offset: 0xE4) Write Protect Mode Register */ + RwReg Reserved2[5]; + RoReg TC_VER; /**< \brief (Tc Offset: 0xFC) Version Register */ +} Tc; +#endif /* __ASSEMBLY__ */ +/* -------- TC_CCR0 : (TC Offset: 0x0) Channel Control Register (channel = 0) -------- */ + +#define TC_CCR_CLKEN TC_CCR0_CLKEN /**< \brief (TC_CCR) Counter Clock Enable Command */ +#define TC_CCR_CLKDIS TC_CCR0_CLKDIS /**< \brief (TC_CCR) Counter Clock Disable Command */ +#define TC_CCR_SWTRG TC_CCR0_SWTRG /**< \brief (TC_CCR) Software Trigger Command */ + +#define TC_CCR0_CLKEN (0x1 << 0) /**< \brief (TC_CCR0) Counter Clock Enable Command */ +#define TC_CCR0_CLKDIS (0x1 << 1) /**< \brief (TC_CCR0) Counter Clock Disable Command */ +#define TC_CCR0_SWTRG (0x1 << 2) /**< \brief (TC_CCR0) Software Trigger Command */ +/* -------- TC_CMR0 : (TC Offset: 0x4) Channel Mode Register (channel = 0) -------- */ +#define TC_CMR0_TCCLKS (0x7 << 0) /**< \brief (TC_CMR0) Clock Selection */ +#define TC_CM0_TCCLKS_TIMER_DIV1_CLOCK (0x0 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV1_CLOCK*/ +#define TC_CM0_TCCLKS_TIMER_DIV2_CLOCK (0x1 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV2_CLOCK*/ +#define TC_CM0_TCCLKS_TIMER_DIV3_CLOCK (0x2 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV3_CLOCK*/ +#define TC_CM0_TCCLKS_TIMER_DIV4_CLOCK (0x3 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV4_CLOCK*/ +#define TC_CM0_TCCLKS_TIMER_DIV5_CLOCK (0x4 << 0) /**< (TC_CMR0) Clock selected: TIMER_DIV5_CLOCK*/ +#define TC_CM0_TCCLKS_XC0 (0x5 << 0) /**< (TC_CMR0) Clock selected: XC0*/ +#define TC_CM0_TCCLKS_XC1 (0x6 << 0) /**< (TC_CMR0) Clock selected: XC1*/ +#define TC_CM0_TCCLKS_XC2 (0x7 << 0) /**< (TC_CMR0) Clock selected: XC2*/ +#define TC_CMR0_CLKI (0x1 << 3) /**< \brief (TC_CMR0) Clock Invert */ +#define TC_CMR0_BURST (0x3 << 4) /**< \brief (TC_CMR0) Burst Signal Selection */ +#define TC_CMR0_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR0) The clock is not gated by an external signal. */ +#define TC_CMR0_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR0) XC0 is ANDed with the selected clock. */ +#define TC_CMR0_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR0) XC1 is ANDed with the selected clock. */ +#define TC_CMR0_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR0) XC2 is ANDed with the selected clock. */ +#define TC_CMR0_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR0) Counter Clock Stopped with RB Loading */ +#define TC_CMR0_LDBDIS (0x1 << 7) /**< \brief (TC_CMR0) Counter Clock Disable with RB Loading */ +#define TC_CMR0_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR0) External Trigger Edge Selection */ +#define TC_CMR0_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR0) none */ +#define TC_CMR0_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR0) rising edge */ +#define TC_CMR0_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR0) falling edge */ +#define TC_CMR0_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR0) each edge */ +#define TC_CMR0_ABETRG (0x1 << 10) /**< \brief (TC_CMR0) TIOA or TIOB External Trigger Selection */ + +#define TC_CMR_CPCTRG TC_CMR0_CPCTRG +#define TC_CMR0_CPCTRG (0x1 << 14) /**< \brief (TC_CMR0) RC Compare Trigger Enable */ +#define TC_CMR0_WAVE (0x1 << 15) /**< \brief (TC_CMR0) */ +#define TC_CMR0_LDRA (0x3 << 16) /**< \brief (TC_CMR0) RA Loading Selection */ +#define TC_CMR0_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR0) none */ +#define TC_CMR0_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR0) rising edge of TIOA */ +#define TC_CMR0_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR0) falling edge of TIOA */ +#define TC_CMR0_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR0) each edge of TIOA */ +#define TC_CMR0_LDRB (0x3 << 18) /**< \brief (TC_CMR0) RB Loading Selection */ +#define TC_CMR0_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR0) none */ +#define TC_CMR0_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR0) rising edge of TIOA */ +#define TC_CMR0_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR0) falling edge of TIOA */ +#define TC_CMR0_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR0) each edge of TIOA */ + +#define TC_CMR0_ACPA_NONE (0x0 << 16) // (TC) Effect: none +#define TC_CMR0_ACPA_SET (0x1 << 16) // (TC) Effect: set +#define TC_CMR0_ACPA_CLEAR (0x2 << 16) // (TC) Effect: clear +#define TC_CMR0_ACPA_TOGGLE (0x3 << 16) // (TC) Effect: toggle + +#define TC_CMR0_ACPC_NONE (0x0 << 18) // (TC) Effect: none +#define TC_CMR0_ACPC_SET (0x1 << 18) // (TC) Effect: set +#define TC_CMR0_ACPC_CLEAR (0x2 << 18) // (TC) Effect: clear +#define TC_CMR0_ACPC_TOGGLE (0x3 << 18) // (TC) Effect: toggle +/* -------- TC_CV0 : (TC Offset: 0x10) Counter Value (channel = 0) -------- */ +#define TC_CV0_CV (0xffff << 0) /**< \brief (TC_CV0) Counter Value */ +/* -------- TC_RA0 : (TC Offset: 0x14) Register A (channel = 0) -------- */ +#define TC_RA0_RA (0xffff << 0) /**< \brief (TC_RA0) Register A */ +/* -------- TC_RB0 : (TC Offset: 0x18) Register B (channel = 0) -------- */ +#define TC_RB0_RB (0xffff << 0) /**< \brief (TC_RB0) Register B */ +/* -------- TC_RC0 : (TC Offset: 0x1C) Register C (channel = 0) -------- */ +#define TC_RC0_RC (0xffff << 0) /**< \brief (TC_RC0) Register C */ +/* -------- TC_SR0 : (TC Offset: 0x20) Status Register (channel = 0) -------- */ +#define TC_SR0_COVFS (0x1 << 0) /**< \brief (TC_SR0) Counter Overflow Status */ +#define TC_SR0_LOVRS (0x1 << 1) /**< \brief (TC_SR0) Load Overrun Status */ +#define TC_SR0_CPAS (0x1 << 2) /**< \brief (TC_SR0) RA Compare Status */ +#define TC_SR0_CPBS (0x1 << 3) /**< \brief (TC_SR0) RB Compare Status */ +#define TC_SR0_CPCS (0x1 << 4) /**< \brief (TC_SR0) RC Compare Status */ +#define TC_SR0_LDRAS (0x1 << 5) /**< \brief (TC_SR0) RA Loading Status */ +#define TC_SR0_LDRBS (0x1 << 6) /**< \brief (TC_SR0) RB Loading Status */ +#define TC_SR0_ETRGS (0x1 << 7) /**< \brief (TC_SR0) External Trigger Status */ +#define TC_SR0_CLKSTA (0x1 << 16) /**< \brief (TC_SR0) Clock Enabling Status */ +#define TC_SR0_MTIOA (0x1 << 17) /**< \brief (TC_SR0) TIOA Mirror */ +#define TC_SR0_MTIOB (0x1 << 18) /**< \brief (TC_SR0) TIOB Mirror */ +/* -------- TC_IER0 : (TC Offset: 0x24) Interrupt Enable Register (channel = 0) -------- */ +#define TC_IER0_COVFS (0x1 << 0) /**< \brief (TC_IER0) Counter Overflow */ +#define TC_IER0_LOVRS (0x1 << 1) /**< \brief (TC_IER0) Load Overrun */ +#define TC_IER0_CPAS (0x1 << 2) /**< \brief (TC_IER0) RA Compare */ +#define TC_IER0_CPBS (0x1 << 3) /**< \brief (TC_IER0) RB Compare */ + +#define TC_IER_CPCS TC_IER0_CPCS +#define TC_IER0_CPCS (0x1 << 4) /**< \brief (TC_IER0) RC Compare */ +#define TC_IER0_LDRAS (0x1 << 5) /**< \brief (TC_IER0) RA Loading */ +#define TC_IER0_LDRBS (0x1 << 6) /**< \brief (TC_IER0) RB Loading */ +#define TC_IER0_ETRGS (0x1 << 7) /**< \brief (TC_IER0) External Trigger */ +/* -------- TC_IDR0 : (TC Offset: 0x28) Interrupt Disable Register (channel = 0) -------- */ +#define TC_IDR0_COVFS (0x1 << 0) /**< \brief (TC_IDR0) Counter Overflow */ +#define TC_IDR0_LOVRS (0x1 << 1) /**< \brief (TC_IDR0) Load Overrun */ +#define TC_IDR0_CPAS (0x1 << 2) /**< \brief (TC_IDR0) RA Compare */ +#define TC_IDR0_CPBS (0x1 << 3) /**< \brief (TC_IDR0) RB Compare */ +#define TC_IDR0_CPCS (0x1 << 4) /**< \brief (TC_IDR0) RC Compare */ +#define TC_IDR0_LDRAS (0x1 << 5) /**< \brief (TC_IDR0) RA Loading */ +#define TC_IDR0_LDRBS (0x1 << 6) /**< \brief (TC_IDR0) RB Loading */ +#define TC_IDR0_ETRGS (0x1 << 7) /**< \brief (TC_IDR0) External Trigger */ +/* -------- TC_IMR0 : (TC Offset: 0x2C) Interrupt Mask Register (channel = 0) -------- */ +#define TC_IMR0_COVFS (0x1 << 0) /**< \brief (TC_IMR0) Counter Overflow */ +#define TC_IMR0_LOVRS (0x1 << 1) /**< \brief (TC_IMR0) Load Overrun */ +#define TC_IMR0_CPAS (0x1 << 2) /**< \brief (TC_IMR0) RA Compare */ +#define TC_IMR0_CPBS (0x1 << 3) /**< \brief (TC_IMR0) RB Compare */ +#define TC_IMR0_CPCS (0x1 << 4) /**< \brief (TC_IMR0) RC Compare */ +#define TC_IMR0_LDRAS (0x1 << 5) /**< \brief (TC_IMR0) RA Loading */ +#define TC_IMR0_LDRBS (0x1 << 6) /**< \brief (TC_IMR0) RB Loading */ +#define TC_IMR0_ETRGS (0x1 << 7) /**< \brief (TC_IMR0) External Trigger */ +/* -------- TC_CCR1 : (TC Offset: 0x40) Channel Control Register (channel = 1) -------- */ +#define TC_CCR1_CLKEN (0x1 << 0) /**< \brief (TC_CCR1) Counter Clock Enable Command */ +#define TC_CCR1_CLKDIS (0x1 << 1) /**< \brief (TC_CCR1) Counter Clock Disable Command */ +#define TC_CCR1_SWTRG (0x1 << 2) /**< \brief (TC_CCR1) Software Trigger Command */ +/* -------- TC_CMR1 : (TC Offset: 0x44) Channel Mode Register (channel = 1) -------- */ +#define TC_CMR1_TCCLKS (0x7 << 0) /**< \brief (TC_CMR1) Clock Selection */ +#define TC_CMR1_CLKI (0x1 << 3) /**< \brief (TC_CMR1) Clock Invert */ +#define TC_CMR1_BURST (0x3 << 4) /**< \brief (TC_CMR1) Burst Signal Selection */ +#define TC_CMR1_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR1) The clock is not gated by an external signal. */ +#define TC_CMR1_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR1) XC0 is ANDed with the selected clock. */ +#define TC_CMR1_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR1) XC1 is ANDed with the selected clock. */ +#define TC_CMR1_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR1) XC2 is ANDed with the selected clock. */ +#define TC_CMR1_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR1) Counter Clock Stopped with RB Loading */ +#define TC_CMR1_LDBDIS (0x1 << 7) /**< \brief (TC_CMR1) Counter Clock Disable with RB Loading */ +#define TC_CMR1_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR1) External Trigger Edge Selection */ +#define TC_CMR1_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR1) none */ +#define TC_CMR1_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR1) rising edge */ +#define TC_CMR1_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR1) falling edge */ +#define TC_CMR1_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR1) each edge */ +#define TC_CMR1_ABETRG (0x1 << 10) /**< \brief (TC_CMR1) TIOA or TIOB External Trigger Selection */ +#define TC_CMR1_CPCTRG (0x1 << 14) /**< \brief (TC_CMR1) RC Compare Trigger Enable */ +#define TC_CMR1_WAVE (0x1 << 15) /**< \brief (TC_CMR1) */ +#define TC_CMR1_LDRA (0x3 << 16) /**< \brief (TC_CMR1) RA Loading Selection */ +#define TC_CMR1_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR1) none */ +#define TC_CMR1_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR1) rising edge of TIOA */ +#define TC_CMR1_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR1) falling edge of TIOA */ +#define TC_CMR1_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR1) each edge of TIOA */ +#define TC_CMR1_LDRB (0x3 << 18) /**< \brief (TC_CMR1) RB Loading Selection */ +#define TC_CMR1_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR1) none */ +#define TC_CMR1_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR1) rising edge of TIOA */ +#define TC_CMR1_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR1) falling edge of TIOA */ +#define TC_CMR1_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR1) each edge of TIOA */ +/* -------- TC_CV1 : (TC Offset: 0x50) Counter Value (channel = 1) -------- */ +#define TC_CV1_CV (0xffff << 0) /**< \brief (TC_CV1) Counter Value */ +/* -------- TC_RA1 : (TC Offset: 0x54) Register A (channel = 1) -------- */ +#define TC_RA1_RA (0xffff << 0) /**< \brief (TC_RA1) Register A */ +/* -------- TC_RB1 : (TC Offset: 0x58) Register B (channel = 1) -------- */ +#define TC_RB1_RB (0xffff << 0) /**< \brief (TC_RB1) Register B */ +/* -------- TC_RC1 : (TC Offset: 0x5C) Register C (channel = 1) -------- */ +#define TC_RC1_RC (0xffff << 0) /**< \brief (TC_RC1) Register C */ +/* -------- TC_SR1 : (TC Offset: 0x60) Status Register (channel = 1) -------- */ +#define TC_SR1_COVFS (0x1 << 0) /**< \brief (TC_SR1) Counter Overflow Status */ +#define TC_SR1_LOVRS (0x1 << 1) /**< \brief (TC_SR1) Load Overrun Status */ +#define TC_SR1_CPAS (0x1 << 2) /**< \brief (TC_SR1) RA Compare Status */ +#define TC_SR1_CPBS (0x1 << 3) /**< \brief (TC_SR1) RB Compare Status */ +#define TC_SR1_CPCS (0x1 << 4) /**< \brief (TC_SR1) RC Compare Status */ +#define TC_SR1_LDRAS (0x1 << 5) /**< \brief (TC_SR1) RA Loading Status */ +#define TC_SR1_LDRBS (0x1 << 6) /**< \brief (TC_SR1) RB Loading Status */ +#define TC_SR1_ETRGS (0x1 << 7) /**< \brief (TC_SR1) External Trigger Status */ +#define TC_SR1_CLKSTA (0x1 << 16) /**< \brief (TC_SR1) Clock Enabling Status */ +#define TC_SR1_MTIOA (0x1 << 17) /**< \brief (TC_SR1) TIOA Mirror */ +#define TC_SR1_MTIOB (0x1 << 18) /**< \brief (TC_SR1) TIOB Mirror */ +/* -------- TC_IER1 : (TC Offset: 0x64) Interrupt Enable Register (channel = 1) -------- */ +#define TC_IER1_COVFS (0x1 << 0) /**< \brief (TC_IER1) Counter Overflow */ +#define TC_IER1_LOVRS (0x1 << 1) /**< \brief (TC_IER1) Load Overrun */ +#define TC_IER1_CPAS (0x1 << 2) /**< \brief (TC_IER1) RA Compare */ +#define TC_IER1_CPBS (0x1 << 3) /**< \brief (TC_IER1) RB Compare */ +#define TC_IER1_CPCS (0x1 << 4) /**< \brief (TC_IER1) RC Compare */ +#define TC_IER1_LDRAS (0x1 << 5) /**< \brief (TC_IER1) RA Loading */ +#define TC_IER1_LDRBS (0x1 << 6) /**< \brief (TC_IER1) RB Loading */ +#define TC_IER1_ETRGS (0x1 << 7) /**< \brief (TC_IER1) External Trigger */ +/* -------- TC_IDR1 : (TC Offset: 0x68) Interrupt Disable Register (channel = 1) -------- */ +#define TC_IDR1_COVFS (0x1 << 0) /**< \brief (TC_IDR1) Counter Overflow */ +#define TC_IDR1_LOVRS (0x1 << 1) /**< \brief (TC_IDR1) Load Overrun */ +#define TC_IDR1_CPAS (0x1 << 2) /**< \brief (TC_IDR1) RA Compare */ +#define TC_IDR1_CPBS (0x1 << 3) /**< \brief (TC_IDR1) RB Compare */ +#define TC_IDR1_CPCS (0x1 << 4) /**< \brief (TC_IDR1) RC Compare */ +#define TC_IDR1_LDRAS (0x1 << 5) /**< \brief (TC_IDR1) RA Loading */ +#define TC_IDR1_LDRBS (0x1 << 6) /**< \brief (TC_IDR1) RB Loading */ +#define TC_IDR1_ETRGS (0x1 << 7) /**< \brief (TC_IDR1) External Trigger */ +/* -------- TC_IMR1 : (TC Offset: 0x6C) Interrupt Mask Register (channel = 1) -------- */ +#define TC_IMR1_COVFS (0x1 << 0) /**< \brief (TC_IMR1) Counter Overflow */ +#define TC_IMR1_LOVRS (0x1 << 1) /**< \brief (TC_IMR1) Load Overrun */ +#define TC_IMR1_CPAS (0x1 << 2) /**< \brief (TC_IMR1) RA Compare */ +#define TC_IMR1_CPBS (0x1 << 3) /**< \brief (TC_IMR1) RB Compare */ +#define TC_IMR1_CPCS (0x1 << 4) /**< \brief (TC_IMR1) RC Compare */ +#define TC_IMR1_LDRAS (0x1 << 5) /**< \brief (TC_IMR1) RA Loading */ +#define TC_IMR1_LDRBS (0x1 << 6) /**< \brief (TC_IMR1) RB Loading */ +#define TC_IMR1_ETRGS (0x1 << 7) /**< \brief (TC_IMR1) External Trigger */ +/* -------- TC_CCR2 : (TC Offset: 0x80) Channel Control Register (channel = 2) -------- */ +#define TC_CCR2_CLKEN (0x1 << 0) /**< \brief (TC_CCR2) Counter Clock Enable Command */ +#define TC_CCR2_CLKDIS (0x1 << 1) /**< \brief (TC_CCR2) Counter Clock Disable Command */ +#define TC_CCR2_SWTRG (0x1 << 2) /**< \brief (TC_CCR2) Software Trigger Command */ +/* -------- TC_CMR2 : (TC Offset: 0x84) Channel Mode Register (channel = 2) -------- */ +#define TC_CMR2_TCCLKS (0x7 << 0) /**< \brief (TC_CMR2) Clock Selection */ +#define TC_CMR2_CLKI (0x1 << 3) /**< \brief (TC_CMR2) Clock Invert */ +#define TC_CMR2_BURST (0x3 << 4) /**< \brief (TC_CMR2) Burst Signal Selection */ +#define TC_CMR2_BURST_NONE (0x0 << 4) /**< \brief (TC_CMR2) The clock is not gated by an external signal. */ +#define TC_CMR2_BURST_XC0 (0x1 << 4) /**< \brief (TC_CMR2) XC0 is ANDed with the selected clock. */ +#define TC_CMR2_BURST_XC1 (0x2 << 4) /**< \brief (TC_CMR2) XC1 is ANDed with the selected clock. */ +#define TC_CMR2_BURST_XC2 (0x3 << 4) /**< \brief (TC_CMR2) XC2 is ANDed with the selected clock. */ +#define TC_CMR2_LDBSTOP (0x1 << 6) /**< \brief (TC_CMR2) Counter Clock Stopped with RB Loading */ +#define TC_CMR2_LDBDIS (0x1 << 7) /**< \brief (TC_CMR2) Counter Clock Disable with RB Loading */ +#define TC_CMR2_ETRGEDG (0x3 << 8) /**< \brief (TC_CMR2) External Trigger Edge Selection */ +#define TC_CMR2_ETRGEDG_NONE (0x0 << 8) /**< \brief (TC_CMR2) none */ +#define TC_CMR2_ETRGEDG_RISING (0x1 << 8) /**< \brief (TC_CMR2) rising edge */ +#define TC_CMR2_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR2) falling edge */ +#define TC_CMR2_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR2) each edge */ +#define TC_CMR2_ABETRG (0x1 << 10) /**< \brief (TC_CMR2) TIOA or TIOB External Trigger Selection */ +#define TC_CMR2_CPCTRG (0x1 << 14) /**< \brief (TC_CMR2) RC Compare Trigger Enable */ +#define TC_CMR2_WAVE (0x1 << 15) /**< \brief (TC_CMR2) */ +#define TC_CMR2_LDRA (0x3 << 16) /**< \brief (TC_CMR2) RA Loading Selection */ +#define TC_CMR2_LDRA_NONE (0x0 << 16) /**< \brief (TC_CMR2) none */ +#define TC_CMR2_LDRA_RISING (0x1 << 16) /**< \brief (TC_CMR2) rising edge of TIOA */ +#define TC_CMR2_LDRA_FALLING (0x2 << 16) /**< \brief (TC_CMR2) falling edge of TIOA */ +#define TC_CMR2_LDRA_BOTH (0x3 << 16) /**< \brief (TC_CMR2) each edge of TIOA */ +#define TC_CMR2_LDRB (0x3 << 18) /**< \brief (TC_CMR2) RB Loading Selection */ +#define TC_CMR2_LDRB_NONE (0x0 << 18) /**< \brief (TC_CMR2) none */ +#define TC_CMR2_LDRB_RISING (0x1 << 18) /**< \brief (TC_CMR2) rising edge of TIOA */ +#define TC_CMR2_LDRB_FALLING (0x2 << 18) /**< \brief (TC_CMR2) falling edge of TIOA */ +#define TC_CMR2_LDRB_BOTH (0x3 << 18) /**< \brief (TC_CMR2) each edge of TIOA */ +/* -------- TC_CV2 : (TC Offset: 0x90) Counter Value (channel = 2) -------- */ +#define TC_CV2_CV (0xffff << 0) /**< \brief (TC_CV2) Counter Value */ +/* -------- TC_RA2 : (TC Offset: 0x94) Register A (channel = 2) -------- */ +#define TC_RA2_RA (0xffff << 0) /**< \brief (TC_RA2) Register A */ +/* -------- TC_RB2 : (TC Offset: 0x98) Register B (channel = 2) -------- */ +#define TC_RB2_RB (0xffff << 0) /**< \brief (TC_RB2) Register B */ +/* -------- TC_RC2 : (TC Offset: 0x9C) Register C (channel = 2) -------- */ +#define TC_RC2_RC (0xffff << 0) /**< \brief (TC_RC2) Register C */ +/* -------- TC_SR2 : (TC Offset: 0xA0) Status Register (channel = 2) -------- */ +#define TC_SR2_COVFS (0x1 << 0) /**< \brief (TC_SR2) Counter Overflow Status */ +#define TC_SR2_LOVRS (0x1 << 1) /**< \brief (TC_SR2) Load Overrun Status */ +#define TC_SR2_CPAS (0x1 << 2) /**< \brief (TC_SR2) RA Compare Status */ +#define TC_SR2_CPBS (0x1 << 3) /**< \brief (TC_SR2) RB Compare Status */ +#define TC_SR2_CPCS (0x1 << 4) /**< \brief (TC_SR2) RC Compare Status */ +#define TC_SR2_LDRAS (0x1 << 5) /**< \brief (TC_SR2) RA Loading Status */ +#define TC_SR2_LDRBS (0x1 << 6) /**< \brief (TC_SR2) RB Loading Status */ +#define TC_SR2_ETRGS (0x1 << 7) /**< \brief (TC_SR2) External Trigger Status */ +#define TC_SR2_CLKSTA (0x1 << 16) /**< \brief (TC_SR2) Clock Enabling Status */ +#define TC_SR2_MTIOA (0x1 << 17) /**< \brief (TC_SR2) TIOA Mirror */ +#define TC_SR2_MTIOB (0x1 << 18) /**< \brief (TC_SR2) TIOB Mirror */ +/* -------- TC_IER2 : (TC Offset: 0xA4) Interrupt Enable Register (channel = 2) -------- */ +#define TC_IER2_COVFS (0x1 << 0) /**< \brief (TC_IER2) Counter Overflow */ +#define TC_IER2_LOVRS (0x1 << 1) /**< \brief (TC_IER2) Load Overrun */ +#define TC_IER2_CPAS (0x1 << 2) /**< \brief (TC_IER2) RA Compare */ +#define TC_IER2_CPBS (0x1 << 3) /**< \brief (TC_IER2) RB Compare */ +#define TC_IER2_CPCS (0x1 << 4) /**< \brief (TC_IER2) RC Compare */ +#define TC_IER2_LDRAS (0x1 << 5) /**< \brief (TC_IER2) RA Loading */ +#define TC_IER2_LDRBS (0x1 << 6) /**< \brief (TC_IER2) RB Loading */ +#define TC_IER2_ETRGS (0x1 << 7) /**< \brief (TC_IER2) External Trigger */ +/* -------- TC_IDR2 : (TC Offset: 0xA8) Interrupt Disable Register (channel = 2) -------- */ +#define TC_IDR2_COVFS (0x1 << 0) /**< \brief (TC_IDR2) Counter Overflow */ +#define TC_IDR2_LOVRS (0x1 << 1) /**< \brief (TC_IDR2) Load Overrun */ +#define TC_IDR2_CPAS (0x1 << 2) /**< \brief (TC_IDR2) RA Compare */ +#define TC_IDR2_CPBS (0x1 << 3) /**< \brief (TC_IDR2) RB Compare */ +#define TC_IDR2_CPCS (0x1 << 4) /**< \brief (TC_IDR2) RC Compare */ +#define TC_IDR2_LDRAS (0x1 << 5) /**< \brief (TC_IDR2) RA Loading */ +#define TC_IDR2_LDRBS (0x1 << 6) /**< \brief (TC_IDR2) RB Loading */ +#define TC_IDR2_ETRGS (0x1 << 7) /**< \brief (TC_IDR2) External Trigger */ +/* -------- TC_IMR2 : (TC Offset: 0xAC) Interrupt Mask Register (channel = 2) -------- */ +#define TC_IMR2_COVFS (0x1 << 0) /**< \brief (TC_IMR2) Counter Overflow */ +#define TC_IMR2_LOVRS (0x1 << 1) /**< \brief (TC_IMR2) Load Overrun */ +#define TC_IMR2_CPAS (0x1 << 2) /**< \brief (TC_IMR2) RA Compare */ +#define TC_IMR2_CPBS (0x1 << 3) /**< \brief (TC_IMR2) RB Compare */ +#define TC_IMR2_CPCS (0x1 << 4) /**< \brief (TC_IMR2) RC Compare */ +#define TC_IMR2_LDRAS (0x1 << 5) /**< \brief (TC_IMR2) RA Loading */ +#define TC_IMR2_LDRBS (0x1 << 6) /**< \brief (TC_IMR2) RB Loading */ +#define TC_IMR2_ETRGS (0x1 << 7) /**< \brief (TC_IMR2) External Trigger */ +/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ +#define TC_BCR_SYNC (0x1 << 0) /**< \brief (TC_BCR) Synchro Command */ +/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ +#define TC_BMR_TC0XC0S (0x3 << 0) /**< \brief (TC_BMR) External Clock Signal 0 Selection */ +#define TC_BMR_TC0XC0S_TCLK0 (0x0 << 0) /**< \brief (TC_BMR) TCLK0 */ +#define TC_BMR_TC0XC0S_NONE (0x1 << 0) /**< \brief (TC_BMR) none */ +#define TC_BMR_TC0XC0S_TIOA1 (0x2 << 0) /**< \brief (TC_BMR) TIOA1 */ +#define TC_BMR_TC0XC0S_TIOA2 (0x3 << 0) /**< \brief (TC_BMR) TIOA2 */ +#define TC_BMR_TC1XC1S (0x3 << 2) /**< \brief (TC_BMR) External Clock Signal 1 Selection */ +#define TC_BMR_TC1XC1S_TCLK1 (0x0 << 2) /**< \brief (TC_BMR) TCLK1 */ +#define TC_BMR_TC1XC1S_NONE (0x1 << 2) /**< \brief (TC_BMR) none */ +#define TC_BMR_TC1XC1S_TIOA0 (0x2 << 2) /**< \brief (TC_BMR) TIOA0 */ +#define TC_BMR_TC1XC1S_TIOA2 (0x3 << 2) /**< \brief (TC_BMR) TIOA2 */ +#define TC_BMR_TC2XC2S (0x3 << 4) /**< \brief (TC_BMR) External Clock Signal 2 Selection */ +#define TC_BMR_TC2XC2S_TCLK2 (0x0 << 4) /**< \brief (TC_BMR) TCLK2 */ +#define TC_BMR_TC2XC2S_NONE (0x1 << 4) /**< \brief (TC_BMR) none */ +#define TC_BMR_TC2XC2S_TIOA0 (0x2 << 4) /**< \brief (TC_BMR) TIOA0 */ +#define TC_BMR_TC2XC2S_TIOA1 (0x3 << 4) /**< \brief (TC_BMR) TIOA1 */ +#define TC_BMR_QDEN (0x1 << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ +#define TC_BMR_POSEN (0x1 << 9) /**< \brief (TC_BMR) POSition ENabled */ +#define TC_BMR_SPEEDEN (0x1 << 10) /**< \brief (TC_BMR) SPEED ENabled */ +#define TC_BMR_QDTRANS (0x1 << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ +#define TC_BMR_EDGPHA (0x1 << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ +#define TC_BMR_INVA (0x1 << 13) /**< \brief (TC_BMR) INVerted phA */ +#define TC_BMR_INVB (0x1 << 14) /**< \brief (TC_BMR) INVerted phB */ +#define TC_BMR_INVIDX (0x1 << 15) /**< \brief (TC_BMR) INVerted InDeX */ +#define TC_BMR_SWAP (0x1 << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */ +#define TC_BMR_IDXPHB (0x1 << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ +#define TC_BMR_FILTER (0x1 << 19) /**< \brief (TC_BMR) */ +#define TC_BMR_MAXFILT (0x3f << 20) /**< \brief (TC_BMR) MAXimum FILTer */ +/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ +#define TC_QIER_IDX (0x1 << 0) /**< \brief (TC_QIER) InDeX */ +#define TC_QIER_DIRCHG (0x1 << 1) /**< \brief (TC_QIER) DIRection CHanGe */ +#define TC_QIER_QERR (0x1 << 2) /**< \brief (TC_QIER) Quadrature ERRor */ +/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ +#define TC_QIDR_IDX (0x1 << 0) /**< \brief (TC_QIDR) InDeX */ +#define TC_QIDR_DIRCHG (0x1 << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ +#define TC_QIDR_QERR (0x1 << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ +/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ +#define TC_QIMR_IDX (0x1 << 0) /**< \brief (TC_QIMR) InDeX */ +#define TC_QIMR_DIRCHG (0x1 << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ +#define TC_QIMR_QERR (0x1 << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ +/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ +#define TC_QISR_IDX (0x1 << 0) /**< \brief (TC_QISR) InDeX */ +#define TC_QISR_DIRCHG (0x1 << 1) /**< \brief (TC_QISR) DIRection CHanGe */ +#define TC_QISR_QERR (0x1 << 2) /**< \brief (TC_QISR) Quadrature ERRor */ +#define TC_QISR_DIR (0x1 << 8) /**< \brief (TC_QISR) Direction */ +/* -------- TC_FMR : (TC Offset: 0xD8) Fault Mode Register -------- */ +#define TC_FMR_ENCF0 (0x1 << 0) /**< \brief (TC_FMR) ENable Compare Fault Channel 0 */ +#define TC_FMR_ENCF1 (0x1 << 1) /**< \brief (TC_FMR) ENable Compare Fault Channel 1 */ +/* -------- TC_WPMR : (TC Offset: 0xE4) Write Protect Mode Register -------- */ +#define TC_WPMR_WPEN (0x1 << 0) /**< \brief (TC_WPMR) Write Protect Enable */ +#define TC_WPMR_WPKEY (0xffffff << 8) /**< \brief (TC_WPMR) Write Protect KEY */ +/* -------- TC_VER : (TC Offset: 0xFC) Version Register -------- */ +#define TC_VER_VERSION (0xfff << 0) /**< \brief (TC_VER) */ +#define TC_VER_MFN (0x7 << 16) /**< \brief (TC_VER) */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Two-wire Interface */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_TWI Two-wire Interface */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Twi hardware registers */ +typedef struct { + WoReg TWI_CR; /**< \brief (Twi Offset: 0x00) Control Register */ + RwReg TWI_MMR; /**< \brief (Twi Offset: 0x04) Master Mode Register */ + RwReg TWI_SMR; /**< \brief (Twi Offset: 0x08) Slave Mode Register */ + RwReg TWI_IADR; /**< \brief (Twi Offset: 0x0C) Internal Address Register */ + RwReg TWI_CWGR; /**< \brief (Twi Offset: 0x10) Clock Waveform Generator Register */ + RwReg Reserved1[3]; + RoReg TWI_SR; /**< \brief (Twi Offset: 0x20) Status Register */ + WoReg TWI_IER; /**< \brief (Twi Offset: 0x24) Interrupt Enable Register */ + WoReg TWI_IDR; /**< \brief (Twi Offset: 0x28) Interrupt Disable Register */ + RoReg TWI_IMR; /**< \brief (Twi Offset: 0x2C) Interrupt Mask Register */ + RoReg TWI_RHR; /**< \brief (Twi Offset: 0x30) Receive Holding Register */ + WoReg TWI_THR; /**< \brief (Twi Offset: 0x34) Transmit Holding Register */ + RwReg Reserved2[50]; + RwReg TWI_RPR; /**< \brief (Twi Offset: 0x100) Receive Pointer Register */ + RwReg TWI_RCR; /**< \brief (Twi Offset: 0x104) Receive Counter Register */ + RwReg TWI_TPR; /**< \brief (Twi Offset: 0x108) Transmit Pointer Register */ + RwReg TWI_TCR; /**< \brief (Twi Offset: 0x10C) Transmit Counter Register */ + RwReg TWI_RNPR; /**< \brief (Twi Offset: 0x110) Receive Next Pointer Register */ + RwReg TWI_RNCR; /**< \brief (Twi Offset: 0x114) Receive Next Counter Register */ + RwReg TWI_TNPR; /**< \brief (Twi Offset: 0x118) Transmit Next Pointer Register */ + RwReg TWI_TNCR; /**< \brief (Twi Offset: 0x11C) Transmit Next Counter Register */ + WoReg TWI_PTCR; /**< \brief (Twi Offset: 0x120) Transfer Control Register */ + RoReg TWI_PTSR; /**< \brief (Twi Offset: 0x124) Transfer Status Register */ +} Twi; +#endif /* __ASSEMBLY__ */ +/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ +#define TWI_CR_START (0x1 << 0) /**< \brief (TWI_CR) Send a START Condition */ +#define TWI_CR_STOP (0x1 << 1) /**< \brief (TWI_CR) Send a STOP Condition */ +#define TWI_CR_MSEN (0x1 << 2) /**< \brief (TWI_CR) TWI Master Mode Enabled */ +#define TWI_CR_MSDIS (0x1 << 3) /**< \brief (TWI_CR) TWI Master Mode Disabled */ +#define TWI_CR_SVEN (0x1 << 4) /**< \brief (TWI_CR) TWI Slave Mode Enabled */ +#define TWI_CR_SVDIS (0x1 << 5) /**< \brief (TWI_CR) TWI Slave Mode Disabled */ +#define TWI_CR_QUICK (0x1 << 6) /**< \brief (TWI_CR) SMBUS Quick Command */ +#define TWI_CR_SWRST (0x1 << 7) /**< \brief (TWI_CR) Software Reset */ +/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ +#define TWI_MMR_IADRSZ (0x3 << 8) /**< \brief (TWI_MMR) Internal Device Address Size */ +#define TWI_MMR_IADRSZ_NO (0x0 << 8) /**< \brief (TWI_MMR) No internal device address */ +#define TWI_MMR_IADRSZ_1_BYTE (0x1 << 8) /**< \brief (TWI_MMR) One-byte internal device address */ +#define TWI_MMR_IADRSZ_2_BYTE (0x2 << 8) /**< \brief (TWI_MMR) Two-byte internal device address */ +#define TWI_MMR_IADRSZ_3_BYTE (0x3 << 8) /**< \brief (TWI_MMR) Three-byte internal device address */ +#define TWI_MMR_MREAD (0x1 << 12) /**< \brief (TWI_MMR) Master Read Direction */ +#define TWI_MMR_DADR (0x7f << 16) /**< \brief (TWI_MMR) Device Address */ +/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ +#define TWI_SMR_SADR (0x7f << 16) /**< \brief (TWI_SMR) Slave Address */ +/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ +#define TWI_IADR_IADR (0xffffff << 0) /**< \brief (TWI_IADR) Internal Address */ +/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ +#define TWI_CWGR_CLDIV (0xff << 0) /**< \brief (TWI_CWGR) Clock Low Divider */ +#define TWI_CWGR_CHDIV (0xff << 8) /**< \brief (TWI_CWGR) Clock High Divider */ +#define TWI_CWGR_CKDIV (0x7 << 16) /**< \brief (TWI_CWGR) Clock Divider */ +/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ +#define TWI_SR_TXCOMP (0x1 << 0) /**< \brief (TWI_SR) Transmission Completed (automatically set / reset) */ +#define TWI_SR_RXRDY (0x1 << 1) /**< \brief (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ +#define TWI_SR_TXRDY (0x1 << 2) /**< \brief (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ +#define TWI_SR_SVREAD (0x1 << 3) /**< \brief (TWI_SR) Slave Read (automatically set / reset) */ +#define TWI_SR_SVACC (0x1 << 4) /**< \brief (TWI_SR) Slave Access (automatically set / reset) */ +#define TWI_SR_GACC (0x1 << 5) /**< \brief (TWI_SR) General Call Access (clear on read) */ +#define TWI_SR_OVRE (0x1 << 6) /**< \brief (TWI_SR) Overrun Error (clear on read) */ +#define TWI_SR_NACK (0x1 << 8) /**< \brief (TWI_SR) Not Acknowledged (clear on read) */ +#define TWI_SR_ARBLST (0x1 << 9) /**< \brief (TWI_SR) Arbitration Lost (clear on read) */ +#define TWI_SR_SCLWS (0x1 << 10) /**< \brief (TWI_SR) Clock Wait State (automatically set / reset) */ +#define TWI_SR_EOSACC (0x1 << 11) /**< \brief (TWI_SR) End Of Slave Access (clear on read) */ +#define TWI_SR_ENDRX (0x1 << 12) /**< \brief (TWI_SR) End of RX buffer */ +#define TWI_SR_ENDTX (0x1 << 13) /**< \brief (TWI_SR) End of TX buffer */ +#define TWI_SR_RXBUFF (0x1 << 14) /**< \brief (TWI_SR) RX Buffer Full */ +#define TWI_SR_TXBUFE (0x1 << 15) /**< \brief (TWI_SR) TX Buffer Empty */ +/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ +#define TWI_IER_TXCOMP (0x1 << 0) /**< \brief (TWI_IER) Transmission Completed Interrupt Enable */ +#define TWI_IER_RXRDY (0x1 << 1) /**< \brief (TWI_IER) Receive Holding Register Ready Interrupt Enable */ +#define TWI_IER_TXRDY (0x1 << 2) /**< \brief (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ +#define TWI_IER_SVACC (0x1 << 4) /**< \brief (TWI_IER) Slave Access Interrupt Enable */ +#define TWI_IER_GACC (0x1 << 5) /**< \brief (TWI_IER) General Call Access Interrupt Enable */ +#define TWI_IER_OVRE (0x1 << 6) /**< \brief (TWI_IER) Overrun Error Interrupt Enable */ +#define TWI_IER_NACK (0x1 << 8) /**< \brief (TWI_IER) Not Acknowledge Interrupt Enable */ +#define TWI_IER_ARBLST (0x1 << 9) /**< \brief (TWI_IER) Arbitration Lost Interrupt Enable */ +#define TWI_IER_SCL_WS (0x1 << 10) /**< \brief (TWI_IER) Clock Wait State Interrupt Enable */ +#define TWI_IER_EOSACC (0x1 << 11) /**< \brief (TWI_IER) End Of Slave Access Interrupt Enable */ +#define TWI_IER_ENDRX (0x1 << 12) /**< \brief (TWI_IER) End of Receive Buffer Interrupt Enable */ +#define TWI_IER_ENDTX (0x1 << 13) /**< \brief (TWI_IER) End of Transmit Buffer Interrupt Enable */ +#define TWI_IER_RXBUFF (0x1 << 14) /**< \brief (TWI_IER) Receive Buffer Full Interrupt Enable */ +#define TWI_IER_TXBUFE (0x1 << 15) /**< \brief (TWI_IER) Transmit Buffer Empty Interrupt Enable */ +/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ +#define TWI_IDR_TXCOMP (0x1 << 0) /**< \brief (TWI_IDR) Transmission Completed Interrupt Disable */ +#define TWI_IDR_RXRDY (0x1 << 1) /**< \brief (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ +#define TWI_IDR_TXRDY (0x1 << 2) /**< \brief (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ +#define TWI_IDR_SVACC (0x1 << 4) /**< \brief (TWI_IDR) Slave Access Interrupt Disable */ +#define TWI_IDR_GACC (0x1 << 5) /**< \brief (TWI_IDR) General Call Access Interrupt Disable */ +#define TWI_IDR_OVRE (0x1 << 6) /**< \brief (TWI_IDR) Overrun Error Interrupt Disable */ +#define TWI_IDR_NACK (0x1 << 8) /**< \brief (TWI_IDR) Not Acknowledge Interrupt Disable */ +#define TWI_IDR_ARBLST (0x1 << 9) /**< \brief (TWI_IDR) Arbitration Lost Interrupt Disable */ +#define TWI_IDR_SCL_WS (0x1 << 10) /**< \brief (TWI_IDR) Clock Wait State Interrupt Disable */ +#define TWI_IDR_EOSACC (0x1 << 11) /**< \brief (TWI_IDR) End Of Slave Access Interrupt Disable */ +#define TWI_IDR_ENDRX (0x1 << 12) /**< \brief (TWI_IDR) End of Receive Buffer Interrupt Disable */ +#define TWI_IDR_ENDTX (0x1 << 13) /**< \brief (TWI_IDR) End of Transmit Buffer Interrupt Disable */ +#define TWI_IDR_RXBUFF (0x1 << 14) /**< \brief (TWI_IDR) Receive Buffer Full Interrupt Disable */ +#define TWI_IDR_TXBUFE (0x1 << 15) /**< \brief (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ +/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ +#define TWI_IMR_TXCOMP (0x1 << 0) /**< \brief (TWI_IMR) Transmission Completed Interrupt Mask */ +#define TWI_IMR_RXRDY (0x1 << 1) /**< \brief (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ +#define TWI_IMR_TXRDY (0x1 << 2) /**< \brief (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ +#define TWI_IMR_SVACC (0x1 << 4) /**< \brief (TWI_IMR) Slave Access Interrupt Mask */ +#define TWI_IMR_GACC (0x1 << 5) /**< \brief (TWI_IMR) General Call Access Interrupt Mask */ +#define TWI_IMR_OVRE (0x1 << 6) /**< \brief (TWI_IMR) Overrun Error Interrupt Mask */ +#define TWI_IMR_NACK (0x1 << 8) /**< \brief (TWI_IMR) Not Acknowledge Interrupt Mask */ +#define TWI_IMR_ARBLST (0x1 << 9) /**< \brief (TWI_IMR) Arbitration Lost Interrupt Mask */ +#define TWI_IMR_SCL_WS (0x1 << 10) /**< \brief (TWI_IMR) Clock Wait State Interrupt Mask */ +#define TWI_IMR_EOSACC (0x1 << 11) /**< \brief (TWI_IMR) End Of Slave Access Interrupt Mask */ +#define TWI_IMR_ENDRX (0x1 << 12) /**< \brief (TWI_IMR) End of Receive Buffer Interrupt Mask */ +#define TWI_IMR_ENDTX (0x1 << 13) /**< \brief (TWI_IMR) End of Transmit Buffer Interrupt Mask */ +#define TWI_IMR_RXBUFF (0x1 << 14) /**< \brief (TWI_IMR) Receive Buffer Full Interrupt Mask */ +#define TWI_IMR_TXBUFE (0x1 << 15) /**< \brief (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ +/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ +#define TWI_RHR_RXDATA (0xff << 0) /**< \brief (TWI_RHR) Master or Slave Receive Holding Data */ +/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ +#define TWI_THR_TXDATA (0xff << 0) /**< \brief (TWI_THR) Master or Slave Transmit Holding Data */ +/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ +#define TWI_RPR_RXPTR (0xffffffff << 0) /**< \brief (TWI_RPR) Receive Pointer Register */ +/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ +#define TWI_RCR_RXCTR (0xffff << 0) /**< \brief (TWI_RCR) Receive Counter Register */ +/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ +#define TWI_TPR_TXPTR (0xffffffff << 0) /**< \brief (TWI_TPR) Transmit Counter Register */ +/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ +#define TWI_TCR_TXCTR (0xffff << 0) /**< \brief (TWI_TCR) Transmit Counter Register */ +/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ +#define TWI_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (TWI_RNPR) Receive Next Pointer */ +/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ +#define TWI_RNCR_RXNCTR (0xffff << 0) /**< \brief (TWI_RNCR) Receive Next Counter */ +/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ +#define TWI_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (TWI_TNPR) Transmit Next Pointer */ +/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ +#define TWI_TNCR_TXNCTR (0xffff << 0) /**< \brief (TWI_TNCR) Transmit Counter Next */ +/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ +#define TWI_PTCR_RXTEN (0x1 << 0) /**< \brief (TWI_PTCR) Receiver Transfer Enable */ +#define TWI_PTCR_RXTDIS (0x1 << 1) /**< \brief (TWI_PTCR) Receiver Transfer Disable */ +#define TWI_PTCR_TXTEN (0x1 << 8) /**< \brief (TWI_PTCR) Transmitter Transfer Enable */ +#define TWI_PTCR_TXTDIS (0x1 << 9) /**< \brief (TWI_PTCR) Transmitter Transfer Disable */ +/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ +#define TWI_PTSR_RXTEN (0x1 << 0) /**< \brief (TWI_PTSR) Receiver Transfer Enable */ +#define TWI_PTSR_TXTEN (0x1 << 8) /**< \brief (TWI_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_UART Universal Asynchronous Receiver Transmitter */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Uart hardware registers */ +typedef struct { + WoReg UART_CR; /**< \brief (Uart Offset: 0x0000) Control Register */ + RwReg UART_MR; /**< \brief (Uart Offset: 0x0004) Mode Register */ + WoReg UART_IER; /**< \brief (Uart Offset: 0x0008) Interrupt Enable Register */ + WoReg UART_IDR; /**< \brief (Uart Offset: 0x000C) Interrupt Disable Register */ + RoReg UART_IMR; /**< \brief (Uart Offset: 0x0010) Interrupt Mask Register */ + RoReg UART_SR; /**< \brief (Uart Offset: 0x0014) Status Register */ + RoReg UART_RHR; /**< \brief (Uart Offset: 0x0018) Receive Holding Register */ + WoReg UART_THR; /**< \brief (Uart Offset: 0x001C) Transmit Holding Register */ + RwReg UART_BRGR; /**< \brief (Uart Offset: 0x0020) Baud Rate Generator Register */ + RwReg Reserved1[55]; + RwReg UART_RPR; /**< \brief (Uart Offset: 0x100) Receive Pointer Register */ + RwReg UART_RCR; /**< \brief (Uart Offset: 0x104) Receive Counter Register */ + RwReg UART_TPR; /**< \brief (Uart Offset: 0x108) Transmit Pointer Register */ + RwReg UART_TCR; /**< \brief (Uart Offset: 0x10C) Transmit Counter Register */ + RwReg UART_RNPR; /**< \brief (Uart Offset: 0x110) Receive Next Pointer Register */ + RwReg UART_RNCR; /**< \brief (Uart Offset: 0x114) Receive Next Counter Register */ + RwReg UART_TNPR; /**< \brief (Uart Offset: 0x118) Transmit Next Pointer Register */ + RwReg UART_TNCR; /**< \brief (Uart Offset: 0x11C) Transmit Next Counter Register */ + WoReg UART_PTCR; /**< \brief (Uart Offset: 0x120) Transfer Control Register */ + RoReg UART_PTSR; /**< \brief (Uart Offset: 0x124) Transfer Status Register */ +} Uart; +#endif /* __ASSEMBLY__ */ +/* -------- UART_CR : (UART Offset: 0x0000) Control Register -------- */ +#define UART_CR_RSTRX (0x1 << 2) /**< \brief (UART_CR) Reset Receiver */ +#define UART_CR_RSTTX (0x1 << 3) /**< \brief (UART_CR) Reset Transmitter */ +#define UART_CR_RXEN (0x1 << 4) /**< \brief (UART_CR) Receiver Enable */ +#define UART_CR_RXDIS (0x1 << 5) /**< \brief (UART_CR) Receiver Disable */ +#define UART_CR_TXEN (0x1 << 6) /**< \brief (UART_CR) Transmitter Enable */ +#define UART_CR_TXDIS (0x1 << 7) /**< \brief (UART_CR) Transmitter Disable */ +#define UART_CR_RSTSTA (0x1 << 8) /**< \brief (UART_CR) Reset Status Bits */ +/* -------- UART_MR : (UART Offset: 0x0004) Mode Register -------- */ +#define UART_MR_PAR (0x7 << 9) /**< \brief (UART_MR) Parity Type */ +#define UART_MR_CHMODE (0x3 << 14) /**< \brief (UART_MR) Channel Mode */ +/* -------- UART_IER : (UART Offset: 0x0008) Interrupt Enable Register -------- */ +#define UART_IER_RXRDY (0x1 << 0) /**< \brief (UART_IER) Enable RXRDY Interrupt */ +#define UART_IER_TXRDY (0x1 << 1) /**< \brief (UART_IER) Enable TXRDY Interrupt */ +#define UART_IER_ENDRX (0x1 << 3) /**< \brief (UART_IER) Enable End of Receive Transfer Interrupt */ +#define UART_IER_ENDTX (0x1 << 4) /**< \brief (UART_IER) Enable End of Transmit Interrupt */ +#define UART_IER_OVRE (0x1 << 5) /**< \brief (UART_IER) Enable Overrun Error Interrupt */ +#define UART_IER_FRAME (0x1 << 6) /**< \brief (UART_IER) Enable Framing Error Interrupt */ +#define UART_IER_PARE (0x1 << 7) /**< \brief (UART_IER) Enable Parity Error Interrupt */ +#define UART_IER_TXEMPTY (0x1 << 9) /**< \brief (UART_IER) Enable TXEMPTY Interrupt */ +#define UART_IER_TXBUFE (0x1 << 11) /**< \brief (UART_IER) Enable Buffer Empty Interrupt */ +#define UART_IER_RXBUFF (0x1 << 12) /**< \brief (UART_IER) Enable Buffer Full Interrupt */ +/* -------- UART_IDR : (UART Offset: 0x000C) Interrupt Disable Register -------- */ +#define UART_IDR_RXRDY (0x1 << 0) /**< \brief (UART_IDR) Disable RXRDY Interrupt */ +#define UART_IDR_TXRDY (0x1 << 1) /**< \brief (UART_IDR) Disable TXRDY Interrupt */ +#define UART_IDR_ENDRX (0x1 << 3) /**< \brief (UART_IDR) Disable End of Receive Transfer Interrupt */ +#define UART_IDR_ENDTX (0x1 << 4) /**< \brief (UART_IDR) Disable End of Transmit Interrupt */ +#define UART_IDR_OVRE (0x1 << 5) /**< \brief (UART_IDR) Disable Overrun Error Interrupt */ +#define UART_IDR_FRAME (0x1 << 6) /**< \brief (UART_IDR) Disable Framing Error Interrupt */ +#define UART_IDR_PARE (0x1 << 7) /**< \brief (UART_IDR) Disable Parity Error Interrupt */ +#define UART_IDR_TXEMPTY (0x1 << 9) /**< \brief (UART_IDR) Disable TXEMPTY Interrupt */ +#define UART_IDR_TXBUFE (0x1 << 11) /**< \brief (UART_IDR) Disable Buffer Empty Interrupt */ +#define UART_IDR_RXBUFF (0x1 << 12) /**< \brief (UART_IDR) Disable Buffer Full Interrupt */ +/* -------- UART_IMR : (UART Offset: 0x0010) Interrupt Mask Register -------- */ +#define UART_IMR_RXRDY (0x1 << 0) /**< \brief (UART_IMR) Mask RXRDY Interrupt */ +#define UART_IMR_TXRDY (0x1 << 1) /**< \brief (UART_IMR) Disable TXRDY Interrupt */ +#define UART_IMR_ENDRX (0x1 << 3) /**< \brief (UART_IMR) Mask End of Receive Transfer Interrupt */ +#define UART_IMR_ENDTX (0x1 << 4) /**< \brief (UART_IMR) Mask End of Transmit Interrupt */ +#define UART_IMR_OVRE (0x1 << 5) /**< \brief (UART_IMR) Mask Overrun Error Interrupt */ +#define UART_IMR_FRAME (0x1 << 6) /**< \brief (UART_IMR) Mask Framing Error Interrupt */ +#define UART_IMR_PARE (0x1 << 7) /**< \brief (UART_IMR) Mask Parity Error Interrupt */ +#define UART_IMR_TXEMPTY (0x1 << 9) /**< \brief (UART_IMR) Mask TXEMPTY Interrupt */ +#define UART_IMR_TXBUFE (0x1 << 11) /**< \brief (UART_IMR) Mask TXBUFE Interrupt */ +#define UART_IMR_RXBUFF (0x1 << 12) /**< \brief (UART_IMR) Mask RXBUFF Interrupt */ +/* -------- UART_SR : (UART Offset: 0x0014) Status Register -------- */ +#define UART_SR_RXRDY (0x1 << 0) /**< \brief (UART_SR) Receiver Ready */ +#define UART_SR_TXRDY (0x1 << 1) /**< \brief (UART_SR) Transmitter Ready */ +#define UART_SR_ENDRX (0x1 << 3) /**< \brief (UART_SR) End of Receiver Transfer */ +#define UART_SR_ENDTX (0x1 << 4) /**< \brief (UART_SR) End of Transmitter Transfer */ +#define UART_SR_OVRE (0x1 << 5) /**< \brief (UART_SR) Overrun Error */ +#define UART_SR_FRAME (0x1 << 6) /**< \brief (UART_SR) Framing Error */ +#define UART_SR_PARE (0x1 << 7) /**< \brief (UART_SR) Parity Error */ +#define UART_SR_TXEMPTY (0x1 << 9) /**< \brief (UART_SR) Transmitter Empty */ +#define UART_SR_TXBUFE (0x1 << 11) /**< \brief (UART_SR) Transmission Buffer Empty */ +#define UART_SR_RXBUFF (0x1 << 12) /**< \brief (UART_SR) Receive Buffer Full */ +/* -------- UART_RHR : (UART Offset: 0x0018) Receive Holding Register -------- */ +#define UART_RHR_RXCHR (0xff << 0) /**< \brief (UART_RHR) Received Character */ +/* -------- UART_THR : (UART Offset: 0x001C) Transmit Holding Register -------- */ +#define UART_THR_TXCHR (0xff << 0) /**< \brief (UART_THR) Character to be Transmitted */ +/* -------- UART_BRGR : (UART Offset: 0x0020) Baud Rate Generator Register -------- */ +#define UART_BRGR_CD (0xffff << 0) /**< \brief (UART_BRGR) Clock Divisor */ +/* -------- UART_RPR : (UART Offset: 0x100) Receive Pointer Register -------- */ +#define UART_RPR_RXPTR (0xffffffff << 0) /**< \brief (UART_RPR) Receive Pointer Register */ +/* -------- UART_RCR : (UART Offset: 0x104) Receive Counter Register -------- */ +#define UART_RCR_RXCTR (0xffff << 0) /**< \brief (UART_RCR) Receive Counter Register */ +/* -------- UART_TPR : (UART Offset: 0x108) Transmit Pointer Register -------- */ +#define UART_TPR_TXPTR (0xffffffff << 0) /**< \brief (UART_TPR) Transmit Counter Register */ +/* -------- UART_TCR : (UART Offset: 0x10C) Transmit Counter Register -------- */ +#define UART_TCR_TXCTR (0xffff << 0) /**< \brief (UART_TCR) Transmit Counter Register */ +/* -------- UART_RNPR : (UART Offset: 0x110) Receive Next Pointer Register -------- */ +#define UART_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (UART_RNPR) Receive Next Pointer */ +/* -------- UART_RNCR : (UART Offset: 0x114) Receive Next Counter Register -------- */ +#define UART_RNCR_RXNCTR (0xffff << 0) /**< \brief (UART_RNCR) Receive Next Counter */ +/* -------- UART_TNPR : (UART Offset: 0x118) Transmit Next Pointer Register -------- */ +#define UART_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (UART_TNPR) Transmit Next Pointer */ +/* -------- UART_TNCR : (UART Offset: 0x11C) Transmit Next Counter Register -------- */ +#define UART_TNCR_TXNCTR (0xffff << 0) /**< \brief (UART_TNCR) Transmit Counter Next */ +/* -------- UART_PTCR : (UART Offset: 0x120) Transfer Control Register -------- */ +#define UART_PTCR_RXTEN (0x1 << 0) /**< \brief (UART_PTCR) Receiver Transfer Enable */ +#define UART_PTCR_RXTDIS (0x1 << 1) /**< \brief (UART_PTCR) Receiver Transfer Disable */ +#define UART_PTCR_TXTEN (0x1 << 8) /**< \brief (UART_PTCR) Transmitter Transfer Enable */ +#define UART_PTCR_TXTDIS (0x1 << 9) /**< \brief (UART_PTCR) Transmitter Transfer Disable */ +/* -------- UART_PTSR : (UART Offset: 0x124) Transfer Status Register -------- */ +#define UART_PTSR_RXTEN (0x1 << 0) /**< \brief (UART_PTSR) Receiver Transfer Enable */ +#define UART_PTSR_TXTEN (0x1 << 8) /**< \brief (UART_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR USB Device Port */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_UDP USB Device Port */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Udp hardware registers */ +typedef struct { + RoReg UDP_FRM_NUM; /**< \brief (Udp Offset: 0x000) Frame Number Register */ + RwReg UDP_GLB_STAT; /**< \brief (Udp Offset: 0x004) Global State Register */ + RwReg UDP_FADDR; /**< \brief (Udp Offset: 0x008) Function Address Register */ + RwReg Reserved1[1]; + WoReg UDP_IER; /**< \brief (Udp Offset: 0x010) Interrupt Enable Register */ + WoReg UDP_IDR; /**< \brief (Udp Offset: 0x014) Interrupt Disable Register */ + RoReg UDP_IMR; /**< \brief (Udp Offset: 0x018) Interrupt Mask Register */ + RoReg UDP_ISR; /**< \brief (Udp Offset: 0x01C) Interrupt Status Register */ + WoReg UDP_ICR; /**< \brief (Udp Offset: 0x020) Interrupt Clear Register */ + RwReg Reserved2[1]; + RwReg UDP_RST_EP; /**< \brief (Udp Offset: 0x028) Reset Endpoint Register */ + RwReg Reserved3[1]; + RwReg UDP_CSR[8]; /**< \brief (Udp Offset: 0x30) Endpoint Control and Status Register (ept_num = 0) */ + RwReg UDP_FDR[8]; /**< \brief (Udp Offset: 0x50) Endpoint FIFO Data Register (ept_num = 0) */ + RwReg Reserved4[1]; + RwReg UDP_TXVC; /**< \brief (Udp Offset: 0x074) Transceiver Control Register */ +} Udp; +#endif /* __ASSEMBLY__ */ +/* -------- UDP_FRM_NUM : (UDP Offset: 0x000) Frame Number Register -------- */ +#define UDP_FRM_NUM_FRM_NUM (0x7ff << 0) /**< \brief (UDP_FRM_NUM) Frame Number as Defined in the Packet Field Formats */ +#define UDP_FRM_NUM_FRM_ERR (0x1 << 16) /**< \brief (UDP_FRM_NUM) Frame Error */ +#define UDP_FRM_NUM_FRM_OK (0x1 << 17) /**< \brief (UDP_FRM_NUM) Frame OK */ +/* -------- UDP_GLB_STAT : (UDP Offset: 0x004) Global State Register -------- */ +#define UDP_GLB_STAT_FADDEN (0x1 << 0) /**< \brief (UDP_GLB_STAT) Function Address Enable */ +#define UDP_GLB_STAT_CONFG (0x1 << 1) /**< \brief (UDP_GLB_STAT) Configured */ +#define UDP_GLB_STAT_ESR (0x1 << 2) /**< \brief (UDP_GLB_STAT) Enable Send Resume */ +#define UDP_GLB_STAT_RSMINPR (0x1 << 3) /**< \brief (UDP_GLB_STAT) */ +#define UDP_GLB_STAT_RMWUPE (0x1 << 4) /**< \brief (UDP_GLB_STAT) Remote Wake Up Enable */ +/* -------- UDP_FADDR : (UDP Offset: 0x008) Function Address Register -------- */ +#define UDP_FADDR_FADD_Pos 0 +#define UDP_FADDR_FADD_Msk (0x7fu << UDP_FADDR_FADD_Pos) /**< \brief (UDP_FADDR) Function Address Value */ +#define UDP_FADDR_FADD(value) ((UDP_FADDR_FADD_Msk & ((value) << UDP_FADDR_FADD_Pos))) +#define UDP_FADDR_FEN (0x1u << 8) /**< \brief (UDP_FADDR) Function Enable */ +/* -------- UDP_IER : (UDP Offset: 0x010) Interrupt Enable Register -------- */ +#define UDP_IER_EP0INT (0x1 << 0) /**< \brief (UDP_IER) Enable Endpoint 0 Interrupt */ +#define UDP_IER_EP1INT (0x1 << 1) /**< \brief (UDP_IER) Enable Endpoint 1 Interrupt */ +#define UDP_IER_EP2INT (0x1 << 2) /**< \brief (UDP_IER) Enable Endpoint 2Interrupt */ +#define UDP_IER_EP3INT (0x1 << 3) /**< \brief (UDP_IER) Enable Endpoint 3 Interrupt */ +#define UDP_IER_EP4INT (0x1 << 4) /**< \brief (UDP_IER) Enable Endpoint 4 Interrupt */ +#define UDP_IER_EP5INT (0x1 << 5) /**< \brief (UDP_IER) Enable Endpoint 5 Interrupt */ +#define UDP_IER_EP6INT (0x1 << 6) /**< \brief (UDP_IER) Enable Endpoint 6 Interrupt */ +#define UDP_IER_EP7INT (0x1 << 7) /**< \brief (UDP_IER) Enable Endpoint 7 Interrupt */ +#define UDP_IER_RXSUSP (0x1 << 8) /**< \brief (UDP_IER) Enable UDP Suspend Interrupt */ +#define UDP_IER_RXRSM (0x1 << 9) /**< \brief (UDP_IER) Enable UDP Resume Interrupt */ +#define UDP_IER_EXTRSM (0x1 << 10) /**< \brief (UDP_IER) */ +#define UDP_IER_SOFINT (0x1 << 11) /**< \brief (UDP_IER) Enable Start Of Frame Interrupt */ +#define UDP_IER_WAKEUP (0x1 << 13) /**< \brief (UDP_IER) Enable UDP bus Wakeup Interrupt */ +/* -------- UDP_IDR : (UDP Offset: 0x014) Interrupt Disable Register -------- */ +#define UDP_IDR_EP0INT (0x1 << 0) /**< \brief (UDP_IDR) Disable Endpoint 0 Interrupt */ +#define UDP_IDR_EP1INT (0x1 << 1) /**< \brief (UDP_IDR) Disable Endpoint 1 Interrupt */ +#define UDP_IDR_EP2INT (0x1 << 2) /**< \brief (UDP_IDR) Disable Endpoint 2 Interrupt */ +#define UDP_IDR_EP3INT (0x1 << 3) /**< \brief (UDP_IDR) Disable Endpoint 3 Interrupt */ +#define UDP_IDR_EP4INT (0x1 << 4) /**< \brief (UDP_IDR) Disable Endpoint 4 Interrupt */ +#define UDP_IDR_EP5INT (0x1 << 5) /**< \brief (UDP_IDR) Disable Endpoint 5 Interrupt */ +#define UDP_IDR_EP6INT (0x1 << 6) /**< \brief (UDP_IDR) Disable Endpoint 6 Interrupt */ +#define UDP_IDR_EP7INT (0x1 << 7) /**< \brief (UDP_IDR) Disable Endpoint 7 Interrupt */ +#define UDP_IDR_RXSUSP (0x1 << 8) /**< \brief (UDP_IDR) Disable UDP Suspend Interrupt */ +#define UDP_IDR_RXRSM (0x1 << 9) /**< \brief (UDP_IDR) Disable UDP Resume Interrupt */ +#define UDP_IDR_EXTRSM (0x1 << 10) /**< \brief (UDP_IDR) */ +#define UDP_IDR_SOFINT (0x1 << 11) /**< \brief (UDP_IDR) Disable Start Of Frame Interrupt */ +#define UDP_IDR_WAKEUP (0x1 << 13) /**< \brief (UDP_IDR) Disable USB Bus Interrupt */ +/* -------- UDP_IMR : (UDP Offset: 0x018) Interrupt Mask Register -------- */ +#define UDP_IMR_EP0INT (0x1 << 0) /**< \brief (UDP_IMR) Mask Endpoint 0 Interrupt */ +#define UDP_IMR_EP1INT (0x1 << 1) /**< \brief (UDP_IMR) Mask Endpoint 1 Interrupt */ +#define UDP_IMR_EP2INT (0x1 << 2) /**< \brief (UDP_IMR) Mask Endpoint 2 Interrupt */ +#define UDP_IMR_EP3INT (0x1 << 3) /**< \brief (UDP_IMR) Mask Endpoint 3 Interrupt */ +#define UDP_IMR_EP4INT (0x1 << 4) /**< \brief (UDP_IMR) Mask Endpoint 4 Interrupt */ +#define UDP_IMR_EP5INT (0x1 << 5) /**< \brief (UDP_IMR) Mask Endpoint 5 Interrupt */ +#define UDP_IMR_EP6INT (0x1 << 6) /**< \brief (UDP_IMR) Mask Endpoint 6 Interrupt */ +#define UDP_IMR_EP7INT (0x1 << 7) /**< \brief (UDP_IMR) Mask Endpoint 7 Interrupt */ +#define UDP_IMR_RXSUSP (0x1 << 8) /**< \brief (UDP_IMR) Mask UDP Suspend Interrupt */ +#define UDP_IMR_RXRSM (0x1 << 9) /**< \brief (UDP_IMR) Mask UDP Resume Interrupt. */ +#define UDP_IMR_EXTRSM (0x1 << 10) /**< \brief (UDP_IMR) */ +#define UDP_IMR_SOFINT (0x1 << 11) /**< \brief (UDP_IMR) Mask Start Of Frame Interrupt */ +#define UDP_IMR_BIT12 (0x1 << 12) /**< \brief (UDP_IMR) UDP_IMR Bit 12 */ +#define UDP_IMR_WAKEUP (0x1 << 13) /**< \brief (UDP_IMR) USB Bus WAKEUP Interrupt */ +/* -------- UDP_ISR : (UDP Offset: 0x01C) Interrupt Status Register -------- */ +#define UDP_ISR_EP0INT (0x1 << 0) /**< \brief (UDP_ISR) Endpoint 0 Interrupt Status */ +#define UDP_ISR_EP1INT (0x1 << 1) /**< \brief (UDP_ISR) Endpoint 1 Interrupt Status */ +#define UDP_ISR_EP2INT (0x1 << 2) /**< \brief (UDP_ISR) Endpoint 2 Interrupt Status */ +#define UDP_ISR_EP3INT (0x1 << 3) /**< \brief (UDP_ISR) Endpoint 3 Interrupt Status */ +#define UDP_ISR_EP4INT (0x1 << 4) /**< \brief (UDP_ISR) Endpoint 4 Interrupt Status */ +#define UDP_ISR_EP5INT (0x1 << 5) /**< \brief (UDP_ISR) Endpoint 5 Interrupt Status */ +#define UDP_ISR_EP6INT (0x1 << 6) /**< \brief (UDP_ISR) Endpoint 6 Interrupt Status */ +#define UDP_ISR_EP7INT (0x1 << 7) /**< \brief (UDP_ISR) Endpoint 7Interrupt Status */ +#define UDP_ISR_RXSUSP (0x1 << 8) /**< \brief (UDP_ISR) UDP Suspend Interrupt Status */ +#define UDP_ISR_RXRSM (0x1 << 9) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ +#define UDP_ISR_EXTRSM (0x1 << 10) /**< \brief (UDP_ISR) */ +#define UDP_ISR_SOFINT (0x1 << 11) /**< \brief (UDP_ISR) Start of Frame Interrupt Status */ +#define UDP_ISR_ENDBUSRES (0x1 << 12) /**< \brief (UDP_ISR) End of BUS Reset Interrupt Status */ +#define UDP_ISR_WAKEUP (0x1 << 13) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ +/* -------- UDP_ICR : (UDP Offset: 0x020) Interrupt Clear Register -------- */ +#define UDP_ICR_RXSUSP (0x1 << 8) /**< \brief (UDP_ICR) Clear UDP Suspend Interrupt */ +#define UDP_ICR_RXRSM (0x1 << 9) /**< \brief (UDP_ICR) Clear UDP Resume Interrupt */ +#define UDP_ICR_EXTRSM (0x1 << 10) /**< \brief (UDP_ICR) */ +#define UDP_ICR_SOFINT (0x1 << 11) /**< \brief (UDP_ICR) Clear Start Of Frame Interrupt */ +#define UDP_ICR_ENDBUSRES (0x1 << 12) /**< \brief (UDP_ICR) Clear End of Bus Reset Interrupt */ +#define UDP_ICR_WAKEUP (0x1 << 13) /**< \brief (UDP_ICR) Clear Wakeup Interrupt */ +/* -------- UDP_RST_EP : (UDP Offset: 0x028) Reset Endpoint Register -------- */ +#define UDP_RST_EP_EP0 (0x1 << 0) /**< \brief (UDP_RST_EP) Reset Endpoint 0 */ +#define UDP_RST_EP_EP1 (0x1 << 1) /**< \brief (UDP_RST_EP) Reset Endpoint 1 */ +#define UDP_RST_EP_EP2 (0x1 << 2) /**< \brief (UDP_RST_EP) Reset Endpoint 2 */ +#define UDP_RST_EP_EP3 (0x1 << 3) /**< \brief (UDP_RST_EP) Reset Endpoint 3 */ +#define UDP_RST_EP_EP4 (0x1 << 4) /**< \brief (UDP_RST_EP) Reset Endpoint 4 */ +#define UDP_RST_EP_EP5 (0x1 << 5) /**< \brief (UDP_RST_EP) Reset Endpoint 5 */ +#define UDP_RST_EP_EP6 (0x1 << 6) /**< \brief (UDP_RST_EP) Reset Endpoint 6 */ +#define UDP_RST_EP_EP7 (0x1 << 7) /**< \brief (UDP_RST_EP) Reset Endpoint 7 */ +/* -------- UDP_CSR[8] : (UDP Offset: 0x2C) Endpoint Control and Status Register (ept_num = 0) -------- */ +#define UDP_CSR_TXCOMP (0x1 << 0) /**< \brief (UDP_CSR[8]) Generates an IN Packet with Data Previously Written in the DPR */ +#define UDP_CSR_RX_DATA_BK0 (0x1 << 1) /**< \brief (UDP_CSR[8]) Receive Data Bank 0 */ +#define UDP_CSR_RXSETUP (0x1 << 2) /**< \brief (UDP_CSR[8]) Received Setup */ +#define UDP_CSR_STALLSENTISOERROR (0x1 << 3) /**< \brief (UDP_CSR[8]) */ +#define UDP_CSR_TXPKTRDY (0x1 << 4) /**< \brief (UDP_CSR[8]) Transmit Packet Ready */ +#define UDP_CSR_FORCESTALL (0x1 << 5) /**< \brief (UDP_CSR[8]) Force Stall (used by Control, Bulk and Isochronous Endpoints) */ +#define UDP_CSR_RX_DATA_BK1 (0x1 << 6) /**< \brief (UDP_CSR[8]) Receive Data Bank 1 (only used by endpoints with ping-pong attributes) */ +#define UDP_CSR_DIR (0x1 << 7) /**< \brief (UDP_CSR[8]) Transfer Direction (only available for control endpoints) */ +#define UDP_CSR_EPTYPE_Pos 8 +#define UDP_CSR_EPTYPE_Msk (0x7u << UDP_CSR_EPTYPE_Pos) /**< \brief (UDP_CSR[8]) Endpoint Type */ +#define UDP_CSR_EPTYPE_CTRL (0x0u << 8) /**< \brief (UDP_CSR[8]) Control */ +#define UDP_CSR_EPTYPE_ISO_OUT (0x1u << 8) /**< \brief (UDP_CSR[8]) Isochronous OUT */ +#define UDP_CSR_EPTYPE_BULK_OUT (0x2u << 8) /**< \brief (UDP_CSR[8]) Bulk OUT */ +#define UDP_CSR_EPTYPE_INT_OUT (0x3u << 8) /**< \brief (UDP_CSR[8]) Interrupt OUT */ +#define UDP_CSR_EPTYPE_ISO_IN (0x5u << 8) /**< \brief (UDP_CSR[8]) Isochronous IN */ +#define UDP_CSR_EPTYPE_BULK_IN (0x6u << 8) /**< \brief (UDP_CSR[8]) Bulk IN */ +#define UDP_CSR_EPTYPE_INT_IN (0x7u << 8) /**< \brief (UDP_CSR[8]) Interrupt IN */ +#define UDP_CSR_DTGLE (0x1 << 11) /**< \brief (UDP_CSR[8]) Data Toggle */ +#define UDP_CSR_EPEDS (0x1 << 15) /**< \brief (UDP_CSR[8]) Endpoint Enable Disable */ +#define UDP_CSR_RXBYTECNT_Pos 16 +#define UDP_CSR_RXBYTECNT_Msk (0x7ffu << UDP_CSR_RXBYTECNT_Pos) /**< \brief (UDP_CSR[8]) Number of Bytes Available in the FIFO */ +#define UDP_CSR_RXBYTECNT(value) ((UDP_CSR_RXBYTECNT_Msk & ((value) << UDP_CSR_RXBYTECNT_Pos))) +/* -------- UDP_FDR[8] : (UDP Offset: 0x4C) Endpoint FIFO Data Register (ept_num = 0) -------- */ +#define UDP_FDR_FIFO_DATA (0xff << 0) /**< \brief (UDP_FDR[8]) FIFO Data Value */ +/* -------- UDP_TXVC : (UDP Offset: 0x074) Transceiver Control Register -------- */ +#define UDP_TXVC_TXVDIS (0x1 << 8) /**< \brief (UDP_TXVC) Transceiver Disable */ +#define UDP_TXVC_PUON (0x1 << 9) /**< \brief (UDP_TXVC) Pullup On */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_USART Universal Synchronous Asynchronous Receiver Transmitter */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Usart hardware registers */ +typedef struct { + WoReg US_CR; /**< \brief (Usart Offset: 0x0000) Control Register */ + RwReg US_MR; /**< \brief (Usart Offset: 0x0004) Mode Register */ + WoReg US_IER; /**< \brief (Usart Offset: 0x0008) Interrupt Enable Register */ + WoReg US_IDR; /**< \brief (Usart Offset: 0x000C) Interrupt Disable Register */ + RoReg US_IMR; /**< \brief (Usart Offset: 0x0010) Interrupt Mask Register */ + RoReg US_CSR; /**< \brief (Usart Offset: 0x0014) Channel Status Register */ + RoReg US_RHR; /**< \brief (Usart Offset: 0x0018) Receiver Holding Register */ + WoReg US_THR; /**< \brief (Usart Offset: 0x001C) Transmitter Holding Register */ + RwReg US_BRGR; /**< \brief (Usart Offset: 0x0020) Baud Rate Generator Register */ + RwReg US_RTOR; /**< \brief (Usart Offset: 0x0024) Receiver Time-out Register */ + RwReg US_TTGR; /**< \brief (Usart Offset: 0x0028) Transmitter Timeguard Register */ + RwReg Reserved1[5]; + RwReg US_FIDI; /**< \brief (Usart Offset: 0x0040) FI DI Ratio Register */ + RoReg US_NER; /**< \brief (Usart Offset: 0x0044) Number of Errors Register */ + RwReg Reserved2[1]; + RwReg US_IF; /**< \brief (Usart Offset: 0x004C) IrDA Filter Register */ + RwReg US_MAN; /**< \brief (Usart Offset: 0x0050) Manchester Encoder Decoder Register */ + RwReg Reserved3[36]; + RwReg US_WPMR; /**< \brief (Usart Offset: 0xE4) Write Protect Mode Register */ + RoReg US_WPSR; /**< \brief (Usart Offset: 0xE8) Write Protect Status Register */ + RwReg Reserved4[4]; + RoReg US_VERSION; /**< \brief (Usart Offset: 0xFC) Version Register */ + RwReg US_RPR; /**< \brief (Usart Offset: 0x100) Receive Pointer Register */ + RwReg US_RCR; /**< \brief (Usart Offset: 0x104) Receive Counter Register */ + RwReg US_TPR; /**< \brief (Usart Offset: 0x108) Transmit Pointer Register */ + RwReg US_TCR; /**< \brief (Usart Offset: 0x10C) Transmit Counter Register */ + RwReg US_RNPR; /**< \brief (Usart Offset: 0x110) Receive Next Pointer Register */ + RwReg US_RNCR; /**< \brief (Usart Offset: 0x114) Receive Next Counter Register */ + RwReg US_TNPR; /**< \brief (Usart Offset: 0x118) Transmit Next Pointer Register */ + RwReg US_TNCR; /**< \brief (Usart Offset: 0x11C) Transmit Next Counter Register */ + WoReg US_PTCR; /**< \brief (Usart Offset: 0x120) Transfer Control Register */ + RoReg US_PTSR; /**< \brief (Usart Offset: 0x124) Transfer Status Register */ +} Usart; +#endif /* __ASSEMBLY__ */ +/* -------- US_CR : (USART Offset: 0x0000) Control Register -------- */ +#define US_CR_RSTRX (0x1 << 2) /**< \brief (US_CR) Reset Receiver */ +#define US_CR_RSTTX (0x1 << 3) /**< \brief (US_CR) Reset Transmitter */ +#define US_CR_RXEN (0x1 << 4) /**< \brief (US_CR) Receiver Enable */ +#define US_CR_RXDIS (0x1 << 5) /**< \brief (US_CR) Receiver Disable */ +#define US_CR_TXEN (0x1 << 6) /**< \brief (US_CR) Transmitter Enable */ +#define US_CR_TXDIS (0x1 << 7) /**< \brief (US_CR) Transmitter Disable */ +#define US_CR_RSTSTA (0x1 << 8) /**< \brief (US_CR) Reset Status Bits */ +#define US_CR_STTBRK (0x1 << 9) /**< \brief (US_CR) Start Break */ +#define US_CR_STPBRK (0x1 << 10) /**< \brief (US_CR) Stop Break */ +#define US_CR_STTTO (0x1 << 11) /**< \brief (US_CR) Start Time-out */ +#define US_CR_SENDA (0x1 << 12) /**< \brief (US_CR) Send Address */ +#define US_CR_RSTIT (0x1 << 13) /**< \brief (US_CR) Reset Iterations */ +#define US_CR_RSTNACK (0x1 << 14) /**< \brief (US_CR) Reset Non Acknowledge */ +#define US_CR_RETTO (0x1 << 15) /**< \brief (US_CR) Rearm Time-out */ +#define US_CR_DTREN (0x1 << 16) /**< \brief (US_CR) Data Terminal Ready Enable */ +#define US_CR_DTRDIS (0x1 << 17) /**< \brief (US_CR) Data Terminal Ready Disable */ +#define US_CR_RTSEN__FCS (0x1 << 18) /**< \brief (US_CR) Request to Send Enable/Force SPI Chip Select */ +#define US_CR_RTSDIS__RCS (0x1 << 19) /**< \brief (US_CR) Request to Send Disable/Release SPI Chip Select */ +/* -------- US_MR : (USART Offset: 0x0004) Mode Register -------- */ +#define US_MR_USART_MODE (0xf << 0) /**< \brief (US_MR) */ +#define US_MR_USART_MODE_NORMAL (0x0) /**< (USART) Normal*/ +#define US_MR_USART_MODE_RS485 (0x1) /**< (USART) RS485*/ +#define US_MR_USART_MODE_HWHSH (0x2) /**< (USART) Hardware Handshaking*/ +#define US_MR_USART_MODE_ISO7816_0 (0x4) /**< (USART) ISO7816 protocol: T = 0*/ +#define US_MR_USART_MODE_ISO7816_1 (0x6) /**< (USART) ISO7816 protocol: T = 1*/ +#define US_MR_USART_MODE_IRDA (0x8) /**< (USART) IrDA*/ +#define US_MR_USART_MODE_SPIM (0xE) /**< (USART) SPI Master*/ +#define US_MR_USART_MODE_SPIS (0xF) /**< (USART) SPI Slave*/ +#define US_MR_USCLKS (0x3 << 4) /**< \brief (US_MR) Clock Selection */ +#define US_MR_USCLKS_CLOCK (0x0 << 4) /**< (USART) MCK*/ +#define US_MR_USCLKS_FDIV1 (0x1 << 4) /**< (USART) MCK/DIV(DIV=8)*/ +#define US_MR_USCLKS_SLOW (0x2 << 4) /**< (USART) Reserved*/ +#define US_MR_USCLKS_EXT (0x3 << 4) /**< (USART) SCK*/ +#define US_MR_CHRL (0x3 << 6) /**< \brief (US_MR) Character Length. */ +#define US_MR_CHRL_5_BITS (0x0 << 6) /**< (USART) Character Length: 5 bits*/ +#define US_MR_CHRL_6_BITS (0x1 << 6) /**< (USART) Character Length: 6 bits*/ +#define US_MR_CHRL_7_BITS (0x2 << 6) /**< (USART) Character Length: 7 bits*/ +#define US_MR_CHRL_8_BITS (0x3 << 6) /**< (USART) Character Length: 8 bits*/ +#define US_MR_SYNC__CPHA (0x1 << 8) /**< \brief (US_MR) Synchronous Mode Select or SPI Clock Phase */ +#define US_MR_PAR (0x7 << 9) /**< \brief (US_MR) Parity Type */ +#define US_MR_PAR_EVEN (0x0 << 9) /**< (USART) Even Parity*/ +#define US_MR_PAR_ODD (0x1 << 9) /**< (USART) Odd Parity*/ +#define US_MR_PAR_SPACE (0x2 << 9) /**< (USART) Parity forced to 0 (Space)*/ +#define US_MR_PAR_MARK (0x3 << 9) /**< (USART) Parity forced to 1 (Mark)*/ +#define US_MR_PAR_NONE (0x4 << 9) /**< (USART) No Parity*/ +#define US_MR_PAR_MULTI_DROP (0x6 << 9) /**< (USART) Multi-drop mode*/ +#define US_MR_NBSTOP (0x3 << 12) /**< \brief (US_MR) Number of Stop Bits */ +#define US_MR_NBSTOP_1_BIT (0x0 << 12) /**< (USART) 1 stop bit*/ +#define US_MR_NBSTOP_15_BIT (0x1 << 12) /**< (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits*/ +#define US_MR_NBSTOP_2_BIT (0x2 << 12) /**< (USART) 2 stop bits*/ +#define US_MR_CHMODE (0x3 << 14) /**< \brief (US_MR) Channel Mode */ +#define US_MR_CHMODE_NORMAL (0x0 << 14) /**< (USART) Normal Mode: The USART channel operates as an RX/TX USART.*/ +#define US_MR_CHMODE_AUTO (0x1 << 14) /**< (USART) Automatic Echo: Receiver Data Input is connected to the TXD pin.*/ +#define US_MR_CHMODE_LOCAL (0x2 << 14) /**< (USART) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.*/ +#define US_MR_CHMODE_REMOTE (0x3 << 14) /**< (USART) Remote Loopback: RXD pin is internally connected to TXD pin.*/ +#define US_MR_MSBF__CPOL (0x1 << 16) /**< \brief (US_MR) Bit Order or SPI Clock Polarity */ +#define US_MR_MODE9 (0x1 << 17) /**< \brief (US_MR) 9-bit Character Length */ +#define US_MR_CLKO (0x1 << 18) /**< \brief (US_MR) Clock Output Select */ +#define US_MR_OVER (0x1 << 19) /**< \brief (US_MR) Oversampling Mode */ +#define US_MR_INACK (0x1 << 20) /**< \brief (US_MR) Inhibit Non Acknowledge */ +#define US_MR_DSNACK (0x1 << 21) /**< \brief (US_MR) Disable Successive NACK */ +#define US_MR_VAR_SYNC (0x1 << 22) /**< \brief (US_MR) Variable Synchronization of Command/Data Sync Start Frame Delimiter */ +#define US_MR_INVDATA (0x1 << 23) /**< \brief (US_MR) INverted Data */ +#define US_MR_MAX_ITERATION (0x7 << 24) /**< \brief (US_MR) */ +#define US_MR_FILTER (0x1 << 28) /**< \brief (US_MR) Infrared Receive Line Filter */ +#define US_MR_MAN (0x1 << 29) /**< \brief (US_MR) Manchester Encoder/Decoder Enable */ +#define US_MR_MODSYNC_ (0x1 << 30) /**< \brief (US_MR) */ +#define US_MR_ONEBIT (0x1 << 31) /**< \brief (US_MR) Start Frame Delimiter Selector */ +/* -------- US_IER : (USART Offset: 0x0008) Interrupt Enable Register -------- */ +#define US_IER_RXRDY (0x1 << 0) /**< \brief (US_IER) RXRDY Interrupt Enable */ +#define US_IER_TXRDY (0x1 << 1) /**< \brief (US_IER) TXRDY Interrupt Enable */ +#define US_IER_RXBRK (0x1 << 2) /**< \brief (US_IER) Receiver Break Interrupt Enable */ +#define US_IER_ENDRX (0x1 << 3) /**< \brief (US_IER) End of Receive Transfer Interrupt Enable */ +#define US_IER_ENDTX (0x1 << 4) /**< \brief (US_IER) End of Transmit Interrupt Enable */ +#define US_IER_OVRE (0x1 << 5) /**< \brief (US_IER) Overrun Error Interrupt Enable */ +#define US_IER_FRAME (0x1 << 6) /**< \brief (US_IER) Framing Error Interrupt Enable */ +#define US_IER_PARE (0x1 << 7) /**< \brief (US_IER) Parity Error Interrupt Enable */ +#define US_IER_TIMEOUT (0x1 << 8) /**< \brief (US_IER) Time-out Interrupt Enable */ +#define US_IER_TXEMPTY (0x1 << 9) /**< \brief (US_IER) TXEMPTY Interrupt Enable */ +#define US_IER_ITER__UNRE (0x1 << 10) /**< \brief (US_IER) Iteration or SPI Underrun Error Interrupt Enable */ +#define US_IER_TXBUFE (0x1 << 11) /**< \brief (US_IER) Buffer Empty Interrupt Enable */ +#define US_IER_RXBUFF (0x1 << 12) /**< \brief (US_IER) Buffer Full Interrupt Enable */ +#define US_IER_NACK (0x1 << 13) /**< \brief (US_IER) Non Acknowledge Interrupt Enable */ +#define US_IER_RIIC (0x1 << 16) /**< \brief (US_IER) Ring Indicator Input Change Enable */ +#define US_IER_DSRIC (0x1 << 17) /**< \brief (US_IER) Data Set Ready Input Change Enable */ +#define US_IER_DCDIC (0x1 << 18) /**< \brief (US_IER) Data Carrier Detect Input Change Interrupt Enable */ +#define US_IER_CTSIC (0x1 << 19) /**< \brief (US_IER) Clear to Send Input Change Interrupt Enable */ +#define US_IER_MANE (0x1 << 24) /**< \brief (US_IER) Manchester Error Interrupt Enable */ +/* -------- US_IDR : (USART Offset: 0x000C) Interrupt Disable Register -------- */ +#define US_IDR_RXRDY (0x1 << 0) /**< \brief (US_IDR) RXRDY Interrupt Disable */ +#define US_IDR_TXRDY (0x1 << 1) /**< \brief (US_IDR) TXRDY Interrupt Disable */ +#define US_IDR_RXBRK (0x1 << 2) /**< \brief (US_IDR) Receiver Break Interrupt Disable */ +#define US_IDR_ENDRX (0x1 << 3) /**< \brief (US_IDR) End of Receive Transfer Interrupt Disable */ +#define US_IDR_ENDTX (0x1 << 4) /**< \brief (US_IDR) End of Transmit Interrupt Disable */ +#define US_IDR_OVRE (0x1 << 5) /**< \brief (US_IDR) Overrun Error Interrupt Disable */ +#define US_IDR_FRAME (0x1 << 6) /**< \brief (US_IDR) Framing Error Interrupt Disable */ +#define US_IDR_PARE (0x1 << 7) /**< \brief (US_IDR) Parity Error Interrupt Disable */ +#define US_IDR_TIMEOUT (0x1 << 8) /**< \brief (US_IDR) Time-out Interrupt Disable */ +#define US_IDR_TXEMPTY (0x1 << 9) /**< \brief (US_IDR) TXEMPTY Interrupt Disable */ +#define US_IDR_ITER__UNRE (0x1 << 10) /**< \brief (US_IDR) Iteration or SPI Underrun Error Interrupt Enable */ +#define US_IDR_TXBUFE (0x1 << 11) /**< \brief (US_IDR) Buffer Empty Interrupt Disable */ +#define US_IDR_RXBUFF (0x1 << 12) /**< \brief (US_IDR) Buffer Full Interrupt Disable */ +#define US_IDR_NACK (0x1 << 13) /**< \brief (US_IDR) Non Acknowledge Interrupt Disable */ +#define US_IDR_RIIC (0x1 << 16) /**< \brief (US_IDR) Ring Indicator Input Change Disable */ +#define US_IDR_DSRIC (0x1 << 17) /**< \brief (US_IDR) Data Set Ready Input Change Disable */ +#define US_IDR_DCDIC (0x1 << 18) /**< \brief (US_IDR) Data Carrier Detect Input Change Interrupt Disable */ +#define US_IDR_CTSIC (0x1 << 19) /**< \brief (US_IDR) Clear to Send Input Change Interrupt Disable */ +#define US_IDR_MANE (0x1 << 24) /**< \brief (US_IDR) Manchester Error Interrupt Disable */ +/* -------- US_IMR : (USART Offset: 0x0010) Interrupt Mask Register -------- */ +#define US_IMR_RXRDY (0x1 << 0) /**< \brief (US_IMR) RXRDY Interrupt Mask */ +#define US_IMR_TXRDY (0x1 << 1) /**< \brief (US_IMR) TXRDY Interrupt Mask */ +#define US_IMR_RXBRK (0x1 << 2) /**< \brief (US_IMR) Receiver Break Interrupt Mask */ +#define US_IMR_ENDRX (0x1 << 3) /**< \brief (US_IMR) End of Receive Transfer Interrupt Mask */ +#define US_IMR_ENDTX (0x1 << 4) /**< \brief (US_IMR) End of Transmit Interrupt Mask */ +#define US_IMR_OVRE (0x1 << 5) /**< \brief (US_IMR) Overrun Error Interrupt Mask */ +#define US_IMR_FRAME (0x1 << 6) /**< \brief (US_IMR) Framing Error Interrupt Mask */ +#define US_IMR_PARE (0x1 << 7) /**< \brief (US_IMR) Parity Error Interrupt Mask */ +#define US_IMR_TIMEOUT (0x1 << 8) /**< \brief (US_IMR) Time-out Interrupt Mask */ +#define US_IMR_TXEMPTY (0x1 << 9) /**< \brief (US_IMR) TXEMPTY Interrupt Mask */ +#define US_IMR_ITER__UNRE (0x1 << 10) /**< \brief (US_IMR) Iteration or SPI Underrun Error Interrupt Enable */ +#define US_IMR_TXBUFE (0x1 << 11) /**< \brief (US_IMR) Buffer Empty Interrupt Mask */ +#define US_IMR_RXBUFF (0x1 << 12) /**< \brief (US_IMR) Buffer Full Interrupt Mask */ +#define US_IMR_NACK (0x1 << 13) /**< \brief (US_IMR) Non Acknowledge Interrupt Mask */ +#define US_IMR_RIIC (0x1 << 16) /**< \brief (US_IMR) Ring Indicator Input Change Mask */ +#define US_IMR_DSRIC (0x1 << 17) /**< \brief (US_IMR) Data Set Ready Input Change Mask */ +#define US_IMR_DCDIC (0x1 << 18) /**< \brief (US_IMR) Data Carrier Detect Input Change Interrupt Mask */ +#define US_IMR_CTSIC (0x1 << 19) /**< \brief (US_IMR) Clear to Send Input Change Interrupt Mask */ +#define US_IMR_MANE (0x1 << 24) /**< \brief (US_IMR) Manchester Error Interrupt Mask */ +/* -------- US_CSR : (USART Offset: 0x0014) Channel Status Register -------- */ +#define US_CSR_RXRDY (0x1 << 0) /**< \brief (US_CSR) Receiver Ready */ +#define US_CSR_TXRDY (0x1 << 1) /**< \brief (US_CSR) Transmitter Ready */ +#define US_CSR_RXBRK (0x1 << 2) /**< \brief (US_CSR) Break Received/End of Break */ +#define US_CSR_ENDRX (0x1 << 3) /**< \brief (US_CSR) End of Receiver Transfer */ +#define US_CSR_ENDTX (0x1 << 4) /**< \brief (US_CSR) End of Transmitter Transfer */ +#define US_CSR_OVRE (0x1 << 5) /**< \brief (US_CSR) Overrun Error */ +#define US_CSR_FRAME (0x1 << 6) /**< \brief (US_CSR) Framing Error */ +#define US_CSR_PARE (0x1 << 7) /**< \brief (US_CSR) Parity Error */ +#define US_CSR_TIMEOUT (0x1 << 8) /**< \brief (US_CSR) Receiver Time-out */ +#define US_CSR_TXEMPTY (0x1 << 9) /**< \brief (US_CSR) Transmitter Empty */ +#define US_CSR_ITER__UNRE (0x1 << 10) /**< \brief (US_CSR) Max number of Repetitions Reached or SPI Underrun Error */ +#define US_CSR_TXBUFE (0x1 << 11) /**< \brief (US_CSR) Transmission Buffer Empty */ +#define US_CSR_RXBUFF (0x1 << 12) /**< \brief (US_CSR) Reception Buffer Full */ +#define US_CSR_NACK (0x1 << 13) /**< \brief (US_CSR) */ +#define US_CSR_RIIC (0x1 << 16) /**< \brief (US_CSR) Ring Indicator Input Change Flag */ +#define US_CSR_DSRIC (0x1 << 17) /**< \brief (US_CSR) Data Set Ready Input Change Flag */ +#define US_CSR_DCDIC (0x1 << 18) /**< \brief (US_CSR) Data Carrier Detect Input Change Flag */ +#define US_CSR_CTSIC (0x1 << 19) /**< \brief (US_CSR) Clear to Send Input Change Flag */ +#define US_CSR_RI (0x1 << 20) /**< \brief (US_CSR) Image of RI Input */ +#define US_CSR_DSR (0x1 << 21) /**< \brief (US_CSR) Image of DSR Input */ +#define US_CSR_DCD (0x1 << 22) /**< \brief (US_CSR) Image of DCD Input */ +#define US_CSR_CTS (0x1 << 23) /**< \brief (US_CSR) Image of CTS Input */ +#define US_CSR_MANERR (0x1 << 24) /**< \brief (US_CSR) Manchester Error */ +/* -------- US_RHR : (USART Offset: 0x0018) Receiver Holding Register -------- */ +#define US_RHR_RXCHR (0x1ff << 0) /**< \brief (US_RHR) Received Character */ +#define US_RHR_RXSYNH (0x1 << 15) /**< \brief (US_RHR) Received Sync */ +/* -------- US_THR : (USART Offset: 0x001C) Transmitter Holding Register -------- */ +#define US_THR_TXCHR (0x1ff << 0) /**< \brief (US_THR) Character to be Transmitted */ +#define US_THR_TXSYNH (0x1 << 15) /**< \brief (US_THR) Sync Field to be transmitted */ +/* -------- US_BRGR : (USART Offset: 0x0020) Baud Rate Generator Register -------- */ +#define US_BRGR_CD (0xffff << 0) /**< \brief (US_BRGR) Clock Divider */ +#define US_BRGR_FP (0x7 << 16) /**< \brief (US_BRGR) Fractional Part */ +/* -------- US_RTOR : (USART Offset: 0x0024) Receiver Time-out Register -------- */ +#define US_RTOR_TO (0xffff << 0) /**< \brief (US_RTOR) Time-out Value */ +/* -------- US_TTGR : (USART Offset: 0x0028) Transmitter Timeguard Register -------- */ +#define US_TTGR_TG (0xff << 0) /**< \brief (US_TTGR) Timeguard Value */ +/* -------- US_FIDI : (USART Offset: 0x0040) FI DI Ratio Register -------- */ +#define US_FIDI_FI_DI_RATIO (0x7ff << 0) /**< \brief (US_FIDI) FI Over DI Ratio Value */ +/* -------- US_NER : (USART Offset: 0x0044) Number of Errors Register -------- */ +#define US_NER_NB_ERRORS (0xff << 0) /**< \brief (US_NER) Number of Errors */ +/* -------- US_IF : (USART Offset: 0x004C) IrDA Filter Register -------- */ +#define US_IF_IRDA_FILTER (0xff << 0) /**< \brief (US_IF) IrDA Filter */ +/* -------- US_MAN : (USART Offset: 0x0050) Manchester Encoder Decoder Register -------- */ +#define US_MAN_TX_PL (0xf << 0) /**< \brief (US_MAN) Transmitter Preamble Length */ +#define US_MAN_TX_PP (0x3 << 8) /**< \brief (US_MAN) Transmitter Preamble Pattern */ +#define US_MAN_TX_MPOL (0x1 << 12) /**< \brief (US_MAN) Transmitter Manchester Polarity */ +#define US_MAN_RX_PL (0xf << 16) /**< \brief (US_MAN) Receiver Preamble Length */ +#define US_MAN_RX_PP (0x3 << 24) /**< \brief (US_MAN) Receiver Preamble Pattern detected */ +#define US_MAN_RX_MPOL (0x1 << 28) /**< \brief (US_MAN) Receiver Manchester Polarity */ +#define US_MAN_STUCKTO1 (0x1 << 29) /**< \brief (US_MAN) */ +#define US_MAN_DRIFT (0x1 << 30) /**< \brief (US_MAN) Drift compensation */ +/* -------- US_WPMR : (USART Offset: 0xE4) Write Protect Mode Register -------- */ +#define US_WPMR_WPEN (0x1 << 0) /**< \brief (US_WPMR) Write Protect Enable */ +#define US_WPMR_WPKEY (0xffffff << 8) /**< \brief (US_WPMR) Write Protect KEY */ +/* -------- US_WPSR : (USART Offset: 0xE8) Write Protect Status Register -------- */ +#define US_WPSR_WPVS (0x1 << 0) /**< \brief (US_WPSR) Write Protect Violation Status */ +#define US_WPSR_WPVSRC (0xffff << 8) /**< \brief (US_WPSR) Write Protect Violation Source */ +/* -------- US_VERSION : (USART Offset: 0xFC) Version Register -------- */ +#define US_VERSION_VERSION (0xfff << 0) /**< \brief (US_VERSION) */ +#define US_VERSION_MFN (0x7 << 16) /**< \brief (US_VERSION) */ +/* -------- US_RPR : (USART Offset: 0x100) Receive Pointer Register -------- */ +#define US_RPR_RXPTR (0xffffffff << 0) /**< \brief (US_RPR) Receive Pointer Register */ +/* -------- US_RCR : (USART Offset: 0x104) Receive Counter Register -------- */ +#define US_RCR_RXCTR (0xffff << 0) /**< \brief (US_RCR) Receive Counter Register */ +/* -------- US_TPR : (USART Offset: 0x108) Transmit Pointer Register -------- */ +#define US_TPR_TXPTR (0xffffffff << 0) /**< \brief (US_TPR) Transmit Counter Register */ +/* -------- US_TCR : (USART Offset: 0x10C) Transmit Counter Register -------- */ +#define US_TCR_TXCTR (0xffff << 0) /**< \brief (US_TCR) Transmit Counter Register */ +/* -------- US_RNPR : (USART Offset: 0x110) Receive Next Pointer Register -------- */ +#define US_RNPR_RXNPTR (0xffffffff << 0) /**< \brief (US_RNPR) Receive Next Pointer */ +/* -------- US_RNCR : (USART Offset: 0x114) Receive Next Counter Register -------- */ +#define US_RNCR_RXNCTR (0xffff << 0) /**< \brief (US_RNCR) Receive Next Counter */ +/* -------- US_TNPR : (USART Offset: 0x118) Transmit Next Pointer Register -------- */ +#define US_TNPR_TXNPTR (0xffffffff << 0) /**< \brief (US_TNPR) Transmit Next Pointer */ +/* -------- US_TNCR : (USART Offset: 0x11C) Transmit Next Counter Register -------- */ +#define US_TNCR_TXNCTR (0xffff << 0) /**< \brief (US_TNCR) Transmit Counter Next */ +/* -------- US_PTCR : (USART Offset: 0x120) Transfer Control Register -------- */ +#define US_PTCR_RXTEN (0x1 << 0) /**< \brief (US_PTCR) Receiver Transfer Enable */ +#define US_PTCR_RXTDIS (0x1 << 1) /**< \brief (US_PTCR) Receiver Transfer Disable */ +#define US_PTCR_TXTEN (0x1 << 8) /**< \brief (US_PTCR) Transmitter Transfer Enable */ +#define US_PTCR_TXTDIS (0x1 << 9) /**< \brief (US_PTCR) Transmitter Transfer Disable */ +/* -------- US_PTSR : (USART Offset: 0x124) Transfer Status Register -------- */ +#define US_PTSR_RXTEN (0x1 << 0) /**< \brief (US_PTSR) Receiver Transfer Enable */ +#define US_PTSR_TXTEN (0x1 << 8) /**< \brief (US_PTSR) Transmitter Transfer Enable */ + +/*@}*/ + +/* ============================================================================= */ +/** SOFTWARE API DEFINITION FOR Watchdog Timer */ +/* ============================================================================= */ +/** \addtogroup AT91SAM3S_WDT Watchdog Timer */ +/*@{*/ + +#ifndef __ASSEMBLY__ +/** \brief Wdt hardware registers */ +typedef struct { + WoReg WDT_CR; /**< \brief (Wdt Offset: 0x00) Control Register */ + RwReg WDT_MR; /**< \brief (Wdt Offset: 0x04) Mode Register */ + RoReg WDT_SR; /**< \brief (Wdt Offset: 0x08) Status Register */ +} Wdt; +#endif /* __ASSEMBLY__ */ +/* -------- WDT_CR : (WDT Offset: 0x00) Control Register -------- */ +#define WDT_CR_WDRSTT (0x1 << 0) /**< \brief (WDT_CR) Watchdog Restart */ +#define WDT_CR_KEY (0xff << 24) /**< \brief (WDT_CR) Password */ +/* -------- WDT_MR : (WDT Offset: 0x04) Mode Register -------- */ +#define WDT_MR_WDV (0xfff << 0) /**< \brief (WDT_MR) Watchdog Counter Value */ +#define WDT_MR_WDFIEN (0x1 << 12) /**< \brief (WDT_MR) Watchdog Fault Interrupt Enable */ +#define WDT_MR_WDRSTEN (0x1 << 13) /**< \brief (WDT_MR) Watchdog Reset Enable */ +#define WDT_MR_WDRPROC (0x1 << 14) /**< \brief (WDT_MR) Watchdog Reset Processor */ +#define WDT_MR_WDDIS (0x1 << 15) /**< \brief (WDT_MR) Watchdog Disable */ +#define WDT_MR_WDD (0xfff << 16) /**< \brief (WDT_MR) Watchdog Delta Value */ +#define WDT_MR_WDDBGHLT (0x1 << 28) /**< \brief (WDT_MR) Watchdog Debug Halt */ +#define WDT_MR_WDIDLEHLT (0x1 << 29) /**< \brief (WDT_MR) Watchdog Idle Halt */ +/* -------- WDT_SR : (WDT Offset: 0x08) Status Register -------- */ +#define WDT_SR_WDUNF (0x1 << 0) /**< \brief (WDT_SR) Watchdog Underflow */ +#define WDT_SR_WDERR (0x1 << 1) /**< \brief (WDT_SR) Watchdog Error */ + +/*@}*/ + +/*@}*/ + +/* ***************************************************************************** */ +/* REGISTER ACCESS DEFINITIONS FOR AT91SAM3S */ +/* ***************************************************************************** */ +/** \addtogroup AT91SAM3S_reg Registers Access Definitions */ +/*@{*/ + +/* ========== Register definition for HSMCI peripheral ========== */ +#define REG_HSMCI_CR REG_ACCESS(WoReg, 0x40000000U) /**< \brief (HSMCI) Control Register */ +#define REG_HSMCI_MR REG_ACCESS(RwReg, 0x40000004U) /**< \brief (HSMCI) Mode Register */ +#define REG_HSMCI_DTOR REG_ACCESS(RwReg, 0x40000008U) /**< \brief (HSMCI) Data Timeout Register */ +#define REG_HSMCI_SDCR REG_ACCESS(RwReg, 0x4000000CU) /**< \brief (HSMCI) SD/SDIO Card Register */ +#define REG_HSMCI_ARGR REG_ACCESS(RwReg, 0x40000010U) /**< \brief (HSMCI) Argument Register */ +#define REG_HSMCI_CMDR REG_ACCESS(WoReg, 0x40000014U) /**< \brief (HSMCI) Command Register */ +#define REG_HSMCI_BLKR REG_ACCESS(RwReg, 0x40000018U) /**< \brief (HSMCI) Block Register */ +#define REG_HSMCI_CSTOR REG_ACCESS(RwReg, 0x4000001CU) /**< \brief (HSMCI) Completion Signal Timeout Register */ +#define REG_HSMCI_RSPR REG_ACCESS(RoReg, 0x40000020U) /**< \brief (HSMCI) Response Register */ +#define REG_HSMCI_RDR REG_ACCESS(RoReg, 0x40000030U) /**< \brief (HSMCI) Receive Data Register */ +#define REG_HSMCI_TDR REG_ACCESS(WoReg, 0x40000034U) /**< \brief (HSMCI) Transmit Data Register */ +#define REG_HSMCI_SR REG_ACCESS(RoReg, 0x40000040U) /**< \brief (HSMCI) Status Register */ +#define REG_HSMCI_IER REG_ACCESS(WoReg, 0x40000044U) /**< \brief (HSMCI) Interrupt Enable Register */ +#define REG_HSMCI_IDR REG_ACCESS(WoReg, 0x40000048U) /**< \brief (HSMCI) Interrupt Disable Register */ +#define REG_HSMCI_IMR REG_ACCESS(RoReg, 0x4000004CU) /**< \brief (HSMCI) Interrupt Mask Register */ +#define REG_HSMCI_CFG REG_ACCESS(RwReg, 0x40000054U) /**< \brief (HSMCI) Configuration Register */ +#define REG_HSMCI_WPMR REG_ACCESS(RwReg, 0x400000E4U) /**< \brief (HSMCI) Write Protection Mode Register */ +#define REG_HSMCI_WPSR REG_ACCESS(RoReg, 0x400000E8U) /**< \brief (HSMCI) Write Protection Status Register */ +#define REG_HSMCI_RPR REG_ACCESS(RwReg, 0x40000100U) /**< \brief (HSMCI) Receive Pointer Register */ +#define REG_HSMCI_RCR REG_ACCESS(RwReg, 0x40000104U) /**< \brief (HSMCI) Receive Counter Register */ +#define REG_HSMCI_TPR REG_ACCESS(RwReg, 0x40000108U) /**< \brief (HSMCI) Transmit Pointer Register */ +#define REG_HSMCI_TCR REG_ACCESS(RwReg, 0x4000010CU) /**< \brief (HSMCI) Transmit Counter Register */ +#define REG_HSMCI_RNPR REG_ACCESS(RwReg, 0x40000110U) /**< \brief (HSMCI) Receive Next Pointer Register */ +#define REG_HSMCI_RNCR REG_ACCESS(RwReg, 0x40000114U) /**< \brief (HSMCI) Receive Next Counter Register */ +#define REG_HSMCI_TNPR REG_ACCESS(RwReg, 0x40000118U) /**< \brief (HSMCI) Transmit Next Pointer Register */ +#define REG_HSMCI_TNCR REG_ACCESS(RwReg, 0x4000011CU) /**< \brief (HSMCI) Transmit Next Counter Register */ +#define REG_HSMCI_PTCR REG_ACCESS(WoReg, 0x40000120U) /**< \brief (HSMCI) Transfer Control Register */ +#define REG_HSMCI_PTSR REG_ACCESS(RoReg, 0x40000124U) /**< \brief (HSMCI) Transfer Status Register */ +/* ========== Register definition for SSC peripheral ========== */ +#define REG_SSC_CR REG_ACCESS(WoReg, 0x40004000U) /**< \brief (SSC) Control Register */ +#define REG_SSC_CMR REG_ACCESS(RwReg, 0x40004004U) /**< \brief (SSC) Clock Mode Register */ +#define REG_SSC_RCMR REG_ACCESS(RwReg, 0x40004010U) /**< \brief (SSC) Receive Clock Mode Register */ +#define REG_SSC_RFMR REG_ACCESS(RwReg, 0x40004014U) /**< \brief (SSC) Receive Frame Mode Register */ +#define REG_SSC_TCMR REG_ACCESS(RwReg, 0x40004018U) /**< \brief (SSC) Transmit Clock Mode Register */ +#define REG_SSC_TFMR REG_ACCESS(RwReg, 0x4000401CU) /**< \brief (SSC) Transmit Frame Mode Register */ +#define REG_SSC_RHR REG_ACCESS(RoReg, 0x40004020U) /**< \brief (SSC) Receive Holding Register */ +#define REG_SSC_THR REG_ACCESS(WoReg, 0x40004024U) /**< \brief (SSC) Transmit Holding Register */ +#define REG_SSC_RSHR REG_ACCESS(RoReg, 0x40004030U) /**< \brief (SSC) Receive Sync. Holding Register */ +#define REG_SSC_TSHR REG_ACCESS(RwReg, 0x40004034U) /**< \brief (SSC) Transmit Sync. Holding Register */ +#define REG_SSC_RC0R REG_ACCESS(RwReg, 0x40004038U) /**< \brief (SSC) Receive Compare 0 Register */ +#define REG_SSC_RC1R REG_ACCESS(RwReg, 0x4000403CU) /**< \brief (SSC) Receive Compare 1 Register */ +#define REG_SSC_SR REG_ACCESS(RoReg, 0x40004040U) /**< \brief (SSC) Status Register */ +#define REG_SSC_IER REG_ACCESS(WoReg, 0x40004044U) /**< \brief (SSC) Interrupt Enable Register */ +#define REG_SSC_IDR REG_ACCESS(WoReg, 0x40004048U) /**< \brief (SSC) Interrupt Disable Register */ +#define REG_SSC_IMR REG_ACCESS(RoReg, 0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ +#define REG_SSC_WPMR REG_ACCESS(RwReg, 0x400040E4U) /**< \brief (SSC) Write Protect Mode Register */ +#define REG_SSC_WPSR REG_ACCESS(RoReg, 0x400040E8U) /**< \brief (SSC) Write Protect Status Register */ +#define REG_SSC_RPR REG_ACCESS(RwReg, 0x40004100U) /**< \brief (SSC) Receive Pointer Register */ +#define REG_SSC_RCR REG_ACCESS(RwReg, 0x40004104U) /**< \brief (SSC) Receive Counter Register */ +#define REG_SSC_TPR REG_ACCESS(RwReg, 0x40004108U) /**< \brief (SSC) Transmit Pointer Register */ +#define REG_SSC_TCR REG_ACCESS(RwReg, 0x4000410CU) /**< \brief (SSC) Transmit Counter Register */ +#define REG_SSC_RNPR REG_ACCESS(RwReg, 0x40004110U) /**< \brief (SSC) Receive Next Pointer Register */ +#define REG_SSC_RNCR REG_ACCESS(RwReg, 0x40004114U) /**< \brief (SSC) Receive Next Counter Register */ +#define REG_SSC_TNPR REG_ACCESS(RwReg, 0x40004118U) /**< \brief (SSC) Transmit Next Pointer Register */ +#define REG_SSC_TNCR REG_ACCESS(RwReg, 0x4000411CU) /**< \brief (SSC) Transmit Next Counter Register */ +#define REG_SSC_PTCR REG_ACCESS(WoReg, 0x40004120U) /**< \brief (SSC) Transfer Control Register */ +#define REG_SSC_PTSR REG_ACCESS(RoReg, 0x40004124U) /**< \brief (SSC) Transfer Status Register */ +/* ========== Register definition for SPI peripheral ========== */ +#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /**< \brief (SPI) Control Register */ +#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /**< \brief (SPI) Mode Register */ +#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /**< \brief (SPI) Receive Data Register */ +#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /**< \brief (SPI) Transmit Data Register */ +#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /**< \brief (SPI) Status Register */ +#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /**< \brief (SPI) Interrupt Enable Register */ +#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /**< \brief (SPI) Interrupt Disable Register */ +#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /**< \brief (SPI) Interrupt Mask Register */ +#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /**< \brief (SPI) Chip Select Register */ +#define REG_SPI_WPMR REG_ACCESS(RwReg, 0x400080E4U) /**< \brief (SPI) Write Protection Control Register */ +#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /**< \brief (SPI) Write Protection Status Register */ +#define REG_SPI_RPR REG_ACCESS(RwReg, 0x40008100U) /**< \brief (SPI) Receive Pointer Register */ +#define REG_SPI_RCR REG_ACCESS(RwReg, 0x40008104U) /**< \brief (SPI) Receive Counter Register */ +#define REG_SPI_TPR REG_ACCESS(RwReg, 0x40008108U) /**< \brief (SPI) Transmit Pointer Register */ +#define REG_SPI_TCR REG_ACCESS(RwReg, 0x4000810CU) /**< \brief (SPI) Transmit Counter Register */ +#define REG_SPI_RNPR REG_ACCESS(RwReg, 0x40008110U) /**< \brief (SPI) Receive Next Pointer Register */ +#define REG_SPI_RNCR REG_ACCESS(RwReg, 0x40008114U) /**< \brief (SPI) Receive Next Counter Register */ +#define REG_SPI_TNPR REG_ACCESS(RwReg, 0x40008118U) /**< \brief (SPI) Transmit Next Pointer Register */ +#define REG_SPI_TNCR REG_ACCESS(RwReg, 0x4000811CU) /**< \brief (SPI) Transmit Next Counter Register */ +#define REG_SPI_PTCR REG_ACCESS(WoReg, 0x40008120U) /**< \brief (SPI) Transfer Control Register */ +#define REG_SPI_PTSR REG_ACCESS(RoReg, 0x40008124U) /**< \brief (SPI) Transfer Status Register */ +/* ========== Register definition for TC0 peripheral ========== */ +#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40010000U) /**< \brief (TC0) Channel Control Register (channel = 0) */ +#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40010004U) /**< \brief (TC0) Channel Mode Register (channel = 0) */ +#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40010010U) /**< \brief (TC0) Counter Value (channel = 0) */ +#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40010014U) /**< \brief (TC0) Register A (channel = 0) */ +#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40010018U) /**< \brief (TC0) Register B (channel = 0) */ +#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4001001CU) /**< \brief (TC0) Register C (channel = 0) */ +#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40010020U) /**< \brief (TC0) Status Register (channel = 0) */ +#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40010024U) /**< \brief (TC0) Interrupt Enable Register (channel = 0) */ +#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40010028U) /**< \brief (TC0) Interrupt Disable Register (channel = 0) */ +#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4001002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0) */ +#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40010040U) /**< \brief (TC0) Channel Control Register (channel = 1) */ +#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40010044U) /**< \brief (TC0) Channel Mode Register (channel = 1) */ +#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40010050U) /**< \brief (TC0) Counter Value (channel = 1) */ +#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40010054U) /**< \brief (TC0) Register A (channel = 1) */ +#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40010058U) /**< \brief (TC0) Register B (channel = 1) */ +#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4001005CU) /**< \brief (TC0) Register C (channel = 1) */ +#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40010060U) /**< \brief (TC0) Status Register (channel = 1) */ +#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40010064U) /**< \brief (TC0) Interrupt Enable Register (channel = 1) */ +#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40010068U) /**< \brief (TC0) Interrupt Disable Register (channel = 1) */ +#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4001006CU) /**< \brief (TC0) Interrupt Mask Register (channel = 1) */ +#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40010080U) /**< \brief (TC0) Channel Control Register (channel = 2) */ +#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40010084U) /**< \brief (TC0) Channel Mode Register (channel = 2) */ +#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40010090U) /**< \brief (TC0) Counter Value (channel = 2) */ +#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40010094U) /**< \brief (TC0) Register A (channel = 2) */ +#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40010098U) /**< \brief (TC0) Register B (channel = 2) */ +#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4001009CU) /**< \brief (TC0) Register C (channel = 2) */ +#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400100A0U) /**< \brief (TC0) Status Register (channel = 2) */ +#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400100A4U) /**< \brief (TC0) Interrupt Enable Register (channel = 2) */ +#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400100A8U) /**< \brief (TC0) Interrupt Disable Register (channel = 2) */ +#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400100ACU) /**< \brief (TC0) Interrupt Mask Register (channel = 2) */ +#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400100C0U) /**< \brief (TC0) Block Control Register */ +#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400100C4U) /**< \brief (TC0) Block Mode Register */ +#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400100C8U) /**< \brief (TC0) QDEC Interrupt Enable Register */ +#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400100CCU) /**< \brief (TC0) QDEC Interrupt Disable Register */ +#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400100D0U) /**< \brief (TC0) QDEC Interrupt Mask Register */ +#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400100D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ +#define REG_TC0_FMR REG_ACCESS(RwReg, 0x400100D8U) /**< \brief (TC0) Fault Mode Register */ +#define REG_TC0_WPMR REG_ACCESS(RwReg, 0x400100E4U) /**< \brief (TC0) Write Protect Mode Register */ +#define REG_TC0_VER REG_ACCESS(RoReg, 0x400100FCU) /**< \brief (TC0) Version Register */ +/* ========== Register definition for TC1 peripheral ========== */ +#define REG_TC1_CCR0 REG_ACCESS(WoReg, 0x40014000U) /**< \brief (TC1) Channel Control Register (channel = 0) */ +#define REG_TC1_CMR0 REG_ACCESS(RwReg, 0x40014004U) /**< \brief (TC1) Channel Mode Register (channel = 0) */ +#define REG_TC1_CV0 REG_ACCESS(RoReg, 0x40014010U) /**< \brief (TC1) Counter Value (channel = 0) */ +#define REG_TC1_RA0 REG_ACCESS(RwReg, 0x40014014U) /**< \brief (TC1) Register A (channel = 0) */ +#define REG_TC1_RB0 REG_ACCESS(RwReg, 0x40014018U) /**< \brief (TC1) Register B (channel = 0) */ +#define REG_TC1_RC0 REG_ACCESS(RwReg, 0x4001401CU) /**< \brief (TC1) Register C (channel = 0) */ +#define REG_TC1_SR0 REG_ACCESS(RoReg, 0x40014020U) /**< \brief (TC1) Status Register (channel = 0) */ +#define REG_TC1_IER0 REG_ACCESS(WoReg, 0x40014024U) /**< \brief (TC1) Interrupt Enable Register (channel = 0) */ +#define REG_TC1_IDR0 REG_ACCESS(WoReg, 0x40014028U) /**< \brief (TC1) Interrupt Disable Register (channel = 0) */ +#define REG_TC1_IMR0 REG_ACCESS(RoReg, 0x4001402CU) /**< \brief (TC1) Interrupt Mask Register (channel = 0) */ +#define REG_TC1_CCR1 REG_ACCESS(WoReg, 0x40014040U) /**< \brief (TC1) Channel Control Register (channel = 1) */ +#define REG_TC1_CMR1 REG_ACCESS(RwReg, 0x40014044U) /**< \brief (TC1) Channel Mode Register (channel = 1) */ +#define REG_TC1_CV1 REG_ACCESS(RoReg, 0x40014050U) /**< \brief (TC1) Counter Value (channel = 1) */ +#define REG_TC1_RA1 REG_ACCESS(RwReg, 0x40014054U) /**< \brief (TC1) Register A (channel = 1) */ +#define REG_TC1_RB1 REG_ACCESS(RwReg, 0x40014058U) /**< \brief (TC1) Register B (channel = 1) */ +#define REG_TC1_RC1 REG_ACCESS(RwReg, 0x4001405CU) /**< \brief (TC1) Register C (channel = 1) */ +#define REG_TC1_SR1 REG_ACCESS(RoReg, 0x40014060U) /**< \brief (TC1) Status Register (channel = 1) */ +#define REG_TC1_IER1 REG_ACCESS(WoReg, 0x40014064U) /**< \brief (TC1) Interrupt Enable Register (channel = 1) */ +#define REG_TC1_IDR1 REG_ACCESS(WoReg, 0x40014068U) /**< \brief (TC1) Interrupt Disable Register (channel = 1) */ +#define REG_TC1_IMR1 REG_ACCESS(RoReg, 0x4001406CU) /**< \brief (TC1) Interrupt Mask Register (channel = 1) */ +#define REG_TC1_CCR2 REG_ACCESS(WoReg, 0x40014080U) /**< \brief (TC1) Channel Control Register (channel = 2) */ +#define REG_TC1_CMR2 REG_ACCESS(RwReg, 0x40014084U) /**< \brief (TC1) Channel Mode Register (channel = 2) */ +#define REG_TC1_CV2 REG_ACCESS(RoReg, 0x40014090U) /**< \brief (TC1) Counter Value (channel = 2) */ +#define REG_TC1_RA2 REG_ACCESS(RwReg, 0x40014094U) /**< \brief (TC1) Register A (channel = 2) */ +#define REG_TC1_RB2 REG_ACCESS(RwReg, 0x40014098U) /**< \brief (TC1) Register B (channel = 2) */ +#define REG_TC1_RC2 REG_ACCESS(RwReg, 0x4001409CU) /**< \brief (TC1) Register C (channel = 2) */ +#define REG_TC1_SR2 REG_ACCESS(RoReg, 0x400140A0U) /**< \brief (TC1) Status Register (channel = 2) */ +#define REG_TC1_IER2 REG_ACCESS(WoReg, 0x400140A4U) /**< \brief (TC1) Interrupt Enable Register (channel = 2) */ +#define REG_TC1_IDR2 REG_ACCESS(WoReg, 0x400140A8U) /**< \brief (TC1) Interrupt Disable Register (channel = 2) */ +#define REG_TC1_IMR2 REG_ACCESS(RoReg, 0x400140ACU) /**< \brief (TC1) Interrupt Mask Register (channel = 2) */ +#define REG_TC1_BCR REG_ACCESS(WoReg, 0x400140C0U) /**< \brief (TC1) Block Control Register */ +#define REG_TC1_BMR REG_ACCESS(RwReg, 0x400140C4U) /**< \brief (TC1) Block Mode Register */ +#define REG_TC1_QIER REG_ACCESS(WoReg, 0x400140C8U) /**< \brief (TC1) QDEC Interrupt Enable Register */ +#define REG_TC1_QIDR REG_ACCESS(WoReg, 0x400140CCU) /**< \brief (TC1) QDEC Interrupt Disable Register */ +#define REG_TC1_QIMR REG_ACCESS(RoReg, 0x400140D0U) /**< \brief (TC1) QDEC Interrupt Mask Register */ +#define REG_TC1_QISR REG_ACCESS(RoReg, 0x400140D4U) /**< \brief (TC1) QDEC Interrupt Status Register */ +#define REG_TC1_FMR REG_ACCESS(RwReg, 0x400140D8U) /**< \brief (TC1) Fault Mode Register */ +#define REG_TC1_WPMR REG_ACCESS(RwReg, 0x400140E4U) /**< \brief (TC1) Write Protect Mode Register */ +#define REG_TC1_VER REG_ACCESS(RoReg, 0x400140FCU) /**< \brief (TC1) Version Register */ +/* ========== Register definition for TWI0 peripheral ========== */ +#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40018000U) /**< \brief (TWI0) Control Register */ +#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40018004U) /**< \brief (TWI0) Master Mode Register */ +#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40018008U) /**< \brief (TWI0) Slave Mode Register */ +#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4001800CU) /**< \brief (TWI0) Internal Address Register */ +#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40018010U) /**< \brief (TWI0) Clock Waveform Generator Register */ +#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40018020U) /**< \brief (TWI0) Status Register */ +#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40018024U) /**< \brief (TWI0) Interrupt Enable Register */ +#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40018028U) /**< \brief (TWI0) Interrupt Disable Register */ +#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4001802CU) /**< \brief (TWI0) Interrupt Mask Register */ +#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40018030U) /**< \brief (TWI0) Receive Holding Register */ +#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40018034U) /**< \brief (TWI0) Transmit Holding Register */ +#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40018100U) /**< \brief (TWI0) Receive Pointer Register */ +#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40018104U) /**< \brief (TWI0) Receive Counter Register */ +#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40018108U) /**< \brief (TWI0) Transmit Pointer Register */ +#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4001810CU) /**< \brief (TWI0) Transmit Counter Register */ +#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40018110U) /**< \brief (TWI0) Receive Next Pointer Register */ +#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40018114U) /**< \brief (TWI0) Receive Next Counter Register */ +#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40018118U) /**< \brief (TWI0) Transmit Next Pointer Register */ +#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4001811CU) /**< \brief (TWI0) Transmit Next Counter Register */ +#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40018120U) /**< \brief (TWI0) Transfer Control Register */ +#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40018124U) /**< \brief (TWI0) Transfer Status Register */ +/* ========== Register definition for TWI1 peripheral ========== */ +#define REG_TWI1_CR REG_ACCESS(WoReg, 0x4001C000U) /**< \brief (TWI1) Control Register */ +#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x4001C004U) /**< \brief (TWI1) Master Mode Register */ +#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x4001C008U) /**< \brief (TWI1) Slave Mode Register */ +#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4001C00CU) /**< \brief (TWI1) Internal Address Register */ +#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x4001C010U) /**< \brief (TWI1) Clock Waveform Generator Register */ +#define REG_TWI1_SR REG_ACCESS(RoReg, 0x4001C020U) /**< \brief (TWI1) Status Register */ +#define REG_TWI1_IER REG_ACCESS(WoReg, 0x4001C024U) /**< \brief (TWI1) Interrupt Enable Register */ +#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x4001C028U) /**< \brief (TWI1) Interrupt Disable Register */ +#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4001C02CU) /**< \brief (TWI1) Interrupt Mask Register */ +#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x4001C030U) /**< \brief (TWI1) Receive Holding Register */ +#define REG_TWI1_THR REG_ACCESS(WoReg, 0x4001C034U) /**< \brief (TWI1) Transmit Holding Register */ +#define REG_TWI1_RPR REG_ACCESS(RwReg, 0x4001C100U) /**< \brief (TWI1) Receive Pointer Register */ +#define REG_TWI1_RCR REG_ACCESS(RwReg, 0x4001C104U) /**< \brief (TWI1) Receive Counter Register */ +#define REG_TWI1_TPR REG_ACCESS(RwReg, 0x4001C108U) /**< \brief (TWI1) Transmit Pointer Register */ +#define REG_TWI1_TCR REG_ACCESS(RwReg, 0x4001C10CU) /**< \brief (TWI1) Transmit Counter Register */ +#define REG_TWI1_RNPR REG_ACCESS(RwReg, 0x4001C110U) /**< \brief (TWI1) Receive Next Pointer Register */ +#define REG_TWI1_RNCR REG_ACCESS(RwReg, 0x4001C114U) /**< \brief (TWI1) Receive Next Counter Register */ +#define REG_TWI1_TNPR REG_ACCESS(RwReg, 0x4001C118U) /**< \brief (TWI1) Transmit Next Pointer Register */ +#define REG_TWI1_TNCR REG_ACCESS(RwReg, 0x4001C11CU) /**< \brief (TWI1) Transmit Next Counter Register */ +#define REG_TWI1_PTCR REG_ACCESS(WoReg, 0x4001C120U) /**< \brief (TWI1) Transfer Control Register */ +#define REG_TWI1_PTSR REG_ACCESS(RoReg, 0x4001C124U) /**< \brief (TWI1) Transfer Status Register */ +/* ========== Register definition for PWM peripheral ========== */ +#define REG_PWM_CLK REG_ACCESS(RwReg, 0x40020000U) /**< \brief (PWM) PWM Clock Register */ +#define REG_PWM_ENA REG_ACCESS(WoReg, 0x40020004U) /**< \brief (PWM) PWM Enable Register */ +#define REG_PWM_DIS REG_ACCESS(WoReg, 0x40020008U) /**< \brief (PWM) PWM Disable Register */ +#define REG_PWM_SR REG_ACCESS(RoReg, 0x4002000CU) /**< \brief (PWM) PWM Status Register */ +#define REG_PWM_IER1 REG_ACCESS(WoReg, 0x40020010U) /**< \brief (PWM) PWM Interrupt Enable Register 1 */ +#define REG_PWM_IDR1 REG_ACCESS(WoReg, 0x40020014U) /**< \brief (PWM) PWM Interrupt Disable Register 1 */ +#define REG_PWM_IMR1 REG_ACCESS(RoReg, 0x40020018U) /**< \brief (PWM) PWM Interrupt Mask Register 1 */ +#define REG_PWM_ISR1 REG_ACCESS(RoReg, 0x4002001CU) /**< \brief (PWM) PWM Interrupt Status Register 1 */ +#define REG_PWM_SCM REG_ACCESS(RwReg, 0x40020020U) /**< \brief (PWM) PWM Sync Channels Mode Register */ +#define REG_PWM_SCUC REG_ACCESS(RwReg, 0x40020028U) /**< \brief (PWM) PWM Sync Channels Update Control Register */ +#define REG_PWM_SCUP REG_ACCESS(RwReg, 0x4002002CU) /**< \brief (PWM) PWM Sync Channels Update Period Register */ +#define REG_PWM_SCUPUPD REG_ACCESS(WoReg, 0x40020030U) /**< \brief (PWM) PWM Sync Channels Update Period Update Register */ +#define REG_PWM_IER2 REG_ACCESS(WoReg, 0x40020034U) /**< \brief (PWM) PWM Interrupt Enable Register 2 */ +#define REG_PWM_IDR2 REG_ACCESS(WoReg, 0x40020038U) /**< \brief (PWM) PWM Interrupt Disable Register 2 */ +#define REG_PWM_IMR2 REG_ACCESS(RoReg, 0x4002003CU) /**< \brief (PWM) PWM Interrupt Mask Register 2 */ +#define REG_PWM_ISR2 REG_ACCESS(RoReg, 0x40020040U) /**< \brief (PWM) PWM Interrupt Status Register 2 */ +#define REG_PWM_OOV REG_ACCESS(RwReg, 0x40020044U) /**< \brief (PWM) PWM Output Override Value Register */ +#define REG_PWM_OS REG_ACCESS(RwReg, 0x40020048U) /**< \brief (PWM) PWM Output Selection Register */ +#define REG_PWM_OSS REG_ACCESS(WoReg, 0x4002004CU) /**< \brief (PWM) PWM Output Selection Set Register */ +#define REG_PWM_OSC REG_ACCESS(WoReg, 0x40020050U) /**< \brief (PWM) PWM Output Selection Clear Register */ +#define REG_PWM_OSSUPD REG_ACCESS(WoReg, 0x40020054U) /**< \brief (PWM) PWM Output Selection Set Update Register */ +#define REG_PWM_OSCUPD REG_ACCESS(WoReg, 0x40020058U) /**< \brief (PWM) PWM Output Selection Clear Update Register */ +#define REG_PWM_FMR REG_ACCESS(RwReg, 0x4002005CU) /**< \brief (PWM) PWM Fault Mode Register */ +#define REG_PWM_FSR REG_ACCESS(RoReg, 0x40020060U) /**< \brief (PWM) PWM Fault Status Register */ +#define REG_PWM_FCR REG_ACCESS(WoReg, 0x40020064U) /**< \brief (PWM) PWM Fault Clear Register */ +#define REG_PWM_FPV REG_ACCESS(RwReg, 0x40020068U) /**< \brief (PWM) PWM Fault Protection Value Register */ +#define REG_PWM_FPE REG_ACCESS(RwReg, 0x4002006CU) /**< \brief (PWM) PWM Fault Protection Enable Register */ +#define REG_PWM_ELxMR REG_ACCESS(RwReg, 0x4002007CU) /**< \brief (PWM) PWM Event Line 0 Mode Register */ +#define REG_PWM_SMMR REG_ACCESS(RwReg, 0x400200B0U) /**< \brief (PWM) PWM Stepper Motor Mode Register */ +#define REG_PWM_WPCR REG_ACCESS(WoReg, 0x400200E4U) /**< \brief (PWM) PWM Write Protect Control Register */ +#define REG_PWM_WPSR REG_ACCESS(RoReg, 0x400200E8U) /**< \brief (PWM) PWM Write Protect Status Register */ +#define REG_PWM_RPR REG_ACCESS(RwReg, 0x40020100U) /**< \brief (PWM) Receive Pointer Register */ +#define REG_PWM_RCR REG_ACCESS(RwReg, 0x40020104U) /**< \brief (PWM) Receive Counter Register */ +#define REG_PWM_TPR REG_ACCESS(RwReg, 0x40020108U) /**< \brief (PWM) Transmit Pointer Register */ +#define REG_PWM_TCR REG_ACCESS(RwReg, 0x4002010CU) /**< \brief (PWM) Transmit Counter Register */ +#define REG_PWM_RNPR REG_ACCESS(RwReg, 0x40020110U) /**< \brief (PWM) Receive Next Pointer Register */ +#define REG_PWM_RNCR REG_ACCESS(RwReg, 0x40020114U) /**< \brief (PWM) Receive Next Counter Register */ +#define REG_PWM_TNPR REG_ACCESS(RwReg, 0x40020118U) /**< \brief (PWM) Transmit Next Pointer Register */ +#define REG_PWM_TNCR REG_ACCESS(RwReg, 0x4002011CU) /**< \brief (PWM) Transmit Next Counter Register */ +#define REG_PWM_PTCR REG_ACCESS(WoReg, 0x40020120U) /**< \brief (PWM) Transfer Control Register */ +#define REG_PWM_PTSR REG_ACCESS(RoReg, 0x40020124U) /**< \brief (PWM) Transfer Status Register */ +#define REG_PWM_CMP0V REG_ACCESS(RwReg, 0x40020130U) /**< \brief (PWM) PWM Comparison 0 Value Register */ +#define REG_PWM_CMP0VUPD REG_ACCESS(WoReg, 0x40020134U) /**< \brief (PWM) PWM Comparison 0 Value Update Register */ +#define REG_PWM_CMP0M REG_ACCESS(RwReg, 0x40020138U) /**< \brief (PWM) PWM Comparison 0 Mode Register */ +#define REG_PWM_CMP0MUPD REG_ACCESS(WoReg, 0x4002013CU) /**< \brief (PWM) PWM Comparison 0 Mode Update Register */ +#define REG_PWM_CMP1V REG_ACCESS(RwReg, 0x40020140U) /**< \brief (PWM) PWM Comparison 1 Value Register */ +#define REG_PWM_CMP1VUPD REG_ACCESS(WoReg, 0x40020144U) /**< \brief (PWM) PWM Comparison 1 Value Update Register */ +#define REG_PWM_CMP1M REG_ACCESS(RwReg, 0x40020148U) /**< \brief (PWM) PWM Comparison 1 Mode Register */ +#define REG_PWM_CMP1MUPD REG_ACCESS(WoReg, 0x4002014CU) /**< \brief (PWM) PWM Comparison 1 Mode Update Register */ +#define REG_PWM_CMP2V REG_ACCESS(RwReg, 0x40020150U) /**< \brief (PWM) PWM Comparison 2 Value Register */ +#define REG_PWM_CMP2VUPD REG_ACCESS(WoReg, 0x40020154U) /**< \brief (PWM) PWM Comparison 2 Value Update Register */ +#define REG_PWM_CMP2M REG_ACCESS(RwReg, 0x40020158U) /**< \brief (PWM) PWM Comparison 2 Mode Register */ +#define REG_PWM_CMP2MUPD REG_ACCESS(WoReg, 0x4002015CU) /**< \brief (PWM) PWM Comparison 2 Mode Update Register */ +#define REG_PWM_CMP3V REG_ACCESS(RwReg, 0x40020160U) /**< \brief (PWM) PWM Comparison 3 Value Register */ +#define REG_PWM_CMP3VUPD REG_ACCESS(WoReg, 0x40020164U) /**< \brief (PWM) PWM Comparison 3 Value Update Register */ +#define REG_PWM_CMP3M REG_ACCESS(RwReg, 0x40020168U) /**< \brief (PWM) PWM Comparison 3 Mode Register */ +#define REG_PWM_CMP3MUPD REG_ACCESS(WoReg, 0x4002016CU) /**< \brief (PWM) PWM Comparison 3 Mode Update Register */ +#define REG_PWM_CMP4V REG_ACCESS(RwReg, 0x40020170U) /**< \brief (PWM) PWM Comparison 4 Value Register */ +#define REG_PWM_CMP4VUPD REG_ACCESS(WoReg, 0x40020174U) /**< \brief (PWM) PWM Comparison 4 Value Update Register */ +#define REG_PWM_CMP4M REG_ACCESS(RwReg, 0x40020178U) /**< \brief (PWM) PWM Comparison 4 Mode Register */ +#define REG_PWM_CMP4MUPD REG_ACCESS(WoReg, 0x4002017CU) /**< \brief (PWM) PWM Comparison 4 Mode Update Register */ +#define REG_PWM_CMP5V REG_ACCESS(RwReg, 0x40020180U) /**< \brief (PWM) PWM Comparison 5 Value Register */ +#define REG_PWM_CMP5VUPD REG_ACCESS(WoReg, 0x40020184U) /**< \brief (PWM) PWM Comparison 5 Value Update Register */ +#define REG_PWM_CMP5M REG_ACCESS(RwReg, 0x40020188U) /**< \brief (PWM) PWM Comparison 5 Mode Register */ +#define REG_PWM_CMP5MUPD REG_ACCESS(WoReg, 0x4002018CU) /**< \brief (PWM) PWM Comparison 5 Mode Update Register */ +#define REG_PWM_CMP6V REG_ACCESS(RwReg, 0x40020190U) /**< \brief (PWM) PWM Comparison 6 Value Register */ +#define REG_PWM_CMP6VUPD REG_ACCESS(WoReg, 0x40020194U) /**< \brief (PWM) PWM Comparison 6 Value Update Register */ +#define REG_PWM_CMP6M REG_ACCESS(RwReg, 0x40020198U) /**< \brief (PWM) PWM Comparison 6 Mode Register */ +#define REG_PWM_CMP6MUPD REG_ACCESS(WoReg, 0x4002019CU) /**< \brief (PWM) PWM Comparison 6 Mode Update Register */ +#define REG_PWM_CMP7V REG_ACCESS(RwReg, 0x400201A0U) /**< \brief (PWM) PWM Comparison 7 Value Register */ +#define REG_PWM_CMP7VUPD REG_ACCESS(WoReg, 0x400201A4U) /**< \brief (PWM) PWM Comparison 7 Value Update Register */ +#define REG_PWM_CMP7M REG_ACCESS(RwReg, 0x400201A8U) /**< \brief (PWM) PWM Comparison 7 Mode Register */ +#define REG_PWM_CMP7MUPD REG_ACCESS(WoReg, 0x400201ACU) /**< \brief (PWM) PWM Comparison 7 Mode Update Register */ +#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x40020200U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 0) */ +#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x40020204U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ +#define REG_PWM_CDTYUPD0 REG_ACCESS(WoReg, 0x40020208U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 0) */ +#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x4002020CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 0) */ +#define REG_PWM_CPRDUPD0 REG_ACCESS(WoReg, 0x40020210U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 0) */ +#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x40020214U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 0) */ +#define REG_PWM_DT0 REG_ACCESS(RwReg, 0x40020218U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 0) */ +#define REG_PWM_DTUPD0 REG_ACCESS(WoReg, 0x4002021CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 0) */ +#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x40020220U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 1) */ +#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x40020224U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ +#define REG_PWM_CDTYUPD1 REG_ACCESS(WoReg, 0x40020228U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 1) */ +#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x4002022CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 1) */ +#define REG_PWM_CPRDUPD1 REG_ACCESS(WoReg, 0x40020230U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 1) */ +#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x40020234U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 1) */ +#define REG_PWM_DT1 REG_ACCESS(RwReg, 0x40020238U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 1) */ +#define REG_PWM_DTUPD1 REG_ACCESS(WoReg, 0x4002023CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 1) */ +#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x40020240U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 2) */ +#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x40020244U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ +#define REG_PWM_CDTYUPD2 REG_ACCESS(WoReg, 0x40020248U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 2) */ +#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x4002024CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 2) */ +#define REG_PWM_CPRDUPD2 REG_ACCESS(WoReg, 0x40020250U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 2) */ +#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x40020254U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 2) */ +#define REG_PWM_DT2 REG_ACCESS(RwReg, 0x40020258U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 2) */ +#define REG_PWM_DTUPD2 REG_ACCESS(WoReg, 0x4002025CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 2) */ +#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x40020260U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 3) */ +#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x40020264U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ +#define REG_PWM_CDTYUPD3 REG_ACCESS(WoReg, 0x40020268U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 3) */ +#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x4002026CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 3) */ +#define REG_PWM_CPRDUPD3 REG_ACCESS(WoReg, 0x40020270U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 3) */ +#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x40020274U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 3) */ +#define REG_PWM_DT3 REG_ACCESS(RwReg, 0x40020278U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 3) */ +#define REG_PWM_DTUPD3 REG_ACCESS(WoReg, 0x4002027CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 3) */ +/* ========== Register definition for USART0 peripheral ========== */ +#define REG_USART0_CR REG_ACCESS(WoReg, 0x40024000U) /**< \brief (USART0) Control Register */ +#define REG_USART0_MR REG_ACCESS(RwReg, 0x40024004U) /**< \brief (USART0) Mode Register */ +#define REG_USART0_IER REG_ACCESS(WoReg, 0x40024008U) /**< \brief (USART0) Interrupt Enable Register */ +#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4002400CU) /**< \brief (USART0) Interrupt Disable Register */ +#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40024010U) /**< \brief (USART0) Interrupt Mask Register */ +#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40024014U) /**< \brief (USART0) Channel Status Register */ +#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40024018U) /**< \brief (USART0) Receiver Holding Register */ +#define REG_USART0_THR REG_ACCESS(WoReg, 0x4002401CU) /**< \brief (USART0) Transmitter Holding Register */ +#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40024020U) /**< \brief (USART0) Baud Rate Generator Register */ +#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40024024U) /**< \brief (USART0) Receiver Time-out Register */ +#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40024028U) /**< \brief (USART0) Transmitter Timeguard Register */ +#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40024040U) /**< \brief (USART0) FI DI Ratio Register */ +#define REG_USART0_NER REG_ACCESS(RoReg, 0x40024044U) /**< \brief (USART0) Number of Errors Register */ +#define REG_USART0_IF REG_ACCESS(RwReg, 0x4002404CU) /**< \brief (USART0) IrDA Filter Register */ +#define REG_USART0_MAN REG_ACCESS(RwReg, 0x40024050U) /**< \brief (USART0) Manchester Encoder Decoder Register */ +#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400240E4U) /**< \brief (USART0) Write Protect Mode Register */ +#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400240E8U) /**< \brief (USART0) Write Protect Status Register */ +#define REG_USART0_VERSION REG_ACCESS(RoReg, 0x400240FCU) /**< \brief (USART0) Version Register */ +#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40024100U) /**< \brief (USART0) Receive Pointer Register */ +#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40024104U) /**< \brief (USART0) Receive Counter Register */ +#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40024108U) /**< \brief (USART0) Transmit Pointer Register */ +#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4002410CU) /**< \brief (USART0) Transmit Counter Register */ +#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40024110U) /**< \brief (USART0) Receive Next Pointer Register */ +#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40024114U) /**< \brief (USART0) Receive Next Counter Register */ +#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40024118U) /**< \brief (USART0) Transmit Next Pointer Register */ +#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4002411CU) /**< \brief (USART0) Transmit Next Counter Register */ +#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40024120U) /**< \brief (USART0) Transfer Control Register */ +#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40024124U) /**< \brief (USART0) Transfer Status Register */ +/* ========== Register definition for USART1 peripheral ========== */ +#define REG_USART1_CR REG_ACCESS(WoReg, 0x40028000U) /**< \brief (USART1) Control Register */ +#define REG_USART1_MR REG_ACCESS(RwReg, 0x40028004U) /**< \brief (USART1) Mode Register */ +#define REG_USART1_IER REG_ACCESS(WoReg, 0x40028008U) /**< \brief (USART1) Interrupt Enable Register */ +#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4002800CU) /**< \brief (USART1) Interrupt Disable Register */ +#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40028010U) /**< \brief (USART1) Interrupt Mask Register */ +#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40028014U) /**< \brief (USART1) Channel Status Register */ +#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40028018U) /**< \brief (USART1) Receiver Holding Register */ +#define REG_USART1_THR REG_ACCESS(WoReg, 0x4002801CU) /**< \brief (USART1) Transmitter Holding Register */ +#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40028020U) /**< \brief (USART1) Baud Rate Generator Register */ +#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40028024U) /**< \brief (USART1) Receiver Time-out Register */ +#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40028028U) /**< \brief (USART1) Transmitter Timeguard Register */ +#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40028040U) /**< \brief (USART1) FI DI Ratio Register */ +#define REG_USART1_NER REG_ACCESS(RoReg, 0x40028044U) /**< \brief (USART1) Number of Errors Register */ +#define REG_USART1_IF REG_ACCESS(RwReg, 0x4002804CU) /**< \brief (USART1) IrDA Filter Register */ +#define REG_USART1_MAN REG_ACCESS(RwReg, 0x40028050U) /**< \brief (USART1) Manchester Encoder Decoder Register */ +#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400280E4U) /**< \brief (USART1) Write Protect Mode Register */ +#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400280E8U) /**< \brief (USART1) Write Protect Status Register */ +#define REG_USART1_VERSION REG_ACCESS(RoReg, 0x400280FCU) /**< \brief (USART1) Version Register */ +#define REG_USART1_RPR REG_ACCESS(RwReg, 0x40028100U) /**< \brief (USART1) Receive Pointer Register */ +#define REG_USART1_RCR REG_ACCESS(RwReg, 0x40028104U) /**< \brief (USART1) Receive Counter Register */ +#define REG_USART1_TPR REG_ACCESS(RwReg, 0x40028108U) /**< \brief (USART1) Transmit Pointer Register */ +#define REG_USART1_TCR REG_ACCESS(RwReg, 0x4002810CU) /**< \brief (USART1) Transmit Counter Register */ +#define REG_USART1_RNPR REG_ACCESS(RwReg, 0x40028110U) /**< \brief (USART1) Receive Next Pointer Register */ +#define REG_USART1_RNCR REG_ACCESS(RwReg, 0x40028114U) /**< \brief (USART1) Receive Next Counter Register */ +#define REG_USART1_TNPR REG_ACCESS(RwReg, 0x40028118U) /**< \brief (USART1) Transmit Next Pointer Register */ +#define REG_USART1_TNCR REG_ACCESS(RwReg, 0x4002811CU) /**< \brief (USART1) Transmit Next Counter Register */ +#define REG_USART1_PTCR REG_ACCESS(WoReg, 0x40028120U) /**< \brief (USART1) Transfer Control Register */ +#define REG_USART1_PTSR REG_ACCESS(RoReg, 0x40028124U) /**< \brief (USART1) Transfer Status Register */ +/* ========== Register definition for UDP peripheral ========== */ +#define REG_UDP_FRM_NUM REG_ACCESS(RoReg, 0x40034000U) /**< \brief (UDP) Frame Number Register */ +#define REG_UDP_GLB_STAT REG_ACCESS(RwReg, 0x40034004U) /**< \brief (UDP) Global State Register */ +#define REG_UDP_FADDR REG_ACCESS(RwReg, 0x40034008U) /**< \brief (UDP) Function Address Register */ +#define REG_UDP_IER REG_ACCESS(WoReg, 0x40034010U) /**< \brief (UDP) Interrupt Enable Register */ +#define REG_UDP_IDR REG_ACCESS(WoReg, 0x40034014U) /**< \brief (UDP) Interrupt Disable Register */ +#define REG_UDP_IMR REG_ACCESS(RoReg, 0x40034018U) /**< \brief (UDP) Interrupt Mask Register */ +#define REG_UDP_ISR REG_ACCESS(RoReg, 0x4003401CU) /**< \brief (UDP) Interrupt Status Register */ +#define REG_UDP_ICR REG_ACCESS(WoReg, 0x40034020U) /**< \brief (UDP) Interrupt Clear Register */ +#define REG_UDP_RST_EP REG_ACCESS(RwReg, 0x40034028U) /**< \brief (UDP) Reset Endpoint Register */ +#define REG_UDP_CSR REG_ACCESS(RwReg, 0x4003402CU) /**< \brief (UDP) Endpoint Control and Status Register (ept_num = 0) */ +#define REG_UDP_FDR REG_ACCESS(RwReg, 0x4003404CU) /**< \brief (UDP) Endpoint FIFO Data Register (ept_num = 0) */ +#define REG_UDP_TXVC REG_ACCESS(RwReg, 0x40034074U) /**< \brief (UDP) Transceiver Control Register */ +/* ========== Register definition for ADC peripheral ========== */ +#define REG_ADC_CR REG_ACCESS(WoReg, 0x40038000U) /**< \brief (ADC) Control Register */ +#define REG_ADC_MR REG_ACCESS(RwReg, 0x40038004U) /**< \brief (ADC) Mode Register */ +#define REG_ADC_SEQ1R REG_ACCESS(RwReg, 0x40038008U) /**< \brief (ADC) Channel Sequence 1Register */ +#define REG_ADC_SEQ2R REG_ACCESS(RwReg, 0x4003800CU) /**< \brief (ADC) Channel Sequence 2 Register */ +#define REG_ADC_CHER REG_ACCESS(WoReg, 0x40038010U) /**< \brief (ADC) Channel Enable Register */ +#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x40038014U) /**< \brief (ADC) Channel Disable Register */ +#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x40038018U) /**< \brief (ADC) Channel Status Register */ +#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x40038020U) /**< \brief (ADC) Last Converted Data Register */ +#define REG_ADC_IER REG_ACCESS(WoReg, 0x40038024U) /**< \brief (ADC) Interrupt Enable Register */ +#define REG_ADC_IDR REG_ACCESS(WoReg, 0x40038028U) /**< \brief (ADC) Interrupt Disable Register */ +#define REG_ADC_IMR REG_ACCESS(RoReg, 0x4003802CU) /**< \brief (ADC) Interrupt Mask Register */ +#define REG_ADC_ISR REG_ACCESS(RoReg, 0x40038030U) /**< \brief (ADC) Interrupt Status Register */ +#define REG_ADC_OVER REG_ACCESS(RoReg, 0x4003803CU) /**< \brief (ADC) Overrun Status Register */ +#define REG_ADC_EMR REG_ACCESS(RwReg, 0x40038040U) /**< \brief (ADC) Extended Mode Register */ +#define REG_ADC_CWR REG_ACCESS(RwReg, 0x40038044U) /**< \brief (ADC) Compare Window Register */ +#define REG_ADC_CGR REG_ACCESS(RwReg, 0x40038048U) /**< \brief (ADC) Channel Gain Register */ +#define REG_ADC_COR REG_ACCESS(RwReg, 0x4003804CU) /**< \brief (ADC) Channel Offset Register */ +#define REG_ADC_CDR0 REG_ACCESS(RoReg, 0x40038050U) /**< \brief (ADC) Channel Data Register 0 */ +#define REG_ADC_CDR1 REG_ACCESS(RoReg, 0x40038054U) /**< \brief (ADC) Channel Data Register 1 */ +#define REG_ADC_CDR2 REG_ACCESS(RoReg, 0x40038058U) /**< \brief (ADC) Channel Data Register 2 */ +#define REG_ADC_CDR3 REG_ACCESS(RoReg, 0x4003805CU) /**< \brief (ADC) Channel Data Register 3 */ +#define REG_ADC_CDR4 REG_ACCESS(RoReg, 0x40038060U) /**< \brief (ADC) Channel Data Register 4 */ +#define REG_ADC_CDR5 REG_ACCESS(RoReg, 0x40038064U) /**< \brief (ADC) Channel Data Register 5 */ +#define REG_ADC_CDR6 REG_ACCESS(RoReg, 0x40038068U) /**< \brief (ADC) Channel Data Register 6 */ +#define REG_ADC_CDR15 REG_ACCESS(RoReg, 0x4003806CU) /**< \brief (ADC) Channel Data Register 15 */ +#define REG_ADC_ACR REG_ACCESS(RwReg, 0x40038094U) /**< \brief (ADC) Analog Control Register */ +#define REG_ADC_WPMR REG_ACCESS(RwReg, 0x400380E4U) /**< \brief (ADC) Write Protect Mode Register */ +#define REG_ADC_WPSR REG_ACCESS(RoReg, 0x400380E8U) /**< \brief (ADC) Write Protect Status Register */ +#define REG_ADC_RPR REG_ACCESS(RwReg, 0x40038100U) /**< \brief (ADC) Receive Pointer Register */ +#define REG_ADC_RCR REG_ACCESS(RwReg, 0x40038104U) /**< \brief (ADC) Receive Counter Register */ +#define REG_ADC_TPR REG_ACCESS(RwReg, 0x40038108U) /**< \brief (ADC) Transmit Pointer Register */ +#define REG_ADC_TCR REG_ACCESS(RwReg, 0x4003810CU) /**< \brief (ADC) Transmit Counter Register */ +#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x40038110U) /**< \brief (ADC) Receive Next Pointer Register */ +#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x40038114U) /**< \brief (ADC) Receive Next Counter Register */ +#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x40038118U) /**< \brief (ADC) Transmit Next Pointer Register */ +#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x4003811CU) /**< \brief (ADC) Transmit Next Counter Register */ +#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x40038120U) /**< \brief (ADC) Transfer Control Register */ +#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x40038124U) /**< \brief (ADC) Transfer Status Register */ +/* ========== Register definition for DACC peripheral ========== */ +#define REG_DACC_CR REG_ACCESS(WoReg, 0x4003C000U) /**< \brief (DACC) Control Register */ +#define REG_DACC_MR REG_ACCESS(RwReg, 0x4003C004U) /**< \brief (DACC) Mode Register */ +#define REG_DACC_CHER REG_ACCESS(WoReg, 0x4003C010U) /**< \brief (DACC) Channel Enable Register */ +#define REG_DACC_CHDR REG_ACCESS(WoReg, 0x4003C014U) /**< \brief (DACC) Channel Disable Register */ +#define REG_DACC_CHSR REG_ACCESS(RoReg, 0x4003C018U) /**< \brief (DACC) Channel Status Register */ +#define REG_DACC_CDR REG_ACCESS(WoReg, 0x4003C020U) /**< \brief (DACC) Conversion Data Register */ +#define REG_DACC_IER REG_ACCESS(WoReg, 0x4003C024U) /**< \brief (DACC) Interrupt Enable Register */ +#define REG_DACC_IDR REG_ACCESS(WoReg, 0x4003C028U) /**< \brief (DACC) Interrupt Disable Register */ +#define REG_DACC_IMR REG_ACCESS(RoReg, 0x4003C02CU) /**< \brief (DACC) Interrupt Mask Register */ +#define REG_DACC_ISR REG_ACCESS(RoReg, 0x4003C030U) /**< \brief (DACC) Interrupt Status Register */ +#define REG_DACC_ACR REG_ACCESS(RwReg, 0x4003C094U) /**< \brief (DACC) Analog Current Register */ +#define REG_DACC_WPMR REG_ACCESS(RwReg, 0x4003C0E4U) /**< \brief (DACC) Write Protect Mode register */ +#define REG_DACC_WPSR REG_ACCESS(RoReg, 0x4003C0E8U) /**< \brief (DACC) Write Protect Status register */ +#define REG_DACC_RPR REG_ACCESS(RwReg, 0x4003C100U) /**< \brief (DACC) Receive Pointer Register */ +#define REG_DACC_RCR REG_ACCESS(RwReg, 0x4003C104U) /**< \brief (DACC) Receive Counter Register */ +#define REG_DACC_TPR REG_ACCESS(RwReg, 0x4003C108U) /**< \brief (DACC) Transmit Pointer Register */ +#define REG_DACC_TCR REG_ACCESS(RwReg, 0x4003C10CU) /**< \brief (DACC) Transmit Counter Register */ +#define REG_DACC_RNPR REG_ACCESS(RwReg, 0x4003C110U) /**< \brief (DACC) Receive Next Pointer Register */ +#define REG_DACC_RNCR REG_ACCESS(RwReg, 0x4003C114U) /**< \brief (DACC) Receive Next Counter Register */ +#define REG_DACC_TNPR REG_ACCESS(RwReg, 0x4003C118U) /**< \brief (DACC) Transmit Next Pointer Register */ +#define REG_DACC_TNCR REG_ACCESS(RwReg, 0x4003C11CU) /**< \brief (DACC) Transmit Next Counter Register */ +#define REG_DACC_PTCR REG_ACCESS(WoReg, 0x4003C120U) /**< \brief (DACC) Transfer Control Register */ +#define REG_DACC_PTSR REG_ACCESS(RoReg, 0x4003C124U) /**< \brief (DACC) Transfer Status Register */ +/* ========== Register definition for ACC peripheral ========== */ +#define REG_ACC_CR REG_ACCESS(WoReg, 0x40040000U) /**< \brief (ACC) Control Register */ +#define REG_ACC_MR REG_ACCESS(RwReg, 0x40040004U) /**< \brief (ACC) Mode Register */ +#define REG_ACC_IER REG_ACCESS(WoReg, 0x40040024U) /**< \brief (ACC) Interrupt Enable Register */ +#define REG_ACC_IDR REG_ACCESS(WoReg, 0x40040028U) /**< \brief (ACC) Interrupt Disable Register */ +#define REG_ACC_IMR REG_ACCESS(RoReg, 0x4004002CU) /**< \brief (ACC) Interrupt Mask Register */ +#define REG_ACC_ISR REG_ACCESS(RoReg, 0x40040030U) /**< \brief (ACC) Interrupt Status Register */ +#define REG_ACC_ACR REG_ACCESS(RwReg, 0x40040094U) /**< \brief (ACC) Analog Control Register */ +#define REG_ACC_WPMR REG_ACCESS(RwReg, 0x400400E4U) /**< \brief (ACC) Write Protect Mode Register */ +#define REG_ACC_WPSR REG_ACCESS(RoReg, 0x400400E8U) /**< \brief (ACC) Write Protect Status Register */ +/* ========== Register definition for CRCCU peripheral ========== */ +#define REG_CRCCU_DSCR REG_ACCESS(RwReg, 0x40044000U) /**< \brief (CRCCU) CRCCU Descriptor Base Register */ +#define REG_CRCCU_DMA_EN REG_ACCESS(WoReg, 0x40044008U) /**< \brief (CRCCU) CRCCU DMA Enable Register */ +#define REG_CRCCU_DMA_DIS REG_ACCESS(WoReg, 0x4004400CU) /**< \brief (CRCCU) CRCCU DMA Disable Register */ +#define REG_CRCCU_DMA_SR REG_ACCESS(RoReg, 0x40044010U) /**< \brief (CRCCU) CRCCU DMA Status Register */ +#define REG_CRCCU_DMA_IER REG_ACCESS(WoReg, 0x40044014U) /**< \brief (CRCCU) CRCCU DMA Interrupt Enable Register */ +#define REG_CRCCU_DMA_IDR REG_ACCESS(WoReg, 0x40044018U) /**< \brief (CRCCU) CRCCU DMA Interrupt Disable Register */ +#define REG_CRCCU_DMA_IMR REG_ACCESS(RoReg, 0x4004401CU) /**< \brief (CRCCU) CRCCU DMA Interrupt Mask Register */ +#define REG_CRCCU_DMA_ISR REG_ACCESS(RoReg, 0x40044020U) /**< \brief (CRCCU) CRCCU DMA Interrupt Status Register */ +#define REG_CRCCU_CR REG_ACCESS(WoReg, 0x40044034U) /**< \brief (CRCCU) CRCCU Control Register */ +#define REG_CRCCU_MR REG_ACCESS(RwReg, 0x40044038U) /**< \brief (CRCCU) CRCCU Mode Register */ +#define REG_CRCCU_SR REG_ACCESS(RoReg, 0x4004403CU) /**< \brief (CRCCU) CRCCU Status Register */ +#define REG_CRCCU_IER REG_ACCESS(WoReg, 0x40044040U) /**< \brief (CRCCU) CRCCU Interrupt Enable Register */ +#define REG_CRCCU_IDR REG_ACCESS(WoReg, 0x40044044U) /**< \brief (CRCCU) CRCCU Interrupt Disable Register */ +#define REG_CRCCU_IMR REG_ACCESS(RoReg, 0x40044048U) /**< \brief (CRCCU) CRCCU Interrupt Mask Register */ +#define REG_CRCCU_ISR REG_ACCESS(RoReg, 0x4004404CU) /**< \brief (CRCCU) CRCCU Interrupt Status Register */ +/* ========== Register definition for SMC peripheral ========== */ +#define REG_SMC_SETUP0 REG_ACCESS(RwReg, 0x400E0000U) /**< \brief (SMC) SMC Setup Register (CS_number = 0) */ +#define REG_SMC_PULSE0 REG_ACCESS(RwReg, 0x400E0004U) /**< \brief (SMC) SMC Pulse Register (CS_number = 0) */ +#define REG_SMC_CYCLE0 REG_ACCESS(RwReg, 0x400E0008U) /**< \brief (SMC) SMC Cycle Register (CS_number = 0) */ +#define REG_SMC_MODE0 REG_ACCESS(RwReg, 0x400E000CU) /**< \brief (SMC) SMC Mode Register (CS_number = 0) */ +#define REG_SMC_SETUP1 REG_ACCESS(RwReg, 0x400E0010U) /**< \brief (SMC) SMC Setup Register (CS_number = 1) */ +#define REG_SMC_PULSE1 REG_ACCESS(RwReg, 0x400E0014U) /**< \brief (SMC) SMC Pulse Register (CS_number = 1) */ +#define REG_SMC_CYCLE1 REG_ACCESS(RwReg, 0x400E0018U) /**< \brief (SMC) SMC Cycle Register (CS_number = 1) */ +#define REG_SMC_MODE1 REG_ACCESS(RwReg, 0x400E001CU) /**< \brief (SMC) SMC Mode Register (CS_number = 1) */ +#define REG_SMC_SETUP2 REG_ACCESS(RwReg, 0x400E0020U) /**< \brief (SMC) SMC Setup Register (CS_number = 2) */ +#define REG_SMC_PULSE2 REG_ACCESS(RwReg, 0x400E0024U) /**< \brief (SMC) SMC Pulse Register (CS_number = 2) */ +#define REG_SMC_CYCLE2 REG_ACCESS(RwReg, 0x400E0028U) /**< \brief (SMC) SMC Cycle Register (CS_number = 2) */ +#define REG_SMC_MODE2 REG_ACCESS(RwReg, 0x400E002CU) /**< \brief (SMC) SMC Mode Register (CS_number = 2) */ +#define REG_SMC_SETUP3 REG_ACCESS(RwReg, 0x400E0030U) /**< \brief (SMC) SMC Setup Register (CS_number = 3) */ +#define REG_SMC_PULSE3 REG_ACCESS(RwReg, 0x400E0034U) /**< \brief (SMC) SMC Pulse Register (CS_number = 3) */ +#define REG_SMC_CYCLE3 REG_ACCESS(RwReg, 0x400E0038U) /**< \brief (SMC) SMC Cycle Register (CS_number = 3) */ +#define REG_SMC_MODE3 REG_ACCESS(RwReg, 0x400E003CU) /**< \brief (SMC) SMC Mode Register (CS_number = 3) */ +#define REG_SMC_SETUP4 REG_ACCESS(RwReg, 0x400E0040U) /**< \brief (SMC) SMC Setup Register (CS_number = 4) */ +#define REG_SMC_PULSE4 REG_ACCESS(RwReg, 0x400E0044U) /**< \brief (SMC) SMC Pulse Register (CS_number = 4) */ +#define REG_SMC_CYCLE4 REG_ACCESS(RwReg, 0x400E0048U) /**< \brief (SMC) SMC Cycle Register (CS_number = 4) */ +#define REG_SMC_MODE4 REG_ACCESS(RwReg, 0x400E004CU) /**< \brief (SMC) SMC Mode Register (CS_number = 4) */ +#define REG_SMC_OCMS REG_ACCESS(RwReg, 0x400E0080U) /**< \brief (SMC) SMC OCMS MODE Register */ +#define REG_SMC_KEY1 REG_ACCESS(WoReg, 0x400E0084U) /**< \brief (SMC) SMC OCMS KEY1 Register */ +#define REG_SMC_KEY2 REG_ACCESS(WoReg, 0x400E0088U) /**< \brief (SMC) SMC OCMS KEY2 Register */ +#define REG_SMC_WPMR REG_ACCESS(RwReg, 0x400E00E4U) /**< \brief (SMC) SMC Write Protect Mode Register */ +#define REG_SMC_WPSR REG_ACCESS(RoReg, 0x400E00E8U) /**< \brief (SMC) SMC Write Protect Status Register */ +/* ========== Register definition for MATRIX peripheral ========== */ +#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ +#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ +#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ +#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ +#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ +#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ +#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ +#define REG_MATRIX_SYSIO REG_ACCESS(RwReg, 0x400E0314U) /**< \brief (MATRIX) System IO Configuration register */ +#define REG_MATRIX_SMCNFCS REG_ACCESS(RwReg, 0x400E031CU) /**< \brief (MATRIX) SMC Chip Select NAND Flash Assignment Register */ +#define REG_MATRIX_WPMR REG_ACCESS(RwReg, 0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */ +#define REG_MATRIX_WPSR REG_ACCESS(RoReg, 0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */ +/* ========== Register definition for PMC peripheral ========== */ +#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /**< \brief (PMC) System Clock Enable Register */ +#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /**< \brief (PMC) System Clock Disable Register */ +#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /**< \brief (PMC) System Clock Status Register */ +#define REG_PMC_PCER0 REG_ACCESS(WoReg, 0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register 0 */ +#define REG_PMC_PCDR0 REG_ACCESS(WoReg, 0x400E0414U) /**< \brief (PMC) Peripheral Clock Disable Register 0 */ +#define REG_PMC_PCSR0 REG_ACCESS(RoReg, 0x400E0418U) /**< \brief (PMC) Peripheral Clock Status Register 0 */ +#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /**< \brief (PMC) Main Oscillator Register */ +#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */ +#define REG_PMC_PLLAR REG_ACCESS(RwReg, 0x400E0428U) /**< \brief (PMC) PLLA Register */ +#define REG_PMC_PLLBR REG_ACCESS(RwReg, 0x400E042CU) /**< \brief (PMC) PLLB Register */ +#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /**< \brief (PMC) Master Clock Register */ +#define REG_PMC_USB REG_ACCESS(RwReg, 0x400E0438U) /**< \brief (PMC) USB Clock Register */ +#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /**< \brief (PMC) Programmable Clock 0 Register */ +#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /**< \brief (PMC) Interrupt Enable Register */ +#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /**< \brief (PMC) Interrupt Disable Register */ +#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /**< \brief (PMC) Status Register */ +#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /**< \brief (PMC) Interrupt Mask Register */ +#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /**< \brief (PMC) Fast Startup Mode Register */ +#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /**< \brief (PMC) Fast Startup Polarity Register */ +#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /**< \brief (PMC) Fault Output Clear Register */ +#define REG_PMC_WPMR REG_ACCESS(RwReg, 0x400E04E4U) /**< \brief (PMC) Write Protect Mode Register */ +#define REG_PMC_WPSR REG_ACCESS(RoReg, 0x400E04E8U) /**< \brief (PMC) Write Protect Status Register */ +#define REG_PMC_PCER1 REG_ACCESS(WoReg, 0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Register 1 */ +#define REG_PMC_PCDR1 REG_ACCESS(WoReg, 0x400E0504U) /**< \brief (PMC) Peripheral Clock Disable Register 1 */ +#define REG_PMC_PCSR1 REG_ACCESS(RoReg, 0x400E0508U) /**< \brief (PMC) Peripheral Clock Status Register 1 */ +#define REG_PMC_OCR REG_ACCESS(RwReg, 0x400E0510U) /**< \brief (PMC) Oscillator Calibration Register */ +/* ========== Register definition for UART0 peripheral ========== */ +#define REG_UART0_CR REG_ACCESS(WoReg, 0x400E0600U) /**< \brief (UART0) Control Register */ +#define REG_UART0_MR REG_ACCESS(RwReg, 0x400E0604U) /**< \brief (UART0) Mode Register */ +#define REG_UART0_IER REG_ACCESS(WoReg, 0x400E0608U) /**< \brief (UART0) Interrupt Enable Register */ +#define REG_UART0_IDR REG_ACCESS(WoReg, 0x400E060CU) /**< \brief (UART0) Interrupt Disable Register */ +#define REG_UART0_IMR REG_ACCESS(RoReg, 0x400E0610U) /**< \brief (UART0) Interrupt Mask Register */ +#define REG_UART0_SR REG_ACCESS(RoReg, 0x400E0614U) /**< \brief (UART0) Status Register */ +#define REG_UART0_RHR REG_ACCESS(RoReg, 0x400E0618U) /**< \brief (UART0) Receive Holding Register */ +#define REG_UART0_THR REG_ACCESS(WoReg, 0x400E061CU) /**< \brief (UART0) Transmit Holding Register */ +#define REG_UART0_BRGR REG_ACCESS(RwReg, 0x400E0620U) /**< \brief (UART0) Baud Rate Generator Register */ +#define REG_UART0_RPR REG_ACCESS(RwReg, 0x400E0700U) /**< \brief (UART0) Receive Pointer Register */ +#define REG_UART0_RCR REG_ACCESS(RwReg, 0x400E0704U) /**< \brief (UART0) Receive Counter Register */ +#define REG_UART0_TPR REG_ACCESS(RwReg, 0x400E0708U) /**< \brief (UART0) Transmit Pointer Register */ +#define REG_UART0_TCR REG_ACCESS(RwReg, 0x400E070CU) /**< \brief (UART0) Transmit Counter Register */ +#define REG_UART0_RNPR REG_ACCESS(RwReg, 0x400E0710U) /**< \brief (UART0) Receive Next Pointer Register */ +#define REG_UART0_RNCR REG_ACCESS(RwReg, 0x400E0714U) /**< \brief (UART0) Receive Next Counter Register */ +#define REG_UART0_TNPR REG_ACCESS(RwReg, 0x400E0718U) /**< \brief (UART0) Transmit Next Pointer Register */ +#define REG_UART0_TNCR REG_ACCESS(RwReg, 0x400E071CU) /**< \brief (UART0) Transmit Next Counter Register */ +#define REG_UART0_PTCR REG_ACCESS(WoReg, 0x400E0720U) /**< \brief (UART0) Transfer Control Register */ +#define REG_UART0_PTSR REG_ACCESS(RoReg, 0x400E0724U) /**< \brief (UART0) Transfer Status Register */ +/* ========== Register definition for CHIPID peripheral ========== */ +#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ +#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /**< \brief (CHIPID) Chip ID Extension Register */ +/* ========== Register definition for UART1 peripheral ========== */ +#define REG_UART1_CR REG_ACCESS(WoReg, 0x400E0800U) /**< \brief (UART1) Control Register */ +#define REG_UART1_MR REG_ACCESS(RwReg, 0x400E0804U) /**< \brief (UART1) Mode Register */ +#define REG_UART1_IER REG_ACCESS(WoReg, 0x400E0808U) /**< \brief (UART1) Interrupt Enable Register */ +#define REG_UART1_IDR REG_ACCESS(WoReg, 0x400E080CU) /**< \brief (UART1) Interrupt Disable Register */ +#define REG_UART1_IMR REG_ACCESS(RoReg, 0x400E0810U) /**< \brief (UART1) Interrupt Mask Register */ +#define REG_UART1_SR REG_ACCESS(RoReg, 0x400E0814U) /**< \brief (UART1) Status Register */ +#define REG_UART1_RHR REG_ACCESS(RoReg, 0x400E0818U) /**< \brief (UART1) Receive Holding Register */ +#define REG_UART1_THR REG_ACCESS(WoReg, 0x400E081CU) /**< \brief (UART1) Transmit Holding Register */ +#define REG_UART1_BRGR REG_ACCESS(RwReg, 0x400E0820U) /**< \brief (UART1) Baud Rate Generator Register */ +#define REG_UART1_RPR REG_ACCESS(RwReg, 0x400E0900U) /**< \brief (UART1) Receive Pointer Register */ +#define REG_UART1_RCR REG_ACCESS(RwReg, 0x400E0904U) /**< \brief (UART1) Receive Counter Register */ +#define REG_UART1_TPR REG_ACCESS(RwReg, 0x400E0908U) /**< \brief (UART1) Transmit Pointer Register */ +#define REG_UART1_TCR REG_ACCESS(RwReg, 0x400E090CU) /**< \brief (UART1) Transmit Counter Register */ +#define REG_UART1_RNPR REG_ACCESS(RwReg, 0x400E0910U) /**< \brief (UART1) Receive Next Pointer Register */ +#define REG_UART1_RNCR REG_ACCESS(RwReg, 0x400E0914U) /**< \brief (UART1) Receive Next Counter Register */ +#define REG_UART1_TNPR REG_ACCESS(RwReg, 0x400E0918U) /**< \brief (UART1) Transmit Next Pointer Register */ +#define REG_UART1_TNCR REG_ACCESS(RwReg, 0x400E091CU) /**< \brief (UART1) Transmit Next Counter Register */ +#define REG_UART1_PTCR REG_ACCESS(WoReg, 0x400E0920U) /**< \brief (UART1) Transfer Control Register */ +#define REG_UART1_PTSR REG_ACCESS(RoReg, 0x400E0924U) /**< \brief (UART1) Transfer Status Register */ +/* ========== Register definition for EFC peripheral ========== */ +#define REG_EFC_FMR REG_ACCESS(RwReg, 0x400E0A00U) /**< \brief (EFC) EEFC Flash Mode Register */ +#define REG_EFC_FCR REG_ACCESS(WoReg, 0x400E0A04U) /**< \brief (EFC) EEFC Flash Command Register */ +#define REG_EFC_FSR REG_ACCESS(RoReg, 0x400E0A08U) /**< \brief (EFC) EEFC Flash Status Register */ +#define REG_EFC_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /**< \brief (EFC) EEFC Flash Result Register */ +/* ========== Register definition for PIOA peripheral ========== */ +#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0E00U) /**< \brief (PIOA) PIO Enable Register */ +#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0E04U) /**< \brief (PIOA) PIO Disable Register */ +#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0E08U) /**< \brief (PIOA) PIO Status Register */ +#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0E10U) /**< \brief (PIOA) Output Enable Register */ +#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0E14U) /**< \brief (PIOA) Output Disable Register */ +#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0E18U) /**< \brief (PIOA) Output Status Register */ +#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0E20U) /**< \brief (PIOA) Glitch Input Filter Enable Register */ +#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disable Register */ +#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /**< \brief (PIOA) Glitch Input Filter Status Register */ +#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0E30U) /**< \brief (PIOA) Set Output Data Register */ +#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0E34U) /**< \brief (PIOA) Clear Output Data Register */ +#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /**< \brief (PIOA) Output Data Status Register */ +#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /**< \brief (PIOA) Pin Data Status Register */ +#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0E40U) /**< \brief (PIOA) Interrupt Enable Register */ +#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0E44U) /**< \brief (PIOA) Interrupt Disable Register */ +#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0E48U) /**< \brief (PIOA) Interrupt Mask Register */ +#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /**< \brief (PIOA) Interrupt Status Register */ +#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0E50U) /**< \brief (PIOA) Multi-driver Enable Register */ +#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /**< \brief (PIOA) Multi-driver Disable Register */ +#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /**< \brief (PIOA) Multi-driver Status Register */ +#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /**< \brief (PIOA) Pull-up Disable Register */ +#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0E64U) /**< \brief (PIOA) Pull-up Enable Register */ +#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /**< \brief (PIOA) Pad Pull-up Status Register */ +#define REG_PIOA_ABCDSR REG_ACCESS(RwReg, 0x400E0E70U) /**< \brief (PIOA) Peripheral Select Register */ +#define REG_PIOA_SCIFSR REG_ACCESS(WoReg, 0x400E0E80U) /**< \brief (PIOA) System Clock Glitch Input Filter Select Register */ +#define REG_PIOA_DIFSR REG_ACCESS(WoReg, 0x400E0E84U) /**< \brief (PIOA) Debouncing Input Filter Select Register */ +#define REG_PIOA_IFDGSR REG_ACCESS(RoReg, 0x400E0E88U) /**< \brief (PIOA) Glitch or Debouncing Input Filter Clock Selection Status Register */ +#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /**< \brief (PIOA) Slow Clock Divider Debouncing Register */ +#define REG_PIOA_PPDDR REG_ACCESS(WoReg, 0x400E0E90U) /**< \brief (PIOA) Pad Pull-down Disable Register */ +#define REG_PIOA_PPDER REG_ACCESS(WoReg, 0x400E0E94U) /**< \brief (PIOA) Pad Pull-down Enable Register */ +#define REG_PIOA_PPDSR REG_ACCESS(RoReg, 0x400E0E98U) /**< \brief (PIOA) Pad Pull-down Status Register */ +#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /**< \brief (PIOA) Output Write Enable */ +#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /**< \brief (PIOA) Output Write Disable */ +#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /**< \brief (PIOA) Output Write Status Register */ +#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /**< \brief (PIOA) Additional Interrupt Modes Enable Register */ +#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /**< \brief (PIOA) Additional Interrupt Modes Disables Register */ +#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Modes Mask Register */ +#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ +#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /**< \brief (PIOA) Level Select Register */ +#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /**< \brief (PIOA) Edge/Level Status Register */ +#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /**< \brief (PIOA) Falling Edge/Low Level Select Register */ +#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /**< \brief (PIOA) Rising Edge/ High Level Select Register */ +#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /**< \brief (PIOA) Fall/Rise - Low/High Status Register */ +#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /**< \brief (PIOA) Lock Status */ +#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /**< \brief (PIOA) Write Protect Mode Register */ +#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /**< \brief (PIOA) Write Protect Status Register */ +#define REG_PIOA_SCHMITT REG_ACCESS(RwReg, 0x400E0F00U) /**< \brief (PIOA) Schmitt Trigger Register */ +#define REG_PIOA_PCMR REG_ACCESS(RwReg, 0x400E0F50U) /**< \brief (PIOA) Parallel Capture Mode Register */ +#define REG_PIOA_PCIER REG_ACCESS(WoReg, 0x400E0F54U) /**< \brief (PIOA) Parallel Capture Interrupt Enable Register */ +#define REG_PIOA_PCIDR REG_ACCESS(WoReg, 0x400E0F58U) /**< \brief (PIOA) Parallel Capture Interrupt Disable Register */ +#define REG_PIOA_PCIMR REG_ACCESS(RoReg, 0x400E0F5CU) /**< \brief (PIOA) Parallel Capture Interrupt Mask Register */ +#define REG_PIOA_PCISR REG_ACCESS(RoReg, 0x400E0F60U) /**< \brief (PIOA) Parallel Capture Interrupt Status Register */ +#define REG_PIOA_PCRHR REG_ACCESS(RoReg, 0x400E0F64U) /**< \brief (PIOA) Parallel Capture Reception Holding Register */ +/* ========== Register definition for PIOB peripheral ========== */ +#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E1000U) /**< \brief (PIOB) PIO Enable Register */ +#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E1004U) /**< \brief (PIOB) PIO Disable Register */ +#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E1008U) /**< \brief (PIOB) PIO Status Register */ +#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E1010U) /**< \brief (PIOB) Output Enable Register */ +#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E1014U) /**< \brief (PIOB) Output Disable Register */ +#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E1018U) /**< \brief (PIOB) Output Status Register */ +#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E1020U) /**< \brief (PIOB) Glitch Input Filter Enable Register */ +#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E1024U) /**< \brief (PIOB) Glitch Input Filter Disable Register */ +#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E1028U) /**< \brief (PIOB) Glitch Input Filter Status Register */ +#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E1030U) /**< \brief (PIOB) Set Output Data Register */ +#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E1034U) /**< \brief (PIOB) Clear Output Data Register */ +#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E1038U) /**< \brief (PIOB) Output Data Status Register */ +#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E103CU) /**< \brief (PIOB) Pin Data Status Register */ +#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E1040U) /**< \brief (PIOB) Interrupt Enable Register */ +#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E1044U) /**< \brief (PIOB) Interrupt Disable Register */ +#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E1048U) /**< \brief (PIOB) Interrupt Mask Register */ +#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E104CU) /**< \brief (PIOB) Interrupt Status Register */ +#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E1050U) /**< \brief (PIOB) Multi-driver Enable Register */ +#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E1054U) /**< \brief (PIOB) Multi-driver Disable Register */ +#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E1058U) /**< \brief (PIOB) Multi-driver Status Register */ +#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E1060U) /**< \brief (PIOB) Pull-up Disable Register */ +#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E1064U) /**< \brief (PIOB) Pull-up Enable Register */ +#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E1068U) /**< \brief (PIOB) Pad Pull-up Status Register */ +#define REG_PIOB_ABCDSR REG_ACCESS(RwReg, 0x400E1070U) /**< \brief (PIOB) Peripheral Select Register */ +#define REG_PIOB_SCIFSR REG_ACCESS(WoReg, 0x400E1080U) /**< \brief (PIOB) System Clock Glitch Input Filter Select Register */ +#define REG_PIOB_DIFSR REG_ACCESS(WoReg, 0x400E1084U) /**< \brief (PIOB) Debouncing Input Filter Select Register */ +#define REG_PIOB_IFDGSR REG_ACCESS(RoReg, 0x400E1088U) /**< \brief (PIOB) Glitch or Debouncing Input Filter Clock Selection Status Register */ +#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E108CU) /**< \brief (PIOB) Slow Clock Divider Debouncing Register */ +#define REG_PIOB_PPDDR REG_ACCESS(WoReg, 0x400E1090U) /**< \brief (PIOB) Pad Pull-down Disable Register */ +#define REG_PIOB_PPDER REG_ACCESS(WoReg, 0x400E1094U) /**< \brief (PIOB) Pad Pull-down Enable Register */ +#define REG_PIOB_PPDSR REG_ACCESS(RoReg, 0x400E1098U) /**< \brief (PIOB) Pad Pull-down Status Register */ +#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E10A0U) /**< \brief (PIOB) Output Write Enable */ +#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /**< \brief (PIOB) Output Write Disable */ +#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /**< \brief (PIOB) Output Write Status Register */ +#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /**< \brief (PIOB) Additional Interrupt Modes Enable Register */ +#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /**< \brief (PIOB) Additional Interrupt Modes Disables Register */ +#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /**< \brief (PIOB) Additional Interrupt Modes Mask Register */ +#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E10C0U) /**< \brief (PIOB) Edge Select Register */ +#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E10C4U) /**< \brief (PIOB) Level Select Register */ +#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /**< \brief (PIOB) Edge/Level Status Register */ +#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /**< \brief (PIOB) Falling Edge/Low Level Select Register */ +#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /**< \brief (PIOB) Rising Edge/ High Level Select Register */ +#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /**< \brief (PIOB) Fall/Rise - Low/High Status Register */ +#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /**< \brief (PIOB) Lock Status */ +#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /**< \brief (PIOB) Write Protect Mode Register */ +#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /**< \brief (PIOB) Write Protect Status Register */ +#define REG_PIOB_SCHMITT REG_ACCESS(RwReg, 0x400E1100U) /**< \brief (PIOB) Schmitt Trigger Register */ +#define REG_PIOB_PCMR REG_ACCESS(RwReg, 0x400E1150U) /**< \brief (PIOB) Parallel Capture Mode Register */ +#define REG_PIOB_PCIER REG_ACCESS(WoReg, 0x400E1154U) /**< \brief (PIOB) Parallel Capture Interrupt Enable Register */ +#define REG_PIOB_PCIDR REG_ACCESS(WoReg, 0x400E1158U) /**< \brief (PIOB) Parallel Capture Interrupt Disable Register */ +#define REG_PIOB_PCIMR REG_ACCESS(RoReg, 0x400E115CU) /**< \brief (PIOB) Parallel Capture Interrupt Mask Register */ +#define REG_PIOB_PCISR REG_ACCESS(RoReg, 0x400E1160U) /**< \brief (PIOB) Parallel Capture Interrupt Status Register */ +#define REG_PIOB_PCRHR REG_ACCESS(RoReg, 0x400E1164U) /**< \brief (PIOB) Parallel Capture Reception Holding Register */ +/* ========== Register definition for PIOC peripheral ========== */ +#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1200U) /**< \brief (PIOC) PIO Enable Register */ +#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1204U) /**< \brief (PIOC) PIO Disable Register */ +#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1208U) /**< \brief (PIOC) PIO Status Register */ +#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1210U) /**< \brief (PIOC) Output Enable Register */ +#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1214U) /**< \brief (PIOC) Output Disable Register */ +#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1218U) /**< \brief (PIOC) Output Status Register */ +#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1220U) /**< \brief (PIOC) Glitch Input Filter Enable Register */ +#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1224U) /**< \brief (PIOC) Glitch Input Filter Disable Register */ +#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1228U) /**< \brief (PIOC) Glitch Input Filter Status Register */ +#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1230U) /**< \brief (PIOC) Set Output Data Register */ +#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1234U) /**< \brief (PIOC) Clear Output Data Register */ +#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1238U) /**< \brief (PIOC) Output Data Status Register */ +#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E123CU) /**< \brief (PIOC) Pin Data Status Register */ +#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1240U) /**< \brief (PIOC) Interrupt Enable Register */ +#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1244U) /**< \brief (PIOC) Interrupt Disable Register */ +#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ +#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E124CU) /**< \brief (PIOC) Interrupt Status Register */ +#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1250U) /**< \brief (PIOC) Multi-driver Enable Register */ +#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1254U) /**< \brief (PIOC) Multi-driver Disable Register */ +#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1258U) /**< \brief (PIOC) Multi-driver Status Register */ +#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1260U) /**< \brief (PIOC) Pull-up Disable Register */ +#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1264U) /**< \brief (PIOC) Pull-up Enable Register */ +#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1268U) /**< \brief (PIOC) Pad Pull-up Status Register */ +#define REG_PIOC_ABCDSR REG_ACCESS(RwReg, 0x400E1270U) /**< \brief (PIOC) Peripheral Select Register */ +#define REG_PIOC_SCIFSR REG_ACCESS(WoReg, 0x400E1280U) /**< \brief (PIOC) System Clock Glitch Input Filter Select Register */ +#define REG_PIOC_DIFSR REG_ACCESS(WoReg, 0x400E1284U) /**< \brief (PIOC) Debouncing Input Filter Select Register */ +#define REG_PIOC_IFDGSR REG_ACCESS(RoReg, 0x400E1288U) /**< \brief (PIOC) Glitch or Debouncing Input Filter Clock Selection Status Register */ +#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E128CU) /**< \brief (PIOC) Slow Clock Divider Debouncing Register */ +#define REG_PIOC_PPDDR REG_ACCESS(WoReg, 0x400E1290U) /**< \brief (PIOC) Pad Pull-down Disable Register */ +#define REG_PIOC_PPDER REG_ACCESS(WoReg, 0x400E1294U) /**< \brief (PIOC) Pad Pull-down Enable Register */ +#define REG_PIOC_PPDSR REG_ACCESS(RoReg, 0x400E1298U) /**< \brief (PIOC) Pad Pull-down Status Register */ +#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E12A0U) /**< \brief (PIOC) Output Write Enable */ +#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E12A4U) /**< \brief (PIOC) Output Write Disable */ +#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E12A8U) /**< \brief (PIOC) Output Write Status Register */ +#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E12B0U) /**< \brief (PIOC) Additional Interrupt Modes Enable Register */ +#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E12B4U) /**< \brief (PIOC) Additional Interrupt Modes Disables Register */ +#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Modes Mask Register */ +#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E12C0U) /**< \brief (PIOC) Edge Select Register */ +#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E12C4U) /**< \brief (PIOC) Level Select Register */ +#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E12C8U) /**< \brief (PIOC) Edge/Level Status Register */ +#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E12D0U) /**< \brief (PIOC) Falling Edge/Low Level Select Register */ +#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E12D4U) /**< \brief (PIOC) Rising Edge/ High Level Select Register */ +#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E12D8U) /**< \brief (PIOC) Fall/Rise - Low/High Status Register */ +#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E12E0U) /**< \brief (PIOC) Lock Status */ +#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E12E4U) /**< \brief (PIOC) Write Protect Mode Register */ +#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E12E8U) /**< \brief (PIOC) Write Protect Status Register */ +#define REG_PIOC_SCHMITT REG_ACCESS(RwReg, 0x400E1300U) /**< \brief (PIOC) Schmitt Trigger Register */ +#define REG_PIOC_PCMR REG_ACCESS(RwReg, 0x400E1350U) /**< \brief (PIOC) Parallel Capture Mode Register */ +#define REG_PIOC_PCIER REG_ACCESS(WoReg, 0x400E1354U) /**< \brief (PIOC) Parallel Capture Interrupt Enable Register */ +#define REG_PIOC_PCIDR REG_ACCESS(WoReg, 0x400E1358U) /**< \brief (PIOC) Parallel Capture Interrupt Disable Register */ +#define REG_PIOC_PCIMR REG_ACCESS(RoReg, 0x400E135CU) /**< \brief (PIOC) Parallel Capture Interrupt Mask Register */ +#define REG_PIOC_PCISR REG_ACCESS(RoReg, 0x400E1360U) /**< \brief (PIOC) Parallel Capture Interrupt Status Register */ +#define REG_PIOC_PCRHR REG_ACCESS(RoReg, 0x400E1364U) /**< \brief (PIOC) Parallel Capture Reception Holding Register */ +/* ========== Register definition for RSTC peripheral ========== */ +#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1400U) /**< \brief (RSTC) Control Register */ +#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1404U) /**< \brief (RSTC) Status Register */ +#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1408U) /**< \brief (RSTC) Mode Register */ +/* ========== Register definition for SUPC peripheral ========== */ +#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1410U) /**< \brief (SUPC) Supply Controller Control Register */ +#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1414U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */ +#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1418U) /**< \brief (SUPC) Supply Controller Mode Register */ +#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E141CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */ +#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1420U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */ +#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1424U) /**< \brief (SUPC) Supply Controller Status Register */ +/* ========== Register definition for RTT peripheral ========== */ +#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1430U) /**< \brief (RTT) Mode Register */ +#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1434U) /**< \brief (RTT) Alarm Register */ +#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1438U) /**< \brief (RTT) Value Register */ +#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E143CU) /**< \brief (RTT) Status Register */ +/* ========== Register definition for WDT peripheral ========== */ +#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1450U) /**< \brief (WDT) Control Register */ +#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1454U) /**< \brief (WDT) Mode Register */ +#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1458U) /**< \brief (WDT) Status Register */ +/* ========== Register definition for RTC peripheral ========== */ +#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1460U) /**< \brief (RTC) Control Register */ +#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1464U) /**< \brief (RTC) Mode Register */ +#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1468U) /**< \brief (RTC) Time Register */ +#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E146CU) /**< \brief (RTC) Calendar Register */ +#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1470U) /**< \brief (RTC) Time Alarm Register */ +#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */ +#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1478U) /**< \brief (RTC) Status Register */ +#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E147CU) /**< \brief (RTC) Status Clear Command Register */ +#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */ +#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */ +#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */ +#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E148CU) /**< \brief (RTC) Valid Entry Register */ +/* ========== Register definition for GPBR peripheral ========== */ +#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1490U) /**< \brief (GPBR) General Purpose Backup Register 0 */ +#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1494U) /**< \brief (GPBR) General Purpose Backup Register 1 */ +#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1498U) /**< \brief (GPBR) General Purpose Backup Register 2 */ +#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E149CU) /**< \brief (GPBR) General Purpose Backup Register 3 */ +/*@}*/ + +/* ***************************************************************************** */ +/* PERIPHERAL ID DEFINITIONS FOR AT91SAM3S */ +/* ***************************************************************************** */ +/** \addtogroup AT91SAM3S_id Peripheral Ids Definitions */ +/*@{*/ + +#define ID_SUPC ( 0) /**< \brief Supply Controller (SUPC) */ +#define ID_RSTC ( 1) /**< \brief Reset Controller (RSTC) */ +#define ID_RTC ( 2) /**< \brief Real Time Clock (RTC) */ +#define ID_RTT ( 3) /**< \brief Real Time Timer (RTT) */ +#define ID_WDT ( 4) /**< \brief Watchdog Timer (WDT) */ +#define ID_PMC ( 5) /**< \brief Power Management Controller (PMC) */ +#define ID_EFC ( 6) /**< \brief Enhanced Flash Controller (EFC) */ +#define ID_UART0 ( 8) /**< \brief UART 0 (UART0) */ +#define ID_UART1 ( 9) /**< \brief UART 1 (UART1) */ +#define ID_SMC (10) /**< \brief Static Memory Controller (SMC) */ +#define ID_PIOA (11) /**< \brief Parallel I/O Controller A (PIOA) */ +#define ID_PIOB (12) /**< \brief Parallel I/O Controller B (PIOB) */ +#define ID_PIOC (13) /**< \brief Parallel I/O Controller C (PIOC) */ +#define ID_USART0 (14) /**< \brief USART 0 (USART0) */ +#define ID_USART1 (15) /**< \brief USART 1 (USART1) */ +#define ID_HSMCI (18) /**< \brief Multimedia Card Interface (HSMCI) */ +#define ID_TWI0 (19) /**< \brief Two Wire Interface 0 (TWI0) */ +#define ID_TWI1 (20) /**< \brief Two Wire Interface 1 (TWI1) */ +#define ID_SPI (21) /**< \brief Serial Peripheral Interface (SPI) */ +#define ID_SSC (22) /**< \brief Synchronous Serial Controler (SSC) */ +#define ID_TC0 (23) /**< \brief Timer/Counter 0 (TC0) */ +#define ID_TC1 (24) /**< \brief Timer/Counter 1 (TC1) */ +#define ID_TC2 (25) /**< \brief Timer/Counter 2 (TC2) */ +#define ID_TC3 (26) /**< \brief Timer/Counter 3 (TC3) */ +#define ID_TC4 (27) /**< \brief Timer/Counter 4 (TC4) */ +#define ID_TC5 (28) /**< \brief Timer/Counter 5 (TC5) */ +#define ID_ADC (29) /**< \brief Analog To Digital Converter (ADC) */ +#define ID_DACC (30) /**< \brief Digital To Analog Converter (DACC) */ +#define ID_PWM (31) /**< \brief Pulse Width Modulation (PWM) */ +#define ID_CRCCU (32) /**< \brief CRC Calculation Unit (CRCCU) */ +#define ID_ACC (33) /**< \brief Analog Comparator (ACC) */ +#define ID_UDP (34) /**< \brief USB Device Port (UDP) */ +/*@}*/ + +/* ***************************************************************************** */ +/* BASE ADDRESS DEFINITIONS FOR AT91SAM3S */ +/* ***************************************************************************** */ +/** \addtogroup AT91SAM3S_base Peripheral Base Address Definitions */ +/*@{*/ + +#define HSMCI CAST(Hsmci , 0x40000000U) /**< \brief (HSMCI ) Base Address */ +#define PDC_HSMCI CAST(Pdc , 0x40000100U) /**< \brief (PDC_HSMCI ) Base Address */ +#define SSC CAST(Ssc , 0x40004000U) /**< \brief (SSC ) Base Address */ +#define PDC_SSC CAST(Pdc , 0x40004100U) /**< \brief (PDC_SSC ) Base Address */ +#define SPI CAST(Spi , 0x40008000U) /**< \brief (SPI ) Base Address */ +#define PDC_SPI CAST(Pdc , 0x40008100U) /**< \brief (PDC_SPI ) Base Address */ +#define TC0 CAST(Tc , 0x40010000U) /**< \brief (TC0 ) Base Address */ +#define TC1 CAST(Tc , 0x40014000U) /**< \brief (TC1 ) Base Address */ +#define TWI0 CAST(Twi , 0x40018000U) /**< \brief (TWI0 ) Base Address */ +#define PDC_TWI0 CAST(Pdc , 0x40018100U) /**< \brief (PDC_TWI0 ) Base Address */ +#define TWI1 CAST(Twi , 0x4001C000U) /**< \brief (TWI1 ) Base Address */ +#define PDC_TWI1 CAST(Pdc , 0x4001C100U) /**< \brief (PDC_TWI1 ) Base Address */ +#define PWM CAST(Pwm , 0x40020000U) /**< \brief (PWM ) Base Address */ +#define PDC_PWM CAST(Pdc , 0x40020100U) /**< \brief (PDC_PWM ) Base Address */ +#define USART0 CAST(Usart , 0x40024000U) /**< \brief (USART0 ) Base Address */ +#define PDC_USART0 CAST(Pdc , 0x40024100U) /**< \brief (PDC_USART0) Base Address */ +#define USART1 CAST(Usart , 0x40028000U) /**< \brief (USART1 ) Base Address */ +#define PDC_USART1 CAST(Pdc , 0x40028100U) /**< \brief (PDC_USART1) Base Address */ +#define UDP CAST(Udp , 0x40034000U) /**< \brief (UDP ) Base Address */ +#define ADC CAST(Adc , 0x40038000U) /**< \brief (ADC ) Base Address */ +#define PDC_ADC CAST(Pdc , 0x40038100U) /**< \brief (PDC_ADC ) Base Address */ +#define DACC CAST(Dacc , 0x4003C000U) /**< \brief (DACC ) Base Address */ +#define PDC_DACC CAST(Pdc , 0x4003C100U) /**< \brief (PDC_DACC ) Base Address */ +#define ACC CAST(Acc , 0x40040000U) /**< \brief (ACC ) Base Address */ +#define CRCCU CAST(Crccu , 0x40044000U) /**< \brief (CRCCU ) Base Address */ +#define SMC CAST(Smc , 0x400E0000U) /**< \brief (SMC ) Base Address */ +#define MATRIX CAST(Matrix , 0x400E0200U) /**< \brief (MATRIX ) Base Address */ +#define PMC CAST(Pmc , 0x400E0400U) /**< \brief (PMC ) Base Address */ +#define UART0 CAST(Uart , 0x400E0600U) /**< \brief (UART0 ) Base Address */ +#define PDC_UART0 CAST(Pdc , 0x400E0700U) /**< \brief (PDC_UART0 ) Base Address */ +#define CHIPID CAST(Chipid , 0x400E0740U) /**< \brief (CHIPID ) Base Address */ +#define UART1 CAST(Uart , 0x400E0800U) /**< \brief (UART1 ) Base Address */ +#define PDC_UART1 CAST(Pdc , 0x400E0900U) /**< \brief (PDC_UART1 ) Base Address */ +#define EFC CAST(Efc , 0x400E0A00U) /**< \brief (EFC ) Base Address */ +#define PIOA CAST(Pio , 0x400E0E00U) /**< \brief (PIOA ) Base Address */ +#define PIOB CAST(Pio , 0x400E1000U) /**< \brief (PIOB ) Base Address */ +#define PIOC CAST(Pio , 0x400E1200U) /**< \brief (PIOC ) Base Address */ +#define RSTC CAST(Rstc , 0x400E1400U) /**< \brief (RSTC ) Base Address */ +#define SUPC CAST(Supc , 0x400E1410U) /**< \brief (SUPC ) Base Address */ +#define RTT CAST(Rtt , 0x400E1430U) /**< \brief (RTT ) Base Address */ +#define WDT CAST(Wdt , 0x400E1450U) /**< \brief (WDT ) Base Address */ +#define RTC CAST(Rtc , 0x400E1460U) /**< \brief (RTC ) Base Address */ +#define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */ + +// indices for three pio structures +#define iPIOA 0 +#define iPIOB 1 +#define iPIOC 2 +/*@}*/ + +/* ***************************************************************************** */ +/* PIO DEFINITIONS FOR AT91SAM3S */ +/* ***************************************************************************** */ +/** \addtogroup AT91SAM3S_pio Peripheral Pio Definitions */ +/*@{*/ + +#define PIO_PA0 (1 << 0) /**< \brief Pin Controlled by PA0 */ +#define PIO_PA1 (1 << 1) /**< \brief Pin Controlled by PA1 */ +#define PIO_PA2 (1 << 2) /**< \brief Pin Controlled by PA2 */ +#define PIO_PA3 (1 << 3) /**< \brief Pin Controlled by PA3 */ +#define PIO_PA4 (1 << 4) /**< \brief Pin Controlled by PA4 */ +#define PIO_PA5 (1 << 5) /**< \brief Pin Controlled by PA5 */ +#define PIO_PA6 (1 << 6) /**< \brief Pin Controlled by PA6 */ +#define PIO_PA7 (1 << 7) /**< \brief Pin Controlled by PA7 */ +#define PIO_PA8 (1 << 8) /**< \brief Pin Controlled by PA8 */ +#define PIO_PA9 (1 << 9) /**< \brief Pin Controlled by PA9 */ +#define PIO_PA10 (1 << 10) /**< \brief Pin Controlled by PA10 */ +#define PIO_PA11 (1 << 11) /**< \brief Pin Controlled by PA11 */ +#define PIO_PA12 (1 << 12) /**< \brief Pin Controlled by PA12 */ +#define PIO_PA13 (1 << 13) /**< \brief Pin Controlled by PA13 */ +#define PIO_PA14 (1 << 14) /**< \brief Pin Controlled by PA14 */ +#define PIO_PA15 (1 << 15) /**< \brief Pin Controlled by PA15 */ +#define PIO_PA16 (1 << 16) /**< \brief Pin Controlled by PA16 */ +#define PIO_PA17 (1 << 17) /**< \brief Pin Controlled by PA17 */ +#define PIO_PA18 (1 << 18) /**< \brief Pin Controlled by PA18 */ +#define PIO_PA19 (1 << 19) /**< \brief Pin Controlled by PA19 */ +#define PIO_PA20 (1 << 20) /**< \brief Pin Controlled by PA20 */ +#define PIO_PA21 (1 << 21) /**< \brief Pin Controlled by PA21 */ +#define PIO_PA22 (1 << 22) /**< \brief Pin Controlled by PA22 */ +#define PIO_PA23 (1 << 23) /**< \brief Pin Controlled by PA23 */ +#define PIO_PA24 (1 << 24) /**< \brief Pin Controlled by PA24 */ +#define PIO_PA25 (1 << 25) /**< \brief Pin Controlled by PA25 */ +#define PIO_PA26 (1 << 26) /**< \brief Pin Controlled by PA26 */ +#define PIO_PA27 (1 << 27) /**< \brief Pin Controlled by PA27 */ +#define PIO_PA28 (1 << 28) /**< \brief Pin Controlled by PA28 */ +#define PIO_PA29 (1 << 29) /**< \brief Pin Controlled by PA29 */ +#define PIO_PA30 (1 << 30) /**< \brief Pin Controlled by PA30 */ +#define PIO_PA31 (1 << 31) /**< \brief Pin Controlled by PA31 */ +#define PIO_PB0 (1 << 0) /**< \brief Pin Controlled by PB0 */ +#define PIO_PB1 (1 << 1) /**< \brief Pin Controlled by PB1 */ +#define PIO_PB2 (1 << 2) /**< \brief Pin Controlled by PB2 */ +#define PIO_PB3 (1 << 3) /**< \brief Pin Controlled by PB3 */ +#define PIO_PB4 (1 << 4) /**< \brief Pin Controlled by PB4 */ +#define PIO_PB5 (1 << 5) /**< \brief Pin Controlled by PB5 */ +#define PIO_PB6 (1 << 6) /**< \brief Pin Controlled by PB6 */ +#define PIO_PB7 (1 << 7) /**< \brief Pin Controlled by PB7 */ +#define PIO_PB8 (1 << 8) /**< \brief Pin Controlled by PB8 */ +#define PIO_PB9 (1 << 9) /**< \brief Pin Controlled by PB9 */ +#define PIO_PB10 (1 << 10) /**< \brief Pin Controlled by PB10 */ +#define PIO_PB11 (1 << 11) /**< \brief Pin Controlled by PB11 */ +#define PIO_PB12 (1 << 12) /**< \brief Pin Controlled by PB12 */ +#define PIO_PB13 (1 << 13) /**< \brief Pin Controlled by PB13 */ +#define PIO_PB14 (1 << 14) /**< \brief Pin Controlled by PB14 */ +#define PIO_PC0 (1 << 0) /**< \brief Pin Controlled by PC0 */ +#define PIO_PC1 (1 << 1) /**< \brief Pin Controlled by PC1 */ +#define PIO_PC2 (1 << 2) /**< \brief Pin Controlled by PC2 */ +#define PIO_PC3 (1 << 3) /**< \brief Pin Controlled by PC3 */ +#define PIO_PC4 (1 << 4) /**< \brief Pin Controlled by PC4 */ +#define PIO_PC5 (1 << 5) /**< \brief Pin Controlled by PC5 */ +#define PIO_PC6 (1 << 6) /**< \brief Pin Controlled by PC6 */ +#define PIO_PC7 (1 << 7) /**< \brief Pin Controlled by PC7 */ +#define PIO_PC8 (1 << 8) /**< \brief Pin Controlled by PC8 */ +#define PIO_PC9 (1 << 9) /**< \brief Pin Controlled by PC9 */ +#define PIO_PC10 (1 << 10) /**< \brief Pin Controlled by PC10 */ +#define PIO_PC11 (1 << 11) /**< \brief Pin Controlled by PC11 */ +#define PIO_PC12 (1 << 12) /**< \brief Pin Controlled by PC12 */ +#define PIO_PC13 (1 << 13) /**< \brief Pin Controlled by PC13 */ +#define PIO_PC14 (1 << 14) /**< \brief Pin Controlled by PC14 */ +#define PIO_PC15 (1 << 15) /**< \brief Pin Controlled by PC15 */ +#define PIO_PC16 (1 << 16) /**< \brief Pin Controlled by PC16 */ +#define PIO_PC17 (1 << 17) /**< \brief Pin Controlled by PC17 */ +#define PIO_PC18 (1 << 18) /**< \brief Pin Controlled by PC18 */ +#define PIO_PC19 (1 << 19) /**< \brief Pin Controlled by PC19 */ +#define PIO_PC20 (1 << 20) /**< \brief Pin Controlled by PC20 */ +#define PIO_PC21 (1 << 21) /**< \brief Pin Controlled by PC21 */ +#define PIO_PC22 (1 << 22) /**< \brief Pin Controlled by PC22 */ +#define PIO_PC23 (1 << 23) /**< \brief Pin Controlled by PC23 */ +#define PIO_PC24 (1 << 24) /**< \brief Pin Controlled by PC24 */ +#define PIO_PC25 (1 << 25) /**< \brief Pin Controlled by PC25 */ +#define PIO_PC26 (1 << 26) /**< \brief Pin Controlled by PC26 */ +#define PIO_PC27 (1 << 27) /**< \brief Pin Controlled by PC27 */ +#define PIO_PC28 (1 << 28) /**< \brief Pin Controlled by PC28 */ +#define PIO_PC29 (1 << 29) /**< \brief Pin Controlled by PC29 */ +#define PIO_PC30 (1 << 30) /**< \brief Pin Controlled by PC30 */ +#define PIO_PC31 (1 << 31) /**< \brief Pin Controlled by PC31 */ +/* ========== Pio definition for HSMCI peripheral ========== */ +#define PIO_PA28C_MCCDA (1 << 28) /**< \brief Hsmci signal: MCCDA */ +#define PIO_PA29C_MCCK (1 << 29) /**< \brief Hsmci signal: MCCK */ +#define PIO_PA30C_MCDA0 (1 << 30) /**< \brief Hsmci signal: MCDA0 */ +#define PIO_PA31C_MCDA1 (1 << 31) /**< \brief Hsmci signal: MCDA1 */ +#define PIO_PA26C_MCDA2 (1 << 26) /**< \brief Hsmci signal: MCDA2 */ +#define PIO_PA27C_MCDA3 (1 << 27) /**< \brief Hsmci signal: MCDA3 */ +/* ========== Pio definition for SSC peripheral ========== */ +#define PIO_PA18A_RD (1 << 18) /**< \brief Ssc signal: RD */ +#define PIO_PA20A_RF (1 << 20) /**< \brief Ssc signal: RF */ +#define PIO_PA19A_RK (1 << 19) /**< \brief Ssc signal: RK */ +#define PIO_PA17A_TD (1 << 17) /**< \brief Ssc signal: TD */ +#define PIO_PA15A_TF (1 << 15) /**< \brief Ssc signal: TF */ +#define PIO_PA16A_TK (1 << 16) /**< \brief Ssc signal: TK */ +/* ========== Pio definition for SPI peripheral ========== */ +#define PIO_PA12A_MISO (1 << 12) /**< \brief Spi signal: MISO */ +#define PIO_PA13A_MOSI (1 << 13) /**< \brief Spi signal: MOSI */ +#define PIO_PA11A_NPCS0 (1 << 11) /**< \brief Spi signal: NPCS0 */ +#define PIO_PA31A_NPCS1 (1 << 31) /**< \brief Spi signal: NPCS1 */ +#define PIO_PA9B_NPCS1 (1 << 9) /**< \brief Spi signal: NPCS1 */ +#define PIO_PB14A_NPCS1 (1 << 14) /**< \brief Spi signal: NPCS1 */ +#define PIO_PC4B_NPCS1 (1 << 4) /**< \brief Spi signal: NPCS1 */ +#define PIO_PA10B_NPCS2 (1 << 10) /**< \brief Spi signal: NPCS2 */ +#define PIO_PA30B_NPCS2 (1 << 30) /**< \brief Spi signal: NPCS2 */ +#define PIO_PB2B_NPCS2 (1 << 2) /**< \brief Spi signal: NPCS2 */ +#define PIO_PA22B_NPCS3 (1 << 22) /**< \brief Spi signal: NPCS3 */ +#define PIO_PA3B_NPCS3 (1 << 3) /**< \brief Spi signal: NPCS3 */ +#define PIO_PA5B_NPCS3 (1 << 5) /**< \brief Spi signal: NPCS3 */ +#define PIO_PA14A_SPCK (1 << 14) /**< \brief Spi signal: SPCK */ +/* ========== Pio definition for TC0 peripheral ========== */ +#define PIO_PA4B_TCLK0 (1 << 4) /**< \brief Tc0 signal: TCLK0 */ +#define PIO_PA28B_TCLK1 (1 << 28) /**< \brief Tc0 signal: TCLK1 */ +#define PIO_PA29B_TCLK2 (1 << 29) /**< \brief Tc0 signal: TCLK2 */ +#define PIO_PA0B_TIOA0 (1 << 0) /**< \brief Tc0 signal: TIOA0 */ +#define PIO_PA15B_TIOA1 (1 << 15) /**< \brief Tc0 signal: TIOA1 */ +#define PIO_PA26B_TIOA2 (1 << 26) /**< \brief Tc0 signal: TIOA2 */ +#define PIO_PA1B_TIOB0 (1 << 1) /**< \brief Tc0 signal: TIOB0 */ +#define PIO_PA16B_TIOB1 (1 << 16) /**< \brief Tc0 signal: TIOB1 */ +#define PIO_PA27B_TIOB2 (1 << 27) /**< \brief Tc0 signal: TIOB2 */ +/* ========== Pio definition for TC1 peripheral ========== */ +#define PIO_PC25B_TCLK3 (1 << 25) /**< \brief Tc1 signal: TCLK3 */ +#define PIO_PC28B_TCLK4 (1 << 28) /**< \brief Tc1 signal: TCLK4 */ +#define PIO_PC31B_TCLK5 (1 << 31) /**< \brief Tc1 signal: TCLK5 */ +#define PIO_PC23B_TIOA3 (1 << 23) /**< \brief Tc1 signal: TIOA3 */ +#define PIO_PC26B_TIOA4 (1 << 26) /**< \brief Tc1 signal: TIOA4 */ +#define PIO_PC29B_TIOA5 (1 << 29) /**< \brief Tc1 signal: TIOA5 */ +#define PIO_PC24B_TIOB3 (1 << 24) /**< \brief Tc1 signal: TIOB3 */ +#define PIO_PC27B_TIOB4 (1 << 27) /**< \brief Tc1 signal: TIOB4 */ +#define PIO_PC30B_TIOB5 (1 << 30) /**< \brief Tc1 signal: TIOB5 */ +/* ========== Pio definition for TWI0 peripheral ========== */ +#define PIO_PA4A_TWCK0 (1 << 4) /**< \brief Twi0 signal: TWCK0 */ +#define PIO_PA3A_TWD0 (1 << 3) /**< \brief Twi0 signal: TWD0 */ +/* ========== Pio definition for TWI1 peripheral ========== */ +#define PIO_PB5A_TWCK1 (1 << 5) /**< \brief Twi1 signal: TWCK1 */ +#define PIO_PB4A_TWD1 (1 << 4) /**< \brief Twi1 signal: TWD1 */ +/* ========== Pio definition for PWM peripheral ========== */ +#define PIO_PA9C_PWMFI0 (1 << 9) /**< \brief Pwm signal: PWMFI0 */ +#define PIO_PA0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ +#define PIO_PA11B_PWMH0 (1 << 11) /**< \brief Pwm signal: PWMH0 */ +#define PIO_PA23B_PWMH0 (1 << 23) /**< \brief Pwm signal: PWMH0 */ +#define PIO_PB0A_PWMH0 (1 << 0) /**< \brief Pwm signal: PWMH0 */ +#define PIO_PC18B_PWMH0 (1 << 18) /**< \brief Pwm signal: PWMH0 */ +#define PIO_PA1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ +#define PIO_PA12B_PWMH1 (1 << 12) /**< \brief Pwm signal: PWMH1 */ +#define PIO_PA24B_PWMH1 (1 << 24) /**< \brief Pwm signal: PWMH1 */ +#define PIO_PB1A_PWMH1 (1 << 1) /**< \brief Pwm signal: PWMH1 */ +#define PIO_PC19B_PWMH1 (1 << 19) /**< \brief Pwm signal: PWMH1 */ +#define PIO_PA13B_PWMH2 (1 << 13) /**< \brief Pwm signal: PWMH2 */ +#define PIO_PA2A_PWMH2 (1 << 2) /**< \brief Pwm signal: PWMH2 */ +#define PIO_PA25B_PWMH2 (1 << 25) /**< \brief Pwm signal: PWMH2 */ +#define PIO_PB4B_PWMH2 (1 << 4) /**< \brief Pwm signal: PWMH2 */ +#define PIO_PC20B_PWMH2 (1 << 20) /**< \brief Pwm signal: PWMH2 */ +#define PIO_PA14B_PWMH3 (1 << 14) /**< \brief Pwm signal: PWMH3 */ +#define PIO_PA17C_PWMH3 (1 << 17) /**< \brief Pwm signal: PWMH3 */ +#define PIO_PA7B_PWMH3 (1 << 7) /**< \brief Pwm signal: PWMH3 */ +#define PIO_PB14B_PWMH3 (1 << 14) /**< \brief Pwm signal: PWMH3 */ +#define PIO_PC21B_PWMH3 (1 << 21) /**< \brief Pwm signal: PWMH3 */ +#define PIO_PA19B_PWML0 (1 << 19) /**< \brief Pwm signal: PWML0 */ +#define PIO_PB5B_PWML0 (1 << 5) /**< \brief Pwm signal: PWML0 */ +#define PIO_PC0B_PWML0 (1 << 0) /**< \brief Pwm signal: PWML0 */ +#define PIO_PC13B_PWML0 (1 << 13) /**< \brief Pwm signal: PWML0 */ +#define PIO_PA20B_PWML1 (1 << 20) /**< \brief Pwm signal: PWML1 */ +#define PIO_PB12A_PWML1 (1 << 12) /**< \brief Pwm signal: PWML1 */ +#define PIO_PC1B_PWML1 (1 << 1) /**< \brief Pwm signal: PWML1 */ +#define PIO_PC15B_PWML1 (1 << 15) /**< \brief Pwm signal: PWML1 */ +#define PIO_PA16C_PWML2 (1 << 16) /**< \brief Pwm signal: PWML2 */ +#define PIO_PA30A_PWML2 (1 << 30) /**< \brief Pwm signal: PWML2 */ +#define PIO_PB13A_PWML2 (1 << 13) /**< \brief Pwm signal: PWML2 */ +#define PIO_PC2B_PWML2 (1 << 2) /**< \brief Pwm signal: PWML2 */ +#define PIO_PA15C_PWML3 (1 << 15) /**< \brief Pwm signal: PWML3 */ +#define PIO_PC22B_PWML3 (1 << 22) /**< \brief Pwm signal: PWML3 */ +#define PIO_PC3B_PWML3 (1 << 3) /**< \brief Pwm signal: PWML3 */ +/* ========== Pio definition for USART0 peripheral ========== */ +#define PIO_PA8A_CTS0 (1 << 8) /**< \brief Usart0 signal: CTS0 */ +#define PIO_PA7A_RTS0 (1 << 7) /**< \brief Usart0 signal: RTS0 */ +#define PIO_PA5A_RXD0 (1 << 5) /**< \brief Usart0 signal: RXD0 */ +#define PIO_PA2B_SCK0 (1 << 2) /**< \brief Usart0 signal: SCK0 */ +#define PIO_PA6A_TXD0 (1 << 6) /**< \brief Usart0 signal: TXD0 */ +/* ========== Pio definition for USART1 peripheral ========== */ +#define PIO_PA25A_CTS1 (1 << 25) /**< \brief Usart1 signal: CTS1 */ +#define PIO_PA26A_DCD1 (1 << 26) /**< \brief Usart1 signal: DCD1 */ +#define PIO_PA28A_DSR1 (1 << 28) /**< \brief Usart1 signal: DSR1 */ +#define PIO_PA27A_DTR1 (1 << 27) /**< \brief Usart1 signal: DTR1 */ +#define PIO_PA29A_RI1 (1 << 29) /**< \brief Usart1 signal: RI1 */ +#define PIO_PA24A_RTS1 (1 << 24) /**< \brief Usart1 signal: RTS1 */ +#define PIO_PA21A_RXD1 (1 << 21) /**< \brief Usart1 signal: RXD1 */ +#define PIO_PA23A_SCK1 (1 << 23) /**< \brief Usart1 signal: SCK1 */ +#define PIO_PA22A_TXD1 (1 << 22) /**< \brief Usart1 signal: TXD1 */ +/* ========== Pio definition for ADC peripheral ========== */ +#define PIO_PA17X1_AD0 (1 << 17) /**< \brief Adc signal: AD0 */ +#define PIO_PA18X1_AD1 (1 << 18) /**< \brief Adc signal: AD1 */ +#define PIO_PC13X1_AD10 (1 << 13) /**< \brief Adc signal: AD10 */ +#define PIO_PC15X1_AD11 (1 << 15) /**< \brief Adc signal: AD11 */ +#define PIO_PC12X1_AD12 (1 << 12) /**< \brief Adc signal: AD12 */ +#define PIO_PC29X1_AD13 (1 << 29) /**< \brief Adc signal: AD13 */ +#define PIO_PC30X1_AD14 (1 << 30) /**< \brief Adc signal: AD14 */ +#define PIO_PA19X1_AD2 (1 << 19) /**< \brief Adc signal: AD2 */ +#define PIO_PA20X1_AD3 (1 << 20) /**< \brief Adc signal: AD3 */ +#define PIO_PB0X1_AD4 (1 << 0) /**< \brief Adc signal: AD4 */ +#define PIO_PB1X1_AD5 (1 << 1) /**< \brief Adc signal: AD5 */ +#define PIO_PB2X1_AD6 (1 << 2) /**< \brief Adc signal: AD6 */ +#define PIO_PB3X1_AD7 (1 << 3) /**< \brief Adc signal: AD7 */ +#define PIO_PA21X1_AD8 (1 << 21) /**< \brief Adc signal: AD8 */ +#define PIO_PA22X1_AD9 (1 << 22) /**< \brief Adc signal: AD9 */ +#define PIO_PA8B_ADTRG (1 << 8) /**< \brief Adc signal: ADTRG */ +/* ========== Pio definition for DACC peripheral ========== */ +#define PIO_PB13X1_DAC0 (1 << 13) /**< \brief Dacc signal: DAC0 */ +#define PIO_PB14X1_DAC1 (1 << 14) /**< \brief Dacc signal: DAC1 */ +#define PIO_PA2C_DATRG (1 << 2) /**< \brief Dacc signal: DATRG */ +/* ========== Pio definition for PMC peripheral ========== */ +#define PIO_PA6B_PCK0 (1 << 6) /**< \brief Pmc signal: PCK0 */ +#define PIO_PB13B_PCK0 (1 << 13) /**< \brief Pmc signal: PCK0 */ +#define PIO_PA17B_PCK1 (1 << 17) /**< \brief Pmc signal: PCK1 */ +#define PIO_PA21B_PCK1 (1 << 21) /**< \brief Pmc signal: PCK1 */ +#define PIO_PA18B_PCK2 (1 << 18) /**< \brief Pmc signal: PCK2 */ +#define PIO_PA31B_PCK2 (1 << 31) /**< \brief Pmc signal: PCK2 */ +#define PIO_PB3B_PCK2 (1 << 3) /**< \brief Pmc signal: PCK2 */ +/* ========== Pio definition for UART0 peripheral ========== */ +#define PIO_PA9A_URXD0 (1 << 9) /**< \brief Uart0 signal: URXD0 */ +#define PIO_PA10A_UTXD0 (1 << 10) /**< \brief Uart0 signal: UTXD0 */ +/* ========== Pio definition for UART1 peripheral ========== */ +#define PIO_PB2A_URXD1 (1 << 2) /**< \brief Uart1 signal: URXD1 */ +#define PIO_PB3A_UTXD1 (1 << 3) /**< \brief Uart1 signal: UTXD1 */ +/* ========== Pio definition for PIOA peripheral ========== */ +#define PIO_PA24X1_PIODC0 (1 << 24) /**< \brief Pioa signal: PIODC0 */ +#define PIO_PA25X1_PIODC1 (1 << 25) /**< \brief Pioa signal: PIODC1 */ +#define PIO_PA26X1_PIODC2 (1 << 26) /**< \brief Pioa signal: PIODC2 */ +#define PIO_PA27X1_PIODC3 (1 << 27) /**< \brief Pioa signal: PIODC3 */ +#define PIO_PA28X1_PIODC4 (1 << 28) /**< \brief Pioa signal: PIODC4 */ +#define PIO_PA29X1_PIODC5 (1 << 29) /**< \brief Pioa signal: PIODC5 */ +#define PIO_PA30X1_PIODC6 (1 << 30) /**< \brief Pioa signal: PIODC6 */ +#define PIO_PA31X1_PIODC7 (1 << 31) /**< \brief Pioa signal: PIODC7 */ +#define PIO_PA23X1_PIODCCLK (1 << 23) /**< \brief Pioa signal: PIODCCLK */ +#define PIO_PA15X1_PIODCEN1 (1 << 15) /**< \brief Pioa signal: PIODCEN1 */ +#define PIO_PA16X1_PIODCEN2 (1 << 16) /**< \brief Pioa signal: PIODCEN2 */ +/*@}*/ + +/* ***************************************************************************** */ +/* MEMORY MAPPING DEFINITIONS FOR AT91SAM3S */ +/* ***************************************************************************** */ + +#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ +#define AT91C_IFLASH (0x00400000) /**< Internal Flash base address */ +#define AT91C_IROM (0x00800000) /**< Internal ROM base address */ +#define AT91C_IRAM (0x20000000) /**< Internal RAM base address */ +#define AT91C_EBI_CS0 (0x60000000) /**< EBI Chip Select 0 base address */ +#define AT91C_EBI_CS1 (0x61000000) /**< EBI Chip Select 1 base address */ +#define AT91C_EBI_CS2 (0x62000000) /**< EBI Chip Select 2 base address */ +#define AT91C_EBI_CS3 (0x63000000) /**< EBI Chip Select 3 base address */ + +#ifdef __cplusplus +} +#endif + +/*@}*/ + +#endif /* AT91SAM3S_H */ diff --git a/src/ersky9x/audio.cpp b/src/ersky9x/audio.cpp index 6d95ce70d..53bf34162 100644 --- a/src/ersky9x/audio.cpp +++ b/src/ersky9x/audio.cpp @@ -67,13 +67,17 @@ const char * audioFilenames[] = { uint32_t sdAvailableAudioFiles = 0; +// TODO enable the assert when it's C++ +extern "C" { void retrieveAvailableAudioFiles() { FILINFO info; char filename[32] = SYSTEM_SOUNDS_PATH "/"; +#if !defined WIN32 && defined __GNUC__ assert(sizeof(audioFilenames)==AU_FRSKY_FIRST*sizeof(char *)); assert(sizeof(sdAvailableAudioFiles)*8 > AU_FRSKY_FIRST); +#endif uint32_t availableAudioFiles = 0; @@ -86,6 +90,7 @@ void retrieveAvailableAudioFiles() sdAvailableAudioFiles = availableAudioFiles; } +} inline bool isAudioFileAvailable(uint8_t i, char * filename) { @@ -156,21 +161,10 @@ uint32_t pcmFreq = 8000; #ifndef SIMU void audioTask(void* pdata) { -#if defined(SDCARD) - if (CardIsConnected() && sdState==SD_STATE_CONNECTED) { - // We lower the priority to allow the splash to be displayed... - CoSetPriority(audioTaskId, MENUS_PRIO+1); - if (f_mount(0, &g_FATFS_Obj) == FR_OK) { - retrieveAvailableAudioFiles(); - sdState = SD_STATE_MOUNTED; - } - else { - sdState = SD_STATE_ERROR; - } - CoSetPriority(audioTaskId, AUDIO_PRIO); - AUDIO_TADA(); - } -#endif +#if defined(SDCARD) + sdInit(); + AUDIO_TADA(); +#endif while (1) { @@ -434,6 +428,7 @@ void AudioQueue::play(uint8_t tFreq, uint8_t tLen, uint8_t tPause, uint8_t tFlag { CoEnterMutexSection(audioMutex); + if (tFlags & PLAY_SOUND_VARIO) { background.freq = tFreq * 2; background.duration = tLen; @@ -477,7 +472,7 @@ void AudioQueue::playFile(const char *filename, uint8_t flags, uint8_t id) #if defined(SIMU) printf("playFile(\"%s\")\n", filename); fflush(stdout); #else - if (!CardIsMounted()) + if (Card_initialized && !sd_card_mounted()) return; CoEnterMutexSection(audioMutex); diff --git a/src/ersky9x/board.h b/src/ersky9x/board.h new file mode 100644 index 000000000..014ac7cc0 --- /dev/null +++ b/src/ersky9x/board.h @@ -0,0 +1,656 @@ +/* + * Authors (alphabetical order) + * - Bertrand Songis + * - Bryan J. Rentoul (Gruvin) + * - Cameron Weeks + * - Erez Raviv + * - Jean-Pierre Parisy + * - Karl Szmutny + * - Michael Blandford + * - Michal Hlavinka + * - Pat Mackenzie + * - Philip Moss + * - Rob Thomson + * - Romolo Manfredini + * - Thomas Husterer + * + * open9x is based on code named + * gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/, + * er9x by Erez Raviv: http://code.google.com/p/er9x/, + * and the original (and ongoing) project by + * Thomas Husterer, th9x: http://code.google.com/p/th9x/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef board_h +#define board_h + +#include +#include "chip.h" + +#ifdef REVA +#include "AT91SAM3S2.h" +#else +#include "AT91SAM3S4.h" +#endif + +#ifdef SIMU +#define CONVERT_PTR(x) ((uint32_t)(uint64_t)(x)) +#else +#include "core_cm3.h" +#define CONVERT_PTR(x) ((uint32_t)(x)) +#endif + +//------------------------------------------------------------------------------ +// Definitions +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \par +/// This page lists several definition related to the board description. +/// +/// Definitions +/// - BOARD_NAME + +/// Name of the board. +#define BOARD_NAME "AT91SAM3S-EK" +/// Board definition. +#define at91sam3sek +/// Family definition (already defined). +#define at91sam3s +/// Core definition +#define cortexm3 + +// TODO remove these definitions +//#define BOARD_REV_A +#define BOARD_REV_B + +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies" +/// This page lists several definition related to the board operating frequency +/// (when using the initialization done by board_lowlevel.c). +/// +/// !Definitions +/// - BOARD_MAINOSC +/// - BOARD_MCK + +/// Frequency of the board main oscillator. +#define BOARD_MAINOSC 12000000 + +/// Master clock frequency (when using board_lowlevel.c). +#define BOARD_MCK 64000000 + +//------------------------------------------------------------------------------ +// ADC +//------------------------------------------------------------------------------ + +/// Startup time max, return from Idle mode (in µs) +#define ADC_STARTUP_TIME_MAX 15 +/// Track and hold Acquisition Time min (in ns) +#define ADC_TRACK_HOLD_TIME_MIN 1200 + +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// USB attributes configuration descriptor (bus or self powered, remote wakeup) +//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP +#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions" +/// This pages lists all the pio definitions contained in board.h. The constants +/// are named using the following convention: PIN_* for a constant which defines +/// a single Pin instance (but may include several PIOs sharing the same +/// controller), and PINS_* for a list of Pin instances. +/// +/// !ADC +/// - PIN_ADC0_AD0 +/// - PIN_ADC0_AD1 +/// - PIN_ADC0_AD2 +/// - PIN_ADC0_AD3 +/// - PIN_ADC0_AD4 +/// - PIN_ADC0_AD5 +/// - PIN_ADC0_AD6 +/// - PIN_ADC0_AD7 +/// - PINS_ADC0 +/// +/// !UART +/// - PINS_UART +/// +/// !EBI +/// - PIN_EBI_DATA_BUS +/// - PIN_EBI_NCS0 +/// - PIN_EBI_NRD +/// - PIN_EBI_NWE +/// - PIN_EBI_ADDR_BUS +/// - PIN_EBI_PSRAM_NBS +/// - PIN_EBI_A1 +/// - PIN_EBI_LCD_RS +/// +/// !LEDs +/// - PIN_LED_0 +/// - PIN_LED_1 +/// - PIN_LED_2 +/// - PINS_LEDS +/// +/// !MCI +/// - PINS_MCI +/// +/// !Push buttons +/// - PIN_PUSHBUTTON_1 +/// - PIN_PUSHBUTTON_2 +/// - PINS_PUSHBUTTONS +/// - PUSHBUTTON_BP1 +/// - PUSHBUTTON_BP2 +/// +/// !PWMC +/// - PIN_PWMC_PWMH0 +/// - PIN_PWMC_PWML0 +/// - PIN_PWMC_PWMH1 +/// - PIN_PWMC_PWML1 +/// - PIN_PWMC_PWMH2 +/// - PIN_PWMC_PWML2 +/// - PIN_PWMC_PWMH3 +/// - PIN_PWMC_PWML3 +/// - PIN_PWM_LED0 +/// - PIN_PWM_LED1 +/// - PIN_PWM_LED2 +/// - CHANNEL_PWM_LED0 +/// - CHANNEL_PWM_LED1 +/// - CHANNEL_PWM_LED2 +/// +/// !SPI +/// - PIN_SPI_MISO +/// - PIN_SPI_MOSI +/// - PIN_SPI_SPCK +/// - PINS_SPI +/// - PIN_SPI_NPCS0_PA11 +/// +/// ! SSC +/// - PIN_SSC_TD +/// - PIN_SSC_TK +/// - PIN_SSC_TF +/// - PINS_SSC_CODEC +/// +/// ! PCK0 +/// - PIN_PCK0 +/// +/// !TWI +/// - PIN_TWI_TWD0 +/// - PIN_TWI_TWCK0 +/// - PINS_TWI +/// +/// !USART0 +/// - PIN_USART0_RXD +/// - PIN_USART0_TXD +/// - PIN_USART0_CTS +/// - PIN_USART0_RTS +/// - PIN_USART0_SCK +/// +/// !USB +/// - PIN_USB_PULLUP +/// + +/// ADC_AD0 pin definition. +#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD1 pin definition. +#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD2 pin definition. +#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD3 pin definition. +#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD4 pin definition. +#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD5 pin definition. +#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD6 pin definition. +#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} +/// ADC_AD7 pin definition. +#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} + +/// Pins ADC +#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7 + +/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */ +#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} + +/// EBI +#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} + +#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \ + {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} + +#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */ +#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */ + +#ifdef BOARD_REV_A +/** LED #0 pin definition. */ +#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} +/** LED #1 pin definition. */ +#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} +/** LED #2 pin definition. */ +#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} +#endif +#ifdef BOARD_REV_B +/** LED #0 pin definition. */ +#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} +/** LED #1 pin definition. */ +#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT} +/** LED #2 pin definition. */ +#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} +#endif + +/** List of all LEDs definitions. */ +#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2 + +/** MCI pins definition. */ +#define PINS_MCI {0x3fUL << 26, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_PULLUP} +/** MCI pin Card Detect. */ +#define PIN_MCI_CD {PIO_PB7, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP} + +/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */ +#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} +/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */ +#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} +/** List of all push button definitions. */ +#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2 + +/** Push button #1 index. */ +#define PUSHBUTTON_BP1 0 +/** Push button #2 index. */ +#define PUSHBUTTON_BP2 1 + +/// Simulated joystick LEFT index. +#define JOYSTICK_LEFT 0 +/// Simulated joystick RIGHT index. +#define JOYSTICK_RIGHT 1 + +/** PWMC PWM0 pin definition. */ +#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} +#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} +/** PWMC PWM1 pin definition. */ +#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} +#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} +/** PWMC PWM2 pin definition. */ +#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} +#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT} +/** PWMC PWM3 pin definition. */ +#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT} +#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT} +/** PWM pin definition for LED0 */ +#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0 +/** PWM pin definition for LED1 */ +#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2 +/** PWM pin definition for LED2 */ +#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3 +/** PWM channel for LED0 */ +#define CHANNEL_PWM_LED0 0 +/** PWM channel for LED1 */ +#define CHANNEL_PWM_LED1 2 +/** PWM channel for LED2 */ +#define CHANNEL_PWM_LED2 3 + +/** SPI MISO pin definition. */ +#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/** SPI MOSI pin definition. */ +#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/** SPI SPCK pin definition. */ +#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/** SPI chip select pin definition. */ +#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +/** List of SPI pin definitions (MISO, MOSI & SPCK). */ +#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK + +/// SSC pins definition. +#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF + +/// PCK0 +#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT} + +/// TWI pins definition. +#define TWI_V3XX +#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0 +#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1 + +/// USART0 +#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} + +/// USART1 +#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} +#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} + +/// USB VBus monitoring pin definition. +#ifdef BOARD_REV_A +#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} +#endif +#ifdef BOARD_REV_B +#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} +#endif + +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \par sam3s_ek_extcomp "SAM3S-EK - External components" +/// This page lists the definitions related to external on-board components +/// located in the board.h file for the AT91SAM3S-EK. +/// +/// !AT45 Dataflash Card +/// - BOARD_AT45_A_SPI_BASE +/// - BOARD_AT45_A_SPI_ID +/// - BOARD_AT45_A_SPI_PINS +/// - BOARD_AT45_A_SPI +/// - BOARD_AT45_A_NPCS +/// - BOARD_AT45_A_NPCS_PIN +/// +/// !AT45 Dataflash (serial onboard DataFlash) +/// - BOARD_AT45_B_SPI_BASE +/// - BOARD_AT45_B_SPI_ID +/// - BOARD_AT45_B_SPI_PINS +/// - BOARD_AT45_B_SPI +/// - BOARD_AT45_B_NPCS +/// - BOARD_AT45_B_NPCS_PIN +/// +/// !AT26 Serial Flash +/// - BOARD_AT26_A_SPI_BASE +/// - BOARD_AT26_A_SPI_ID +/// - BOARD_AT26_A_SPI_PINS +/// - BOARD_AT26_A_SPI +/// - BOARD_AT26_A_NPCS +/// - BOARD_AT26_A_NPCS_PIN +/// +/// !SD Card +/// - MCI2_INTERFACE +/// - BOARD_SD_MCI_BASE +/// - BOARD_SD_MCI_ID +/// - BOARD_SD_PINS +/// - BOARD_SD_SLOT +/// +/// !PSRAM +/// - BOARD_PSRAM_PINS +/// +/// !LCD +/// - BOARD_LCD_ILI9325 +/// - BOARD_LCD_PINS +/// - BOARD_BACKLIGHT_PIN +/// - BOARD_LCD_BASE +/// - BOARD_LCD_RS +/// - BOARD_LCD_WIDTH +/// - BOARD_LCD_HEIGHT +/// +/// !TouchScreen +/// - BOARD_TSC_ADS7843 +/// - PIN_TCS_IRQ +/// - PIN_TCS_BUSY +/// - BOARD_TSC_SPI_BASE +/// - BOARD_TSC_SPI_ID +/// - BOARD_TSC_SPI_PINS +/// - BOARD_TSC_NPCS +/// - BOARD_TSC_NPCS_PIN +/// +/// Base address of SPI peripheral connected to the dataflash. +//#define BOARD_AT45_A_SPI_BASE SPI0 +///// Identifier of SPI peripheral connected to the dataflash. +//#define BOARD_AT45_A_SPI_ID ID_SPI0 +///// Pins of the SPI peripheral connected to the dataflash. +//#define BOARD_AT45_A_SPI_PINS PINS_SPI0 +///// Dataflahs SPI number. +//#define BOARD_AT45_A_SPI 0 +///// Chip select connected to the dataflash. +//#define BOARD_AT45_A_NPCS 3 +///// Chip select pin connected to the dataflash. +//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3 + +/// Base address of SPI peripheral connected to the dataflash. +//#define BOARD_AT45_B_SPI_BASE SPI1 +///// Identifier of SPI peripheral connected to the dataflash. +//#define BOARD_AT45_B_SPI_ID ID_SPI1 +///// Pins of the SPI peripheral connected to the dataflash. +//#define BOARD_AT45_B_SPI_PINS PINS_SPI1 +///// Dataflahs SPI number. +//#define BOARD_AT45_B_SPI 1 +///// Chip select connected to the dataflash. +//#define BOARD_AT45_B_NPCS 3 +///// Chip select pin connected to the dataflash. +//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3 + +/// Base address of SPI peripheral connected to the serialflash. +//#define BOARD_AT26_A_SPI_BASE SPI0 +///// Identifier of SPI peripheral connected to the serialflash. +//#define BOARD_AT26_A_SPI_ID ID_SPI0 +///// Pins of the SPI peripheral connected to the serialflash. +//#define BOARD_AT26_A_SPI_PINS PINS_SPI0 +///// Serialflash SPI number. +//#define BOARD_AT26_A_SPI 0 +///// Chip select connected to the serialflash. +//#define BOARD_AT26_A_NPCS 3 +///// Chip select pin connected to the serialflash. +//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3 + +/// ISO7816 +/// - PIN_SMARTCARD_CONNECT +/// - PIN_ISO7816_RSTMC +/// - PINS_ISO7816 + +/// Smartcard detection pin +//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT} +/// PIN used for reset the smartcard +//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} +/// Pins used for connect the smartcard +//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC + +/// Dma channel number +#define BOARD_MCI_DMA_CHANNEL 0 +/// MCI0 DMA hardware handshaking ID +#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0 +#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0 +/// MCI1 DMA hardware handshaking ID +#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13 +#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13 +/// SD DMA hardware handshaking ID +#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0 +#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0 + + +/// HS MCI interface +#define MCI2_INTERFACE +/// Base address of the MCI peripheral connected to the SD card. +#define BOARD_SD_MCI_BASE MCI0//MCI +///// Peripheral identifier of the MCI connected to the SD card. +#define BOARD_SD_MCI_ID AT91C_ID_MCI0 ID_MCI0 //ID_MCI +///// MCI pins that shall be configured to access the SD card. +#define BOARD_SD_PINS PINS_MCI +///// MCI slot to which the SD card is connected to. +#define BOARD_SD_SLOT MCI_SD_SLOTA +///// MCI Card Detect pin. +#define BOARD_SD_PIN_CD PIN_MCI_CD + +#define CardIsConnected() ( (PIOB->PIO_PDSR & PIO_PB7) == 0 ) + +// States for initialising card +#define SD_ST_ERR -1 +#define SD_ST_STARTUP 0 +#define SD_ST_EMPTY 1 +#define SD_ST_INIT1 2 +#define SD_ST_INIT2 3 +#define SD_ST_IDLE 4 +#define SD_ST_READY 5 +#define SD_ST_IDENT 6 +#define SD_ST_STBY 7 +#define SD_ST_TRAN 8 +#define SD_ST_DATA 9 +#define SD_ST_MOUNTED 10 + +extern int32_t Card_state; +extern volatile uint32_t Card_initialized; + +/* +#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \ + PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1 +*/ + +/** Indicates board has an ILI9325 external component to manage LCD. */ +#define BOARD_LCD_ILI9325 + +/** LCD pins definition. */ +#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \ + PIN_EBI_NCS1, PIN_EBI_LCD_RS +/** Backlight pin definition. */ +#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT} +/** Define ILI9325 base address. */ +#define BOARD_LCD_BASE 0x61000000 +/** Define ILI9325 register select signal. */ +#define BOARD_LCD_RS (1 << 1) +/** Display width in pixels. */ +#define BOARD_LCD_WIDTH 240 +/** Display height in pixels. */ +#define BOARD_LCD_HEIGHT 320 + +/** Indicates board has an ADS7843 external component to manage Touch Screen */ +#define BOARD_TSC_ADS7843 + +#ifdef BOARD_REV_A +/** Touchscreen controller IRQ pin definition. */ +#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE} +#define PIN_TCS_IRQ_WUP_ID (1 << 3) +/** Touchscreen controller Busy pin definition. */ +#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} +#endif +#ifdef BOARD_REV_B +/** Touchscreen controller IRQ pin definition. */ +#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE} +#define PIN_TCS_IRQ_WUP_ID (1 << 15) +/** Touchscreen controller Busy pin definition. */ +#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} +#endif + +/** Base address of SPI peripheral connected to the touchscreen controller. */ +#define BOARD_TSC_SPI_BASE SPI +/** Identifier of SPI peripheral connected to the touchscreen controller. */ +#define BOARD_TSC_SPI_ID ID_SPI +/** Pins of the SPI peripheral connected to the touchscreen controller. */ +#define BOARD_TSC_SPI_PINS PINS_SPI +/** Chip select connected to the touchscreen controller. */ +#define BOARD_TSC_NPCS 0 +/** Chip select pin connected to the touchscreen controller. */ +#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11 + +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \par sam3s_ek_mem "SAM3S-EK - Memories" +/// This page lists definitions related to internal & external on-board memories. +/// +/// !Embedded Flash +/// - BOARD_FLASH_EFC + +/// Internal SRAM address +#define AT91C_ISRAM AT91C_IRAM +#define AT91C_ISRAM_SIZE 0x00008000 + +#define AT91C_IFLASH_SIZE (0x40000) +#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes +#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512 +#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes +#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16 + +//------------------------------------------------------------------------------ + + +//------------------------------------------------------------------------------ +/// \section sam3s_ek_extcomp "SAM3S-EK - External components" +/// This page lists the definitions related to external on-board components +/// located in the board.h file for the SAM3S-EK. +/// +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition" +/// This page lists the definitions related to different chip's definition +/// located in the board.h file for the SAM3S-EK. + +/// DBGU +#define BOARD_DBGU_ID ID_DBGU + +/// Rtc +#define BOARD_RTC_ID ID_RTC + +/// Twi eeprom +#define BOARD_ID_TWI_EEPROM ID_TWI1 +#define BOARD_BASE_TWI_EEPROM TWI1 +#define BOARD_PINS_TWI_EEPROM PINS_TWI1 + +/// USART +#define BOARD_PIN_USART_RXD PIN_USART1_RXD +#define BOARD_PIN_USART_TXD PIN_USART1_TXD +#define BOARD_PIN_USART_CTS PIN_USART1_CTS +#define BOARD_PIN_USART_RTS PIN_USART1_RTS +#define BOARD_PIN_USART_EN PIN_USART1_EN +#define BOARD_USART_BASE USART1 +#define BOARD_ID_USART ID_USART1 + +//------------------------------------------------------------------------------ + + +#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} +#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} + +/// Nandflash chip enable pin definition. +#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT} +/// Nandflash ready/busy pin definition. +#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP} + +/// Nandflash controller peripheral pins definition. +#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \ + PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE + +/// Address for transferring command bytes to the nandflash. +#define BOARD_NF_COMMAND_ADDR 0x60400000 +/// Address for transferring address bytes to the nandflash. +#define BOARD_NF_ADDRESS_ADDR 0x60200000 +/// Address for transferring data bytes to the nandflash. +#define BOARD_NF_DATA_ADDR 0x60000000 + +extern uint32_t Master_frequency ; + +struct t_serial_tx +{ + uint8_t *buffer ; + uint16_t size ; + volatile uint16_t ready ; +}; + +#endif diff --git a/src/ersky9x/board_lowlevel.c b/src/ersky9x/board_lowlevel.c index ae4aa4351..a97fde941 100644 --- a/src/ersky9x/board_lowlevel.c +++ b/src/ersky9x/board_lowlevel.c @@ -39,8 +39,6 @@ * Headers *----------------------------------------------------------------------------*/ -// TODO duplicated file! - #include "board.h" /*---------------------------------------------------------------------------- diff --git a/src/ersky9x/chip.h b/src/ersky9x/chip.h new file mode 100644 index 000000000..d216db6d1 --- /dev/null +++ b/src/ersky9x/chip.h @@ -0,0 +1,130 @@ +/* ---------------------------------------------------------------------------- + * ATMEL Microcontroller Software Support + * ---------------------------------------------------------------------------- + * Copyright (c) 2008, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +//------------------------------------------------------------------------------ +/// \unit +/// !Purpose +/// +/// Definition of AT91SAM3S4 characteristics and features +/// +/// !Usage +/// -# For ARM core feature, see "AT91SAM3S4 - ARM core features". +/// -# For IP features, see "AT91SAM3S4 - IP features". +/// -# For misc, see "AT91SAM3S4 - Misc". +//------------------------------------------------------------------------------ + +#ifndef CHIP_H +#define CHIP_H + +//------------------------------------------------------------------------------ +// Headers +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +// Definitions +//------------------------------------------------------------------------------ + +//------------------------------------------------------------------------------ +/// \page "AT91SAM3S4 - ARM core features" +/// This page lists several characteristics related to the ARM core +/// + +//ARM core features + +/// ARM core definition. +#define cortexm3 + +/// family definition. +#define at91sam3s + +//------------------------------------------------------------------------------ +/// \page "AT91SAM3S4 - IP features" +/// This page lists several characteristics related to the embedded IP +/// + +//IP FEATURES + +// EFC GPNVM number +#define CHIP_EFC_NUM_GPNVMS 3 + +/// Indicates chip has an Enhanced EFC. +#define CHIP_FLASH_EEFC + +// DMA channels number +#define CHIP_DMA_CHANNEL_NUM 4 + +// Indicate chip's MCI interface. +#define MCI2_INTERFACE + +// Indicate chip SSC has DMA interface. +#define CHIP_SSC_DMA + +// Indicate chip SPI has DMA interface. +#define CHIP_SPI_DMA + +/// Indicates chip has an UDP Full Speed. +#define CHIP_USB_UDP + +/// Indicates chip has an internal pull-up. +#define CHIP_USB_PULLUP_INTERNAL + +/// Number of USB endpoints +#define CHIP_USB_NUMENDPOINTS 8 + +/// Endpoints max paxcket size +#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \ + ((i == 0) ? 64 : \ + ((i == 1) ? 64 : \ + ((i == 2) ? 64 : \ + ((i == 3) ? 64 : \ + ((i == 4) ? 512 : \ + ((i == 5) ? 512 : \ + ((i == 6) ? 64 : \ + ((i == 7) ? 64 : 0 )))))))) + +/// Endpoints Number of Bank +#define CHIP_USB_ENDPOINTS_BANKS(i) \ + ((i == 0) ? 1 : \ + ((i == 1) ? 2 : \ + ((i == 2) ? 2 : \ + ((i == 3) ? 1 : \ + ((i == 4) ? 2 : \ + ((i == 5) ? 2 : \ + ((i == 6) ? 2 : \ + ((i == 7) ? 2 : 0 )))))))) + +//------------------------------------------------------------------------------ +/// \page "AT91SAM3S4 - Misc " +/// This page lists misc features +/// + +//Misc + +#endif //#ifndef CHIP_H + diff --git a/src/ersky9x/core_cm3.c b/src/ersky9x/core_cm3.c index 1c96f9112..ad33139f5 100644 --- a/src/ersky9x/core_cm3.c +++ b/src/ersky9x/core_cm3.c @@ -21,8 +21,6 @@ * ******************************************************************************/ -// TODO duplicated file - #include /* define compiler specific symbols */ diff --git a/src/ersky9x/core_cm3.h b/src/ersky9x/core_cm3.h index c8e096bc7..1c07effab 100644 --- a/src/ersky9x/core_cm3.h +++ b/src/ersky9x/core_cm3.h @@ -21,8 +21,6 @@ * ******************************************************************************/ -// TODO duplicated file - #ifndef __CM3_CORE_H__ #define __CM3_CORE_H__ diff --git a/src/ersky9x/diskio.c b/src/ersky9x/diskio.c index ab0358c20..3e78bee98 100644 --- a/src/ersky9x/diskio.c +++ b/src/ersky9x/diskio.c @@ -1,19 +1,91 @@ +/* + * Authors (alphabetical order) + * - Bertrand Songis + * - Bryan J. Rentoul (Gruvin) + * - Cameron Weeks + * - Erez Raviv + * - Jean-Pierre Parisy + * - Karl Szmutny + * - Michael Blandford + * - Michal Hlavinka + * - Pat Mackenzie + * - Philip Moss + * - Rob Thomson + * - Romolo Manfredini + * - Thomas Husterer + * + * open9x is based on code named + * gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/, + * er9x by Erez Raviv: http://code.google.com/p/er9x/, + * and the original (and ongoing) project by + * Thomas Husterer, th9x: http://code.google.com/p/th9x/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + /*-----------------------------------------------------------------------*/ -/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */ +/* MMCv3/SDv1/SDv2 (in SPI mode) control module (C)ChaN, 2010 */ /*-----------------------------------------------------------------------*/ -/* This is a stub disk I/O module that acts as front end of the existing */ -/* disk I/O modules and attach it to FatFs module with common interface. */ +/* Only rcvr_spi(), xmit_spi(), sdPoll10mS() and some macros */ +/* are platform dependent. */ /*-----------------------------------------------------------------------*/ -#include -#include -#include "board/board.h" +#include "board.h" +#include "debug.h" #include "../FatFs/diskio.h" #include "../FatFs/ff.h" -#include "memories/Media.h" -#include "debug.h" +#include "../CoOS/kernel/CoOS.h" -#define SECTOR_SIZE_DEFAULT 512 +#define CARD_TYPE_bmHC (1 << 0) /**< Bit for High-Capacity(Density) */ +#define CARD_TYPE_bmSDMMC (0x3 << 1) /**< Bits mask for SD/MMC */ +#define CARD_TYPE_bmUNKNOWN (0x0 << 1) /**< Bits for Unknown card */ +#define CARD_TYPE_bmSD (0x1 << 1) /**< Bits for SD */ +#define CARD_TYPE_bmMMC (0x2 << 1) /**< Bits for MMC */ +#define CARD_TYPE_bmSDIO (1 << 3) /**< Bit for SDIO */ +/** Card can not be identified */ +#define CARD_UNKNOWN (0) +/** SD Card (0x2) */ +#define CARD_SD (CARD_TYPE_bmSD) +/** SD High Capacity Card (0x3) */ +#define CARD_SDHC (CARD_TYPE_bmSD|CARD_TYPE_bmHC) +/** MMC Card (0x4) */ +#define CARD_MMC (CARD_TYPE_bmMMC) +/** MMC High-Density Card (0x5) */ +#define CARD_MMCHD (CARD_TYPE_bmMMC|CARD_TYPE_bmHC) +/** SDIO only card (0x8) */ +#define CARD_SDIO (CARD_TYPE_bmSDIO) +/** SDIO Combo, with SD embedded (0xA) */ +#define CARD_SDCOMBO (CARD_TYPE_bmSDIO|CARD_SD) +/** SDIO Combo, with SDHC embedded (0xB) */ +#define CARD_SDHCCOMBO (CARD_TYPE_bmSDIO|CARD_SDHC) + +/** Bit mask for data errors */ +#define STATUS_ERRORS_DATA ((uint32_t)(HSMCI_SR_UNRE \ + | HSMCI_SR_OVRE \ + /*| HSMCI_SR_BLKOVRE*/ \ + /*| HSMCI_SR_CSTOE*/ \ + | HSMCI_SR_DTOE \ + | HSMCI_SR_DCRCE)) + + +uint32_t Card_ID[4] ; +uint32_t Card_SCR[2] ; +uint32_t Card_CSD[4] ; +int32_t Card_state = SD_ST_STARTUP ; +volatile uint32_t Card_initialized = 0; +uint32_t Sd_128_resp[4] ; +uint32_t Sd_rca ; +uint32_t Cmd_8_resp ; +uint32_t Cmd_A41_resp ; +uint8_t cardType; /*-----------------------------------------------------------------------*/ /* Lock / unlock functions */ @@ -40,45 +112,1089 @@ int ff_del_syncobj (_SYNC_t mutex) return 1; } -/*-----------------------------------------------------------------------*/ -/* Initialize a Drive */ -/*-----------------------------------------------------------------------*/ - - -DSTATUS disk_initialize ( - BYTE drv /* Physical drive number (0..) */ -) +/** + * Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is + * MCK/2 and corresponds to CLKDIV = 0 + * \param mciSpeed MCI clock speed in Hz, 0 will not change current speed. + * \return The actual speed used, 0 for fail. + */ +uint32_t sdSetSpeed(uint32_t mciSpeed ) { - DSTATUS stat = STA_NOINIT; + uint32_t mciMr; + uint32_t clkdiv; - switch (drv) - { - default: - stat = 0; - break; + mciMr = HSMCI->HSMCI_MR & (~(uint32_t) HSMCI_MR_CLKDIV_Msk); + /* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) + * divided by (2*(CLKDIV+1)) + * mciSpeed = MCK / (2*(CLKDIV+1)) */ + if (mciSpeed > 0) { + clkdiv = (Master_frequency / 2 / mciSpeed); + /* Speed should not bigger than expired one */ + if (mciSpeed < Master_frequency / 2 / clkdiv) { + clkdiv++; } - return stat; + if (clkdiv > 0) { + clkdiv -= 1; + } + } + else { + clkdiv = 0; + } + + /* Actual MCI speed */ + mciSpeed = Master_frequency / 2 / (clkdiv + 1); + /* Modify MR */HSMCI->HSMCI_MR = mciMr | clkdiv; + + return mciSpeed; +} + +#if 0 +void SD_SetBlklen( uint32_t blklen ) +{ + uint32_t mciMr; + uint32_t clkdiv; + + mciMr = HSMCI->HSMCI_MR & (~(uint32_t)HSMCI_MR_BLKLEN); + /* Modify MR */ + HSMCI->HSMCI_MR = mciMr | blklen << 16 ; +} +#endif + +#if 0 +/** + * Reset MCI HW interface and disable it. + * \param keepSettings Keep old register settings, including + * _MR, _SDCR, _DTOR, _CSTOR, _DMA and _CFG. + */ +void SD_Reset( uint8_t keepSettings) +{ + Hsmci *pMciHw = HSMCI ; + + if (keepSettings) + { + uint32_t mr, sdcr, dtor, cstor; + uint32_t cfg; + mr = pMciHw->HSMCI_MR; + sdcr = pMciHw->HSMCI_SDCR; + dtor = pMciHw->HSMCI_DTOR; + cstor = pMciHw->HSMCI_CSTOR; + cfg = pMciHw->HSMCI_CFG; + pMciHw->HSMCI_CR = HSMCI_CR_SWRST ; // Reset + pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS; // Disable + pMciHw->HSMCI_MR = mr; + pMciHw->HSMCI_SDCR = sdcr; + pMciHw->HSMCI_DTOR = dtor; + pMciHw->HSMCI_CSTOR = cstor; + pMciHw->HSMCI_CFG = cfg; + } + else + { + pMciHw->HSMCI_CR = HSMCI_CR_SWRST ; // Reset + pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS; // Disable + } +} +#endif + +const char SD_NORESPONSE[] = "No response"; + +const char * sdCommand(uint32_t cmd, uint32_t arg) +{ + uint32_t i; + Hsmci *phsmci = HSMCI; + + if (CardIsConnected()) { + phsmci->HSMCI_ARGR = arg; + phsmci->HSMCI_CMDR = cmd; + + for (i = 0; i < 30000; i += 1) { + if (phsmci->HSMCI_SR & HSMCI_SR_CMDRDY) { + return 0; + } + } + return SD_NORESPONSE; + } + else { + return "No Sdcard"; + } +} + +#define SDMMC_POWER_ON_INIT (0 | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_SPCMD_INIT \ + | HSMCI_CMDR_OPDCMD ) + +const char * sdPowerOn() +{ + return sdCommand(SDMMC_POWER_ON_INIT, 0); +} + +#define SDMMC_GO_IDLE_STATE (0 | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_SPCMD_STD ) + +const char * sdCmd0() +{ + return sdCommand(SDMMC_GO_IDLE_STATE, 0); +} + +#if 0 +#define SDIO_SEND_OP_COND (5 | HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_OPDCMD ) + +const char * sdCmd5(uint32_t *pIo) +{ + const char * result = sdCommand(SDIO_SEND_OP_COND, *pIo); + if (result) + return result; + *pIo = HSMCI->HSMCI_RSPR[0]; + return 0; +} +#endif + +#define SD_SEND_IF_COND (8 | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_OPDCMD /* BSS difference */ \ + | HSMCI_CMDR_MAXLAT ) + +const char * sdCmd8(uint8_t supplyVoltage) +{ + return sdCommand(SD_SEND_IF_COND, (supplyVoltage << 8) | (0xAA)); +} + +#define SDMMC_APP_CMD (55| HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_MAXLAT) + +const char * sdCmd55() +{ + return sdCommand(SDMMC_APP_CMD, Sd_rca); +} + +#define SD_SD_SEND_OP_COND (41| HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_TRCMD_NO_DATA \ + /*| HSMCI_CMDR_OPDCMD_OPENDRAIN */ ) + +const char * sdCmd41(uint32_t arg, uint32_t * status) +{ + const char * result = sdCommand(SD_SD_SEND_OP_COND, arg); + if (result) + return result; + *status = HSMCI->HSMCI_RSPR[0]; + return 0; +} + +#define OCR_VDD_27_28 ((uint32_t)(1 << 15)) +#define OCR_VDD_28_29 ((uint32_t)(1 << 16)) +#define OCR_VDD_29_30 ((uint32_t)(1 << 17)) +#define OCR_VDD_30_31 ((uint32_t)(1 << 18)) +#define OCR_VDD_31_32 ((uint32_t)(1 << 19)) +#define OCR_VDD_32_33 ((uint32_t)(1 << 20)) +#define OCR_VDD_33_34 ((uint32_t)(1 << 21)) + +#define SDMMC_HOST_VOLTAGE_RANGE (OCR_VDD_27_28 +\ + OCR_VDD_28_29 +\ + OCR_VDD_29_30 +\ + OCR_VDD_30_31 +\ + OCR_VDD_31_32 +\ + OCR_VDD_32_33 +\ + OCR_VDD_32_33) /* not in SAM3S reference code */ + +#define OCR_SD_CCS (1UL << 30) + +#define OCR_POWER_UP_BUSY (1UL << 31) + +const char * sdMemInit(uint8_t hcs, uint32_t *pCCS) +{ + const char * result; + uint32_t arg; + uint32_t status; + do { + result = sdCmd55(); + if (result) + return result; + arg = SDMMC_HOST_VOLTAGE_RANGE; + if (hcs) arg |= OCR_SD_CCS; + result = sdCmd41(arg, &status); + if (result) + return result; + *pCCS = (status & OCR_SD_CCS); + } while ((status & OCR_POWER_UP_BUSY) != OCR_POWER_UP_BUSY); + return 0; +} + +// Get Card ID +const char * sdCmd2() +{ + const char * result = sdCommand(0x00001082, 0); + if (result) + return result; + + Hsmci *phsmci = HSMCI ; + Card_ID[0] = phsmci->HSMCI_RSPR[0] ; + Card_ID[1] = phsmci->HSMCI_RSPR[1] ; + Card_ID[2] = phsmci->HSMCI_RSPR[2] ; + Card_ID[3] = phsmci->HSMCI_RSPR[3] ; + return 0; +} + +// Get new RCA +const char * sdCmd3() +{ + const char * result = sdCommand(0x00001043, 0); + if (result) + return result; + Sd_rca = HSMCI->HSMCI_RSPR[0]; + return 0; +} + +// Get CSD +const char * sdCmd9() +{ + const char * result = sdCommand(0x00001089, Sd_rca); + if (result) + return result; + + Hsmci *phsmci = HSMCI ; + Card_CSD[0] = phsmci->HSMCI_RSPR[0] ; + Card_CSD[1] = phsmci->HSMCI_RSPR[1] ; + Card_CSD[2] = phsmci->HSMCI_RSPR[2] ; + Card_CSD[3] = phsmci->HSMCI_RSPR[3] ; + return 0; +} + +/** Cmd7 MCI, ac, R1/R1b */ +#define SDMMC_SELECT_CARD (7 | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_RSPTYP_R1B \ + | HSMCI_CMDR_MAXLAT /* TODO not the same */ ) + +const char * sdCmd7() +{ + return sdCommand(SDMMC_SELECT_CARD, Sd_rca); +} + +#define SD_SEND_SCR (51 | HSMCI_CMDR_SPCMD_STD | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_TRCMD_START_DATA | HSMCI_CMDR_TRDIR_READ \ + | HSMCI_CMDR_TRTYP_SINGLE | HSMCI_CMDR_MAXLAT) + +#define SDMMC_SET_BLOCKLEN (16 | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_MAXLAT_64 ) + +#define SD_READ_SINGLE_BLOCK (17 | HSMCI_CMDR_SPCMD_STD | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_TRCMD_START_DATA | HSMCI_CMDR_TRDIR_READ \ + | HSMCI_CMDR_TRTYP_SINGLE | HSMCI_CMDR_MAXLAT) + +#define SD_WRITE_SINGLE_BLOCK (24 | HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_TRCMD_START_DATA \ + | HSMCI_CMDR_TRDIR_WRITE \ + | HSMCI_CMDR_TRTYP_SINGLE \ + | HSMCI_CMDR_MAXLAT) + +// Get SCR +const char * sdAcmd51() +{ + const char * result; + result = sdCmd55(); + if (result) + return result; + + Hsmci *phsmci = HSMCI ; + // Block size = 64/ 8, nblocks = 1 + phsmci->HSMCI_BLKR = ( ( 64 / 8 ) << 16 ) | 1 ; + phsmci->HSMCI_ARGR = 0 ; + phsmci->HSMCI_CMDR = SD_SEND_SCR ; + + uint8_t scrLen = 0; + uint32_t i; + for ( i = 0 ; i < 50000 ; i += 1 ) { + if ( phsmci->HSMCI_SR & HSMCI_SR_RXRDY ) + Card_SCR[scrLen++] = __REV(phsmci->HSMCI_RDR) ; + if ( ( phsmci->HSMCI_SR & ( HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE ) ) == ( HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE ) ) + return 0; + } + return "No response"; +} + +#define SD_SET_BUS_WIDTH (6 | HSMCI_CMDR_SPCMD_STD | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_MAXLAT) + +void sdEnableHsMode(uint8_t enable) +{ + Hsmci *phsmci = HSMCI; + if (enable) + phsmci->HSMCI_CFG |= HSMCI_CFG_HSMODE; + else + phsmci->HSMCI_CFG &= ~HSMCI_CFG_HSMODE; +} + +void sdSetBusWidth(uint32_t busWidth) +{ + Hsmci *phsmci = HSMCI; + phsmci->HSMCI_SDCR = (HSMCI->HSMCI_SDCR & ~HSMCI_SDCR_SDCBUS_Msk) | busWidth; +} + +// Set bus width to 4 bits, set speed to 9 MHz +const char * sdAcmd6() +{ + const char * result; + result = sdCmd55() ; + if (result) + return result; + + result = sdCommand(SD_SET_BUS_WIDTH, 2); + if (result) + return result; + + sdSetBusWidth( HSMCI_SDCR_SDCBUS_4 ) ; + sdSetSpeed(9000000); + return 0; +} + +#if 0 +/** SDIO CMD52, R5 */ +#define SDIO_IO_RW_DIRECT (52| HSMCI_CMDR_SPCMD_STD \ + | HSMCI_CMDR_TRCMD_NO_DATA \ + | HSMCI_CMDR_RSPTYP_48_BIT \ + | HSMCI_CMDR_MAXLAT) + +static const char * sdCmd52(uint8_t wrFlag, + uint8_t funcNb, + uint8_t rdAfterWr, + uint32_t addr, + uint32_t *status) +{ + typedef struct + { + uint32_t data:8, /**< [ 7: 0] data for writing */ + stuff0:1, /**< [ 8] reserved */ + regAddress:17, /**< [25: 9] register address */ + stuff1:1, /**< [ 26] reserved */ + rawFlag:1, /**< [ 27] Read after Write flag */ + functionNum:3, /**< [30:28] Number of the function */ + rwFlag:1; /**< [ 31] Direction, 1:write, 0:read. */ + } SdioCmd52Arg; + + SdioCmd52Arg pArg52; + pArg52.rwFlag = wrFlag; + pArg52.functionNum = funcNb; + pArg52.rawFlag = rdAfterWr; + pArg52.regAddress = addr; + + const char * result = sdCommand(SDIO_IO_RW_DIRECT, *(uint32_t*)&pArg52); + if (result) + return result; + *status = HSMCI->HSMCI_RSPR[0]; + return 0; +} +#endif + +const char * sdSwReset(uint32_t retry) +{ + uint32_t i; + const char * result = 0; + + for (i = 0; i < retry; i++) { + result = sdCmd0(0); + if (result != SD_NORESPONSE) + break; + } + return result; +} + +/** + * \brief Run the SD/MMC/SDIO Mode initialization sequence. + * This function runs the initialization procedure and the identification + * process. Then it leaves the card in ready state. The following procedure must + * check the card type and continue to put the card into tran(for memory card) + * or cmd(for io card) state for data exchange. + * \param pSd Pointer to a SD card driver instance. + * \return 0 if successful; otherwise returns an \ref sdmmc_rc "SD_ERROR code". + */ + +#define SDIO_CIA 0 /**< SDIO Function 0 (CIA) */ +#define SDIO_IOA_REG 0x06 /**< I/O Abort */ + +/** SDIO state (in R5) */ +#define SDIO_R5_ERROR (1UL << 11)/**< General error */ +#define SDIO_R5_FUNC_NUM (1UL << 10)/**< Invalid function number */ +#define SDIO_R5_OUT_OF_RANGE (1UL << 9) /**< Argument out of range */ + +/** Status bits mask for SDIO R5 */ +#define STATUS_SDIO_R5 (0/*SDIO_R5_STATE*/ \ + | SDIO_R5_ERROR \ + | SDIO_R5_FUNC_NUM \ + | SDIO_R5_OUT_OF_RANGE) + + +#define OCR_SDIO_MP (1UL << 27) +#define OCR_SDIO_NF (7UL << 28) + +#if 0 +const char * sdIdentify() +{ + uint8_t mem = 0, io = 0, f8 = 0, mp = 1; + uint32_t status, ccs=0; + const char * result; + + /* Reset HC to default HS and BusMode */ + sdEnableHsMode(0); + sdSetBusWidth(HSMCI_SDCR_SDCBUS_1); + +#if 0 + /* Reset SDIO: CMD52, write 1 to RES bit in CCCR (bit 3 of register 6) */ + result = sdCmd52(1, SDIO_CIA, 0, SDIO_IOA_REG, &status); + if (result) + return result; + if (status & STATUS_SDIO_R5) + return "Identify.52 error"; +#endif + + /* Reset MEM: CMD0 */ + result = sdSwReset(1); + if (result) + return result; + + /* CMD8 is newly added in the Physical Layer Specification Version 2.00 to + * support multiple voltage ranges and used to check whether the card + * supports supplied voltage. The version 2.00 host shall issue CMD8 and + * verify voltage before card initialization. + * The host that does not support CMD8 shall supply high voltage range... */ + result = sdCmd8(1); + if (result == 0) f8 = 1; + else if (result == SD_NORESPONSE) CoTickDelay(1); /* 2ms delay after "no response" */ + else return "Identify.8 error"; + +#if 0 + /* CMD5 is newly added for SDIO initialize & power on */ + status = 0; + result = sdCmd5(&status); + if (!result && (status & OCR_SDIO_NF) > 0) { + unsigned int cmd5Retries = 10000; + do { + status &= SDMMC_HOST_VOLTAGE_RANGE; + result = sdCmd5(&status); + if (status & OCR_POWER_UP_BUSY) break; + } while(!result && cmd5Retries --); + if (result) + return "Identify.5 error"; + io = 1; + /* IO only ?*/ + mp = ((status & OCR_SDIO_MP) > 0); + } +#endif + + /* Has memory: SD/MMC/COMBO */ + /*if (mp) */ + { + /* Try SD memory initialize */ + result = sdMemInit(f8, &ccs); + if (result) { + //unsigned int cmd1Retries = 10000; + /* Try MMC initialize */ + result = sdSwReset(10); + if (result) + return "Reset error"; + /* TODO ccs = 1; + do { result = sdCmd1(&ccs); } while(result && cmd1Retries -- > 0); + if (error) { + TRACE_ERROR("SdMmcIdentify.Cmd1: %u\n\r", error); + return SDMMC_ERROR; + } + else if (ccs) cardType = CARD_MMCHD; + else cardType = CARD_MMC; + */ + return "TODO error"; + /* MMC card identification OK */ + return 0; + } + // mem = 1; + } + /* SD(IO) + MEM ? */ + /* if (!mem) { + if (io) cardType = CARD_SDIO; + else + return "Unknown SD"; + } */ + /* SD(HC) combo */ + /*else if (io) + cardType = ccs ? CARD_SDHCCOMBO : CARD_SDCOMBO;*/ + /* SD(HC) */ + //else + cardType = ccs ? CARD_SDHC : CARD_SD; + + return 0; +} + +const char * sdEnum() +{ + uint8_t mem , io; + const char * result; + uint32_t ioSpeed = 0, memSpeed = 0; + uint8_t hsExec = 0, bwExec = 0; + + /* - has Memory/IO/High-Capacity - */ + mem = ((cardType & CARD_TYPE_bmSDMMC) > 0); + io = ((cardType & CARD_TYPE_bmSDIO) > 0); + + /* For MEMORY cards: + * The host then issues the command ALL_SEND_CID (CMD2) to the card to get + * its unique card identification (CID) number. + * Card that is unidentified (i.e. which is in Ready State) sends its CID + * number as the response (on the CMD line). */ + if (mem) { + result = sdCmd2(); + if (result) + return result; + } + + /* For MEMORY and SDIO cards: + * Thereafter, the host issues CMD3 (SEND_RELATIVE_ADDR) asks the + * card to publish a new relative card address (RCA), which is shorter than + * CID and which is used to address the card in the future data transfer + * mode. Once the RCA is received the card state changes to the Stand-by + * State. At this point, if the host wants to assign another RCA number, it + * can ask the card to publish a new number by sending another CMD3 command + * to the card. The last published RCA is the actual RCA number of the + * card. */ + result = sdCmd3(); + if (result) + return result; + + /* For MEMORY cards: + * SEND_CSD (CMD9) to obtain the Card Specific Data (CSD register), + * e.g. block length, card storage capacity, etc... */ + if (mem) { + result = sdCmd9(); + if (result) + return result; + } + + /* Now select the card, to TRAN state */ + error = MmcSelectCard(pSd, pSd->cardAddress, 0); + if (error) { + TRACE_ERROR("SdMmcInit.SelCard(%d)\n\r", error); + return error; + } + + /* - Now in TRAN, obtain extended setup information - */ + + /* If the card support EXT_CSD, read it! */ + TRACE_INFO("Card Type %d, CSD_STRUCTURE %d\n\r", + pSd->cardType, SD_CSD_STRUCTURE(pSd)); + + /* Get extended information of the card */ + SdMmcUpdateInformation(pSd, 0, 1); + + /* Calculate transfer speed */ + if (io) ioSpeed = SdioGetMaxSpeed(pSd); + if (mem) memSpeed = SdmmcGetMaxSpeed(pSd); + /* Combo, min speed */ + if (io && mem) { + pSd->transSpeed = (ioSpeed > memSpeed) ? memSpeed : ioSpeed; + } + /* SDIO only */ + else if (io) { + pSd->transSpeed = ioSpeed; + } + /* Memory card only */ + else if (mem) { + pSd->transSpeed = memSpeed; + } + pSd->transSpeed *= 1000; + + /* Enable more bus width Mode */ + error = SdMmcDesideBuswidth(pSd); + if (!error) bwExec = 1; + else if (error != SDMMC_ERROR_NOT_SUPPORT) { + TRACE_ERROR("SdmmcEnum.DesideBusWidth: %u\n\r", error); + return SDMMC_ERROR; + } + + /* Enable High-Speed Mode */ + error = SdMmcEnableHighSpeed(pSd); + if (!error) hsExec = 1; + else if (error != SDMMC_ERROR_NOT_SUPPORT) { + TRACE_ERROR("SdmmcEnum.EnableHS: %u\n\r", error); + return SDMMC_ERROR; + } + + /* In HS mode transfer speed *2 */ + if (hsExec) pSd->transSpeed *= 2; + + /* Update card information since status changed */ + if (bwExec || hsExec) SdMmcUpdateInformation(pSd, hsExec, 1); + return 0; +} + +void sdInit() +{ + const char * result; + uint8_t i; + + /* Clear CID, CSD, EXT_CSD data */ + for (i = 0; i < 4; i++) Card_ID[i] = 0; + for (i = 0; i < 4; i++) Card_CSD[i] = 0; + // TODO for (i = 0; i < 512/4; i++) pSd->extData[i] = 0; + + /* Set low speed for device identification (LS device max speed) */ + sdSetSpeed(400000); + + /* Initialization delay: The maximum of 1 msec, 74 clock cycles and supply + * ramp up time. Supply ramp up time provides the time that the power is + * built up to the operating level (the bus master supply voltage) and the + * time to wait until the SD card can accept the first command. + */ + + /* Power On Init Special Command */ + result = sdPowerOn(); + if (result) + return; + + /* After power-on or CMD0, all cards? + * CMD lines are in input mode, waiting for start bit of the next command. + * The cards are initialized with a default relative card address + * (RCA=0x0000) and with a default driver stage register setting + * (lowest speed, highest driving current capability). + */ + result = sdIdentify(); + if (result) { + return; + } + +#if 0 + result = sdEnum(); + if (result) { + return; + } + + /* In the case of a Standard Capacity SD Memory Card, this command sets the + * block length (in bytes) for all following block commands + * (read, write, lock). + * Default block length is fixed to 512 Bytes. + * Set length is valid for memory access commands only if partial block read + * operation are allowed in CSD. + * In the case of a High Capacity SD Memory Card, block length set by CMD16 + * command does not affect the memory read and write commands. Always 512 + * Bytes fixed block length is used. This command is effective for + * LOCK_UNLOCK command. + * In both cases, if block length is set larger than 512Bytes, the card sets + * the BLOCK_LEN_ERROR bit. */ + if (pSd->cardType == CARD_SD) { + error = Cmd16(pSd, SDMMC_BLOCK_SIZE); + if (error) { + pSd->optCmdBitMap &= ~SD_CMD16_SUPPORT; + TRACE_INFO("SD_Init.Cmd16 (%d)\n\r", error); + TRACE_INFO("Fail to set BLK_LEN, default is 512\n\r"); + } + } + + /* Reset status for R/W */ + pSd->state = SD_STATE_READY; + + /* If MMC Card & get size from EXT_CSD */ + if ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmMMC + && SD_CSD_C_SIZE(pSd) == 0xFFF) { + pSd->blockNr = SD_EXTCSD_BLOCKNR(pSd); + /* Block number less than 0x100000000/512 */ + if (pSd->blockNr > 0x800000) + pSd->totalSize = 0xFFFFFFFF; + else + pSd->totalSize = SD_EXTCSD_TOTAL_SIZE(pSd); + } + /* If SD CSD v2.0 */ + else if((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmSD + && SD_CSD_STRUCTURE(pSd) >= 1) { + pSd->blockNr = SD_CSD_BLOCKNR_HC(pSd); + pSd->totalSize = 0xFFFFFFFF; + } + /* Normal SD/MMC card */ + else if (pSd->cardType & CARD_TYPE_bmSDMMC) { + pSd->totalSize = SD_CSD_TOTAL_SIZE(pSd); + pSd->blockNr = SD_CSD_BLOCKNR(pSd); + } + + if (pSd->cardType == CARD_UNKNOWN) { + return SDMMC_ERROR_NOT_INITIALIZED; + } + /* Automatically select the max clock */ + clock = SdmmcSetSpeed(pSd, pSd->transSpeed); + TRACE_WARNING_WP("-I- Set SD/MMC clock to %dK\n\r", clock/1000); + pSd->accSpeed = clock; +#endif +} +#endif + +uint8_t sdErrorCount = 0; +FATFS g_FATFS_Obj; +void retrieveAvailableAudioFiles(); + +void sdPoll10mS() +{ + if (!Card_initialized) + return; + + if (!CardIsConnected()) { + Card_state = SD_ST_EMPTY; + Sd_rca = 0; + sdErrorCount = 0; + } + + switch (Card_state) { + case SD_ST_EMPTY: + if (CardIsConnected()) { + Card_state = SD_ST_INIT1; + } + break; + + case SD_ST_INIT1: + sdCmd0(); + Card_state = SD_ST_INIT2; + break; + + case SD_ST_INIT2: + sdCmd8(1); + Card_state = SD_ST_IDLE; + break; + + case SD_ST_IDLE: + sdMemInit(1, &Cmd_A41_resp); + Card_state = SD_ST_READY; + break; + + case SD_ST_READY: + if (!sdCmd2()) Card_state = SD_ST_IDENT; + break; + + case SD_ST_IDENT: + if (!sdCmd3()) Card_state = SD_ST_STBY; + break; + + case SD_ST_STBY: + sdCmd9(); + sdCmd7(); // Select Card + Card_state = SD_ST_TRAN; + break; + + case SD_ST_TRAN: + sdAcmd51(); + sdAcmd6(); // Set bus width to 4 bits, and speed to 9 MHz + // Should check the card can do this **** + Card_state = SD_ST_DATA; + break; + + case SD_ST_DATA: + if (f_mount(0, &g_FATFS_Obj) == FR_OK) { + retrieveAvailableAudioFiles(); + Card_state = SD_ST_MOUNTED; + } + break; + + case SD_ST_ERR: + break; + } +} + +void sdInit() +{ + Sd_rca = 0; + sdErrorCount = 0; + + if (!CardIsConnected()) { + Card_state = SD_ST_EMPTY; + Card_initialized = 1; + return; + } + + sdCmd0(); + CoTickDelay(5); // 10ms + sdCmd8(1); + sdMemInit(1, &Cmd_A41_resp); + + uint8_t retry; + for (retry=0; retry<10; retry++) { + if (!sdCmd2()) break; + CoTickDelay(1); // 2ms + } + + if (retry == 10) { + Card_state = SD_ST_READY; + Card_initialized = 1; + return; + } + + for (retry=0; retry<10; retry++) { + if (!sdCmd3()) break; + CoTickDelay(1); // 2ms + } + + if (retry == 10) { + Card_state = SD_ST_IDENT; + Card_initialized = 1; + return; + } + + sdCmd9(); + sdCmd7(); // Select Card + + sdAcmd51(); + sdAcmd6(); // Set bus width to 4 bits, and speed to 9 MHz + + // Should check the card can do this **** + Card_state = SD_ST_DATA; + + if (f_mount(0, &g_FATFS_Obj) == FR_OK) { + retrieveAvailableAudioFiles(); + Card_state = SD_ST_MOUNTED; + } + + Card_initialized = 1; +} + +// Checks for card ready for read/write +// returns 1 for YES, 0 for NO +uint32_t sd_card_ready( void ) +{ + return CardIsConnected() && Card_state >= SD_ST_DATA; +} + +uint32_t sd_card_mounted( void ) +{ + return CardIsConnected() && Card_state == SD_ST_MOUNTED; +} + +uint32_t sd_cmd16() +{ +#if 0 + Hsmci *phsmci = HSMCI; + + if (CardIsConnected()) { + phsmci->HSMCI_BLKR = ( ( 512 ) << 16 ) | 1 ; + phsmci->HSMCI_ARGR = 512; + phsmci->HSMCI_CMDR = SDMMC_SET_BLOCKLEN; + + while(1) { + if (phsmci->HSMCI_SR & HSMCI_SR_CMDRDY) { + break; + } + } + return phsmci->HSMCI_RSPR[0]; + } + else { + return 0; + } +#else + return 0; +#endif +} + +uint32_t sd_read_block(uint32_t block_no, uint32_t *data) +{ + uint32_t result = 0; + Hsmci *phsmci = HSMCI; + int32_t retry; + + if (sd_card_ready()) { + sd_cmd16(); + // Block size = 512, nblocks = 1 + phsmci->HSMCI_BLKR = ((512) << 16) | 1; + phsmci->HSMCI_MR = (phsmci->HSMCI_MR & (~(HSMCI_MR_BLKLEN_Msk|HSMCI_MR_FBYTE))) | (HSMCI_MR_PDCMODE|HSMCI_MR_WRPROOF|HSMCI_MR_RDPROOF) | (512 << 16); + phsmci->HSMCI_ARGR = (Cmd_A41_resp & OCR_SD_CCS ? block_no : (block_no << 9)); + phsmci->HSMCI_RPR = (uint32_t)data; + phsmci->HSMCI_RCR = 512 / 4; + phsmci->HSMCI_PTCR = HSMCI_PTCR_RXTEN; + phsmci->HSMCI_CMDR = SD_READ_SINGLE_BLOCK; + + retry = 500; + while (--retry >= 0) { + CoTickDelay(1); // 2ms + if (phsmci->HSMCI_SR & HSMCI_SR_ENDRX) { + result = 1; + break; + } + } + } + + phsmci->HSMCI_MR &= ~(uint32_t)HSMCI_MR_PDCMODE; + /* Disable PDC */ + phsmci->HSMCI_PTCR = HSMCI_PTCR_RXTDIS | HSMCI_PTCR_TXTDIS; + + return result; +} + +uint32_t sd_write_block( uint32_t block_no, uint32_t *data ) +{ + uint32_t result = 0; + Hsmci *phsmci = HSMCI; + int32_t retry; + + if (sd_card_ready()) { + + // TRACE_ERROR("Sector %d ", block_no); + + retry = 500; + while (--retry >= 0) { + if (phsmci->HSMCI_SR & HSMCI_SR_NOTBUSY) { + break; + } + CoTickDelay(1); // 2ms + } + + if (retry >= 0) { + sd_cmd16(); + + // Block size = 512, nblocks = 1 + phsmci->HSMCI_BLKR = ((512) << 16) | 1; + phsmci->HSMCI_MR = (phsmci->HSMCI_MR & (~(HSMCI_MR_BLKLEN_Msk|HSMCI_MR_FBYTE))) | (HSMCI_MR_PDCMODE|HSMCI_MR_WRPROOF|HSMCI_MR_RDPROOF) | (512 << 16); + phsmci->HSMCI_ARGR = (Cmd_A41_resp & OCR_SD_CCS ? block_no : (block_no << 9)); + phsmci->HSMCI_TPR = (uint32_t)data; + phsmci->HSMCI_TCR = 512 / 4; + phsmci->HSMCI_TNCR = 0; + phsmci->HSMCI_CMDR = SD_WRITE_SINGLE_BLOCK; + phsmci->HSMCI_PTCR = HSMCI_PTCR_TXTEN; + + retry = 500; + while (--retry >= 0) { + CoTickDelay(1); // 2ms + if (phsmci->HSMCI_SR & HSMCI_SR_NOTBUSY) { + result = 1; + break; + } + } + + if (retry < 0) { + TRACE_ERROR("ko (data=%d)\n\r", (uint32_t)data); + } + else { + TRACE_ERROR("ok\n\r"); + } + } + else { + TRACE_ERROR("wait ko\n\r"); + } + } + + /* Disable PDC */ + phsmci->HSMCI_PTCR = HSMCI_PTCR_RXTDIS | HSMCI_PTCR_TXTDIS; + + phsmci->HSMCI_MR &= ~(uint32_t)HSMCI_MR_PDCMODE; + + return result; +} + +/* + Notes on SD card: + +1) CMD8 fails and CMD58 fails: must be MMC, thus initialize using CMD1 +2) CMD8 fails and CMD58 passes: must be Ver1.x Standard Capacity SD Memory Card +3) CMD8 passes and CMD58 passes (CCS = 0): must be Ver2.00 or later Standard Capacity SD Memory Card +4) CMD8 passes and CMD58 passes (CCS = 1): must be Ver2.00 or later High Capacity SD Memory Card +5) CMD8 passes and CMD58 passes but indicates non compatible voltage range: unusable card + +On card present +1. Send CMD 55 (resp 48bit) + followed by ACMD41 (resp48bit) + until bit 31 of response is '1' + +2. Send CMD 2 (resp 136bit) - card ID + +3. Send CMD 3 (resp 48 bit) - new RCA returned + +4. Send CMD 9 (resp 136) - CSD + +5. Send CMD 7 (resp 48) - + +6. Send CMD 55 (resp 48bit) + followed by ACMD51 (resp48bit) - SCR stored as 2 32 bit values + +Now decide what the card can do! + +7. Set block length + +8. Set bus width + +9. Read block 0 + +*/ + +/*-----------------------------------------------------------------------*/ +/* Initialize Disk Drive */ +/*-----------------------------------------------------------------------*/ + +DSTATUS disk_initialize ( + BYTE drv /* Physical drive nmuber (0) */ + ) +{ + if (drv) return STA_NOINIT; /* Supports only single drive */ + if ( sd_card_ready() == 0 ) return RES_NOTRDY; + return RES_OK; + +#if 0 + BYTE n, cmd, ty, ocr[4]; + + + if (drv) return STA_NOINIT; /* Supports only single drive */ + + if (Stat & STA_NODISK) return Stat; /* No card in the socket */ + + power_on(); /* Force socket power on */ + FCLK_SLOW(); + for (n = 10; n; n--) rcvr_spi(); /* 80 dummy clocks */ + + ty = 0; + if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */ + Timer1 = 100; /* Initialization timeout of 1000 msec */ + if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */ + for (n = 0; n < 4; n++) ocr[n] = rcvr_spi(); /* Get trailing return value of R7 resp */ + if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */ + while (Timer1 && send_cmd(ACMD41, 1UL << 30)); /* Wait for leaving idle state (ACMD41 with HCS bit) */ + if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */ + for (n = 0; n < 4; n++) ocr[n] = rcvr_spi(); + ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* SDv2 */ + } + } + } else { /* SDv1 or MMCv3 */ + if (send_cmd(ACMD41, 0) <= 1) { + ty = CT_SD1; cmd = ACMD41; /* SDv1 */ + } else { + ty = CT_MMC; cmd = CMD1; /* MMCv3 */ + } + while (Timer1 && send_cmd(cmd, 0)); /* Wait for leaving idle state */ + if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */ + ty = 0; + } + } + CardType = ty; + deselect(); + + if (ty) { /* Initialization succeded */ + Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */ + FCLK_FAST(); + } else { /* Initialization failed */ + power_off(); + } + + return Stat; +#endif } /*-----------------------------------------------------------------------*/ -/* Return Disk Status */ +/* Get Disk Status */ /*-----------------------------------------------------------------------*/ DSTATUS disk_status ( - BYTE drv /* Physical drive number (0..) */ -) + BYTE drv /* Physical drive number (0) */ + ) { - DSTATUS stat = STA_NOINIT; - - switch (drv) - { - default: - stat = 0; // ok - break; - } - - return stat; + if (drv) return STA_NOINIT; /* Supports only single drive */ + if ( sd_card_ready() == 0 ) return RES_NOTRDY; + return RES_OK; } /*-----------------------------------------------------------------------*/ @@ -86,278 +1202,219 @@ DSTATUS disk_status ( /*-----------------------------------------------------------------------*/ DRESULT disk_read ( - BYTE drv, /* Physical drive number (0..) */ - BYTE *buff, /* Data buffer to store read data */ - DWORD sector, /* Sector address (LBA) */ - BYTE count /* Number of sectors to read (1..255) */ -) + BYTE drv, /* Physical drive nmuber (0) */ + BYTE *buff, /* Pointer to the data buffer to store read data */ + DWORD sector, /* Start sector number (LBA) */ + BYTE count /* Sector count (1..255) */ + ) { - unsigned char result; - DRESULT res = RES_ERROR; + uint32_t result ; + if (drv || !count) return RES_PARERR; - TRACE_ERROR("MED_Read drv=%d sector=%d count=%d\n\r", drv, sector, count); + if ( sd_card_ready() == 0 ) return RES_NOTRDY; - unsigned int addr, len; - if (medias[drv].blockSize < SECTOR_SIZE_DEFAULT) - { - addr = sector * (SECTOR_SIZE_DEFAULT / medias[drv].blockSize); - len = count * (SECTOR_SIZE_DEFAULT / medias[drv].blockSize); - } - else - { - addr = sector; - len = count; - } + do { + result = sd_read_block( sector, ( uint32_t *)buff ) ; + if (result) { + sector += 1 ; + buff += 512 ; + count -= 1 ; + } + else { + count = 1 ; // Flag error + break ; + } + } while ( count ) ; - result = MED_Read(&medias[drv], addr, (void*)buff, len, NULL, NULL); + if (!count) + return RES_OK; - if( result == MED_STATUS_SUCCESS ) - { - res = RES_OK; - } - else - { - TRACE_ERROR("MED_Read pb: 0x%X\n\r", result); - res = RES_ERROR; - } - return res; + if (++sdErrorCount > 3) + Card_state = SD_ST_ERR; + + return RES_ERROR; } + /*-----------------------------------------------------------------------*/ /* Write Sector(s) */ /*-----------------------------------------------------------------------*/ -/* The FatFs module will issue multiple sector transfer request -/ (count > 1) to the disk I/O layer. The disk function should process -/ the multiple sector transfer properly Do. not translate it into -/ multiple single sector transfers to the media, or the data read/write -/ performance may be drasticaly decreased. */ -#if _READONLY == 0 DRESULT disk_write ( - BYTE drv, /* Physical drive number (0..) */ - const BYTE *buff, /* Data to be written */ - DWORD sector, /* Sector address (LBA) */ - BYTE count /* Number of sectors to write (1..255) */ -) + BYTE drv, /* Physical drive nmuber (0) */ + const BYTE *buff, /* Pointer to the data to be written */ + DWORD sector, /* Start sector number (LBA) */ + BYTE count /* Sector count (1..255) */ + ) { - DRESULT res=RES_PARERR; - unsigned int result; - void * tmp; - tmp = (void *) buff; + uint32_t result ; - unsigned int addr, len; - if (medias[drv].blockSize < SECTOR_SIZE_DEFAULT) - { - addr = sector * (SECTOR_SIZE_DEFAULT / medias[drv].blockSize); - len = count * (SECTOR_SIZE_DEFAULT / medias[drv].blockSize); - } - else - { - addr = sector; - len = count; - } + if (drv || !count) return RES_PARERR; - result = MED_Write(&medias[drv], addr, (void*)tmp, len, NULL, NULL); + if ( sd_card_ready() == 0 ) return RES_NOTRDY; - if( result == MED_STATUS_SUCCESS ) - { - res = RES_OK; - } - else - { - TRACE_ERROR("MED_Write pb: 0x%X\n\r", result); - res = RES_ERROR; - } + // TODO if (Stat & STA_PROTECT) return RES_WRPRT; - return res; + do { + result = sd_write_block( sector, ( uint32_t *)buff ) ; + if (result) { + sector += 1 ; + buff += 512 ; + count -= 1 ; + } + else { + count = 1 ; // Flag error + break ; + } + } while ( count ) ; + + if (!count) + return RES_OK; + + if (++sdErrorCount > 3) + Card_state = SD_ST_ERR; + + return RES_ERROR; } -#endif /* _READONLY */ + + /*-----------------------------------------------------------------------*/ /* Miscellaneous Functions */ -// Command Description -// -//CTRL_SYNC Make sure that the disk drive has finished pending write process. -// When the disk I/O module has a write back cache, flush the dirty sector immediately. -// In read-only configuration, this command is not needed. -// -//GET_SECTOR_COUNT Returns total sectors on the drive into the DWORD variable pointed by Buffer. -// This command is used in only f_mkfs function. -// -//GET_BLOCK_SIZE Returns erase block size of the memory array in unit -// of sector into the DWORD variable pointed by Buffer. -// When the erase block size is unknown or magnetic disk device, return 1. -// This command is used in only f_mkfs function. /*-----------------------------------------------------------------------*/ DRESULT disk_ioctl ( - BYTE drv, /* Physical drive number (0..) */ - BYTE ctrl, /* Control code */ - void *buff /* Buffer to send/receive control data */ -) + BYTE drv, /* Physical drive nmuber (0) */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive control data */ + ) { - DRESULT res=RES_PARERR; + DRESULT res; + BYTE *csd = (BYTE*)&Card_CSD[0]; + BYTE n; // csd[16], *ptr = buff; + WORD csize; - switch (drv) - { + if (drv) return RES_PARERR; + + res = RES_ERROR; + + if (ctrl == CTRL_POWER) { #if 0 - case DRV_SDRAM : - switch (ctrl) - { - case GET_BLOCK_SIZE: - *(DWORD*)buff = 1; - res = RES_OK; - break; - - case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ - if (medias[DRV_SDRAM].blockSize < SECTOR_SIZE_DEFAULT) - { - *(DWORD*)buff = (DWORD)(medias[DRV_SDRAM].size / - (SECTOR_SIZE_DEFAULT / - medias[DRV_SDRAM].blockSize)); + switch (ptr[0]) { + case 0: /* Sub control code (POWER_OFF) */ + power_off(); /* Power off */ + res = RES_OK; + break; + case 1: /* Sub control code (POWER_GET) */ + ptr[1] = (BYTE)power_status(); + res = RES_OK; + break; + default : + res = RES_PARERR; } - else - { - *(DWORD*)buff = (DWORD)(medias[DRV_SDRAM].size); - } - res = RES_OK; - break; - - case GET_SECTOR_SIZE : /* Get sectors on the disk (WORD) */ - if (medias[DRV_SDRAM].blockSize < SECTOR_SIZE_DEFAULT) - { - *(WORD*)buff = SECTOR_SIZE_DEFAULT; - } - else - { - *(WORD*)buff = medias[DRV_SDRAM].blockSize; - } - res = RES_OK; - break; - - case CTRL_SYNC : /* Make sure that data has been written */ - res = RES_OK; - break; - - default: - res = RES_PARERR; - } - break; #endif - default: - // case DRV_MMC : - switch (ctrl) - { - case GET_BLOCK_SIZE: - *(DWORD*)buff = 1; - res = RES_OK; - break; - - case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ - if (medias[DRV_SDMMC].blockSize < SECTOR_SIZE_DEFAULT) - { - *(DWORD*)buff = (DWORD)(medias[DRV_SDMMC].size / - (SECTOR_SIZE_DEFAULT / - medias[DRV_SDMMC].blockSize)); - } - else - { - *(DWORD*)buff = (DWORD)(medias[DRV_SDMMC].size); - } - res = RES_OK; - break; - - case GET_SECTOR_SIZE : /* Get sectors on the disk (WORD) */ - if (medias[DRV_SDMMC].blockSize < SECTOR_SIZE_DEFAULT) - { - *(WORD*)buff = SECTOR_SIZE_DEFAULT; - } - else - { - *(WORD*)buff = medias[DRV_SDMMC].blockSize; - } - res = RES_OK; - break; - - case CTRL_SYNC : /* Make sure that data has been written */ - res = RES_OK; - break; - - default: - res = RES_PARERR; - break; } - break; + else { + switch (ctrl) { + case CTRL_SYNC : /* Make sure that no pending write process. Do not remove this or written sector might not left updated. */ + /* BSS if (select()) { + deselect(); */ + res = RES_OK; + // } + break; + + case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ + // if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { + if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */ + csize = csd[9] + ((WORD)csd[8] << 8) + 1; + *(DWORD*)buff = (DWORD)csize << 10; + } else { /* SDC ver 1.XX or MMC*/ + n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2; + csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1; + *(DWORD*)buff = (DWORD)csize << (n - 9); + } + res = RES_OK; + // } + break; + + case GET_SECTOR_SIZE : /* Get R/W sector size (WORD) */ + *(WORD*)buff = 512; + res = RES_OK; + break; + + case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */ + // only used in f_mkfs #if 0 - case DRV_NAND : - switch (ctrl) - { - case GET_BLOCK_SIZE: - *(DWORD*)buff = 1; - res = RES_OK; - break; - - case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ - if (medias[DRV_NAND].blockSize < SECTOR_SIZE_DEFAULT) - { - *(DWORD*)buff = (DWORD)(medias[DRV_NAND].size / - (SECTOR_SIZE_DEFAULT / - medias[DRV_NAND].blockSize)); - } - else - { - *(DWORD*)buff = (DWORD)(medias[DRV_NAND].size); - } - res = RES_OK; - break; - - case GET_SECTOR_SIZE : /* Get sectors on the disk (WORD) */ - if (medias[DRV_NAND].blockSize < SECTOR_SIZE_DEFAULT) - { - *(WORD*)buff = SECTOR_SIZE_DEFAULT; - } - else - { - *(WORD*)buff = medias[DRV_NAND].blockSize; - } - res = RES_OK; - break; - - case CTRL_SYNC : /* Make sure that data has been written */ - MED_Flush(&medias[DRV_NAND]); - res = RES_OK; - break; - - default: - res = RES_PARERR; - } + if (CardType & CT_SD2) { /* SDv2? */ + if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */ + rcvr_spi(); + if (rcvr_datablock(csd, 16)) { /* Read partial block */ + for (n = 64 - 16; n; n--) rcvr_spi(); /* Purge trailing data */ + *(DWORD*)buff = 16UL << (csd[10] >> 4); + res = RES_OK; + } + } + } else { /* SDv1 or MMCv3 */ + if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */ + if (CardType & CT_SD1) { /* SDv1 */ + *(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1); + } else { /* MMCv3 */ + *(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1); + } + res = RES_OK; + } + } #endif - } - return res; + break; + +#if 0 + case MMC_GET_TYPE : /* Get card type flags (1 byte) */ + *ptr = CardType; + res = RES_OK; + break; + + case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */ + if (send_cmd(CMD9, 0) == 0 /* READ_CSD */ + && rcvr_datablock(ptr, 16)) + res = RES_OK; + break; + + case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */ + if (send_cmd(CMD10, 0) == 0 /* READ_CID */ + && rcvr_datablock(ptr, 16)) + res = RES_OK; + break; + + case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */ + if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */ + for (n = 4; n; n--) *ptr++ = rcvr_spi(); + res = RES_OK; + } + break; + + case MMC_GET_SDSTAT : /* Receive SD statsu as a data block (64 bytes) */ + if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */ + rcvr_spi(); + if (rcvr_datablock(ptr, 64)) + res = RES_OK; + } + break; +#endif + default: + res = RES_PARERR; + break; + } + + // BSS deselect(); + } + + return res; } -#if 0 -//------------------------------------------------------------------------------ -/// Current time is returned with packed into a DWORD value. -/// The bit field is as follows: -/// bit31:25 Year from 1980 (0..127) -/// bit24:21 Month (1..12) -/// bit20:16 Day in month(1..31) -/// bit15:11 Hour (0..23) -/// bit10:5 Minute (0..59) -/// bit4:0 Second / 2 (0..29) -//------------------------------------------------------------------------------ -DWORD get_fattime (void) -{ - unsigned int time; - time = ((2010-1980)<<25) - | ( 9<<21) - | (15<<16) - | (17<<11) - | (45<<5) - | ((59/2)<<0); - return time; -} -#endif + + + + + diff --git a/src/ersky9x/libraries/board/at91sam3s4/AT91SAM3S4.h b/src/ersky9x/libraries/board/at91sam3s4/AT91SAM3S4.h index 63fc2918a..d2af5f483 100644 --- a/src/ersky9x/libraries/board/at91sam3s4/AT91SAM3S4.h +++ b/src/ersky9x/libraries/board/at91sam3s4/AT91SAM3S4.h @@ -207,8 +207,8 @@ typedef struct { typedef struct { WoReg ADC_CR; /**< \brief (Adc Offset: 0x00) Control Register */ RwReg ADC_MR; /**< \brief (Adc Offset: 0x04) Mode Register */ - RwReg ADC_SEQR1; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */ - RwReg ADC_SEQR2; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */ + RwReg ADC_SEQ1R; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */ + RwReg ADC_SEQ2R; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */ WoReg ADC_CHER; /**< \brief (Adc Offset: 0x10) Channel Enable Register */ WoReg ADC_CHDR; /**< \brief (Adc Offset: 0x14) Channel Disable Register */ RoReg ADC_CHSR; /**< \brief (Adc Offset: 0x18) Channel Status Register */ @@ -918,121 +918,40 @@ typedef struct { #define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ #define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */ /* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ -#define HSMCI_MR_CLKDIV_Pos 0 -#define HSMCI_MR_CLKDIV_Msk (0xffu << HSMCI_MR_CLKDIV_Pos) /**< \brief (HSMCI_MR) Clock Divider */ -#define HSMCI_MR_CLKDIV(value) ((HSMCI_MR_CLKDIV_Msk & ((value) << HSMCI_MR_CLKDIV_Pos))) -#define HSMCI_MR_PWSDIV_Pos 8 -#define HSMCI_MR_PWSDIV_Msk (0x7u << HSMCI_MR_PWSDIV_Pos) /**< \brief (HSMCI_MR) Power Saving Divider */ -#define HSMCI_MR_PWSDIV(value) ((HSMCI_MR_PWSDIV_Msk & ((value) << HSMCI_MR_PWSDIV_Pos))) -#define HSMCI_MR_RDPROOF (0x1u << 11) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_WRPROOF (0x1u << 12) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_FBYTE (0x1u << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ -#define HSMCI_MR_PADV (0x1u << 14) /**< \brief (HSMCI_MR) Padding Value */ -#define HSMCI_MR_PDCMODE (0x1u << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */ -#define HSMCI_MR_BLKLEN_Pos 16 -#define HSMCI_MR_BLKLEN_Msk (0xffffu << HSMCI_MR_BLKLEN_Pos) /**< \brief (HSMCI_MR) Data Block Length */ -#define HSMCI_MR_BLKLEN(value) ((HSMCI_MR_BLKLEN_Msk & ((value) << HSMCI_MR_BLKLEN_Pos))) +#define HSMCI_MR_CLKDIV (0xff << 0) /**< \brief (HSMCI_MR) Clock Divider */ +#define HSMCI_MR_PWSDIV (0x7 << 8) /**< \brief (HSMCI_MR) Power Saving Divider */ +#define HSMCI_MR_RDPROOF (0x1 << 11) /**< \brief (HSMCI_MR) */ +#define HSMCI_MR_WRPROOF (0x1 << 12) /**< \brief (HSMCI_MR) */ +#define HSMCI_MR_FBYTE (0x1 << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ +#define HSMCI_MR_PADV (0x1 << 14) /**< \brief (HSMCI_MR) Padding Value */ +#define HSMCI_MR_PDCMODE (0x1 << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */ +#define HSMCI_MR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_MR) Data Block Length */ /* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ -#define HSMCI_DTOR_DTOCYC_Pos 0 -#define HSMCI_DTOR_DTOCYC_Msk (0xfu << HSMCI_DTOR_DTOCYC_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ -#define HSMCI_DTOR_DTOCYC(value) ((HSMCI_DTOR_DTOCYC_Msk & ((value) << HSMCI_DTOR_DTOCYC_Pos))) -#define HSMCI_DTOR_DTOMUL_Pos 4 -#define HSMCI_DTOR_DTOMUL_Msk (0x7u << HSMCI_DTOR_DTOMUL_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ -#define HSMCI_DTOR_DTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_DTOR) DTOCYC */ -#define HSMCI_DTOR_DTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 16 */ -#define HSMCI_DTOR_DTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 128 */ -#define HSMCI_DTOR_DTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 256 */ -#define HSMCI_DTOR_DTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1024 */ -#define HSMCI_DTOR_DTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 4096 */ -#define HSMCI_DTOR_DTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 65536 */ -#define HSMCI_DTOR_DTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1048576 */ +#define HSMCI_DTOR_DTOCYC (0xf << 0) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ +#define HSMCI_DTOR_DTOMUL (0x7 << 4) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ /* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ -#define HSMCI_SDCR_SDCSEL_Pos 0 -#define HSMCI_SDCR_SDCSEL_Msk (0x3u << HSMCI_SDCR_SDCSEL_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ -#define HSMCI_SDCR_SDCSEL_SLOTA (0x0u << 0) /**< \brief (HSMCI_SDCR) Slot A is selected. */ -#define HSMCI_SDCR_SDCSEL_SLOTB (0x1u << 0) /**< \brief (HSMCI_SDCR) - */ -#define HSMCI_SDCR_SDCSEL_SLOTC (0x2u << 0) /**< \brief (HSMCI_SDCR) - */ -#define HSMCI_SDCR_SDCSEL_SLOTD (0x3u << 0) /**< \brief (HSMCI_SDCR) - */ -#define HSMCI_SDCR_SDCBUS_Pos 6 -#define HSMCI_SDCR_SDCBUS_Msk (0x3u << HSMCI_SDCR_SDCBUS_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ -#define HSMCI_SDCR_SDCBUS_1 (0x0u << 6) /**< \brief (HSMCI_SDCR) 1 bit */ -#define HSMCI_SDCR_SDCBUS_4 (0x2u << 6) /**< \brief (HSMCI_SDCR) 4 bit */ -#define HSMCI_SDCR_SDCBUS_8 (0x3u << 6) /**< \brief (HSMCI_SDCR) 8 bit */ +#define HSMCI_SDCR_SDCSEL (0x3 << 0) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ +#define HSMCI_SDCR_SDCBUS (0x3 << 6) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ /* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ #define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */ /* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ -#define HSMCI_CMDR_CMDNB_Pos 0 -#define HSMCI_CMDR_CMDNB_Msk (0x3fu << HSMCI_CMDR_CMDNB_Pos) /**< \brief (HSMCI_CMDR) Command Number */ -#define HSMCI_CMDR_CMDNB(value) ((HSMCI_CMDR_CMDNB_Msk & ((value) << HSMCI_CMDR_CMDNB_Pos))) -#define HSMCI_CMDR_RSPTYP_Pos 6 -#define HSMCI_CMDR_RSPTYP_Msk (0x3u << HSMCI_CMDR_RSPTYP_Pos) /**< \brief (HSMCI_CMDR) Response Type */ -#define HSMCI_CMDR_RSPTYP_NORESP (0x0u << 6) /**< \brief (HSMCI_CMDR) No response. */ -#define HSMCI_CMDR_RSPTYP_48_BIT (0x1u << 6) /**< \brief (HSMCI_CMDR) 48-bit response. */ -#define HSMCI_CMDR_RSPTYP_136_BIT (0x2u << 6) /**< \brief (HSMCI_CMDR) 136-bit response. */ -#define HSMCI_CMDR_RSPTYP_R1B (0x3u << 6) /**< \brief (HSMCI_CMDR) R1b response type */ -#define HSMCI_CMDR_SPCMD_Pos 8 -#define HSMCI_CMDR_SPCMD_Msk (0x7u << HSMCI_CMDR_SPCMD_Pos) /**< \brief (HSMCI_CMDR) Special Command */ -#define HSMCI_CMDR_SPCMD_STD (0x0u << 8) /**< \brief (HSMCI_CMDR) Not a special CMD. */ -#define HSMCI_CMDR_SPCMD_INIT (0x1u << 8) /**< \brief (HSMCI_CMDR) Initialization CMD:74 clock cycles for initialization sequence. */ -#define HSMCI_CMDR_SPCMD_SYNC (0x2u << 8) /**< \brief (HSMCI_CMDR) Synchronized CMD:Wait for the end of the current data block transfer before sending the pending command. */ -#define HSMCI_CMDR_SPCMD_CE_ATA (0x3u << 8) /**< \brief (HSMCI_CMDR) CE-ATA Completion Signal disable Command.The host cancels the ability for the device to return a command completion signal on the command line. */ -#define HSMCI_CMDR_SPCMD_IT_CMD (0x4u << 8) /**< \brief (HSMCI_CMDR) Interrupt command:Corresponds to the Interrupt Mode (CMD40). */ -#define HSMCI_CMDR_SPCMD_IT_RESP (0x5u << 8) /**< \brief (HSMCI_CMDR) Interrupt response:Corresponds to the Interrupt Mode (CMD40). */ -#define HSMCI_CMDR_SPCMD_BOR (0x6u << 8) /**< \brief (HSMCI_CMDR) Boot Operation Request.Start a boot operation mode, the host processor can read boot data from the MMC device directly. */ -#define HSMCI_CMDR_SPCMD_EBO (0x7u << 8) /**< \brief (HSMCI_CMDR) End Boot Operation.This command allows the host processor to terminate the boot operation mode. */ -#define HSMCI_CMDR_OPDCMD (0x1u << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ -#define HSMCI_CMDR_OPDCMD_PUSHPULL (0x0u << 11) /**< \brief (HSMCI_CMDR) Push pull command. */ -#define HSMCI_CMDR_OPDCMD_OPENDRAIN (0x1u << 11) /**< \brief (HSMCI_CMDR) Open drain command. */ -#define HSMCI_CMDR_MAXLAT (0x1u << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ -#define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */ -#define HSMCI_CMDR_MAXLAT_64 (0x1u << 12) /**< \brief (HSMCI_CMDR) 64-cycle max latency. */ -#define HSMCI_CMDR_TRCMD_Pos 16 -#define HSMCI_CMDR_TRCMD_Msk (0x3u << HSMCI_CMDR_TRCMD_Pos) /**< \brief (HSMCI_CMDR) Transfer Command */ -#define HSMCI_CMDR_TRCMD_NO_DATA (0x0u << 16) /**< \brief (HSMCI_CMDR) No data transfer */ -#define HSMCI_CMDR_TRCMD_START_DATA (0x1u << 16) /**< \brief (HSMCI_CMDR) Start data transfer */ -#define HSMCI_CMDR_TRCMD_STOP_DATA (0x2u << 16) /**< \brief (HSMCI_CMDR) Stop data transfer */ -#define HSMCI_CMDR_TRDIR (0x1u << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ -#define HSMCI_CMDR_TRDIR_WRITE (0x0u << 18) /**< \brief (HSMCI_CMDR) Write. */ -#define HSMCI_CMDR_TRDIR_READ (0x1u << 18) /**< \brief (HSMCI_CMDR) Read. */ -#define HSMCI_CMDR_TRTYP_Pos 19 -#define HSMCI_CMDR_TRTYP_Msk (0x7u << HSMCI_CMDR_TRTYP_Pos) /**< \brief (HSMCI_CMDR) Transfer Type */ -#define HSMCI_CMDR_TRTYP_SINGLE (0x0u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Single Block */ -#define HSMCI_CMDR_TRTYP_MULTIPLE (0x1u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Multiple Block */ -#define HSMCI_CMDR_TRTYP_STREAM (0x2u << 19) /**< \brief (HSMCI_CMDR) MMC Stream */ -#define HSMCI_CMDR_TRTYP_BYTE (0x4u << 19) /**< \brief (HSMCI_CMDR) SDIO Byte */ -#define HSMCI_CMDR_TRTYP_BLOCK (0x5u << 19) /**< \brief (HSMCI_CMDR) SDIO Block */ -#define HSMCI_CMDR_IOSPCMD_Pos 24 -#define HSMCI_CMDR_IOSPCMD_Msk (0x3u << HSMCI_CMDR_IOSPCMD_Pos) /**< \brief (HSMCI_CMDR) SDIO Special Command */ -#define HSMCI_CMDR_IOSPCMD_STD (0x0u << 24) /**< \brief (HSMCI_CMDR) Not an SDIO Special Command */ -#define HSMCI_CMDR_IOSPCMD_SUSPEND (0x1u << 24) /**< \brief (HSMCI_CMDR) SDIO Suspend Command */ -#define HSMCI_CMDR_IOSPCMD_RESUME (0x2u << 24) /**< \brief (HSMCI_CMDR) SDIO Resume Command */ -#define HSMCI_CMDR_ATACS (0x1u << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ -#define HSMCI_CMDR_ATACS_NORMAL (0x0u << 26) /**< \brief (HSMCI_CMDR) Normal operation mode. */ -#define HSMCI_CMDR_ATACS_COMPLETION (0x1u << 26) /**< \brief (HSMCI_CMDR) This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR). */ -#define HSMCI_CMDR_BOOT_ACK (0x1u << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ +#define HSMCI_CMDR_CMDNB (0x3f << 0) /**< \brief (HSMCI_CMDR) Command Number */ +#define HSMCI_CMDR_RSPTYP (0x3 << 6) /**< \brief (HSMCI_CMDR) Response Type */ +#define HSMCI_CMDR_SPCMD (0x7 << 8) /**< \brief (HSMCI_CMDR) Special Command */ +#define HSMCI_CMDR_OPDCMD (0x1 << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ +#define HSMCI_CMDR_MAXLAT (0x1 << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ +#define HSMCI_CMDR_TRCMD (0x3 << 16) /**< \brief (HSMCI_CMDR) Transfer Command */ +#define HSMCI_CMDR_TRDIR (0x1 << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ +#define HSMCI_CMDR_TRTYP (0x7 << 19) /**< \brief (HSMCI_CMDR) Transfer Type */ +#define HSMCI_CMDR_IOSPCMD (0x3 << 24) /**< \brief (HSMCI_CMDR) SDIO Special Command */ +#define HSMCI_CMDR_ATACS (0x1 << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ +#define HSMCI_CMDR_BOOT_ACK (0x1 << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ /* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ -#define HSMCI_BLKR_BCNT_Pos 0 -#define HSMCI_BLKR_BCNT_Msk (0xffffu << HSMCI_BLKR_BCNT_Pos) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ -#define HSMCI_BLKR_BCNT_MULTIPLE (0x0u << 0) /**< \brief (HSMCI_BLKR) MMC/SDCARD Multiple BlockFrom 1 to 65635: Value 0 corresponds to an infinite block transfer. */ -#define HSMCI_BLKR_BCNT_BYTE (0x4u << 0) /**< \brief (HSMCI_BLKR) SDIO ByteFrom 1 to 512 bytes: Value 0 corresponds to a 512-byte transfer.Values from 0x200 to 0xFFFF are forbidden. */ -#define HSMCI_BLKR_BCNT_BLOCK (0x5u << 0) /**< \brief (HSMCI_BLKR) SDIO BlockFrom 1 to 511 blocks: Value 0 corresponds to an infinite block transfer.Values from 0x200 to 0xFFFF are forbidden. */ -#define HSMCI_BLKR_BLKLEN_Pos 16 -#define HSMCI_BLKR_BLKLEN_Msk (0xffffu << HSMCI_BLKR_BLKLEN_Pos) /**< \brief (HSMCI_BLKR) Data Block Length */ -#define HSMCI_BLKR_BLKLEN(value) ((HSMCI_BLKR_BLKLEN_Msk & ((value) << HSMCI_BLKR_BLKLEN_Pos))) +#define HSMCI_BLKR_BCNT (0xffff << 0) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ +#define HSMCI_BLKR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_BLKR) Data Block Length */ /* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ -#define HSMCI_CSTOR_CSTOCYC_Pos 0 -#define HSMCI_CSTOR_CSTOCYC_Msk (0xfu << HSMCI_CSTOR_CSTOCYC_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ -#define HSMCI_CSTOR_CSTOCYC(value) ((HSMCI_CSTOR_CSTOCYC_Msk & ((value) << HSMCI_CSTOR_CSTOCYC_Pos))) -#define HSMCI_CSTOR_CSTOMUL_Pos 4 -#define HSMCI_CSTOR_CSTOMUL_Msk (0x7u << HSMCI_CSTOR_CSTOMUL_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ -#define HSMCI_CSTOR_CSTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1 */ -#define HSMCI_CSTOR_CSTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 16 */ -#define HSMCI_CSTOR_CSTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 128 */ -#define HSMCI_CSTOR_CSTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 256 */ -#define HSMCI_CSTOR_CSTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1024 */ -#define HSMCI_CSTOR_CSTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 4096 */ -#define HSMCI_CSTOR_CSTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 65536 */ -#define HSMCI_CSTOR_CSTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1048576 */ +#define HSMCI_CSTOR_CSTOCYC (0xf << 0) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ +#define HSMCI_CSTOR_CSTOMUL (0x7 << 4) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ /* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ #define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */ /* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ @@ -1403,7 +1322,6 @@ typedef struct { RoReg PIO_PCIMR; /**< \brief (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register */ RoReg PIO_PCISR; /**< \brief (Pio Offset: 0x160) Parallel Capture Interrupt Status Register */ RoReg PIO_PCRHR; /**< \brief (Pio Offset: 0x164) Parallel Capture Reception Holding Register */ - RwReg Reserved14[38]; } Pio; #endif /* __ASSEMBLY__ */ /* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ @@ -3082,15 +3000,9 @@ typedef struct { #define CKGR_PLLAR_MULA (0x7ff << 16) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ #define CKGR_PLLAR_STUCKTO1 (0x1 << 29) /**< \brief (CKGR_PLLAR) */ /* -------- CKGR_PLLBR : (PMC Offset: 0x002C) PLLB Register -------- */ -#define CKGR_PLLBR_DIVB_Pos 0 -#define CKGR_PLLBR_DIVB_Msk (0xffu << CKGR_PLLBR_DIVB_Pos) /**< \brief (CKGR_PLLBR) Divider */ -#define CKGR_PLLBR_DIVB(value) ((CKGR_PLLBR_DIVB_Msk & ((value) << CKGR_PLLBR_DIVB_Pos))) -#define CKGR_PLLBR_PLLBCOUNT_Pos 8 -#define CKGR_PLLBR_PLLBCOUNT_Msk (0x3fu << CKGR_PLLBR_PLLBCOUNT_Pos) /**< \brief (CKGR_PLLBR) PLLB Counter */ -#define CKGR_PLLBR_PLLBCOUNT(value) ((CKGR_PLLBR_PLLBCOUNT_Msk & ((value) << CKGR_PLLBR_PLLBCOUNT_Pos))) -#define CKGR_PLLBR_MULB_Pos 16 -#define CKGR_PLLBR_MULB_Msk (0x7ffu << CKGR_PLLBR_MULB_Pos) /**< \brief (CKGR_PLLBR) PLLB Multiplier */ -#define CKGR_PLLBR_MULB(value) ((CKGR_PLLBR_MULB_Msk & ((value) << CKGR_PLLBR_MULB_Pos))) +#define CKGR_PLLBR_DIVB (0xff << 0) /**< \brief (CKGR_PLLBR) Divider */ +#define CKGR_PLLBR_PLLBCOUNT (0x3f << 8) /**< \brief (CKGR_PLLBR) PLLB Counter */ +#define CKGR_PLLBR_MULB (0x7ff << 16) /**< \brief (CKGR_PLLBR) PLLB Multiplier */ /* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ #define PMC_MCKR_CSS (0x3 << 0) /**< \brief (PMC_MCKR) Master Clock Source Selection */ #define PMC_MCKR_CSS_SLOW_CLK (0x0 << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ @@ -3108,10 +3020,8 @@ typedef struct { #define PMC_MCKR_PLLADIV2 (0x1 << 12) /**< \brief (PMC_MCKR) PLLA Divisor by 2 */ #define PMC_MCKR_PLLBDIV2 (0x1 << 13) /**< \brief (PMC_MCKR) PLLB Divisor by 2 */ /* -------- PMC_USB : (PMC Offset: 0x0038) USB Clock Register -------- */ -#define PMC_USB_USBS (0x1u << 0) /**< \brief (PMC_USB) USB Input Clock Selection */ -#define PMC_USB_USBDIV_Pos 8 -#define PMC_USB_USBDIV_Msk (0xfu << PMC_USB_USBDIV_Pos) /**< \brief (PMC_USB) Divider for USB Clock. */ -#define PMC_USB_USBDIV(value) ((PMC_USB_USBDIV_Msk & ((value) << PMC_USB_USBDIV_Pos))) +#define PMC_USB_USBS (0x1 << 0) /**< \brief (PMC_USB) USB Input Clock Selection */ +#define PMC_USB_USBDIV (0xf << 8) /**< \brief (PMC_USB) Divider for USB Clock. */ /* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ #define PMC_PCK_CSS (0x7 << 0) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ #define PMC_PCK_PRES (0x7 << 4) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ @@ -3329,8 +3239,8 @@ typedef struct { RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ - RwReg PWM_CPDR; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ - RwReg PWM_CPDRUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ + RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ + RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ @@ -4323,7 +4233,7 @@ typedef struct { RwReg SPI_TNCR; /**< \brief (Spi Offset: 0x11C) Transmit Next Counter Register */ WoReg SPI_PTCR; /**< \brief (Spi Offset: 0x120) Transfer Control Register */ RoReg SPI_PTSR; /**< \brief (Spi Offset: 0x124) Transfer Status Register */ -} Spi, AT91S_SPI, *AT91PS_SPI; +} Spi; #endif /* __ASSEMBLY__ */ /* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ #define SPI_CR_SPIEN (0x1 << 0) /**< \brief (SPI_CR) SPI Enable */ @@ -4935,11 +4845,6 @@ typedef struct { } Tc; #endif /* __ASSEMBLY__ */ /* -------- TC_CCR0 : (TC Offset: 0x0) Channel Control Register (channel = 0) -------- */ - -#define TC_CCR_CLKEN TC_CCR0_CLKEN /**< \brief (TC_CCR) Counter Clock Enable Command */ -#define TC_CCR_CLKDIS TC_CCR0_CLKDIS /**< \brief (TC_CCR) Counter Clock Disable Command */ -#define TC_CCR_SWTRG TC_CCR0_SWTRG /**< \brief (TC_CCR) Software Trigger Command */ - #define TC_CCR0_CLKEN (0x1 << 0) /**< \brief (TC_CCR0) Counter Clock Enable Command */ #define TC_CCR0_CLKDIS (0x1 << 1) /**< \brief (TC_CCR0) Counter Clock Disable Command */ #define TC_CCR0_SWTRG (0x1 << 2) /**< \brief (TC_CCR0) Software Trigger Command */ @@ -4967,8 +4872,6 @@ typedef struct { #define TC_CMR0_ETRGEDG_FALLING (0x2 << 8) /**< \brief (TC_CMR0) falling edge */ #define TC_CMR0_ETRGEDG_BOTH (0x3 << 8) /**< \brief (TC_CMR0) each edge */ #define TC_CMR0_ABETRG (0x1 << 10) /**< \brief (TC_CMR0) TIOA or TIOB External Trigger Selection */ - -#define TC_CMR_CPCTRG TC_CMR0_CPCTRG #define TC_CMR0_CPCTRG (0x1 << 14) /**< \brief (TC_CMR0) RC Compare Trigger Enable */ #define TC_CMR0_WAVE (0x1 << 15) /**< \brief (TC_CMR0) */ #define TC_CMR0_LDRA (0x3 << 16) /**< \brief (TC_CMR0) RA Loading Selection */ @@ -5016,8 +4919,6 @@ typedef struct { #define TC_IER0_LOVRS (0x1 << 1) /**< \brief (TC_IER0) Load Overrun */ #define TC_IER0_CPAS (0x1 << 2) /**< \brief (TC_IER0) RA Compare */ #define TC_IER0_CPBS (0x1 << 3) /**< \brief (TC_IER0) RB Compare */ - -#define TC_IER_CPCS TC_IER0_CPCS #define TC_IER0_CPCS (0x1 << 4) /**< \brief (TC_IER0) RC Compare */ #define TC_IER0_LDRAS (0x1 << 5) /**< \brief (TC_IER0) RA Loading */ #define TC_IER0_LDRBS (0x1 << 6) /**< \brief (TC_IER0) RB Loading */ @@ -5565,10 +5466,8 @@ typedef struct { #define UDP_GLB_STAT_RSMINPR (0x1 << 3) /**< \brief (UDP_GLB_STAT) */ #define UDP_GLB_STAT_RMWUPE (0x1 << 4) /**< \brief (UDP_GLB_STAT) Remote Wake Up Enable */ /* -------- UDP_FADDR : (UDP Offset: 0x008) Function Address Register -------- */ -#define UDP_FADDR_FADD_Pos 0 -#define UDP_FADDR_FADD_Msk (0x7fu << UDP_FADDR_FADD_Pos) /**< \brief (UDP_FADDR) Function Address Value */ -#define UDP_FADDR_FADD(value) ((UDP_FADDR_FADD_Msk & ((value) << UDP_FADDR_FADD_Pos))) -#define UDP_FADDR_FEN (0x1u << 8) /**< \brief (UDP_FADDR) Function Enable */ +#define UDP_FADDR_FADD (0x7f << 0) /**< \brief (UDP_FADDR) Function Address Value */ +#define UDP_FADDR_FEN (0x1 << 8) /**< \brief (UDP_FADDR) Function Enable */ /* -------- UDP_IER : (UDP Offset: 0x010) Interrupt Enable Register -------- */ #define UDP_IER_EP0INT (0x1 << 0) /**< \brief (UDP_IER) Enable Endpoint 0 Interrupt */ #define UDP_IER_EP1INT (0x1 << 1) /**< \brief (UDP_IER) Enable Endpoint 1 Interrupt */ @@ -5652,20 +5551,17 @@ typedef struct { #define UDP_CSR_FORCESTALL (0x1 << 5) /**< \brief (UDP_CSR[8]) Force Stall (used by Control, Bulk and Isochronous Endpoints) */ #define UDP_CSR_RX_DATA_BK1 (0x1 << 6) /**< \brief (UDP_CSR[8]) Receive Data Bank 1 (only used by endpoints with ping-pong attributes) */ #define UDP_CSR_DIR (0x1 << 7) /**< \brief (UDP_CSR[8]) Transfer Direction (only available for control endpoints) */ -#define UDP_CSR_EPTYPE_Pos 8 -#define UDP_CSR_EPTYPE_Msk (0x7u << UDP_CSR_EPTYPE_Pos) /**< \brief (UDP_CSR[8]) Endpoint Type */ -#define UDP_CSR_EPTYPE_CTRL (0x0u << 8) /**< \brief (UDP_CSR[8]) Control */ -#define UDP_CSR_EPTYPE_ISO_OUT (0x1u << 8) /**< \brief (UDP_CSR[8]) Isochronous OUT */ -#define UDP_CSR_EPTYPE_BULK_OUT (0x2u << 8) /**< \brief (UDP_CSR[8]) Bulk OUT */ -#define UDP_CSR_EPTYPE_INT_OUT (0x3u << 8) /**< \brief (UDP_CSR[8]) Interrupt OUT */ -#define UDP_CSR_EPTYPE_ISO_IN (0x5u << 8) /**< \brief (UDP_CSR[8]) Isochronous IN */ -#define UDP_CSR_EPTYPE_BULK_IN (0x6u << 8) /**< \brief (UDP_CSR[8]) Bulk IN */ -#define UDP_CSR_EPTYPE_INT_IN (0x7u << 8) /**< \brief (UDP_CSR[8]) Interrupt IN */ +#define UDP_CSR_EPTYPE (0x7 << 8) /**< \brief (UDP_CSR[8]) Endpoint Type */ +#define UDP_CSR_EPTYPE_CTRL (0x0 << 8) /**< \brief (UDP_CSR[8]) Control */ +#define UDP_CSR_EPTYPE_ISO_OUT (0x1 << 8) /**< \brief (UDP_CSR[8]) Isochronous OUT */ +#define UDP_CSR_EPTYPE_BULK_OUT (0x2 << 8) /**< \brief (UDP_CSR[8]) Bulk OUT */ +#define UDP_CSR_EPTYPE_INT_OUT (0x3 << 8) /**< \brief (UDP_CSR[8]) Interrupt OUT */ +#define UDP_CSR_EPTYPE_ISO_IN (0x5 << 8) /**< \brief (UDP_CSR[8]) Isochronous IN */ +#define UDP_CSR_EPTYPE_BULK_IN (0x6 << 8) /**< \brief (UDP_CSR[8]) Bulk IN */ +#define UDP_CSR_EPTYPE_INT_IN (0x7 << 8) /**< \brief (UDP_CSR[8]) Interrupt IN */ #define UDP_CSR_DTGLE (0x1 << 11) /**< \brief (UDP_CSR[8]) Data Toggle */ #define UDP_CSR_EPEDS (0x1 << 15) /**< \brief (UDP_CSR[8]) Endpoint Enable Disable */ -#define UDP_CSR_RXBYTECNT_Pos 16 -#define UDP_CSR_RXBYTECNT_Msk (0x7ffu << UDP_CSR_RXBYTECNT_Pos) /**< \brief (UDP_CSR[8]) Number of Bytes Available in the FIFO */ -#define UDP_CSR_RXBYTECNT(value) ((UDP_CSR_RXBYTECNT_Msk & ((value) << UDP_CSR_RXBYTECNT_Pos))) +#define UDP_CSR_RXBYTECNT (0x7ff << 16) /**< \brief (UDP_CSR[8]) Number of Bytes Available in the FIFO */ /* -------- UDP_FDR[8] : (UDP Offset: 0x4C) Endpoint FIFO Data Register (ept_num = 0) -------- */ #define UDP_FDR_FIFO_DATA (0xff << 0) /**< \brief (UDP_FDR[8]) FIFO Data Value */ /* -------- UDP_TXVC : (UDP Offset: 0x074) Transceiver Control Register -------- */ @@ -6848,11 +6744,6 @@ typedef struct { #define WDT CAST(Wdt , 0x400E1450U) /**< \brief (WDT ) Base Address */ #define RTC CAST(Rtc , 0x400E1460U) /**< \brief (RTC ) Base Address */ #define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */ - -// indices for three pio structures -#define iPIOA 0 -#define iPIOB 1 -#define iPIOC 2 /*@}*/ /* ***************************************************************************** */ diff --git a/src/ersky9x/libraries/board/board.h b/src/ersky9x/libraries/board/board.h index 0e5aff0e3..88f60c935 100644 --- a/src/ersky9x/libraries/board/board.h +++ b/src/ersky9x/libraries/board/board.h @@ -76,12 +76,11 @@ #include #include -#ifdef REVA -// TODO -#include "AT91SAM3S2.h" +#if defined(at91sam3s4) + #include "at91sam3s4/chip.h" + #include "at91sam3s4/AT91SAM3S4.h" #else -#include "at91sam3s4/chip.h" -#include "at91sam3s4/AT91SAM3S4.h" + #error Board does not support the specified chip. #endif //------------------------------------------------------------------------------ @@ -122,6 +121,7 @@ #define BOARD_MAINOSC 12000000 /// Master clock frequency (when using board_lowlevel.c). +//#define BOARD_MCK 48000000 #define BOARD_MCK 64000000 //------------------------------------------------------------------------------ @@ -293,10 +293,17 @@ /** List of all LEDs definitions. */ #define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2 -/** MCI pins definition. */ -#define PINS_MCI {0x3fUL << 26, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_PULLUP} -/** MCI pin Card Detect. */ -#define PIN_MCI_CD {PIO_PB7, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP} +#if 0 +// TODO check BSS +/// MCI pins definition. +#define PINS_MCI {0x1f8, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \ + {1 << 3, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} + +/// MCI pin Card Detect +#define PIN_MCI_CD \ + {AT91C_PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP} +#endif + /** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */ #define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE} /** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */ @@ -382,6 +389,8 @@ #define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT} #define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT} + + /// USB VBus monitoring pin definition. #ifdef BOARD_REV_A #define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT} @@ -518,8 +527,13 @@ #define MCI2_INTERFACE /// Base address of the MCI peripheral connected to the SD card. #define BOARD_SD_MCI_BASE MCI0//MCI + +#if 0 +// TODO check BSS ///// Peripheral identifier of the MCI connected to the SD card. -#define BOARD_SD_MCI_ID AT91C_ID_MCI0 ID_MCI0 //ID_MCI +#define BOARD_SD_MCI_ID ID_MCI0 //ID_MCI +#endif + ///// MCI pins that shall be configured to access the SD card. #define BOARD_SD_PINS PINS_MCI ///// MCI slot to which the SD card is connected to. diff --git a/src/ersky9x/libraries/drivers/hsmci/hsmci.h b/src/ersky9x/libraries/drivers/hsmci/hsmci.h deleted file mode 100644 index 9e5e589e8..000000000 --- a/src/ersky9x/libraries/drivers/hsmci/hsmci.h +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup hsmci_module Working with HSMCI - * The HSMCI driver provides the interface to configure and use the HSMCI - * peripheral. - * - * The user needs to set the number of wait states depending on the frequency used.\n - * Configure number of cycles for flash read/write operations in the FWS field of HSMCI_FMR. - * - * It offers a function to send flash command to HSMCI and waits for the - * flash to be ready. - * - * To send flash command, the user could do in either of following way: - *
    - *
  • Write a correct key, command and argument in HSMCI_FCR.
    • - *
  • Or, Use IAP (In Application Programming) function which is executed from - * ROM directly, this allows flash programming to be done by code running in flash.
    • - *
  • Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt. - *
- * - * The command argument could be a page number,GPNVM number or nothing, it depends on - * the command itself. Some useful functions in this driver could help user tranlate physical - * flash address into a page number and vice verse. - * - * For more accurate information, please look at the EEFC section of the - * Datasheet. - * - * Related files :\n - * \ref hsmci_pdc.c\n - * \ref hsmci.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - */ - -/** - * - * \section Purpose - * - * Implement MultiMediaCard(MCI) Interface Driver - * - * \section Usage - * - * -# MCI_Init(): Initializes a MCI driver instance and the underlying - * peripheral. - * -# MCI_Handler() : Interrupt handler which is called by ISR handler. - * -# MCI_SetSpeed() : Configure the MCI CLKDIV in the _MR register - * (\ref Hsmci::HSMCI_MR). - * -# MCI_SetBusWidth() : Configure the MCI SDCBUS in the _SDCR register - * (\ref Hsmci::HSMCI_SDCR). - * -# MCI_EnableHsMode() : Configure the MCI HSMODE in the _CFG register - * (\ref Hsmci::HSMCI_CFG). - */ - -#ifndef HSMCID_H -#define HSMCID_H -/** \addtogroup sdmmc_hal - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include -#include "board.h" - -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/* Transfer type */ - -/** MultiMedia Transfer type: no data */ -#define MCI_NO_TRANSFER 0 -/** MultiMedia Transfer type: Device to Host (read) */ -#define MCI_START_READ 1 -/** MultiMedia Transfer type: Host to Device (write) & check BUSY */ -#define MCI_START_WRITE 2 -/** Device to Host (read) without command */ -#define MCI_READ 3 -/** Host to Device (write) without command & check BUSY */ -#define MCI_WRITE 4 -/** MultiMedia Transfer type: STOP transfer */ -#define MCI_STOP_TRANSFER 5 - -/** MCI Initialize clock 400K Hz */ -#define MCI_INITIAL_SPEED 400000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __cplusplus - extern "C" { -#endif - -/** - * \brief MCI Transfer Request prepared by the application upper layer. - * - * This structure is sent to the Sdmmc_SendCommand function to start the transfer. - * At the end of the transfer, the callback is invoked. - */ -typedef struct _MciCmd { - - /** Command code. */ - uint32_t cmd; - /** Command argument. */ - uint32_t arg; - /** Data buffer, with MCI_DMA_ENABLE defined 1, the buffer can be - * 1, 2 or 4 bytes aligned. It has to be 4 byte aligned if no DMA. - */ - uint8_t *pData; - /** Size of data block in bytes. */ - uint16_t blockSize; - /** Number of blocks to be transfered */ - uint16_t nbBlock; - /** Response buffer. */ - uint32_t *pResp; - /** Optional user-provided callback function. */ - void (*callback)( uint8_t status, void *pArg ) ; - /** Optional argument to the callback function. */ - void *pArg; - /** SD card command option. */ - uint8_t resType:7, /** Response */ - busyCheck:1; /** Check busy as end of command */ - /** Indicate transfer type */ - uint8_t tranType; - - /** Indicate end of transfer status */ - uint8_t status; - - /** Command state. */ - volatile uint8_t state; -} MciCmd; - -/** - * \brief MCI Driver - */ -typedef struct -{ - /** Pointer to a MCI peripheral. */ - Hsmci *pMciHw; - /** Pointer to currently executing command. */ - MciCmd *pCommand; - /** MCI peripheral identifier. */ - uint8_t mciId; - /** Mutex. */ - volatile uint8_t semaphore; -} Mcid; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void MCI_Disable(Hsmci *pMciHw); -extern void MCI_Enable(Hsmci *pMciHw); -extern uint8_t MCI_EnableHsMode(Mcid * pMci, uint8_t hsEnable); -extern void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk ) ; -extern uint32_t MCI_SetBusWidth(Mcid *pMci, uint32_t busWidth); -extern uint32_t MCI_SetSpeed(Mcid *pMci, uint32_t mciSpeed, uint32_t mck); - -/* pdc if used */ -extern void MCI_Reset(Mcid *pMci, uint8_t keepSettings); - -#ifdef __cplusplus -} -#endif - -/**@}*/ -#endif //#ifndef HSMCID_H - diff --git a/src/ersky9x/libraries/drivers/hsmci/hsmci_pdc.c b/src/ersky9x/libraries/drivers/hsmci/hsmci_pdc.c deleted file mode 100644 index 2bf1bc9d8..000000000 --- a/src/ersky9x/libraries/drivers/hsmci/hsmci_pdc.c +++ /dev/null @@ -1,308 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of High Speed MultiMedia Card Interface (HSMCI) controller, - * using PDC to transfer data. - * - */ -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include "board.h" -#include "hsmci.h" -#include "pmc/pmc.h" - -// #include -#define assert(...) - -/*--------------------------------------------------------------------------- - * Local macros - *---------------------------------------------------------------------------*/ - -/** Reset MCI */ -#define MCI_RESET(pMciHw) (pMciHw->HSMCI_CR = HSMCI_CR_SWRST) - - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Enable MCI - * \param pMciHw Pointer to a MCI peripheral. - */ -void MCI_Enable(Hsmci *pMciHw) -{ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN; -} - -/** - * Disable MCI - * \param pMciHw Pointer to a MCI peripheral. - */ -void MCI_Disable(Hsmci *pMciHw) -{ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS; -} - -/** - * Initializes a MCI driver instance and the underlying peripheral. - * \param pMci Pointer to a MCI driver instance. - * \param pMciHw Pointer to a MCI peripheral. - * \param mciId MCI peripheral identifier. - */ -void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk ) -{ - unsigned short clkDiv; - - /* Initialize the MCI driver structure */ - pMci->pMciHw = pMciHw; - pMci->mciId = mciId; - pMci->semaphore = 1; - pMci->pCommand = NULL; - - /* Enable the MCI peripheral */ - PMC_EnablePeripheral( mciId ) ; - - /* Reset the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_SWRST; - - /* Disable the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; - - /* Disable all the interrupts */ - pMciHw->HSMCI_IDR = 0xFFFFFFFF; - - /* Set the Data Timeout Register */ - pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ; - /* CSTOR ? */ - pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ; - - /* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */ - clkDiv = (dwMCk / (MCI_INITIAL_SPEED * 2)) - 1; - pMciHw->HSMCI_MR = (clkDiv | (HSMCI_MR_PWSDIV( 0x07 )) ) ; - - /* Set the SDCard Register 1-bit, slot A */ - pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ; - - /* Enable the MCI and the Power Saving */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN; - - /* Configure MCI */ - pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE - | ((1 << 4) & HSMCI_CFG_FERRCTRL); - - /* Disable the MCI peripheral clock. */ - PMC_DisablePeripheral(mciId); -} - -/** - * Reset MCI HW interface and disable it. - * \param keepSettings Keep old register settings, including - * _MR, _SDCR, _DTOR, _CSTOR, _DMA and _CFG. - */ -void MCI_Reset(Mcid *pMci, uint8_t keepSettings) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint8_t mciDis; - - assert(pMci); - assert(pMci->pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - if (keepSettings) - { - uint32_t mr, sdcr, dtor, cstor; - uint32_t cfg; - mr = pMciHw->HSMCI_MR; - sdcr = pMciHw->HSMCI_SDCR; - dtor = pMciHw->HSMCI_DTOR; - cstor = pMciHw->HSMCI_CSTOR; - cfg = pMciHw->HSMCI_CFG; - MCI_RESET(pMciHw); - MCI_Disable(pMciHw); - pMciHw->HSMCI_MR = mr; - pMciHw->HSMCI_SDCR = sdcr; - pMciHw->HSMCI_DTOR = dtor; - pMciHw->HSMCI_CSTOR = cstor; - pMciHw->HSMCI_CFG = cfg; - } - else - { - MCI_RESET(pMciHw); - MCI_Disable(pMciHw); - } - if ( mciDis ) - { - PMC_DisablePeripheral( pMci->mciId ) ; - } -} - -/** - * Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is - * MCK/2 and corresponds to CLKDIV = 0 - * \param pMci Pointer to the low level MCI driver. - * \param mciSpeed MCI clock speed in Hz, 0 will not change current speed. - * \param mck MCK to generate MCI Clock, in Hz - * \return The actual speed used, 0 for fail. - */ -uint32_t MCI_SetSpeed( Mcid* pMci, uint32_t mciSpeed, uint32_t mck ) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t mciMr; - uint32_t clkdiv; - uint8_t mciDis; - - assert(pMci); - assert(pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - mciMr = pMciHw->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV_Msk); - /* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) - * divided by (2*(CLKDIV+1)) - * mciSpeed = MCK / (2*(CLKDIV+1)) */ - if (mciSpeed > 0) - { - clkdiv = (mck / 2 / mciSpeed); - /* Speed should not bigger than expired one */ - if (mciSpeed < mck/2/clkdiv) - { - clkdiv ++; - } - - if ( clkdiv > 0 ) - { - clkdiv -= 1; - } - assert( (clkdiv & 0xFFFFFF00) == 0 ) ; /* "mciSpeed too small" */ - } - else - { - clkdiv = 0 ; - } - - /* Actual MCI speed */ - mciSpeed = mck / 2 / (clkdiv + 1); - /* Modify MR */ - pMciHw->HSMCI_MR = mciMr | clkdiv; - if ( mciDis ) - { - PMC_DisablePeripheral( pMci->mciId ) ; - } - - return (mciSpeed); -} - -/** - * Configure the MCI_CFG to enable the HS mode - * \param pMci Pointer to the low level MCI driver. - * \param hsEnable 1 to enable, 0 to disable HS mode. - */ -uint8_t MCI_EnableHsMode(Mcid* pMci, uint8_t hsEnable) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t cfgr; - uint8_t mciDis; - uint8_t rc = 0; - - assert(pMci); - assert(pMci->pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - cfgr = pMciHw->HSMCI_CFG; - if (hsEnable == 1) - { - cfgr |= HSMCI_CFG_HSMODE; - } - else - { - if (hsEnable == 0) - { - cfgr &= ~(uint32_t)HSMCI_CFG_HSMODE; - } - else - { - rc = ((cfgr & HSMCI_CFG_HSMODE) != 0); - } - } - - pMciHw->HSMCI_CFG = cfgr; - if (mciDis) - { - PMC_DisablePeripheral(pMci->mciId); - } - - return rc; -} - -/** - * Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available - * - * \param pMci Pointer to the low level MCI driver. - * \param busWidth MCI bus width mode. 00: 1-bit, 10: 4-bit, 11: 8-bit. - */ -uint32_t MCI_SetBusWidth(Mcid*pMci, uint32_t busWidth) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t mciSdcr; - uint8_t mciDis; - - assert(pMci); - assert(pMci->pMciHw); - - if( (busWidth != HSMCI_SDCR_SDCBUS_1) && (busWidth != HSMCI_SDCR_SDCBUS_4) && (busWidth != HSMCI_SDCR_SDCBUS_8) ) - { - return (uint32_t)-1; - } - - busWidth &= HSMCI_SDCR_SDCBUS_Msk ; - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - mciSdcr = (pMciHw->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS_Msk)); - pMciHw->HSMCI_SDCR = mciSdcr | busWidth; - - if (mciDis) - { - PMC_DisablePeripheral(pMci->mciId); - } - - return 0; -} - diff --git a/src/ersky9x/libraries/fat/efsl/Makefile-AVR b/src/ersky9x/libraries/fat/efsl/Makefile-AVR new file mode 100644 index 000000000..6c8f7bb2c --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/Makefile-AVR @@ -0,0 +1,16 @@ +COPT=-g3 -Wall -Os -mmcu=atmega128 +INCLUDEDIRS=-Iinc -Iconf +CFLAGS=$(COPT) $(INCLUDEDIRS) +CC=avr-gcc +AR=avr-ar +OBJCOPY=avr-objcopy +OBJ=src/efs.o src/plibc.o src/disc.o src/partition.o src/time.o src/fs.o src/fat.o src/file.o src/dir.o src/mkfs.o src/debug.o src/ioman.o src/ui.o src/extract.o src/interfaces/atmega128.o src/interfaces/sd.o + +all: lib + +lib: $(OBJ) + $(AR) rcs libefsl.a $(OBJ) + +clean : + rm -f $(OBJ) libefsl.a + diff --git a/src/ersky9x/libraries/fat/efsl/Makefile-LINUX b/src/ersky9x/libraries/fat/efsl/Makefile-LINUX new file mode 100644 index 000000000..1326165d8 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/Makefile-LINUX @@ -0,0 +1,51 @@ +COPT=-g3 -ansi -Wall -pedantic -O0 +#COPT=-O3 -march=pentium3 -g3 +INCLUDEDIRS=-Iinc -Iconf +CFLAGS=$(COPT) $(INCLUDEDIRS) +CC=gcc +AR=ar +OBJ=src/efs.o + OBJ+=src/plibc.o + OBJ+=src/disc.o + OBJ+=src/partition.o + OBJ+=src/fs.o + OBJ+=src/fat.o + OBJ+=src/time.o + OBJ+=src/file.o + OBJ+=src/dir.o + OBJ+=src/mkfs.o + OBJ+=src/debug.o + OBJ+=src/ioman.o + OBJ+=src/ui.o + OBJ+=src/ls.o + OBJ+=src/extract.o + OBJ+=src/interfaces/helper.o + OBJ+=src/interfaces/linuxfile.o + +all: lib + +lib: $(OBJ) + $(AR) rcs libefsl.a $(OBJ) + +len: src/len.o lib + $(CC) $(CFLAGS) -o test src/len.o -L. -lefsl + +regtest: clean src/regressiontest.o $(OBJ) + $(CC) $(CFLAGS) -o regtest src/regressiontest.o $(OBJ) + mv regtest testfiles + +clean: + rm -f $(OBJ) src/len.o src/flex.o src/regressiontest.o test libefsl.a + @cd linuxutils ; make clean + +clearscreen: + clear + +utils: lib + @cd linuxutils ; make all + +purge: clean clearscreen len + +image: clearscreen + dd if=/dev/zero of=./image32 bs=1M count=50 + /sbin/mkfs.vfat -F32 -v ./image32 diff --git a/src/ersky9x/libraries/fat/efsl/Makefile-LPC2000 b/src/ersky9x/libraries/fat/efsl/Makefile-LPC2000 new file mode 100644 index 000000000..ae5e74173 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/Makefile-LPC2000 @@ -0,0 +1,25 @@ +# efsl library makefile for LPC2000 +# by Martin Thomas +# (based on the efsl avr- and the WinARM-template makefiles) + +MCU = arm7tdmi-s +THUMB = -mthumb -mthumb-interwork + +COPT= -mcpu=$(MCU) $(THUMB) -g3 -Wall -Os +INCLUDEDIRS=-Iinc -Iconf +CFLAGS=$(COPT) $(INCLUDEDIRS) +CC=arm-elf-gcc +AR=arm-elf-ar +OBJCOPY=arm-elf-objcopy +OBJ=src/efs.o src/plibc.o src/disc.o src/partition.o src/time.o src/fs.o src/fat.o src/file.o src/dir.o src/mkfs.o src/debug.o src/ioman.o src/ui.o src/extract.o src/interfaces/sd.o +OBJ+=src/ls.o +OBJ+=src/interfaces/lpc2000_spi.o src/interfaces/lpc2000_dbg_printf.o + +all: lib + +lib: $(OBJ) + $(AR) rcs libefsl.a $(OBJ) + +clean : + rm -f $(OBJ) libefsl.a + diff --git a/src/ersky9x/libraries/fat/efsl/conf/config-sample-avr.h b/src/ersky9x/libraries/fat/efsl/conf/config-sample-avr.h new file mode 100644 index 000000000..684f7edf4 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/conf/config-sample-avr.h @@ -0,0 +1,157 @@ +#ifndef __EFSL_CONFIG_H__ +#define __EFSL_CONFIG_H__ + +/* Hardware target + --------------- + + * Here you will define for what hardware-endpoint EFSL should be compiled. + * Look in interfaces.h to see what systems are supported, and add your own + * there if you need to write your own driver. Then, define the name you + * selected for your hardware there here. Make sure that you only select one + * device! +*/ + + /*#define HW_ENDPOINT_LINUX*/ + #define HW_ENDPOINT_ATMEGA128_SD + /*#define HW_ENDPOINT_DSP_TI6713_SD*/ + + +/* Memory configuration + -------------------- + + * Here you must configure wheter your processor can access memory byte + * oriented. All x86 processors can do it, AVR's can do it to. Some DSP + * or other microcontrollers can't. If you have an 8 bit system you're safe. + * If you are really unsure, leave the setting commented out, it will be slower + * but it will work for sure. +*/ + + #define BYTE_ALIGNMENT + +/* Cache configuration + ------------------- + + * Here you must configure how much memory of cache you can/want to use. + * The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means + * 512 bytes cache, 4 means 2048 bytes cache. More is better. + * The number after IOMAN_NUMITERATIONS should be untouched. + * The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's + * own memory in it's structure, or not. If you choose to do it yourself + * you will have to pass a pointer to the memory as the last argument of + * ioman_init. +*/ + #define IOMAN_NUMBUFFER 1 + #define IOMAN_NUMITERATIONS 3 + #define IOMAN_DO_MEMALLOC + +/* Cluster pre-allocation + ---------------------- + + * When writing files, the function that performs the actual write has to + * calculate how many clusters it will need for that request. It then allocates + * that number of new clusters to the file. Since this involves some + * calculations and writing of the FAT, you might find it beneficial to limit + * the number of allocations, and allow fwrite to pre-allocate a number of + * clusters extra. This setting determines how many clusters will be extra + * allocated whenever this is required. + * Take in carefull consideration how large your clustersize is, putting 10 here + * with a clustersize of 32kb means you might waste 320 kb. + * The first option is for preallocating files, the other is used when enlarging + * a directory to accomodate more files +*/ + #define CLUSTER_PREALLOC_FILE 0 + #define CLUSTER_PREALLOC_DIRECTORY 0 + + +/* Endianess configuration + ----------------------- + + * Here you can configure wheter your architecture is little or big endian. This + * is important since all FAT structures are stored in intel little endian + * order. So if you have a big endian system the library has to convert all + * figures to big endian in order to work. + */ + #define LITTLE_ENDIAN + + +/* Date and Time support + --------------------- + + * Here you can enable or disable date and time support. If you enable + * it you will have to create 6 functions, that are described in the + * EFSL manual. If the functions are not present when linking your + * program with the library you will get unresolved dependencies. + */ + /* #define DATE_TIME_SUPPORT */ + +/* Error reporting support + ----------------------- + + * When you receive an error in userland, it usually only gives limited + * information (most likely, fail or success). If error detection and + * reporting is important for you, you can enable more detailed error + * reporting here. This is optional, the costs are 1 byte per object, + * and a small increase in code size. + * You can enable error recording for all object, or you can select the + * object manually. + * For full error reporting use FULL_ERROR_SUPPORT + * For only the base-core of the library use BASE_ERROR_SUPPORT + * For IO/Man use ERRSUP_IOMAN + * For Disc use ERRSUP_IOMAN + * For Part use ERRSUP_PARTITION + * For Fs use ERRSUP_FILESYSTEM + * For File use ERRSUP_FILE +*/ + + #define FULL_ERROR_SUPPORT + /*#define BASE_ERROR_SUPPORT*/ + +/* List options + ------------ + + * In this section you can configure what kind of data you will get from + * directory listing requests. Please refer to the documentation for + * more information +*/ + +#define LIST_MAXLENFILENAME 12 + + +/* Debugging configuration + ----------------------- + + * Here you can configure the debugging behaviour. Debugging is different + * on every platform (see debug.h for more information). + * If your hardware has no means of output (printf) dont define any anything, + * and nothing will happen. For real world use debugging should be turned off. +*/ + + #define DEBUG + + +/* Debugging configuration - AVR Specific: PORT + -------------------------------------------- + + * Here you can select which UART you want to use for debugging. + * If you did not define DEBUG, this setting has no effect. + * Note that it is not a good idea to use a port that you use in userspace. +*/ + + #define DEBUG_PORT 0 /* Select UART0 */ + /*#define DEBUG_PORT 1*/ /* Select UART1 */ + + +/* Debugging configuration - AVR Specific: UBRR + -------------------------------------------- + + * Here you can set UBRR, this value will select the serial clock speed. + * This value depends on your baudrate and clockrate. U2X is by standard 0, + * if you would want this 1 for some reason, this can be done in debug.c. +*/ + + #define DEBUG_UBRR 51 /* 9600bps on 8Mhz */ + /*#define DEBUG_UBRR 95*/ /* 9600bps on 14.7456Mhz */ + /*#define DEBUG_UBRR 103*/ /* 9600bps on 16Mhz */ + + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/conf/config-sample-linux.h b/src/ersky9x/libraries/fat/efsl/conf/config-sample-linux.h new file mode 100644 index 000000000..1bfd15eb5 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/conf/config-sample-linux.h @@ -0,0 +1,129 @@ +#ifndef __EFSL_CONFIG_H__ +#define __EFSL_CONFIG_H__ + +/* Hardware target + --------------- + + * Here you will define for what hardware-endpoint EFSL should be compiled. + * Look in interfaces.h to see what systems are supported, and add your own + * there if you need to write your own driver. Then, define the name you + * selected for your hardware there here. Make sure that you only select one + * device! +*/ + + #define HW_ENDPOINT_LINUX + /*#define HW_ENDPOINT_ATMEGA128_SD*/ + /*#define HW_ENDPOINT_DSP_TI6713_SD*/ + +/* Memory configuration + -------------------- + + * Here you must configure wheter your processor can access memory byte + * oriented. All x86 processors can do it, AVR's can do it to. Some DSP + * or other microcontrollers can't. If you have an 8 bit system you're safe. + * If you are really unsure, leave the setting commented out, it will be slower + * but it will work for sure. +*/ + + /*#define BYTE_ALIGNMENT*/ + +/* Cache configuration + ------------------- + + * Here you must configure how much memory of cache you can/want to use. + * The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means + * 512 bytes cache, 4 means 2048 bytes cache. More is better. + * The number after IOMAN_NUMITERATIONS should be untouched. + * The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's + * own memory in it's structure, or not. If you choose to do it yourself + * you will have to pass a pointer to the memory as the last argument of + * ioman_init. +*/ + #define IOMAN_NUMBUFFER 100 + #define IOMAN_NUMITERATIONS 3 + #define IOMAN_DO_MEMALLOC + +/* Cluster pre-allocation + ---------------------- + + * When writing files, the function that performs the actual write has to + * calculate how many clusters it will need for that request. It then allocates + * that number of new clusters to the file. Since this involves some + * calculations and writing of the FAT, you might find it beneficial to limit + * the number of allocations, and allow fwrite to pre-allocate a number of + * clusters extra. This setting determines how many clusters will be extra + * allocated whenever this is required. + * Take in carefull consideration how large your clustersize is, putting 10 here + * with a clustersize of 32kb means you might waste 320 kb. + * The first option is for preallocating files, the other is used when enlarging + * a directory to accomodate more files +*/ + #define CLUSTER_PREALLOC_FILE 50 + #define CLUSTER_PREALLOC_DIRECTORY 5 + +/* Endianess configuration + ----------------------- + + * Here you can configure wheter your architecture is little or big endian. This + * is important since all FAT structures are stored in intel little endian + * order. So if you have a big endian system the library has to convert all + * figures to big endian in order to work. + */ + #define LITTLE_ENDIAN + +/* Date and Time support + --------------------- + + * Here you can enable or disable date and time support. If you enable + * it you will have to create 6 functions, that are described in the + * EFSL manual. If the functions are not present when linking your + * program with the library you will get unresolved dependencies. + */ + /* #define DATE_TIME_SUPPORT */ + +/* Error reporting support + ----------------------- + + * When you receive an error in userland, it usually only gives limited + * information (most likely, fail or success). If error detection and + * reporting is important for you, you can enable more detailed error + * reporting here. This is optional, the costs are 1 byte per object, + * and a small increase in code size. + * You can enable error recording for all object, or you can select the + * object manually. + * For full error reporting use FULL_ERROR_SUPPORT + * For only the base-core of the library use BASE_ERROR_SUPPORT + * For IO/Man use ERRSUP_IOMAN + * For Disc use ERRSUP_IOMAN + * For Part use ERRSUP_PARTITION + * For Fs use ERRSUP_FILESYSTEM + * For File use ERRSUP_FILE +*/ + + #define FULL_ERROR_SUPPORT + /*#define BASE_ERROR_SUPPORT*/ + + +/* Debugging configuration + ----------------------- + + * Here you can configure the debugging behaviour. Debugging is different + * on every platform (see debug.h for more information). + * If your hardware has no means of output (printf) dont define any anything, + * and nothing will happen. For real world use debugging should be turned off. +*/ + + #define DEBUG + /*#define DO_FUNC_DEBUG*/ + +/* List options + ------------ + + * In this section you can configure what kind of data you will get from + * directory listing requests. Please refer to the documentation for + * more information +*/ + + #define LIST_MAXLENFILENAME 12 + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/conf/config-sample-lpc2000.h b/src/ersky9x/libraries/fat/efsl/conf/config-sample-lpc2000.h new file mode 100644 index 000000000..6314c036a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/conf/config-sample-lpc2000.h @@ -0,0 +1,146 @@ +#ifndef __EFSL_CONFIG_H__ +#define __EFSL_CONFIG_H__ + +/* This is for the LPC2000 SD-Card SPI interface (M. Thomas) */ + + +/* Hardware target + --------------- + + * Here you will define for what hardware-endpoint EFSL should be compiled. + * Look in interfaces.h to see what systems are supported, and add your own + * there if you need to write your own driver. Then, define the name you + * selected for your hardware there here. Make sure that you only select one + * device! +*/ + + /*#define HW_ENDPOINT_LINUX*/ + /*#define HW_ENDPOINT_ATMEGA128_SD*/ + + + #define HW_ENDPOINT_LPC2000_SD + /* defines the interface for LPC213x (0=SPI0 1=SPI1) */ + // #define HW_ENDPOINT_LPC2000_SPINUM (0) + #define HW_ENDPOINT_LPC2000_SPINUM (1) + + /*#define HW_ENDPOINT_DSP_TI6713_SD*/ + + +/* Memory configuration + -------------------- + + * Here you must configure wheter your processor can access memory byte + * oriented. All x86 processors can do it, AVR's can do it to. Some DSP + * or other microcontrollers can't. If you have an 8 bit system you're safe. + * If you are really unsure, leave the setting commented out, it will be slower + * but it will work for sure. +*/ + + /* disabled for ARM (mt): #define BYTE_ALIGNMENT */ + +/* Cache configuration + ------------------- + + * Here you must configure how much memory of cache you can/want to use. + * The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means + * 512 bytes cache, 4 means 2048 bytes cache. More is better. + * The number after IOMAN_NUMITERATIONS should be untouched. + * The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's + * own memory in it's structure, or not. If you choose to do it yourself + * you will have to pass a pointer to the memory as the last argument of + * ioman_init. +*/ + /*#define IOMAN_NUMBUFFER 1*/ + #define IOMAN_NUMBUFFER 6 /* 32kB RAM on the LPC2138 - let's use 3 kB */ + #define IOMAN_NUMITERATIONS 3 + #define IOMAN_DO_MEMALLOC + +/* Cluster pre-allocation + ---------------------- + + * When writing files, the function that performs the actual write has to + * calculate how many clusters it will need for that request. It then allocates + * that number of new clusters to the file. Since this involves some calculations + * and writing of the FAT, you might find it beneficial to limit the number of + * allocations, and allow fwrite to pre-allocate a number of clusters extra. + * This setting determines how many clusters will be extra allocated whenever + * this is required. + * Take in carefull consideration how large your clustersize is, putting 10 here + * with a clustersize of 32kb means you might waste 320 kb. + * The first option is for preallocating files, the other is used when enlarging + * a directory to accomodate more files +*/ + /*#define CLUSTER_PREALLOC_FILE 0*/ + #define CLUSTER_PREALLOC_FILE 2 + #define CLUSTER_PREALLOC_DIRECTORY 0 + + +/* Endianess configuration + ----------------------- + + * Here you can configure wheter your architecture is little or big endian. This + * is important since all FAT structures are stored in intel little endian order. + * So if you have a big endian system the library has to convert all figures to + * big endian in order to work. + */ + #define LITTLE_ENDIAN + + +/* Date and Time support + --------------------- + + * Here you can enable or disable date and time support. If you enable + * it you will have to create 6 functions, that are described in the + * EFSL manual. If the functions are not present when linking your + * program with the library you will get unresolved dependencies. + */ + /*#define DATE_TIME_SUPPORT*/ + +/* Error reporting support + ----------------------- + + * When you receive an error in userland, it usually only gives limited + * information (most likely, fail or success). If error detection and + * reporting is important for you, you can enable more detailed error + * reporting here. This is optional, the costs are 1 byte per object, + * and a small increase in code size. + * You can enable error recording for all object, or you can select the + * object manually. + * For full error reporting use FULL_ERROR_SUPPORT + * For only the base-core of the library use BASE_ERROR_SUPPORT + * For IO/Man use ERRSUP_IOMAN + * For Disc use ERRSUP_IOMAN + * For Part use ERRSUP_PARTITION + * For Fs use ERRSUP_FILESYSTEM + * For File use ERRSUP_FILE +*/ + + #define FULL_ERROR_SUPPORT + /*#define BASE_ERROR_SUPPORT*/ + +/* List options + ------------ + + * In this section youcan configure what kind of data you will get from + * directory listing requests. Please refer to the documentation for + * more information +*/ + +#define LIST_MAXLENFILENAME 12 + + + + +/* Debugging configuration + ----------------------- + + * Here you can configure the debugging behaviour. Debugging is different + * on every platform (see debug.h for more information). + * If your hardware has no means of output (printf) dont define any anything, + * and nothing will happen. For real world use debugging should be turned off. +*/ + + #define DEBUG + + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/conf/config-sample-nios2.h b/src/ersky9x/libraries/fat/efsl/conf/config-sample-nios2.h new file mode 100644 index 000000000..f8eb5ed0a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/conf/config-sample-nios2.h @@ -0,0 +1,133 @@ +#ifndef __EFSL_CONFIG_H__ +#define __EFSL_CONFIG_H__ + +/* Hardware target + --------------- + + * Here you will define for what hardware-endpoint EFSL should be compiled. + * Look in interfaces.h to see what systems are supported, and add your own + * there if you need to write your own driver. Then, define the name you + * selected for your hardware there here. Make sure that you only select one + * device! +*/ + + /*#define HW_ENDPOINT_LINUX*/ + /*#define HW_ENDPOINT_ATMEGA128_SD*/ + /*#define HW_ENDPOINT_DSP_TI6713_SD*/ + #define HW_ENDPOINT_NIOS_2_SD + + +/* Memory configuration + -------------------- + + * Here you must configure wheter your processor can access memory byte + * oriented. All x86 processors can do it, AVR's can do it to. Some DSP + * or other microcontrollers can't. If you have an 8 bit system you're safe. + * If you are really unsure, leave the setting commented out, it will be slower + * but it will work for sure. +*/ + + /*#define BYTE_ALIGNMENT*/ + +/* Cache configuration + ------------------- + + * Here you must configure how much memory of cache you can/want to use. + * The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means + * 512 bytes cache, 4 means 2048 bytes cache. More is better. + * The number after IOMAN_NUMITERATIONS should be untouched. + * The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's + * own memory in it's structure, or not. If you choose to do it yourself + * you will have to pass a pointer to the memory as the last argument of + * ioman_init. +*/ + #define IOMAN_NUMBUFFER 1 + #define IOMAN_NUMITERATIONS 3 + #define IOMAN_DO_MEMALLOC + +/* Cluster pre-allocation + ---------------------- + + * When writing files, the function that performs the actual write has to + * calculate how many clusters it will need for that request. It then allocates + * that number of new clusters to the file. Since this involves some + * calculations and writing of the FAT, you might find it beneficial to limit + * the number of allocations, and allow fwrite to pre-allocate a number of + * clusters extra. This setting determines how many clusters will be extra + * allocated whenever this is required. + * Take in carefull consideration how large your clustersize is, putting 10 here + * with a clustersize of 32kb means you might waste 320 kb. + * The first option is for preallocating files, the other is used when enlarging + * a directory to accomodate more files +*/ + #define CLUSTER_PREALLOC_FILE 0 + #define CLUSTER_PREALLOC_DIRECTORY 0 + + +/* Endianess configuration + ----------------------- + + * Here you can configure wheter your architecture is little or big endian. This + * is important since all FAT structures are stored in intel little endian + * order. So if you have a big endian system the library has to convert all + * figures to big endian in order to work. + */ + #define LITTLE_ENDIAN + + +/* Date and Time support + --------------------- + + * Here you can enable or disable date and time support. If you enable + * it you will have to create 6 functions, that are described in the + * EFSL manual. If the functions are not present when linking your + * program with the library you will get unresolved dependencies. + */ + /* #define DATE_TIME_SUPPORT */ + +/* Error reporting support + ----------------------- + + * When you receive an error in userland, it usually only gives limited + * information (most likely, fail or success). If error detection and + * reporting is important for you, you can enable more detailed error + * reporting here. This is optional, the costs are 1 byte per object, + * and a small increase in code size. + * You can enable error recording for all object, or you can select the + * object manually. + * For full error reporting use FULL_ERROR_SUPPORT + * For only the base-core of the library use BASE_ERROR_SUPPORT + * For IO/Man use ERRSUP_IOMAN + * For Disc use ERRSUP_IOMAN + * For Part use ERRSUP_PARTITION + * For Fs use ERRSUP_FILESYSTEM + * For File use ERRSUP_FILE +*/ + + #define FULL_ERROR_SUPPORT + /*#define BASE_ERROR_SUPPORT*/ + +/* List options + ------------ + + * In this section you can configure what kind of data you will get from + * directory listing requests. Please refer to the documentation for + * more information +*/ + +#define LIST_MAXLENFILENAME 12 + + +/* Debugging configuration + ----------------------- + + * Here you can configure the debugging behaviour. Debugging is different + * on every platform (see debug.h for more information). + * If your hardware has no means of output (printf) dont define any anything, + * and nothing will happen. For real world use debugging should be turned off. +*/ + + #define DEBUG + + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/conf/config.h b/src/ersky9x/libraries/fat/efsl/conf/config.h new file mode 100644 index 000000000..3e400167e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/conf/config.h @@ -0,0 +1,147 @@ +#ifndef __EFSL_CONFIG_H__ +#define __EFSL_CONFIG_H__ + +/* This is for the LPC2000 SD-Card SPI interface (M. Thomas) */ + + +/* Hardware target + --------------- + + * Here you will define for what hardware-endpoint EFSL should be compiled. + * Look in interfaces.h to see what systems are supported, and add your own + * there if you need to write your own driver. Then, define the name you + * selected for your hardware there here. Make sure that you only select one + * device! +*/ + + /*#define HW_ENDPOINT_LINUX*/ + /*#define HW_ENDPOINT_ATMEGA128_SD*/ + + + //#define HW_ENDPOINT_LPC2000_SD + /* defines the interface for LPC213x (0=SPI0 1=SPI1) */ + // #define HW_ENDPOINT_LPC2000_SPINUM (0) + // #define HW_ENDPOINT_LPC2000_SPINUM (1) + + /*#define HW_ENDPOINT_DSP_TI6713_SD*/ + + #define HW_ENDPOINT_AT91SAM + + +/* Memory configuration + -------------------- + + * Here you must configure wheter your processor can access memory byte + * oriented. All x86 processors can do it, AVR's can do it to. Some DSP + * or other microcontrollers can't. If you have an 8 bit system you're safe. + * If you are really unsure, leave the setting commented out, it will be slower + * but it will work for sure. +*/ + + /* disabled for ARM (mt): #define BYTE_ALIGNMENT */ + +/* Cache configuration + ------------------- + + * Here you must configure how much memory of cache you can/want to use. + * The number you put at IOMAN_NUMBUFFER is multiplied by 512. So 1 means + * 512 bytes cache, 4 means 2048 bytes cache. More is better. + * The number after IOMAN_NUMITERATIONS should be untouched. + * The last field (IOMAN_DO_MEMALLOC) is to tell ioman to allocate it's + * own memory in it's structure, or not. If you choose to do it yourself + * you will have to pass a pointer to the memory as the last argument of + * ioman_init. +*/ + /*#define IOMAN_NUMBUFFER 1*/ + #define IOMAN_NUMBUFFER 3 + #define IOMAN_NUMITERATIONS 3 + #define IOMAN_DO_MEMALLOC + +/* Cluster pre-allocation + ---------------------- + + * When writing files, the function that performs the actual write has to + * calculate how many clusters it will need for that request. It then allocates + * that number of new clusters to the file. Since this involves some calculations + * and writing of the FAT, you might find it beneficial to limit the number of + * allocations, and allow fwrite to pre-allocate a number of clusters extra. + * This setting determines how many clusters will be extra allocated whenever + * this is required. + * Take in carefull consideration how large your clustersize is, putting 10 here + * with a clustersize of 32kb means you might waste 320 kb. + * The first option is for preallocating files, the other is used when enlarging + * a directory to accomodate more files +*/ + /*#define CLUSTER_PREALLOC_FILE 0*/ + #define CLUSTER_PREALLOC_FILE 2 + #define CLUSTER_PREALLOC_DIRECTORY 0 + + +/* Endianess configuration + ----------------------- + + * Here you can configure wheter your architecture is little or big endian. This + * is important since all FAT structures are stored in intel little endian order. + * So if you have a big endian system the library has to convert all figures to + * big endian in order to work. + */ + #define LITTLE_ENDIAN + + +/* Date and Time support + --------------------- + + * Here you can enable or disable date and time support. If you enable + * it you will have to create 6 functions, that are described in the + * EFSL manual. If the functions are not present when linking your + * program with the library you will get unresolved dependencies. + */ + /*#define DATE_TIME_SUPPORT*/ + +/* Error reporting support + ----------------------- + + * When you receive an error in userland, it usually only gives limited + * information (most likely, fail or success). If error detection and + * reporting is important for you, you can enable more detailed error + * reporting here. This is optional, the costs are 1 byte per object, + * and a small increase in code size. + * You can enable error recording for all object, or you can select the + * object manually. + * For full error reporting use FULL_ERROR_SUPPORT + * For only the base-core of the library use BASE_ERROR_SUPPORT + * For IO/Man use ERRSUP_IOMAN + * For Disc use ERRSUP_IOMAN + * For Part use ERRSUP_PARTITION + * For Fs use ERRSUP_FILESYSTEM + * For File use ERRSUP_FILE +*/ + + #define FULL_ERROR_SUPPORT + /*#define BASE_ERROR_SUPPORT*/ + +/* List options + ------------ + + * In this section youcan configure what kind of data you will get from + * directory listing requests. Please refer to the documentation for + * more information +*/ + +#define LIST_MAXLENFILENAME 12 + + +/* Debugging configuration + ----------------------- + + * Here you can configure the debugging behaviour. Debugging is different + * on every platform (see debug.h for more information). + * If your hardware has no means of output (printf) dont define any anything, + * and nothing will happen. For real world use debugging should be turned off. +*/ +#ifndef NDEBUG +// #define DEBUG 0 + +#endif + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/docs/Makefile b/src/ersky9x/libraries/fat/efsl/docs/Makefile new file mode 100644 index 000000000..300b4699a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/Makefile @@ -0,0 +1,13 @@ +all: manual.tex + latex manual.tex + latex manual.tex # Needs to be done a second time to make sure that the contents table is correct + dvips -o manual.ps manual.dvi + dvipdfm manual.dvi + +clean: + rm -f manual.aux + rm -f manual.dvi + rm -f manual.log + rm -f manual.pdf + rm -f manual.ps + rm -f manual.toc diff --git a/src/ersky9x/libraries/fat/efsl/docs/manual.pdf b/src/ersky9x/libraries/fat/efsl/docs/manual.pdf new file mode 100644 index 000000000..ef2724656 Binary files /dev/null and b/src/ersky9x/libraries/fat/efsl/docs/manual.pdf differ diff --git a/src/ersky9x/libraries/fat/efsl/docs/manual.tex b/src/ersky9x/libraries/fat/efsl/docs/manual.tex new file mode 100644 index 000000000..14e0184da --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/manual.tex @@ -0,0 +1,132 @@ +\documentclass[a4paper,fleqn]{article} + +\usepackage{listings} +\usepackage{graphicx} +\usepackage{amsmath} +\usepackage{amssymb} +\usepackage{color} +\usepackage{array} +\usepackage{verbatim} +\usepackage{longtable} + +\newcommand{\filename}[1]{ + \textsf{#1} +} +\newcommand{\code}[1]{ + \texttt{#1} +} +\newcommand{\external}[1]{ + \textbf{#1} +} + +\newcommand{\thead}[1]{ + \textbf{#1} +} + +%\usepackage[latin1]{inputenc} +%\usepackage[T1]{fontenc} + +\lstset{language=C} + +\begin{document} +\title{\Huge{EFSL}\\\Large{Embedded Filesystem Library}} +\author{Lennart Ysboodt - Michael De Nil} +\date{$\copyright$ 2005} +\maketitle + +\newpage +\tableofcontents + +\setlength{\parindent}{0pt} +\setlength{\parskip}{1ex plus 0.5ex minus 0.2ex} + +\newpage +\section{Preface} +\input{pages/preface} + +\newpage +\section{Getting started} +\subsection{On Linux (file)} + \input{pages/linux} +\newpage +\subsection{On AVR (SD-Card)} + \input{pages/avr} +\newpage +\subsection{On DSP (SD-Card)} + \input{pages/tms6713} +\newpage +\subsection{On ARM7 (SD-Card)} + \input{pages/arm7} +\newpage +\section{Configuring EFSL} + \input{pages/config} + +\newpage +\section{EFSL Functions} +\subsection{Date and time support} + \input{pages/dateandtime} + \newpage +\subsection{efs\_init} + \input{pages/efs_init} + \newpage +\subsection{file\_fopen} + \input{pages/file_fopen} + \newpage +\subsection{file\_fclose} + \input{pages/file_fclose} + \newpage +\subsection{file\_read} + \input{pages/file_read} + \newpage +\subsection{file\_write} + \input{pages/file_write} + \newpage +\subsection{mkdir} + \input{pages/mkdir} + \newpage +\subsection{ls\_openDir} + \input{pages/lsopendir} + \newpage +\subsection{ls\_getNext} + \input{pages/lsgetnext} + \newpage +\subsection{rmfile} + \input{pages/rmfile} + \newpage +\subsection{Getting the free space} + \input{pages/freespace} + \newpage + +\newpage +\section{EFSL utilities} + \input{pages/utils} + \newpage + +\newpage +\section{Developer notes} +\subsection{Integer types} + \input{pages/types} +\subsection{Debugging} + \input{pages/debug} +\subsection{Adding support for a new endpoint} + \input{pages/driver} +\subsection{I/O Manager} + \input{pages/ioman} +\subsection{C library for EFSL} + \input{pages/plibc} + +\newpage +\section{Legal notes} + \input{pages/license} + +%\newpage +%\section{Internals} +%\subsection{Overview} +%\subsection{Flowcharts} +%\subsection{Portability} +% +%\section{Examples} +%\subsection{Example 1} +%\subsection{Example 2} +% +\end{document} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/arm7.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/arm7.tex new file mode 100644 index 000000000..212f6913d --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/arm7.tex @@ -0,0 +1,120 @@ +This section describes how the ARM7 port of EFSL works. This documentation was written +by Martin Thomas, as is the port to the ARM7 and the examples included with EFSL. +The examples are pretty large, so we will not print them here, they have their own +subdirectory in the examples sections and should be quite understandable. + +Please note that the LPC2000 interface is Copyright (c) by Martin Thomas, Kaiserslautern, Germany. + +\subsubsection{License} +The LPC2000-interface inherits the +LGPL-license from the main efsl-source. + + +\subsubsection{General information about the ARM7 port} + \begin{itemize} +\item A GNU arm-elf toolchain/cross-compiler +must be available to build the examples +and the library. + +\item The interface supports SD-Cards +connected to the LPC2000 SPI ("SPI0") +and SSP ("SPI1") interface. The SPI- +interface is hardcoded by the value +defined in config.h and can not be +changed during runtime. + +\item Only some parts of the LPC2000-family +have the fast SSP-Interface (i.e. LPC213x, +LPC214x) others only provide the slower +SPI interface. + +\item \code{\#define BYTE\_ALIGNMENT} is disabled +for the LPC-interace in config.h +It didn't work with alignment enabled. + +\item Buffers can be configured as +described in the efsl-manual. + +\item To build the library libefsl.a for +LPCs use the makefile Makefile-LPC2000 +in the efsl-root-directory. + +\item The hardware connection is similar +to the connection described +in the efsl-manual for Atmel AVRs. +(I have mounted the pullups in my +test-system but initial test have +been done successfully without the +pull-up resistors) + +\item So far the interface has only been +tested with a LPC2138-controller +and the SPI(0) and SSP-Interface. +Other LPC2000-ARM7 controllers +should be supported too. Verify +that the register-adresses in +inc/interfaces/LPC2000\_regs.h +match the used controller and the +maximum speed defined in lpc2000\_spi.c +is available for the part. +Verify the pin-connections in lpc2000\_spi.c. + \end{itemize} + +\subsubsection{Example code} + +There are two LPC demo-applications +provided in the examples-directory: + +\begin{enumerate} +\item Example lpc2138\_ssp\_standalone: + +This application gets build with +the efsl source-code. The library +libefsl.a is not needed. + +The application demonstrates: +- Init of the efsl LPC2000 debug-system +- Init of the efsl-library +- List contents of the SD-Card's + root directory +- Open a file and type the content +- Append a line of text to a file +- "cat/type" the file's content again + +The application prints status- and +debug-messages to the LPC UART1 +(115200,8,N,1,no FC) + +\item Example lpc2138\_ssp\_withlib: + +Same functions as the standalone +applications but the libefsl.a must +be available for linking. +\end{enumerate} + +\subsubsection{Test Hard- and Software} +\begin{itemize} +\item Keil (keil.com) MCB2130 board +\item SD/MMC-connector from Buerklin.de +\item SanDisk "standard" SD-Card 256MB + (not the "highspeed"-version) + +\item WinARM (arm-elf GNU toolchain) +\item Bray++ Terminal +\end{itemize} + +\subsubsection{Credits} +\begin{itemize} +\item The LPC2000 debug-printf routine +is based on code from Holger Klabunde +and has been modified to support +a "fdevopen"-function. The original +code has no copyright-notice and +is derived from an free code by +Volker Oth. + +\item Register-defintions based on +a header-file from Keil GmbH (supplied +with the DKARM trial-version) + +\end{itemize} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/avr.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/avr.tex new file mode 100644 index 000000000..cace85db1 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/avr.tex @@ -0,0 +1,190 @@ +This section describes how to implement Efsl on a AVR $\mu C$ connected to +an SD-Card (SPI). For getting efsl to compile, the avr-gcc compiler and +avr-libc library are required. On Windows you should install WinAVR +(http://winavr.sourceforge.net/), on Linux you can install the packages +separately (see http://www.nongnu.org/avr-libc/user-manual/install\_tools.html +for a nice howto). +\subsubsection{Hardware} +First, you need set up a prototype in which you connect the CD, CMD, DAT0 +\& CLK lines from the SD-Card to /CS, MOSI, MISO \& SCK from the Atmega. +\newline +\includegraphics[scale=0.65]{pics/sdcard.eps} +\newline +%\parbox[c]{.4\textwidth}{\begin{center}\includegraphics[width=.4\textwidth]{pics/sdconnection}\end{center}} +\parbox[c]{.5\textwidth}{ +Connect the following lines on the SD-card: +\begin{itemize} + \item{Pin 9 (DAT2) - NC\\(or pull-up to 3.3V)} + \item{Pin 1 (CD) - Any pin on the Atmega128} + \item{Pin 2 (CMD) - MOSI\\(pin 12 on the Atmega128)} + \item{Pin 3 (Vss) - GND} + \item{Pin 4 (Vdd) - +3.3V} + \item{Pin 5 (CLK) - SCK\\(pin 11 on the Atmega128)} + \item{Pin 6 (Vss) - GND} + \item{Pin 7 (DAT0) - MISO\\(pin 12 on the Atmega128)} + \item{Pin 8 (DAT1) - NC\\(or pull-up to 3.3V)} +\end{itemize} +} +\parbox[c]{.5\textwidth}{\begin{center} + \includegraphics[width=.5\textwidth]{pics/sdconnection} + \newline\newline + Remark: this schematic includes pull-up's to 3.3V, which + can be left off. +\end{center}} +\newline +Remark 1: Make sure that your $\mu C$ is running on 3,3V, so you don't +damage your SD-Card.\newline +\newline +Remark 2: CD is currently static set to PB0, but will become variable +in future releases. +\subsubsection{Download \& Compile} +Let's get started: +\begin{enumerate} + \item{Get the latest release of efsl on http://www.sf.net/projects/efsl/} + \item{Unpack the library (on Windows, you can use WinACE or WinRAR)} + \item{Copy \filename{Makefile-AVR} to \filename{Makefile}} + \item{Copy \filename{conf/config-sample-avr.h} to \filename{conf/config.h}} + \item{Compile the library (\code{make lib})} +\end{enumerate} +Now you should have \filename{libefsl.a} in the efsl directory. +\subsubsection{Example} +Since Efsl itself is only a library, it's not supposed to do anything out of +the box, than just compile. To get started, we'll show here a small example +program that opens an existing file and writes the content to a new file. +\newline\newline +First, create a new directory in which you put the compiled efsl-library +(\filename{libefsl.a}) and create a new file called \filename{avrtest.c} containing: +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include + + void hang(void); + + void main(void) + { + EmbeddedFileSystem efs; + EmbeddedFile file_r, file_w; + unsigned short i,e; + char buf[512]; + + if(efs_init(&efs,0)!=0){ + hang(); + } + + if(file_fopen(&file_r,&efs.myFs,"orig.txt",'r')!=0){ + hang(); + } + + if(file_fopen(&file_w,&efs.myFs,"copy.txt",'w')!=0){ + hang(); + } + + while(e=file_read(&file_r,512,buf)){ + file_write(&file_w,e,buf); + } + + file_fclose(&file_r); + file_fclose(&file_w); + + fs_umount(&efs.myFs); + + hang(); + } + + void hang(void) + { + while((1)) + _NOP(); + } +\end{lstlisting} +$ $\newline +Some extra information on the code above: +\begin{itemize} + \item{Line 1: The header file for efsl is included here. When using the + basic efsl functions, \filename{efs.h} is the only header file on the + efsl library that needs to be included.} + \item{Line 7: The object efs is created, this object will contain + information about the hardware layer, the partition table and + the disc.} + \item{Line 8: The objects \code{file\_r} and \code{file\_w} are created, these objects + will contain information about the files that we will open on the + efs-object.} + \item{Line 9: A buffer of 512 bytes is allocated. This buffer will be + used for reading and writing blocks of data.} + \item{Line 12: Call of \code{efs\_init()}, which will initialize the efs-object. + To this function we pass: + \begin{enumerate} + \item{A pointer to the efs-object.} + \item{A pointer to the file that contains the partition table / + file system (in this example, we select a device as file).} + \end{enumerate} + If this function returns 0, it means that a valid fat partition is + found on the SD-card connected. + If no valid fat-filesystem is found, or the file does not exist, the + function returns a negative value. In this example we then go to an + infinite loop to prevent the program to continue.} + \item{Line 16 \& 20: Call of \code{file\_fopen()}, which will initialize the + file-objects. To this function we pass: + \begin{enumerate} + \item{A pointer to the file-object.} + \item{A pointer to the filesystem-object.} + \item{A pointer to the filename.} + \item{A char containing the the mode (read, write, append).} + \end{enumerate} + If this function returns 0, it means the file has successfully been + opened for reading / writing / appending. + If the file could not be opened (because for example a file already + exists), a negative value is returned.} + \item{Line 24: Call of \code{file\_read()}, which will read a given value of + bytes (in this example 512) from a file and put it's content into + the buffer passed (in this example called buf). This function returns + the amount of bytes read, so the while-loop will be executed as long + as there are bytes left in the file.} + \item{Line 25: Call of \code{file\_write()}, which will write a given value + of bytes (in this example, the amount of bytes that was read + by \code{file\_read()}) from the buffer passed to a file. This function returns + the amount of bytes written.} + \item{Line 28 \& 29: Call of \code{file\_fclose()}, which will close the + file-objects.} + \item{Line 31: Call of \code{fs\_umount()}, which will write all buffers to + the the SD-card.} +\end{itemize} +\subsubsection{Testing} +So now let's test the program: +\begin{enumerate} + \item + { + Make sure that your directory contains both the example from above + called \filename{avrtest.c} and the library \filename{libefsl.a}. + } + \item + { Compile the program: + \begin{itemize} + \item{On Linux (with avr-gcc): avr-gcc -I/home/user/efsl/inc/ + -I/home/user/efsl/conf -ffreestanding -mmcu=atmega128 -Os -o + avrtest.o avrtest.c -L./ -lefsl} + \item{On Windows (with WinAVR): avr-gcc + -Ic:$\backslash$efsl$\backslash$inc + -Ic:$\backslash$efsl$\backslash$conf + -ffreestanding -mmcu=atmega128 -Os -o + avrtest.o avrtest.c -L.$\backslash$ -lefsl} + \end{itemize} + } + \item{Generate a hexfile + (avr-objcopy -j .text -j .data -O ihex avrtest.o avrtest.hex)} + \item{Connect an SD-card to your Atmega128 with a file called + \filename{orig.txt} on it.} + \item + { + Flash the hex file into your $\mu C$. + \begin{itemize} + \item{On Linux: avrdude -P /dev/ttyUSB0 -c stk500 -p m128 -Uflash:w:avrtest.hex} + \item{On Windows: use Atmel AVR-Studio} + \end{itemize} + } + \item{Reset your $\mu C$ and wait some time (depending on how big + the file \filename{orig.txt} is).} + \item{Disconnect the SD-card, so you can put it in your card reader + and find out if the file \filename{orig.txt} is copied to + \filename{copy.txt}.} +\end{enumerate} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/config.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/config.tex new file mode 100644 index 000000000..f91ba0f39 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/config.tex @@ -0,0 +1,194 @@ +In this section we're going to talk about the configuration file (\filename{config.h}), +that defines the behavior of the library. In the configuration files there are many +settings, most of which default to safe or 'standard' compliant settings. + +For every platform we try to deliver a sample configuration, with setting tweaked for +that architecture. This documentation only refers to the general elements which are +tied to the library rather that the target hardware. + +\subsection{Hardware target} +Here you will define what kind of hardware you will be using. Please refer to +section \ref{hwdriver} to learn how to write a hardware endpoint. +Here you must \code{\#define} the name of your hardware endpoint. +The following list contains the endpoints that the library ships with.\\ +\begin{tabular}{|l|p{8cm}|} + \hline + \code{HW\_ENDPOINT\_LINUX}& This endpoint uses a regular file as + a "disc" containing a filesystem. This is a great endpoint for + testing and debugging. All development is done using this emulation.\\ + \code{HW\_ENDPOINT\_ATMEGA128\_SD}& This endpoint is for the Atmel ATMega 128 + with an SD card attached to the SPI pins of the device. Several settings + that are specific for this endpoint can be found in the AVR sample + configuration. A Makefile is also provided for compiling the EFSL library + using avr-gcc.\\ + \code{HW\_ENDPOINT\_DSP\_TI6713\_SD}& This endpoint is for a TI DSP, it should + work with any McBSP port, due to the infinite amount of options, you should + refer to the source code of this endpoint for fine tuning, or selecting what + port to use (defaults to McBSP0).\\ + \hline +\end{tabular} + +\subsection{Memory configuration} +This section only has one option, called \code{BYTE\_ALIGNMENT}. If you define +this keyword the library will assume that your CPU is capable of accessing the +memory in any way it sees fit. This is the case on AVR, because they are 8 bit +processors, and it is also the case on Intel x86 hardware. Both architectures can +read and write words, or double words on any location in memory, be it word aligned +or not. + +However, some CPU's, are not capable of doing this, and require that all double words +are aligned on a double word boundary, and all word are aligned on a word boundary. +This causes problems with some of the casts that are performed in EFSL. If you have such +a CPU, then you must comment this option out. The effect is that special functions +will be used to copy or cast memory. These functions work around the problem by +using memCpy, or manually copying elements of the structs that are normally cast when +\code{BYTE\_ALIGNMENT} is defined. + +If you have an 8 bit architecture, or are running on PC, there is no need to turn this +off. If you do, the library will work fine, and maybe even without slowdown. +On architectures that do have the alignment problem, you should turn this flag off. +Failure to do so will result in undefined behavior. + +\subsection{Cache configuration} +This section is dedicated to configuring the cache memory for the library. Caching +is performed by the IOMan object, see section \ref{ioman}. +\subsubsection*{IOMAN\_NUMBUFFER} +This number determines how much memory will be used for caching. Since this +is sector based one \code{IOMAN\_NUMBUFFER} equals to 512 byes of memory, plus +a small overhead in settings (approximately 8 bytes). This number is also affected +by \code{IOMAN\_NUMITERATIONS}. + +You should carefully consider how much memory you will dedicate to caching. A too +low number will cause excessive data transfer to and from the disc, where a too high +number will simply be a waste of memory. + +A good rule of thumb is to use 1 buffer per filesystem you create, and 2 buffers +per file you want to use simultaneously. So for a simple application with +one filesystem, and one file operation, 2 or 3 buffers will be fine. If you have memory +to spare, you can use 6 buffers. Using more buffers will have a minimal effect on +performance. + +If you want to seek and rewrite portions of a file, add an extra buffer for that file. +Using the list function or creating directories will be disc intensive, try to smoothen +it by using an extra 3 buffer for either operation. + +It is perfectly possible to have multiple files op for reading and writing, on different +filesystems, with listing etc and only using 1 buffer. It will be a tough blow on +performance though. +\subsubsection*{IOMAN\_NUMITERATION} +This number controls how many stack places each cache place gets. Refer to the IOMan +section for an explanation. In short, if you only have 1 buffer, leave it at 3. If you +use more than 4 buffers try decreasing the number to 2 or 1 for a small memory gain. + +If you get errors, it means you have set it too low (see error support). It is best +to leave this at the default setting (do not increase it), unless you know what you +are doing. +\subsubsection*{IOMAN\_DOMEMALLOC} +This configures how IOMan will get it's memory. If you leave it enable, the memory +will be allocated by IOMan itself. That means that when you declare the IOMan object +it will have a member the size of $512 \cdot \mathrm{IOMAN\_NUMBUFFER}$. +That also means that that huge lump of memory will reside on the stack. On a true embedded platform with no malloc, this is your best option. +The last argument of \code{ioman\_init} will be ignored. + +If you comment this out,IOMan will take a \code{euint8*} pointer as it's third +argument to \code{ioman\_init}. It will use the memory pointed to as cache. +You will have to make sure it's reserved and of the correct size. +This allows you to put the memory on the heap, or perform special tricks like +deallocating it without having to umount your filesystem and open files. +On systems with malloc, this is the recommended setting. + +If you use the efs wrapper object, please look at the \code{efs\_init} documentation +on how to pass the ioman pointer. + +\subsection{Pre-allocation} +Our VFAT module supports the concept of pre-allocation. When writing files, for +example log files, it is usually done with tiny bits a time. That is not the +most efficient way, but it is usually the only solution that works on embedded +systems. Every time you cross a cluster boundary with your write, the library +has to search a new cluster (reading the FAT), allocate it (write to the FAT). + +Clearly, this is a waste. The solution we came up with was preallocating. This means +that when you write to a file, and fwrite sees that it needs to allocate more clusters, +it will allocate too many of them. Since this is done in one operation, it requires +usually only one read and one write to the FAT. This can save up to 50\% disc I/O +in some applications. + +The drawback is that the allocation happens in larger chunks, if you do this with +many files, you might end up with larger than normal amounts of slackspace. + +We have also implemented this feature for directories. This is very useful if you +have to create a lot of small files, since the directories grow by larger portions +then. + +\subsubsection*{CLUSTER\_PREALLOC\_FILE} +This number determines the default value of extra clusters that will be allocated +with every sizeincrease. For example, if fwrite calculates that it needs 7 clusters, +and \code{CLUSTER\_PREALLOC\_FILE} is 30 then efsl will allocate 37 clusters. +This means (assuming every write needs 7 clusters) that the next 4 writes won't +require any write operation to the FAT (and due to the cluster cache the FAT will probably have to be read only once). + +The value you put here will be the default value, it can be changed per file +object. (not yet implemented). + +\subsubsection*{CLUSTER\_PREALLOC\_DIRECTORY} +The same explanation as above counts, only this value is used for directories. +Generally you should not put this above 10 (unless your speed tests prove otherwise +off course). + +\subsection{Endianness} +The Microsoft FAT filesystem was originally created to be run on Intel compatible hardware. +Therefore the Microsoft programmers decided to record all data on the disc in little endian +format. Our library supports running on big endian devices. Here you can select whether your +target CPU is little or big endian. + +Running on big endian will cause some performance lose because (rather simple) calculations have +to be made to all numbers that have to interpreted by the library. This does not apply to +data within the files off course. + +If the flag \code{\#LITTLE\_ENDIAN} is set, efsl will assume that your hardware is little endian. +If you have a big endian system, you should comment this out. The function \code{fs\_checkEndian} +will tell you if you have selected the right endianness, this is a check you might want to use. + +\subsection{Date and time} +This flag determines if you want to have date and time support. With date and time support we +mean that when you create or update a file the directory entry will receive the correct date and +time stamp. + +Please refer to section \ref{dateandtime} to learn more about how this works. + +If you disable date and time support by commenting the \code{\#DATE\_TIME\_SUPPORT} then +all dates and times that need to be created or updated will be set to zero, which in FAT land corresponds to the first of January of the year 1970. + +\subsection{Errors} +When the library encounters an error, there be an error cascade moving from the error-causing object +to the topmost object where the request started. Seen from userland this gives you extremely little +information, usually nothing more than fail or success. + +Every object in the library has an optional error field, that contains a unique number that +corresponds to a specific error. If you examine every error field you can see exactly where the +error was started and what the effect was on the higher level objects. + +In a more practical sense you can display an error number or explanation to your users, giving +yourself or them a better chance to correct or avoid the problem. +Please see the section on error on what every value means. + +\subsection{Debug} +In the config, debugging can be turned on or off by defining DEBUG. This can be +very useful when hacking on the efsl library, or when something goes wrong. +In applications this option should be turned off. + +The debugging behaviour will depend on the platform you are using: +\begin{itemize} + \item{On Linux debug lines will printed to the console} + \item{On AVR debug will be sent over a selected UART\\ + Make sure you set the following two values in your config.h: + \begin{itemize} + \item{DEBUG\_PORT: here you need to set which UART the library + may use} + \item{DEBUG\_UBRR: here you need to select the UBRR-value + (see the avr-datasheets for these values)} + \end{itemize} + } + \item{On DSP debug will call the printf function + (can only be used with a dsk-board)} +\end{itemize} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/dateandtime.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/dateandtime.tex new file mode 100644 index 000000000..7239020f8 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/dateandtime.tex @@ -0,0 +1,34 @@ +\label{dateandtime} +The EFSL library supports setting and updating all date and time fields +supported by the filesystem. In order to do this the library must +know the current time and date at all times. Since it has to run everywhere, +there is no standard mechanism to get the date/time, and some systems do +not have a clock. + +With default configuration there is no date or time support, you have to +turn it on manually in the configuration file \filename{config.h}. +You will have to uncomment the field named \code{\#define DATE\_TIME\_SUPPORT}, +in order to activate date/time support. + +Furthermore you will have to provide the library with date and time information. +A set of defines was used for this, when date/time support is not enabled, +the defines automatically return \code{0x0000} for all time and date fields, +so there is no performance suffer when you do not need date/time support. +If you do need it you will have to provide 6 functions to the library +that will tell it the time. Since these functions may get called often, +it is highly recommended that you cache the time result somewhere so +you can serve the library directly from ram. If you do not do this and +your RTC request take a lot of time, you may suffer large losses in read +or write operations depending on your hardware. + +The six functions are: +\begin{itemize} + \item\code{euint16 efsl\_getYear(void)} + \item\code{euint8 efsl\_getMonth(void)} + \item\code{euint8 efsl\_getDay(void)} + \item\code{euint8 efsl\_getHour(void)} + \item\code{euint8 efsl\_getMinute(void)} + \item\code{euint8 efsl\_getSecond(void)} +\end{itemize} +Internally the library will recalculate these numbers to match the +filesystem that is currently in use. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/debug.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/debug.tex new file mode 100644 index 000000000..c07ca24f7 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/debug.tex @@ -0,0 +1,40 @@ +Since debugging on every device is completely different, a DBG macro is +implemented. On Linux for example, this macro will print the string given +to the screen (using printf). On AVR, it will send debug strings through the +UART. For compatibility with other devices, it is necessary that you always use +the DBG-macro instead of a device-specific debugging commands.\newline +\newline +Because AVR-GCC puts strings in sram memory by default, every string should be +surrounded by the TXT-macro. On AVR, this macro will put the string in program +memory (flash), on any other device, this macro will be ignored.\newline +\newline +Example of a debug string:\\ +\code{DBG((TXT("This is test nr \%d of \%d.$\backslash$n"),id,total));} + +\subsubsection{Debugging on Linux} +On linux, debugging strings are sent to stdout using printf.\newline +\newline +To enable debugging, set DEBUG in \filename{config.h}. +\subsubsection{Debugging on AVR} +On AVR, debugging strings are sent through the UART and can be read using +a terminal like minicom (linux) or hyperterminal (windows). Standard, the +first UART is used, but this can be changed in \filename{debug.c} to the +second UART.\newline +\newline +To enable debugging: +\begin{itemize} + \item{Set DEBUG in \filename{config.h}} + \item{Set DEBUG\_PORT to the number of the UART efsl may use for debugging + in \filename{config.h}} + \item{Set DEBUG\_UBRR according to your baudrate \& clock speed in + \filename{config.h} (see the avr datasheet for this value)} + \item{Initialize debugging in your program by calling \code{debug\_init()}} +\end{itemize} +Remark: when you use the serial port in your main program, make sure you +use a different UART than the one efsl is using when sending debug string. +\subsubsection{Debugging on DSP} +On DSP, debugging strings are sent to Code Composer using the printf function. +\newline\newline +To enable debugging, set DEBUG in \filename{config.h}.\newline +\newline +Remark: this will only work when using a DSK-kit. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/driver.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/driver.tex new file mode 100644 index 000000000..67b4b93de --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/driver.tex @@ -0,0 +1,165 @@ +\label{hwdriver} +This section will describe step by step how to write an hardware endpoint. +You will be required to write your own endpoint in case non of the existing endpoints +matches your hardware. + +First let's have a look at how EFSL is structured internally.\\\\ +\includegraphics[scale=0.4]{schematics/objectmodel.eps}\\ + +As you can see we have created a linear object model that is quite simple. +The file en filesystem object deal with handling the filesystem specific stuff. +Below that we find the Partition object that is responsible for translating partition +relative addressing into disc-based LBA addressing. + +The Disc object hold the partition table, and has a direct link to a cache manager, IOMan. +In IOMan, all requests for disc sectors come together. IOMan will perform checks to see +if sectors have to be read from disc (or from memory), or written back to disc. +In the latter case (reading or writing to disc), a request is made to the hardware layer. + +The hardware interface has 3 responsibilities : +\begin{itemize} + \item Initialize the hardware + \item Read sectors from disc + \item Write sectors to disc +\end{itemize} + +All requests are \textsl{sector}based, a sector is a 512 byte piece from the disc, that is aligned to +a 512 byte boundary.\\\\ +\includegraphics[scale=0.4]{schematics/sector.eps} + +In this example we will create a new endpoint that will add support for data over pigeon carrier +for the EFSL. Initializing the hardware will require feeding the pigeon and telling it where the +data is. Reading/Writing will entail giving the bird the sector and letting it fly. + +Perform the following steps: +\begin{enumerate} + + \item Choose a name for your endpoint\\ + You will need this name to create the required defines in the source code. + For our example I've chosen the name \code{PIGEON\_CARRIER}. + For consistency the final name is then \code{HW\_ENDPOINT\_PIGEON\_CARRIER}. + + \item Verify the sizes of integers\\ + Open \filename{inc/types.h} and create a new entry for pigeon carriers. Perhaps + one of the existing sets is identical to yours and you can copy-paste it. + + \item Add your endpoint to \filename{interface.h}\\ + Locate the file \filename{interface.h} located in the directory \filename{inc/} + Add a pigeon entry (located above the \code{\#else ... NO INTERFACE DEFINED}) +\begin{lstlisting} +#if defined(HW_ENDPOINT_0) + #include "interfaces/0.h" +#elif defined(HW_ENDPOINT_1) + #include "interfaces/1.h" +#elif defined(HW_ENDPOINT_PIGEON_CARRIER) + #include "interfaces/pigeon.h" +#else + #error "NO INTERFACE DEFINED - see interface.h" +#endif +\end{lstlisting} + + \item Select your endpoint in \filename{conf/config.h} + + \item Create your sourcefiles\\ + Create a header file in \filename{inc/} and a sourcefile in \filename {src/interfaces}. + In this example I'm using \filename{pigeon.h} and \filename{pigeon.c}. + + \item Add your object file to the Makefile + Take the Makefile that works best on your platform (they should all work with + GNU/Make), or create a new one, using the existing one's as a template. + Make sure to include your new pigeon object to the library. + If you have an 'ar' like utility you can create a static library, else you may + have to create a new project containing all required source files. + +\end{enumerate} + +The basic framework is now complete, now all that's left to do is to write the code +that will perform the actual flying work. + +\subsubsection{hwInterface} +This structure represents the underlying hardware. There are some field that are required +to be present (because EFSL uses them), but you may put in as much or a little as +your driver requires to access the hardware. + +As always in embedded design it is recommended to keep this structure as small +as possible. + +Example: +\begin{lstlisting} +struct hwInterface{ + /* Field created for THIS hardware */ + Pigeon pigeon; + + /* Obligatory fields */ + euint32 sectorCount; +}; +typedef struct hwInterface hwInterface; +\end{lstlisting} + +\subsubsection{if\_initInterface} +This function will be called one time, when the hardware object is initialized by +\code{efs\_init()}. This code should bring the hardware in a ready to use state. + +The function's prototype is\\ +\code{esint16 if\_initInterface(hwInterface *hw, euint8* opts);} + +Optionally but recommended you should fill in the hw->sectorCount field with the number +of sectors. This field is used to validate sectorrequests. + +An example of a initInterface function : +\begin{lstlisting} +esint16 if_initInterface(hwInterface *hw, euint8* opts) +{ + /* Parse options */ + parse_options(opts); /* Your application may not need options */ + + /* Check hardware state */ + if(!alive(hw->pigeon)){ + //printf("Pigeon died! :-(\n"); + return(DEAD_PIGEON); /* #define DEAD_PIGEON -1 */ + } + + /* Initialize hardware */ + feed(hw->pigeon); + pet (hw->pigeon); + + /* Get sectors count */ + hw->numSectors = ask_pigeon_num_sectors(hw->pigeon); + + return(0); +} +\end{lstlisting} + +\subsubsection{if\_readBuf} +This function is responsible to read a sector from the disc and store it in a user supplied buffer. You will receive the hardware object, an address and a pointer to memory for storing +the buffer. + +Please be very careful to respect the boundaries of the buffers, since it will usually be IOMan +calling this function, and if you have a buffer overflow you might corrupt the cache of the +the next buffer, which in turn may produce extremely rare and impossible to retrace behavior. + +The function prototype is:\\ +\code{esint16 if\_readBuf(hwInterface *hw,euint32 address, euint8* buf);} + +The address is an LBA address, relative to the beginning of the disc. Should you be +accessing an old hard disc, or a device which uses some other form of addressing you will have to +recalculate the address to your own addressing scheme. Please note that there is no support +for sectors that are not 512 bytes large. + +\begin{lstlisting} +esint8 if_readBuf(hwInterface* hw,euint32 address,euint8* buf) +{ + Message new_message; + + new_message.address = address; + new_message.command = READ; + + pigeon_send(hw->pigeon,new_message); /* Launches the pigeon */ + while(!pigeon_returned(hw->pigeon)); /* Wait until the bird is back */ + memcpy(new_message.data,buf,512); /* Copy buffer */ + return(0); +} +\end{lstlisting} + +\subsubsection{if\_writeBuf} +The function \code{if\_writeBuf} works exactly the same as it's reading variant. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/efs_init.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/efs_init.tex new file mode 100644 index 000000000..5bedf0229 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/efs_init.tex @@ -0,0 +1,45 @@ +\subsubsection*{Purpose} +Initializes the hardware and the software layer. +\subsubsection*{Prototype} +\code{esint8 efs\_init(EmbeddedFileSystem *efs, eint8* opts);} +\subsubsection*{Arguments} +Objects passed to \code{efs\_init}: +\begin{itemize} + \item{\code{efs}: empty EmbeddedFileSystem object} + \item + { + \code{opts}: character string containing options, depending on what + interface you are using: + \begin{itemize} + \item{Linux: opts points to the path to the device} + \item{AVR: opts points to the card enable pin (TODO)} + \item{DSP: opts points to the card enable memory address (TODO)} + \end{itemize} + } +\end{itemize} +\subsubsection*{Return value} +Returns 0 if no errors are detected.\\ +\newline +Returns non-zero if a low-level error is detected: +\begin{itemize} + \item{Returns -1 if the interface could not be initialized.} + \item{Returns -2 if the filesystem could not be initialized.} +\end{itemize} +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + esint8 ret; + + DBG((TXT("Will init efsl now.\n"))); + ret=efs_init(&efsl,"/dev/sda"); + if(ret==0) + DBG((TXT("Filesystem correctly initialized.\n"))); + else + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + } +\end{lstlisting} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/file_fclose.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/file_fclose.tex new file mode 100644 index 000000000..fb0eaaf6f --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/file_fclose.tex @@ -0,0 +1,43 @@ +\subsubsection*{Purpose} +Updates file records and closes file object. +\subsubsection*{Prototype} +\code{esint8 file\_fclose(File *file);} +\subsubsection*{Arguments} +Objects passed to \code{file\_fopen}: +\begin{itemize} + \item{\code{file}: pointer to a File object} +\end{itemize} +\subsubsection*{Return value} +Returns 0 if no errors are detected.\\ +\newline +Returns non-zero if an error is detected. +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + File file; + + /* Initialize efsl */ + DBG((TXT("Will init efsl now.\n"))); + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + DBG((TXT("Filesystem correctly initialized.\n"))); + + /* Open file for reading */ + if(file_fopen(&file, &efsl.myFs, "read.txt", 'r')!=0){ + DBG((TXT("Could not open file for reading.\n"))); + exit(-1); + } + DBG((TXT("File opened for reading.\n"))); + + /* Close file & filesystem */ + fclose(&file); + fs_umount(&efs.myFs); + } +\end{lstlisting} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/file_fopen.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/file_fopen.tex new file mode 100644 index 000000000..58700f6a7 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/file_fopen.tex @@ -0,0 +1,70 @@ +\subsubsection*{Purpose} +Searches for file and initializes the file object. +\subsubsection*{Prototype} +\code{esint8 file\_fopen(File *file, FileSystem *fs, eint8 *filename, eint8 mode);} +\subsubsection*{Arguments} +Objects passed to \code{file\_fopen}: +\begin{itemize} + \item{\code{file}: pointer to a File object} + \item{\code{fs}: pointer to the FileSystem object} + \item{\code{filename}: pointer to the path + filename} + \item + { + \code{mode}: mode of opening, this can be: + \begin{itemize} + \item{'r': open file for reading} + \item{'w': open file for writing} + \item{'a': open file for appending} + \end{itemize} + } +\end{itemize} +\subsubsection*{Return value} +Returns 0 if no errors are detected.\\ +\newline +Returns non-zero if an error is detected: +\begin{itemize} + \item{Returns -1 if the file you are trying to open for reading could not + be found.} + \item{Returns -2 if the file you are trying to open for writing already + exists.} + \item{Returns -3 if no free spot could be found for writing or appending.} + \item{Returns -4 if mode is not correct (if it is not 'r', 'w' or 'a').} +\end{itemize} +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + File file_read, file_write; + + /* Initialize efsl */ + DBG((TXT("Will init efsl now.\n"))); + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + DBG((TXT("Filesystem correctly initialized.\n"))); + + /* Open file for reading */ + if(file_fopen(&file_read, &efsl.myFs, "read.txt", 'r')!=0){ + DBG((TXT("Could not open file for reading.\n"))); + exit(-1); + } + DBG((TXT("File opened for reading.\n"))); + + /* Open file for writing */ + if(file_fopen(&file_write, &efsl.myFs, "write.txt", 'w')!=0){ + DBG((TXT("Could not open file for writing.\n"))); + exit(-2); + } + DBG((TXT("File opened for writing.\n"))); + + /* Close files & filesystem */ + fclose(&file_read); + fclose(&file_write); + fs_umount(&efs.myFs); + } +\end{lstlisting} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/file_read.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/file_read.tex new file mode 100644 index 000000000..07709801d --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/file_read.tex @@ -0,0 +1,51 @@ +\subsubsection*{Purpose} +Reads a file and puts it's content in a buffer. +\subsubsection*{Prototype} +\code{euint32 file\_read (File *file, euint32 size, euint8 *buf);} +\subsubsection*{Arguments} +Objects passed to \code{file\_read}: +\begin{itemize} + \item{\code{file}: pointer to a File object} + \item{\code{size}: amount of bytes you want to read / put in buf} + \item{\code{buf}: pointer to the buffer you want to store the data} +\end{itemize} +\subsubsection*{Return value} +Returns the amount of bytes read. +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + euint8 buffer[512]; + euint16 e, f; + File file; + + /* Initialize efsl */ + DBG((TXT("Will init efsl now.\n"))); + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + DBG((TXT("Filesystem correctly initialized.\n"))); + + /* Open file for reading */ + if(file_fopen(&file, &efsl.myFs, "read.txt", 'r')!=0){ + DBG((TXT("Could not open file for reading.\n"))); + exit(-1); + } + DBG((TXT("File opened for reading.\n"))); + + /* Read file and print content */ + while((e=file_read(&file,512,buffer))){ + for(f=0;f + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + euint8 *buffer = "This is a test.\n"; + euint16 e=0; + File file; + + /* Initialize efsl */ + DBG((TXT("Will init efsl now.\n"))); + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + DBG((TXT("Filesystem correctly initialized.\n"))); + + /* Open file for writing */ + if(file_fopen(&file, &efsl.myFs, "write.txt", 'w')!=0){ + DBG((TXT("Could not open file for writing.\n"))); + exit(-1); + } + DBG((TXT("File opened for reading.\n"))); + + /* Write buffer to file */ + if( file_write(&file,strlen(buffer),buffer) == strlen(buffer) ) + DBG((TXT("File written.\n"))); + else + DBG((TXT("Could not write file.\n"))); + + /* Close file & filesystem */ + fclose(&file); + fs_umount(&efs.myFs); + } +\end{lstlisting} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/freespace.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/freespace.tex new file mode 100644 index 000000000..05988bc86 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/freespace.tex @@ -0,0 +1,35 @@ +\hyphenation{count-Free-Clusters File-System} + +To get the free space left on EFSL 0.2 is a bit tricky. This +feature was implemented after it had gone into stable, so it +couln't interfere with other library functions. + +If the filesystem type is FAT12 of FAT16, you must call\\ +\code{euint32 fat\_countFreeClusters (FileSystem *fs)} to know +the amount of free clusters. Please note that this is an expensive +function call in terms of speed. It will also work on FAT32 volumes, +but there is a better alternative for that. + +Usually FAT32 volumes are substantially larger than FAT12 of FAT16 volumes. +Microsoft, in it's infinite wisdom, decided to use the second sector of +the partition to dump various statistics about the filesystem. Problem +is they are inaccurate, so if you want to be really sure, always use the +beforementioned countFreeClusters function. + +To save time, you can also use \code{esint8 fs\_getFsInfo(FileSystem *fs,euint8 force\_update)}. +If force\_update is set to 0, this function will simply gather the data +that is stored on the disc regarding free space. If you call it with +force\_update set to 1, it will gather this data, but correct the result +with a call to countFreeClusters. +After that you will find the result in fs->FreeClusterCount. + +To save time, call getFsInfo after you mounted the filesystem, +and just before you umount the filesystem give a call to setFsInfo. +This will make the updated clustercount get written to disc, so you +don't have to go through the lenghty verification everytime. +The functions that have the largest impact on free space (allocClusterChain +and unlinkClusterChain) keep track of the changes they make and they update +the fs->FreeClusterCount field accordingly. + +This is an ugly ``add-on'', and will be replaced by a decent implementation +in the 0.3/0.4 series. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/ioman.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/ioman.tex new file mode 100644 index 000000000..cb14b2ae6 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/ioman.tex @@ -0,0 +1,236 @@ +\label{ioman} +The IOManager that is the second lowest layer of the embedded filesystems library is +responsible for coordinating disk input and output, as well as managing a caching +system. This documentation describes the second implementation of IOMan, which includes +features such as : +\begin{itemize} + \item Delayed write + \item Buffer reference statistics + \item Buffer exportable to users + \item Support for cached direct I/O as well as indirect I/O + \item Can allocate memory itself (on the stack), or you can do it yourself (heap) +\end{itemize} + +\subsubsection{General operation} +Because of the limited memory nature of most embedded devices for which this library is +intended several design decisions were made to minimize memory usage. Some of these required +that some concessions be made. One of them is that there is no memory protection, since +most devices don't have the memory to support this, or lack the ability to protect memory. + +When IOMan receives a request for a sector, it will make sure it has the sector in it's +own memory cache and then give the caller a \code{euint8*} pointer to that cache. The +user is then free to do operations on that memory, and when it is done it should tell +IOMan so. Several things can go wrong with this: you can request a sector for reading, +and then write in the cache, thereby corrupting it. Or you can request a sector, but never +release it (sort of a memory leak), which may result in very bad performance, and a deadlocked +I/O manager. + +But, taking into account that very little memory is required for operation, if you follow the I/O man rules, you will get a pretty clever caching object that will make writing new filesystems +a simple job. + +\subsubsection{Cache decisions} +Whenever ioman receives a request to fetch a sector, be it read or write, it will have to make sure +it has, or can get the sector you want. It follows a certain path to do this.\label{cachemethod} +\begin{enumerate} + \item First of all it will scan it's cache range to see if it already has the sector. + If it is found, and it was a write request, the cache is marked writable. Usage and + reference get incremented and a pointer is then returned to the requester. If the + buffer cannot be found, ioman proceeds to step 2. + \item When an item is not in cache, it has to be fetched from the disc, the best place to + store it is in memory that does not contain anything useful yet. Ioman will search for + a place that is currently not occupied by anything. If it is found, the sector will be + placed on that spot and a pointer returned. Else, ioman proceeds to step 3. + \item Since there is no other choice than to overwrite an already existing cache, ioman will + try to find one that is the least interesting. First it will search for caches that + are marked not writable, and have no users. Ioman will then select the one that has the + least references. If there are none, it will search for caches that don't have users and + are writable. Once again the one with the least references is returned. Since it is + writable ioman will flush it to disc first. After that the requested sector is put there + and a pointer returned. If it cannot find any caches that have no users it will go to + step 4. + \item Since every cache spot is in use ioman will have to select one for overallocation. + Since this selection is dependant on many factors and is rather complex, a points + system is used. The algorithm considers every cache place and allocated a certain number + of points to it, lower means that it is a better candidate for overallocation. Fifty + percent of the points goes to the cache being marked writable, since having to write + a sector is expensive. Another 35 percent goes to how many overallocations have + already been done on that spot. It doesn't make sense to always overalloc the same buffer, + it is better to spread this. The remaining 15 percent is determined by the number of + references to the sector. + + After a function has selected the best candidate, ioman will overwrite that spot with + the new sector. It will also push the status and sectornumber onto that cache's + retrieval stack, so that when the sector is released, the older sector can be retrieved. + If this fails go to step 5. + \item When ioman gets here it will return a (nil) pointer and flag an error. +\end{enumerate} + +\subsubsection{Functions} + +\begin{longtable}{|p{0.35\textwidth}|p{0.65\textwidth}|} + + \hline + \multicolumn{2}{|c|}{ + \textbf{I/O Manager Functions} + } \\ + \multicolumn{2}{|c|}{} \\ + \hline + \hline + \endfirsthead + + \hline + \multicolumn{2}{|c|}{\textbf{I/O Manager Functions (continued)}} \\ + \hline + \endhead + + \hline + \endfoot + + \hline + \endlastfoot + + \code{ioman\_init} & \code{esint8 (IOManager *ioman, hwInterface *iface, euint8* bufferarea)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function is called to initialize the internal state of the I/O manager. It should be the + first function you call on an ioman object. Failure to do so will result in undefined behavior. + The function clears all internal variables to a default safe state, and sets up it's memory region. + + There are two possibilities, if you supply a 0 pointer then a function will be called that contains + a static variable with a size of 512 * \code{IOMAN\_NUMBUFFERS}, else, it will be assumed that + you allocated that memory yourself and the pointer you provided will be used. + }\\ + \hline + + \code{\external{ioman\_reset}} & \code{void (IOManager *ioman)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function is called from the initialization function, it does the actual reset of all variables. + }\\ + \hline + + \code{ioman\_pop} & \code{esint8 (IOManager *ioman,euint16 bufplace)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function fetches settings (sector number, usage and status register) from stack \code{bufplace} + and puts it back on the main registers. It will return 0 on succesful pop, and -1 on error, or when + there are no elements to pop. + }\\ + \hline + + \code{ioman\_push} & \code{esint8 (IOManager *ioman,euint16 bufplace)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function pushes the settings of cache \code{bufplace} onto that cache's stack. It does not + destroy the data in the main registers. It will return 0 for a successful push, and -1 on error, or + when there is no more space to push a new element. + }\\ + \hline + + \code{ioman\_readSector} & \code{esint8 (IOManager *ioman,euint32 address,euint8* buf)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function does the actual reading from the hardware, it is the one and only function that + calls \code{if\_readBuf()}, here a retry on failure policy could be implemented. This function + will correctly stream errors upwards. All calls made to this function in the iomanager are checked + for their return value, so errors propagate correctly upwards. + + The address it receives is relative to the beginning of the disc, no assumptions about \code{buf} + may be made, it can be withing ioman's cache memory range, but it could also be a buffer from userspace. + + The function will return 0 on success and -1 on failure. + }\\ + \hline + + \code{ioman\_writeSector} & \code{esint8 (IOManager *ioman, euint32 address, euint8* buf)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function does the actual writing to the hardware, it is the one and only function that + calls \code{if\_writeBuf()}, here a retry on failure policy could be implemented. This function + will correctly stream errors upwards. All calls made to this function in the iomanager are checked + for their return value, so errors propagate correctly upwards. + + The address it receives is relative to the beginning of the disc, no assumptions about \code{buf} + may be made, it can be withing ioman's cache memory range, but it could also be a buffer from userspace. + + The function will return 0 on success and -1 on failure. + }\\ + \hline + + \code{\external{ioman\_getSector}} & \code{euint8* (IOManager *ioman,euint32 address, euint8 mode)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function is the one that is called most from the higher library routines. It is the function + that will present you with a pointer to memory containing sector number \code{address}. There are + several modes that you can select or combine.\newline + \begin{tabular}{|l|p{.6\textwidth}|} + \hline + \code{IOM\_MODE\_READONLY} & This attribute says to ioman that it needs a buffer only for reading. + This does not mean that you are allowed to write to it, doing so results in undefined behavior. + You cannot combine this option with the \code{IOM\_MODE\_READWRITE} option.\\ + \code{IOM\_MODE\_READWRITE} & This attribute says to ioman that it would like not only to read from + but also to write to that buffer. When you release the sector your changes will be written to disc. + This may not happen immediately though, if you want to force it take a look at the + \code{ioman\_flushRange()} function. This option cannot be combined with the + \code{IOM\_MODE\_READONLY} option.\\ + \code{IOM\_MODE\_EXP\_REQ} & This option tell the iomanager that the request is exceptional, for + example that the request is unlikely to happen again. The library adds this flags to the options + when requesting the bootrecord, to prevent it from getting a high rating, which should prevent it + from being removed from the cache.\\ + \hline + \end{tabular}\newline + These options can be combined by ORing them together. + }\\ + \hline + + \code{ioman\_releaseSector} & \code{esint8 (IOManager *ioman,euint8* buf)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function tells ioman that you are done with one of the cache elements and that it can do + it's bidding with it. Forgetting to call this function may result in deadlocked iomanagers. + }\\ + \hline + + \code{ioman\_directSectorRead} & \code{esint8 (IOManager *ioman,euint32 address, euint8* buf)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This is a variant of the normal getsector. Sometimes you need a sector from the disc, but all + you want to do with it is export it directly to userbuffers. It would be foolish to force a + caching of that sector if there is external space available for it. + + This function will fetch sector \code{address} from disc and place it in the memory pointed to + by \code{buf}. Should there be a free spot available the sector will be cached there, so that + it may be used in the future. If the sector was available from cache in the first place, it + will simply be \code{memCpy()}'d from the cache to the userspace buffer. + }\\ + \hline + + \code{ioman\_directSectorWrite} & \code{esint8 (IOManager *ioman,euint32 address, euint8* buf)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function is based on the same philosophy as \code{ioman\_directSectorRead()}, however, + contrary to what the name may lead to believe it also passes through a caching layer. If + there is an unused spot (or the sector is in cache), the userbuffer will be copied to that + spot and will remain there until the space is needed or a flush is forced. + }\\ + \hline + + \code{ioman\_flushRange} & \code{esint8 (IOManager *ioman,euint32 address\_low, euint32 address\_high)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function is used to ask ioman to flush all sectors to disc that are in a specific + range. For example you might want to flush a specific range of your filesystem without + needlessly disturb other parts. The range is \code{address\_low <= n => address\_high}. + Off course only sectors that are marked as writable are flushed to disc. + }\\ + \hline + + \code{ioman\_flushAll} & \code{esint8 (IOManager *ioman)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function will cause ioman to flush out all cache units that are marked writable. If + they do not have any users, they will lose their writable mark. + }\\ + \hline +\end{longtable} + diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/lgpl.txt b/src/ersky9x/libraries/fat/efsl/docs/pages/lgpl.txt new file mode 100644 index 000000000..487ce55f9 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/lgpl.txt @@ -0,0 +1,489 @@ + GNU LESSER GENERAL PUBLIC LICENSE + Version 2.1, February 1999 + + Copyright (C) 1991, 1999 Free Software Foundation, Inc. + 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + +[This is the first released version of the Lesser GPL. It also counts + as the successor of the GNU Library Public License, version 2, hence + the version number 2.1.] + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/license.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/license.tex new file mode 100644 index 000000000..3ed94f030 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/license.tex @@ -0,0 +1,12 @@ +This library is subject to the Lesser General Public License version 2.1. +We have chosen this license in stead of the BSD license because we feel strongly +that more effort was needed in the field of quality software in the embedded field. + +Please note that if you make changes to the library itself, those modifications must be +made public, but that writing support for new hardware and linking it into the library, +does not fall under this category. However, we would off course appreciate it tremendously +if you would send us in code to support new hardware. + +\subsection{GNU Lesser General Public License} +\verbatiminput{pages/lgpl.txt} + diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/linux.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/linux.tex new file mode 100644 index 000000000..7cc6a6763 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/linux.tex @@ -0,0 +1,138 @@ +Debugging efsl on embedded devices is a rather hard job, because +you can't just printf debug strings or watch memory maps easily. +Because of that, core development has been performed under the +Linux operating system. Under Linux, efsl can be compiled as +library and used as a userspace filesystem handler. On Unix- +style operating system (like Linux), all devices (usb stick, disc, \ldots) +can be seen as a file, and as such been opened by efsl.\newline +\newline +In the following section, we will explain how to get started using +efsl as userspace filesystem handler. However, please note that the main +focus for efsl is to support embedded systems, which usually don't even +have 1\% of the memory you have on a PC. Accessing files on a FAT-filesystem +with efsl will be much slower than when accessing these files with the Linux +FAT kernel modules. +\subsubsection{Download \& Compile} +Let's get started: +\begin{enumerate} + \item{Get the latest release of efsl on http://www.sf.net/projects/efsl/ + and put it in your homedir} + \item{Unpack the library (tar xvfj efsl-version.tar.bz2)} + \item{Get inside the directory (cd $\sim$/efsl)} + \item{Create a symlink from \filename{Makefile-LINUX} to \filename{Makefile} + (ln -s Makefile-LINUX Makefile)} + \item{Copy \filename{conf/config-sample-linux.h} to \filename{conf/config.h} + (cp conf/config-sample-linux.h conf/config.h)} + \item{Compile the library (make lib)} + \item{Find the compiled filesystem library (libefsl.a) in the current + directory} +\end{enumerate} +If you got any errors with the steps above, please check that that you have +the following packages installed: tar, gcc, libgcc, binutils \& make. +\subsubsection{Example} +Since efsl itself is only a library, it's not supposed to do anything +out of the box, than just compile. To get started, we'll show here a small +example program that opens a file on a disc/usb-stick/floppy that contains +a FAT-filesystem and prints it's content to stdout.\newline +\newline +First, create a new directory in which you put the compiled efsl-library +(\filename{libefsl.a}) and create a new file called \filename{linuxtest.c} containing: +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include + #include + + int main(void) + { + EmbeddedFileSystem efs; + EmbeddedFile file; + unsigned short i,e; + char buf[512]; + + if(efs_init(&efs,"/dev/sda")!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + if(file_fopen(&file,&efs.myFs,"group",'r')!=0){ + printf("Could not open file.\n"); + return(-2); + } + + while(e=file_read(&file,512,buf)){ + for(i=0;icurrentEntry}. +\subsubsection*{Prototype} +\code{esint8 ls\_getNext(DirList *dlist);} +\subsubsection*{Arguments} +Objects passed to \code{ls\_getNext}: +\begin{itemize} + \item{\code{dlist}: pointer to a DirList object} +\end{itemize} +\subsubsection*{Return value} +This function will return 0 when it has found a next file in the directory, and +was successful in copying it to \code{dirlist->currentEntry}. It will return -1 +when there are no more files in the directory. + +\subsubsection*{Example} +To browse through a directory you should first open it with \code{ls\_openDir} and +then you can call \code{ls\_getNext} in a loop to iterate through the files. Please +note that they are unsorted. +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} +#include "efs.h" +#include "ls.h" + + void main(void) +{ + EmbeddedFileSystem efsl; + DirList list; + + /* Initialize efsl */ + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); +} + + /* Open the directory */ + ls_openDir(list,&(efsl.myFs),"/usr/bin/"); + + /* Print a list of all files and their filesize */ + while(ls_getNext(list)==0){ + DBG((TXT("%s (%li bytes)\n"), + list->currentEntry.FileName, + list->currentEntry.FileSize)); + } + + /* Correctly close the filesystem */ + fs_umount(&efs.myFs); +} +\end{lstlisting} + +Please note that it is not required to close this object, if you wish to switch +to another directory you can just call \code{ls\_openDir} on the object again. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/lsopendir.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/lsopendir.tex new file mode 100644 index 000000000..9154bc809 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/lsopendir.tex @@ -0,0 +1,42 @@ +\subsubsection*{Purpose} +This function opens a directory for viewing, allowing you to iterate through +it's contents. +\subsubsection*{Prototype} +\code{esint8 ls\_openDir(DirList *dlist,FileSystem *fs,eint8* dirname);} +\subsubsection*{Arguments} +Objects passed to \code{ls\_openDir}: +\begin{itemize} + \item{\code{dlist}: pointer to a DirList object} + \item{\code{fs}: pointer to the FileSystem object} + \item{\code{dirname}: C string containing the directorypath} +\end{itemize} +\subsubsection*{Return value} +This function will return 0 when it has opened the directory, and -1 on error.\\ + +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} +#include "efs.h" +#include "ls.h" + + void main(void) + { + EmbeddedFileSystem efsl; + DirList list; + + /* Initialize efsl */ + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + + /* Open the directory */ + ls_openDir(list,&(efsl.myFs),"/usr/bin/"); + + /* Correctly close the filesystem */ + fs_umount(&efs.myFs); + } +\end{lstlisting} + +Please note that it is not required to close this object, if you wish to switch +to another directory you can just call \code{ls\_openDir} on the object again. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/mkdir.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/mkdir.tex new file mode 100644 index 000000000..826443092 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/mkdir.tex @@ -0,0 +1,47 @@ +\subsubsection*{Purpose} +Creates a new directory. +\subsubsection*{Prototype} +\code{esint8 mkdir(FileSystem *fs,eint8* dirname);} +\subsubsection*{Arguments} +Objects passed to \code{mkdir}: +\begin{itemize} + \item{\code{fs}: pointer to the FileSystem object} + \item{\code{dir}: pointer to the path + name of the new directory} +\end{itemize} +\subsubsection*{Return value} +Returns 0 if no errors are detected.\\ +\newline +Returns non-zero if an error is detected: +\begin{itemize} + \item{Returns -1 if the directory already exists.} + \item{Returns -2 if the path is incorrect (parent directory does not exists).} + \item{Returns -3 if no free space is available to create the directory.} +\end{itemize} +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + + /* Initialize efsl */ + DBG((TXT("Will init efsl now.\n"))); + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + DBG((TXT("Filesystem correctly initialized.\n"))); + + /* Create new directories */ + if(mkdir(&efsl.myFs,"dir1")==0){ + mkdir(&efsl.myFs,"dir1/subdir1"); + mkdir(&efsl.myFs,"dir1/subdir2"); + mkdir(&efsl.myFs,"dir1/subdir3"); + } + + /* Close filesystem */ + fs_umount(&efsl.myFs); + } +\end{lstlisting} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/plibc.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/plibc.tex new file mode 100644 index 000000000..90e5212e2 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/plibc.tex @@ -0,0 +1,62 @@ +This section of the manual describes the minimalistic C library functions that were +created for EFSL. Since EFSL was designed for ultimate portability, no assumptions about the +workings or even the presence of a C library could be made. Fortunately only very few functions +had to be created that mimicked the operations of well known C library functions. +\\ +\begin{longtable}{|p{0.35\textwidth}|p{0.65\textwidth}|} + + \hline + \multicolumn{2}{|c|}{ + \textbf{PLibC Functions} + } \\ + \multicolumn{2}{|c|}{} \\ + \hline + \hline + \endfirsthead + + \hline + \multicolumn{2}{|c|}{\textbf{PLibC Functions (continued)}} \\ + \hline + \endhead + + \hline + \endfoot + + \hline + \endlastfoot + + \code{strMatch} & \code{euint16 strMatch(eint8* bufa, eint8*bufb,euint32 n)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function compares the strings \code{bufa} and \code{bufb} for \code{n} bytes. + It will return the number of bytes in that section that does not match. So if you + want to compare two strings the return value should be 0, for the strings to match over + the entire \code{n} area. + }\\ + \hline + + \code{memCpy} & \code{void memCpy(void* psrc, void* pdest, euint32 size)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function will copy the contents at location \code{psrc} to location \code{pdest} over + a range of \code{size} bytes. + }\\ + \hline + + \code{memClr} & \code{void memClr(void *pdest,euint32 size)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function will set the memory at \code{pdest} to value \code{0x00} for a range of + \code{size} bytes. + }\\ + \hline + + \code{memSet} & \code{void memSet(void *pdest,euint32 size,euint8 data)} \\ + \hline + \multicolumn{2}{|p{\textwidth}|}{ + This function will set the memory at \code{pdest} to value \code{data} for a range of + \code{size} bytes. + }\\ + \hline +\end{longtable} + diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/preface.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/preface.tex new file mode 100644 index 000000000..61302497c --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/preface.tex @@ -0,0 +1,31 @@ +\subsection{Project aims} +The EFSL project aims to create a library for filesystems, to be used on +various embedded systems. Currently we support the Microsoft FAT filesystem +family. It is our intention to create pure ANSI C code that compiles on +anything that bears the name 'C compiler'. We don't make assumptions about +endianness or how the memory alignment is arranged on your architecture. +\newline\newline +Adding code for your specific hardware is straightforward, just add code that +fetches or writes a 512 byte sector, and the library will do the rest. +Existing code can be used, writing your own code is only required when you +have hardware for which no target exists. +\subsection{Project status} +Efsl currently supports FAT12, FAT16 and FAT32. Read and write has been tested +and is stable. Efsl runs on PC (GNU/Linux, development environment), +TMS C6000 DSP's from Texas instruments, and ATMega's from Atmel. +You can use this code with as little as 1 kilobyte RAM, however if you have +more at your disposal, an infinite amount can be used as cache memory. +The more memory you commit, the better the performance will be. +\subsection{License} +This project is released under the Lesser General Public license, which +means that you may use the library and it's sourcecode for any purpose you want, +that you may link with it and use it commercially, but that ANY change to the +code must be released under the same license. We would appreciate if you would send +us a patch when you add support for new hardware, but this is not obligatory, since it +falls under linking as far as the LGPL is concerned. +\subsection{Contact} +You can reach us by email:\\ +\begin{tabular}{ll} + Michael De Nil & michael@flex-it.be\\ + Lennart Yseboodt & len@belf.be\\ +\end{tabular} \ No newline at end of file diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/rmfile.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/rmfile.tex new file mode 100644 index 000000000..cda7a55e7 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/rmfile.tex @@ -0,0 +1,42 @@ +\subsubsection*{Purpose} +Deletes a file. +\subsubsection*{Prototype} +\code{esint16 rmfile(FileSystem *fs,euint8* filename);} +\subsubsection*{Arguments} +Objects passed to \code{rmfile}: +\begin{itemize} + \item{\code{fs}: pointer to the FileSystem object} + \item{\code{filename}: pointer to the path + name of the file to be removed} +\end{itemize} +\subsubsection*{Return value} +Returns 0 if no errors are detected.\\ +\newline +Returns non-zero if an error is detected, most likely that the file does not exist. +\subsubsection*{Note} +If you have opened a file with \code{fopen()}, and you wish to delete it, first +close all instances of that file. If you do not, you may corrupt the filesystem. +\subsubsection*{Example} +\lstset{numbers=left, stepnumber=1, numberstyle=\small, numbersep=5pt, tabsize=4} +\begin{lstlisting} + #include "efs.h" + + void main(void) + { + EmbeddedFileSystem efsl; + + /* Initialize efsl */ + DBG((TXT("Will init efsl now.\n"))); + if(efs_init(&efsl,"/dev/sda")!=0){ + DBG((TXT("Could not initialize filesystem (err \%d).\n"),ret)); + exit(-1); + } + DBG((TXT("Filesystem correctly initialized.\n"))); + + /* Delete some files */ + rmfile(&efsl.myFs,"file0.txt"); + rmfile(&efsl.myFs,"dir0/file0.txt"); + + /* Close filesystem */ + fs_umount(&efsl.myFs); + } +\end{lstlisting} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/tms6713.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/tms6713.tex new file mode 100644 index 000000000..17bc124ab --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/tms6713.tex @@ -0,0 +1,98 @@ +This section will tell you everything you need to know to start using the +embedded filesystems library on a TMS Digital Signal Processor from Texas Instruments. +The only thing that is required is that you have a McBSP port available, and that your DSP +support CLOCKSTOP mode, which is required to connect a SPI compatible device. + +There are special DSP's from TI which have a special MMC/SD card controller, if you want to +use this special interface you will have to create a hardware endpoint for it. This section only +describes connecting an SD card to a normal McBSP port, since every TI DSP has at least one of them. + +\subsubsection{Hardware} +Connecting the SD card to the McBSP is straightforward, you will have to make 4 data related +connections, Vcc and ground, resulting in a 6 wire interface.\\ +\begin{tabular}{|l|l|l|l|l|} + \hline + \multicolumn{3}{|c|}{SD Card Interface}&\multicolumn{2}{|c|}{McBSP Interface}\\ + \hline + 1 & CS & Chip select & FSX & Frame Sync Transmit \\ + 2 & MOSI & Master out Slave In & DX & Data transmit \\ + 3 & GND & Supply Ground &&\\ + 4 & Vcc & Supply voltage (3.3 Volt) &&\\ + 5 & Clk & Clock & CLKX & Clock Transmit\\ + 6 & GND & Supply ground &&\\ + 7 & MISO & Master in Slave out & DR & Data receive \\ + 8 & NC & Not connected &&\\ + 9 & NC & Not connected &&\\ + \hline +\end{tabular}\\ +You can optionally pull the DataIn and DataOut lines up to Vcc with a $10k\Omega$ resistor, but +we found that this was not required for operation.\\ +\includegraphics[scale=0.4]{schematics/sdcard.eps}\\ +The frame sync from the McBSP port is used to select the card whenever a databyte has to be transferred, it is connected to the chip select of the SD card. The DX and DR pins are connected to the SDcard's DataIn and DataOut lines respectively. Finally the McBSP will have to generate a clock for +the SDcard so that it can perform operations, this is accomplished by connecting the clock transmit +line of the McBSP port to the CLK pin of the SDCard. + +\subsubsection{McBSP configuration} +\begin{longtable}{|p{0.13\textwidth}|p{0.1\textwidth}|p{0.06\textwidth}|p{0.75\textwidth}|} + + \hline + \multicolumn{4}{|c|}{ + \textbf{McBSP Register Explanations} + } \\ + \hline + \hline + \endfirsthead + + \hline + \multicolumn{4}{|c|}{\textbf{mcbsp registers (continued)}} \\ + \hline + \endhead + \hline + \endfoot + + \hline + \endlastfoot + + \multicolumn{3}{|c|}{SPCR}& + \multicolumn{1}{c|}{Serial Port Control Register}\\ + \hline + Name & Bit & Value &\multicolumn{1}{c|}{Value \code{(0x00001800 | 0x00410001)}}\\ + \hline + RRST&\code{0}&\code{1b} & The serial port receiver is enabled \\ + XRST&\code{16}&\code{1b} & The serial port transmitter is enabled \\ + CLKSTP&\code{12:11}&\code{11b} & Clock starts on falling edge without delay(see CLKXM) \\ + GRST&\code{22}&\code{1b} & Sample rate generator is pulled out of reset \\ + \hline + + \multicolumn{3}{|c|}{PCR}& + \multicolumn{1}{c|}{Pin Control Register}\\ + \hline + Name &Bit & Value &\multicolumn{1}{c|}{Value \code{0x00000A0C}}\\ + \hline + CLKXP&\code{1} &\code{0b} & Transmit data on the rising edge ofthe clock\\ + FSXP&\code{3} &\code{1b} & Frame Sync (Chip select on SD card) is active low\\ + CLKXM&\code{9} &\code{1b} & McBSP is a master in SPI mode and generates the clock based on + the sample rate generator\\ + FSXM&\code{10} &\code{1b} & Frame sync is determined by tge sample rate generator\\ + \hline + + \multicolumn{3}{|c|}{RCR/XCR}& + \multicolumn{1}{c|}{Receive/Transmit Control Register}\\ + \hline + Name &Bit & Value &\multicolumn{1}{c|}{Value \code{0x00010000}}\\ + \hline + RWDLEN&\code{7:5} &\code{000b} & Receive element is 8 bits (1byte) large\\ + XDATDLY&\code{17:16} &\code{01b} & 1 bit data delay (after frame sync)\\ + \hline + + \multicolumn{3}{|c|}{SRGR}& + \multicolumn{1}{c|}{Sample Rate Genrator}\\ + \hline + Name &Bit & Value &\multicolumn{1}{c|}{Value \code{0x20000002}}\\ + \hline + CLKSM&\code{29} &\code{1b} & The sample rate generator clock is derived from the internal clock\\ + FSGM&\code{28} &\code{0b} & The transmit frame sync signal is generated on every DXR to XSR copy\\ + CLKGDV&\code{7:0}&\code{0x02h} & The clock divider\\ + \hline + +\end{longtable} diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/types.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/types.tex new file mode 100644 index 000000000..d6a4470cf --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/types.tex @@ -0,0 +1,26 @@ +Standard C data types have the annoying tendency to have different sizes on difference compilers +and platforms. Therefore we have created 9 new types that are used everywhere throughout the library. +When you implement your platform you should check if any of the existing one matches your hardware, +or create a new one.\\ +\\ +Here's an overview:\\\\ +\begin{tabular}{|p{4cm}|l|l|} + \hline + \textbf{Type} & \textbf{Size} & \textbf{Signedness}\\ + \hline + \hline + \texttt{eint8} & 1 byte & default to platform \\ + \texttt{esint8} & 1 byte & signed \\ + \texttt{euint8} & 1 byte & unsigned \\ + \hline + \texttt{eint16} & 2 bytes & default to platform \\ + \texttt{esint16} & 2 bytes & signed \\ + \texttt{euint16} & 2 bytes & unsigned \\ + \hline + \texttt{eint32} & 4 bytes & default to platform \\ + \texttt{esint32} & 4 bytes & signed \\ + \texttt{euint32} & 4 bytes & unsigned \\ + \hline +\end{tabular} +$ $\\\\\\ +You will find the relevant code in the file \filename{types.h} in the directory \filename{inc/}. diff --git a/src/ersky9x/libraries/fat/efsl/docs/pages/utils.tex b/src/ersky9x/libraries/fat/efsl/docs/pages/utils.tex new file mode 100644 index 000000000..5757ab061 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pages/utils.tex @@ -0,0 +1,84 @@ +\subsection{Notations} +The utilities can be compiled and run on any POSIX compliant system. +Although not tested on Windows, they should work there as well. In order +to be able to make the utilities, you should have run make in the main directory, +so that an libefsl.a has been made. These utilities link against that library. + +You can run the binaries without arguments to get a short help, which is repeated +here in the 'usage` section of the utilities. + +All utilities take an image, or a device as their first argument. If the image/device +is a partition, and hence does not contain a partition table, it will be recognised and treated +as such. +If a partition table is found, the first partition with a FAT signature will be used. + +Arguments between $<>$ brackets are mandatory, arguments between $[]$ brackets are optional. + + +\subsection{cpo} + \subsubsection*{Usage} + cpo $<$fs$>$ $<$file\_read$>$ $<$local\_write$>$ [bufsize] + \subsubsection*{Operation} + Cpo copies a file residing in a fat filesystem to your local file system. It copies + outwards. The first argument \code{fs} is the image or device on which the source + filesystem resides. The second argument (\code{file\_read} is the path and filename + of the sourcefile in \code{fs}. The third argument (\code{local\_write}) is the + local file to which you want to write the contents. + + The fourth, optional, arguments (\code{bufsize}) says cpo what size of copy buffers + to use. This operates the same as dd. This is used in testing the library, the + default value is 4096 bytes. + +\subsection{cpi} + \subsubsection*{Usage} + cpi $<$fs$>$ $<$local\_read$>$ $<$file\_write$>$ [bufsize] + \subsubsection*{Operation} + Cpi copies a file from your local filesystem to a fat filesystem. It copies inwards. + The first argument \code{fs} is the image or device on which the source + filesystem resides. The second argument (\code{local\_read} is the path and filename + of the sourcefile on your local filesystem. The third argument (\code{file\_write}) is the + path and filename to which you want to write the contents. + + Cpi will bail out when the destination target already exists. + + The fourth, optional, arguments (\code{bufsize}) says cpi what size of copy buffers + to use. This operates the same as dd. This is used in testing the library, the + default value is 4096 bytes. + +\subsection{cpa} + \subsubsection*{Usage} + cpa $<$fs$>$ $<$local\_read$>$ $<$file\_append$>$ [bufsize] + \subsubsection*{Operation} + Cpa copies a file from your local filesystem to a fat filesystem. It copies inwards. + The first argument \code{fs} is the image or device on which the source + filesystem resides. The second argument (\code{local\_read} is the path and filename + of the sourcefile on your local filesystem. The third argument (\code{file\_append}) is the + path and filename to which you want to write the contents. + + Cpa will append to the destination target, or create it if it doesn't exist yet. + + The fourth, optional, arguments (\code{bufsize}) says cpi what size of copy buffers + to use. This operates the same as dd. This is used in testing the library, the + default value is 4096 bytes. + +\subsection{list} + \subsubsection*{Usage} + list $<$fs$>$ $<$directory$>$ + \subsubsection*{Operation} + List will give a listing of existing files on a given filesystem \code{fs}, that + reside in the directory \code{directory}. To get the contents of the root directory, + give a forward slash (/) as the directory argument. + +\subsection{mkdir} + \subsubsection*{Usage} + mkdir $<$fs$>$ $<$dirname$>$ + \subsubsection*{Operation} + Mkdir will create a new directory in the filesystem \code{fs}. You must provide the full path + of the new directory as an argument. + +\subsection{rmfile} + \subsubsection*{Usage} + rmfile $<$fs$>$ $<$filename$>$ + \subsubsection*{Operation} + Rmfile will delete a file from a filesystem \code{fs}. + diff --git a/src/ersky9x/libraries/fat/efsl/docs/pics/sdcard.eps b/src/ersky9x/libraries/fat/efsl/docs/pics/sdcard.eps new file mode 100644 index 000000000..8d4118c88 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/docs/pics/sdcard.eps @@ -0,0 +1,3501 @@ +%!PS-Adobe-3.0 EPSF-3.0 +%%Creator: GIMP PostScript file plugin V 1.17 by Peter Kirchgessner +%%Title: sdcard.eps +%%CreationDate: Tue May 24 14:52:01 2005 +%%DocumentData: Clean7Bit +%%LanguageLevel: 2 +%%Pages: 1 +%%BoundingBox: 14 14 647 607 +%%EndComments +%%BeginPreview: 256 239 1 239 +% 0000000000000000000000000000000000000000000000000000000000000000 +% 0000000000000000000000000000000000000000000000000000000000000000 +% 0000000000000000000000000000000000000000000000000000000000000000 +% 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if(file_fopen(&file_w,&efs.myFs,"copy.txt",'w')!=0){ + hang(); + } + + while(e=file_read(&file_r,512,buf)){ + file_write(&file_w,e,buf); + } + + file_fclose(&file_r); + file_fclose(&file_w); + + fs_umount(&efs.myFs); + + hang(); +} + +void hang(void) +{ + while((1)) + _NOP(); +} diff --git a/src/ersky9x/libraries/fat/efsl/examples/avr/dirtest.c b/src/ersky9x/libraries/fat/efsl/examples/avr/dirtest.c new file mode 100644 index 000000000..f3421af54 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/avr/dirtest.c @@ -0,0 +1,110 @@ +#include + +void hang(void); +unsigned char c2str(unsigned char value,char *buf); + +void main(void) +{ + EmbeddedFileSystem efs; + EmbeddedFile file_w; + unsigned short i; + unsigned char e; + unsigned char t; + signed char err; + unsigned char offset1; + unsigned char offset2; + char path[100]; + + debug_init(); + + DBG((TXT("Welcome (2).\n-------------\n\n"))); + if(efs_init(&efs,0)!=0){ + DBG((TXT("Could not init filesystem.\n"))); + hang(); + } + + for(i=1;i<=4;i++){ + offset1=c2str(1,path); + path[offset1++]='/'; + for(e=1;e<=12;e++){ + offset2=offset1; + offset2+=c2str(e,path+offset1); + DBG((TXT("Dir name: %s.\n"),path)); + } + } + /*for(i=1;i<10;i++){ + path[0]='D'; + path[1]='I'; + path[2]='R'; + path[3]=0x30+((i%10000)/1000); + path[4]=0x30+((i%1000)/100); + path[5]=0x30+((i%100)/10); + path[6]=0x30+((i%10)/1); + path[7]='\0'; + err=mkdir(&efs.myFs,path); + if(err!=0){ + DBG((TXT("ERROR: Could not create directory %s (%d) - returned ERR %d.\n"),path,i,err)); + hang(); + } + DBG((TXT("DIR %s created.\n"),path)); + for(e=1;e<6;e++){ + path[7]='/'; + path[8]=0x40+e; + path[9]='\0'; + err=mkdir(&efs.myFs,path); + if(err!=0){ + DBG((TXT("ERROR: Could not create directory %s (%d) - returned ERR %d.\n"),path,i,err)); + hang(); + } + DBG((TXT("DIR %s created.\n"),path)); + for(t=0;t<26;t++){ + path[9]='/'; + path[10]='t'; + path[11]='e'; + path[12]='s'; + path[13]='t'; + path[14]='-'; + path[15]=0x41+t; + path[16]='.'; + path[17]='t'; + path[18]='x'; + path[19]='t'; + path[20]='\0'; + if(file_fopen(&file_w,&efs.myFs,path,'w')!=0){ + DBG((TXT("Could not open file %s for writing.\n"),path)); + hang(); + } + file_write(&file_w,15,"Dit is een test"); + file_fclose(&file_w); + } + } + }*/ + + file_fclose(&file_w); + fs_umount(&efs.myFs); + + DBG((TXT("Done :-)\n\n"))); + + hang(); +} + +unsigned char c2str(unsigned char value,char *buf) +{ + unsigned char i=0; + + if(value>=100) + buf[i++]=0x30+(value/100); + if(value>=10) + buf[i++]=0x30+((value%100)/10); + buf[i++]=0x30+(value%10); + buf[i]='\0'; + + return(i); +} + +void hang(void) +{ + while((1)) + _NOP(); +} + diff --git a/src/ersky9x/libraries/fat/efsl/examples/linux/linuxtest.c b/src/ersky9x/libraries/fat/efsl/examples/linux/linuxtest.c new file mode 100644 index 000000000..4b66437cb --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/linux/linuxtest.c @@ -0,0 +1,28 @@ +#include +#include + +int main(void) +{ + EmbeddedFileSystem efs; + EmbeddedFile file; + unsigned short i,e; + char buf[512]; + + if(efs_init(&efs,"/dev/sde")!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + if(file_fopen(&file,&efs.myFs,"group",'r')!=0){ + printf("Could not open file.\n"); + return(-2); + } + + while(e=file_read(&file,512,buf)){ + for(i=0;i ROM + + /***** old: + .text : + { + *crt0.o (.text) + *(.text) + *(.rodata) + *(.rodata*) + *(.glue_7) + *(.glue_7t) + } > ROM + *****/ + + . = ALIGN(4); + + /* .ctors .dtors are used for c++ constructors/destructors */ + /* added by Martin Thomas 4/2005 based on Anglia Design example */ + .ctors : + { + PROVIDE(__ctors_start__ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(__ctors_end__ = .); + } >ROM + + .dtors : + { + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + } >ROM + + . = ALIGN(4); + /* mthomas - end */ + + _etext = . ; + PROVIDE (etext = .); + + /* .data section which is used for initialized data */ + .data : AT (_etext) + { + _data = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + SORT(CONSTRUCTORS) /* mt 4/2005 */ + . = ALIGN(4); + *(.fastrun) /* !!!! "RAM-Function" example */ + } > RAM + + . = ALIGN(4); + _edata = . ; + PROVIDE (edata = .); + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(.gnu.linkonce.b*) + *(COMMON) + . = ALIGN(4); + } > RAM + + . = ALIGN(4); + __bss_end__ = . ; + PROVIDE (__bss_end = .); + + .stack ALIGN(256) : + { + . += STACK_SIZE; + PROVIDE (_stack = .); + } > RAM + + _end = . ; + PROVIDE (end = .); + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/LPC213x.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/LPC213x.h new file mode 100644 index 000000000..f5ec82aca --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/LPC213x.h @@ -0,0 +1,273 @@ +/***********************************************************************/ +/* This file is part of the uVision/ARM development tools */ +/* Copyright KEIL ELEKTRONIK GmbH 2002-2005 */ +/***********************************************************************/ +/* */ +/* LPC213X.H: Header file for Philips LPC2131/32/34/36/38 */ +/* */ +/***********************************************************************/ + +#ifndef __LPC213x_H +#define __LPC213x_H + +/* Vectored Interrupt Controller (VIC) */ +#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000)) +#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004)) +#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008)) +#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C)) +#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010)) +#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014)) +#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018)) +#define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C)) +#define VICProtection (*((volatile unsigned long *) 0xFFFFF020)) +#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030)) +#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034)) +#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100)) +#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104)) +#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108)) +#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C)) +#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110)) +#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114)) +#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118)) +#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C)) +#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120)) +#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124)) +#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128)) +#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C)) +#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130)) +#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134)) +#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138)) +#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C)) +#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200)) +#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204)) +#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208)) +#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C)) +#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210)) +#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214)) +#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218)) +#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C)) +#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220)) +#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224)) +#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228)) +#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C)) +#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230)) +#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234)) +#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238)) +#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C)) + +/* Pin Connect Block */ +#define PINSEL0 (*((volatile unsigned long *) 0xE002C000)) +#define PINSEL1 (*((volatile unsigned long *) 0xE002C004)) +#define PINSEL2 (*((volatile unsigned long *) 0xE002C014)) + +/* General Purpose Input/Output (GPIO) */ +#define IOPIN0 (*((volatile unsigned long *) 0xE0028000)) +#define IOSET0 (*((volatile unsigned long *) 0xE0028004)) +#define IODIR0 (*((volatile unsigned long *) 0xE0028008)) +#define IOCLR0 (*((volatile unsigned long *) 0xE002800C)) +#define IOPIN1 (*((volatile unsigned long *) 0xE0028010)) +#define IOSET1 (*((volatile unsigned long *) 0xE0028014)) +#define IODIR1 (*((volatile unsigned long *) 0xE0028018)) +#define IOCLR1 (*((volatile unsigned long *) 0xE002801C)) + +/* Memory Accelerator Module (MAM) */ +#define MAMCR (*((volatile unsigned char *) 0xE01FC000)) +#define MAMTIM (*((volatile unsigned char *) 0xE01FC004)) +#define MEMMAP (*((volatile unsigned char *) 0xE01FC040)) + +/* Phase Locked Loop (PLL) */ +#define PLLCON (*((volatile unsigned char *) 0xE01FC080)) +#define PLLCFG (*((volatile unsigned char *) 0xE01FC084)) +#define PLLSTAT (*((volatile unsigned short*) 0xE01FC088)) +#define PLLFEED (*((volatile unsigned char *) 0xE01FC08C)) + +/* VPB Divider */ +#define VPBDIV (*((volatile unsigned char *) 0xE01FC100)) + +/* Power Control */ +#define PCON (*((volatile unsigned char *) 0xE01FC0C0)) +#define PCONP (*((volatile unsigned long *) 0xE01FC0C4)) + +/* External Interrupts */ +#define EXTINT (*((volatile unsigned char *) 0xE01FC140)) +#define INTWAKE (*((volatile unsigned char *) 0xE01FC144)) +#define EXTMODE (*((volatile unsigned char *) 0xE01FC148)) +#define EXTPOLAR (*((volatile unsigned char *) 0xE01FC14C)) + +/* Reset */ +#define RSID (*((volatile unsigned char *) 0xE01FC180)) + +/* Code Security / Debugging */ +#define CSPR (*((volatile unsigned char *) 0xE01FC184)) + +/* Timer 0 */ +#define T0IR (*((volatile unsigned long *) 0xE0004000)) +#define T0TCR (*((volatile unsigned long *) 0xE0004004)) +#define T0TC (*((volatile unsigned long *) 0xE0004008)) +#define T0PR (*((volatile unsigned long *) 0xE000400C)) +#define T0PC (*((volatile unsigned long *) 0xE0004010)) +#define T0MCR (*((volatile unsigned long *) 0xE0004014)) +#define T0MR0 (*((volatile unsigned long *) 0xE0004018)) +#define T0MR1 (*((volatile unsigned long *) 0xE000401C)) +#define T0MR2 (*((volatile unsigned long *) 0xE0004020)) +#define T0MR3 (*((volatile unsigned long *) 0xE0004024)) +#define T0CCR (*((volatile unsigned long *) 0xE0004028)) +#define T0CR0 (*((volatile unsigned long *) 0xE000402C)) +#define T0CR1 (*((volatile unsigned long *) 0xE0004030)) +#define T0CR2 (*((volatile unsigned long *) 0xE0004034)) +#define T0CR3 (*((volatile unsigned long *) 0xE0004038)) +#define T0EMR (*((volatile unsigned long *) 0xE000403C)) +#define T0CTCR (*((volatile unsigned long *) 0xE0004070)) + +/* Timer 1 */ +#define T1IR (*((volatile unsigned long *) 0xE0008000)) +#define T1TCR (*((volatile unsigned long *) 0xE0008004)) +#define T1TC (*((volatile unsigned long *) 0xE0008008)) +#define T1PR (*((volatile unsigned long *) 0xE000800C)) +#define T1PC (*((volatile unsigned long *) 0xE0008010)) +#define T1MCR (*((volatile unsigned long *) 0xE0008014)) +#define T1MR0 (*((volatile unsigned long *) 0xE0008018)) +#define T1MR1 (*((volatile unsigned long *) 0xE000801C)) +#define T1MR2 (*((volatile unsigned long *) 0xE0008020)) +#define T1MR3 (*((volatile unsigned long *) 0xE0008024)) +#define T1CCR (*((volatile unsigned long *) 0xE0008028)) +#define T1CR0 (*((volatile unsigned long *) 0xE000802C)) +#define T1CR1 (*((volatile unsigned long *) 0xE0008030)) +#define T1CR2 (*((volatile unsigned long *) 0xE0008034)) +#define T1CR3 (*((volatile unsigned long *) 0xE0008038)) +#define T1EMR (*((volatile unsigned long *) 0xE000803C)) +#define T1CTCR (*((volatile unsigned long *) 0xE0008070)) + +/* Pulse Width Modulator (PWM) */ +#define PWMIR (*((volatile unsigned long *) 0xE0014000)) +#define PWMTCR (*((volatile unsigned long *) 0xE0014004)) +#define PWMTC (*((volatile unsigned long *) 0xE0014008)) +#define PWMPR (*((volatile unsigned long *) 0xE001400C)) +#define PWMPC (*((volatile unsigned long *) 0xE0014010)) +#define PWMMCR (*((volatile unsigned long *) 0xE0014014)) +#define PWMMR0 (*((volatile unsigned long *) 0xE0014018)) +#define PWMMR1 (*((volatile unsigned long *) 0xE001401C)) +#define PWMMR2 (*((volatile unsigned long *) 0xE0014020)) +#define PWMMR3 (*((volatile unsigned long *) 0xE0014024)) +#define PWMMR4 (*((volatile unsigned long *) 0xE0014040)) +#define PWMMR5 (*((volatile unsigned long *) 0xE0014044)) +#define PWMMR6 (*((volatile unsigned long *) 0xE0014048)) +#define PWMEMR (*((volatile unsigned long *) 0xE001403C)) +#define PWMPCR (*((volatile unsigned long *) 0xE001404C)) +#define PWMLER (*((volatile unsigned long *) 0xE0014050)) + +/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ +#define U0RBR (*((volatile unsigned char *) 0xE000C000)) +#define U0THR (*((volatile unsigned char *) 0xE000C000)) +#define U0IER (*((volatile unsigned char *) 0xE000C004)) +#define U0IIR (*((volatile unsigned char *) 0xE000C008)) +#define U0FCR (*((volatile unsigned char *) 0xE000C008)) +#define U0LCR (*((volatile unsigned char *) 0xE000C00C)) +#define U0LSR (*((volatile unsigned char *) 0xE000C014)) +#define U0SCR (*((volatile unsigned char *) 0xE000C01C)) +#define U0DLL (*((volatile unsigned char *) 0xE000C000)) +#define U0DLM (*((volatile unsigned char *) 0xE000C004)) +#define U0TER (*((volatile unsigned char *) 0xE000C030)) + +/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ +#define U1RBR (*((volatile unsigned char *) 0xE0010000)) +#define U1THR (*((volatile unsigned char *) 0xE0010000)) +#define U1IER (*((volatile unsigned char *) 0xE0010004)) +#define U1IIR (*((volatile unsigned char *) 0xE0010008)) +#define U1FCR (*((volatile unsigned char *) 0xE0010008)) +#define U1LCR (*((volatile unsigned char *) 0xE001000C)) +#define U1MCR (*((volatile unsigned char *) 0xE0010010)) +#define U1LSR (*((volatile unsigned char *) 0xE0010014)) +#define U1MSR (*((volatile unsigned char *) 0xE0010018)) +#define U1SCR (*((volatile unsigned char *) 0xE001001C)) +#define U1DLL (*((volatile unsigned char *) 0xE0010000)) +#define U1DLM (*((volatile unsigned char *) 0xE0010004)) +#define U1TER (*((volatile unsigned char *) 0xE0010030)) + +/* I2C Interface 0 */ +#define I20CONSET (*((volatile unsigned char *) 0xE001C000)) +#define I20STAT (*((volatile unsigned char *) 0xE001C004)) +#define I20DAT (*((volatile unsigned char *) 0xE001C008)) +#define I20ADR (*((volatile unsigned char *) 0xE001C00C)) +#define I20SCLH (*((volatile unsigned short*) 0xE001C010)) +#define I20SCLL (*((volatile unsigned short*) 0xE001C014)) +#define I20CONCLR (*((volatile unsigned char *) 0xE001C018)) + +/* I2C Interface 1 */ +#define I21CONSET (*((volatile unsigned char *) 0xE005C000)) +#define I21STAT (*((volatile unsigned char *) 0xE005C004)) +#define I21DAT (*((volatile unsigned char *) 0xE005C008)) +#define I21ADR (*((volatile unsigned char *) 0xE005C00C)) +#define I21SCLH (*((volatile unsigned short*) 0xE005C010)) +#define I21SCLL (*((volatile unsigned short*) 0xE005C014)) +#define I21CONCLR (*((volatile unsigned char *) 0xE005C018)) + +/* SPI0 (Serial Peripheral Interface 0) */ +#define S0SPCR (*((volatile unsigned char *) 0xE0020000)) +#define S0SPSR (*((volatile unsigned char *) 0xE0020004)) +#define S0SPDR (*((volatile unsigned char *) 0xE0020008)) +#define S0SPCCR (*((volatile unsigned char *) 0xE002000C)) +#define S0SPTCR (*((volatile unsigned char *) 0xE0020010)) +#define S0SPTSR (*((volatile unsigned char *) 0xE0020014)) +#define S0SPTOR (*((volatile unsigned char *) 0xE0020018)) +#define S0SPINT (*((volatile unsigned char *) 0xE002001C)) + +/* SSP Controller */ +#define SSPCR0 (*((volatile unsigned short* ) 0xE0068000)) +#define SSPCR1 (*((volatile unsigned char * ) 0xE0068004)) +#define SSPDR (*((volatile unsigned short* ) 0xE0068008)) +#define SSPSR (*((volatile unsigned char * ) 0xE006800C)) +#define SSPCPSR (*((volatile unsigned char * ) 0xE0068010)) +#define SSPIMSC (*((volatile unsigned char * ) 0xE0068014)) +#define SSPRIS (*((volatile unsigned char * ) 0xE0068018)) +#define SSPMIS (*((volatile unsigned char * ) 0xE006801C)) +#define SSPICR (*((volatile unsigned char * ) 0xE0068020)) +#define SSPDMACR (*((volatile unsigned char * ) 0xE0068024)) + +/* Real Time Clock */ +#define ILR (*((volatile unsigned char *) 0xE0024000)) +#define CTC (*((volatile unsigned short*) 0xE0024004)) +#define CCR (*((volatile unsigned char *) 0xE0024008)) +#define CIIR (*((volatile unsigned char *) 0xE002400C)) +#define AMR (*((volatile unsigned char *) 0xE0024010)) +#define CTIME0 (*((volatile unsigned long *) 0xE0024014)) +#define CTIME1 (*((volatile unsigned long *) 0xE0024018)) +#define CTIME2 (*((volatile unsigned long *) 0xE002401C)) +#define SEC (*((volatile unsigned char *) 0xE0024020)) +#define MIN (*((volatile unsigned char *) 0xE0024024)) +#define HOUR (*((volatile unsigned char *) 0xE0024028)) +#define DOM (*((volatile unsigned char *) 0xE002402C)) +#define DOW (*((volatile unsigned char *) 0xE0024030)) +#define DOY (*((volatile unsigned short*) 0xE0024034)) +#define MONTH (*((volatile unsigned char *) 0xE0024038)) +#define YEAR (*((volatile unsigned short*) 0xE002403C)) +#define ALSEC (*((volatile unsigned char *) 0xE0024060)) +#define ALMIN (*((volatile unsigned char *) 0xE0024064)) +#define ALHOUR (*((volatile unsigned char *) 0xE0024068)) +#define ALDOM (*((volatile unsigned char *) 0xE002406C)) +#define ALDOW (*((volatile unsigned char *) 0xE0024070)) +#define ALDOY (*((volatile unsigned short*) 0xE0024074)) +#define ALMON (*((volatile unsigned char *) 0xE0024078)) +#define ALYEAR (*((volatile unsigned short*) 0xE002407C)) +#define PREINT (*((volatile unsigned short*) 0xE0024080)) +#define PREFRAC (*((volatile unsigned short*) 0xE0024084)) + +/* A/D Converter 0 (AD0) */ +#define AD0CR (*((volatile unsigned long *) 0xE0034000)) +#define AD0DR (*((volatile unsigned long *) 0xE0034004)) + +/* A/D Converter 1 (AD1) */ +#define AD1CR (*((volatile unsigned long *) 0xE0060000)) +#define AD1DR (*((volatile unsigned long *) 0xE0060004)) + +/* D/A Converter */ +#define DACR (*((volatile unsigned long *) 0xE006C000)) + + +/* Watchdog */ +#define WDMOD (*((volatile unsigned char *) 0xE0000000)) +#define WDTC (*((volatile unsigned long *) 0xE0000004)) +#define WDFEED (*((volatile unsigned char *) 0xE0000008)) +#define WDTV (*((volatile unsigned long *) 0xE000000C)) + +#endif // __LPC213x_H diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/Makefile b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/Makefile new file mode 100644 index 000000000..63a19f67e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/Makefile @@ -0,0 +1,436 @@ +# Hey Emacs, this is a -*- makefile -*- +# +# WinARM template makefile +# by Martin Thomas, Kaiserslautern, Germany +# +# +# based on the WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al. +# Released to the Public Domain +# Please read the make user manual! +# +# +# On command line: +# +# make all = Make software. +# +# make clean = Clean out built project files. +# +# make program = Download the hex file to the device, using lpc21isp +# +# (TODO: make filename.s = Just compile filename.c into the assembler code only) +# +# To rebuild project do "make clean" then "make all". +# +# Changelog: +# - 17. Feb. 2005 - added thumb-interwork support (mth) +# - 28. Apr. 2005 - added C++ support (mth) +# - 29. Arp. 2005 - changed handling for lst-Filename (mth) +# + +FLASH_TOOL = ULINK + +# MCU name and submodel +MCU = arm7tdmi-s +SUBMDL = LPC2138 +THUMB = -mthumb +THUMB_IW = -mthumb-interwork + + +## Create ROM-Image (final) +RUN_MODE=ROM_RUN +## Create RAM-Image (debugging) +#RUN_MODE=RAM_RUN + + +# Output format. (can be srec, ihex, binary) +FORMAT = ihex + + +# Target file name (without extension). +TARGET = main + + +# List C source files here. (C dependencies are automatically generated.) +# use file-extension c for "c-only"-files +SRC = $(TARGET).c +SRC += uart.c + +SRC += ../../src/efs.c ../../src/plibc.c ../../src/disc.c ../../src/partition.c +SRC += ../../src/time.c ../../src/fs.c ../../src/fat.c ../../src/file.c ../../src/dir.c ../../src/ls.c +SRC += ../../src/mkfs.c ../../src/debug.c ../../src/ioman.c ../../src/ui.c ../../src/extract.c +SRC += ../../src/interfaces/lpc2000_spi.c ../../src/interfaces/sd.c +SRC += ../../src/interfaces/lpc2000_dbg_printf.c + +# List C source files here which must be compiled in ARM-Mode. +# use file-extension c for "c-only"-files +SRCARM = + +# List C++ source files here. +# use file-extension cpp for C++-files +CPPSRC = + +# List C++ source files here which must be compiled in ARM-Mode. +# use file-extension cpp for C++-files +#CPPSRCARM = $(TARGET).cpp +CPPSRCARM = + +# List Assembler source files here. +# Make them always end in a capital .S. Files ending in a lowercase .s +# will not be considered source files but generated files (assembler +# output from the compiler), and will be deleted upon "make clean"! +# Even though the DOS/Win* filesystem matches both .s and .S the same, +# it will preserve the spelling of the filenames, and gcc itself does +# care about how the name is spelled on its command-line. +ASRC = + +# List Assembler source files here which must be assembled in ARM-Mode.. +ASRCARM = crt0.S + +# Optimization level, can be [0, 1, 2, 3, s]. +# 0 = turn off optimization. s = optimize for size. +# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) +OPT = s +#OPT = 0 + +# Debugging format. +# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2. +# AVR (extended) COFF requires stabs, plus an avr-objcopy run. +#DEBUG = stabs +DEBUG = dwarf-2 + +# List any extra directories to look for include files here. +# Each directory must be seperated by a space. +EXTRAINCDIRS = ../../inc ../../conf + +# Compiler flag to set the C Standard level. +# c89 - "ANSI" C +# gnu89 - c89 plus GCC extensions +# c99 - ISO C99 standard (not yet fully implemented) +# gnu99 - c99 plus GCC extensions +CSTANDARD = -std=gnu99 + +# Place -D or -U options for C here +CDEFS = -D$(RUN_MODE) + +# Place -I options here +CINCS = + +# Place -D or -U options for ASM here +ADEFS = -D$(RUN_MODE) + + +# Compiler flags. +# -g*: generate debugging information +# -O*: optimization level +# -f...: tuning, see GCC manual and avr-libc documentation +# -Wall...: warning level +# -Wa,...: tell GCC to pass this to the assembler. +# -adhlns...: create assembler listing +# +# Flags for C and C++ (arm-none-eabi-gcc/arm-none-eabi-g++) +CFLAGS = -g$(DEBUG) +CFLAGS += $(CDEFS) $(CINCS) +CFLAGS += -O$(OPT) +CFLAGS += -Wall -Wcast-align -Wcast-qual -Wimplicit +CFLAGS += -Wpointer-arith -Wswitch +CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused +CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) +CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) + +# flags only for C +CONLYFLAGS = -Wstrict-prototypes -Wmissing-declarations +CONLYFLAGS += -Wmissing-prototypes -Wnested-externs +CONLYFLAGS += $(CSTANDARD) + +# flags only for C++ (arm-none-eabi-g++) +# CPPFLAGS = -fno-rtti -fno-exceptions +CPPFLAGS = + +# Assembler flags. +# -Wa,...: tell GCC to pass this to the assembler. +# -ahlms: create listing +# -gstabs: have the assembler create line number information; note that +# for use in COFF files, additional information about filenames +# and function names needs to be present in the assembler source +# files -- see avr-libc docs [FIXME: not yet described there] +##ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs +ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG) + +#Additional libraries. + +#Support for newlibc-lpc (file: libnewlibc-lpc.a) +NEWLIBLPC = -lnewlib-lpc + +MATH_LIB = -lm + +CPLUSPLUS_LIB = -lstdc++ + +# Linker flags. +# -Wl,...: tell GCC to pass this to linker. +# -Map: create map file +# --cref: add cross reference to map file +LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref +LDFLAGS += -lc +LDFLAGS += $(NEWLIBLPC) $(MATH_LIB) +LDFLAGS += -lc -lgcc +LDFLAGS += $(CPLUSPLUS_LIB) + +# Set Linker-Script Depending On Selected Memory +ifeq ($(RUN_MODE),RAM_RUN) +LDFLAGS +=-T$(SUBMDL)-RAM.ld +else +LDFLAGS +=-T$(SUBMDL)-ROM.ld +endif + + + +# --------------------------------------------------------------------------- +# Flash-Programming support using lpc21isp by Martin Maurer + +# Settings and variables: +#LPC21ISP = lpc21isp +LPC21ISP = lpc21isp +LPC21ISP_PORT = com1 +LPC21ISP_BAUD = 38400 +LPC21ISP_XTAL = 12000 +LPC21ISP_FLASHFILE = $(TARGET).hex +# verbose output: +#LPC21ISP_DEBUG = -debug +# enter bootloader via RS232 DTR/RTS (only if hardware supports this +# feature - see Philips AppNote): +LPC21ISP_CONTROL = -control + + +# --------------------------------------------------------------------------- + +# Define directories, if needed. +## DIRARM = c:/WinARM/ +## DIRARMBIN = $(DIRAVR)/bin/ +## DIRAVRUTILS = $(DIRAVR)/utils/bin/ + +# Define programs and commands. +SHELL = sh +CC = arm-none-eabi-gcc +CPP = arm-none-eabi-g++ +OBJCOPY = arm-none-eabi-objcopy +OBJDUMP = arm-none-eabi-objdump +SIZE = arm-none-eabi-size +NM = arm-none-eabi-nm +REMOVE = rm -f +COPY = cp + + +# Define Messages +# English +MSG_ERRORS_NONE = Errors: none +MSG_BEGIN = -------- begin -------- +MSG_END = -------- end -------- +MSG_SIZE_BEFORE = Size before: +MSG_SIZE_AFTER = Size after: +MSG_FLASH = Creating load file for Flash: +MSG_EXTENDED_LISTING = Creating Extended Listing: +MSG_SYMBOL_TABLE = Creating Symbol Table: +MSG_LINKING = Linking: +MSG_COMPILING = Compiling C: +MSG_COMPILING_ARM = "Compiling C (ARM-only):" +MSG_COMPILINGCPP = Compiling C++: +MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):" +MSG_ASSEMBLING = Assembling: +MSG_ASSEMBLING_ARM = "Assembling (ARM-only):" +MSG_CLEANING = Cleaning project: +MSG_LPC21_RESETREMINDER = You may have to bring the target in bootloader-mode now. + + +# Define all object files. +COBJ = $(SRC:.c=.o) +AOBJ = $(ASRC:.S=.o) +COBJARM = $(SRCARM:.c=.o) +AOBJARM = $(ASRCARM:.S=.o) +CPPOBJ = $(CPPSRC:.cpp=.o) +CPPOBJARM = $(CPPSRCARM:.cpp=.o) + +# Define all listing files. +LST = $(ASRC:.S=.lst) $(ASRCARM:.S=.lst) $(SRC:.c=.lst) $(SRCARM:.c=.lst) +LST += $(CPPSRC:.cpp=.lst) $(CPPSRCARM:.cpp=.lst) + +# Compiler flags to generate dependency files. +### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d +GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d + +# Combine all necessary flags and optional flags. +# Add target processor to flags. +ALL_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS) +ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS) + + +# Default target. +all: begin gccversion sizebefore build sizeafter finished end + +build: elf hex lss sym + +elf: $(TARGET).elf +hex: $(TARGET).hex +lss: $(TARGET).lss +sym: $(TARGET).sym + +# Eye candy. +begin: + @echo + @echo $(MSG_BEGIN) + +finished: + @echo $(MSG_ERRORS_NONE) + +end: + @echo $(MSG_END) + @echo + + +# Display size of file. +HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex +ELFSIZE = $(SIZE) -A $(TARGET).elf +sizebefore: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi + +sizeafter: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi + + +# Display compiler version information. +gccversion : + @$(CC) --version + + +ifeq ($(FLASH_TOOL),ULINK) +# Program the device with Keil's ULINK (needs configured uVision-Workspace). +program: $(TARGET).hex + @echo + @echo "Programming with ULINK" + C:\Keil\uv3\Uv3.exe -f ulinkflash.Uv2 -oulinkflash.txt +else +# Program the device. +program: $(TARGET).hex + @echo + @echo $(MSG_LPC21_RESETREMINDER) + $(LPC21ISP) $(LPC21ISP_CONTROL) $(LPC21ISP_DEBUG) $(LPC21ISP_FLASHFILE) $(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL) +endif + +# Create final output files (.hex, .eep) from ELF output file. +# TODO: handling the .eeprom-section should be redundant +%.hex: %.elf + @echo + @echo $(MSG_FLASH) $@ + $(OBJCOPY) -O $(FORMAT) $< $@ + + +# Create extended listing file from ELF output file. +# testing: option -C +%.lss: %.elf + @echo + @echo $(MSG_EXTENDED_LISTING) $@ + $(OBJDUMP) -h -S -C $< > $@ + + +# Create a symbol table from ELF output file. +%.sym: %.elf + @echo + @echo $(MSG_SYMBOL_TABLE) $@ + $(NM) -n $< > $@ + + +# Link: create ELF output file from object files. +.SECONDARY : $(TARGET).elf +.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) +%.elf: $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) + @echo + @echo $(MSG_LINKING) $@ + $(CC) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) +# $(CPP) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) + +# Compile: create object files from C source files. ARM/Thumb +$(COBJ) : %.o : %.c + @echo + @echo $(MSG_COMPILING) $< + $(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ + +# Compile: create object files from C source files. ARM-only +$(COBJARM) : %.o : %.c + @echo + @echo $(MSG_COMPILING_ARM) $< + $(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. ARM/Thumb +$(CPPOBJ) : %.o : %.cpp + @echo + @echo $(MSG_COMPILINGCPP) $< + $(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. ARM-only +$(CPPOBJARM) : %.o : %.cpp + @echo + @echo $(MSG_COMPILINGCPP_ARM) $< + $(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ + + +# Compile: create assembler files from C source files. ARM/Thumb +## does not work - TODO - hints welcome +##$(COBJ) : %.s : %.c +## $(CC) $(THUMB) -S $(ALL_CFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. ARM/Thumb +$(AOBJ) : %.o : %.S + @echo + @echo $(MSG_ASSEMBLING) $< + $(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. ARM-only +$(AOBJARM) : %.o : %.S + @echo + @echo $(MSG_ASSEMBLING_ARM) $< + $(CC) -c $(ALL_ASFLAGS) $< -o $@ + + +# Target: clean project. +clean: begin clean_list finished end + + +clean_list : + @echo + @echo $(MSG_CLEANING) + $(REMOVE) $(TARGET).hex + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).elf + $(REMOVE) $(TARGET).map + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).a90 + $(REMOVE) $(TARGET).sym + $(REMOVE) $(TARGET).lnk + $(REMOVE) $(TARGET).lss + $(REMOVE) $(COBJ) + $(REMOVE) $(CPPOBJ) + $(REMOVE) $(AOBJ) + $(REMOVE) $(COBJARM) + $(REMOVE) $(CPPOBJARM) + $(REMOVE) $(AOBJARM) + $(REMOVE) $(LST) + $(REMOVE) $(SRC:.c=.s) + $(REMOVE) $(SRC:.c=.d) + $(REMOVE) $(SRCARM:.c=.s) + $(REMOVE) $(SRCARM:.c=.d) + $(REMOVE) $(CPPSRC:.cpp=.s) + $(REMOVE) $(CPPSRC:.cpp=.d) + $(REMOVE) $(CPPSRCARM:.cpp=.s) + $(REMOVE) $(CPPSRCARM:.cpp=.d) + $(REMOVE) .dep/* + + +# Include the dependency files. +-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + + +# Listing of phony targets. +.PHONY : all begin finish end sizebefore sizeafter gccversion \ +build elf hex lss sym clean clean_list program + diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/crt0.S b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/crt0.S new file mode 100644 index 000000000..9057bcbe5 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/crt0.S @@ -0,0 +1,220 @@ +/* + crt0.S for LPC2xxx + - based on examples from R O Software + - based on examples from newlib-lpc + - based on an example from Anglia Designs + + collected and modified by Martin Thomas +*/ + + .global _etext // -> .data initial values in ROM + .global _data // -> .data area in RAM + .global _edata // end of .data area + .global __bss_start // -> .bss area in RAM + .global __bss_end__ // end of .bss area + .global _stack // top of stack + +// Stack Sizes + .set UND_STACK_SIZE, 0x00000004 + .set ABT_STACK_SIZE, 0x00000004 + .set FIQ_STACK_SIZE, 0x00000004 + .set IRQ_STACK_SIZE, 0X00000080 + .set SVC_STACK_SIZE, 0x00000004 + +// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs + .set MODE_USR, 0x10 // User Mode + .set MODE_FIQ, 0x11 // FIQ Mode + .set MODE_IRQ, 0x12 // IRQ Mode + .set MODE_SVC, 0x13 // Supervisor Mode + .set MODE_ABT, 0x17 // Abort Mode + .set MODE_UND, 0x1B // Undefined Mode + .set MODE_SYS, 0x1F // System Mode + + .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled + .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled + + .text + .arm + .section .init, "ax" + + .code 32 + .align 2 + + .global _boot + .func _boot +_boot: + +// Runtime Interrupt Vectors +// ------------------------- +Vectors: + b _start // reset - _start + ldr pc,_undf // undefined - _undf + ldr pc,_swi // SWI - _swi + ldr pc,_pabt // program abort - _pabt + ldr pc,_dabt // data abort - _dabt + nop // reserved + ldr pc,[pc,#-0xFF0] // IRQ - read the VIC + ldr pc,_fiq // FIQ - _fiq + +#if 0 +// Use this group for production +_undf: .word _reset // undefined - _reset +_swi: .word _reset // SWI - _reset +_pabt: .word _reset // program abort - _reset +_dabt: .word _reset // data abort - _reset +_irq: .word _reset // IRQ - _reset +_fiq: .word _reset // FIQ - _reset + +#else +// Use this group for development +_undf: .word __undf // undefined +_swi: .word __swi // SWI +_pabt: .word __pabt // program abort +_dabt: .word __dabt // data abort +_irq: .word __irq // IRQ +_fiq: .word __fiq // FIQ + +__undf: b . // undefined +__swi: b . // SWI +__pabt: b . // program abort +__dabt: b . // data abort +__irq: b . // IRQ +__fiq: b . // FIQ +#endif + .size _boot, . - _boot + .endfunc + + +// Setup the operating mode & stack. +// --------------------------------- + .global _start, start, _mainCRTStartup + .func _start + +_start: +start: +_mainCRTStartup: + +// Initialize Interrupt System +// - Set stack location for each mode +// - Leave in System Mode with Interrupts Disabled +// ----------------------------------------------- + ldr r0,=_stack + msr CPSR_c,#MODE_UND|I_BIT|F_BIT // Undefined Instruction Mode + mov sp,r0 + sub r0,r0,#UND_STACK_SIZE + msr CPSR_c,#MODE_ABT|I_BIT|F_BIT // Abort Mode + mov sp,r0 + sub r0,r0,#ABT_STACK_SIZE + msr CPSR_c,#MODE_FIQ|I_BIT|F_BIT // FIQ Mode + mov sp,r0 + sub r0,r0,#FIQ_STACK_SIZE + msr CPSR_c,#MODE_IRQ|I_BIT|F_BIT // IRQ Mode + mov sp,r0 + sub r0,r0,#IRQ_STACK_SIZE + msr CPSR_c,#MODE_SVC|I_BIT|F_BIT // Supervisor Mode + mov sp,r0 + sub r0,r0,#SVC_STACK_SIZE + msr CPSR_c,#MODE_SYS|I_BIT|F_BIT // System Mode + mov sp,r0 + +// Copy initialized data to its execution address in RAM +// ----------------------------------------------------- +#ifdef ROM_RUN + ldr r1,=_etext // -> ROM data start + ldr r2,=_data // -> data start + ldr r3,=_edata // -> end of data +1: cmp r2,r3 // check if data to move + ldrlo r0,[r1],#4 // copy it + strlo r0,[r2],#4 + blo 1b // loop until done +#endif +// Clear .bss +// ---------- + mov r0,#0 // get a zero + ldr r1,=__bss_start // -> bss start + ldr r2,=__bss_end__ // -> bss end +2: cmp r1,r2 // check if data to clear + strlo r0,[r1],#4 // clear 4 bytes + blo 2b // loop until done + +/* + Call C++ constructors (for objects in "global scope") + ctor loop added by Martin Thomas 4/2005 + based on a Anglia Design example-application for ST ARM +*/ + + LDR r0, =__ctors_start__ + LDR r1, =__ctors_end__ +ctor_loop: + CMP r0, r1 + BEQ ctor_end + LDR r2, [r0], #4 + STMFD sp!, {r0-r1} + MOV lr, pc + MOV pc, r2 + LDMFD sp!, {r0-r1} + B ctor_loop +ctor_end: + +// Call main program: main(0) +// -------------------------- + mov r0,#0 // no arguments (argc = 0) + mov r1,r0 + mov r2,r0 + mov fp,r0 // null frame pointer + mov r7,r0 // null frame pointer for thumb + ldr r10,=main + mov lr,pc + +/* Enter the C code, use BX instruction so as to never return */ +/* use BLX (?) main if you want to use c++ destructors below */ + + bx r10 // enter main() + +/* "global object"-dtors are never called and it should not be + needed since there is no OS to exit to. */ +/* Call destructors */ +# LDR r0, =__dtors_start__ +# LDR r1, =__dtors_end__ +dtor_loop: +# CMP r0, r1 +# BEQ dtor_end +# LDR r2, [r0], #4 +# STMFD sp!, {r0-r1} +# MOV lr, pc +# MOV pc, r2 +# LDMFD sp!, {r0-r1} +# B dtor_loop +dtor_end: + + .size _start, . - _start + .endfunc + + .global _reset, reset, exit, abort + .func _reset +_reset: +reset: +exit: +abort: +#if 0 +// Disable interrupts, then force a hardware reset by driving P23 low +// ------------------------------------------------------------------- + mrs r0,cpsr // get PSR + orr r0,r0,#I_BIT|F_BIT // disable IRQ and FIQ + msr cpsr,r0 // set up status register + + ldr r1,=(PS_BASE) // PS Base Address + ldr r0,=(PS_PIO) // PIO Module + str r0,[r1,#PS_PCER_OFF] // enable its clock + ldr r1,=(PIO_BASE) // PIO Base Address + ldr r0,=(1<<23) // P23 + str r0,[r1,#PIO_PER_OFF] // make sure pin is contolled by PIO + str r0,[r1,#PIO_CODR_OFF] // set the pin low + str r0,[r1,#PIO_OER_OFF] // make it an output +#endif + b . // loop until reset + + .size _reset, . - _reset + .endfunc + + .end diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_build_warnings.txt b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_build_warnings.txt new file mode 100644 index 000000000..d81299083 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_build_warnings.txt @@ -0,0 +1,153 @@ +> "make" all + +-------- begin -------- +arm-elf-gcc (GCC) 4.0.1 (WinARM) +Copyright (C) 2005 Free Software Foundation, Inc. +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + + +Assembling (ARM-only): crt0.S +arm-elf-gcc -c -mcpu=arm7tdmi-s -mthumb-interwork -I. -x assembler-with-cpp -DROM_RUN -Wa,-adhlns=crt0.lst,-gdwarf-2 crt0.S -o crt0.o + +Compiling C: main.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=main.lst -I../../inc -I../../conf -MD -MP -MF .dep/main.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 main.c -o main.o + +Compiling C: uart.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=uart.lst -I../../inc -I../../conf -MD -MP -MF .dep/uart.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 uart.c -o uart.o + +Compiling C: ../../src/efs.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/efs.lst -I../../inc -I../../conf -MD -MP -MF .dep/efs.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/efs.c -o ../../src/efs.o + +Compiling C: ../../src/plibc.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/plibc.lst -I../../inc -I../../conf -MD -MP -MF .dep/plibc.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/plibc.c -o ../../src/plibc.o + +Compiling C: ../../src/disc.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/disc.lst -I../../inc -I../../conf -MD -MP -MF .dep/disc.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/disc.c -o ../../src/disc.o + +Compiling C: ../../src/partition.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/partition.lst -I../../inc -I../../conf -MD -MP -MF .dep/partition.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/partition.c -o ../../src/partition.o + +Compiling C: ../../src/time.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/time.lst -I../../inc -I../../conf -MD -MP -MF .dep/time.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/time.c -o ../../src/time.o +../../src/time.c:27: warning: no previous prototype for 'fs_makeDate' +../../src/time.c:48: warning: no previous prototype for 'fs_makeTime' + +Compiling C: ../../src/fs.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/fs.lst -I../../inc -I../../conf -MD -MP -MF .dep/fs.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/fs.c -o ../../src/fs.o + +Compiling C: ../../src/fat.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/fat.lst -I../../inc -I../../conf -MD -MP -MF .dep/fat.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/fat.c -o ../../src/fat.o +../../src/fat.c: In function 'fat_getNextClusterAddress': +../../src/fat.c:112: warning: cast increases required alignment of target type +../../src/fat.c:116: warning: cast increases required alignment of target type +../../src/fat.c: In function 'fat_setNextClusterAddress': +../../src/fat.c:175: warning: cast increases required alignment of target type +../../src/fat.c:180: warning: cast increases required alignment of target type +../../src/fat.c: In function 'fat_getNextClusterAddressWBuf': +../../src/fat.c:279: warning: cast increases required alignment of target type +../../src/fat.c:283: warning: cast increases required alignment of target type +../../src/fat.c: In function 'fat_setNextClusterAddressWBuf': +../../src/fat.c:332: warning: cast increases required alignment of target type +../../src/fat.c:336: warning: cast increases required alignment of target type + +Compiling C: ../../src/file.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/file.lst -I../../inc -I../../conf -MD -MP -MF .dep/file.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/file.c -o ../../src/file.o + +Compiling C: ../../src/dir.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/dir.lst -I../../inc -I../../conf -MD -MP -MF .dep/dir.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/dir.c -o ../../src/dir.o +../../src/dir.c: In function 'dir_getFileStructure': +../../src/dir.c:38: warning: cast increases required alignment of target type +../../src/dir.c: In function 'dir_setFirstCluster': +../../src/dir.c:95: warning: cast increases required alignment of target type +../../src/dir.c:96: warning: cast increases required alignment of target type +../../src/dir.c: In function 'dir_setFileSize': +../../src/dir.c:112: warning: cast increases required alignment of target type +../../src/dir.c: In function 'dir_findFileinBuf': +../../src/dir.c:150: warning: cast increases required alignment of target type +../../src/dir.c: In function 'dir_findFreeEntryinBuf': +../../src/dir.c:186: warning: cast increases required alignment of target type + +Compiling C: ../../src/ls.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/ls.lst -I../../inc -I../../conf -MD -MP -MF .dep/ls.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/ls.c -o ../../src/ls.o + +Compiling C: ../../src/mkfs.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/mkfs.lst -I../../inc -I../../conf -MD -MP -MF .dep/mkfs.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/mkfs.c -o ../../src/mkfs.o +../../src/mkfs.c: In function 'mkfs_makevfat': +../../src/mkfs.c:85: warning: cast increases required alignment of target type +../../src/mkfs.c:91: warning: cast increases required alignment of target type +../../src/mkfs.c:97: warning: cast increases required alignment of target type +../../src/mkfs.c:100: warning: cast increases required alignment of target type +../../src/mkfs.c:106: warning: cast increases required alignment of target type +../../src/mkfs.c:109: warning: cast increases required alignment of target type +../../src/mkfs.c:112: warning: cast increases required alignment of target type +../../src/mkfs.c:115: warning: cast increases required alignment of target type +../../src/mkfs.c:118: warning: cast increases required alignment of target type +../../src/mkfs.c:135: warning: cast increases required alignment of target type +../../src/mkfs.c:136: warning: cast increases required alignment of target type +../../src/mkfs.c:137: warning: cast increases required alignment of target type + +Compiling C: ../../src/debug.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/debug.lst -I../../inc -I../../conf -MD -MP -MF .dep/debug.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/debug.c -o ../../src/debug.o + +Compiling C: ../../src/ioman.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/ioman.lst -I../../inc -I../../conf -MD -MP -MF .dep/ioman.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/ioman.c -o ../../src/ioman.o + +Compiling C: ../../src/ui.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/ui.lst -I../../inc -I../../conf -MD -MP -MF .dep/ui.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/ui.c -o ../../src/ui.o +../../src/ui.c: In function 'listFiles': +../../src/ui.c:74: warning: cast increases required alignment of target type +../../src/ui.c:89: warning: cast increases required alignment of target type + +Compiling C: ../../src/extract.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/extract.lst -I../../inc -I../../conf -MD -MP -MF .dep/extract.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/extract.c -o ../../src/extract.o + +Compiling C: ../../src/interfaces/lpc2000_spi.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/interfaces/lpc2000_spi.lst -I../../inc -I../../conf -MD -MP -MF .dep/lpc2000_spi.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/interfaces/lpc2000_spi.c -o ../../src/interfaces/lpc2000_spi.o + +Compiling C: ../../src/interfaces/sd.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/interfaces/sd.lst -I../../inc -I../../conf -MD -MP -MF .dep/sd.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/interfaces/sd.c -o ../../src/interfaces/sd.o + +Compiling C: ../../src/interfaces/lpc2000_dbg_printf.c +arm-elf-gcc -c -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=../../src/interfaces/lpc2000_dbg_printf.lst -I../../inc -I../../conf -MD -MP -MF .dep/lpc2000_dbg_printf.o.d -Wstrict-prototypes -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -std=gnu99 ../../src/interfaces/lpc2000_dbg_printf.c -o ../../src/interfaces/lpc2000_dbg_printf.o + +Linking: main.elf +arm-elf-gcc -mthumb -mcpu=arm7tdmi-s -mthumb-interwork -I. -gdwarf-2 -DROM_RUN -Os -Wall -Wcast-align -Wcast-qual -Wimplicit -Wpointer-arith -Wswitch -Wredundant-decls -Wreturn-type -Wshadow -Wunused -Wa,-adhlns=crt0.lst -I../../inc -I../../conf -MD -MP -MF .dep/main.elf.d crt0.o main.o uart.o ../../src/efs.o ../../src/plibc.o ../../src/disc.o ../../src/partition.o ../../src/time.o ../../src/fs.o ../../src/fat.o ../../src/file.o ../../src/dir.o ../../src/ls.o ../../src/mkfs.o ../../src/debug.o ../../src/ioman.o ../../src/ui.o ../../src/extract.o ../../src/interfaces/lpc2000_spi.o ../../src/interfaces/sd.o ../../src/interfaces/lpc2000_dbg_printf.o --output main.elf -nostartfiles -Wl,-Map=main.map,--cref -lc -lnewlib-lpc -lm -lc -lgcc -lstdc++ -TLPC2138-ROM.ld + +Creating load file for Flash: main.hex +arm-elf-objcopy -O ihex main.elf main.hex + +Creating Extended Listing: main.lss +arm-elf-objdump -h -S -C main.elf > main.lss + +Creating Symbol Table: main.sym +arm-elf-nm -n main.elf > main.sym + +Size after: +main.elf : +section size addr +.text 17198 0 +.ctors 0 17198 +.dtors 0 17198 +.data 12 1073741824 +.bss 4168 1073741836 +.stack 1024 1073746176 +.comment 594 0 +.debug_aranges 800 0 +.debug_pubnames 3606 0 +.debug_info 29533 0 +.debug_abbrev 6363 0 +.debug_line 5750 0 +.debug_frame 4396 0 +.debug_str 4948 0 +.debug_loc 16626 0 +.debug_ranges 72 0 +Total 95090 + + + +Errors: none +-------- end -------- + + +> Process Exit Code: 0 \ No newline at end of file diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_output_SPI0.txt b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_output_SPI0.txt new file mode 100644 index 000000000..9af0812eb --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_output_SPI0.txt @@ -0,0 +1,65 @@ +MMC/SD Card Filesystem Test (P:LPC2138 L:EFSL) +efsl LPC2000-port and this Demo-Application +done by Martin Thomas, Kaiserslautern, Germany +CARD init...spiInit for SPI(0) +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +Card is initialising. +CSD: 00 26 00 32 1F 59 83 C4 FE FA CF 92 40 40 C1 40 +Drive Size is 252968960 Bytes (494080 Sectors) +Init done... +ok +Directory of 'root': +SD ( 0 bytes ) +MARTIN TXT ( 2475 bytes ) +LOGDAT TXT ( 200 bytes ) +LOGDAT2 TXT ( 825 bytes ) +LOGDAT3 TXT ( 650 bytes ) +LOGDAT4 TXT ( 1525 bytes ) +LOG1 TXT ( 112 bytes ) +LOGDAT5 TXT ( 325 bytes ) +19992211TXT ( 75 bytes ) +19700318TXT ( 56 bytes ) +19700319TXT ( 112 bytes ) +19851018TXT ( 170 bytes ) +19851019TXT ( 2040 bytes ) +19881018TXT ( 340 bytes ) +19881019TXT ( 1020 bytes ) +LOGDAT9 TXT ( 425 bytes ) +LOGDATA TXT ( 225 bytes ) +File logdatA.txt open. Content: +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt + +File logdatA.txt open for append. Appending...ok +File logdatA.txt open. Content: +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt + diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_output_SSP.txt b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_output_SSP.txt new file mode 100644 index 000000000..4ddf98df4 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/demo_output_SSP.txt @@ -0,0 +1,67 @@ +MMC/SD Card Filesystem Test (P:LPC2138 L:EFSL) +efsl LPC2000-port and this Demo-Application +done by Martin Thomas, Kaiserslautern, Germany +CARD init...spiInit for SSP/SPI1 +Card is initialising. +Card is initialising. +Card is initialising. +CSD: 00 26 00 32 1F 59 83 C4 FE FA CF 92 40 40 C1 40 +Drive Size is 252968960 Bytes (494080 Sectors) +Init done... +ok +Directory of 'root': +SD ( 0 bytes ) +MARTIN TXT ( 2475 bytes ) +LOGDAT TXT ( 200 bytes ) +LOGDAT2 TXT ( 825 bytes ) +LOGDAT3 TXT ( 650 bytes ) +LOGDAT4 TXT ( 1525 bytes ) +LOG1 TXT ( 112 bytes ) +LOGDAT5 TXT ( 325 bytes ) +19992211TXT ( 75 bytes ) +19700318TXT ( 56 bytes ) +19700319TXT ( 112 bytes ) +19851018TXT ( 170 bytes ) +19851019TXT ( 2040 bytes ) +19881018TXT ( 340 bytes ) +19881019TXT ( 1020 bytes ) +LOGDAT9 TXT ( 475 bytes ) +LOGDATA TXT ( 400 bytes ) +File logdatA.txt open. Content: +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt + +File logdatA.txt open for append. Appending...ok +File logdatA.txt open. Content: +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt +Martin hat's angehaengt + diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/inttypes.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/inttypes.h new file mode 100644 index 000000000..cf89fedbd --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/inttypes.h @@ -0,0 +1,150 @@ +/* Copyright (c) 2002, Marek Michalkiewicz + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. */ + +/* $Id: inttypes.h,v 1.1 2005/11/16 17:33:36 lennartyseboodt Exp $ */ + +/* + inttypes.h + + Contributors: + Created by Marek Michalkiewicz + */ + +#ifndef __INTTYPES_H_ +#define __INTTYPES_H_ + +/** \defgroup avr_inttypes Integer Types + \code #include \endcode + + Use [u]intN_t if you need exactly N bits. + + Since these typedefs are mandated by the C99 standard, they are preferred + over rolling your own typedefs. + + \note If avr-gcc's \c -mint8 option is used, no 32-bit types will be + available. + + \todo There is a pending patch that may go into gcc to change the + behaviour of the -mint8 option. The current (2003-09-17) situation for + -mint8 is sizeof(int) == 1, sizeof(long) == 2 and sizeof(long long) == 8. + Note the absence of a 4-byte, 32-bit type. The patch proposes to change + sozeof(long long) to be 4 bytes (32 bits). When and if the patch is + included in gcc, we will need to change avr-libc accordingly. */ + +#if __INT_MAX__ == 127 +# define __USING_MINT8 1 +#endif + +/** \name 8-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 8-bit signed type. */ + +typedef signed char int8_t; + +/** \ingroup avr_inttypes + 8-bit unsigned type. */ + +typedef unsigned char uint8_t; + +#if __USING_MINT8 + +typedef long int16_t; +typedef unsigned long uint16_t; + +#else /* no -mint8 */ + +/*@}*/ + +/** \name 16-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 16-bit signed type. */ + +typedef int int16_t; + +/** \ingroup avr_inttypes + 16-bit unsigned type. */ + +typedef unsigned int uint16_t; + +/*@}*/ + +/** \name 32-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 32-bit signed type. */ + +typedef long int32_t; + +/** \ingroup avr_inttypes + 32-bit unsigned type. */ + +typedef unsigned long uint32_t; + +#endif + +/*@}*/ + +/** \name 64-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 64-bit signed type. */ + +typedef long long int64_t; + +/** \ingroup avr_inttypes + 64-bit unsigned type. */ + +typedef unsigned long long uint64_t; + +/*@}*/ + +/** \name Pointer types. + These allow you to declare variables of the same size as a pointer. */ + +/*@{*/ + +/** \ingroup avr_inttypes + Signed pointer compatible type. */ + +typedef int16_t intptr_t; + +/** \ingroup avr_inttypes + Unsigned pointer compatible type. */ + +typedef uint16_t uintptr_t; + +/*@}*/ + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpc2138_efsl_demo1.pnproj b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpc2138_efsl_demo1.pnproj new file mode 100644 index 000000000..58e86e5e4 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpc2138_efsl_demo1.pnproj @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpcUART.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpcUART.h new file mode 100644 index 000000000..215461691 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpcUART.h @@ -0,0 +1,86 @@ +/****************************************************************************** + * + * $RCSfile: lpcUART.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + * reduced to learn what is needed for "minimal" uart0-operation + *****************************************************************************/ +#ifndef INC_LPC_UART_H +#define INC_LPC_UART_H + +/////////////////////////////////////////////////////////////////////////////// +// UART defines + +// Interrupt Enable Register bit definitions +#define UIER_ERBFI (1 << 0) // Enable Receive Data Available Interrupt +#define UIER_ETBEI (1 << 1) // Enable Transmit Holding Register Empty Interrupt +#define UIER_ELSI (1 << 2) // Enable Receive Line Status Interrupt +#define UIER_EDSSI (1 << 3) // Enable MODEM Status Interrupt + +// Interrupt ID Register bit definitions +#define UIIR_NO_INT (1 << 0) // NO INTERRUPTS PENDING +#define UIIR_MS_INT (0 << 1) // MODEM Status +#define UIIR_THRE_INT (1 << 1) // Transmit Holding Register Empty +#define UIIR_RDA_INT (2 << 1) // Receive Data Available +#define UIIR_RLS_INT (3 << 1) // Receive Line Status +#define UIIR_CTI_INT (6 << 1) // Character Timeout Indicator +#define UIIR_ID_MASK 0x0E + +// FIFO Control Register bit definitions +#define UFCR_FIFO_ENABLE (1 << 0) // FIFO Enable +#define UFCR_RX_FIFO_RESET (1 << 1) // Reset Receive FIFO +#define UFCR_TX_FIFO_RESET (1 << 2) // Reset Transmit FIFO +#define UFCR_FIFO_TRIG1 (0 << 6) // Trigger @ 1 character in FIFO +#define UFCR_FIFO_TRIG4 (1 << 6) // Trigger @ 4 characters in FIFO +#define UFCR_FIFO_TRIG8 (2 << 6) // Trigger @ 8 characters in FIFO +#define UFCR_FIFO_TRIG14 (3 << 6) // Trigger @ 14 characters in FIFO + +// Line Control Register bit definitions +#define ULCR_CHAR_5 (0 << 0) // 5-bit character length +#define ULCR_CHAR_6 (1 << 0) // 6-bit character length +#define ULCR_CHAR_7 (2 << 0) // 7-bit character length +#define ULCR_CHAR_8 (3 << 0) // 8-bit character length +#define ULCR_STOP_1 (0 << 2) // 1 stop bit +#define ULCR_STOP_2 (1 << 2) // 2 stop bits +#define ULCR_PAR_NO (0 << 3) // No Parity +#define ULCR_PAR_ODD (1 << 3) // Odd Parity +#define ULCR_PAR_EVEN (3 << 3) // Even Parity +#define ULCR_PAR_MARK (5 << 3) // MARK "1" Parity +#define ULCR_PAR_SPACE (7 << 3) // SPACE "0" Paruty +#define ULCR_BREAK_ENABLE (1 << 6) // Output BREAK line condition +#define ULCR_DLAB_ENABLE (1 << 7) // Enable Divisor Latch Access + +// Modem Control Register bit definitions +#define UMCR_DTR (1 << 0) // Data Terminal Ready +#define UMCR_RTS (1 << 1) // Request To Send +#define UMCR_LB (1 << 4) // Loopback + +// Line Status Register bit definitions +#define ULSR_RDR (1 << 0) // Receive Data Ready +#define ULSR_OE (1 << 1) // Overrun Error +#define ULSR_PE (1 << 2) // Parity Error +#define ULSR_FE (1 << 3) // Framing Error +#define ULSR_BI (1 << 4) // Break Interrupt +#define ULSR_THRE (1 << 5) // Transmit Holding Register Empty +#define ULSR_TEMT (1 << 6) // Transmitter Empty +#define ULSR_RXFE (1 << 7) // Error in Receive FIFO +#define ULSR_ERR_MASK 0x1E + +// Modem Status Register bit definitions +#define UMSR_DCTS (1 << 0) // Delta Clear To Send +#define UMSR_DDSR (1 << 1) // Delta Data Set Ready +#define UMSR_TERI (1 << 2) // Trailing Edge Ring Indicator +#define UMSR_DDCD (1 << 3) // Delta Data Carrier Detect +#define UMSR_CTS (1 << 4) // Clear To Send +#define UMSR_DSR (1 << 5) // Data Set Ready +#define UMSR_RI (1 << 6) // Ring Indicator +#define UMSR_DCD (1 << 7) // Data Carrier Detect + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpc_config.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpc_config.h new file mode 100644 index 000000000..a7eec9b7e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/lpc_config.h @@ -0,0 +1,52 @@ +/* System Config */ + +/* + PLL + + - Main clock F_OSC=12,0MHz @ Keil MCB2130) [limits: 10 MHz to 25 MHz] + - System should run at max. Frequency (60MHz) [limit: max 60 MHz] + - Choose multiplier M=5 + so cclk = M * F_OSC= 5 * 12000000 = 60000000 Hz + - MSEL-Bit in PLLCFG (bits 0-4) MSEL = M-1 + - F_CCO must be inbetween the limits 156 MHz to 320 MHz + datasheet: F_CCO = F_OSC * M * 2 * P + - choose devider P=2 => F_CCO = 12000000Hz * 5 * 2 * 2 + = 240 MHz + - PSEL0 (Bit5 in PLLCFG) = 1, PSEL1 (Bit6) = 0 (0b01) +*/ +#define FOSC 12000000 +#define PLL_M 5 +#define MSEL (PLL_M-1) +#define PSEL0 5 +#define PSEL1 6 + +#define PLLE 0 +#define PLLC 1 + +#define PLOCK 10 + +#define PLL_FEED1 0xAA +#define PLL_FEED2 0x55 + + +/* + MAM(Memory Accelerator Module) + - choosen: MAM fully enabled = MAM-Mode 2 + - System-Clock cclk=60MHz -> 3 CCLKs are proposed as fetch timing +*/ +#define MAM_MODE 2 +#define MAM_FETCH 3 + +/* + VPB (V... Pheriphal Bus) + - choosen: VPB should run at full speed -> devider VPBDIV=1 + => pclk = cclk = 60MHz +*/ +#define VPBDIV_VAL 1 + +/* + SCB +*/ +#define MEMMAP_BOOT_LOADER_MODE 0 // Interrupt vectors are re-mapped to Boot Block. +#define MEMMAP_USER_FLASH_MODE (1<<0) // Interrupt vectors are not re-mapped and reside in Flash. +#define MEMMAP_USER_RAM_MODE (1<<1) // Interrupt vectors are re-mapped to Static RAM. diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/main.c b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/main.c new file mode 100644 index 000000000..4f7e37117 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/main.c @@ -0,0 +1,189 @@ +/****************************************************************************** + + efsl Demo-Application for Philips LPC2138 ARM7TDMI-S + + Copyright (c) 2005 + Martin Thomas, Kaiserslautern, Germany + + *****************************************************************************/ + +#include + +#include "LPC213x.h" +#include "lpc_config.h" + +#include "uart.h" + +#include "efs.h" +#include "ls.h" +#include "mkfs.h" +#include "interfaces/lpc2000_dbg_printf.h" + +#define rprintf lpc2000_debug_printf + +#define BAUD 115200 + +#define BIT(x) ((unsigned long)1<40MHz + MAMTIM = MAM_FETCH; + // c. enable MAM + MAMCR = MAM_MODE; + + // --- set VPB speed --- + VPBDIV = VPBDIV_VAL; + + // --- map INT-vector --- + #if defined(RAM_RUN) + MEMMAP = MEMMAP_USER_RAM_MODE; + #elif defined(ROM_RUN) + MEMMAP = MEMMAP_USER_FLASH_MODE; + #else + #error RUN_MODE not defined! + #endif +} + +static void gpioInit(void) +{ + LEDSET = BIT(LED1PIN); // set Bit = LED off (active low) + LEDDIR |= BIT(LED1PIN); // define LED-Pin as output +} + +static void ledToggle(void) +{ + static unsigned char state=0; + + state = !state; + if (state) LEDCLR = BIT(LED1PIN); // set Bit = LED on + else LEDSET = BIT(LED1PIN); // set Bit = LED off (active low) +} + +#if 0 +static void hang(void) +{ + while(1); +} +#endif + + +EmbeddedFileSystem efs; +EmbeddedFile filer, filew; +DirList list; +unsigned short e; +unsigned char buf[513]; + + +int main(void) +{ + int ch; + int8_t res; + + systemInit(); + gpioInit(); + + uart1Init(UART_BAUD(BAUD), UART_8N1, UART_FIFO_8); // setup the UART + + uart1Puts("\r\nMMC/SD Card Filesystem Test (P:LPC2138 L:EFSL)\r\n"); + uart1Puts("efsl LPC2000-port and this Demo-Application\r\n"); + uart1Puts("done by Martin Thomas, Kaiserslautern, Germany\r\n"); + + /* init efsl debug-output */ + lpc2000_debug_devopen(uart1Putch); + + ledToggle(); + + rprintf("CARD init..."); + if ( ( res = efs_init( &efs, 0 ) ) != 0 ) { + rprintf("failed with %i\n",res); + } + else { + rprintf("ok\n"); + rprintf("Directory of 'root':\n"); + ls_openDir( &list, &(efs.myFs) , "/"); + while ( ls_getNext( &list ) == 0 ) { + list.currentEntry.FileName[LIST_MAXLENFILENAME-1] = '\0'; + rprintf( "%s ( %li bytes )\n" , + list.currentEntry.FileName, + list.currentEntry.FileSize ) ; + } + + if ( file_fopen( &filer, &efs.myFs , LogFileName , 'r' ) == 0 ) { + rprintf("File %s open. Content:\n", LogFileName); + while ( ( e = file_read( &filer, 512, buf ) ) != 0 ) { + buf[e]='\0'; + uart1Puts((char*)buf); + } + rprintf("\n"); + file_fclose( &filer ); + } + + if ( file_fopen( &filew, &efs.myFs , LogFileName , 'a' ) == 0 ) { + rprintf("File %s open for append. Appending...", LogFileName); + strcpy((char*)buf, "Martin hat's angehaengt\r\n"); + if ( file_write( &filew, strlen((char*)buf), buf ) == strlen((char*)buf) ) { + rprintf("ok\n"); + } + else { + rprintf("fail\n"); + } + file_fclose( &filew ); + } + + if ( file_fopen( &filer, &efs.myFs , LogFileName , 'r' ) == 0 ) { + rprintf("File %s open. Content:\n", LogFileName); + while ( ( e = file_read( &filer, 512, buf ) ) != 0 ) { + buf[e]='\0'; + uart1Puts((char*)buf); + } + rprintf("\n"); + file_fclose( &filer ); + } + + fs_umount( &efs.myFs ) ; + } + + while(1) { + if ((ch = uart1Getch()) >= 0) { + uart1Puts("You pressed : "); + uart1Putch(ch); + uart1Puts("\r\n"); + if ( ch == 'M' ) { + rprintf("Creating FS\n"); + mkfs_makevfat(&efs.myPart); + } + ledToggle(); + } + } + + return 0; /* never reached */ +} diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/uart.c b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/uart.c new file mode 100644 index 000000000..506608e20 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_standalone/uart.c @@ -0,0 +1,186 @@ +/****************************************************************************** + * + * $RCSfile: uart.c,v $ + * $Revision: 1.1 $ + * + * This module provides interface routines to the LPC ARM UARTs. + * Copyright 2004, R O SoftWare + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + * reduced to see what has to be done for minimum UART-support by mthomas + *****************************************************************************/ + +// #warning "this is a reduced version of the R O Software code" + +#include "LPC213x.h" +#include "uart.h" + +/* on LPC210x: UART0 TX-Pin=P0.2, RX-Pin=P0.1 + PINSEL0 has to be set to "UART-Function" = Function "01" + for Pin 0.0 and 0.1 */ + +#define PINSEL_BITPIN0 0 +#define PINSEL_BITPIN1 2 +#define PINSEL_BITPIN8 16 +#define PINSEL_BITPIN9 18 +#define PINSEL_FIRST_ALT_FUNC 1 +#define PINSEL_SECOND_ALT_FUNC 2 +#define PINSEL_THIRD_ALT_FUNC 3 + +// Values of Bits 0-3 in PINSEL to activate UART0 +#define UART0_PINSEL ((PINSEL_FIRST_ALT_FUNC<> 8); // set for baud high byte + + // set the number of characters and other + // user specified operating parameters + // Databits, Parity, Stopbits - Settings in Line Control Register + U0LCR = (mode & ~(1<> 8); // set for baud high byte + + // set the number of characters and other + // user specified operating parameters + // Databits, Parity, Stopbits - Settings in Line Control Register + U1LCR = (mode & ~(1< ROM + + /***** old: + .text : + { + *crt0.o (.text) + *(.text) + *(.rodata) + *(.rodata*) + *(.glue_7) + *(.glue_7t) + } > ROM + *****/ + + . = ALIGN(4); + + /* .ctors .dtors are used for c++ constructors/destructors */ + /* added by Martin Thomas 4/2005 based on Anglia Design example */ + .ctors : + { + PROVIDE(__ctors_start__ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(__ctors_end__ = .); + } >ROM + + .dtors : + { + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + } >ROM + + . = ALIGN(4); + /* mthomas - end */ + + _etext = . ; + PROVIDE (etext = .); + + /* .data section which is used for initialized data */ + .data : AT (_etext) + { + _data = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + SORT(CONSTRUCTORS) /* mt 4/2005 */ + . = ALIGN(4); + *(.fastrun) /* !!!! "RAM-Function" example */ + } > RAM + + . = ALIGN(4); + _edata = . ; + PROVIDE (edata = .); + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + __bss_start = . ; + __bss_start__ = . ; + *(.bss) + *(.gnu.linkonce.b*) + *(COMMON) + . = ALIGN(4); + } > RAM + + . = ALIGN(4); + __bss_end__ = . ; + PROVIDE (__bss_end = .); + + .stack ALIGN(256) : + { + . += STACK_SIZE; + PROVIDE (_stack = .); + } > RAM + + _end = . ; + PROVIDE (end = .); + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/LPC213x.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/LPC213x.h new file mode 100644 index 000000000..f5ec82aca --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/LPC213x.h @@ -0,0 +1,273 @@ +/***********************************************************************/ +/* This file is part of the uVision/ARM development tools */ +/* Copyright KEIL ELEKTRONIK GmbH 2002-2005 */ +/***********************************************************************/ +/* */ +/* LPC213X.H: Header file for Philips LPC2131/32/34/36/38 */ +/* */ +/***********************************************************************/ + +#ifndef __LPC213x_H +#define __LPC213x_H + +/* Vectored Interrupt Controller (VIC) */ +#define VICIRQStatus (*((volatile unsigned long *) 0xFFFFF000)) +#define VICFIQStatus (*((volatile unsigned long *) 0xFFFFF004)) +#define VICRawIntr (*((volatile unsigned long *) 0xFFFFF008)) +#define VICIntSelect (*((volatile unsigned long *) 0xFFFFF00C)) +#define VICIntEnable (*((volatile unsigned long *) 0xFFFFF010)) +#define VICIntEnClr (*((volatile unsigned long *) 0xFFFFF014)) +#define VICSoftInt (*((volatile unsigned long *) 0xFFFFF018)) +#define VICSoftIntClr (*((volatile unsigned long *) 0xFFFFF01C)) +#define VICProtection (*((volatile unsigned long *) 0xFFFFF020)) +#define VICVectAddr (*((volatile unsigned long *) 0xFFFFF030)) +#define VICDefVectAddr (*((volatile unsigned long *) 0xFFFFF034)) +#define VICVectAddr0 (*((volatile unsigned long *) 0xFFFFF100)) +#define VICVectAddr1 (*((volatile unsigned long *) 0xFFFFF104)) +#define VICVectAddr2 (*((volatile unsigned long *) 0xFFFFF108)) +#define VICVectAddr3 (*((volatile unsigned long *) 0xFFFFF10C)) +#define VICVectAddr4 (*((volatile unsigned long *) 0xFFFFF110)) +#define VICVectAddr5 (*((volatile unsigned long *) 0xFFFFF114)) +#define VICVectAddr6 (*((volatile unsigned long *) 0xFFFFF118)) +#define VICVectAddr7 (*((volatile unsigned long *) 0xFFFFF11C)) +#define VICVectAddr8 (*((volatile unsigned long *) 0xFFFFF120)) +#define VICVectAddr9 (*((volatile unsigned long *) 0xFFFFF124)) +#define VICVectAddr10 (*((volatile unsigned long *) 0xFFFFF128)) +#define VICVectAddr11 (*((volatile unsigned long *) 0xFFFFF12C)) +#define VICVectAddr12 (*((volatile unsigned long *) 0xFFFFF130)) +#define VICVectAddr13 (*((volatile unsigned long *) 0xFFFFF134)) +#define VICVectAddr14 (*((volatile unsigned long *) 0xFFFFF138)) +#define VICVectAddr15 (*((volatile unsigned long *) 0xFFFFF13C)) +#define VICVectCntl0 (*((volatile unsigned long *) 0xFFFFF200)) +#define VICVectCntl1 (*((volatile unsigned long *) 0xFFFFF204)) +#define VICVectCntl2 (*((volatile unsigned long *) 0xFFFFF208)) +#define VICVectCntl3 (*((volatile unsigned long *) 0xFFFFF20C)) +#define VICVectCntl4 (*((volatile unsigned long *) 0xFFFFF210)) +#define VICVectCntl5 (*((volatile unsigned long *) 0xFFFFF214)) +#define VICVectCntl6 (*((volatile unsigned long *) 0xFFFFF218)) +#define VICVectCntl7 (*((volatile unsigned long *) 0xFFFFF21C)) +#define VICVectCntl8 (*((volatile unsigned long *) 0xFFFFF220)) +#define VICVectCntl9 (*((volatile unsigned long *) 0xFFFFF224)) +#define VICVectCntl10 (*((volatile unsigned long *) 0xFFFFF228)) +#define VICVectCntl11 (*((volatile unsigned long *) 0xFFFFF22C)) +#define VICVectCntl12 (*((volatile unsigned long *) 0xFFFFF230)) +#define VICVectCntl13 (*((volatile unsigned long *) 0xFFFFF234)) +#define VICVectCntl14 (*((volatile unsigned long *) 0xFFFFF238)) +#define VICVectCntl15 (*((volatile unsigned long *) 0xFFFFF23C)) + +/* Pin Connect Block */ +#define PINSEL0 (*((volatile unsigned long *) 0xE002C000)) +#define PINSEL1 (*((volatile unsigned long *) 0xE002C004)) +#define PINSEL2 (*((volatile unsigned long *) 0xE002C014)) + +/* General Purpose Input/Output (GPIO) */ +#define IOPIN0 (*((volatile unsigned long *) 0xE0028000)) +#define IOSET0 (*((volatile unsigned long *) 0xE0028004)) +#define IODIR0 (*((volatile unsigned long *) 0xE0028008)) +#define IOCLR0 (*((volatile unsigned long *) 0xE002800C)) +#define IOPIN1 (*((volatile unsigned long *) 0xE0028010)) +#define IOSET1 (*((volatile unsigned long *) 0xE0028014)) +#define IODIR1 (*((volatile unsigned long *) 0xE0028018)) +#define IOCLR1 (*((volatile unsigned long *) 0xE002801C)) + +/* Memory Accelerator Module (MAM) */ +#define MAMCR (*((volatile unsigned char *) 0xE01FC000)) +#define MAMTIM (*((volatile unsigned char *) 0xE01FC004)) +#define MEMMAP (*((volatile unsigned char *) 0xE01FC040)) + +/* Phase Locked Loop (PLL) */ +#define PLLCON (*((volatile unsigned char *) 0xE01FC080)) +#define PLLCFG (*((volatile unsigned char *) 0xE01FC084)) +#define PLLSTAT (*((volatile unsigned short*) 0xE01FC088)) +#define PLLFEED (*((volatile unsigned char *) 0xE01FC08C)) + +/* VPB Divider */ +#define VPBDIV (*((volatile unsigned char *) 0xE01FC100)) + +/* Power Control */ +#define PCON (*((volatile unsigned char *) 0xE01FC0C0)) +#define PCONP (*((volatile unsigned long *) 0xE01FC0C4)) + +/* External Interrupts */ +#define EXTINT (*((volatile unsigned char *) 0xE01FC140)) +#define INTWAKE (*((volatile unsigned char *) 0xE01FC144)) +#define EXTMODE (*((volatile unsigned char *) 0xE01FC148)) +#define EXTPOLAR (*((volatile unsigned char *) 0xE01FC14C)) + +/* Reset */ +#define RSID (*((volatile unsigned char *) 0xE01FC180)) + +/* Code Security / Debugging */ +#define CSPR (*((volatile unsigned char *) 0xE01FC184)) + +/* Timer 0 */ +#define T0IR (*((volatile unsigned long *) 0xE0004000)) +#define T0TCR (*((volatile unsigned long *) 0xE0004004)) +#define T0TC (*((volatile unsigned long *) 0xE0004008)) +#define T0PR (*((volatile unsigned long *) 0xE000400C)) +#define T0PC (*((volatile unsigned long *) 0xE0004010)) +#define T0MCR (*((volatile unsigned long *) 0xE0004014)) +#define T0MR0 (*((volatile unsigned long *) 0xE0004018)) +#define T0MR1 (*((volatile unsigned long *) 0xE000401C)) +#define T0MR2 (*((volatile unsigned long *) 0xE0004020)) +#define T0MR3 (*((volatile unsigned long *) 0xE0004024)) +#define T0CCR (*((volatile unsigned long *) 0xE0004028)) +#define T0CR0 (*((volatile unsigned long *) 0xE000402C)) +#define T0CR1 (*((volatile unsigned long *) 0xE0004030)) +#define T0CR2 (*((volatile unsigned long *) 0xE0004034)) +#define T0CR3 (*((volatile unsigned long *) 0xE0004038)) +#define T0EMR (*((volatile unsigned long *) 0xE000403C)) +#define T0CTCR (*((volatile unsigned long *) 0xE0004070)) + +/* Timer 1 */ +#define T1IR (*((volatile unsigned long *) 0xE0008000)) +#define T1TCR (*((volatile unsigned long *) 0xE0008004)) +#define T1TC (*((volatile unsigned long *) 0xE0008008)) +#define T1PR (*((volatile unsigned long *) 0xE000800C)) +#define T1PC (*((volatile unsigned long *) 0xE0008010)) +#define T1MCR (*((volatile unsigned long *) 0xE0008014)) +#define T1MR0 (*((volatile unsigned long *) 0xE0008018)) +#define T1MR1 (*((volatile unsigned long *) 0xE000801C)) +#define T1MR2 (*((volatile unsigned long *) 0xE0008020)) +#define T1MR3 (*((volatile unsigned long *) 0xE0008024)) +#define T1CCR (*((volatile unsigned long *) 0xE0008028)) +#define T1CR0 (*((volatile unsigned long *) 0xE000802C)) +#define T1CR1 (*((volatile unsigned long *) 0xE0008030)) +#define T1CR2 (*((volatile unsigned long *) 0xE0008034)) +#define T1CR3 (*((volatile unsigned long *) 0xE0008038)) +#define T1EMR (*((volatile unsigned long *) 0xE000803C)) +#define T1CTCR (*((volatile unsigned long *) 0xE0008070)) + +/* Pulse Width Modulator (PWM) */ +#define PWMIR (*((volatile unsigned long *) 0xE0014000)) +#define PWMTCR (*((volatile unsigned long *) 0xE0014004)) +#define PWMTC (*((volatile unsigned long *) 0xE0014008)) +#define PWMPR (*((volatile unsigned long *) 0xE001400C)) +#define PWMPC (*((volatile unsigned long *) 0xE0014010)) +#define PWMMCR (*((volatile unsigned long *) 0xE0014014)) +#define PWMMR0 (*((volatile unsigned long *) 0xE0014018)) +#define PWMMR1 (*((volatile unsigned long *) 0xE001401C)) +#define PWMMR2 (*((volatile unsigned long *) 0xE0014020)) +#define PWMMR3 (*((volatile unsigned long *) 0xE0014024)) +#define PWMMR4 (*((volatile unsigned long *) 0xE0014040)) +#define PWMMR5 (*((volatile unsigned long *) 0xE0014044)) +#define PWMMR6 (*((volatile unsigned long *) 0xE0014048)) +#define PWMEMR (*((volatile unsigned long *) 0xE001403C)) +#define PWMPCR (*((volatile unsigned long *) 0xE001404C)) +#define PWMLER (*((volatile unsigned long *) 0xE0014050)) + +/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ +#define U0RBR (*((volatile unsigned char *) 0xE000C000)) +#define U0THR (*((volatile unsigned char *) 0xE000C000)) +#define U0IER (*((volatile unsigned char *) 0xE000C004)) +#define U0IIR (*((volatile unsigned char *) 0xE000C008)) +#define U0FCR (*((volatile unsigned char *) 0xE000C008)) +#define U0LCR (*((volatile unsigned char *) 0xE000C00C)) +#define U0LSR (*((volatile unsigned char *) 0xE000C014)) +#define U0SCR (*((volatile unsigned char *) 0xE000C01C)) +#define U0DLL (*((volatile unsigned char *) 0xE000C000)) +#define U0DLM (*((volatile unsigned char *) 0xE000C004)) +#define U0TER (*((volatile unsigned char *) 0xE000C030)) + +/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ +#define U1RBR (*((volatile unsigned char *) 0xE0010000)) +#define U1THR (*((volatile unsigned char *) 0xE0010000)) +#define U1IER (*((volatile unsigned char *) 0xE0010004)) +#define U1IIR (*((volatile unsigned char *) 0xE0010008)) +#define U1FCR (*((volatile unsigned char *) 0xE0010008)) +#define U1LCR (*((volatile unsigned char *) 0xE001000C)) +#define U1MCR (*((volatile unsigned char *) 0xE0010010)) +#define U1LSR (*((volatile unsigned char *) 0xE0010014)) +#define U1MSR (*((volatile unsigned char *) 0xE0010018)) +#define U1SCR (*((volatile unsigned char *) 0xE001001C)) +#define U1DLL (*((volatile unsigned char *) 0xE0010000)) +#define U1DLM (*((volatile unsigned char *) 0xE0010004)) +#define U1TER (*((volatile unsigned char *) 0xE0010030)) + +/* I2C Interface 0 */ +#define I20CONSET (*((volatile unsigned char *) 0xE001C000)) +#define I20STAT (*((volatile unsigned char *) 0xE001C004)) +#define I20DAT (*((volatile unsigned char *) 0xE001C008)) +#define I20ADR (*((volatile unsigned char *) 0xE001C00C)) +#define I20SCLH (*((volatile unsigned short*) 0xE001C010)) +#define I20SCLL (*((volatile unsigned short*) 0xE001C014)) +#define I20CONCLR (*((volatile unsigned char *) 0xE001C018)) + +/* I2C Interface 1 */ +#define I21CONSET (*((volatile unsigned char *) 0xE005C000)) +#define I21STAT (*((volatile unsigned char *) 0xE005C004)) +#define I21DAT (*((volatile unsigned char *) 0xE005C008)) +#define I21ADR (*((volatile unsigned char *) 0xE005C00C)) +#define I21SCLH (*((volatile unsigned short*) 0xE005C010)) +#define I21SCLL (*((volatile unsigned short*) 0xE005C014)) +#define I21CONCLR (*((volatile unsigned char *) 0xE005C018)) + +/* SPI0 (Serial Peripheral Interface 0) */ +#define S0SPCR (*((volatile unsigned char *) 0xE0020000)) +#define S0SPSR (*((volatile unsigned char *) 0xE0020004)) +#define S0SPDR (*((volatile unsigned char *) 0xE0020008)) +#define S0SPCCR (*((volatile unsigned char *) 0xE002000C)) +#define S0SPTCR (*((volatile unsigned char *) 0xE0020010)) +#define S0SPTSR (*((volatile unsigned char *) 0xE0020014)) +#define S0SPTOR (*((volatile unsigned char *) 0xE0020018)) +#define S0SPINT (*((volatile unsigned char *) 0xE002001C)) + +/* SSP Controller */ +#define SSPCR0 (*((volatile unsigned short* ) 0xE0068000)) +#define SSPCR1 (*((volatile unsigned char * ) 0xE0068004)) +#define SSPDR (*((volatile unsigned short* ) 0xE0068008)) +#define SSPSR (*((volatile unsigned char * ) 0xE006800C)) +#define SSPCPSR (*((volatile unsigned char * ) 0xE0068010)) +#define SSPIMSC (*((volatile unsigned char * ) 0xE0068014)) +#define SSPRIS (*((volatile unsigned char * ) 0xE0068018)) +#define SSPMIS (*((volatile unsigned char * ) 0xE006801C)) +#define SSPICR (*((volatile unsigned char * ) 0xE0068020)) +#define SSPDMACR (*((volatile unsigned char * ) 0xE0068024)) + +/* Real Time Clock */ +#define ILR (*((volatile unsigned char *) 0xE0024000)) +#define CTC (*((volatile unsigned short*) 0xE0024004)) +#define CCR (*((volatile unsigned char *) 0xE0024008)) +#define CIIR (*((volatile unsigned char *) 0xE002400C)) +#define AMR (*((volatile unsigned char *) 0xE0024010)) +#define CTIME0 (*((volatile unsigned long *) 0xE0024014)) +#define CTIME1 (*((volatile unsigned long *) 0xE0024018)) +#define CTIME2 (*((volatile unsigned long *) 0xE002401C)) +#define SEC (*((volatile unsigned char *) 0xE0024020)) +#define MIN (*((volatile unsigned char *) 0xE0024024)) +#define HOUR (*((volatile unsigned char *) 0xE0024028)) +#define DOM (*((volatile unsigned char *) 0xE002402C)) +#define DOW (*((volatile unsigned char *) 0xE0024030)) +#define DOY (*((volatile unsigned short*) 0xE0024034)) +#define MONTH (*((volatile unsigned char *) 0xE0024038)) +#define YEAR (*((volatile unsigned short*) 0xE002403C)) +#define ALSEC (*((volatile unsigned char *) 0xE0024060)) +#define ALMIN (*((volatile unsigned char *) 0xE0024064)) +#define ALHOUR (*((volatile unsigned char *) 0xE0024068)) +#define ALDOM (*((volatile unsigned char *) 0xE002406C)) +#define ALDOW (*((volatile unsigned char *) 0xE0024070)) +#define ALDOY (*((volatile unsigned short*) 0xE0024074)) +#define ALMON (*((volatile unsigned char *) 0xE0024078)) +#define ALYEAR (*((volatile unsigned short*) 0xE002407C)) +#define PREINT (*((volatile unsigned short*) 0xE0024080)) +#define PREFRAC (*((volatile unsigned short*) 0xE0024084)) + +/* A/D Converter 0 (AD0) */ +#define AD0CR (*((volatile unsigned long *) 0xE0034000)) +#define AD0DR (*((volatile unsigned long *) 0xE0034004)) + +/* A/D Converter 1 (AD1) */ +#define AD1CR (*((volatile unsigned long *) 0xE0060000)) +#define AD1DR (*((volatile unsigned long *) 0xE0060004)) + +/* D/A Converter */ +#define DACR (*((volatile unsigned long *) 0xE006C000)) + + +/* Watchdog */ +#define WDMOD (*((volatile unsigned char *) 0xE0000000)) +#define WDTC (*((volatile unsigned long *) 0xE0000004)) +#define WDFEED (*((volatile unsigned char *) 0xE0000008)) +#define WDTV (*((volatile unsigned long *) 0xE000000C)) + +#endif // __LPC213x_H diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/Makefile b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/Makefile new file mode 100644 index 000000000..779c52cea --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/Makefile @@ -0,0 +1,445 @@ +# Hey Emacs, this is a -*- makefile -*- +# +# WinARM template makefile +# by Martin Thomas, Kaiserslautern, Germany +# +# +# based on the WinAVR makefile written by Eric B. Weddington, Jörg Wunsch, et al. +# Released to the Public Domain +# Please read the make user manual! +# +# +# On command line: +# +# make all = Make software. +# +# make clean = Clean out built project files. +# +# make program = Download the hex file to the device, using lpc21isp +# +# (TODO: make filename.s = Just compile filename.c into the assembler code only) +# +# To rebuild project do "make clean" then "make all". +# +# Changelog: +# - 17. Feb. 2005 - added thumb-interwork support (mth) +# - 28. Apr. 2005 - added C++ support (mth) +# - 29. Arp. 2005 - changed handling for lst-Filename (mth) +# - 15. Nov. 2005 - added library-search-path (EXTRA_LIBDIRS) +# + +FLASH_TOOL = ULINK + +# MCU name and submodel +MCU = arm7tdmi-s +SUBMDL = LPC2138 +THUMB = -mthumb +THUMB_IW = -mthumb-interwork + + +## Create ROM-Image (final) +RUN_MODE=ROM_RUN +## Create RAM-Image (debugging) +#RUN_MODE=RAM_RUN + + +# Output format. (can be srec, ihex, binary) +FORMAT = ihex + + +# Target file name (without extension). +TARGET = main + + +# List C source files here. (C dependencies are automatically generated.) +# use file-extension c for "c-only"-files +SRC = $(TARGET).c +SRC += uart.c + +#SRC += ../../src/efs.c ../../src/plibc.c ../../src/disc.c ../../src/partition.c +#SRC += ../../src/time.c ../../src/fs.c ../../src/fat.c ../../src/file.c ../../src/dir.c ../../src/ls.c +#SRC += ../../src/mkfs.c ../../src/debug.c ../../src/ioman.c ../../src/ui.c ../../src/extract.c +#SRC += ../../src/interfaces/lpc2000_spi.c ../../src/interfaces/sd.c +#SRC += ../../src/interfaces/lpc2000_dbg_printf.c + +# List C source files here which must be compiled in ARM-Mode. +# use file-extension c for "c-only"-files +SRCARM = + +# List C++ source files here. +# use file-extension cpp for C++-files +CPPSRC = + +# List C++ source files here which must be compiled in ARM-Mode. +# use file-extension cpp for C++-files +#CPPSRCARM = $(TARGET).cpp +CPPSRCARM = + +# List Assembler source files here. +# Make them always end in a capital .S. Files ending in a lowercase .s +# will not be considered source files but generated files (assembler +# output from the compiler), and will be deleted upon "make clean"! +# Even though the DOS/Win* filesystem matches both .s and .S the same, +# it will preserve the spelling of the filenames, and gcc itself does +# care about how the name is spelled on its command-line. +ASRC = + +# List Assembler source files here which must be assembled in ARM-Mode.. +ASRCARM = crt0.S + +# Optimization level, can be [0, 1, 2, 3, s]. +# 0 = turn off optimization. s = optimize for size. +# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) +OPT = s +#OPT = 0 + +# Debugging format. +# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2. +# AVR (extended) COFF requires stabs, plus an avr-objcopy run. +#DEBUG = stabs +DEBUG = dwarf-2 + +# List any extra directories to look for include files here. +# Each directory must be seperated by a space. +EXTRAINCDIRS = ../../inc ../../conf + +# List any extra directories to look for library files here. +# Each directory must be seperated by a space. +EXTRA_LIBDIRS = -L../../ +# extra libraries ( to add libxyz.a and libabc.a: -lxyz -labc ) +EXTRA_LIBS = -lefsl + +# Compiler flag to set the C Standard level. +# c89 - "ANSI" C +# gnu89 - c89 plus GCC extensions +# c99 - ISO C99 standard (not yet fully implemented) +# gnu99 - c99 plus GCC extensions +CSTANDARD = -std=gnu99 + +# Place -D or -U options for C here +CDEFS = -D$(RUN_MODE) + +# Place -I options here +CINCS = + +# Place -D or -U options for ASM here +ADEFS = -D$(RUN_MODE) + + +# Compiler flags. +# -g*: generate debugging information +# -O*: optimization level +# -f...: tuning, see GCC manual and avr-libc documentation +# -Wall...: warning level +# -Wa,...: tell GCC to pass this to the assembler. +# -adhlns...: create assembler listing +# +# Flags for C and C++ (arm-none-eabi-gcc/arm-none-eabi-g++) +CFLAGS = -g$(DEBUG) +CFLAGS += $(CDEFS) $(CINCS) +CFLAGS += -O$(OPT) +CFLAGS += -Wall -Wcast-align -Wcast-qual -Wimplicit +CFLAGS += -Wpointer-arith -Wswitch +CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused +CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<) +CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) + +# flags only for C +CONLYFLAGS = -Wstrict-prototypes -Wmissing-declarations +CONLYFLAGS += -Wmissing-prototypes -Wnested-externs +CONLYFLAGS += $(CSTANDARD) + +# flags only for C++ (arm-none-eabi-g++) +# CPPFLAGS = -fno-rtti -fno-exceptions +CPPFLAGS = + +# Assembler flags. +# -Wa,...: tell GCC to pass this to the assembler. +# -ahlms: create listing +# -gstabs: have the assembler create line number information; note that +# for use in COFF files, additional information about filenames +# and function names needs to be present in the assembler source +# files -- see avr-libc docs [FIXME: not yet described there] +##ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs +ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG) + +#Additional libraries. + +#Support for newlibc-lpc (file: libnewlibc-lpc.a) +#NEWLIBLPC = -lnewlib-lpc + +MATH_LIB = -lm + +#CPLUSPLUS_LIB = -lstdc++ + +# Linker flags. +# -Wl,...: tell GCC to pass this to linker. +# -Map: create map file +# --cref: add cross reference to map file +LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref +LDFLAGS += -lc +LDFLAGS += $(NEWLIBLPC) $(MATH_LIB) +LDFLAGS += -lc -lgcc +LDFLAGS += $(CPLUSPLUS_LIB) +LDFLAGS += $(EXTRA_LIBS) +LDFLAGS += $(EXTRA_LIBDIRS) + +# Set Linker-Script Depending On Selected Memory +ifeq ($(RUN_MODE),RAM_RUN) +LDFLAGS +=-T$(SUBMDL)-RAM.ld +else +LDFLAGS +=-T$(SUBMDL)-ROM.ld +endif + + + +# --------------------------------------------------------------------------- +# Flash-Programming support using lpc21isp by Martin Maurer + +# Settings and variables: +#LPC21ISP = lpc21isp +LPC21ISP = lpc21isp +LPC21ISP_PORT = com1 +LPC21ISP_BAUD = 38400 +LPC21ISP_XTAL = 12000 +LPC21ISP_FLASHFILE = $(TARGET).hex +# verbose output: +#LPC21ISP_DEBUG = -debug +# enter bootloader via RS232 DTR/RTS (only if hardware supports this +# feature - see Philips AppNote): +LPC21ISP_CONTROL = -control + + +# --------------------------------------------------------------------------- + +# Define directories, if needed. +## DIRARM = c:/WinARM/ +## DIRARMBIN = $(DIRAVR)/bin/ +## DIRAVRUTILS = $(DIRAVR)/utils/bin/ + +# Define programs and commands. +SHELL = sh +CC = arm-none-eabi-gcc +CPP = arm-none-eabi-g++ +OBJCOPY = arm-none-eabi-objcopy +OBJDUMP = arm-none-eabi-objdump +SIZE = arm-none-eabi-size +NM = arm-none-eabi-nm +REMOVE = rm -f +COPY = cp + + +# Define Messages +# English +MSG_ERRORS_NONE = Errors: none +MSG_BEGIN = -------- begin -------- +MSG_END = -------- end -------- +MSG_SIZE_BEFORE = Size before: +MSG_SIZE_AFTER = Size after: +MSG_FLASH = Creating load file for Flash: +MSG_EXTENDED_LISTING = Creating Extended Listing: +MSG_SYMBOL_TABLE = Creating Symbol Table: +MSG_LINKING = Linking: +MSG_COMPILING = Compiling C: +MSG_COMPILING_ARM = "Compiling C (ARM-only):" +MSG_COMPILINGCPP = Compiling C++: +MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):" +MSG_ASSEMBLING = Assembling: +MSG_ASSEMBLING_ARM = "Assembling (ARM-only):" +MSG_CLEANING = Cleaning project: +MSG_LPC21_RESETREMINDER = You may have to bring the target in bootloader-mode now. + + +# Define all object files. +COBJ = $(SRC:.c=.o) +AOBJ = $(ASRC:.S=.o) +COBJARM = $(SRCARM:.c=.o) +AOBJARM = $(ASRCARM:.S=.o) +CPPOBJ = $(CPPSRC:.cpp=.o) +CPPOBJARM = $(CPPSRCARM:.cpp=.o) + +# Define all listing files. +LST = $(ASRC:.S=.lst) $(ASRCARM:.S=.lst) $(SRC:.c=.lst) $(SRCARM:.c=.lst) +LST += $(CPPSRC:.cpp=.lst) $(CPPSRCARM:.cpp=.lst) + +# Compiler flags to generate dependency files. +### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d +GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d + +# Combine all necessary flags and optional flags. +# Add target processor to flags. +ALL_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS) +ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp $(ASFLAGS) + + +# Default target. +all: begin gccversion sizebefore build sizeafter finished end + +build: elf hex lss sym + +elf: $(TARGET).elf +hex: $(TARGET).hex +lss: $(TARGET).lss +sym: $(TARGET).sym + +# Eye candy. +begin: + @echo + @echo $(MSG_BEGIN) + +finished: + @echo $(MSG_ERRORS_NONE) + +end: + @echo $(MSG_END) + @echo + + +# Display size of file. +HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex +ELFSIZE = $(SIZE) -A $(TARGET).elf +sizebefore: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi + +sizeafter: + @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi + + +# Display compiler version information. +gccversion : + @$(CC) --version + + +ifeq ($(FLASH_TOOL),ULINK) +# Program the device with Keil's ULINK (needs configured uVision-Workspace). +program: $(TARGET).hex + @echo + @echo "Programming with ULINK" + C:\Keil\uv3\Uv3.exe -f ulinkflash.Uv2 -oulinkflash.txt +else +# Program the device. +program: $(TARGET).hex + @echo + @echo $(MSG_LPC21_RESETREMINDER) + $(LPC21ISP) $(LPC21ISP_CONTROL) $(LPC21ISP_DEBUG) $(LPC21ISP_FLASHFILE) $(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL) +endif + +# Create final output files (.hex, .eep) from ELF output file. +# TODO: handling the .eeprom-section should be redundant +%.hex: %.elf + @echo + @echo $(MSG_FLASH) $@ + $(OBJCOPY) -O $(FORMAT) $< $@ + + +# Create extended listing file from ELF output file. +# testing: option -C +%.lss: %.elf + @echo + @echo $(MSG_EXTENDED_LISTING) $@ + $(OBJDUMP) -h -S -C $< > $@ + + +# Create a symbol table from ELF output file. +%.sym: %.elf + @echo + @echo $(MSG_SYMBOL_TABLE) $@ + $(NM) -n $< > $@ + + +# Link: create ELF output file from object files. +.SECONDARY : $(TARGET).elf +.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) +%.elf: $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) + @echo + @echo $(MSG_LINKING) $@ + $(CC) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) +# $(CPP) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS) + +# Compile: create object files from C source files. ARM/Thumb +$(COBJ) : %.o : %.c + @echo + @echo $(MSG_COMPILING) $< + $(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ + +# Compile: create object files from C source files. ARM-only +$(COBJARM) : %.o : %.c + @echo + @echo $(MSG_COMPILING_ARM) $< + $(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. ARM/Thumb +$(CPPOBJ) : %.o : %.cpp + @echo + @echo $(MSG_COMPILINGCPP) $< + $(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. ARM-only +$(CPPOBJARM) : %.o : %.cpp + @echo + @echo $(MSG_COMPILINGCPP_ARM) $< + $(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@ + + +# Compile: create assembler files from C source files. ARM/Thumb +## does not work - TODO - hints welcome +##$(COBJ) : %.s : %.c +## $(CC) $(THUMB) -S $(ALL_CFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. ARM/Thumb +$(AOBJ) : %.o : %.S + @echo + @echo $(MSG_ASSEMBLING) $< + $(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@ + + +# Assemble: create object files from assembler source files. ARM-only +$(AOBJARM) : %.o : %.S + @echo + @echo $(MSG_ASSEMBLING_ARM) $< + $(CC) -c $(ALL_ASFLAGS) $< -o $@ + + +# Target: clean project. +clean: begin clean_list finished end + + +clean_list : + @echo + @echo $(MSG_CLEANING) + $(REMOVE) $(TARGET).hex + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).elf + $(REMOVE) $(TARGET).map + $(REMOVE) $(TARGET).obj + $(REMOVE) $(TARGET).a90 + $(REMOVE) $(TARGET).sym + $(REMOVE) $(TARGET).lnk + $(REMOVE) $(TARGET).lss + $(REMOVE) $(COBJ) + $(REMOVE) $(CPPOBJ) + $(REMOVE) $(AOBJ) + $(REMOVE) $(COBJARM) + $(REMOVE) $(CPPOBJARM) + $(REMOVE) $(AOBJARM) + $(REMOVE) $(LST) + $(REMOVE) $(SRC:.c=.s) + $(REMOVE) $(SRC:.c=.d) + $(REMOVE) $(SRCARM:.c=.s) + $(REMOVE) $(SRCARM:.c=.d) + $(REMOVE) $(CPPSRC:.cpp=.s) + $(REMOVE) $(CPPSRC:.cpp=.d) + $(REMOVE) $(CPPSRCARM:.cpp=.s) + $(REMOVE) $(CPPSRCARM:.cpp=.d) + $(REMOVE) .dep/* + + +# Include the dependency files. +-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + + +# Listing of phony targets. +.PHONY : all begin finish end sizebefore sizeafter gccversion \ +build elf hex lss sym clean clean_list program + diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/crt0.S b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/crt0.S new file mode 100644 index 000000000..9057bcbe5 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/crt0.S @@ -0,0 +1,220 @@ +/* + crt0.S for LPC2xxx + - based on examples from R O Software + - based on examples from newlib-lpc + - based on an example from Anglia Designs + + collected and modified by Martin Thomas +*/ + + .global _etext // -> .data initial values in ROM + .global _data // -> .data area in RAM + .global _edata // end of .data area + .global __bss_start // -> .bss area in RAM + .global __bss_end__ // end of .bss area + .global _stack // top of stack + +// Stack Sizes + .set UND_STACK_SIZE, 0x00000004 + .set ABT_STACK_SIZE, 0x00000004 + .set FIQ_STACK_SIZE, 0x00000004 + .set IRQ_STACK_SIZE, 0X00000080 + .set SVC_STACK_SIZE, 0x00000004 + +// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs + .set MODE_USR, 0x10 // User Mode + .set MODE_FIQ, 0x11 // FIQ Mode + .set MODE_IRQ, 0x12 // IRQ Mode + .set MODE_SVC, 0x13 // Supervisor Mode + .set MODE_ABT, 0x17 // Abort Mode + .set MODE_UND, 0x1B // Undefined Mode + .set MODE_SYS, 0x1F // System Mode + + .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled + .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled + + .text + .arm + .section .init, "ax" + + .code 32 + .align 2 + + .global _boot + .func _boot +_boot: + +// Runtime Interrupt Vectors +// ------------------------- +Vectors: + b _start // reset - _start + ldr pc,_undf // undefined - _undf + ldr pc,_swi // SWI - _swi + ldr pc,_pabt // program abort - _pabt + ldr pc,_dabt // data abort - _dabt + nop // reserved + ldr pc,[pc,#-0xFF0] // IRQ - read the VIC + ldr pc,_fiq // FIQ - _fiq + +#if 0 +// Use this group for production +_undf: .word _reset // undefined - _reset +_swi: .word _reset // SWI - _reset +_pabt: .word _reset // program abort - _reset +_dabt: .word _reset // data abort - _reset +_irq: .word _reset // IRQ - _reset +_fiq: .word _reset // FIQ - _reset + +#else +// Use this group for development +_undf: .word __undf // undefined +_swi: .word __swi // SWI +_pabt: .word __pabt // program abort +_dabt: .word __dabt // data abort +_irq: .word __irq // IRQ +_fiq: .word __fiq // FIQ + +__undf: b . // undefined +__swi: b . // SWI +__pabt: b . // program abort +__dabt: b . // data abort +__irq: b . // IRQ +__fiq: b . // FIQ +#endif + .size _boot, . - _boot + .endfunc + + +// Setup the operating mode & stack. +// --------------------------------- + .global _start, start, _mainCRTStartup + .func _start + +_start: +start: +_mainCRTStartup: + +// Initialize Interrupt System +// - Set stack location for each mode +// - Leave in System Mode with Interrupts Disabled +// ----------------------------------------------- + ldr r0,=_stack + msr CPSR_c,#MODE_UND|I_BIT|F_BIT // Undefined Instruction Mode + mov sp,r0 + sub r0,r0,#UND_STACK_SIZE + msr CPSR_c,#MODE_ABT|I_BIT|F_BIT // Abort Mode + mov sp,r0 + sub r0,r0,#ABT_STACK_SIZE + msr CPSR_c,#MODE_FIQ|I_BIT|F_BIT // FIQ Mode + mov sp,r0 + sub r0,r0,#FIQ_STACK_SIZE + msr CPSR_c,#MODE_IRQ|I_BIT|F_BIT // IRQ Mode + mov sp,r0 + sub r0,r0,#IRQ_STACK_SIZE + msr CPSR_c,#MODE_SVC|I_BIT|F_BIT // Supervisor Mode + mov sp,r0 + sub r0,r0,#SVC_STACK_SIZE + msr CPSR_c,#MODE_SYS|I_BIT|F_BIT // System Mode + mov sp,r0 + +// Copy initialized data to its execution address in RAM +// ----------------------------------------------------- +#ifdef ROM_RUN + ldr r1,=_etext // -> ROM data start + ldr r2,=_data // -> data start + ldr r3,=_edata // -> end of data +1: cmp r2,r3 // check if data to move + ldrlo r0,[r1],#4 // copy it + strlo r0,[r2],#4 + blo 1b // loop until done +#endif +// Clear .bss +// ---------- + mov r0,#0 // get a zero + ldr r1,=__bss_start // -> bss start + ldr r2,=__bss_end__ // -> bss end +2: cmp r1,r2 // check if data to clear + strlo r0,[r1],#4 // clear 4 bytes + blo 2b // loop until done + +/* + Call C++ constructors (for objects in "global scope") + ctor loop added by Martin Thomas 4/2005 + based on a Anglia Design example-application for ST ARM +*/ + + LDR r0, =__ctors_start__ + LDR r1, =__ctors_end__ +ctor_loop: + CMP r0, r1 + BEQ ctor_end + LDR r2, [r0], #4 + STMFD sp!, {r0-r1} + MOV lr, pc + MOV pc, r2 + LDMFD sp!, {r0-r1} + B ctor_loop +ctor_end: + +// Call main program: main(0) +// -------------------------- + mov r0,#0 // no arguments (argc = 0) + mov r1,r0 + mov r2,r0 + mov fp,r0 // null frame pointer + mov r7,r0 // null frame pointer for thumb + ldr r10,=main + mov lr,pc + +/* Enter the C code, use BX instruction so as to never return */ +/* use BLX (?) main if you want to use c++ destructors below */ + + bx r10 // enter main() + +/* "global object"-dtors are never called and it should not be + needed since there is no OS to exit to. */ +/* Call destructors */ +# LDR r0, =__dtors_start__ +# LDR r1, =__dtors_end__ +dtor_loop: +# CMP r0, r1 +# BEQ dtor_end +# LDR r2, [r0], #4 +# STMFD sp!, {r0-r1} +# MOV lr, pc +# MOV pc, r2 +# LDMFD sp!, {r0-r1} +# B dtor_loop +dtor_end: + + .size _start, . - _start + .endfunc + + .global _reset, reset, exit, abort + .func _reset +_reset: +reset: +exit: +abort: +#if 0 +// Disable interrupts, then force a hardware reset by driving P23 low +// ------------------------------------------------------------------- + mrs r0,cpsr // get PSR + orr r0,r0,#I_BIT|F_BIT // disable IRQ and FIQ + msr cpsr,r0 // set up status register + + ldr r1,=(PS_BASE) // PS Base Address + ldr r0,=(PS_PIO) // PIO Module + str r0,[r1,#PS_PCER_OFF] // enable its clock + ldr r1,=(PIO_BASE) // PIO Base Address + ldr r0,=(1<<23) // P23 + str r0,[r1,#PIO_PER_OFF] // make sure pin is contolled by PIO + str r0,[r1,#PIO_CODR_OFF] // set the pin low + str r0,[r1,#PIO_OER_OFF] // make it an output +#endif + b . // loop until reset + + .size _reset, . - _reset + .endfunc + + .end diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/inttypes.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/inttypes.h new file mode 100644 index 000000000..cf89fedbd --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/inttypes.h @@ -0,0 +1,150 @@ +/* Copyright (c) 2002, Marek Michalkiewicz + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. */ + +/* $Id: inttypes.h,v 1.1 2005/11/16 17:33:36 lennartyseboodt Exp $ */ + +/* + inttypes.h + + Contributors: + Created by Marek Michalkiewicz + */ + +#ifndef __INTTYPES_H_ +#define __INTTYPES_H_ + +/** \defgroup avr_inttypes Integer Types + \code #include \endcode + + Use [u]intN_t if you need exactly N bits. + + Since these typedefs are mandated by the C99 standard, they are preferred + over rolling your own typedefs. + + \note If avr-gcc's \c -mint8 option is used, no 32-bit types will be + available. + + \todo There is a pending patch that may go into gcc to change the + behaviour of the -mint8 option. The current (2003-09-17) situation for + -mint8 is sizeof(int) == 1, sizeof(long) == 2 and sizeof(long long) == 8. + Note the absence of a 4-byte, 32-bit type. The patch proposes to change + sozeof(long long) to be 4 bytes (32 bits). When and if the patch is + included in gcc, we will need to change avr-libc accordingly. */ + +#if __INT_MAX__ == 127 +# define __USING_MINT8 1 +#endif + +/** \name 8-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 8-bit signed type. */ + +typedef signed char int8_t; + +/** \ingroup avr_inttypes + 8-bit unsigned type. */ + +typedef unsigned char uint8_t; + +#if __USING_MINT8 + +typedef long int16_t; +typedef unsigned long uint16_t; + +#else /* no -mint8 */ + +/*@}*/ + +/** \name 16-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 16-bit signed type. */ + +typedef int int16_t; + +/** \ingroup avr_inttypes + 16-bit unsigned type. */ + +typedef unsigned int uint16_t; + +/*@}*/ + +/** \name 32-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 32-bit signed type. */ + +typedef long int32_t; + +/** \ingroup avr_inttypes + 32-bit unsigned type. */ + +typedef unsigned long uint32_t; + +#endif + +/*@}*/ + +/** \name 64-bit types. */ + +/*@{*/ + +/** \ingroup avr_inttypes + 64-bit signed type. */ + +typedef long long int64_t; + +/** \ingroup avr_inttypes + 64-bit unsigned type. */ + +typedef unsigned long long uint64_t; + +/*@}*/ + +/** \name Pointer types. + These allow you to declare variables of the same size as a pointer. */ + +/*@{*/ + +/** \ingroup avr_inttypes + Signed pointer compatible type. */ + +typedef int16_t intptr_t; + +/** \ingroup avr_inttypes + Unsigned pointer compatible type. */ + +typedef uint16_t uintptr_t; + +/*@}*/ + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpc2138_efsl_demo2.pnproj b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpc2138_efsl_demo2.pnproj new file mode 100644 index 000000000..4175a014a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpc2138_efsl_demo2.pnproj @@ -0,0 +1 @@ + \ No newline at end of file diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpcUART.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpcUART.h new file mode 100644 index 000000000..215461691 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpcUART.h @@ -0,0 +1,86 @@ +/****************************************************************************** + * + * $RCSfile: lpcUART.h,v $ + * $Revision: 1.1 $ + * + * Header file for Philips LPC ARM Processors. + * Copyright 2004 R O SoftWare + * + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + * reduced to learn what is needed for "minimal" uart0-operation + *****************************************************************************/ +#ifndef INC_LPC_UART_H +#define INC_LPC_UART_H + +/////////////////////////////////////////////////////////////////////////////// +// UART defines + +// Interrupt Enable Register bit definitions +#define UIER_ERBFI (1 << 0) // Enable Receive Data Available Interrupt +#define UIER_ETBEI (1 << 1) // Enable Transmit Holding Register Empty Interrupt +#define UIER_ELSI (1 << 2) // Enable Receive Line Status Interrupt +#define UIER_EDSSI (1 << 3) // Enable MODEM Status Interrupt + +// Interrupt ID Register bit definitions +#define UIIR_NO_INT (1 << 0) // NO INTERRUPTS PENDING +#define UIIR_MS_INT (0 << 1) // MODEM Status +#define UIIR_THRE_INT (1 << 1) // Transmit Holding Register Empty +#define UIIR_RDA_INT (2 << 1) // Receive Data Available +#define UIIR_RLS_INT (3 << 1) // Receive Line Status +#define UIIR_CTI_INT (6 << 1) // Character Timeout Indicator +#define UIIR_ID_MASK 0x0E + +// FIFO Control Register bit definitions +#define UFCR_FIFO_ENABLE (1 << 0) // FIFO Enable +#define UFCR_RX_FIFO_RESET (1 << 1) // Reset Receive FIFO +#define UFCR_TX_FIFO_RESET (1 << 2) // Reset Transmit FIFO +#define UFCR_FIFO_TRIG1 (0 << 6) // Trigger @ 1 character in FIFO +#define UFCR_FIFO_TRIG4 (1 << 6) // Trigger @ 4 characters in FIFO +#define UFCR_FIFO_TRIG8 (2 << 6) // Trigger @ 8 characters in FIFO +#define UFCR_FIFO_TRIG14 (3 << 6) // Trigger @ 14 characters in FIFO + +// Line Control Register bit definitions +#define ULCR_CHAR_5 (0 << 0) // 5-bit character length +#define ULCR_CHAR_6 (1 << 0) // 6-bit character length +#define ULCR_CHAR_7 (2 << 0) // 7-bit character length +#define ULCR_CHAR_8 (3 << 0) // 8-bit character length +#define ULCR_STOP_1 (0 << 2) // 1 stop bit +#define ULCR_STOP_2 (1 << 2) // 2 stop bits +#define ULCR_PAR_NO (0 << 3) // No Parity +#define ULCR_PAR_ODD (1 << 3) // Odd Parity +#define ULCR_PAR_EVEN (3 << 3) // Even Parity +#define ULCR_PAR_MARK (5 << 3) // MARK "1" Parity +#define ULCR_PAR_SPACE (7 << 3) // SPACE "0" Paruty +#define ULCR_BREAK_ENABLE (1 << 6) // Output BREAK line condition +#define ULCR_DLAB_ENABLE (1 << 7) // Enable Divisor Latch Access + +// Modem Control Register bit definitions +#define UMCR_DTR (1 << 0) // Data Terminal Ready +#define UMCR_RTS (1 << 1) // Request To Send +#define UMCR_LB (1 << 4) // Loopback + +// Line Status Register bit definitions +#define ULSR_RDR (1 << 0) // Receive Data Ready +#define ULSR_OE (1 << 1) // Overrun Error +#define ULSR_PE (1 << 2) // Parity Error +#define ULSR_FE (1 << 3) // Framing Error +#define ULSR_BI (1 << 4) // Break Interrupt +#define ULSR_THRE (1 << 5) // Transmit Holding Register Empty +#define ULSR_TEMT (1 << 6) // Transmitter Empty +#define ULSR_RXFE (1 << 7) // Error in Receive FIFO +#define ULSR_ERR_MASK 0x1E + +// Modem Status Register bit definitions +#define UMSR_DCTS (1 << 0) // Delta Clear To Send +#define UMSR_DDSR (1 << 1) // Delta Data Set Ready +#define UMSR_TERI (1 << 2) // Trailing Edge Ring Indicator +#define UMSR_DDCD (1 << 3) // Delta Data Carrier Detect +#define UMSR_CTS (1 << 4) // Clear To Send +#define UMSR_DSR (1 << 5) // Data Set Ready +#define UMSR_RI (1 << 6) // Ring Indicator +#define UMSR_DCD (1 << 7) // Data Carrier Detect + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpc_config.h b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpc_config.h new file mode 100644 index 000000000..a7eec9b7e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/lpc_config.h @@ -0,0 +1,52 @@ +/* System Config */ + +/* + PLL + + - Main clock F_OSC=12,0MHz @ Keil MCB2130) [limits: 10 MHz to 25 MHz] + - System should run at max. Frequency (60MHz) [limit: max 60 MHz] + - Choose multiplier M=5 + so cclk = M * F_OSC= 5 * 12000000 = 60000000 Hz + - MSEL-Bit in PLLCFG (bits 0-4) MSEL = M-1 + - F_CCO must be inbetween the limits 156 MHz to 320 MHz + datasheet: F_CCO = F_OSC * M * 2 * P + - choose devider P=2 => F_CCO = 12000000Hz * 5 * 2 * 2 + = 240 MHz + - PSEL0 (Bit5 in PLLCFG) = 1, PSEL1 (Bit6) = 0 (0b01) +*/ +#define FOSC 12000000 +#define PLL_M 5 +#define MSEL (PLL_M-1) +#define PSEL0 5 +#define PSEL1 6 + +#define PLLE 0 +#define PLLC 1 + +#define PLOCK 10 + +#define PLL_FEED1 0xAA +#define PLL_FEED2 0x55 + + +/* + MAM(Memory Accelerator Module) + - choosen: MAM fully enabled = MAM-Mode 2 + - System-Clock cclk=60MHz -> 3 CCLKs are proposed as fetch timing +*/ +#define MAM_MODE 2 +#define MAM_FETCH 3 + +/* + VPB (V... Pheriphal Bus) + - choosen: VPB should run at full speed -> devider VPBDIV=1 + => pclk = cclk = 60MHz +*/ +#define VPBDIV_VAL 1 + +/* + SCB +*/ +#define MEMMAP_BOOT_LOADER_MODE 0 // Interrupt vectors are re-mapped to Boot Block. +#define MEMMAP_USER_FLASH_MODE (1<<0) // Interrupt vectors are not re-mapped and reside in Flash. +#define MEMMAP_USER_RAM_MODE (1<<1) // Interrupt vectors are re-mapped to Static RAM. diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/main.c b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/main.c new file mode 100644 index 000000000..29a485c4d --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/main.c @@ -0,0 +1,189 @@ +/****************************************************************************** + + efsl Demo-Application for Philips LPC2138 ARM7TDMI-S + + Copyright (c) 2005 + Martin Thomas, Kaiserslautern, Germany + + *****************************************************************************/ + +#include + +#include "LPC213x.h" +#include "lpc_config.h" + +#include "uart.h" + +#include "efs.h" +#include "ls.h" +#include "mkfs.h" +#include "interfaces/lpc2000_dbg_printf.h" + +#define rprintf lpc2000_debug_printf + +#define BAUD 115200 + +#define BIT(x) ((unsigned long)1<40MHz + MAMTIM = MAM_FETCH; + // c. enable MAM + MAMCR = MAM_MODE; + + // --- set VPB speed --- + VPBDIV = VPBDIV_VAL; + + // --- map INT-vector --- + #if defined(RAM_RUN) + MEMMAP = MEMMAP_USER_RAM_MODE; + #elif defined(ROM_RUN) + MEMMAP = MEMMAP_USER_FLASH_MODE; + #else + #error RUN_MODE not defined! + #endif +} + +static void gpioInit(void) +{ + LEDSET = BIT(LED1PIN); // set Bit = LED off (active low) + LEDDIR |= BIT(LED1PIN); // define LED-Pin as output +} + +static void ledToggle(void) +{ + static unsigned char state=0; + + state = !state; + if (state) LEDCLR = BIT(LED1PIN); // set Bit = LED on + else LEDSET = BIT(LED1PIN); // set Bit = LED off (active low) +} + +#if 0 +static void hang(void) +{ + while(1); +} +#endif + + +EmbeddedFileSystem efs; +EmbeddedFile filer, filew; +DirList list; +unsigned short e; +unsigned char buf[513]; + + +int main(void) +{ + int ch; + int8_t res; + + systemInit(); + gpioInit(); + + uart1Init(UART_BAUD(BAUD), UART_8N1, UART_FIFO_8); // setup the UART + + uart1Puts("\r\nMMC/SD Card Filesystem Test (P:LPC2138 L:EFSL)\r\n"); + uart1Puts("efsl LPC2000-port and this Demo-Application\r\n"); + uart1Puts("done by Martin Thomas, Kaiserslautern, Germany\r\n"); + + /* init efsl debug-output */ + lpc2000_debug_devopen(uart1Putch); + + ledToggle(); + + rprintf("CARD init..."); + if ( ( res = efs_init( &efs, 0 ) ) != 0 ) { + rprintf("failed with %i\n",res); + } + else { + rprintf("ok\n"); + rprintf("Directory of 'root':\n"); + ls_openDir( &list, &(efs.myFs) , "/"); + while ( ls_getNext( &list ) == 0 ) { + list.currentEntry.FileName[LIST_MAXLENFILENAME-1] = '\0'; + rprintf( "%s ( %li bytes )\n" , + list.currentEntry.FileName, + list.currentEntry.FileSize ) ; + } + + if ( file_fopen( &filer, &efs.myFs , LogFileName , 'r' ) == 0 ) { + rprintf("File %s open. Content:\n", LogFileName); + while ( ( e = file_read( &filer, 512, buf ) ) != 0 ) { + buf[e]='\0'; + uart1Puts((char*)buf); + } + rprintf("\n"); + file_fclose( &filer ); + } + + if ( file_fopen( &filew, &efs.myFs , LogFileName , 'a' ) == 0 ) { + rprintf("File %s open for append. Appending...", LogFileName); + strcpy((char*)buf, "Martin hat's angehaengt\r\n"); + if ( file_write( &filew, strlen((char*)buf), buf ) == strlen((char*)buf) ) { + rprintf("ok\n"); + } + else { + rprintf("fail\n"); + } + file_fclose( &filew ); + } + + if ( file_fopen( &filer, &efs.myFs , LogFileName , 'r' ) == 0 ) { + rprintf("File %s open. Content:\n", LogFileName); + while ( ( e = file_read( &filer, 512, buf ) ) != 0 ) { + buf[e]='\0'; + uart1Puts((char*)buf); + } + rprintf("\n"); + file_fclose( &filer ); + } + + fs_umount( &efs.myFs ) ; + } + + while(1) { + if ((ch = uart1Getch()) >= 0) { + uart1Puts("You pressed : "); + uart1Putch(ch); + uart1Puts("\r\n"); + if ( ch == 'M' ) { + rprintf("Creating FS\n"); + mkfs_makevfat(&efs.myPart); + } + ledToggle(); + } + } + + return 0; /* never reached */ +} diff --git a/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/uart.c b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/uart.c new file mode 100644 index 000000000..506608e20 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/examples/lpc2138_ssp_withlib/uart.c @@ -0,0 +1,186 @@ +/****************************************************************************** + * + * $RCSfile: uart.c,v $ + * $Revision: 1.1 $ + * + * This module provides interface routines to the LPC ARM UARTs. + * Copyright 2004, R O SoftWare + * No guarantees, warrantees, or promises, implied or otherwise. + * May be used for hobby or commercial purposes provided copyright + * notice remains intact. + * + * reduced to see what has to be done for minimum UART-support by mthomas + *****************************************************************************/ + +// #warning "this is a reduced version of the R O Software code" + +#include "LPC213x.h" +#include "uart.h" + +/* on LPC210x: UART0 TX-Pin=P0.2, RX-Pin=P0.1 + PINSEL0 has to be set to "UART-Function" = Function "01" + for Pin 0.0 and 0.1 */ + +#define PINSEL_BITPIN0 0 +#define PINSEL_BITPIN1 2 +#define PINSEL_BITPIN8 16 +#define PINSEL_BITPIN9 18 +#define PINSEL_FIRST_ALT_FUNC 1 +#define PINSEL_SECOND_ALT_FUNC 2 +#define PINSEL_THIRD_ALT_FUNC 3 + +// Values of Bits 0-3 in PINSEL to activate UART0 +#define UART0_PINSEL ((PINSEL_FIRST_ALT_FUNC<> 8); // set for baud high byte + + // set the number of characters and other + // user specified operating parameters + // Databits, Parity, Stopbits - Settings in Line Control Register + U0LCR = (mode & ~(1<> 8); // set for baud high byte + + // set the number of characters and other + // user specified operating parameters + // Databits, Parity, Stopbits - Settings in Line Control Register + U1LCR = (mode & ~(1< + #include + #include + #include + + #define TXT(x) PSTR(x) + #define DBG(x) debug x + #define FUNC_IN(x) ; + #define FUNC_OUT(x) ; + #endif + + #ifdef HW_ENDPOINT_LINUX_ALL + #include + #include + + #define TXT(x) x + #define DBG(x) debug x + #define FUNC_IN(x) debug_funcin(x) + #define FUNC_OUT(x) debug_funcout(x) + #endif + + #ifdef HW_ENDPOINT_DSP_TI6713_SD + #include + #include + + #define TXT(x) x + #define DBG(x) printf x + #define FUNC_IN(x) ; + #define FUNC_OUT(x) ; + #endif + #ifdef HW_ENDPOINT_NIOS_2_SD + #include + #include + + #define TXT(x) x + #define DBG(x) printf x + #define FUNC_IN(x) ; + #define FUNC_OUT(x) ; + #endif + #ifdef HW_ENDPOINT_LPC2000_SD + #include "interfaces/lpc2000_dbg_printf.h" + + #define TXT(x) x + #define DBG(x) debug x + #define FUNC_IN(x) ; + #define FUNC_OUT(x) ; + #define debug lpc2000_debug_printf + #endif + + #ifdef HW_ENDPOINT_AT91SAM + #include + #include + + #define TXT(x) x +#ifndef NDEBUG + #define DBG(x) printf x +#else + #define DBG(x) +#endif + #define FUNC_IN(x) ; + #define FUNC_OUT(x) ; + #else + void debug(const eint8 *format, ...); /* This is messy FIXME */ + #endif + + void debug_init(); + void debug_end(); + + #ifdef HW_ENDPOINT_LINUX_ALL + FILE* debugfile; + volatile euint8 tw; + void debug_funcin(const eint8 *format, ...); + void debug_funcout(const eint8 *format, ...); + euint8 debug_getByte(); + euint8 debug_getString(euint8 *data,euint16 length); + #endif + + #ifdef HW_ENDPOINT_ATMEGA128_SD + void debug_initUART(euint16 baudrate ); + void debug_sendByte(euint8 data ); + #endif + +#endif + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/dir.h b/src/ersky9x/libraries/fat/efsl/inc/dir.h new file mode 100644 index 000000000..21fc5b3d2 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/dir.h @@ -0,0 +1,84 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : dir.h * +* Description : Headerfile for dir.c The files are an extend of the fs.c fs.h * +* pair. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __DDIR_H__ +#define __DDIR_H__ + +/*****************************************************************************/ +#include "config.h" +#include "error.h" +#include "fat.h" +#include "plibc.h" +#include "types.h" +#include "ioman.h" +#include "time.h" +#include "fs.h" +/*****************************************************************************/ + +#define ATTR_READ_ONLY 0x01 +#define ATTR_HIDDEN 0x02 +#define ATTR_SYSTEM 0x04 +#define ATTR_VOLUME_ID 0x08 +#define ATTR_DIRECTORY 0x10 +#define ATTR_ARCHIVE 0x20 + +#define OFFSET_DE_FILENAME 0 +#define OFFSET_DE_ATTRIBUTE 11 +#define OFFSET_DE_NTRESERVED 12 +#define OFFSET_DE_CRTIMETNT 13 +#define OFFSET_DE_CREATETIME 14 +#define OFFSET_DE_CREATEDATE 16 +#define OFFSET_DE_LASTACCESSDATE 18 +#define OFFSET_DE_FIRSTCLUSTERHIGH 20 +#define OFFSET_DE_WRITETIME 22 +#define OFFSET_DE_WRITEDATE 24 +#define OFFSET_DE_FIRSTCLUSTERLOW 26 +#define OFFSET_DE_FILESIZE 28 + +#define DIRFIND_FILE 0 +#define DIRFIND_FREE 1 + +void dir_getFileStructure(FileSystem *fs,FileRecord *filerec,FileLocation *loc); +void dir_createDirectoryEntry(FileSystem *fs,FileRecord *filerec,FileLocation *loc); +void dir_createDefaultEntry(FileSystem *fs,FileRecord *filerec,eint8* fatfilename); +void dir_setFirstCluster(FileSystem *fs,FileLocation *loc,euint32 cluster_addr); +void dir_setFileSize(FileSystem *fs,FileLocation *loc,euint32 numbytes); +euint32 dir_findinRoot(FileSystem *fs,eint8 * fatname, FileLocation *loc); +euint32 dir_findinDir(FileSystem *fs, eint8 * fatname, euint32 startCluster, FileLocation *loc, euint8 mode); +euint32 dir_findinBuf(euint8 *buf,eint8 *fatname, FileLocation *loc, euint8 mode); +euint32 dir_findinCluster(FileSystem *fs,euint32 cluster,eint8 *fatname, FileLocation *loc, euint8 mode); +euint32 dir_findinRootArea(FileSystem *fs,eint8* fatname, FileLocation *loc, euint8 mode); +esint8 dir_getFatFileName(eint8* filename, eint8* fatfilename); +esint8 dir_updateDirectoryEntry(FileSystem *fs,FileRecord *entry,FileLocation *loc); +esint8 dir_addCluster(FileSystem *fs,euint32 firstCluster); +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/disc.h b/src/ersky9x/libraries/fat/efsl/inc/disc.h new file mode 100644 index 000000000..55801545b --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/disc.h @@ -0,0 +1,88 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : disc.h * +* Description : This is the header file for disc.c * +* * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __DISC_H_ +#define __DISC_H_ + +/*****************************************************************************/ +#include "config.h" +#include "error.h" +#include "interface.h" +#include "ioman.h" +#include "types.h" +#include "debug.h" +/*****************************************************************************/ + +#define LBA_ADDR_MBR 0 +#define PARTITION_TABLE_OFFSET 0x1BE + +/**********************************************************\ + PartitionField + ------------ +* uchar type Type of partition +* ulong LBA_begin LBA address of first sector. +* ulong numSectors Number of 512byte sectors +This structure is a literal representation of a 16 byte +partitionfield. Direct I/O is possible. +\**********************************************************/ +struct PartitionField{ + euint8 bootFlag; + euint8 CHS_begin[3]; + euint8 type; + euint8 CHS_end[3]; + euint32 LBA_begin; + euint32 numSectors; +}; +typedef struct PartitionField PartitionField; + +#define SIZE_PARTITION_FIELD 16 + +/***************************************************************************************\ + Disc + -- +* CompactFlash* sourcedisc Pointer to the hardwareobject that this disc is on. +* PartitionField* partitions Array of PartitionFields, containing the partition info +\***************************************************************************************/ +struct Disc{ + IOManager *ioman; + DISC_ERR_EUINT8 + PartitionField partitions[4]; +}; +typedef struct Disc Disc; + +void disc_initDisc(Disc *disc,IOManager *ioman); +void disc_loadMBR(Disc *disc); + +#include "extract.h" + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/efs.h b/src/ersky9x/libraries/fat/efsl/inc/efs.h new file mode 100644 index 000000000..ab978cbf5 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/efs.h @@ -0,0 +1,63 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : efs.h * +* Description : Headerfile for efs.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __EFS_H__ +#define __EFS_H__ + +/*****************************************************************************/ +#include "types.h" +#include "config.h" +#include "interface.h" +#include "disc.h" +#include "partition.h" +#include "fs.h" +#include "file.h" +#include "time.h" +#include "ui.h" +/*****************************************************************************/ + +typedef File EmbeddedFile; + +struct EmbeddedFileSystem{ + hwInterface myCard; + IOManager myIOman; + Disc myDisc; + Partition myPart; + FileSystem myFs; +}; +typedef struct EmbeddedFileSystem EmbeddedFileSystem; + +esint8 efs_init(EmbeddedFileSystem * efs,eint8 * opts); + + +#endif + diff --git a/src/ersky9x/libraries/fat/efsl/inc/error.h b/src/ersky9x/libraries/fat/efsl/inc/error.h new file mode 100644 index 000000000..d1abdd584 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/error.h @@ -0,0 +1,123 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : error.h * +* Description : Header file containing error-defines. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ +#ifndef __ERROR_H_ +#define __ERROR_H_ + +/*****************************************************************************/ +#include "config.h" +#include "interface.h" +/*****************************************************************************/ + +#if defined (FULL_ERROR_SUPPORT) + #define ERRSUP_IOMAN + #define ERRSUP_DISC + #define ERRSUP_PARTITION + #define ERRSUP_FAT_FILESYSTEM + #define ERRSUP_FAT_FILESYSTEM +#elif defined (BASE_ERROR_SUPPORT) + #define ERRSUP_IOMAN + #define ERRSUP_DISC + #define ERRSUP_PARTITION +#endif + +#if defined (HWINT_HAS_ERROR_SUPPORT) && defined (INTERFACE_ERROR_SUPPORT) + #define ERRSUP_HWINTERFACE +#endif + +#ifdef ERRSUP_IOMAN + #define IOMAN_ERR_EUINT8 euint8 error; + #define ioman_setError(ioman,errval) ioman->error = errval + #define ioman_getError(ioman) ioman->error +#else + #define IOMAN_ERR_EUINT8 + #define ioman_setError(ioman,errval) + #define ioman_getError(ioman) 0 +#endif + +#ifdef ERRSUP_DISC + #define DISC_ERR_EUINT8 euint8 error; + #define disc_setError(disc,errval) disc->error = errval + #define disc_getError(disc) disc->error +#else + #define DISC_ERR_EUINT8 + #define disc_setError(disc,errval) + #define disc_getError(disc) 0 +#endif + +#ifdef ERRSUP_PART + #define PART_ERR_EUINT8 euint8 error; + #define part_setError(part,errval) part->error = errval + #define part_getError(part) part->error +#else + #define PART_ERR_EUINT8 + #define part_setError(part,errval) + #define part_getError(part) 0 +#endif + +#ifdef ERRSUP_FAT_FILESYSTEM + #define FILESYSTEM_ERR_EUINT8 euint8 error; + #define fs_setError(fs,errval) fs->error = errval + #define fs_getError(fs) fs->error +#else + #define FILESYSTEM_ERR_EUINT8 + #define fs_setError(fs,errval) + #define fs_getError(fs) 0 +#endif + +#ifdef ERRSUP_FILE + #define FILE_ERR_EUINT8 euint8 error; + #define file_setError(file,errval) file->error = errval + #define file_getError(file) file->error +#else + #define FILE_ERR_EUINT8 + #define file_setError(file,errval) + #define file_getError(file) 0 +#endif + +#define IOMAN_NOERROR 0 +#define IOMAN_ERR_SETATTROUTOFBOUNDS 1 +#define IOMAN_ERR_GETATTROUTOFBOUNDS 2 +#define IOMAN_ERR_READFAIL 3 +#define IOMAN_ERR_WRITEFAIL 4 +#define IOMAN_ERR_OPOUTOFBOUNDS 5 +#define IOMAN_ERR_PUSHBEYONDSTACK 6 +#define IOMAN_ERR_POPEMPTYSTACK 7 +#define IOMAN_ERR_CACHEPTROUTOFRANGE 8 +#define IOMAN_ERR_WRITEREADONLYSECTOR 9 +#define IOMAN_ERR_NOMEMORY 10 + +#define DISC_NOERROR 0 + +#define PART_NOERROR 0 + + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/extract.h b/src/ersky9x/libraries/fat/efsl/inc/extract.h new file mode 100644 index 000000000..25bf4662c --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/extract.h @@ -0,0 +1,74 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : extract.h * +* Description : Headerfile for extract.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __EXTRACT_H_ +#define __EXTRACT_H_ + +/*****************************************************************************/ +#include "config.h" +#include "disc.h" +#include "types.h" +/*****************************************************************************/ + +#ifdef BIG_ENDIAN + +#define ltb_end16(x) ((((uint16)(x) & 0xff00) >> 8) | \ + (((uint16)(x) & 0x00ff) << 8)) +#define ltb_end32(x) ((((uint32)(x) & 0xff000000) >> 24) | \ + (((uint32)(x) & 0x00ff0000) >> 8) | \ + (((uint32)(x) & 0x0000ff00) << 8) | \ + (((uint32)(x) & 0x000000ff) << 24)) + +#else + +#define ltb_end16(x) (x) +#define ltb_end32(x) (x) + +#endif + +#define btl_end16 ltb_end16 +#define btl_end32 ltb_end32 + + +/*****************************************************************************/ + +euint16 ex_getb16(euint8* buf,euint32 offset); +void ex_setb16(euint8* buf,euint32 offset,euint16 data); + +euint32 ex_getb32(euint8* buf,euint32 offset); +void ex_setb32(euint8* buf,euint32 offset,euint32 data); + +void ex_getPartitionField(euint8* buf,PartitionField* pf, euint32 offset); +void ex_setPartitionField(euint8* buf,PartitionField* pf, euint32 offset); + +#endif + diff --git a/src/ersky9x/libraries/fat/efsl/inc/fat.h b/src/ersky9x/libraries/fat/efsl/inc/fat.h new file mode 100644 index 000000000..924877cda --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/fat.h @@ -0,0 +1,62 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : fat.h * +* Description : Headerfile for fat.c The files are an extend of the fs.c fs.h * +* pair. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __FAT_H_ +#define __FAT_H_ + +/*****************************************************************************/ +#include "config.h" +#include "error.h" +#include "file.h" +#include "debug.h" +#include "types.h" +/*****************************************************************************/ + +euint32 fat_getSectorAddressFatEntry(FileSystem *fs,euint32 cluster_addr); +euint32 fat_getNextClusterAddress(FileSystem *fs, euint32 cluster_addr, euint16 *linear); +void fat_setNextClusterAddress(FileSystem *fs,euint32 cluster_addr,euint32 next_cluster_addr); +eint16 fat_isEocMarker(FileSystem *fs,euint32 fat_entry); +euint32 fat_giveEocMarker(FileSystem *fs); +euint32 fat_findClusterAddress(FileSystem *fs,euint32 cluster,euint32 offset, euint8 *linear); +euint32 fat_getNextClusterAddressWBuf(FileSystem *fs,euint32 cluster_addr, euint8 * buf); +void fat_setNextClusterAddressWBuf(FileSystem *fs,euint32 cluster_addr,euint32 next_cluster_addr,euint8 * buf); +esint16 fat_getNextClusterChain(FileSystem *fs, ClusterChain *Cache); +void fat_bogus(void); +esint16 fat_LogicToDiscCluster(FileSystem *fs, ClusterChain *Cache,euint32 logiccluster); +eint16 fat_allocClusterChain(FileSystem *fs,ClusterChain *Cache,euint32 num_clusters); +eint16 fat_unlinkClusterChain(FileSystem *fs,ClusterChain *Cache); +euint32 fat_countClustersInChain(FileSystem *fs,euint32 firstcluster); +euint32 fat_DiscToLogicCluster(FileSystem *fs,euint32 firstcluster,euint32 disccluster); +euint32 fat_countFreeClusters(FileSystem *fs); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/file.h b/src/ersky9x/libraries/fat/efsl/inc/file.h new file mode 100644 index 000000000..9a8537c8e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/file.h @@ -0,0 +1,95 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : file.h * +* Description : Headerfile for file.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __FILE_H_ +#define __FILE_H_ + +/*****************************************************************************/ +#include "config.h" +#include "error.h" +#include "time.h" +#include "fs.h" +#include "dir.h" +#include "plibc.h" +#include "debug.h" +#include "types.h" +#include "fat.h" +/*****************************************************************************/ + +#define MODE_READ 0x72 +#define MODE_WRITE 0x77 +#define MODE_APPEND 0x61 + +#define FILE_STATUS_OPEN 0 +#define FILE_STATUS_WRITE 1 + +/*****************************************************************************\ + * File + * ------ + * FileRecord DirEntry Copy of the FileRecord for this file + * FileLocation Location Location of the direntry + * FileSystem *fs Pointer to the filesystem this file is on + * FileCache Cache Pointer to the cache object of the file + * euint8 FileStatus Contains bitfield regarding filestatus + * euint32 FilePtr Offsetpointer for fread/fwrite functions + * euint32 FileSize Working copy of the filesize, always use this, + it is more up to date than DirEntry->FileSize, + which is only updated when flushing to disc. +\*****************************************************************************/ +struct File{ + FileRecord DirEntry; + FileLocation Location; /* Location in directory!! */ + FileSystem *fs; + ClusterChain Cache; + euint8 FileStatus; + euint32 FilePtr; + euint32 FileSize; +}; +typedef struct File File; + + +esint8 file_fopen(File *file, FileSystem *fs,eint8 *filename, eint8 mode); +esint8 file_fclose(File *file); +esint16 file_setpos(File *file,euint32 pos); +euint32 file_fread(File *file,euint32 offset, euint32 size,euint8 *buf); +euint32 file_read (File *file,euint32 size,euint8 *buf); +euint32 file_fwrite(File* file,euint32 offset,euint32 size,euint8* buf); +euint32 file_write (File* file,euint32 size,euint8* buf); +eint8* file_normalToFatName(eint8* filename,eint8* fatfilename); +euint8 file_validateChar(euint8 c); +void file_initFile(File *file, FileSystem *fs, FileLocation *loc); +eint16 file_allocClusterChain(File *file,euint32 num_clusters); +void file_setAttr(File* file,euint8 attribute,euint8 val); +euint8 file_getAttr(File* file,euint8 attribute); +euint32 file_requiredCluster(File *file,euint32 offset, euint32 size); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/fs.h b/src/ersky9x/libraries/fat/efsl/inc/fs.h new file mode 100644 index 000000000..f9f1713ca --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/fs.h @@ -0,0 +1,196 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : fs.h * +* Description : Headerfile for fs.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ +#ifndef __FS_H_ +#define __FS_H_ + +/*****************************************************************************/ +#include "config.h" +#include "error.h" +#include "partition.h" +#include "types.h" +#include "debug.h" +#include "time.h" +/*****************************************************************************/ + +#define FAT12 1 +#define FAT16 2 +#define FAT32 3 + +#define FS_INFO_SECTOR 1 +#define FSINFO_MAGIC_BEGIN 0x41615252 +#define FSINFO_MAGIC_END 0xAA550000 + +/*****************************************************************************************\ + VolumeId + ------ +* ushort BytesPerSector Must be 512 or shit happens. +* uchar SectorsPerCluster Must be multiple of 2 (1,2,4,8,16 or 32) +* ushort ReservedSectorCount Number of sectors after which the first FAT begins. +* uchar NumberOfFats Should be 2 +* ushort RootEntryCount Number of filerecords the Rootdir can contain. NOT for FAT32 +* ushort SectorCount16 Number of Sectors for 12/16 bit FAT +* ushort FatSectorCount16 Number of Sectors for 1 FAT on FAT12/16 bit FAT's +* ulong SectorCount32 Number of Sectors for 32 bit FAT +* ulong FatSectorCount32 Number of Sectors for 1 FAT on FAT32 +* ulong RootCluster Clusternumber of the first cluster of the RootDir on FAT 32 +This is NOT a complete volumeId copy, no direct I/O is possible. +\*****************************************************************************************/ +struct VolumeId{ + euint16 BytesPerSector; + euint8 SectorsPerCluster; + euint16 ReservedSectorCount; + euint8 NumberOfFats; + euint16 RootEntryCount; + euint16 SectorCount16; + euint16 FatSectorCount16; + euint32 SectorCount32; + euint32 FatSectorCount32; + euint32 RootCluster; +}; +typedef struct VolumeId VolumeId; + +/**************************************************************************************************\ + FileSystem + -------- +* Partition* part Pointer to partition on which this FS resides. +* VolumeId volumeId Contains important FS info. +* ulong DataClusterCount Number of dataclusters. This number determines the FATType. +* ulong FatSectorCount Number of sectors for 1 FAT, regardless of FATType +* ulong SectorCount Number of sectors, regardless of FATType +* ulong FirstSectorRootDir First sector of the RootDir. +* uchar type Determines FATType (FAT12 FAT16 or FAT32 are defined) + +\**************************************************************************************************/ +struct FileSystem{ + Partition *part; + VolumeId volumeId; + euint32 DataClusterCount; + euint32 FatSectorCount; + euint32 SectorCount; + euint32 FirstSectorRootDir; + euint32 FirstClusterCurrentDir; + euint32 FreeClusterCount; + euint32 NextFreeCluster; + euint8 type; +}; +typedef struct FileSystem FileSystem; + +/**************************************************************************************************\ FileLocation + ---------- +* euint32 Sector Sector where the directoryentry of the file/directory can be found. +* euint8 Offset Offset (in 32byte segments) where in the sector the entry is. + +\**************************************************************************************************/ +struct FileLocation{ + euint32 Sector; + euint8 Offset; + euint8 attrib; +}; +typedef struct FileLocation FileLocation; + +/*****************************************************************************\ +* FileCache +* ----------- +* This struct acts as cache for the current file. It contains the current +* FATPointer (next location in the FAT table), LogicCluster +* (the last part of the file that was read) and DataCluster +* (the last cluster that was read). +* euint8 Linear For how many more clusters the file is nonfragmented +* euint32 LogicCluster This field determines the n'th cluster of the file as current +* euint32 DiscCluster If this field is 0, it means the cache is invalid. Otherwise + it is the clusternumber corresponding with + logic(FirstCluster+LogicCluster). +* euint32 FirstCluster First cluster of the chain. Zero or one are invalid. +* euint32 LastCluster Last cluster of the chain (is not always filled in) +\*****************************************************************************/ +struct ClusterChain{ + euint8 Linear; + esint32 LogicCluster; + euint32 DiscCluster; + euint32 FirstCluster; + euint32 LastCluster; + euint32 ClusterCount; +}; +typedef struct ClusterChain ClusterChain; + +/*****************************************************************************\ +* FileRecord * +* ------------ * +* This struct represents a 32 byte file entry as it occurs in the data area * +* of the filesystem. Direct I/O is possible. * +\*****************************************************************************/ +struct FileRecord{ + euint8 FileName[11]; + euint8 Attribute; + euint8 NTReserved; + euint8 MilliSecTimeStamp; + euint16 CreatedTime; + euint16 CreatedDate; + euint16 AccessDate; + euint16 FirstClusterHigh; + euint16 WriteTime; + euint16 WriteDate; + euint16 FirstClusterLow; + euint32 FileSize; +}; +typedef struct FileRecord FileRecord; + + +eint16 fs_initFs(FileSystem *fs,Partition *part); +eint16 fs_isValidFat(Partition *part); +void fs_loadVolumeId(FileSystem *fs, Partition *part); +esint16 fs_verifySanity(FileSystem *fs); +void fs_countDataSectors(FileSystem *fs); +void fs_determineFatType(FileSystem *fs); +void fs_findFirstSectorRootDir(FileSystem *fs); +void fs_initCurrentDir(FileSystem *fs); +euint32 fs_getSectorAddressRootDir(FileSystem *fs,euint32 secref); +euint32 fs_clusterToSector(FileSystem *fs,euint32 cluster); +euint32 fs_sectorToCluster(FileSystem *fs,euint32 sector); +euint32 fs_getNextFreeCluster(FileSystem *fs,euint32 startingcluster); +euint32 fs_giveFreeClusterHint(FileSystem *fs); +esint16 fs_findFreeFile(FileSystem *fs,eint8* filename,FileLocation *loc,euint8 mode); +esint8 fs_findFile(FileSystem *fs,eint8* filename,FileLocation *loc,euint32 *lastDir); +esint8 fs_findFile_broken(FileSystem *fs,eint8* filename,FileLocation *loc); +euint32 fs_getLastCluster(FileSystem *fs,ClusterChain *Cache); +euint32 fs_getFirstClusterRootDir(FileSystem *fs); +euint16 fs_makeDate(void); +euint16 fs_makeTime(void); +void fs_setFirstClusterInDirEntry(FileRecord *rec,euint32 cluster_addr); +void fs_initClusterChain(FileSystem *fs,ClusterChain *cache,euint32 cluster_addr); +esint8 fs_flushFs(FileSystem *fs); +esint8 fs_umount(FileSystem *fs); +esint8 fs_clearCluster(FileSystem *fs,euint32 cluster); +esint8 fs_getFsInfo(FileSystem *fs,euint8 force_update); +esint8 fs_setFsInfo(FileSystem *fs); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interface.h b/src/ersky9x/libraries/fat/efsl/inc/interface.h new file mode 100644 index 000000000..aede6fb2d --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interface.h @@ -0,0 +1,56 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Filename : interface.h * +* Description : This headerfile includes the right interface headerfile * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __TYPES_H__ +#define __TYPES_H__ + +/*****************************************************************************/ +#include "types.h" +#include "config.h" +/*****************************************************************************/ + +#if defined(HW_ENDPOINT_LINUX) || defined(HW_ENDPOINT_LINUX64) + #include "interfaces/linuxfile.h" +#elif defined(HW_ENDPOINT_ATMEGA128_SD) + #include "interfaces/atmega128.h" +#elif defined(HW_ENDPOINT_DSP_TI6713_SD) + #include "interfaces/dsp67xx.h" +#elif defined(HW_ENDPOINT_LPC2000_SD) + #include "interfaces/lpc2000_spi.h" +#elif defined(HW_ENDPOINT_AT91SAM) + #include "interfaces/at91sam7s_spi.h" +#else + #error "NO INTERFACE DEFINED - see interface.h" +#endif + +#endif + diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/LPC2000_regs.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/LPC2000_regs.h new file mode 100644 index 000000000..2f1bca11a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/LPC2000_regs.h @@ -0,0 +1,72 @@ +/* based on LPC213x.h from Keil GmbH (keil.com/arm.com) */ + +#ifndef LPC2000_regs_h +#define LPC2000_regs_h + +/* Pin Connect Block */ +#define PINSEL0 (*((volatile unsigned long *) 0xE002C000)) +#define PINSEL1 (*((volatile unsigned long *) 0xE002C004)) +#define PINSEL2 (*((volatile unsigned long *) 0xE002C014)) + +/* General Purpose Input/Output (GPIO) */ +#define IOPIN0 (*((volatile unsigned long *) 0xE0028000)) +#define IOSET0 (*((volatile unsigned long *) 0xE0028004)) +#define IODIR0 (*((volatile unsigned long *) 0xE0028008)) +#define IOCLR0 (*((volatile unsigned long *) 0xE002800C)) +#define IOPIN1 (*((volatile unsigned long *) 0xE0028010)) +#define IOSET1 (*((volatile unsigned long *) 0xE0028014)) +#define IODIR1 (*((volatile unsigned long *) 0xE0028018)) +#define IOCLR1 (*((volatile unsigned long *) 0xE002801C)) + +/* SPI0 (Serial Peripheral Interface 0) */ +#define S0SPCR (*((volatile unsigned char *) 0xE0020000)) +#define S0SPSR (*((volatile unsigned char *) 0xE0020004)) +#define S0SPDR (*((volatile unsigned char *) 0xE0020008)) +#define S0SPCCR (*((volatile unsigned char *) 0xE002000C)) +#define S0SPTCR (*((volatile unsigned char *) 0xE0020010)) +#define S0SPTSR (*((volatile unsigned char *) 0xE0020014)) +#define S0SPTOR (*((volatile unsigned char *) 0xE0020018)) +#define S0SPINT (*((volatile unsigned char *) 0xE002001C)) + +/* SSP Controller */ +#define SSPCR0 (*((volatile unsigned short* ) 0xE0068000)) +#define SSPCR1 (*((volatile unsigned char * ) 0xE0068004)) +#define SSPDR (*((volatile unsigned short* ) 0xE0068008)) +#define SSPSR (*((volatile unsigned char * ) 0xE006800C)) +#define SSPCPSR (*((volatile unsigned char * ) 0xE0068010)) +#define SSPIMSC (*((volatile unsigned char * ) 0xE0068014)) +#define SSPRIS (*((volatile unsigned char * ) 0xE0068018)) +#define SSPMIS (*((volatile unsigned char * ) 0xE006801C)) +#define SSPICR (*((volatile unsigned char * ) 0xE0068020)) +#define SSPDMACR (*((volatile unsigned char * ) 0xE0068024)) + +/* Real Time Clock */ +/* maybe useful for the efsl time-handling : */ +#define ILR (*((volatile unsigned char *) 0xE0024000)) +#define CTC (*((volatile unsigned short*) 0xE0024004)) +#define CCR (*((volatile unsigned char *) 0xE0024008)) +#define CIIR (*((volatile unsigned char *) 0xE002400C)) +#define AMR (*((volatile unsigned char *) 0xE0024010)) +#define CTIME0 (*((volatile unsigned long *) 0xE0024014)) +#define CTIME1 (*((volatile unsigned long *) 0xE0024018)) +#define CTIME2 (*((volatile unsigned long *) 0xE002401C)) +#define SEC (*((volatile unsigned char *) 0xE0024020)) +#define MIN (*((volatile unsigned char *) 0xE0024024)) +#define HOUR (*((volatile unsigned char *) 0xE0024028)) +#define DOM (*((volatile unsigned char *) 0xE002402C)) +#define DOW (*((volatile unsigned char *) 0xE0024030)) +#define DOY (*((volatile unsigned short*) 0xE0024034)) +#define MONTH (*((volatile unsigned char *) 0xE0024038)) +#define YEAR (*((volatile unsigned short*) 0xE002403C)) +#define ALSEC (*((volatile unsigned char *) 0xE0024060)) +#define ALMIN (*((volatile unsigned char *) 0xE0024064)) +#define ALHOUR (*((volatile unsigned char *) 0xE0024068)) +#define ALDOM (*((volatile unsigned char *) 0xE002406C)) +#define ALDOW (*((volatile unsigned char *) 0xE0024070)) +#define ALDOY (*((volatile unsigned short*) 0xE0024074)) +#define ALMON (*((volatile unsigned char *) 0xE0024078)) +#define ALYEAR (*((volatile unsigned short*) 0xE002407C)) +#define PREINT (*((volatile unsigned short*) 0xE0024080)) +#define PREFRAC (*((volatile unsigned short*) 0xE0024084)) + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/at91sam7s_spi.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/at91sam7s_spi.h new file mode 100644 index 000000000..a3f8f0faa --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/at91sam7s_spi.h @@ -0,0 +1,63 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : at91sam7s_spi.h * +* Description : Headerfile for at91sam7s_spi.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* AT91SAM7S ARM7 Interface (c)2007 Stanimir Bonev * +\*****************************************************************************/ + +#ifndef __AT91SAM7S_SPI_H_ +#define __AT91SAM7S_SPI_H_ + +#ifndef FALSE +#define FALSE 0x00 +#define TRUE 0x01 +#endif + +#include "../debug.h" +#include "config.h" + + +/*************************************************************\ + hwInterface + ---------- +* FILE* imagefile File emulation of hw interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ + +struct hwInterface{ + //FILE *imageFile; + eint32 sectorCount; +}; + +typedef struct hwInterface hwInterface; + +esint8 if_initInterface(hwInterface* file,eint8* opts); +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_setPos(hwInterface* file,euint32 address); + +#endif // __AT91SAM7S_SPI_H_ diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/at91sam_media.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/at91sam_media.h new file mode 100644 index 000000000..fc55fe40a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/at91sam_media.h @@ -0,0 +1,64 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : at91sam_ramdisk.h * +* Description : Headerfile for at91sam xxx.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* AT91SAM7S ARM7 Interface (c)2007 Stanimir Bonev * +\*****************************************************************************/ + +#ifndef __AT91SAM_RAMDISK_H_ +#define __AT91SAM_RAMDISK_H_ + +#ifndef FALSE +#define FALSE 0x00 +#define TRUE 0x01 +#endif + +#include "../debug.h" +#include "config.h" + +#include "Media.h" + +/*************************************************************\ + hwInterface + ---------- +* Media* pMedia Pointer to emulation of Media interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ + +struct hwInterface{ + Media* pMedia; + eint32 sectorCount; +}; + +typedef struct hwInterface hwInterface; + +esint8 if_initInterface(hwInterface* file,eint8* opts); +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_setPos(hwInterface* file,euint32 address); + +#endif // __AT91SAM_RAMDISK_H_ diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/atmega128.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/atmega128.h new file mode 100644 index 000000000..607661964 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/atmega128.h @@ -0,0 +1,70 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : atmega128.h * +* Description : Headerfile for atmega128.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __ATMEGA128_SD_H_ +#define __ATMEGA128_SD_H_ + +#define __AVR_ATmega128__ 1 +#define FALSE 0X00 +#define TRUE 0x01 + +#define DDR_SPI DDRB +#define DD_MOSI DDB2 +#define DD_SCK DDB1 + +#include +#include +#include "../debug.h" +#include "config.h" + + +/*************************************************************\ + hwInterface + ---------- +* FILE* imagefile File emulation of hw interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ +struct hwInterface{ + /*FILE *imageFile;*/ + eint32 sectorCount; +}; +typedef struct hwInterface hwInterface; + +esint8 if_initInterface(hwInterface* file,eint8* opts); +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_setPos(hwInterface* file,euint32 address); + +void if_spiInit(hwInterface *iface); +euint8 if_spiSend(hwInterface *iface, euint8 outgoing); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/dsp67xx.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/dsp67xx.h new file mode 100644 index 000000000..be9ed475f --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/dsp67xx.h @@ -0,0 +1,61 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : dsp67xx.h * +* Revision : Initial developement * +* Description : Headerfile for dsp67xx.h * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __DSP67XX_H_ +#define __DSP67XX_H_ + +#include "config.h" +#include "mcbsp/mcbsp.h" + +/*************************************************************\ + hwInterface + ---------- +* FILE* imagefile File emulation of hw interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ +struct hwInterface{ + /*FILE *imageFile;*/ + long sectorCount; + BspPort *port; +}; +typedef struct hwInterface hwInterface; + +short if_initInterface(hwInterface* file,char* opts); +short if_readBuf(hwInterface* file,euint32 address,unsigned char* buf); +short if_writeBuf(hwInterface* file,unsigned long address,unsigned char* buf); +short if_setPos(hwInterface* file,unsigned long address); + +signed char if_spiInit(hwInterface *iface); +unsigned char if_spiSend(hwInterface *iface,euint8 outgoing); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/helper.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/helper.h new file mode 100644 index 000000000..3d1890868 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/helper.h @@ -0,0 +1,49 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : helper.h * +* Description : Headerfile for helper.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __HELPER_H__ +#define __HELPER_H__ + +/*****************************************************************************/ +#include +#include +#include "../debug.h" +#include "../types.h" +#include "config.h" +/*****************************************************************************/ + +void* Malloc(eint32 size); +void Fopen(FILE **f,eint8* filename); +void MMap(eint8* filename,void**x,eint32* size); +int getFileSize(FILE* file); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/linuxfile.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/linuxfile.h new file mode 100644 index 000000000..aae72d3e5 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/linuxfile.h @@ -0,0 +1,67 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : linuxfile.h * +* Description : Headerfile for linuxfile.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __LINUXFILE_H__ +#define __LINUXFILE_H__ + +/*****************************************************************************/ +#include +#include +#include "helper.h" +#include "../debug.h" +#include "../types.h" +#include "config.h" +/*****************************************************************************/ + +#define _LARGEFILE_SOURCE +#define _GNU_SOURCE +#define _FILE_OFFSET_BITS 64 + +/*************************************************************\ + hwInterface + ---------- +* FILE* imagefile File emulation of hw interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ +struct hwInterface{ + FILE *imageFile; + eint32 sectorCount; + euint32 readCount,writeCount; +}; +typedef struct hwInterface hwInterface; + +esint8 if_initInterface(hwInterface* file,eint8* fileName); +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_setPos(hwInterface* file,euint32 address); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/lpc2000_dbg_printf.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/lpc2000_dbg_printf.h new file mode 100644 index 000000000..483184897 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/lpc2000_dbg_printf.h @@ -0,0 +1,7 @@ +#ifndef lpc2000_debug_printf_h_ +#define lpc2000_debug_printf_h_ + +extern void lpc2000_debug_devopen( int(*put)(int) ); +extern void lpc2000_debug_printf(char const *format, ...); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/lpc2000_spi.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/lpc2000_spi.h new file mode 100644 index 000000000..0e36d1c41 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/lpc2000_spi.h @@ -0,0 +1,65 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : lpc2000_spi.h * +* Description : Headerfile for lpc2000_spi.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* LPC2000 ARM7 Interface (c)2005 Martin Thomas * +\*****************************************************************************/ + +#ifndef __LPC2000_SPI_H_ +#define __LPC2000_SPI_H_ + +#ifndef FALSE +#define FALSE 0x00 +#define TRUE 0x01 +#endif + +#include "../debug.h" +#include "config.h" + + +/*************************************************************\ + hwInterface + ---------- +* FILE* imagefile File emulation of hw interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ +struct hwInterface{ + /*FILE *imageFile;*/ + eint32 sectorCount; +}; +typedef struct hwInterface hwInterface; + +esint8 if_initInterface(hwInterface* file,eint8* opts); +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_setPos(hwInterface* file,euint32 address); + +void if_spiInit(hwInterface *iface); +void if_spiSetSpeed(euint8 speed); +euint8 if_spiSend(hwInterface *iface, euint8 outgoing); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/nios2.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/nios2.h new file mode 100644 index 000000000..e2312d1db --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/nios2.h @@ -0,0 +1,62 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : nios2.h * +* Description : Headerfile for nios2.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2005 Marcio Troccoli * +\*****************************************************************************/ + +#ifndef __NIOS_2_SD_H_ +#define __NIOS_2_SD_H_ + +#define FALSE 0X00 +#define TRUE 0x01 + +#include "../debug.h" +#include "config.h" + + +/*************************************************************\ + hwInterface + ---------- +* FILE* imagefile File emulation of hw interface. +* long sectorCount Number of sectors on the file. +\*************************************************************/ +struct hwInterface{ + /*FILE *imageFile;*/ + eint32 sectorCount; +}; +typedef struct hwInterface hwInterface; + +esint8 if_initInterface(hwInterface* file,eint8* opts); +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf); +esint8 if_setPos(hwInterface* file,euint32 address); + +void if_spiInit(hwInterface *iface); +euint8 if_spiSend(hwInterface *iface, euint8 outgoing); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/interfaces/sd.h b/src/ersky9x/libraries/fat/efsl/inc/interfaces/sd.h new file mode 100644 index 000000000..541937a73 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/interfaces/sd.h @@ -0,0 +1,66 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : sd.h * +* Revision : Initial developement * +* Description : Headerfile for sd.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __SD_H_ +#define __SD_H_ + +#include "config.h" +#include "types.h" +#include "../debug.h" + +#ifdef HW_ENDPOINT_ATMEGA128_SD + #include "interfaces/atmega128.h" +#endif +#ifdef HW_ENDPOINT_DSP_TI6713_SD + #include "interfaces/dsp67xx.h" +#endif +#ifdef HW_ENDPOINT_LPC2000_SD + #include "interfaces/lpc2000_spi.h" +#endif + +#define CMDREAD 17 +#define CMDWRITE 24 +#define CMDREADCSD 9 + +esint8 sd_Init(hwInterface *iface); +void sd_Command(hwInterface *iface,euint8 cmd, euint16 paramx, euint16 paramy); +euint8 sd_Resp8b(hwInterface *iface); +void sd_Resp8bError(hwInterface *iface,euint8 value); +euint16 sd_Resp16b(hwInterface *iface); +esint8 sd_State(hwInterface *iface); + +esint8 sd_readSector(hwInterface *iface,euint32 address,euint8* buf, euint16 len); +esint8 sd_writeSector(hwInterface *iface,euint32 address, euint8* buf); +esint8 sd_getDriveSize(hwInterface *iface, euint32* drive_size ); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/ioman.h b/src/ersky9x/libraries/fat/efsl/inc/ioman.h new file mode 100644 index 000000000..d0d12114a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/ioman.h @@ -0,0 +1,135 @@ +/*****************************************************************************\ +* libfat - General purpose FAT library * +* ---------------------------------- * +* * +* Filename : ioman.h * +* Description : Header file for ioman.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __IOMAN_H__ +#define __IOMAN_H__ + +/*****************************************************************************/ +#include "interface.h" +#include "error.h" +#include "plibc.h" +#include "debug.h" +#include "types.h" +#include "config.h" +/*****************************************************************************/ + +#define IOMAN_STATUS_ATTR_VALIDDATA 0 +#define IOMAN_STATUS_ATTR_USERBUFFER 1 +#define IOMAN_STATUS_ATTR_WRITE 2 + +#define IOM_MODE_READONLY 1 +#define IOM_MODE_READWRITE 2 +#define IOM_MODE_EXP_REQ 4 + +struct IOManStack{ + euint32 sector; + euint8 status; + euint8 usage; +}; +typedef struct IOManStack IOManStack; + +struct IOManager{ + hwInterface *iface; + + euint8 *bufptr; + euint16 numbuf; + euint16 numit; + + IOMAN_ERR_EUINT8 + + IOManStack stack[IOMAN_NUMBUFFER][IOMAN_NUMITERATIONS]; + + euint32 sector[IOMAN_NUMBUFFER]; + euint8 status[IOMAN_NUMBUFFER]; + euint8 usage[IOMAN_NUMBUFFER]; + euint8 reference[IOMAN_NUMBUFFER]; + euint8 itptr[IOMAN_NUMBUFFER]; +#ifdef IOMAN_DO_MEMALLOC + euint8 cache_mem[IOMAN_NUMBUFFER * 512]; +#endif +}; +typedef struct IOManager IOManager; + +#define IOBJ ioman + +#define ioman_isValid(bp) ioman_getAttr(IOBJ,bp,IOMAN_STATUS_ATTR_VALIDDATA) +#define ioman_isUserBuf(bp) ioman_getAttr(IOBJ,bp,IOMAN_STATUS_ATTR_USERBUFFER) +#define ioman_isWritable(bp) ioman_getAttr(IOBJ,bp,IOMAN_STATUS_ATTR_WRITE) + +#define ioman_setValid(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_VALIDDATA,1) +#define ioman_setUserBuf(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_USERBUFFER,1) +#define ioman_setWritable(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_WRITE,1) + +#define ioman_setNotValid(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_VALIDDATA,0) +#define ioman_setNotUserBuf(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_USERBUFFER,0) +#define ioman_setNotWritable(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_WRITE,0) + +#define ioman_isReqRo(mode) ((mode)&(IOM_MODE_READONLY)) +#define ioman_isReqRw(mode) ((mode)&(IOM_MODE_READWRITE)) +#define ioman_isReqExp(mode) ((mode)&(IOM_MODE_EXP_REQ)) + +esint8 ioman_init(IOManager *ioman, hwInterface *iface, euint8* bufferarea); +void ioman_reset(IOManager *ioman); +euint8* ioman_getBuffer(IOManager *ioman,euint8* bufferarea); +void ioman_setAttr(IOManager *ioman,euint16 bufplace,euint8 attribute,euint8 val); +euint8 ioman_getAttr(IOManager *ioman,euint16 bufplace,euint8 attribute); +euint8 ioman_getUseCnt(IOManager *ioman,euint16 bufplace); +void ioman_incUseCnt(IOManager *ioman,euint16 bufplace); +void ioman_decUseCnt(IOManager *ioman,euint16 bufplace); +void ioman_resetUseCnt(IOManager *ioman,euint16 bufplace); +euint8 ioman_getRefCnt(IOManager *ioman,euint16 bufplace); +void ioman_incRefCnt(IOManager *ioman,euint16 bufplace); +void ioman_decRefCnt(IOManager *ioman,euint16 bufplace); +void ioman_resetRefCnt(IOManager *ioman,euint16 bufplace); +esint8 ioman_pop(IOManager *ioman,euint16 bufplace); +esint8 ioman_push(IOManager *ioman,euint16 bufplace); +euint8* ioman_getPtr(IOManager *ioman,euint16 bufplace); +esint16 ioman_getBp(IOManager *ioman,euint8* buf); +esint8 ioman_readSector(IOManager *ioman,euint32 address,euint8* buf); +esint8 ioman_writeSector(IOManager *ioman, euint32 address, euint8* buf); +void ioman_resetCacheItem(IOManager *ioman,euint16 bufplace); +esint32 ioman_findSectorInCache(IOManager *ioman, euint32 address); +esint32 ioman_findFreeSpot(IOManager *ioman); +esint32 ioman_findUnusedSpot(IOManager *ioman); +esint32 ioman_findOverallocableSpot(IOManager *ioman); +esint8 ioman_putSectorInCache(IOManager *ioman,euint32 address, euint16 bufplace); +esint8 ioman_flushSector(IOManager *ioman, euint16 bufplace); +euint8* ioman_getSector(IOManager *ioman,euint32 address, euint8 mode); +esint8 ioman_releaseSector(IOManager *ioman,euint8* buf); +esint8 ioman_directSectorRead(IOManager *ioman,euint32 address, euint8* buf); +esint8 ioman_directSectorWrite(IOManager *ioman,euint32 address, euint8* buf); +esint8 ioman_flushRange(IOManager *ioman,euint32 address_low, euint32 address_high); +esint8 ioman_flushAll(IOManager *ioman); + +void ioman_printStatus(IOManager *ioman); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/ioman_v2.h b/src/ersky9x/libraries/fat/efsl/inc/ioman_v2.h new file mode 100644 index 000000000..1e12f86e0 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/ioman_v2.h @@ -0,0 +1,123 @@ +/*****************************************************************************\ +* libfat - General purpose FAT library * +* ---------------------------------- * +* * +* Filename : ioman.h * +* Description : Header file for ioman.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __IOMAN_H__ +#define __IOMAN_H__ + +/*****************************************************************************/ +#include "interface.h" +#include "plibc.h" +#include "debug.h" +#include "types.h" +#include "config.h" +/*****************************************************************************/ + +#define IOMAN_STATUS_ATTR_VALIDDATA 0 +#define IOMAN_STATUS_ATTR_USERBUFFER 1 +#define IOMAN_STATUS_ATTR_WRITE 2 + +#define IOM_MODE_READONLY 0 +#define IOM_MODE_READWRITE 1 + +struct IOManStack{ + euint32 sector; + euint8 status; + euint8 usage; +}; +typedef struct IOManStack IOManStack; + +struct IOManager{ + hwInterface *iface; + + euint8 *bufptr; + euint16 numbuf; + euint16 numit; + + IOManStack stack[IOMAN_NUMBUFFER][IOMAN_NUMITERATIONS]; + + euint32 sector[IOMAN_NUMBUFFER]; + euint8 status[IOMAN_NUMBUFFER]; + euint8 usage[IOMAN_NUMBUFFER]; + euint8 reference[IOMAN_NUMBUFFER]; + euint8 itptr[IOMAN_NUMBUFFER]; +}; +typedef struct IOManager IOManager; + +#define IOBJ ioman + +#define ioman_isValid(bp) ioman_getAttr(IOBJ,bp,IOMAN_STATUS_ATTR_VALIDDATA) +#define ioman_isUserBuf(bp) ioman_getAttr(IOBJ,bp,IOMAN_STATUS_ATTR_USERBUFFER) +#define ioman_isWritable(bp) ioman_getAttr(IOBJ,bp,IOMAN_STATUS_ATTR_WRITE) + +#define ioman_setValid(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_VALIDDATA,1) +#define ioman_setUserBuf(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_USERBUFFER,1) +#define ioman_setWritable(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_WRITE,1) + +#define ioman_setNotValid(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_VALIDDATA,0) +#define ioman_setNotUserBuf(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_USERBUFFER,0) +#define ioman_setNotWritable(bp) ioman_setAttr(IOBJ,bp,IOMAN_STATUS_ATTR_WRITE,0) + +esint8 ioman_init(IOManager *ioman, hwInterface *iface, euint8* bufferarea); +void ioman_reset(IOManager *ioman); +euint8* ioman_getBuffer(IOManager *ioman,euint8* bufferarea); +void ioman_setAttr(IOManager *ioman,euint16 bufplace,euint8 attribute,euint8 val); +euint8 ioman_getAttr(IOManager *ioman,euint16 bufplace,euint8 attribute); +euint8 ioman_getUseCnt(IOManager *ioman,euint16 bufplace); +void ioman_incUseCnt(IOManager *ioman,euint16 bufplace); +void ioman_decUseCnt(IOManager *ioman,euint16 bufplace); +void ioman_resetUseCnt(IOManager *ioman,euint16 bufplace); +euint8 ioman_getRefCnt(IOManager *ioman,euint16 bufplace); +void ioman_incRefCnt(IOManager *ioman,euint16 bufplace); +void ioman_decRefCnt(IOManager *ioman,euint16 bufplace); +void ioman_resetRefCnt(IOManager *ioman,euint16 bufplace); +esint8 ioman_pop(IOManager *ioman,euint16 bufplace); +esint8 ioman_push(IOManager *ioman,euint16 bufplace); +euint8* ioman_getPtr(IOManager *ioman,euint16 bufplace); +esint16 ioman_getBp(IOManager *ioman,euint8* buf); +esint8 ioman_readSector(IOManager *ioman,euint32 address,euint8* buf); +esint8 ioman_writeSector(IOManager *ioman, euint32 address, euint8* buf); +void ioman_resetCacheItem(IOManager *ioman,euint16 bufplace); + +esint32 ioman_findSectorInCache(IOManager *ioman, euint32 address); +esint32 ioman_findFreeSpot(IOManager *ioman); +esint32 ioman_findUnusedSpot(IOManager *ioman); +esint32 ioman_findOverallocableSpot(IOManager *ioman); + +esint8 ioman_putSectorInCache(IOManager *ioman,euint32 address, euint16 bufplace); +esint8 ioman_flushSector(IOManager *ioman, euint16 bufplace); + +euint8* ioman_getSector(IOManager *ioman,euint32 address, euint8 mode); +esint8 ioman_releaseSector(IOManager *ioman,euint8* buf); + +void ioman_printStatus(IOManager *ioman); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/ls.h b/src/ersky9x/libraries/fat/efsl/inc/ls.h new file mode 100644 index 000000000..2bc334750 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/ls.h @@ -0,0 +1,68 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : ls.h * +* Description : Headerfile for ls.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __LS_H__ +#define __LS_H__ + +/*****************************************************************************/ +#include "config.h" +#include "fs.h" +#include "dir.h" +#include "fat.h" +/*****************************************************************************/ + +struct ListDirEntry{ + euint8 FileName[LIST_MAXLENFILENAME]; + euint32 FileSize; + euint8 Attribute; +}; +typedef struct ListDirEntry ListDirEntry; + +struct DirList{ + FileSystem *fs; + euint16 cEntry,rEntry; + /*FileRecord currentEntry;*/ + ListDirEntry currentEntry; + ClusterChain Cache; +}; +typedef struct DirList DirList; + +esint8 ls_openDir(DirList *dlist,FileSystem *fs,eint8* dirname); +esint8 ls_getNext(DirList *dlist); + +esint8 ls_getDirEntry(DirList *dlist); +esint8 ls_getRealDirEntry(DirList *dlist); +esint8 ls_getRootAreaEntry(DirList *dlist); +esint8 ls_isValidFileEntry(ListDirEntry *entry); +void ls_fileEntryToDirListEntry(DirList *dlist, euint8* buf, euint16 offset); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/mkfs.h b/src/ersky9x/libraries/fat/efsl/inc/mkfs.h new file mode 100644 index 000000000..63a1e0b6e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/mkfs.h @@ -0,0 +1,48 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : mkfs.h * +* Description : Headerfile for mkfs.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __MKFS_H_ +#define __MKFS_H_ + +/*****************************************************************************/ +#include "partition.h" +#include "plibc.h" +#include "debug.h" +#include "types.h" +#include "config.h" +/*****************************************************************************/ + +#define MKFS_ERR_TOOLITTLESECTORS 1 + +signed short mkfs_makevfat(Partition *part); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/partition.h b/src/ersky9x/libraries/fat/efsl/inc/partition.h new file mode 100644 index 000000000..63f6104be --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/partition.h @@ -0,0 +1,77 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : partition.h * +* Description : Headerfile for partition.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __PARTITION_H__ +#define __PARTITION_H__ + +/*****************************************************************************/ +#include "config.h" +#include "error.h" +#include "interface.h" +#include "disc.h" +#include "types.h" +/*****************************************************************************/ + +#define PT_FAT12 0x01 +#define PT_FAT16A 0x04 +#define PT_FAT16 0x06 +#define PT_FAT32 0x0B +#define PT_FAT32A 0x5C +#define PT_FAT16B 0x5E + +/*************************************************************************************\ + Partition + ------- +* Disc* disc Pointer to disc containing this partition. +* eint8 activePartition Array subscript for disc->partitions[activePartition] +\*************************************************************************************/ +struct Partition{ + Disc *disc; + esint8 activePartition; +}; +typedef struct Partition Partition; + +void part_initPartition(Partition *part,Disc* refDisc); +eint16 part_isFatPart(euint8 type); +esint8 part_readBuf(Partition *part, euint32 address, euint8* buf); +esint8 part_readPartBuf(Partition *part, euint32 address, euint8* buf, euint32 offset, euint16 len); +eint16 part_writeBuf(Partition *part,euint32 address,euint8* buf); +euint8* part_getSect(Partition *part, euint32 address,euint8 mode); +esint8 part_relSect(Partition *part, euint8* buf); +esint8 part_flushPart(Partition *part,euint32 addr_l, euint32 addr_h); +esint8 part_directSectorRead(Partition *part, euint32 address, euint8* buf); +esint8 part_directSectorWrite(Partition *part, euint32 address, euint8* buf); +euint32 part_getRealLBA(Partition *part,euint32 address); + +#include "extract.h" + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/plibc.h b/src/ersky9x/libraries/fat/efsl/inc/plibc.h new file mode 100644 index 000000000..5fc0154a2 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/plibc.h @@ -0,0 +1,48 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : plibc.h * +* Description : Headerfile for plibc.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __PLIBC_H__ +#define __PLIBC_H__ + +/*****************************************************************************/ +#include "debug.h" +#include "types.h" +#include "config.h" +/*****************************************************************************/ + +euint16 strMatch(eint8* bufa, eint8*bufb,euint32 n); +void memCpy(void* psrc, void* pdest, euint32 size); +void memClr(void *pdest,euint32 size); +void memSet(void *pdest,euint32 size,euint8 data); + + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/time.h b/src/ersky9x/libraries/fat/efsl/inc/time.h new file mode 100644 index 000000000..2bd896f71 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/time.h @@ -0,0 +1,72 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : types.h * +* Description : Headerfile for types.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ +#ifndef __TIME_H_ +#define __TIME_H_ + +/*****************************************************************************/ +#include "types.h" +/*****************************************************************************/ + +#ifdef DATE_TIME_SUPPORT + #define time_getYear(void) efsl_getYear() + #define time_getMonth(void) efsl_getMonth() + #define time_getDay(void) efsl_getDay() + #define time_getHour(void) efsl_getHour() + #define time_getMinute(void) efsl_getMinute() + #define time_getSecond(void) efsl_getSecond() + #define time_getDate(void) fs_makeDate() + #define time_getTime(void) fs_makeTime() +#else + #define time_getYear(void) 0x0; + #define time_getMonth(void) 0x0; + #define time_getDay(void) 0x0; + #define time_getHour(void) 0x0; + #define time_getMinute(void) 0x0; + #define time_getSecond(void) 0x0; + #define time_getDate(void) 0x0; + #define time_getTime(void) 0x0; +#endif + +#ifdef DATE_TIME_SUPPORT +euint16 efsl_getYear(void); +euint8 efsl_getMonth(void); +euint8 efsl_getDay(void); +euint8 efsl_getHour(void); +euint8 efsl_getMinute(void); +euint8 efsl_getSecond(void); +euint16 fs_makeDate(void); +euint16 fs_makeTime(void); +#endif + +euint8 fs_hasTimeSupport(void); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/types.h b/src/ersky9x/libraries/fat/efsl/inc/types.h new file mode 100644 index 000000000..0635873d6 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/types.h @@ -0,0 +1,106 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : types.h * +* Description : This file contains the crossplatform data types * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/* Contributions + * (c)2005 Marcio Troccoli * + */ + +#ifndef __EFS_TYPES_H__ +#define __EFS_TYPES_H__ + +/*****************************************************************************/ +#include "config.h" +/*****************************************************************************/ + +#if defined(HW_ENDPOINT_LINUX) + typedef char eint8; + typedef signed char esint8; + typedef unsigned char euint8; + typedef short eint16; + typedef signed short esint16; + typedef unsigned short euint16; + typedef long eint32; + typedef signed long esint32; + typedef unsigned long euint32; +#elif defined(HW_ENDPOINT_LINUX64) + typedef char eint8; + typedef signed char esint8; + typedef unsigned char euint8; + typedef short eint16; + typedef signed short esint16; + typedef unsigned short euint16; + typedef int eint32; + typedef signed int esint32; + typedef unsigned int euint32; +#elif defined (HW_ENDPOINT_ATMEGA128_SD) + typedef char eint8; + typedef signed char esint8; + typedef unsigned char euint8; + typedef short eint16; + typedef signed short esint16; + typedef unsigned short euint16; + typedef long eint32; + typedef signed long esint32; + typedef unsigned long euint32; +#elif defined(HW_ENDPOINT_DSP_TI6713_SD) + typedef char eint8; + typedef signed char esint8; + typedef unsigned char euint8; + typedef short eint16; + typedef signed short esint16; + typedef unsigned short euint16; + typedef int eint32; + typedef signed int esint32; + typedef unsigned int euint32; +#elif defined(NIOS_2) + typedef char eint8; + typedef signed char esint8; + typedef unsigned char euint8; + typedef short eint16; + typedef signed short esint16; + typedef unsigned short euint16; + typedef int eint32; + typedef signed int esint32; + typedef unsigned int euint32; +#else + typedef char eint8; + typedef signed char esint8; + typedef unsigned char euint8; + typedef short eint16; + typedef signed short esint16; + typedef unsigned short euint16; + typedef long eint32; + typedef signed long esint32; + typedef unsigned long euint32; +#endif + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/inc/ui.h b/src/ersky9x/libraries/fat/efsl/inc/ui.h new file mode 100644 index 000000000..46999a6d2 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/inc/ui.h @@ -0,0 +1,48 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : ui.h * +* Description : Headerfile for ui.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#ifndef __UI_H__ +#define __UI_H__ + +/*****************************************************************************/ +#include "fs.h" +#include "types.h" +#include "fat.h" +#include "dir.h" +#include "config.h" +/*****************************************************************************/ + +short listFiles(FileSystem *fs, char *dir); +esint16 rmfile(FileSystem *fs,euint8* filename); +esint8 mkdir(FileSystem *fs,eint8* dirname); + +#endif diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/Makefile b/src/ersky9x/libraries/fat/efsl/linuxutils/Makefile new file mode 100644 index 000000000..a04a1937f --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/Makefile @@ -0,0 +1,29 @@ +CFLAGS=-I../conf -I../inc -g3 -ansi -Wall -O0 +CC=gcc + +all : cpi cpo cpa mkdir list rmfile + +cpi : cpi.o + gcc -o cpi cpi.o -L../ -lefsl + +cpo : cpo.o + gcc -o cpo cpo.o -L../ -lefsl + +cpa : cpa.o + gcc -o cpa cpa.o -L../ -lefsl + +mkdir : mkdir.o + gcc -o mkdir mkdir.o -L../ -lefsl + +list : list.o + gcc -o list list.o -L../ -lefsl + +rmfile : rmfile.o + gcc -o rmfile rmfile.o -L../ -lefsl + +#cpo2: cpo2.o +# gcc -o cpo2 cpo2.o -L./lib -lefsl + +clean : + rm -f cpi cpi.o cpo cpo.o cpa.o cpa mkdir.o mkdir list.o list rmfile rmfile.o + diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/cpa.c b/src/ersky9x/libraries/fat/efsl/linuxutils/cpa.c new file mode 100644 index 000000000..03fe3db34 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/cpa.c @@ -0,0 +1,81 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Description : This file is part of the linuxutils in the 0.2 branch * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include +#include "efs.h" + +int main(int argc, char** argv) +{ + EmbeddedFileSystem efs; + EmbeddedFile file; + unsigned short e; + unsigned short bufsize; + signed short ret; + char *buf; + FILE *localfile; + + if(argc<4){ + fprintf(stderr,"Argument error : cpa [bufsize]\n"); + exit(-1); + } + + if(argc==5) + bufsize=atoi(argv[4]); + else + bufsize=4096; + buf=malloc(bufsize); + + if(efs_init(&efs,argv[1])!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + ret=file_fopen(&file,&efs.myFs,argv[3],'a'); + if((ret!=0)){ + printf("Could not open file %s (return value: %d).\n",argv[3],ret); + return(-2); + } + + if(!(localfile=fopen(argv[2],"r"))){ + printf("Could not open local file.\n"); + return(-3); + } + + while((e=fread(buf,1,bufsize,localfile))){ + file_write(&file,e,buf); + } + + file_fclose(&file); + fclose(localfile); + fs_umount(&(efs.myFs)); + + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/cpi.c b/src/ersky9x/libraries/fat/efsl/linuxutils/cpi.c new file mode 100644 index 000000000..4a5e4f9f1 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/cpi.c @@ -0,0 +1,88 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Description : This file is part of the linuxutils in the 0.2 branch * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include +#include "efs.h" + +int main(int argc, char** argv) +{ + EmbeddedFileSystem efs; + EmbeddedFile file; + unsigned short e; + unsigned short bufsize; + signed short ret; + char *buf; + FILE *localfile; + + if(argc<4){ + fprintf(stderr,"Argument error : cpi [bufsize]\n"); + exit(-1); + } + + if(argc==5) + bufsize=atoi(argv[4]); + else + bufsize=4096; + buf=malloc(bufsize); + + if(efs_init(&efs,argv[1])!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + ret=file_fopen(&file,&efs.myFs,argv[3],'w'); + if((ret!=0)){ + printf("Could not open file %s (return value: %d).\n",argv[3],ret); + return(-2); + } + + if(!(localfile=fopen(argv[2],"r"))){ + printf("Could not open local file.\n"); + return(-3); + } + + while((e=fread(buf,1,bufsize,localfile))){ + file_write(&file,e,buf); + } + + file_fclose(&file); + fclose(localfile); + fs_umount(&(efs.myFs)); + +#ifdef SECTORCOUNT_REPORT + printf("Buffers : %d\n" + "Reads : %d\n" + "Writes : %d\n", + IOMAN_NUMBUFFER,efs.myCard.readCount,efs.myCard.writeCount); +#endif + + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/cpo.c b/src/ersky9x/libraries/fat/efsl/linuxutils/cpo.c new file mode 100644 index 000000000..1225d377f --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/cpo.c @@ -0,0 +1,86 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Description : This file is part of the linuxutils in the 0.2 branch * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include +#include "efs.h" + +int main(int argc, char** argv) +{ + EmbeddedFileSystem efs; + EmbeddedFile file; + unsigned short e; + unsigned short bufsize; + char *buf; + FILE *localfile; + + if(argc<4){ + fprintf(stderr,"Argument error : cpo [bufsize]\n"); + exit(-1); + } + + if(argc==5) + bufsize=atoi(argv[4]); + else + bufsize=4096; + buf=malloc(bufsize); + + if(efs_init(&efs,argv[1])!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + if(file_fopen(&file,&efs.myFs,argv[2],'r')!=0){ + printf("Could not open file.\n"); + return(-2); + } + + if(!(localfile=fopen(argv[3],"w"))){ + printf("Could not open local file.\n"); + return(-3); + } + + while((e=file_read(&file,bufsize,buf))){ + fwrite(buf,1,e,localfile); + } + + file_fclose(&file); + fclose(localfile); + fs_umount(&(efs.myFs)); + +#ifdef SECTORCOUNT_REPORT + printf("Buffers : %d\n" + "Reads : %d\n" + "Writes : %d\n", + IOMAN_NUMBUFFER,efs.myCard.readCount,efs.myCard.writeCount); +#endif + + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/list.c b/src/ersky9x/libraries/fat/efsl/linuxutils/list.c new file mode 100644 index 000000000..8a6b497e0 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/list.c @@ -0,0 +1,65 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Description : This file is part of the linuxutils in the 0.2 branch * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include +#include "efs.h" +#include "ls.h" + +int main(int argc, char** argv) +{ + EmbeddedFileSystem efs; + DirList *list; + + if(argc<3){ + fprintf(stderr,"Argument error : list \n"); + exit(-1); + } + + if(efs_init(&efs,argv[1])!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + list = malloc(sizeof(*list)); + + if((ls_openDir(list,&(efs.myFs),argv[2]))!=0){ + printf("Unable to open directory for listing\n"); + exit(-1); + } + + while(ls_getNext(list)==0){ + printf("%s\n",list->currentEntry.FileName); + } + + fs_umount(&(efs.myFs)); + + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/mkdir.c b/src/ersky9x/libraries/fat/efsl/linuxutils/mkdir.c new file mode 100644 index 000000000..b86c332eb --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/mkdir.c @@ -0,0 +1,57 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Description : This file is part of the linuxutils in the 0.2 branch * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include +#include "efs.h" +#include "ui.h" + +int main(int argc, char **argv) +{ + EmbeddedFileSystem efs; + + if(argc<3){ + fprintf(stderr,"Argument error : mkdir \n"); + exit(-1); + } + + if(efs_init(&efs,argv[1])!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + if(!mkdir(&(efs.myFs),argv[2])){ + printf("Unable to make directory\n"); + fs_umount(&(efs.myFs)); + exit(-1); + } + fs_umount(&(efs.myFs)); + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/linuxutils/rmfile.c b/src/ersky9x/libraries/fat/efsl/linuxutils/rmfile.c new file mode 100644 index 000000000..e6a72f239 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/linuxutils/rmfile.c @@ -0,0 +1,57 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* -------------------------------------------------------- * +* * +* Description : This file is part of the linuxutils in the 0.2 branch * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include +#include "efs.h" +#include "ui.h" + +int main(int argc, char **argv) +{ + EmbeddedFileSystem efs; + + if(argc<3){ + fprintf(stderr,"Argument error : rmfile \n"); + exit(-1); + } + + if(efs_init(&efs,argv[1])!=0){ + printf("Could not open filesystem.\n"); + return(-1); + } + + if(rmfile(&(efs.myFs),argv[2])){ + printf("Unable to delete file.\n"); + fs_umount(&(efs.myFs)); + exit(-1); + } + fs_umount(&(efs.myFs)); + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/readme.txt b/src/ersky9x/libraries/fat/efsl/readme.txt new file mode 100644 index 000000000..a99859086 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/readme.txt @@ -0,0 +1 @@ +efsl-stable 0.2.8 \ No newline at end of file diff --git a/src/ersky9x/libraries/fat/efsl/src/debug.c b/src/ersky9x/libraries/fat/efsl/src/debug.c new file mode 100644 index 000000000..3ba8dedd2 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/debug.c @@ -0,0 +1,332 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------------------------------------------- * +* * +* Filename : debug.c * +* Description : These functions are used for debugging output on different * +* environments * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/* COMMENT REGARDING FUNCTION COMMENTS IN THIS FILE + * Only the linuxfile debug functions are commented since all functions + * perform the same logical task. +*/ + +/*****************************************************************************/ +#include "debug.h" +/*****************************************************************************/ + + +/*****************************************************************************/ +#ifdef DEBUG +#ifdef HW_ENDPOINT_LINUX_ALL +/*****************************************************************************/ + +/* **************************************************************************** + * void debug(const eint8 *format, ...) + * Description: This function prints debug output to the screen (target dependant) + * and if DO_FUNC_DEBUG is defined also to a localfile. + * Return value: void +*/ + +void debug(const eint8 *format, ...) +{ + va_list ap; + #ifdef DO_FUNC_DEBUG + euint8 c; + extern FILE* debugfile; + extern volatile euint8 tw; + #endif + + va_start(ap, format); + vprintf(format,ap); + #ifdef DO_FUNC_DEBUG + for(c=0;c0)tw--; + + for(c=0;c=90) + debug(PSTR("\n")); +} +/*****************************************************************************/ + +void debug_init(void) +{ + unsigned short ubrr; + + ubrr = ((unsigned short)DEBUG_UBRR); + + switch(DEBUG_PORT){ + case 0: + UBRR0H = (euint8) (ubrr>>8); + UBRR0L = (euint8) (ubrr); + UCSR0B = ( (1<>8); + UBRR1L = (euint8) (ubrr); + UCSR1B = ( (1<part,loc->Sector,IOM_MODE_READONLY); + *filerec=*(((FileRecord*)buf)+loc->Offset); + part_relSect(fs->part,buf); +} + +/*****************************************************************************/ + +/* **************************************************************************** + * void dir_createDirectoryEntry(FileSystem *fs,FileRecord *filerec,FileLocation *loc) + * Description: This function writes the filerecord stored in filerec to disc at + * location loc. + * Return value: void +*/ +void dir_createDirectoryEntry(FileSystem *fs,FileRecord *filerec,FileLocation *loc) +{ + euint8 *buf; + + buf = part_getSect(fs->part,loc->Sector,IOM_MODE_READWRITE); + memCpy(filerec,buf+(loc->Offset*sizeof(*filerec)),sizeof(*filerec)); + part_relSect(fs->part,buf); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void dir_createDefaultEntry(FileSystem *fs,FileRecord *filerec,eint8* fatfilename) + * Description: This function fills in a filerecord with safe default values, and + * a given fatfilename. If your system has a means of knowing time, here is an + * excellent place to apply it to the filerecord. + * Return value: void +*/ +void dir_createDefaultEntry(FileSystem *fs,FileRecord *filerec,eint8* fatfilename) +{ + memCpy(fatfilename,filerec->FileName,11); + filerec->Attribute=0x00; + filerec->NTReserved=0x00; + filerec->MilliSecTimeStamp=0x00; + filerec->CreatedTime=time_getTime(); + filerec->CreatedDate=time_getDate(); + filerec->AccessDate=filerec->CreatedDate; + filerec->FirstClusterHigh=0x0000; + filerec->WriteTime=filerec->CreatedTime; + filerec->WriteDate=filerec->CreatedDate; + filerec->FirstClusterLow=0x0000; + filerec->FileSize=0x00000000; +} +/*****************************************************************************/ + +/* **************************************************************************** + * void dir_setFirstCluster(File *file,euint32 cluster_addr) + * Description: This function requires modification to release it from + * depending on the file object. + * Return value: +*/ +void dir_setFirstCluster(FileSystem *fs,FileLocation *loc,euint32 cluster_addr) +{ + euint8 *buf; + + buf = part_getSect(fs->part,loc->Sector,IOM_MODE_READWRITE); + (((FileRecord*)buf)+loc->Offset)->FirstClusterHigh=cluster_addr>>16; + (((FileRecord*)buf)+loc->Offset)->FirstClusterLow=cluster_addr&0xFFFF; + part_relSect(fs->part,buf); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void dir_setFileSize(FileSystem *fs, FileLocation *loc,euint32 numbytes) + * Description: This function changes the filesize recorded at loc->Sector + * to 'numbytes'. + * Return value: void +*/ +void dir_setFileSize(FileSystem *fs, FileLocation *loc,euint32 numbytes) +{ + euint8 *buf; + + buf = part_getSect(fs->part,loc->Sector,IOM_MODE_READWRITE); + (((FileRecord*)buf)+loc->Offset)->FileSize=numbytes; + part_relSect(fs->part,buf); +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint8 dir_updateDirectoryEntry(FileSystem *fs,FileRecord *entry,FileLocation *loc)) + * This function changes the entire entity stores at loc to the data recorded + * in entry. This is for custom updates to the directoryentry. + * Return value: 0 on success, -1 on failure +*/ +esint8 dir_updateDirectoryEntry(FileSystem *fs,FileRecord *entry,FileLocation *loc) +{ + euint8 *buf; + + buf = part_getSect(fs->part,loc->Sector,IOM_MODE_READWRITE); + memCpy(entry,buf+(loc->Offset*sizeof(*entry)),sizeof(*entry)); + part_relSect(fs->part,buf); + return(0); +} + +/* **************************************************************************** + * euint32 dir_findFileinBuf(euint8 *buf, eint8 *fatname, FileLocation *loc) + * This function searches for a given fatfilename in the buffer provided. + * It will iterate through the 16 direntry's in the buffer and searches + * for the fatfilename. If found, it will store the offset and attribute + * entry of the directoryrecord in the loc structure. + * If loc is 0, then it's members are not touched. + * Return value: This function returns 0 when it cannot find the file, + * if it can find the file it will return the first cluster number. +*/ +euint32 dir_findFileinBuf(euint8 *buf, eint8 *fatname, FileLocation *loc) +{ + FileRecord fileEntry; + euint8 c; + + for(c=0; c<16; c++) + { + fileEntry = *(((FileRecord*)buf) + c); + /* Check if the entry is for short filenames */ + if( !( (fileEntry.Attribute & 0x0F) == 0x0F ) ) + { + if( strMatch((eint8*)fileEntry.FileName,fatname,11) == 0 ) + { + /* The entry has been found, return the location in the dir */ + if(loc)loc->Offset = c; + if(loc)loc->attrib = fileEntry.Attribute; + if((((euint32 )fileEntry.FirstClusterHigh)<<16)+ fileEntry.FirstClusterLow==0){ + return(1); /* Lie about cluster, 0 means not found! */ + }else{ + return + ( + (((euint32 )fileEntry.FirstClusterHigh)<<16) + + fileEntry.FirstClusterLow + ); + } + } + } + } + return(0); +} + +/* **************************************************************************** + * euint32 dir_findFreeEntryinBuf(euint8* buf, FileLocation *loc) + * This function searches for a free entry in a given sector 'buf'. + * It will put the offset into the loc->Offset field, given that loc is not 0. + * Return value: 1 when it found a free spot, 0 if it hasn't. +*/ +euint32 dir_findFreeEntryinBuf(euint8* buf, FileLocation *loc) +{ + FileRecord fileEntry; + euint8 c; + + for(c=0;c<16;c++){ + fileEntry = *(((FileRecord*)buf) + c); + if( !( (fileEntry.Attribute & 0x0F) == 0x0F ) ){ + if(fileEntry.FileName[0] == 0x00 || + fileEntry.FileName[0] == 0xE5 ){ + if(loc)loc->Offset=c; + return(1); + } + } + } + return(0); +} + +/* **************************************************************************** + * euint32 dir_findinBuf(euint8 *buf, eint8 *fatname, FileLocation *loc) + * Description: This function searches for a given fatfilename in a buffer. + * Return value: Returns 0 on not found, and the firstcluster when the name is found. +*/ +euint32 dir_findinBuf(euint8 *buf, eint8 *fatname, FileLocation *loc, euint8 mode) +{ + switch(mode){ + case DIRFIND_FILE: + return(dir_findFileinBuf(buf,fatname,loc)); + break; + case DIRFIND_FREE: + return(dir_findFreeEntryinBuf(buf,loc)); + break; + default: + return(0); + break; + } + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 dir_findinCluster(FileSystem *fs,euint32 cluster,eint8 *fatname, FileLocation *loc, euint8 mode) + * This function will search for an existing (fatname) or free directory entry + * in a full cluster. + * Return value: 0 on failure, firstcluster on finding file, and 1 on finding free spot. +*/ +euint32 dir_findinCluster(FileSystem *fs,euint32 cluster,eint8 *fatname, FileLocation *loc, euint8 mode) +{ + euint8 c,*buf=0; + euint32 fclus; + + for(c=0;cvolumeId.SectorsPerCluster;c++){ + //printf("probleme\n\r"); + //printf("cluster=0x%X", cluster); + buf = part_getSect(fs->part,fs_clusterToSector(fs,cluster)+c,IOM_MODE_READONLY); + if((fclus=dir_findinBuf(buf,fatname,loc,mode))){ + if(loc)loc->Sector=fs_clusterToSector(fs,cluster)+c; + part_relSect(fs->part,buf); + return(fclus); + } + part_relSect(fs->part,buf); /* Thanks Mike ;) */ + } + return(0); +} + +/* **************************************************************************** + * euint32 dir_findinDir(FileSystem *fs, eint8* fatname,euint32 firstcluster, FileLocation *loc, euint8 mode) + * This function will search for an existing (fatname) or free directory entry + * in a directory, following the clusterchains. + * Return value: 0 on failure, firstcluster on finding file, and 1 on finding free spot. +*/ +euint32 dir_findinDir(FileSystem *fs, eint8* fatname,euint32 firstcluster, FileLocation *loc, euint8 mode) +{ + euint32 c=0,cluster; + ClusterChain Cache; + + Cache.DiscCluster = Cache.FirstCluster = firstcluster; + Cache.LogicCluster = Cache.LastCluster = Cache.Linear = 0; + + if(firstcluster <= 1){ + return(dir_findinRootArea(fs,fatname,loc,mode)); + } + + while(!fat_LogicToDiscCluster(fs,&Cache,c++)){ + if((cluster=dir_findinCluster(fs,Cache.DiscCluster,fatname,loc,mode))){ + return(cluster); + } + } + return(0); +} + +/* **************************************************************************** + * euint32 dir_findinDir(FileSystem *fs, eint8* fatname,euint32 firstcluster, FileLocation *loc, euint8 mode) + * This function will search for an existing (fatname) or free directory entry + * in the rootdirectory-area of a FAT12/FAT16 filesystem. + * Return value: 0 on failure, firstcluster on finding file, and 1 on finding free spot. +*/ +euint32 dir_findinRootArea(FileSystem *fs,eint8* fatname, FileLocation *loc, euint8 mode) +{ + euint32 c,fclus; + euint8 *buf=0; + + if((fs->type != FAT12) && (fs->type != FAT16))return(0); + + for(c=fs->FirstSectorRootDir;c<(fs->FirstSectorRootDir+fs->volumeId.RootEntryCount/32);c++){ + buf = part_getSect(fs->part,c,IOM_MODE_READONLY); + if((fclus=dir_findinBuf(buf,fatname,loc,mode))){ + if(loc)loc->Sector=c; + part_relSect(fs->part,buf); + return(fclus); + } + part_relSect(fs->part,buf); + } + part_relSect(fs->part,buf); + return(0); +} + +/* **************************************************************************** + * esint8 dir_getFatFileName(eint8* filename, eint8* fatfilename) + * This function will take a full directory path, and strip off all leading + * dirs and characters, leaving you with the MS-DOS notation of the actual filename. + * Return value: 1 on success, 0 on not being able to produca a filename +*/ +esint8 dir_getFatFileName(eint8* filename, eint8* fatfilename) +{ + eint8 ffnamec[11],*next,nn=0; + + memClr(ffnamec,11); memClr(fatfilename,11); + next = filename; + + if(*filename=='/')next++; + + while((next=file_normalToFatName(next,ffnamec))){ + memCpy(ffnamec,fatfilename,11); + nn++; + } + if(nn)return(1); + return(0); +} + +/* **************************************************************************** + * esint8 dir_addCluster(FileSystem *fs,euint32 firstCluster) + * This function extends a directory by 1 cluster + optional the number of + * clusters you want pre-allocated. It will also delete the contents of that + * cluster. (or clusters) + * Return value: 0 on success, -1 on fail +*/ +esint8 dir_addCluster(FileSystem *fs,euint32 firstCluster) +{ + euint32 lastc,logicalc; + ClusterChain cache; + + fs_initClusterChain(fs,&cache,firstCluster); + if(fat_allocClusterChain(fs,&cache,1)){ + return(-1); + } + lastc = fs_getLastCluster(fs,&cache); + if(CLUSTER_PREALLOC_DIRECTORY){ + if(fat_allocClusterChain(fs,&cache,CLUSTER_PREALLOC_DIRECTORY)){ + return(-1); + } + logicalc = fat_DiscToLogicCluster(fs,firstCluster,lastc); + while(!fat_LogicToDiscCluster(fs,&cache,++logicalc)){ + fs_clearCluster(fs,cache.DiscCluster); + } + }else{ + fs_clearCluster(fs,lastc); + } + return(0); +} + + diff --git a/src/ersky9x/libraries/fat/efsl/src/disc.c b/src/ersky9x/libraries/fat/efsl/src/disc.c new file mode 100644 index 000000000..d818d929a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/disc.c @@ -0,0 +1,68 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : disc.c * +* Description : This file contains the functions regarding the whole disc * +* such as loading the MBR and performing read/write tests. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "disc.h" +/*****************************************************************************/ + +/* **************************************************************************** + * void disc_initDisc(Disc *disc,hcInterface* source) + * Description: This initialises the disc by loading the MBR and setting the + * pointer to the hardware object. +*/ +void disc_initDisc(Disc *disc,IOManager* ioman) +{ + disc->ioman=ioman; + disc_setError(disc,DISC_NOERROR); + disc_loadMBR(disc); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void disc_loadMBR(Disc *disc) + * Description: This functions copies the partitiontable to the partitions field. +*/ +void disc_loadMBR(Disc *disc) +{ + euint8 x; + euint8 *buf; + + buf=ioman_getSector(disc->ioman,LBA_ADDR_MBR,IOM_MODE_READONLY|IOM_MODE_EXP_REQ); + for(x=0;x<4;x++){ + ex_getPartitionField(buf,&(disc->partitions[x]),PARTITION_TABLE_OFFSET+(x*SIZE_PARTITION_FIELD)); + } + ioman_releaseSector(disc->ioman,buf); +} +/*****************************************************************************/ + + diff --git a/src/ersky9x/libraries/fat/efsl/src/efs.c b/src/ersky9x/libraries/fat/efsl/src/efs.c new file mode 100644 index 000000000..045c9a9d0 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/efs.c @@ -0,0 +1,68 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : efs.h * +* Description : This should become the wrapper around efs. It will contain * +* functions like efs_init etc. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "efs.h" +/*****************************************************************************/ + +/* **************************************************************************** + * esint8 efs_init(EmbeddedFileSystem * efs,eint8* opts) + * Description: This function initialises all subelements of a filesystem. + * It sets the pointerchain and verifies each step. + * Return value: 0 on success and -1 on failure. +*/ +esint8 efs_init(EmbeddedFileSystem * efs,eint8* opts) +{ + if(if_initInterface(&efs->myCard, opts)==0) + { + ioman_init(&efs->myIOman,&efs->myCard,0); + disc_initDisc(&efs->myDisc, &efs->myIOman); + part_initPartition(&efs->myPart, &efs->myDisc); + if(efs->myPart.activePartition==-1){ + efs->myDisc.partitions[0].type=0x0B; + efs->myDisc.partitions[0].LBA_begin=0; + efs->myDisc.partitions[0].numSectors=efs->myCard.sectorCount; + /*efs->myPart.activePartition = 0;*/ + /*efs->myPart.disc = &(efs->myDisc);*/ + part_initPartition(&efs->myPart, &efs->myDisc); + } + /*part_initPartition(&efs->myPart, &efs->myDisc);*/ + if(fs_initFs(&efs->myFs, &efs->myPart)) + return(-2); + return(0); + } + return(-1); +} +/*****************************************************************************/ + + diff --git a/src/ersky9x/libraries/fat/efsl/src/extract.c b/src/ersky9x/libraries/fat/efsl/src/extract.c new file mode 100644 index 000000000..53ec134cd --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/extract.c @@ -0,0 +1,158 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : extract.c * +* Description : This file contains functions to copy structures that get * +* corrupted when using direct memory copy * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "extract.h" +/*****************************************************************************/ + +/*****************************************************************************/ +#ifdef BYTE_ALIGNMENT +/*****************************************************************************/ + +euint16 ex_getb16(euint8* buf,euint32 offset) +{ + return(ltb_end16(*((euint16*)(buf+offset)))); +} +/*****************************************************************************/ + +euint32 ex_getb32(euint8* buf,euint32 offset) +{ + return(ltb_end32(*((euint32*)(buf+offset)))); +} +/*****************************************************************************/ + +void ex_setb16(euint8* buf,euint32 offset,euint16 data) +{ + *((euint16*)(buf+offset)) = btl_end16(data); +} +/*****************************************************************************/ + +void ex_setb32(euint8* buf,euint32 offset,euint32 data) +{ + *((euint32*)(buf+offset)) = btl_end32(data); +} +/*****************************************************************************/ + +void ex_getPartitionField(euint8* buf,PartitionField* pf, euint32 offset) +{ + *pf=*((PartitionField*)(buf+offset)); +} +/*****************************************************************************/ + +void ex_setPartitionField(euint8* buf,PartitionField* pf, euint32 offset) +{ + +} +/*****************************************************************************/ + + + + +/*****************************************************************************/ +/*****************************************************************************/ +#else +/*****************************************************************************/ +/*****************************************************************************/ + + + +euint16 ex_getb16(euint8* buf,euint32 offset) +{ + return(ltb_end16(((*(buf+offset+1))<<8) + ((*(buf+offset+0))<<0))); +} +/*****************************************************************************/ + +euint32 ex_getb32(euint8* buf,euint32 offset) +{ + return(ltb_end32(((euint32)buf[offset+3]<<24)+ + ((euint32)buf[offset+2]<<16)+ + ((euint32)buf[offset+1]<<8)+ + ((euint32)buf[offset+0]<<0))); +} +/*****************************************************************************/ + +void ex_setb16(euint8* buf,euint32 offset,euint16 data) +{ +#ifdef BIG_ENDIAN + *(buf+offset+1) = data>>0; + *(buf+offset+0) = data>>8; +#else + *(buf+offset+0) = data>>0; + *(buf+offset+1) = data>>8; +#endif +} +/*****************************************************************************/ + +void ex_setb32(euint8* buf,euint32 offset,euint32 data) +{ +#ifdef BIG_ENDIAN + *(buf+offset+3) = data>> 0; + *(buf+offset+2) = data>> 8; + *(buf+offset+1) = data>>16; + *(buf+offset+0) = data>>24; +#else + *(buf+offset+0) = data>> 0; + *(buf+offset+1) = data>> 8; + *(buf+offset+2) = data>>16; + *(buf+offset+3) = data>>24; +#endif +} +/*****************************************************************************/ + +void ex_getPartitionField(euint8* buf,PartitionField* pf, euint32 offset) +{ + pf->bootFlag = *(buf + offset); + pf->CHS_begin[0] = *(buf + offset + 1); + pf->CHS_begin[1] = *(buf + offset + 2); + pf->CHS_begin[2] = *(buf + offset + 3); + pf->type = *(buf + offset + 4); + pf->CHS_end[0] = *(buf + offset + 5); + pf->CHS_end[1] = *(buf + offset + 6); + pf->CHS_end[2] = *(buf + offset + 7); + pf->LBA_begin = ex_getb32(buf + offset,8); + pf->numSectors = ex_getb32(buf + offset,12); +} +/*****************************************************************************/ + +void ex_setPartitionField(euint8* buf,PartitionField* pf, euint32 offset) +{ + +} +/*****************************************************************************/ + + + +/*****************************************************************************/ +#endif +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/fat.c b/src/ersky9x/libraries/fat/efsl/src/fat.c new file mode 100644 index 000000000..f58e3d4ea --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/fat.c @@ -0,0 +1,567 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : fat.c * +* Description : This file contains all the functions dealing with the FAT * +* in a Microsoft FAT filesystem. It belongs under fs.c * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "fs.h" +/*****************************************************************************/ + +/* **************************************************************************** + * unsigned long fat_getSectorAddressFatEntry(FileSystem *fs,unsigned long cluster_addr) + * Description: Returns the sectornumber that holds the fat entry for cluster cluster_addr. + * This works for all FAT types. + * Return value: Sectornumber, or 0. Warning, no boundary check. +*/ +euint32 fat_getSectorAddressFatEntry(FileSystem *fs,euint32 cluster_addr) +{ + euint32 base = fs->volumeId.ReservedSectorCount,res; + + switch(fs->type){ + case FAT12: + res=(cluster_addr*3/1024); + if(res>=fs->FatSectorCount){ + return(0); + }else{ + return(base+res); + } + break; + case FAT16: + res=cluster_addr/256; + if(res>=fs->FatSectorCount){ + return(0); + }else{ + return(base+res); + } + break; + case FAT32: + res=cluster_addr/128; + if(res>=fs->FatSectorCount){ + return(0); + }else{ + return(base+res); + } + break; + } + return(0); +} +/*****************************************************************************/ + + +/* **************************************************************************** + * unsigned long fat_getNextClusterAddress(FileSystem *fs,unsigned long cluster_addr + * Description: This function loads the sector of the fat which contains the entry + * for cluster_addr. It then fetches and (if required) calculates it's value. + * This value is the EoC marker -or- the number of the next cluster in the chain. + * Return value: Clusternumber or EoC +*/ +euint32 fat_getNextClusterAddress(FileSystem *fs,euint32 cluster_addr,euint16 *linear) +{ + euint8 *buf; + euint8 hb,lb; + euint16 offset; + euint32 sector; + euint32 nextcluster=0; + + sector=fat_getSectorAddressFatEntry(fs,cluster_addr); + if( (fs->FatSectorCount <= (sector-fs->volumeId.ReservedSectorCount)) || sector==0 ) + { + return(0); + } + + buf=part_getSect(fs->part,sector,IOM_MODE_READONLY); + + switch(fs->type) + { + case FAT12: + offset = ((cluster_addr%1024)*3/2)%512; + hb = buf[offset]; + if(offset == 511){ + part_relSect(fs->part,buf); + buf=part_getSect(fs->part,sector+1,IOM_MODE_READONLY); + lb = buf[0]; + }else{ + lb = buf[offset + 1]; + } + if(cluster_addr%2==0){ + nextcluster = ( ((lb&0x0F)<<8) + (hb) ); + }else{ + nextcluster = ( (lb<<4) + (hb>>4) ); + } + break; + case FAT16: + offset=cluster_addr%256; + nextcluster = *((euint16 *)buf + offset); + break; + case FAT32: + offset=cluster_addr%128; + nextcluster = *((euint32 *)buf + offset); + break; + } + + part_relSect(fs->part,buf); + + return(nextcluster); +} +/*****************************************************************************/ + + +/* **************************************************************************** + * void fat_setNextClusterAddress(FileSystem *fs,unsigned long cluster_addr,unsigned long next_cluster_addr) + * Description: This function makes an entry in the fattable for cluster_addr. The value it puts there + * is next_cluster_addr. +*/ +void fat_setNextClusterAddress(FileSystem *fs,euint32 cluster_addr,euint32 next_cluster_addr) +{ + euint8 *buf,*buf2; + euint16 offset; + euint32 sector; + + sector=fat_getSectorAddressFatEntry(fs,cluster_addr); + + if(( fs->FatSectorCount <= (sector - fs->volumeId.ReservedSectorCount )||(sector==0))){ + DBG((TXT("HARDERROR:::fat_getNextClusterAddress READ PAST FAT BOUNDARY\n"))); + return; + } + + buf=part_getSect(fs->part,sector,IOM_MODE_READWRITE); + + switch(fs->type){ + case FAT12: + offset = ((cluster_addr%1024)*3/2)%512; + if(offset == 511){ + if(cluster_addr%2==0){ + buf[offset]=next_cluster_addr&0xFF; + }else{ + buf[offset]=(buf[offset]&0xF)+((next_cluster_addr<<4)&0xF0); + } + buf2=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,cluster_addr)+1,IOM_MODE_READWRITE); + if(cluster_addr%2==0){ + buf2[0]=(buf2[0]&0xF0)+((next_cluster_addr>>8)&0xF); + }else{ + buf2[0]=(next_cluster_addr>>4)&0xFF; + } + part_relSect(fs->part,buf2); + }else{ + if(cluster_addr%2==0){ + buf[offset]=next_cluster_addr&0xFF; + buf[offset+1]=(buf[offset+1]&0xF0)+((next_cluster_addr>>8)&0xF); + }else{ + buf[offset]=(buf[offset]&0xF)+((next_cluster_addr<<4)&0xF0); + buf[offset+1]=(next_cluster_addr>>4)&0xFF; + } + } + part_relSect(fs->part,buf); + break; + case FAT16: + offset=cluster_addr%256; + *((euint16*)buf+offset)=next_cluster_addr; + part_relSect(fs->part,buf); + break; + case FAT32: + offset=cluster_addr%128; + *((euint32*)buf+offset)=next_cluster_addr; + part_relSect(fs->part,buf); + break; + } + +} +/*****************************************************************************/ + + +/* **************************************************************************** + * short fat_isEocMarker(FileSystem *fs,unsigned long fat_entry) + * Description: Checks if a certain value is the EoC marker for the filesystem + * noted in fs->type. + * Return value: Returns 0 when it is the EoC marker, and 1 otherwise. +*/ +eint16 fat_isEocMarker(FileSystem *fs,euint32 fat_entry) +{ + switch(fs->type){ + case FAT12: + if(fat_entry<0xFF8){ + return(0); + } + break; + case FAT16: + if(fat_entry<0xFFF8){ + return(0); + } + break; + case FAT32: + if((fat_entry&0x0FFFFFFF)<0xFFFFFF8){ + return(0); + } + break; + } + return(1); +} +/*****************************************************************************/ + + +/* **************************************************************************** + * unsigned long fat_giveEocMarker(FileSystem *fs) + * Description: Returns an EoC markernumber valid for the filesystem noted in + * fs->type. + * Note, for FAT32, the upper 4 bits are set to zero, although they should be un + * touched according to MicroSoft specifications. I didn't care. + * Return value: The EoC marker cast to an ulong. +*/ +euint32 fat_giveEocMarker(FileSystem *fs) +{ + switch(fs->type) + { + case FAT12: + return(0xFFF); + break; + case FAT16: + return(0xFFFF); + break; + case FAT32: + return(0x0FFFFFFF); + break; + } + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 fat_getNextClusterAddressWBuf(FileSystem *fs,euint32 cluster_addr, euint8* buf) + * Description: This function retrieves the contents of a FAT field. It does not fetch + * it's own buffer, it is given as a parameter. (ioman makes this function rather obsolete) + * Only in the case of a FAT12 crosssector data entry a sector is retrieved here. + * Return value: The value of the clusterfield is returned. +*/ +euint32 fat_getNextClusterAddressWBuf(FileSystem *fs,euint32 cluster_addr, euint8* buf) +{ + euint8 *buf2; /* For FAT12 fallover only */ + euint8 hb,lb; + euint16 offset; + euint32 nextcluster=0; + + switch(fs->type) + { + case FAT12: + offset = ((cluster_addr%1024)*3/2)%512; + hb = buf[offset]; + if(offset == 511){ + buf2=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,cluster_addr)+1,IOM_MODE_READONLY); + lb = buf2[0]; + part_relSect(fs->part,buf2); + }else{ + lb = buf[offset + 1]; + } + if(cluster_addr%2==0){ + nextcluster = ( ((lb&0x0F)<<8) + (hb) ); + }else{ + nextcluster = ( (lb<<4) + (hb>>4) ); + } + break; + case FAT16: + offset=cluster_addr%256; + nextcluster = *((euint16*)buf + offset); + break; + case FAT32: + offset=cluster_addr%128; + nextcluster = *((euint32*)buf + offset); + break; + } + return(nextcluster); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void fat_setNextClusterAddressWBuf(FileSystem *fs,euint32 cluster_addr,euint32 next_cluster_addr,euint8* buf) + * Description: This function fills in a fat entry. The entry is cluster_addr and the + * data entered is next_cluster_addr. This function is also given a *buf, so it does + * not write the data itself, except in the case of FAT 12 cross sector data, where + * the second sector is handled by this function. + * Return value: +*/ +void fat_setNextClusterAddressWBuf(FileSystem *fs,euint32 cluster_addr,euint32 next_cluster_addr,euint8* buf) +{ + euint16 offset; + euint8 *buf2; + + switch(fs->type) + { + case FAT12: + offset = ((cluster_addr%1024)*3/2)%512; + if(offset == 511){ + if(cluster_addr%2==0){ + buf[offset]=next_cluster_addr&0xFF; + }else{ + buf[offset]=(buf[offset]&0xF)+((next_cluster_addr<<4)&0xF0); + } + buf2=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,cluster_addr)+1,IOM_MODE_READWRITE); + if(cluster_addr%2==0){ + buf2[0]=(buf2[0]&0xF0)+((next_cluster_addr>>8)&0xF); + }else{ + buf2[0]=(next_cluster_addr>>4)&0xFF; + } + part_relSect(fs->part,buf2); + }else{ + if(cluster_addr%2==0){ + buf[offset]=next_cluster_addr&0xFF; + buf[offset+1]=(buf[offset+1]&0xF0)+((next_cluster_addr>>8)&0xF); + }else{ + buf[offset]=(buf[offset]&0xF)+((next_cluster_addr<<4)&0xF0); + buf[offset+1]=(next_cluster_addr>>4)&0xFF; + } + } + break; + case FAT16: + offset=cluster_addr%256; + *((euint16*)buf+offset)=next_cluster_addr; + break; + case FAT32: + offset=cluster_addr%128; + *((euint32*)buf+offset)=next_cluster_addr; + break; + } +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint16 fat_getNextClusterChain(FileSystem *fs, ClusterChain *Cache) + * Description: This function is to advance the clusterchain of a Cache. + * First, the function verifies if the Cache is valid. It could correct it if it + * is not, but this is not done at the time. If the cachen is valid, the next step is + * to see what the next cluster is, if this is the End of Clustermark, the cache is + * updated to know the lastcluster but will remain untouched otherwise. -1 is returned. + * If there are more clusters the function scans the rest of the chain until the next + * cluster is no longer lineair, or until it has run out of fat data (only 1 sector) is + * examined, namely the one fetched to check for EoC. + * With lineair is meant that logical cluster n+1 should be 1 more than logical cluster n + * at the disc level. + * Return value: 0 on success, or -1 when EoC. +*/ +esint16 fat_getNextClusterChain(FileSystem *fs, ClusterChain *Cache) +{ + euint32 sect,lr,nlr,dc; + esint16 lin=0; + euint8 *buf; + + if(Cache->DiscCluster==0) + { + return(-1); + } + + sect=fat_getSectorAddressFatEntry(fs,Cache->DiscCluster); + buf=part_getSect(fs->part,sect,IOM_MODE_READONLY); + dc=fat_getNextClusterAddressWBuf(fs,Cache->DiscCluster,buf); + if(fat_isEocMarker(fs,dc)) + { + Cache->LastCluster=Cache->DiscCluster; + part_relSect(fs->part,buf); + return(-1); + } + + Cache->DiscCluster=dc; + Cache->LogicCluster++; + + lr=Cache->DiscCluster-1; + nlr=lr+1; + + while(nlr-1==lr && fat_getSectorAddressFatEntry(fs,nlr)==sect) + { + lr=nlr; + nlr=fat_getNextClusterAddressWBuf(fs,lr,buf); + lin++; + } + + Cache->Linear=lin-1<0?0:lin-1; + + part_relSect(fs->part,buf); + return(0); +} +/*****************************************************************************/ + + +/* **************************************************************************** + * esint16 fat_LogicToDiscCluster(FileSystem *fs, ClusterChain *Cache,euint32 logiccluster) + * Description: This function is used to follow clusterchains. When called it will convert + * a logical cluster, to a disc cluster, using a Cache object. All it does is call + * getNextClusterChain in the proper manner, and rewind clusterchains if required. + * It is NOT recommended to go backwards in clusterchains, since this will require + * scanning the entire chain every time. + * Return value: 0 on success and -1 on failure (meaning out of bounds). +*/ +esint16 fat_LogicToDiscCluster(FileSystem *fs, ClusterChain *Cache,euint32 logiccluster) +{ + if(logicclusterLogicCluster || Cache->DiscCluster==0){ + Cache->LogicCluster=0; + Cache->DiscCluster=Cache->FirstCluster; + Cache->Linear=0; + } + + if(Cache->LogicCluster==logiccluster){ + return(0); + } + + while(Cache->LogicCluster!=logiccluster) + { + if(Cache->Linear!=0) + { + Cache->Linear--; + Cache->LogicCluster++; + Cache->DiscCluster++; + } + else + { + if((fat_getNextClusterChain(fs,Cache))!=0){ + return(-1); + } + } + } + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * eint16 fat_allocClusterChain(FileSystem *fs,ClusterChain *Cache,euint32 num_clusters) + * Description: This function extends a clusterchain by num_clusters. It returns the + * number of clusters it *failed* to allocate. + * Return value: 0 on success, all other values are the number of clusters it could + * not allocate. +*/ +eint16 fat_allocClusterChain(FileSystem *fs,ClusterChain *Cache,euint32 num_clusters) +{ + euint32 cc,ncl=num_clusters,lc; + euint8 *bufa=0,*bufb=0; + euint8 overflow=0; + + if(Cache->FirstCluster<=1)return(num_clusters); + + lc=fs_getLastCluster(fs,Cache); + cc=lc; + + while(ncl > 0){ + cc++; + if(cc>=fs->DataClusterCount+1){ + if(overflow){ + bufa=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,lc),IOM_MODE_READWRITE); + fat_setNextClusterAddressWBuf(fs,lc,fat_giveEocMarker(fs),bufa); + Cache->LastCluster=lc; + part_relSect(fs->part,bufa); + fs->FreeClusterCount-=num_clusters-ncl; + return(num_clusters-ncl); + } + cc=2; + overflow++; + } + bufa=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,cc),IOM_MODE_READONLY); + if(fat_getNextClusterAddressWBuf(fs,cc,bufa)==0){ + bufb=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,lc),IOM_MODE_READWRITE); + fat_setNextClusterAddressWBuf(fs,lc,cc,bufb); + part_relSect(fs->part,bufb); + ncl--; + lc=cc; + } + part_relSect(fs->part,bufa); + if(ncl==0){ + bufa=part_getSect(fs->part,fat_getSectorAddressFatEntry(fs,lc),IOM_MODE_READWRITE); + fat_setNextClusterAddressWBuf(fs,lc,fat_giveEocMarker(fs),bufa); + Cache->LastCluster=lc; + part_relSect(fs->part,bufa); + } + } + if(Cache->ClusterCount)Cache->ClusterCount+=num_clusters; + return(0); +} + +/* **************************************************************************** + * eint16 fat_unlinkClusterChain(FileSystem *fs,ClusterChain *Cache) + * Description: This function removes a clusterchain. Starting at FirstCluster + * it follows the chain until the end, resetting all values to 0. + * Return value: 0 on success. +*/ +eint16 fat_unlinkClusterChain(FileSystem *fs,ClusterChain *Cache) +{ + euint32 c,tbd=0; + + Cache->LogicCluster=0; + Cache->DiscCluster=Cache->FirstCluster; + + c=0; + + while(!fat_LogicToDiscCluster(fs,Cache,c++)){ + if(tbd!=0){ + fat_setNextClusterAddress(fs,tbd,0); + } + tbd=Cache->DiscCluster; + } + fat_setNextClusterAddress(fs,Cache->DiscCluster,0); + fs->FreeClusterCount+=c; + return(0); +} + +euint32 fat_countClustersInChain(FileSystem *fs,euint32 firstcluster) +{ + ClusterChain cache; + euint32 c=0; + + if(firstcluster<=1)return(0); + + cache.DiscCluster = cache.LogicCluster = cache.LastCluster = cache.Linear = 0; + cache.FirstCluster = firstcluster; + + while(!(fat_LogicToDiscCluster(fs,&cache,c++))); + + return(c-1); +} + +euint32 fat_DiscToLogicCluster(FileSystem *fs,euint32 firstcluster,euint32 disccluster) +{ + ClusterChain cache; + euint32 c=0,r=0; + + cache.DiscCluster = cache.LogicCluster = cache.LastCluster = cache.Linear = 0; + cache.FirstCluster = firstcluster; + + while(!(fat_LogicToDiscCluster(fs,&cache,c++)) && !r){ + if(cache.DiscCluster == disccluster){ + r = cache.LogicCluster; + } + } + return(r); +} + +euint32 fat_countFreeClusters(FileSystem *fs) +{ + euint32 c=2,fc=0; + + while(c<=fs->DataClusterCount+1){ + if(fat_getNextClusterAddress(fs,c,0)==0)fc++; + c++; + } + return(fc); +} diff --git a/src/ersky9x/libraries/fat/efsl/src/file.c b/src/ersky9x/libraries/fat/efsl/src/file.c new file mode 100644 index 000000000..d5c0de7bd --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/file.c @@ -0,0 +1,504 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : file.c * +* Description : This file contains functions dealing with files such as: * +* fopen, fread and fwrite. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "file.h" +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 file_fread(File *file,euint32 offset, euint32 size,euint8 *buf) + * Description: This function reads 'size' bytes from 'file' starting at + * 'offset' and puts the result in '*buf'. + * Return value: amount of bytes actually read (can differ from the given + * size when the file was smaller +*/ +euint32 file_fread(File *file,euint32 offset, euint32 size,euint8 *buf) +{ + euint32 bytes_read=0,size_left=size,coffset=offset; + euint32 cclus,csec,cbyte; + euint32 rclus,rsec; + euint32 btr; + euint8 *tbuf; + + if(!file_getAttr(file,FILE_STATUS_OPEN))return(0); + + if(offset>=file->FileSize) + size_left=0; /* Offset check */ + + if( (offset+size > file->FileSize) && size_left!=0) + size_left=file->FileSize-offset; + + while(size_left>0){ + + cclus = coffset/(512*file->fs->volumeId.SectorsPerCluster); + csec = (coffset/(512))%file->fs->volumeId.SectorsPerCluster; + cbyte = coffset%512; + + if(cbyte!=0 || size_left<512){ + btr = 512-(coffset%512)>=size_left?size_left:512-(coffset%512); + }else{ + btr = 512; + } + + if((fat_LogicToDiscCluster(file->fs,&(file->Cache),cclus))!=0){ + return(0); + } + rclus=file->Cache.DiscCluster; + rsec=fs_clusterToSector(file->fs,rclus); + + + if(btr==512){ + /*part_readBuf(file->fs->part,rsec+csec,buf+bytes_read);*/ + part_directSectorRead(file->fs->part,rsec+csec,buf+bytes_read); + }else{ + /*part_readBuf(file->fs->part,rsec+csec,tbuf);*/ + tbuf = part_getSect(file->fs->part,rsec+csec,IOM_MODE_READONLY); + memCpy(tbuf+(coffset%512),buf+bytes_read,btr); + part_relSect(file->fs->part,tbuf); + } + + coffset+=btr; + bytes_read+=btr; + size_left-=btr; + } + + return(bytes_read); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 file_read (File *file,euint32 size,euint8 *buf) + * Description: This function reads from a file, taking the FilePtr into account + * and advancing it according to the freadcall. + * Return value: Value obtained from fread +*/ +euint32 file_read(File *file,euint32 size,euint8 *buf) +{ + euint32 r; + + r=file_fread(file,file->FilePtr,size,buf); + file->FilePtr+=r; + return(r); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 file_write(File *file, euint32 size,euint8 *buf) + * Description: This function writes to a file, taking FilePtr into account + * and advancing it according to the fwritecall. + * Return value: Value obtained from fread +*/ +euint32 file_write(File *file, euint32 size,euint8 *buf) +{ + euint32 r; + + r=file_fwrite(file,file->FilePtr,size,buf); + file->FilePtr+=r; + return(r); +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint16 file_setpos(File *file,euint32 pos) + * Description: This function does a sanity check on the requested position + * and changes the fileptr accordingly. + * Return value: 0 on success and -1 on failure. +*/ +esint16 file_setpos(File *file,euint32 pos) +{ + if(pos<=file->FileSize){ + file->FilePtr=pos; + return(0); + } + return(-1); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 file_fwrite(File* file,euint32 offset,euint32 size,euint8* buf) + * Description: This function writes to a file, at offset 'offset' and size 'size'. + * It also updates the FileSize in the object, and discstructure. + * Return value: Bytes actually written. +*/ +euint32 file_fwrite(File* file,euint32 offset,euint32 size,euint8* buf) +{ + euint32 need_cluster; + euint32 cclus,csec,cbyte; + euint32 size_left=size,bytes_written=0; + euint32 rclus,rsec; + euint32 coffset=offset; + euint16 btr; + euint8 *tbuf; + + if(!file_getAttr(file,FILE_STATUS_OPEN) || !file_getAttr(file,FILE_STATUS_WRITE))return(0); + + if(offset>file->FileSize){ + offset=file->FileSize; + } + + need_cluster = file_requiredCluster(file,offset,size); + + if(need_cluster){ + if(fat_allocClusterChain(file->fs,&(file->Cache),need_cluster+CLUSTER_PREALLOC_FILE)!=0){ + return(0); + } + } + + while(size_left>0){ + + cclus = coffset/(512*file->fs->volumeId.SectorsPerCluster); + csec = (coffset/(512))%file->fs->volumeId.SectorsPerCluster; + cbyte = coffset%512; + + if(cbyte!=0 || size_left<512){ + btr = 512-(coffset%512)>=size_left?size_left:512-(coffset%512); + }else{ + btr = 512; + } + + if((fat_LogicToDiscCluster(file->fs,&(file->Cache),cclus))!=0){ + file->FileSize+=bytes_written; + dir_setFileSize(file->fs,&(file->Location),file->FileSize); + return(bytes_written); + } + rclus=file->Cache.DiscCluster; + rsec=fs_clusterToSector(file->fs,rclus); + + if(btr==512){ + /*part_writeBuf(file->fs->part,rsec+csec,buf+bytes_written);*/ + part_directSectorWrite(file->fs->part,rsec+csec,buf+bytes_written); + }else{ + /*part_readBuf(file->fs->part,rsec+csec,tbuf);*/ + tbuf = part_getSect(file->fs->part,rsec+csec,IOM_MODE_READWRITE); + memCpy(buf+bytes_written,tbuf+(coffset%512),btr); + /*part_writeBuf(file->fs->part,rsec+csec,tbuf);*/ + part_relSect(file->fs->part,tbuf); + } + + coffset+=btr; + bytes_written+=btr; + size_left-=btr; + } + + if(bytes_written>file->FileSize-offset){ + file->FileSize+=bytes_written-(file->FileSize-offset); + } + + return(bytes_written); +} + +/* ***************************************************************************\ + * signed eint8 file_fopen(FileSystem *fs,File* file,eint8* filename) + * Description: This functions opens a file. + * This function is about to be redesigned. No Docs. + * Return value: +*/ +esint8 file_fopen(File* file,FileSystem *fs,eint8* filename,eint8 mode) +{ + FileLocation loc; + FileRecord wtmp; + eint8 fatfilename[11]; + euint32 sec; + + dir_getFatFileName(filename,fatfilename); + + switch(mode) + { + case MODE_READ: + if(fs_findFile(fs,filename,&loc,0)==1) + { + dir_getFileStructure(fs,&(file->DirEntry), &loc); + file_initFile(file,fs,&loc); + file_setAttr(file,FILE_STATUS_OPEN,1); + file_setAttr(file,FILE_STATUS_WRITE,0); + return(0); + } + return(-1); + break; + case MODE_WRITE: + if(fs_findFile(fs,filename,&loc,&sec)) /* File may NOT exist, but parent HAS to exist */ + { + return(-2); + } + if(sec==0){ /* Parent dir does not exist */ + return(-4); + } + if(fs_findFreeFile(fs,filename,&loc,0)) + { + dir_createDefaultEntry(fs,&wtmp,fatfilename); + dir_createDirectoryEntry(fs,&wtmp,&loc); + memCpy(&wtmp,&(file->DirEntry),sizeof(wtmp)); + file_initFile(file,fs,&loc); + sec=fs_getNextFreeCluster(file->fs,fs_giveFreeClusterHint(file->fs)); + dir_setFirstCluster(file->fs,&(file->Location),sec); + fs_setFirstClusterInDirEntry(&(file->DirEntry),sec); + fs_initClusterChain(fs,&(file->Cache),sec); + fat_setNextClusterAddress(fs,sec,fat_giveEocMarker(fs)); + file_setAttr(file,FILE_STATUS_OPEN,1); + file_setAttr(file,FILE_STATUS_WRITE,1); + return(0); + } + else + { + return(-3); + } + break; + case MODE_APPEND: + if(fs_findFile(fs,filename,&loc,0)==1) /* File exists */ + { + dir_getFileStructure(fs,&(file->DirEntry), &loc); + file_initFile(file,fs,&loc); + if(file->Cache.FirstCluster==0){ + sec=fs_getNextFreeCluster(file->fs,fs_giveFreeClusterHint(file->fs)); + dir_setFirstCluster(file->fs,&(file->Location),sec); + fs_setFirstClusterInDirEntry(&(file->DirEntry),sec); + fat_setNextClusterAddress(fs,sec,fat_giveEocMarker(fs)); + file_initFile(file,fs,&loc); + } + file_setpos(file,file->FileSize); + file_setAttr(file,FILE_STATUS_OPEN,1); + file_setAttr(file,FILE_STATUS_WRITE,1); + } + else /* File does not excist */ + { + if(fs_findFreeFile(fs,filename,&loc,0)) + { + dir_createDefaultEntry(fs,&wtmp,fatfilename); + dir_createDirectoryEntry(fs,&wtmp,&loc); + memCpy(&wtmp,&(file->DirEntry),sizeof(wtmp)); + file_initFile(file,fs,&loc); + sec=fs_getNextFreeCluster(file->fs,fs_giveFreeClusterHint(file->fs)); + dir_setFirstCluster(file->fs,&(file->Location),sec); + fs_setFirstClusterInDirEntry(&(file->DirEntry),sec); + fs_initClusterChain(fs,&(file->Cache),sec); + fat_setNextClusterAddress(fs,sec,fat_giveEocMarker(fs)); + file_setAttr(file,FILE_STATUS_OPEN,1); + file_setAttr(file,FILE_STATUS_WRITE,1); + } + else + { + return(-3); + } + } + return(0); + break; + default: + return(-4); + break; + } + return(-5); +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint8 file_fclose(File *file) + * Description: This function closes a file, by clearing the object. + * Return value: 0 on success. +*/ +esint8 file_fclose(File *file) +{ + if(fs_hasTimeSupport()){ + file->DirEntry.AccessDate = time_getDate(); + if(file_getAttr(file,FILE_STATUS_WRITE)){ + file->DirEntry.FileSize = file->FileSize; + file->DirEntry.WriteDate = file->DirEntry.AccessDate; + file->DirEntry.WriteTime = time_getTime(); + } + dir_updateDirectoryEntry(file->fs,&(file->DirEntry),&(file->Location)); + }else{ + if(file_getAttr(file,FILE_STATUS_WRITE)){ + dir_setFileSize(file->fs,&(file->Location),file->FileSize); + } + } + + memClr(file,sizeof(*file)); + file_setAttr(file,FILE_STATUS_OPEN,0); + file_setAttr(file,FILE_STATUS_WRITE,0); + return(0); +} + + +/* **************************************************************************** + * void file_initFile(File *file, FileSystem *fs, FileLocation *loc) + * Description: This function initialises a new file object, by filling in + * the fs pointer, filesize (note, that DirEntry must already be filled in) + * and known cache parameters. + * Return value: void +*/ +void file_initFile(File *file, FileSystem *fs, FileLocation *loc) +{ + file->fs=fs; + file->FileSize=file->DirEntry.FileSize; + file->FilePtr=0; + file->Location.Sector=loc->Sector; + file->Location.Offset=loc->Offset; + file->Cache.Linear=0; + file->Cache.FirstCluster=(((euint32)file->DirEntry.FirstClusterHigh)<<16)+ + file->DirEntry.FirstClusterLow; + file->Cache.LastCluster=0; + file->Cache.LogicCluster=0; + file->Cache.DiscCluster=file->Cache.FirstCluster; +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint8* file_normalToFatName(eint8* filename,eint8* fatfilename) + * Description: This function converts a human readable filename (limited to + * 8.3 eint8 character) to a valid FAT (not VFAT) filename. Invalid characters are + * changed to capital X and only the first 11 characters are used. + * Furthermore all letters are capitalised. + * Return value: pointer after the filename +*/ +eint8* file_normalToFatName(eint8* filename,eint8* fatfilename) +{ + euint8 c,dot=0,vc=0; + + for(c=0;c<11;c++)fatfilename[c]=' '; + + c=0; + + if(*filename == '.'){ + fatfilename[0]='.'; + vc++; + if(*(filename+1) == '.'){ + fatfilename[1]='.'; + filename+=2; + }else{ + filename++; + } + }else{ + while(*filename != '\0' && *filename != ' ' && *filename != '/'){ + if(*filename=='.' && !dot){ + dot=1; + c=8; + }else{ + if(dot){ + if(c<=10){ + fatfilename[c]=file_validateChar(*filename); + c++; + } + }else{ + if(c<=7){ + fatfilename[c]=file_validateChar(*filename); + c++; vc++; + } + } + } + filename++; + } + } + + if(vc>0){ + if(*filename=='\0'){ + return(filename); + }else{ + return(filename+1); + } + }else{ + return(0); + } +} +/*****************************************************************************/ + +/* **************************************************************************** + * + * Description: This function takes the character c, and if it is not a * + * valid FAT Filename character returns X. If it is a lowercase letter the * + * uppercase equivalent is returned. The remaining characters are returned * + * as they are. + * Return value: The validated char +*/ +euint8 file_validateChar(euint8 c) +{ + if( (c<0x20) || (c>0x20&&c<0x30&&c!='-') || (c>0x39&&c<0x41) || (c>0x5A&&c<0x61&&c!='_') || (c>0x7A&&c!='~') ) + return(0x58); + if( c>=0x61 && c<=0x7A ) + return(c-32); + + return(c); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void ioman_setAttr(IOManager *ioman,euint16 bufplace,euint8 attribute,euint8 val) + * Description: This sets the attribute of 'bufplace' to the given value (binary). + * + * Return value: void +*/ +void file_setAttr(File* file,euint8 attribute,euint8 val) +{ + if(val){ + file->FileStatus|=1<FileStatus&=~(1<FileStatus&(1<file->FileSize){ + if(file->Cache.ClusterCount==0){ /* Number of cluster unknown */ + hc = fat_countClustersInChain(file->fs,file->Cache.FirstCluster); + file->Cache.ClusterCount = hc; + }else{ + hc = file->Cache.ClusterCount; /* This better be right */ + } + clustersize = file->fs->volumeId.BytesPerSector * file->fs->volumeId.SectorsPerCluster; + if((size-file->FileSize+offset)> + ((hc-((file->FileSize+clustersize-1)/clustersize))*clustersize)){ + clusters_required = (((offset+size)-(hc*clustersize))+clustersize-1)/clustersize; + }else{ + clusters_required = 0; + } + }else{ + clusters_required = 0; + } + return(clusters_required); +} diff --git a/src/ersky9x/libraries/fat/efsl/src/fs.c b/src/ersky9x/libraries/fat/efsl/src/fs.c new file mode 100644 index 000000000..107c476d2 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/fs.c @@ -0,0 +1,524 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : fs.c * +* Description : These are general filesystem functions, supported by the * +* functions of dir.c and fat.c file.c uses these functions * +* heavily, but is not used by fs.c (not true anymore) * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "fs.h" +#include "fat.h" +#include "dir.h" +/*****************************************************************************/ + +/* **************************************************************************** + * eint16 fs_initFs(FileSystem *fs,Partition *part) + * Description: This functions glues the initialisation of the filesystem together. + * It loads the volumeID, computes the FS type and searches for the rootsector. + * Return value: Returns 0 on succes and -1 on error (if magic code is wrong) +*/ +eint16 fs_initFs(FileSystem *fs,Partition *part) +{ + if(!fs_isValidFat(part)){ + return(-1); + } + fs->part=part; + fs_loadVolumeId(fs,part); + if(!fs_verifySanity(fs))return(-2); + fs_countDataSectors(fs); + fs_determineFatType(fs); + fs_findFirstSectorRootDir(fs); + fs_initCurrentDir(fs); + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * eint16 fs_isValidFat(Partition *part) + * Description: This functions loads the volumeID and checks if the magic + * value is present. + * Return value: returns 0 when magic code is missing, 1 if it is there. +*/ +eint16 fs_isValidFat(Partition *part) +{ + euint8 *buf; + + buf=part_getSect(part,0,IOM_MODE_READONLY|IOM_MODE_EXP_REQ); /* Load Volume label */ + if( ex_getb16(buf,0x1FE) != 0xAA55 ){ + return (0); + } + part_relSect(part,buf); + return(1); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void fs_loadVolumeId(FileSystem *fs, Partition *part) + * Description: This function loads all relevant fields from the volumeid. +*/ +void fs_loadVolumeId(FileSystem *fs, Partition *part) +{ + euint8 *buf; + + buf=part_getSect(part,0,IOM_MODE_READONLY|IOM_MODE_EXP_REQ); + + fs->volumeId.BytesPerSector=ex_getb16(buf,0x0B); + fs->volumeId.SectorsPerCluster=*((eint8*)(buf+0x0D)); + fs->volumeId.ReservedSectorCount=ex_getb16(buf,0x0E); + fs->volumeId.NumberOfFats=*((eint8*)(buf+0x10)); + fs->volumeId.RootEntryCount=ex_getb16(buf,0x11); + fs->volumeId.SectorCount16=ex_getb16(buf,0x13); + fs->volumeId.FatSectorCount16=ex_getb16(buf,0x16); + fs->volumeId.SectorCount32=ex_getb32(buf,0x20); + fs->volumeId.FatSectorCount32=ex_getb32(buf,0x24); + fs->volumeId.RootCluster=ex_getb32(buf,0x2C); + + part_relSect(part,buf); + +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint16 fs_verifySanity(FileSystem *fs) + * Description: Does some sanity calculations. + * Return value: 1 on success, 0 when discrepancies were found. +*/ +esint16 fs_verifySanity(FileSystem *fs) +{ + esint16 sane=1; /* Sane until proven otherwise */ + /* First check, BPS, we only support 512 */ + if(fs->volumeId.BytesPerSector!=512)sane=0; + /* Check is SPC is valid (multiple of 2, and clustersize >=32KB */ + if(!((fs->volumeId.SectorsPerCluster == 1 ) | + (fs->volumeId.SectorsPerCluster == 2 ) | + (fs->volumeId.SectorsPerCluster == 4 ) | + (fs->volumeId.SectorsPerCluster == 8 ) | + (fs->volumeId.SectorsPerCluster == 16) | + (fs->volumeId.SectorsPerCluster == 32) | + (fs->volumeId.SectorsPerCluster == 64) ))sane=0; + /* Any number of FAT's should be supported... (untested) */ + /* There should be at least 1 reserved sector */ + if(fs->volumeId.ReservedSectorCount==0)sane=0; + if(fs->volumeId.FatSectorCount16 != 0){ + if(fs->volumeId.FatSectorCount16 > fs->part->disc->partitions[fs->part->activePartition].numSectors)sane=0; + }else{ + if(fs->volumeId.FatSectorCount32 > fs->part->disc->partitions[fs->part->activePartition].numSectors)sane=0; + } + return(sane); +} +/*****************************************************************************/ + +/* **************************************************************************** + * void fs_countDataSectors(FileSystem *fs) + * Description: This functions calculates the sectorcounts, fatsectorcounts and + * dataclustercounts. It fills in the general fields. +*/ +void fs_countDataSectors(FileSystem *fs) +{ + euint32 rootDirSectors,dataSectorCount; + + rootDirSectors=((fs->volumeId.RootEntryCount*32) + + (fs->volumeId.BytesPerSector - 1)) / + fs->volumeId.BytesPerSector; + + if(fs->volumeId.FatSectorCount16 != 0) + { + fs->FatSectorCount=fs->volumeId.FatSectorCount16; + fs->volumeId.FatSectorCount32=0; + } + else + { + fs->FatSectorCount=fs->volumeId.FatSectorCount32; + fs->volumeId.FatSectorCount16=0; + } + + if(fs->volumeId.SectorCount16!=0) + { + fs->SectorCount=fs->volumeId.SectorCount16; + fs->volumeId.SectorCount32=0; + } + else + { + fs->SectorCount=fs->volumeId.SectorCount32; + fs->volumeId.SectorCount16=0; + } + + dataSectorCount=fs->SectorCount - ( + fs->volumeId.ReservedSectorCount + + (fs->volumeId.NumberOfFats * fs->FatSectorCount) + + rootDirSectors); + + fs->DataClusterCount=dataSectorCount/fs->volumeId.SectorsPerCluster; +} +/*****************************************************************************/ + +/* **************************************************************************** + * void fs_determineFatType(FileSystem *fs) + * Description: This function looks af the Dataclustercount and determines the + * FAT type. It fills in fs->type. +*/ +void fs_determineFatType(FileSystem *fs) +{ + if(fs->DataClusterCount < 4085) + { + fs->type=FAT12; + fs->volumeId.RootCluster=0; + } + else if(fs->DataClusterCount < 65525) + { + fs->type=FAT16; + fs->volumeId.RootCluster=0; + } + else + { + fs->type=FAT32; + } +} +/*****************************************************************************/ + +/* **************************************************************************** + * void fs_findFirstSectorRootDir(FileSystem *fs) + * Description: This functions fills in the fs->FirstSectorRootDir field, even + * for FAT32, although that is not necessary (because you have FirstClusterRootDir). +*/ +void fs_findFirstSectorRootDir(FileSystem *fs) +{ + if(fs->type==FAT32) + fs->FirstSectorRootDir = fs->volumeId.ReservedSectorCount + + (fs->volumeId.NumberOfFats*fs->volumeId.FatSectorCount32) + + (fs->volumeId.RootCluster-2)*fs->volumeId.SectorsPerCluster; + else + fs->FirstSectorRootDir = fs->volumeId.ReservedSectorCount + + (fs->volumeId.NumberOfFats*fs->volumeId.FatSectorCount16); +} +/*****************************************************************************/ + +void fs_initCurrentDir(FileSystem *fs) +{ + fs->FirstClusterCurrentDir = fs_getFirstClusterRootDir(fs); +} +/*****************************************************************************/ + +/* **************************************************************************** + * long fs_clusterToSector(FileSystem *fs,euint32 cluster) + * Description: This function converts a clusternumber in the effective sector + * number where this cluster starts. Boundary check is not implemented + * Return value: A long is returned representing the sectornumber. +*/ +euint32 fs_clusterToSector(FileSystem *fs,euint32 cluster) +{ + eint32 base; + + if(fs->type==FAT32) + { + base= + fs->volumeId.ReservedSectorCount+ + fs->FatSectorCount*fs->volumeId.NumberOfFats; + } + else + { + base= + fs->volumeId.ReservedSectorCount+ + fs->FatSectorCount*fs->volumeId.NumberOfFats+ + fs->volumeId.RootEntryCount/16; + } + return( base + (cluster-2)*fs->volumeId.SectorsPerCluster ); +} +/*****************************************************************************/ + +/* Function is unused, but may be usefull */ +euint32 fs_sectorToCluster(FileSystem *fs,euint32 sector) +{ + eint32 base; + + if(fs->type==FAT32) + { + base= + fs->volumeId.ReservedSectorCount+ + fs->FatSectorCount*fs->volumeId.NumberOfFats; + } + else + { + base= + fs->volumeId.ReservedSectorCount+ + fs->FatSectorCount*fs->volumeId.NumberOfFats+ + fs->volumeId.RootEntryCount/16; + } + return(((sector-base)-((sector-base)%fs->volumeId.SectorsPerCluster))/fs->volumeId.SectorsPerCluster+2 ); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 fs_getNextFreeCluster(FileSystem *fs,euint32 startingcluster) + * Description: This functions searches for a free cluster, starting it's search at + * cluster startingcluster. This allow to speed up searches and try to avoid + * fragmentation. Implementing rollover search is still to be done. + * Return value: If a free cluster is found it's number is returned. If none is + * found 0 is returned. +*/ +euint32 fs_getNextFreeCluster(FileSystem *fs,euint32 startingcluster) +{ + euint32 r; + + while(startingclusterDataClusterCount){ + r=fat_getNextClusterAddress(fs,startingcluster,0); + if(r==0){ + return(startingcluster); + } + startingcluster++; + } + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 fs_giveFreeClusterHint(FileSystem *fs) + * + * Description: This function should return a clusternumber that is free or + * lies close before free clusters. The result MUST be checked to see if + * it is free! Implementationhint: search the largest clusternumber in the + * files in the rootdirectory. + * + * Return value: Returns it's best guess. +*/ +euint32 fs_giveFreeClusterHint(FileSystem *fs) +{ + return(2); /* Now THIS is a hint ;) */ +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint8 fs_findFile(FileSystem *fs,eint8* filename,FileLocation *loc,euint32 *lastDir) + * + * Description: This function looks if the given filename is on the given fs + * and, if found, fills in its location in loc. + * The function will first check if the pathname starts with a slash. If so it will + * set the starting directory to the rootdirectory. Else, it will take the firstcluster- + * currentdir (That you can change with chdir()) as startingpoint. + * The lastdir pointer will be the first cluster of the last directory fs_findfile + * enters. It starts out at the root/current dir and then traverses the path along with + * fs_findFile. + * It is set to 0 in case of errors (like dir/dir/dir/file/dir/dir...) + * Return value: Returns 0 when nothing was found, 1 when the thing found + * was a file and 2 if the thing found was a directory. +*/ + +esint8 fs_findFile(FileSystem *fs,eint8* filename,FileLocation *loc,euint32 *lastDir) +{ + euint32 fccd,tmpclus; + eint8 ffname[11],*next,it=0,filefound=0; + + if(*filename=='/'){ + fccd = fs_getFirstClusterRootDir(fs); + filename++; + if(lastDir)*lastDir=fccd; + if(!*filename){ + return(2); + } + }else{ + fccd = fs->FirstClusterCurrentDir; + if(lastDir)*lastDir=fccd; + } + + + while((next=file_normalToFatName(filename,ffname))!=0){ + + if((tmpclus=dir_findinDir(fs,ffname,fccd,loc,DIRFIND_FILE))==0){ + /* We didn't find what we wanted */ + /* We should check, to see if there is more after it, so that + * we can invalidate lastDir + */ + if((file_normalToFatName(next,ffname))!=0){ + if(lastDir)*lastDir=0; + } + return(0); + } + it++; + if(loc->attrib&ATTR_DIRECTORY){ + fccd = tmpclus; + filename = next; + if(lastDir)*lastDir=fccd; + if(filefound)*lastDir=0; + }else{ + filefound=1; + if((file_normalToFatName(next,ffname))!=0){ + if(lastDir)*lastDir=0; + return(0); + }else{ + filename=next; + } + } + } + + if(it==0)return(0); + if(loc->attrib&ATTR_DIRECTORY || !filefound)return(2); + return(1); +} +/*****************************************************************************/ + +esint16 fs_findFreeFile(FileSystem *fs,eint8* filename,FileLocation *loc,euint8 mode) +{ + euint32 targetdir=0; + eint8 ffname[11]; + + if(fs_findFile(fs,filename,loc,&targetdir))return(0); + if(!dir_getFatFileName(filename,ffname))return(0); + if(dir_findinDir(fs,ffname,targetdir,loc,DIRFIND_FREE)){ + return(1); + }else{ + if(dir_addCluster(fs,targetdir)){ + return(0); + }else{ + if(dir_findinDir(fs,ffname,targetdir,loc,DIRFIND_FREE)){ + return(1); + } + } + } + + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint32 fs_getLastCluster(FileSystem *fs,ClusterChain *Cache) + * Description: This function searches the last cluster of a chain. + * Return value: The LastCluster (also stored in cache); +*/ +euint32 fs_getLastCluster(FileSystem *fs,ClusterChain *Cache) +{ + if(Cache->DiscCluster==0){ + Cache->DiscCluster=Cache->FirstCluster; + Cache->LogicCluster=0; + } + + if(Cache->LastCluster==0) + { + while(fat_getNextClusterChain(fs, Cache)==0) + { + Cache->LogicCluster+=Cache->Linear; + Cache->DiscCluster+=Cache->Linear; + Cache->Linear=0; + } + } + return(Cache->LastCluster); +} +/*****************************************************************************/ + +euint32 fs_getFirstClusterRootDir(FileSystem *fs) +{ + switch(fs->type){ + case FAT32: + return(fs->volumeId.RootCluster); + break; + default: + return(1); + break; + } +} +/*****************************************************************************/ + +void fs_initClusterChain(FileSystem *fs,ClusterChain *cache,euint32 cluster_addr) +{ + cache->FirstCluster=cluster_addr; + cache->DiscCluster=cluster_addr; + cache->LogicCluster=0; + cache->LastCluster=0; /* Warning flag here */ + cache->Linear=0; + cache->ClusterCount=0; /* 0 means NOT known */ +} +/*****************************************************************************/ + +void fs_setFirstClusterInDirEntry(FileRecord *rec,euint32 cluster_addr) +{ + rec->FirstClusterHigh=cluster_addr>>16; + rec->FirstClusterLow=cluster_addr&0xFFFF; +} +/*****************************************************************************/ + +esint8 fs_flushFs(FileSystem *fs) +{ + return(part_flushPart(fs->part,0,fs->SectorCount)); +} +/*****************************************************************************/ + +esint8 fs_umount(FileSystem *fs) +{ + return(fs_flushFs(fs)); +} +/*****************************************************************************/ + +esint8 fs_clearCluster(FileSystem *fs,euint32 cluster) +{ + euint16 c; + euint8* buf; + + for(c=0;c<(fs->volumeId.SectorsPerCluster);c++){ + buf = part_getSect(fs->part,fs_clusterToSector(fs,cluster)+c,IOM_MODE_READWRITE); + memClr(buf,512); + part_relSect(fs->part,buf); + } + return(0); +} + +esint8 fs_getFsInfo(FileSystem *fs,euint8 force_update) +{ + euint8 *buf; + + if(!fs->type==FAT32)return(0); + buf = part_getSect(fs->part,FS_INFO_SECTOR,IOM_MODE_READONLY); + if(ex_getb32(buf,0)!=FSINFO_MAGIC_BEGIN || ex_getb32(buf,508)!=FSINFO_MAGIC_END){ + part_relSect(fs->part,buf); + return(-1); + } + fs->FreeClusterCount = ex_getb32(buf,488); + fs->NextFreeCluster = ex_getb32(buf,492); + part_relSect(fs->part,buf); + if(force_update){ + fs->FreeClusterCount=fat_countFreeClusters(fs); + } + return(0); +} + +esint8 fs_setFsInfo(FileSystem *fs) +{ + euint8* buf; + + if(!fs->type==FAT32)return(0); + buf = part_getSect(fs->part,FS_INFO_SECTOR,IOM_MODE_READWRITE); + if(ex_getb32(buf,0)!=FSINFO_MAGIC_BEGIN || ex_getb32(buf,508)!=FSINFO_MAGIC_END){ + part_relSect(fs->part,buf); + return(-1); + } + ex_setb32(buf,488,fs->FreeClusterCount); + ex_setb32(buf,492,fs->NextFreeCluster); + part_relSect(fs->part,buf); + return(0); +} + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam7s_sdram.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam7s_sdram.c new file mode 100644 index 000000000..3a3117e55 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam7s_sdram.c @@ -0,0 +1,173 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : at91sam7s_spi.c * +* Description : This file contains the functions needed to use efs for * +* accessing files on an SD-card connected to an At91SAM7S. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* AT91SAM7S ARM7 Interface (c)2007 Stanimir Bonev * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "at91sam7s_spi.h" +#include +#include +#include +#include +#include +#if defined(BOARD_SDRAM_SIZE) +#include +#include +#include +#elif defined(BOARD_PSRAM_SIZE) +#include +#endif +#include +#include + + +/// Maximum number of LUNs which can be defined. +#define MAX_LUNS 1 + +#define SECTOR_SIZE_SDRAM 512 + +#if defined(sdram) || defined(ddram) || defined(psram) +// The code is launch in external ram +#define CODE_SIZE 30*1024 +#else +// Entire sdram is reserved for the FAT +#define CODE_SIZE 0 +#endif + +//------------------------------------------------------------------------------ +// Internal variables +//------------------------------------------------------------------------------ + +/// Available medias. +extern Media medias[MAX_LUNS]; +extern unsigned int numMedias; + +//------------------------------------------------------------------------------ +// Internal functions +//------------------------------------------------------------------------------ + +static void translate_media(Media *pMedia, + euint32 address, + euint32 *pAddr, euint32 *pLen) +{ + eint32 addr, len; + + if (pMedia->blockSize >= SECTOR_SIZE_SDRAM) { + addr = address / (pMedia->blockSize / SECTOR_SIZE_SDRAM); + len = 1; + } + else { + addr = address * (SECTOR_SIZE_SDRAM / pMedia->blockSize); + len = SECTOR_SIZE_SDRAM / pMedia->blockSize; + } + if (pAddr) *pAddr = addr; + if (pLen) *pLen = len; +} + +/*****************************************************************************/ + +esint8 if_initInterface(hwInterface* file, eint8* opts) +{ + unsigned int value; + +#if defined(AT91C_BASE_DDR2C) + MEDDdram_Initialize(&(medias[numMedias]), + SECTOR_SIZE_SDRAM, + (unsigned int) (AT91C_DDR2 + CODE_SIZE)/SECTOR_SIZE_SDRAM, + BOARD_DDRAM_SIZE/SECTOR_SIZE_SDRAM ); + file->sectorCount = (BOARD_DDRAM_SIZE)/SECTOR_SIZE_SDRAM; +#elif defined(BOARD_SDRAM_SIZE) + MEDSdram_Initialize(&(medias[numMedias]), + SECTOR_SIZE_SDRAM, + (unsigned int) (AT91C_EBI_SDRAM + CODE_SIZE)/SECTOR_SIZE_SDRAM, + (BOARD_SDRAM_SIZE-CODE_SIZE)/SECTOR_SIZE_SDRAM); + file->sectorCount = (BOARD_SDRAM_SIZE-CODE_SIZE)/SECTOR_SIZE_SDRAM; +#elif defined (BOARD_PSRAM_SIZE) + BOARD_ConfigurePsram(); + MEDRamDisk_Initialize(&(medias[numMedias]), + SECTOR_SIZE_SDRAM, + (unsigned int)(BOARD_EBI_PSRAM + CODE_SIZE) / SECTOR_SIZE_SDRAM, + (BOARD_PSRAM_SIZE-CODE_SIZE) / SECTOR_SIZE_SDRAM); + file->sectorCount = (BOARD_PSRAM_SIZE-CODE_SIZE)/SECTOR_SIZE_SDRAM; +#else + #error NO SDRAM or DDR or PSRAM DRIVE +#endif + + return(0); +} +/*****************************************************************************/ + +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf) +{ + unsigned int result; + euint32 addr, len; + + translate_media(&medias[numMedias], address, &addr, &len); + result = MED_Read(&medias[numMedias], + addr, + (void*)buf, + len, + NULL, + NULL); + + + if( result != MED_STATUS_SUCCESS ) { + TRACE_INFO("MED_Read pb: 0x%X\n\r", result); + } + return(0); +} +/*****************************************************************************/ + +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf) +{ + unsigned int result; + euint32 addr, len; + + translate_media(&medias[numMedias], address, &addr, &len); + result = MED_Write(&medias[numMedias], + addr, + (void*)buf, + len, + NULL, + NULL); + + if( result != MED_STATUS_SUCCESS ) { + TRACE_INFO("MED_WRITE pb: 0x%X\n\r", result); + } + return(0); +} +/*****************************************************************************/ + +esint8 if_setPos(hwInterface* file,euint32 address) +{ + return(0); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam7s_spi.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam7s_spi.c new file mode 100644 index 000000000..3d8e535c5 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam7s_spi.c @@ -0,0 +1,84 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : at91sam7s_spi.c * +* Description : This file contains the functions needed to use efs for * +* accessing files on an SD-card connected to an At91SAM7S. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* AT91SAM7S ARM7 Interface (c)2007 Stanimir Bonev * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "at91sam7s_spi.h" +#include "mmc.h" + +/*****************************************************************************/ + +esint8 if_initInterface(hwInterface* file, eint8* opts) +{ +pDiskCtrlBlk_t pStatus; + MmcStatusUpdate(); + pStatus = MmcDiskStatus(); + switch(pStatus->DiskStatus) + { + case DiskCommandPass: + file->sectorCount = pStatus->BlockNumb; + return(0); + case DiskNotPresent: + return(-1); + case DiskNotReady: + return(-2); + } + // Unknown error + return(-3); +} +/*****************************************************************************/ + +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf) +{ + if(MmcDiskIO(buf,address,1,DiskRead) == DiskCommandPass) + { + return(0); + } + return(-1); +} +/*****************************************************************************/ + +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf) +{ + if(MmcDiskIO(buf,address,1,DiskWrite) == DiskCommandPass) + { + return(0); + } + return(-1); +} +/*****************************************************************************/ + +esint8 if_setPos(hwInterface* file,euint32 address) +{ + return(0); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam_media.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam_media.c new file mode 100644 index 000000000..be6b4255e --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/at91sam_media.c @@ -0,0 +1,140 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : at91sam_ramdisk.c * +* Description : This file contains the functions needed to use efs for * +* accessing files on an SD-card connected to an At91SAM. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* AT91SAM7S ARM7 Interface (c)2007 Stanimir Bonev * +\*****************************************************************************/ + +/*****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include "at91sam_media.h" + +#define SECTOR_SIZE_DISK 512 + +//------------------------------------------------------------------------------ +// Internal variables +//------------------------------------------------------------------------------ +//------------------------------------------------------------------------------ +// Internal functions +//------------------------------------------------------------------------------ + +static void translate_media(Media *pMedia, + euint32 address, + euint32 *pAddr, euint32 *pLen) +{ + eint32 addr, len; + + if (pMedia->blockSize >= SECTOR_SIZE_DISK) { + addr = address / (pMedia->blockSize / SECTOR_SIZE_DISK); + len = 1; + } + else { + addr = address * (SECTOR_SIZE_DISK / pMedia->blockSize); + len = SECTOR_SIZE_DISK / pMedia->blockSize; + } + if (pAddr) *pAddr = addr; + if (pLen) *pLen = len; +} + +/*****************************************************************************/ + +esint8 if_initInterface(hwInterface* file, eint8* opts) +{ + unsigned int value; + + file->pMedia = (Media *)opts; + + if(file->pMedia->blockSize > SECTOR_SIZE_DISK) { + TRACE_FATAL("EFSL sector size < %d!\n\r", SECTOR_SIZE_DISK); + return -1; + } + + if (file->pMedia->blockSize >= SECTOR_SIZE_DISK) + file->sectorCount = file->pMedia->size + * (file->pMedia->blockSize / SECTOR_SIZE_DISK); + else + file->sectorCount = file->pMedia->size + / (SECTOR_SIZE_DISK / file->pMedia->blockSize); + + return(0); +} +/*****************************************************************************/ + +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf) +{ + unsigned int result; + euint32 addr, len; + + translate_media(file->pMedia, address, &addr, &len); + result = MED_Read(file->pMedia, + addr, + (void*)buf, + len, + NULL, + NULL); + + if( result != MED_STATUS_SUCCESS ) { + TRACE_INFO("MED_Read pb: 0x%X\n\r", result); + } + return(0); +} +/*****************************************************************************/ + +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf) +{ + unsigned int result; + euint32 addr, len; + + translate_media(file->pMedia, address, &addr, &len); + result = MED_Write(file->pMedia, + addr, + (void*)buf, + len, + NULL, + NULL); + + if( result != MED_STATUS_SUCCESS ) { + TRACE_INFO("MED_WRITE pb: 0x%X\n\r", result); + } + return(0); +} +/*****************************************************************************/ + +esint8 if_setPos(hwInterface* file,euint32 address) +{ + return(0); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/atmega128.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/atmega128.c new file mode 100644 index 000000000..f43ce9d68 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/atmega128.c @@ -0,0 +1,110 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : atmega128.c * +* Description : This file contains the functions needed to use efs for * +* accessing files on an SD-card connected to an ATMega128. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "interfaces/atmega128.h" +#include "interfaces/sd.h" +/*****************************************************************************/ + +esint8 if_initInterface(hwInterface* file, eint8* opts) +{ + if_spiInit(file); + if(sd_Init(file)<0) { + DBG((TXT("Card failed to init, breaking up...\n"))); + return(-1); + } + if(sd_State(file)<0){ + DBG((TXT("Card didn't return the ready state, breaking up...\n"))); + return(-2); + } + file->sectorCount=4; /* FIXME ASAP!! */ + DBG((TXT("Init done...\n"))); + return(0); +} +/*****************************************************************************/ + +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf) +{ + return(sd_readSector(file,address,buf,512)); +} +/*****************************************************************************/ + +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf) +{ + return(sd_writeSector(file,address, buf)); +} +/*****************************************************************************/ + +esint8 if_setPos(hwInterface* file,euint32 address) +{ + return(0); +} +/*****************************************************************************/ + +void if_spiInit(hwInterface *iface) +{ + euint8 i; + + /* Unselect card */ + PORTB |= 0x01; + + /* Set as master, clock and chip select output */ + DDR_SPI = (1< +/*****************************************************************************/ + +short if_initInterface(hwInterface* file, char* opts) +{ + file->sectorCount=0; + return(if_spiInit(file)); +} +/*****************************************************************************/ + +short if_writeBuf(hwInterface* file,unsigned long address,unsigned char* buf) +{ + return(0); +} +/*****************************************************************************/ + +short if_setPos(hwInterface* file,unsigned long address) +{ + return(0); +} +/*****************************************************************************/ + +signed char if_spiInit(hwInterface *iface) +{ + return(sd_Init(iface)); +} +/*****************************************************************************/ + +unsigned char if_spiSend(hwInterface *iface, euint8 outgoing) +{ + unsigned char r; + +/* while((*(unsigned volatile long*)McBSP0_SPCR & 0x20000)==0); + *(unsigned volatile char*)McBSP0_DXR=outgoing; + while(((*(unsigned volatile long*)McBSP0_SPCR & 0x2)==0)); + r=*(unsigned volatile char*)McBSP0_DRR; */ + + while(!MCBSP_xrdy(iface->port->hBsp)); + MCBSP_write(iface->port->hBsp,outgoing); + while(!MCBSP_rrdy(iface->port->hBsp)); + r=MCBSP_read(iface->port->hBsp); + + return(r); +} +/*****************************************************************************/ + +short if_readBuf(hwInterface* file,euint32 address,unsigned char* buf) +{ + short r; + r=sd_readSector(file,address,buf,512); + if(r!=0)printf("ERROR READING SECTOR %i\n",address); + return(r); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/helper.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/helper.c new file mode 100644 index 000000000..67e30eb95 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/helper.c @@ -0,0 +1,94 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : helper.c * +* Description : These functions may NOT BE USED ANYWHERE ! They are helper * +* functions for the Linux based developement. They use the GNU * +* C library and headers. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +#include "interfaces/helper.h" + +void* Malloc(eint32 size) +{ + void*x; + + if((x=malloc(size))==NULL){ + perror("Malloc: "); + exit(-1); + } + return(x); +} + +void Fopen(FILE **f,eint8* filename) +{ + *f=fopen(filename,"r+"); + if(*f==NULL){ + perror("Fopen: "); + exit(-1); + } +} + +void MMap(eint8* filename,void**x,eint32 *size) +{ + FILE *tmp; + eint32 filesize,c; + + Fopen(&tmp,filename); + filesize=getFileSize(tmp); + *x=Malloc(filesize); + for(c=0;c=32?buf[c*16+cc]:'*'); + } + } + printf("\n"); +} diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/linuxfile.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/linuxfile.c new file mode 100644 index 000000000..3060c0385 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/linuxfile.c @@ -0,0 +1,112 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : linuxfile.c * +* Description : This file contains the functions needed to use efs for * +* accessing files under linux. This interface is meant * +* to be used for debugging purposes. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ +/*****************************************************************************/ +#include "interfaces/linuxfile.h" +/*****************************************************************************/ + +/* **************************************************************************** + * short if_initInterface(hwInterface* file, char* fileName) + * Description: This function should bring the hardware described in file in a + * ready state to receive and retrieve data. + * Return value: Return 0 on succes and -1 on failure. +*/ +esint8 if_initInterface(hwInterface* file, eint8* fileName) +{ + eint32 sc; + Fopen(&(file->imageFile),fileName); + sc=getFileSize(file->imageFile); + file->sectorCount=sc/512; + file->readCount=file->writeCount=0; + if(sc%512!=0) + file->sectorCount--; + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * short if_readBuf(hwInterface* file,unsigned long address,unsigned char* buf) + * Description: This function should fill the characterpointer buf with 512 + * bytes, offset by address*512 bytes. Adress is thus a LBA address. + * Return value: Return 0 on success and -1 on failure. +*/ +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf) +{ + /*printf("READ %li\n",address);*/ + if(if_setPos(file,address))return(-1); + if( fread((void*)buf,512,1,file->imageFile) != 1) return(-1); + file->readCount++; + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * short if_writeBuf(hwInterface* file,unsigned long address,unsigned char* buf) + * Description: This function writes 512 bytes from uchar* buf to the hardware + * disc described in file. The write offset should be address sectors of 512 bytes. + * Return value: Return 0 on success and -1 on failure. +*/ +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf) +{ + /*printf("WRITE %li\n",address);*/ + if_setPos(file,address); + if((fwrite((void*)buf,512,1,file->imageFile))!=1){ + perror("cf_writeBuf:"); + exit(-1); + } + fflush(file->imageFile); + file->writeCount++; + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * short if_setPos(hwInterface* file,unsigned long address) + * Description: This function may or may not be required. It would set the write + * or read buffer offset by 512*address bytes from the beginning of the disc. + * Return value: Return 0 on success and -1 on failure. +*/ +esint8 if_setPos(hwInterface* file,euint32 address) +{ + if(address>(file->sectorCount-1)){ + DBG((TXT("Illegal address\n"))); + exit(-1); + } + if((fseek(file->imageFile,512*address,SEEK_SET))!=0){ + perror("cf_setPos:"); + exit(-1); + } + return(0); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/lpc2000_dbg_printf.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/lpc2000_dbg_printf.c new file mode 100644 index 000000000..ae5b668e8 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/lpc2000_dbg_printf.c @@ -0,0 +1,243 @@ +//######################################################################### +// printf.c +// +// *** printf() based on sprintf() from gcctest9.c Volker Oth +// +// *** Changes made by Holger Klabunde +// Now takes format strings from FLASH (was into RAM ! before) +// Fixed bug for %i, %I. u_val was used before it had the right value +// Added %d, %D (is same as %i, %I) +// Support for long variables %li, %ld, %Lu, %LX .... +// %x, %X now gives upper case hex characters A,B,C,D,E,F +// Output can be redirected in a single function: myputchar() +// Make printf() smaller by commenting out a few #defines +// Added some SPACE and ZERO padding %02x or % 3u up to 9 characters +// +// Todo: +// %f, %F for floating point numbers +// +// *** Changes made by Martin Thomas for the efsl debug output: +// - removed AVR "progmem" +// - added function pointer for "putchar" +// - devopen function +// +//######################################################################### + +#include +#include +#include "interfaces/lpc2000_dbg_printf.h" + +#define SCRATCH 12 //32Bits go up to 4GB + 1 Byte for \0 + +//Spare some program space by making a comment of all not used format flag lines +#define USE_LONG // %lx, %Lu and so on, else only 16 bit integer is allowed +//#define USE_OCTAL // %o, %O Octal output. Who needs this ? +#define USE_STRING // %s, %S Strings as parameters +#define USE_CHAR // %c, %C Chars as parameters +#define USE_INTEGER // %i, %I Remove this format flag. %d, %D does the same +#define USE_HEX // %x, %X Hexadezimal output +#define USE_UPPERHEX // %x, %X outputs A,B,C... else a,b,c... +#ifndef USE_HEX + #undef USE_UPPERHEX // ;) +#endif +#define USE_UPPER // uncommenting this removes %C,%D,%I,%O,%S,%U,%X and %L.. + // only lowercase format flags are used +#define PADDING //SPACE and ZERO padding + + +static int (*putcharfunc)(int c); + +void lpc2000_debug_devopen( int(*put)(int) ) +{ + putcharfunc = put; +} + +static void myputchar(unsigned char c) +{ + if(c == '\n') putcharfunc('\r'); + putcharfunc(c); +} + +void lpc2000_debug_printf(char const *format, ...) +{ + unsigned char scratch[SCRATCH]; + unsigned char format_flag; + unsigned short base; + unsigned char *ptr; + unsigned char issigned=0; + va_list ap; + +#ifdef USE_LONG + unsigned char islong=0; + unsigned long u_val=0; + long s_val=0; +#else + unsigned int u_val=0; + int s_val=0; +#endif + + unsigned char fill; + unsigned char width; + + va_start (ap, format); + for (;;){ + while ((format_flag = *(format++)) != '%'){ // Until '%' or '\0' + if (!format_flag){va_end (ap); return;} + myputchar(format_flag); + } + + issigned=0; //default unsigned + base = 10; + + format_flag = *format++; //get char after '%' + +#ifdef PADDING + width=0; //no formatting + fill=0; //no formatting + if(format_flag=='0' || format_flag==' ') //SPACE or ZERO padding ? + { + fill=format_flag; + format_flag = *format++; //get char after padding char + if(format_flag>='0' && format_flag<='9') + { + width=format_flag-'0'; + format_flag = *format++; //get char after width char + } + } +#endif + +#ifdef USE_LONG + islong=0; //default int value +#ifdef USE_UPPER + if(format_flag=='l' || format_flag=='L') //Long value +#else + if(format_flag=='l') //Long value +#endif + { + islong=1; + format_flag = *format++; //get char after 'l' or 'L' + } +#endif + + switch (format_flag) + { +#ifdef USE_CHAR + case 'c': +#ifdef USE_UPPER + case 'C': +#endif + format_flag = va_arg(ap,int); + // no break -> run into default +#endif + + default: + myputchar(format_flag); + continue; + +#ifdef USE_STRING +#ifdef USE_UPPER + case 'S': +#endif + case 's': + ptr = (unsigned char*)va_arg(ap,char *); + while(*ptr) { myputchar(*ptr); ptr++; } + continue; +#endif + +#ifdef USE_OCTAL + case 'o': +#ifdef USE_UPPER + case 'O': +#endif + base = 8; + myputchar('0'); + goto CONVERSION_LOOP; +#endif + +#ifdef USE_INTEGER //don't use %i, is same as %d + case 'i': +#ifdef USE_UPPER + case 'I': +#endif +#endif + case 'd': +#ifdef USE_UPPER + case 'D': +#endif + issigned=1; + // no break -> run into next case + case 'u': +#ifdef USE_UPPER + case 'U': +#endif + +//don't insert some case below this if USE_HEX is undefined ! +//or put goto CONVERSION_LOOP; before next case. +#ifdef USE_HEX + goto CONVERSION_LOOP; + case 'x': +#ifdef USE_UPPER + case 'X': +#endif + base = 16; +#endif + + CONVERSION_LOOP: + + if(issigned) //Signed types + { +#ifdef USE_LONG + if(islong) { s_val = va_arg(ap,long); } + else { s_val = va_arg(ap,int); } +#else + s_val = va_arg(ap,int); +#endif + + if(s_val < 0) //Value negativ ? + { + s_val = - s_val; //Make it positiv + myputchar('-'); //Output sign + } + + u_val = (unsigned long)s_val; + } + else //Unsigned types + { +#ifdef USE_LONG + if(islong) { u_val = va_arg(ap,unsigned long); } + else { u_val = va_arg(ap,unsigned int); } +#else + u_val = va_arg(ap,unsigned int); +#endif + } + + ptr = scratch + SCRATCH; + *--ptr = 0; + do + { + char ch = u_val % base + '0'; +#ifdef USE_HEX + if (ch > '9') + { + ch += 'a' - '9' - 1; +#ifdef USE_UPPERHEX + ch-=0x20; +#endif + } +#endif + *--ptr = ch; + u_val /= base; + +#ifdef PADDING + if(width) width--; //calculate number of padding chars +#endif + } while (u_val); + +#ifdef PADDING + while(width--) *--ptr = fill; //insert padding chars +#endif + + while(*ptr) { myputchar(*ptr); ptr++; } + } + } +} diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/lpc2000_spi.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/lpc2000_spi.c new file mode 100644 index 000000000..08c30839d --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/lpc2000_spi.c @@ -0,0 +1,291 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : lpc2000_spi.c * +* Description : This file contains the functions needed to use efs for * +* accessing files on an SD-card connected to an LPC2xxx. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2005 Martin Thomas * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "interfaces/LPC2000_regs.h" +#include "interfaces/lpc2000_spi.h" +#include "interfaces/sd.h" +#include "config.h" +/*****************************************************************************/ + +#ifndef HW_ENDPOINT_LPC2000_SPINUM +#error "HW_ENDPOINT_LPC2000_SPINUM has to be defined in config.h" +#endif + +#if ( HW_ENDPOINT_LPC2000_SPINUM == 0 ) +// LPC213x ### SPI0 ### + +// SP0SPCR Bit-Definitions +#define CPHA 3 +#define CPOL 4 +#define MSTR 5 +// SP0SPSR Bit-Definitions +#define SPIF 7 + +#define SPI_IODIR IODIR0 +#define SPI_SCK_PIN 4 /* Clock P0.4 out */ +#define SPI_MISO_PIN 5 /* from Card P0.5 in */ +#define SPI_MOSI_PIN 6 /* to Card P0.6 out */ +#define SPI_SS_PIN 7 /* Card-Select P0.7 - GPIO out */ + +#define SPI_PINSEL PINSEL0 +#define SPI_SCK_FUNCBIT 8 +#define SPI_MISO_FUNCBIT 10 +#define SPI_MOSI_FUNCBIT 12 +#define SPI_SS_FUNCBIT 14 + +#define SPI_PRESCALE_REG S0SPCCR +#define SPI_PRESCALE_MIN 8 + +#define SELECT_CARD() IOCLR0 = (1<sectorCount=4; /* FIXME ASAP!! */ + + sd_getDriveSize(file, &sc); + file->sectorCount = sc/512; + if( (sc%512) != 0) { + file->sectorCount--; + } + DBG((TXT("Drive Size is %lu Bytes (%lu Sectors)\n"), sc, file->sectorCount)); + + /* increase speed after init */ +#if ( HW_ENDPOINT_LPC2000_SPINUM == 1 ) + SSPCR0 = ((8-1)<<0) | (0<sectorCount=4; /* FIXME ASAP!! */ + DBG((TXT("Init done...\n"))); + return(0); +} +/*****************************************************************************/ + +esint8 if_readBuf(hwInterface* file,euint32 address,euint8* buf) +{ + return(sd_readSector(file,address,buf,512)); +} +/*****************************************************************************/ + +esint8 if_writeBuf(hwInterface* file,euint32 address,euint8* buf) +{ + return(sd_writeSector(file,address, buf)); +} +/*****************************************************************************/ + +esint8 if_setPos(hwInterface* file,euint32 address) +{ + return(0); +} +/*****************************************************************************/ + +void if_spiInit(hwInterface *iface) +{ + euint8 i; + + printf("\n spi ini"); +} +/*****************************************************************************/ + +euint8 if_spiSend(hwInterface *iface, euint8 outgoing) +{ + euint8 incoming=0; + alt_u8 SD_Data=0,status; + + IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SD_SPI_BASE, 1 ); + /* Set the SSO bit (force chipselect) */ + IOWR_ALTERA_AVALON_SPI_CONTROL(SD_SPI_BASE, 0x400); + + do{ + status = IORD_ALTERA_AVALON_SPI_STATUS(SD_SPI_BASE);//get status + }while (((status & ALTERA_AVALON_SPI_STATUS_TRDY_MSK) == 0 ) && + (status & ALTERA_AVALON_SPI_STATUS_RRDY_MSK) == 0); + /* wait till transmit and ready ok */ + + IOWR_ALTERA_AVALON_SPI_TXDATA(SD_SPI_BASE, outgoing); + + /* Wait until the interface has finished transmitting */ + do{status = IORD_ALTERA_AVALON_SPI_STATUS(SD_SPI_BASE);} + while ((status & ALTERA_AVALON_SPI_STATUS_TMT_MSK) == 0); + + /* reciver ready */ + if (((status & 0x80) != 0) ){ + SD_Data = IORD_ALTERA_AVALON_SPI_RXDATA(SD_SPI_BASE); + } + else{ + printf("\n no recive after transmit"); + } + + IOWR_ALTERA_AVALON_SPI_SLAVE_SEL(SD_SPI_BASE, 1); + IOWR_ALTERA_AVALON_SPI_CONTROL(SD_SPI_BASE, 0); + + if( (status & 0x100) !=0) + printf("\n error in spi error in spi"); + + return (SD_Data); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/interfaces/sd.c b/src/ersky9x/libraries/fat/efsl/src/interfaces/sd.c new file mode 100644 index 000000000..c81074463 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/interfaces/sd.c @@ -0,0 +1,344 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : sd.c * +* Revision : Initial developement * +* Description : This file contains the functions needed to use efs for * +* accessing files on an SD-card. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "interfaces/sd.h" +/*****************************************************************************/ + +esint8 sd_Init(hwInterface *iface) +{ + esint16 i; + euint8 resp; + + /* Try to send reset command up to 100 times */ + i=100; + do{ + sd_Command(iface,0, 0, 0); + resp=sd_Resp8b(iface); + } + while(resp!=1 && i--); + + if(resp!=1){ + if(resp==0xff){ + return(-1); + } + else{ + sd_Resp8bError(iface,resp); + return(-2); + } + } + + /* Wait till card is ready initialising (returns 0 on CMD1) */ + /* Try up to 32000 times. */ + i=32000; + do{ + sd_Command(iface,1, 0, 0); + + resp=sd_Resp8b(iface); + if(resp!=0) + sd_Resp8bError(iface,resp); + } + while(resp==1 && i--); + + if(resp!=0){ + sd_Resp8bError(iface,resp); + return(-3); + } + + return(0); +} +/*****************************************************************************/ + +void sd_Command(hwInterface *iface,euint8 cmd, euint16 paramx, euint16 paramy) +{ + if_spiSend(iface,0xff); + + if_spiSend(iface,0x40 | cmd); + if_spiSend(iface,(euint8) (paramx >> 8)); /* MSB of parameter x */ + if_spiSend(iface,(euint8) (paramx)); /* LSB of parameter x */ + if_spiSend(iface,(euint8) (paramy >> 8)); /* MSB of parameter y */ + if_spiSend(iface,(euint8) (paramy)); /* LSB of parameter y */ + + if_spiSend(iface,0x95); /* Checksum (should be only valid for first command (0) */ + + if_spiSend(iface,0xff); /* eat empty command - response */ +} +/*****************************************************************************/ + +euint8 sd_Resp8b(hwInterface *iface) +{ + euint8 i; + euint8 resp; + + /* Respone will come after 1 - 8 pings */ + for(i=0;i<8;i++){ + resp = if_spiSend(iface,0xff); + if(resp != 0xff) + return(resp); + } + + return(resp); +} +/*****************************************************************************/ + +euint16 sd_Resp16b(hwInterface *iface) +{ + euint16 resp; + + resp = ( sd_Resp8b(iface) << 8 ) & 0xff00; + resp |= if_spiSend(iface,0xff); + + return(resp); +} +/*****************************************************************************/ + +void sd_Resp8bError(hwInterface *iface,euint8 value) +{ + switch(value) + { + case 0x40: + DBG((TXT("Argument out of bounds.\n"))); + break; + case 0x20: + DBG((TXT("Address out of bounds.\n"))); + break; + case 0x10: + DBG((TXT("Error during erase sequence.\n"))); + break; + case 0x08: + DBG((TXT("CRC failed.\n"))); + break; + case 0x04: + DBG((TXT("Illegal command.\n"))); + break; + case 0x02: + DBG((TXT("Erase reset (see SanDisk docs p5-13).\n"))); + break; + case 0x01: + DBG((TXT("Card is initialising.\n"))); + break; + default: + DBG((TXT("Unknown error 0x%x (see SanDisk docs p5-13).\n"),value)); + break; + } +} +/*****************************************************************************/ + +esint8 sd_State(hwInterface *iface) +{ + eint16 value; + + sd_Command(iface,13, 0, 0); + value=sd_Resp16b(iface); + + switch(value) + { + case 0x000: + return(1); + break; + case 0x0001: + DBG((TXT("Card is Locked.\n"))); + break; + case 0x0002: + DBG((TXT("WP Erase Skip, Lock/Unlock Cmd Failed.\n"))); + break; + case 0x0004: + DBG((TXT("General / Unknown error -- card broken?.\n"))); + break; + case 0x0008: + DBG((TXT("Internal card controller error.\n"))); + break; + case 0x0010: + DBG((TXT("Card internal ECC was applied, but failed to correct the data.\n"))); + break; + case 0x0020: + DBG((TXT("Write protect violation.\n"))); + break; + case 0x0040: + DBG((TXT("An invalid selection, sectors for erase.\n"))); + break; + case 0x0080: + DBG((TXT("Out of Range, CSD_Overwrite.\n"))); + break; + default: + if(value>0x00FF) + sd_Resp8bError(iface,(euint8) (value>>8)); + else + DBG((TXT("Unknown error: 0x%x (see SanDisk docs p5-14).\n"),value)); + break; + } + return(-1); +} +/*****************************************************************************/ + +/* **************************************************************************** + * WAIT ?? -- FIXME + * CMDWRITE + * WAIT + * CARD RESP + * WAIT + * DATA BLOCK OUT + * START BLOCK + * DATA + * CHKS (2B) + * BUSY... + */ + +esint8 sd_writeSector(hwInterface *iface,euint32 address, euint8* buf) +{ + euint32 place; + euint16 i; + euint16 t=0; + + /*DBG((TXT("Trying to write %u to sector %u.\n"),(void *)&buf,address));*/ + place=512*address; + sd_Command(iface,CMDWRITE, (euint16) (place >> 16), (euint16) place); + + sd_Resp8b(iface); /* Card response */ + + if_spiSend(iface,0xfe); /* Start block */ + for(i=0;i<512;i++) + if_spiSend(iface,buf[i]); /* Send data */ + if_spiSend(iface,0xff); /* Checksum part 1 */ + if_spiSend(iface,0xff); /* Checksum part 2 */ + + if_spiSend(iface,0xff); + + while(if_spiSend(iface,0xff)!=0xff){ + t++; + /* Removed NOP */ + } + /*DBG((TXT("Nopp'ed %u times.\n"),t));*/ + + return(0); +} +/*****************************************************************************/ + +/* **************************************************************************** + * WAIT ?? -- FIXME + * CMDCMD + * WAIT + * CARD RESP + * WAIT + * DATA BLOCK IN + * START BLOCK + * DATA + * CHKS (2B) + */ + +esint8 sd_readSector(hwInterface *iface,euint32 address, euint8* buf, euint16 len) +{ + euint8 cardresp; + euint8 firstblock; + euint8 c; + euint16 fb_timeout=0xffff; + euint32 i; + euint32 place; + + /*DBG((TXT("sd_readSector::Trying to read sector %u and store it at %p.\n"),address,&buf[0]));*/ + place=512*address; + sd_Command(iface,CMDREAD, (euint16) (place >> 16), (euint16) place); + + cardresp=sd_Resp8b(iface); /* Card response */ + + /* Wait for startblock */ + do + firstblock=sd_Resp8b(iface); + while(firstblock==0xff && fb_timeout--); + + if(cardresp!=0x00 || firstblock!=0xfe){ + sd_Resp8bError(iface,firstblock); + return(-1); + } + + for(i=0;i<512;i++){ + c = if_spiSend(iface,0xff); + if(i>6; + + by= iob[5] & 0x0F; + read_bl_len = 1; + read_bl_len <<= by; + + by=iob[9] & 0x03; + by <<= 1; + by += iob[10] >> 7; + + c_size_mult = 1; + c_size_mult <<= (2+by); + + *drive_size = (euint32)(c_size+1) * (euint32)c_size_mult * (euint32)read_bl_len; + + return 0; +} diff --git a/src/ersky9x/libraries/fat/efsl/src/ioman.c b/src/ersky9x/libraries/fat/efsl/src/ioman.c new file mode 100644 index 000000000..9391fce9f --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/ioman.c @@ -0,0 +1,594 @@ +/*****************************************************************************\ +* libfat - General purpose FAT library * +* ---------------------------------- * +* * +* Filename : ioman.c * +* Description : The IO Manager receives all requests for sectors in a central * +* allowing it to make smart decision regarding caching. * +* The IOMAN_NUMBUFFER parameter determines how many sectors * +* ioman can cache. ioman also supports overallocating and * +* backtracking sectors. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "ioman.h" +/*****************************************************************************/ + +esint8 ioman_init(IOManager *ioman, hwInterface *iface, euint8* bufferarea) +{ + ioman->iface=iface; + + ioman->bufptr = ioman_getBuffer(ioman,bufferarea); + ioman->numbuf = IOMAN_NUMBUFFER; + ioman->numit = IOMAN_NUMITERATIONS; + + ioman_reset(ioman); + return(0); +} +/*****************************************************************************/ + +void ioman_reset(IOManager *ioman) +{ + euint16 nb,ni; + + memClr(ioman->sector,sizeof(euint32)*ioman->numbuf); + memClr(ioman->status,sizeof(euint8) *ioman->numbuf); + memClr(ioman->usage ,sizeof(euint8) *ioman->numbuf); + memClr(ioman->itptr ,sizeof(euint8) *ioman->numbuf); + ioman_setError(ioman,IOMAN_NOERROR); + + for(nb=0;nbnumbuf;nb++){ + for(ni=0;ninumit;ni++){ + ioman->stack[nb][ni].sector=0; + ioman->stack[nb][ni].status=0; + ioman->stack[nb][ni].usage =0; + } + } +} +/*****************************************************************************/ + +euint8* ioman_getBuffer(IOManager *ioman,euint8* bufferarea) +{ +#ifdef IOMAN_DO_MEMALLOC + return(ioman->cache_mem); +#else + return(bufferarea); +#endif +} +/*****************************************************************************/ + +void ioman_setAttr(IOManager *ioman,euint16 bufplace,euint8 attribute,euint8 val) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_SETATTROUTOFBOUNDS); + return; /* Out of bounds */ + } + + if(val){ + ioman->status[bufplace]|=1<status[bufplace]&=~(1<=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_GETATTROUTOFBOUNDS); + return(0xFF); /* Out of bounds */ + } + + return(ioman->status[bufplace]&(1<=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return(0x00); + } + return(ioman->usage[bufplace]); +} +/*****************************************************************************/ + + +void ioman_incUseCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + if(ioman->usage[bufplace]==0xFF)return; + else ioman->usage[bufplace]++; +} +/*****************************************************************************/ + +void ioman_decUseCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + if(ioman->usage[bufplace]==0x0)return; + else ioman->usage[bufplace]--; +} +/*****************************************************************************/ + +void ioman_resetUseCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + ioman->usage[bufplace]=0x00; +} +/*****************************************************************************/ + +euint8 ioman_getRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return(0x00); + } + return(ioman->reference[bufplace]); +} +/*****************************************************************************/ + +void ioman_incRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + if(ioman->reference[bufplace]==0xFF)return; + else ioman->reference[bufplace]++; +} +/*****************************************************************************/ + +void ioman_decRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + if(ioman->reference[bufplace]==0x00)return; + else ioman->reference[bufplace]--; +} +/*****************************************************************************/ + +void ioman_resetRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + ioman->reference[bufplace]=0x00; +} +/*****************************************************************************/ + +esint8 ioman_pop(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_POPEMPTYSTACK); + return(-1); + } + if(ioman->itptr[bufplace]==0 || ioman->itptr[bufplace]>IOMAN_NUMITERATIONS)return(-1); + ioman->sector[bufplace] = ioman->stack[bufplace][ioman->itptr[bufplace]].sector; + ioman->status[bufplace] = ioman->stack[bufplace][ioman->itptr[bufplace]].status; + ioman->usage[bufplace] = ioman->stack[bufplace][ioman->itptr[bufplace]].usage; + ioman->itptr[bufplace]--; + return(0); +} +/*****************************************************************************/ + +esint8 ioman_push(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return(-1); + } + if(ioman->itptr[bufplace]>=IOMAN_NUMITERATIONS){ + ioman_setError(ioman,IOMAN_ERR_PUSHBEYONDSTACK); + return(-1); + } + ioman->itptr[bufplace]++; + ioman->stack[bufplace][ioman->itptr[bufplace]].sector = ioman->sector[bufplace]; + ioman->stack[bufplace][ioman->itptr[bufplace]].status = ioman->status[bufplace]; + ioman->stack[bufplace][ioman->itptr[bufplace]].usage = ioman->usage[bufplace]; + return(0); +} +/*****************************************************************************/ + +euint8* ioman_getPtr(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return(0); + } + return(ioman->bufptr+bufplace*512); +} +/*****************************************************************************/ + +esint16 ioman_getBp(IOManager *ioman,euint8* buf) +{ + if(buf<(ioman->bufptr) || buf>=( ioman->bufptr+(ioman->numbuf*512) )){ + ioman_setError(ioman,IOMAN_ERR_CACHEPTROUTOFRANGE); + return(-1); + } + return((buf-(ioman->bufptr))/512); +} +/*****************************************************************************/ + +esint8 ioman_readSector(IOManager *ioman,euint32 address,euint8* buf) +{ + esint8 r; + + if(buf==0){ + return(-1); + } + + r=if_readBuf(ioman->iface,address,buf); + + if(r!=0){ + ioman_setError(ioman,IOMAN_ERR_READFAIL); + return(-1); + } + return(0); +} +/*****************************************************************************/ + +esint8 ioman_writeSector(IOManager *ioman, euint32 address, euint8* buf) +{ + esint8 r; + + if(buf==0)return(-1); + + r=if_writeBuf(ioman->iface,address,buf); + + if(r<=0){ + ioman_setError(ioman,IOMAN_ERR_WRITEFAIL); + return(-1); + } + return(0); +} +/*****************************************************************************/ + +void ioman_resetCacheItem(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf){ + ioman_setError(ioman,IOMAN_ERR_OPOUTOFBOUNDS); + return; + } + ioman->sector[bufplace] = 0; + ioman->status[bufplace] = 0; + ioman->usage[bufplace] = 0; + ioman->reference[bufplace] = 0; +} +/*****************************************************************************/ + +esint32 ioman_findSectorInCache(IOManager *ioman, euint32 address) +{ + euint16 c; + + for(c=0;cnumbuf;c++){ + if(ioman_isValid(c) && ioman->sector[c] == address)return(c); + } + return(-1); +} +/*****************************************************************************/ + +esint32 ioman_findFreeSpot(IOManager *ioman) +{ + euint16 c; + + for(c=0;cnumbuf;c++){ + if(!ioman_isValid(c))return(c); + } + return(-1); +} +/*****************************************************************************/ + +esint32 ioman_findUnusedSpot(IOManager *ioman) +{ + esint32 r=-1; + euint16 c; + euint8 fr=0,lr=0xFF; + + for(c=0;cnumbuf;c++){ + if(ioman_getUseCnt(ioman,c)==0){ + if(!ioman_isWritable(c) && !fr){ + fr=1; + lr=0xFF; + r=-1; + } + if(ioman_isWritable(c) && !fr){ + if(ioman_getRefCnt(ioman,c)<=lr){ + r=c; + lr=ioman_getRefCnt(ioman,c); + } + } + if(fr && !ioman_isWritable(c)){ + if(ioman_getRefCnt(ioman,c)<=lr){ + r=c; + lr=ioman_getRefCnt(ioman,c); + } + } + } + } + return(r); +} +/*****************************************************************************/ + +esint32 ioman_findOverallocableSpot(IOManager *ioman) +{ + euint8 points,lp=0xFF; + euint16 c; + esint32 r=-1; + + for(c=0;cnumbuf;c++){ + if(ioman->itptr[c]numit){ + points = 0; + if(ioman_isWritable(c))points+=0x7F; + points += ((euint16)(ioman->itptr[c]*0x4D))/(ioman->numit); + points += ((euint16)(ioman_getRefCnt(ioman,c)*0x33))/0xFF; + if(pointssector[bufplace]=address; + return(0); +} +/***************** if(bufplace>=ioman->numbuf)return; +************************************************************/ + +esint8 ioman_flushSector(IOManager *ioman, euint16 bufplace) +{ + euint8* buf; + + if((buf = ioman_getPtr(ioman,bufplace))==0){ + ioman_setError(ioman,IOMAN_ERR_CACHEPTROUTOFRANGE); + return(-1); + } + if(!ioman_isWritable(bufplace)){ + ioman_setError(ioman,IOMAN_ERR_WRITEREADONLYSECTOR); + return(-1); + } + if(!(ioman_writeSector(ioman,ioman->sector[bufplace],buf))){ + ioman_setError(ioman,IOMAN_ERR_WRITEFAIL); + return(-1); + } + if(ioman->usage==0)ioman_setNotWritable(bufplace); + return(0); +} +/*****************************************************************************/ + +esint8 ioman_flushRange(IOManager *ioman,euint32 address_low, euint32 address_high) +{ + euint32 c; + + if(address_low>address_high){ + c=address_low; address_low=address_high;address_high=c; + } + + for(c=0;cnumbuf;c++){ + if((ioman->sector[c]>=address_low) && (ioman->sector[c]<=address_high) && (ioman_isWritable(c))){ + if(ioman_flushSector(ioman,c)){ + return(-1); + } + if(ioman->usage[c]==0)ioman_setNotWritable(c); + } + } + return(0); +} +/*****************************************************************************/ + +esint8 ioman_flushAll(IOManager *ioman) +{ + euint16 c; + + for(c=0;cnumbuf;c++){ + if(ioman_isWritable(c)){ + if(ioman_flushSector(ioman,c)){ + return(-1); + } + if(ioman->usage[c]==0)ioman_setNotWritable(c); + } + } + return(0); +} +/*****************************************************************************/ + +euint8* ioman_getSector(IOManager *ioman,euint32 address, euint8 mode) +{ + esint32 bp; + + if((bp=ioman_findSectorInCache(ioman,address))!=-1){ + if(ioman_isReqRw(mode)){ + ioman_setWritable(bp); + } + ioman_incUseCnt(ioman,bp); + if(!ioman_isReqExp(mode))ioman_incRefCnt(ioman,bp); + return(ioman_getPtr(ioman,bp)); + } + + if((bp=ioman_findFreeSpot(ioman))==-1){ + if(((bp=ioman_findUnusedSpot(ioman))!=-1)&&(ioman_isWritable(bp))){ + ioman_flushSector(ioman,bp); + } + } + + if(bp!=-1){ + ioman_resetCacheItem(ioman,bp); + if((ioman_putSectorInCache(ioman,address,bp))){ + return(0); + } + if(mode==IOM_MODE_READWRITE){ + ioman_setWritable(bp); + } + ioman_incUseCnt(ioman,bp); + if(!ioman_isReqExp(mode))ioman_incRefCnt(ioman,bp); + return(ioman_getPtr(ioman,bp)); + } + + if((bp=ioman_findOverallocableSpot(ioman))!=-1){ + if(ioman_isWritable(bp)){ + ioman_flushSector(ioman,bp); + } + if(ioman_push(ioman,bp)){ + return(0); + } + ioman_resetCacheItem(ioman,bp); + if((ioman_putSectorInCache(ioman,address,bp))){ + return(0); + } + if(ioman_isReqRw(mode)){ + ioman_setWritable(bp); + } + ioman_incUseCnt(ioman,bp); + if(!ioman_isReqExp(mode))ioman_incRefCnt(ioman,bp); + return(ioman_getPtr(ioman,bp)); + } + ioman_setError(ioman,IOMAN_ERR_NOMEMORY); + return(0); +} +/*****************************************************************************/ + +esint8 ioman_releaseSector(IOManager *ioman,euint8* buf) +{ + euint16 bp; + + bp=ioman_getBp(ioman,buf); + ioman_decUseCnt(ioman,bp); + + if(ioman_getUseCnt(ioman,bp)==0 && ioman->itptr[bp]!=0){ + if(ioman_isWritable(bp)){ + ioman_flushSector(ioman,bp); + } + ioman_pop(ioman,bp); + ioman_putSectorInCache(ioman,ioman->sector[bp],bp); + } + return(0); +} +/*****************************************************************************/ + +esint8 ioman_directSectorRead(IOManager *ioman,euint32 address, euint8* buf) +{ + euint8* ibuf; + esint16 bp; + + if((bp=ioman_findSectorInCache(ioman,address))!=-1){ + ibuf=ioman_getPtr(ioman,bp); + memCpy(ibuf,buf,512); + return(0); + } + + if((bp=ioman_findFreeSpot(ioman))!=-1){ + if((ioman_putSectorInCache(ioman,address,bp))){ + return(-1); + } + ibuf=ioman_getPtr(ioman,bp); + memCpy(ibuf,buf,512); + return(0); + } + + if(ioman_readSector(ioman,address,buf)){ + return(-1); + } + + return(0); +} +/*****************************************************************************/ + +esint8 ioman_directSectorWrite(IOManager *ioman,euint32 address, euint8* buf) +{ + euint8* ibuf; + esint16 bp; + + if((bp=ioman_findSectorInCache(ioman,address))!=-1){ + ibuf=ioman_getPtr(ioman,bp); + memCpy(buf,ibuf,512); + ioman_setWritable(bp); + return(0); + } + + if((bp=ioman_findFreeSpot(ioman))!=-1){ + ibuf=ioman_getPtr(ioman,bp); + memCpy(buf,ibuf,512); + ioman_resetCacheItem(ioman,bp); + ioman->sector[bp]=address; + ioman_setWritable(bp); + ioman_setValid(bp); + return(0); + } + + if(ioman_writeSector(ioman,address,buf)){ + return(-1); + } + + return(0); +} +/*****************************************************************************/ + +void ioman_printStatus(IOManager *ioman) +{ + euint16 c; + + DBG((TXT("IO-Manager -- Report\n====================\n"))); + DBG((TXT("Buffer is %i sectors, from %p to %p\n"), + ioman->numbuf,ioman->bufptr,ioman->bufptr+(ioman->numbuf*512))); + for(c=0;cnumbuf;c++){ + if(ioman_isValid(c)){ + DBG((TXT("BP %3i\t SC %8li\t\t US %i\t RF %i\t %s %s\n"), + c,ioman->sector[c],ioman_getUseCnt(ioman,c),ioman_getRefCnt(ioman,c), + ioman_isUserBuf(c) ? "USRBUF" : " ", + ioman_isWritable(c) ? "WRITABLE" : "READONLY")); + } + } +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/ioman_v2.c b/src/ersky9x/libraries/fat/efsl/src/ioman_v2.c new file mode 100644 index 000000000..cef6d2725 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/ioman_v2.c @@ -0,0 +1,402 @@ +/*****************************************************************************\ +* libfat - General purpose FAT library * +* ---------------------------------- * +* * +* Filename : ioman.c * +* Description : The IO Manager receives all requests for sectors in a central * +* allowing it to make smart decision regarding caching. * +* The IOMAN_NUMBUFFER parameter determines how many sectors * +* ioman can cache. ioman also supports overallocating and * +* backtracking sectors * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "ioman_v2.h" +/*****************************************************************************/ + +esint8 ioman_init(IOManager *ioman, hwInterface *iface, euint8* bufferarea) +{ + ioman->iface=iface; + + ioman->bufptr = ioman_getBuffer(ioman,bufferarea); + ioman->numbuf = IOMAN_NUMBUFFER; + ioman->numit = IOMAN_NUMITERATIONS; + + ioman_reset(ioman); + return(0); +} + +void ioman_reset(IOManager *ioman) +{ + euint16 nb,ni; + + memClr(ioman->sector,sizeof(euint32)*ioman->numbuf); + memClr(ioman->status,sizeof(euint8) *ioman->numbuf); + memClr(ioman->usage ,sizeof(euint8) *ioman->numbuf); + memClr(ioman->itptr ,sizeof(euint8) *ioman->numbuf); + + for(nb=0;nbnumbuf;nb++){ + for(ni=0;ninumit;ni++){ + ioman->stack[nb][ni].sector=0; + ioman->stack[nb][ni].status=0; + ioman->stack[nb][ni].usage =0; + } + } +} + +euint8* ioman_getBuffer(IOManager *ioman,euint8* bufferarea) +{ + static euint8 buf[512 * IOMAN_NUMBUFFER]; + return(buf); +} + +void ioman_setAttr(IOManager *ioman,euint16 bufplace,euint8 attribute,euint8 val) +{ + if(bufplace>=ioman->numbuf)return; /* Out of bounds */ + + if(val){ + ioman->status[bufplace]|=1<status[bufplace]&=~(1<=ioman->numbuf) + return(0xFF); /* Out of bounds */ + + return(ioman->status[bufplace]&(1<=ioman->numbuf)return(0x00); + return(ioman->usage[bufplace]); +} + +void ioman_incUseCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return; + if(ioman->usage[bufplace]==0xFF)return; + else ioman->usage[bufplace]++; +} + +void ioman_decUseCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return; + if(ioman->usage[bufplace]==0x0)return; + else ioman->usage[bufplace]--; +} + +void ioman_resetUseCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return; + ioman->usage[bufplace]=0x00; +} + +euint8 ioman_getRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return(0x00); + return(ioman->reference[bufplace]); +} + +void ioman_incRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return; + if(ioman->reference[bufplace]==0xFF)return; + else ioman->reference[bufplace]++; +} + +void ioman_decRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return; + if(ioman->reference[bufplace]==0x00)return; + else ioman->reference[bufplace]--; +} + +void ioman_resetRefCnt(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return; + ioman->reference[bufplace]=0x00; +} + +esint8 ioman_pop(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return(-1); + if(ioman->itptr[bufplace]==0 || ioman->itptr[bufplace]>IOMAN_NUMITERATIONS)return(-1); + ioman->sector[bufplace] = ioman->stack[bufplace][ioman->itptr[bufplace]].sector; + ioman->status[bufplace] = ioman->stack[bufplace][ioman->itptr[bufplace]].status; + ioman->usage[bufplace] = ioman->stack[bufplace][ioman->itptr[bufplace]].usage; + ioman->itptr[bufplace]--; + return(0); +} + +esint8 ioman_push(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return(-1); + if(ioman->itptr[bufplace]>=IOMAN_NUMITERATIONS)return(-1); + ioman->itptr[bufplace]++; + ioman->stack[bufplace][ioman->itptr[bufplace]].sector = ioman->sector[bufplace]; + ioman->stack[bufplace][ioman->itptr[bufplace]].status = ioman->status[bufplace]; + ioman->stack[bufplace][ioman->itptr[bufplace]].usage = ioman->usage[bufplace]; + return(0); +} + +euint8* ioman_getPtr(IOManager *ioman,euint16 bufplace) +{ + if(bufplace>=ioman->numbuf)return(0); + return(ioman->bufptr+bufplace*512); +} + +esint16 ioman_getBp(IOManager *ioman,euint8* buf) +{ + if(buf<(ioman->bufptr) || buf>=( ioman->bufptr+(ioman->numbuf*512) )){ + return(-1); + } + return((buf-(ioman->bufptr))/512); +} + +esint8 ioman_readSector(IOManager *ioman,euint32 address,euint8* buf) +{ + esint8 r; + + /*DBG((TXT("ioman_readSector::Requesting address %u to be put in %p.\n"),address,buf));*/ + if(buf==0){ + /*DBG((TXT("Refused to read sector, buf=0\n")));*/ + return(-1); + } + + r=if_readBuf(ioman->iface,address,buf); + + if(r!=0){ + return(-1); + } + return(0); +} + +esint8 ioman_writeSector(IOManager *ioman, euint32 address, euint8* buf) +{ + esint8 r; + + if(buf==0)return(-1); + + r=if_writeBuf(ioman->iface,address,buf); + + if(r<=0){ + return(-1); + } + return(0); +} + +void ioman_resetCacheItem(IOManager *ioman,euint16 bufplace) +{ + ioman->sector[bufplace] = 0; + ioman->status[bufplace] = 0; + ioman->usage[bufplace] = 0; + ioman->reference[bufplace] = 0; +} + +esint32 ioman_findSectorInCache(IOManager *ioman, euint32 address) +{ + euint16 c; + + for(c=0;cnumbuf;c++){ + if(ioman_isValid(c) && ioman->sector[c] == address)return(c); + } + return(-1); +} + +esint32 ioman_findFreeSpot(IOManager *ioman) +{ + euint16 c; + + for(c=0;cnumbuf;c++){ + if(!ioman_isValid(c))return(c); + } + return(-1); +} + +esint32 ioman_findUnusedSpot(IOManager *ioman) +{ + esint32 r=-1; + euint16 c; + euint8 fr=0,lr=0xFF; + + for(c=0;cnumbuf;c++){ + if(ioman_getUseCnt(ioman,c)==0){ + if(!ioman_isWritable(c) && !fr){ + fr=1; + lr=0xFF; + r=-1; + } + if(ioman_isWritable(c) && !fr){ + if(ioman_getRefCnt(ioman,c)<=lr){ + r=c; + lr=ioman_getRefCnt(ioman,c); + } + } + if(fr && !ioman_isWritable(c)){ + if(ioman_getRefCnt(ioman,c)<=lr){ + r=c; + lr=ioman_getRefCnt(ioman,c); + } + } + } + } + return(r); +} + +esint32 ioman_findOverallocableSpot(IOManager *ioman) +{ + euint8 points,lp=0xFF; + euint16 c; + esint32 r=-1; + + for(c=0;cnumbuf;c++){ + if(ioman->itptr[c]numit){ + points = 0; + if(ioman_isWritable(c))points+=0x7F; + points += ((euint16)(ioman->itptr[c]*0x4D))/(ioman->numit); + points += ((euint16)(ioman_getRefCnt(ioman,c)*0x33))/0xFF; + if(pointssector[bufplace]=address; + return(0); +} + +esint8 ioman_flushSector(IOManager *ioman, euint16 bufplace) +{ + euint8* buf; + + if((buf = ioman_getPtr(ioman,bufplace))==0)return(-1); + if(!ioman_isWritable(bufplace))return(-1); + if(!(ioman_writeSector(ioman,ioman->sector[bufplace],buf)))return(-1); + return(0); +} + +euint8* ioman_getSector(IOManager *ioman,euint32 address, euint8 mode) +{ + esint32 bp; + + if((bp=ioman_findSectorInCache(ioman,address))!=-1){ + if(mode==IOM_MODE_READWRITE){ + ioman_setWritable(bp); + } + ioman_incUseCnt(ioman,bp); + ioman_incRefCnt(ioman,bp); + return(ioman_getPtr(ioman,bp)); + } + + if((bp=ioman_findFreeSpot(ioman))==-1){ + if(((bp=ioman_findUnusedSpot(ioman))!=-1)&&(ioman_isWritable(bp))){ + ioman_flushSector(ioman,bp); + } + } + + if(bp!=-1){ + ioman_resetCacheItem(ioman,bp); + if((ioman_putSectorInCache(ioman,address,bp))){ + return(0); + } + if(mode==IOM_MODE_READWRITE){ + ioman_setWritable(bp); + } + ioman_incUseCnt(ioman,bp); + ioman_incRefCnt(ioman,bp); + return(ioman_getPtr(ioman,bp)); + } + + if((bp=ioman_findOverallocableSpot(ioman))!=-1){ + if(ioman_isWritable(bp)){ + ioman_flushSector(ioman,bp); + } + if(ioman_push(ioman,bp)){ + return(0); + } + ioman_resetCacheItem(ioman,bp); + if((ioman_putSectorInCache(ioman,address,bp))){ + return(0); + } + if(mode==IOM_MODE_READWRITE){ + ioman_setWritable(bp); + } + ioman_incUseCnt(ioman,bp); + ioman_incRefCnt(ioman,bp); + return(ioman_getPtr(ioman,bp)); + } + return(0); +} + +esint8 ioman_releaseSector(IOManager *ioman,euint8* buf) +{ + euint16 bp; + + bp=ioman_getBp(ioman,buf); + ioman_decUseCnt(ioman,bp); + + if(ioman_getUseCnt(ioman,bp)==0 && ioman->itptr!=0){ + if(ioman_isWritable(bp)){ + ioman_flushSector(ioman,bp); + } + ioman_pop(ioman,bp); + ioman_putSectorInCache(ioman,ioman->sector[bp],bp); + } + return(0); +} + + +void ioman_printStatus(IOManager *ioman) +{ + euint16 c; + + DBG((TXT("IO-Manager -- Report\n====================\n\n"))); + DBG((TXT("Buffer is %i sectors, from %p to %p\n"), + ioman->numbuf,ioman->bufptr,ioman->bufptr+(ioman->numbuf*512))); + for(c=0;cnumbuf;c++){ + if(ioman_isValid(c)){ + DBG((TXT("BP %3i\t SC %i\t\t US %i\t RF %i\t %s %s\n"), + c,ioman->sector[c],ioman_getUseCnt(ioman,c),ioman_getRefCnt(ioman,c), + ioman_isUserBuf(c) ? "USRBUF" : " ", + ioman_isWritable(c) ? "WRITABLE" : "READONLY")); + } + } +} diff --git a/src/ersky9x/libraries/fat/efsl/src/ls.c b/src/ersky9x/libraries/fat/efsl/src/ls.c new file mode 100644 index 000000000..4a9dd3cbb --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/ls.c @@ -0,0 +1,140 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : ls.c * +* Description : This file contains functions to list the files in a directory * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "ls.h" +/*****************************************************************************/ + +esint8 ls_openDir(DirList *dlist,FileSystem *fs,eint8* dirname) +{ + FileLocation loc; + euint32 fc; + + dlist->fs=fs; + + if(fs_findFile(dlist->fs,dirname,&loc,&fc)!=2) + { + return(-1); + } + + fs_initClusterChain(dlist->fs,&(dlist->Cache),fc); + memClr(&(dlist->currentEntry),sizeof(dlist->currentEntry)); + dlist->rEntry=0; + dlist->cEntry=0xFFFF; + + return(0); +} +/*****************************************************************************/ + +esint8 ls_getDirEntry(DirList *dlist) +{ + if(dlist->Cache.FirstCluster == 1){ + return(ls_getRootAreaEntry(dlist)); + }else if(dlist->Cache.FirstCluster){ + return(ls_getRealDirEntry(dlist)); + } + return(-1); +} +/*****************************************************************************/ + +esint8 ls_getNext(DirList *dlist) +{ + do{ + if(ls_getDirEntry(dlist))return(-1); + dlist->rEntry++; + }while(!ls_isValidFileEntry(&(dlist->currentEntry))); + dlist->cEntry++; + return(0); +} +/*****************************************************************************/ + +esint8 ls_getRealDirEntry(DirList *dlist) +{ + euint8* buf; + + if(dlist->Cache.FirstCluster<=1)return(-1); + + if(fat_LogicToDiscCluster(dlist->fs, + &(dlist->Cache), + (dlist->rEntry)/(16 * dlist->fs->volumeId.SectorsPerCluster))){ + return(-1); + } + + buf = part_getSect(dlist->fs->part, + fs_clusterToSector(dlist->fs,dlist->Cache.DiscCluster) + (dlist->rEntry/16)%dlist->fs->volumeId.SectorsPerCluster, + IOM_MODE_READONLY); + + /*memCpy(buf+(dlist->rEntry%16)*32,&(dlist->currentEntry),32);*/ + ls_fileEntryToDirListEntry(dlist,buf,32*(dlist->rEntry%16)); + + part_relSect(dlist->fs->part,buf); + + return(0); +} +/*****************************************************************************/ + +esint8 ls_getRootAreaEntry(DirList *dlist) +{ + euint8 *buf=0; + + if((dlist->fs->type != FAT12) && (dlist->fs->type != FAT16))return(-1); + if(dlist->rEntry>=dlist->fs->volumeId.RootEntryCount)return(-1); + + buf = part_getSect(dlist->fs->part, + dlist->fs->FirstSectorRootDir+dlist->rEntry/16, + IOM_MODE_READONLY); + /*memCpy(buf+32*(dlist->rEntry%16),&(dlist->currentEntry),32);*/ + ls_fileEntryToDirListEntry(dlist,buf,32*(dlist->rEntry%16)); + part_relSect(dlist->fs->part,buf); + return(0); +} +/*****************************************************************************/ + +esint8 ls_isValidFileEntry(ListDirEntry *entry) +{ + if(entry->FileName[0] == 0 || entry->FileName[0] == 0xE5 || entry->FileName[0] == '.')return(0); + if((entry->Attribute&0x0F)==0x0F)return(0); + return(1); +} +/*****************************************************************************/ + +void ls_fileEntryToDirListEntry(DirList *dlist, euint8* buf, euint16 offset) +{ + if(offset>480 || offset%32)return; + + buf+=offset; + memCpy(buf+OFFSET_DE_FILENAME,dlist->currentEntry.FileName,LIST_MAXLENFILENAME); + dlist->currentEntry.Attribute = *(buf+OFFSET_DE_ATTRIBUTE); + dlist->currentEntry.FileSize = ex_getb32(buf,OFFSET_DE_FILESIZE); +} +/*****************************************************************************/ + diff --git a/src/ersky9x/libraries/fat/efsl/src/mkfs.c b/src/ersky9x/libraries/fat/efsl/src/mkfs.c new file mode 100644 index 000000000..05f5c4313 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/mkfs.c @@ -0,0 +1,153 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : mkfs.c * +* Description : These functions are used for creating an empty filesystem. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "mkfs.h" +/*****************************************************************************/ + +signed short mkfs_makevfat(Partition *part) +{ + unsigned long c,cc,ret; + unsigned long ns,fs,ds,dc; + unsigned char buf[512]; + + ns=part->disc->partitions[part->activePartition].numSectors; + + if( ns < 66581 ){ + DBG((TXT("This is not possible due to insufficient sectors. Sorry\n"))); + return(MKFS_ERR_TOOLITTLESECTORS); + } + + ret=0; + + for(c=1<<6;c>=1;c>>=1){ + + /* First guess */ + ds = ns - 32; + fs = ((ds/c)+127)/128; + /* ds was guess too large, so fs is too large now too. */ + + for(cc=0;cc<2;cc++){ + + /* Round 2, error round */ + ds = ns - 32 - 2*fs; + fs = ((ds/c)+127)/128; + /* Since fs was too large, ds became too small. So the fs for this small ds is too small as well. */ + + /* Round 3, correction round */ + ds = ns - 32 - 2*fs; + fs = ((ds/c)+127)/128; + /* The fs was too small, so ds was too large. The calculated fs should be slightly too large. */ + + } + + /* Round 4, finalise */ + ds = ns - 32 - 2*fs; + + dc = ds / c; + if(ret<(fs*128-dc)/128)ret=(fs*128-dc)/128; + + /* Check if with current setting we have a valid fat ? */ + + if(dc >= 65525 + 16){ + break; + } + } + + /* Generate BPB */ + memClr(buf,512); + + /* Boot code */ + *(buf+0)=0xE9; *(buf+1)=0x00; *(buf+2)=0x00; /* RESET */ + + /* OEM name */ + memCpy("DSCOSMSH",buf+3,8); + + /* Bytes/Sector */ + *((unsigned short*)(buf+11)) = 512; + + /* Sectors/Cluster */ + *(buf+13) = c; + + /* Reserved Sectors */ + *((unsigned short*)(buf+14)) = 32; + + /* Number of FAT Tables */ + *(buf+16) = 2; + + /* RootEntryCount */ + *((unsigned short*)(buf+17)) = 0; + + /* Total Sector Count __16 */ + *((unsigned short*)(buf+19)) = 0; + + /* Media (crap) */ + *(buf+21) = 0xF8; + + /* FAT size 16 */ + *((unsigned short*)(buf+22)) = 0; + + /* Total Sector Count __32 */ + *((unsigned long*)(buf+32)) = ns; + + /* Fat Size 32 */ + *((unsigned long*)(buf+36)) = fs; + + /* First Cluster Root Dir */ + *((unsigned long*)(buf+44)) = 2; + + /* VolumeID */ + *((unsigned long*)(buf+67)) = 0x13371337; + + /* Volume Label */ + memCpy("DISCOSMASH!",buf+71,11); + + /* Filesystemtype */ + memCpy("FAT32 ",buf+82,8); + + /* Magic */ + *(buf+510) = 0x55; *(buf+511) = 0xAA; + + part_writeBuf(part,0,buf); + + memClr(buf,512); + for(c=32;c<(32+2*fs);c++){ + part_writeBuf(part,c,buf); + } + *(((unsigned long*)buf) )=0x0FFFFFF8; + *(((unsigned long*)buf)+1)=0x0FFFFFFF; + *(((unsigned long*)buf)+2)=0x0FFFFFF8; + part_writeBuf(part,32,buf); + part_writeBuf(part,32+fs,buf); + + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/src/partition.c b/src/ersky9x/libraries/fat/efsl/src/partition.c new file mode 100644 index 000000000..a61a148dd --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/partition.c @@ -0,0 +1,152 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : partition.c * +* Description : These functions are partition specific. Searching FAT type * +* partitions and read/write functions to partitions. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "partition.h" +/*****************************************************************************/ + +/* **************************************************************************** + * void part_initPartition(Partition *part,Disc* refDisc) + * Description: This function searches the 4 partitions for a FAT class partition + * and marks the first one found as the active to be used partition. +*/ +void part_initPartition(Partition *part,Disc* refDisc) +{ + eint16 c; + + part->disc=refDisc; + part->activePartition=-1; /* No partition selected */ + part_setError(part,PART_NOERROR); + for(c=3;c>=0;c--){ + if(part_isFatPart(part->disc->partitions[c].type)) + part->activePartition=c; + } +} +/*****************************************************************************/ + + +/* **************************************************************************** + * eint16 part_isFatPart(euint8 type) + * Description: This functions checks if a partitiontype (eint8) is of the FAT + * type in the broadest sense. I + * Return value: If it is FAT, returns 1, otherwise 0. +*/ +eint16 part_isFatPart(euint8 type) +{ + if(type == PT_FAT12 || + type == PT_FAT16A || + type == PT_FAT16 || + type == PT_FAT32 || + type == PT_FAT32A || + type == PT_FAT16B ) + { + return(1); + } + return(0); +} +/*****************************************************************************/ + +esint8 part_readBuf(Partition *part, euint32 address, euint8* buf) +{ + return(if_readBuf(part->disc->ioman->iface,part_getRealLBA(part,address), buf)); +} + +/* **************************************************************************** + * eint16 part_writeBuf(Partition *part,euint32 address,euint8* buf) + * Description: This function writes 512 bytes, from buf. It's offset is address + * sectors from the beginning of the partition. + * Return value: It returns whatever the hardware function returns. (-1=error) +*/ +eint16 part_writeBuf(Partition *part,euint32 address,euint8* buf) +{ + /*DBG((TXT("part_writeBuf :: %li\n"),address));*/ + return(if_writeBuf(part->disc->ioman->iface,part_getRealLBA(part,address),buf)); +} +/*****************************************************************************/ + + +/* **************************************************************************** + * euint32 part_getRealLBA(Partition *part,euint32 address) + * Description: This function calculates what the partition offset for + * a partition is + the address. + * Return value: Sector address. +*/ +euint32 part_getRealLBA(Partition *part,euint32 address) +{ + return(part->disc->partitions[part->activePartition].LBA_begin+address); +} +/*****************************************************************************/ + +/* **************************************************************************** + * euint8* part_getSect(Partition *part, euint32 address, euint8 mode) + * Description: This function calls ioman_getSector, but recalculates the sector + * address to be partition relative. + * Return value: Whatever getSector returns. (pointer or 0) +*/ +euint8* part_getSect(Partition *part, euint32 address, euint8 mode) +{ + return(ioman_getSector(part->disc->ioman,part_getRealLBA(part,address),mode)); +} + +/* **************************************************************************** + * esint8 part_relSect(Partition *part, euint8* buf) + * Description: This function calls ioman_releaseSector. + * Return value: Whatever releaseSector returns. +*/ +esint8 part_relSect(Partition *part, euint8* buf) +{ + return(ioman_releaseSector(part->disc->ioman,buf)); +} + +esint8 part_flushPart(Partition *part,euint32 addr_l, euint32 addr_h) +{ + return( + ioman_flushRange(part->disc->ioman,part_getRealLBA(part,addr_l),part_getRealLBA(part,addr_h)) + ); +} + +esint8 part_directSectorRead(Partition *part,euint32 address, euint8* buf) +{ + return( + ioman_directSectorRead(part->disc->ioman,part_getRealLBA(part,address),buf) + ); +} + +esint8 part_directSectorWrite(Partition *part,euint32 address, euint8* buf) +{ + return( + ioman_directSectorWrite(part->disc->ioman,part_getRealLBA(part,address),buf) + ); +} + + diff --git a/src/ersky9x/libraries/fat/efsl/src/plibc.c b/src/ersky9x/libraries/fat/efsl/src/plibc.c new file mode 100644 index 000000000..4528881e9 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/plibc.c @@ -0,0 +1,82 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : plibc.c * +* Description : This file contains replacements of common c library functions * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "plibc.h" +/*****************************************************************************/ + +/* **************************************************************************** + * unsigned short strMatch(char* bufa, char*bufb, unsigned long n) + * Description: Compares bufa and bufb for a length of n bytes. + * Return value: Returns the number of character NOT matching. +*/ +euint16 strMatch(eint8* bufa, eint8*bufb,euint32 n) +{ + euint32 c; + euint16 res=0; + for(c=0;c0){ + *((eint8*)pdest+size-1)=*((eint8*)psrc+size-1); + size--; + } +} +/*****************************************************************************/ + +void memClr(void *pdest,euint32 size) +{ + while(size>0){ + *(((eint8*)pdest)+size-1)=0x00; + size--; + } +} + +void memSet(void *pdest,euint32 size,euint8 data) +{ + while(size>0){ + *(((eint8*)pdest)+size-1)=data; + size--; + } +} + + diff --git a/src/ersky9x/libraries/fat/efsl/src/regressiontest.c b/src/ersky9x/libraries/fat/efsl/src/regressiontest.c new file mode 100644 index 000000000..05e2194b9 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/regressiontest.c @@ -0,0 +1,352 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : regressiontest.c * +* Description : This file contains a regressiontest (obsolete) * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "config.h" +#include "interfaces/helper.h" +//#include "interfaces/linuxfile.h" +#include "disc.h" +#include "partition.h" +#include "fs.h" +#include "file.h" +#include "mkfs.h" +#include "ioman.h" +#include "debug.h" +#include "extract.h" +#include "plibc.h" +#include + +/*****************************************************************************/ + +int main(int argc, char** argv) +{ + hwInterface *lfile=0; + IOManager *ioman=0; + Disc *disc=0; + Partition *part=0; + FileSystem *fs=0; + File *fr=0; + File *fw=0; + FILE *out=0; + unsigned char buf[4096]; + + int c,r,ir; + + /*debug_init();*/ + + switch(argv[1][0]){ + case '0': + lfile = malloc(sizeof(*lfile)); + ioman = malloc(sizeof(*ioman)); + disc = malloc(sizeof(*disc)); + part = malloc(sizeof(*part)); + + if_initInterface(lfile,"regtest.16"); + ioman_init(ioman,lfile,0); + disc_initDisc(disc,ioman); + memClr(disc->partitions,sizeof(PartitionField)*4); + disc->partitions[0].type=0x0B; + disc->partitions[0].LBA_begin=0; + disc->partitions[0].numSectors=lfile->sectorCount; + part_initPartition(part,disc); + + fs = malloc(sizeof(*fs)); + if( (fs_initFs(fs,part)) != 0){ + printf("Unable to init the filesystem\n"); + return(-1); + } + + fr = malloc(sizeof(*fr)); + if ( (file_fopen(fr,fs,"file.r",MODE_READ)) != 0){ + printf("Unable to open the file file.r\n"); + return(-1); + } + + out=fopen("REG_FILE_16_OUT","w"); + + c=0; + while( (r=file_fread(fr,c,4096,buf)) != 0){ + c+=r; + fwrite(buf,r,1,out); + } + file_fclose(fr); + fclose(out); + fs_umount(fs); + break; + + case '1': + + lfile = malloc(sizeof(*lfile)); + ioman = malloc(sizeof(*ioman)); + disc = malloc(sizeof(*disc)); + part = malloc(sizeof(*part)); + + if_initInterface(lfile,"regtest.32"); + ioman_init(ioman,lfile,0); + disc_initDisc(disc,ioman); + memClr(disc->partitions,sizeof(PartitionField)*4); + disc->partitions[0].type=0x0B; + disc->partitions[0].LBA_begin=0; + disc->partitions[0].numSectors=lfile->sectorCount; + part_initPartition(part,disc); + + fs = malloc(sizeof(*fs)); + if( (fs_initFs(fs,part)) != 0){ + printf("Unable to init the filesystem\n"); + return(-1); + } + fr = malloc(sizeof(*fr)); + if ( (file_fopen(fr,fs,"file.r",MODE_READ)) != 0){ + printf("Unable to open the file file.r\n"); + return(-1); + } + + out=fopen("REG_FILE_32_OUT","w"); + + c=0; + while( (r=file_fread(fr,c,4096,buf)) != 0){ + c+=r; + fwrite(buf,r,1,out); + } + file_fclose(fr); + fclose(out); + fs_umount(fs); + + break; + + case '2': + + lfile = malloc(sizeof(*lfile)); + ioman = malloc(sizeof(*ioman)); + disc = malloc(sizeof(*disc)); + part = malloc(sizeof(*part)); + fs = malloc(sizeof(*fs)); + fr = malloc(sizeof(*fr)); + fw = malloc(sizeof(*fw)); + + if_initInterface(lfile,"regtestrw.32"); + ioman_init(ioman,lfile,0); + disc_initDisc(disc,ioman); + memClr(disc->partitions,sizeof(PartitionField)*4); + disc->partitions[0].type=0x0B; + disc->partitions[0].LBA_begin=0; + disc->partitions[0].numSectors=lfile->sectorCount; + part_initPartition(part,disc); + + fs = malloc(sizeof(*fs)); + if( (fs_initFs(fs,part)) != 0){ + printf("Unable to init the filesystem\n"); + return(-1); + } + + if((file_fopen(fr,fs,"file.r",'r'))!=0){ + printf("Unable to open %s for reading...\n","file.r"); + exit(0); + } + if((file_fopen(fw,fs,"file.w",'w'))!=0){ + printf("Unable to open %s for writing...\n","file.w"); + exit(0); + } + + ir = atoi(argv[2]); + + while((r = file_read(fr,ir,buf))>0){ + file_write(fw,r,buf); + } + + file_fclose(fr); + file_fclose(fw); + + if((file_fopen(fr,fs,"file.w",'r'))!=0){ + printf("Unable to open %s for reading...\n","file.w"); + exit(0); + } + + out=fopen("REG_FILE_RW32_OUT","w"); + + while((r = file_read(fr,ir/2+3,buf))>0){ + fwrite(buf,1,r,out); + } + + fclose(out); + file_fclose(fr); + fs_umount(fs); + + break; + + case '3': + lfile = malloc(sizeof(*lfile)); + ioman = malloc(sizeof(*ioman)); + disc = malloc(sizeof(*disc)); + part = malloc(sizeof(*part)); + + if_initInterface(lfile,"regtest.12"); + ioman_init(ioman,lfile,0); + disc_initDisc(disc,ioman); + memClr(disc->partitions,sizeof(PartitionField)*4); + disc->partitions[0].type=0x0B; + disc->partitions[0].LBA_begin=0; + disc->partitions[0].numSectors=lfile->sectorCount; + part_initPartition(part,disc); + + fs = malloc(sizeof(*fs)); + if( (fs_initFs(fs,part)) != 0){ + printf("Unable to init the filesystem\n"); + return(-1); + } + + fr = malloc(sizeof(*fr)); + if ( (file_fopen(fr,fs,"file.r",MODE_READ)) != 0){ + printf("Unable to open the file file.r\n"); + return(-1); + } + + out=fopen("REG_FILE_12_OUT","w"); + + c=0; + while( (r=file_fread(fr,c,4096,buf)) != 0){ + c+=r; + fwrite(buf,r,1,out); + } + file_fclose(fr); + fclose(out); + fs_umount(fs); + + break; + + case '4': + + lfile = malloc(sizeof(*lfile)); + ioman = malloc(sizeof(*ioman)); + disc = malloc(sizeof(*disc)); + part = malloc(sizeof(*part)); + fs = malloc(sizeof(*fs)); + fr = malloc(sizeof(*fr)); + fw = malloc(sizeof(*fw)); + + if_initInterface(lfile,"regtestrw.12"); + ioman_init(ioman,lfile,0); + disc_initDisc(disc,ioman); + memClr(disc->partitions,sizeof(PartitionField)*4); + disc->partitions[0].type=0x0B; + disc->partitions[0].LBA_begin=0; + disc->partitions[0].numSectors=lfile->sectorCount; + part_initPartition(part,disc); + + fs = malloc(sizeof(*fs)); + if( (fs_initFs(fs,part)) != 0){ + printf("Unable to init the filesystem\n"); + return(-1); + } + + if((file_fopen(fr,fs,"file.r",'r'))!=0){ + printf("Unable to open %s for reading...\n","file.r"); + exit(0); + } + if((file_fopen(fw,fs,"file.w",'w'))!=0){ + printf("Unable to open %s for writing...\n","file.w"); + exit(0); + } + + ir = atoi(argv[2]); + + while((r = file_read(fr,ir,buf))>0){ + file_write(fw,r,buf); + } + + fflush(stdout); + + file_fclose(fr); + file_fclose(fw); + + if((file_fopen(fr,fs,"file.w",'r'))!=0){ + printf("Unable to open %s for reading...\n","file.w"); + exit(0); + } + + out=fopen("REG_FILE_RW12_OUT","w"); + + while((r = file_read(fr,ir/2+3,buf))>0){ + fwrite(buf,1,r,out); + } + + fclose(out); + file_fclose(fr); + fs_umount(fs); + + break; + + default: + printf("Unknown test\n"); + + } + return(0); +} +/*****************************************************************************/ + +euint16 efsl_getYear(void) +{ + return(2005); +} +/*****************************************************************************/ + +euint8 efsl_getMonth(void) +{ + return(5); +} +/*****************************************************************************/ + +euint8 efsl_getDay(void) +{ + return(11); +} +/*****************************************************************************/ + +euint8 efsl_getHour(void) +{ + return(13); +} +/*****************************************************************************/ + +euint8 efsl_getMinute(void) +{ + return(14); +} +/*****************************************************************************/ + +euint8 efsl_getSecond(void) +{ + return(40); +} +/*****************************************************************************/ + + diff --git a/src/ersky9x/libraries/fat/efsl/src/time.c b/src/ersky9x/libraries/fat/efsl/src/time.c new file mode 100644 index 000000000..6193a4894 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/time.c @@ -0,0 +1,88 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : time.c * +* Description : This file contains functions for time support * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "time.h" +/*****************************************************************************/ + +euint16 fs_makeDate(void) +{ +#ifndef DATE_TIME_SUPPORT + return(0); +#else + euint8 m,d; + euint16 y; + + y = time_getYear()-1980; + m = time_getMonth(); + d = time_getDay(); + + return( + (y>127?127<<9:(y&0x3F)<<9) | + ((m==0||m>12)?1:(m&0xF)<<5) | + ((d==0||d>31)?1:(d&0x1F)) + ); +#endif +} +/*****************************************************************************/ + +euint16 fs_makeTime(void) +{ +#ifndef DATE_TIME_SUPPORT + return(0); +#else + euint8 s,m,h; + + s = time_getSecond(); + m = time_getMinute(); + h = time_getHour(); + + return( + (h>23?0:(h&0x1F)<<11) | + (m>59?0:(m&0x3F)<<5) | + (s>59?0:(s-s%2)/2) + ); +#endif +} +/*****************************************************************************/ + +euint8 fs_hasTimeSupport(void) +{ +#ifdef DATE_TIME_SUPPORT + return(1); +#else + return(0); +#endif +} +/*****************************************************************************/ + + diff --git a/src/ersky9x/libraries/fat/efsl/src/ui.c b/src/ersky9x/libraries/fat/efsl/src/ui.c new file mode 100644 index 000000000..7a3530e52 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/src/ui.c @@ -0,0 +1,230 @@ +/*****************************************************************************\ +* efs - General purpose Embedded Filesystem library * +* --------------------- ----------------------------------- * +* * +* Filename : ui.c * +* Description : This file contains functions which will be presented to the * +* user of this library. * +* * +* This program is free software; you can redistribute it and/or * +* modify it under the terms of the GNU General Public License * +* as published by the Free Software Foundation; version 2 * +* of the License. * + * +* This program is distributed in the hope that it will be useful, * +* but WITHOUT ANY WARRANTY; without even the implied warranty of * +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * +* GNU General Public License for more details. * +* * +* As a special exception, if other files instantiate templates or * +* use macros or inline functions from this file, or you compile this * +* file and link it with other works to produce a work based on this file, * +* this file does not by itself cause the resulting work to be covered * +* by the GNU General Public License. However the source code for this * +* file must still be made available in accordance with section (3) of * +* the GNU General Public License. * +* * +* This exception does not invalidate any other reasons why a work based * +* on this file might be covered by the GNU General Public License. * +* * +* (c)2006 Lennart Yseboodt * +* (c)2006 Michael De Nil * +\*****************************************************************************/ + +/*****************************************************************************/ +#include "ui.h" +/*****************************************************************************/ + +/***************************************************************************** + * short listfiles(char *dir) + * + * Deschription: This function returns the number of files / directories + * inside the given directory. + * + * Return value: number of files/directories in the given directory or -1 + * if directory does not exist. +\*****************************************************************************/ + +short listFiles(FileSystem *fs, char *dirname) +{ + unsigned long startCluster; + unsigned char fileEntryCount; + unsigned short counter=0; + unsigned long offset=0; + FileRecord fileEntry; + FileLocation loc; + unsigned char buf[512]; + File dir; + unsigned short i; + + /* Find out if we are searching in the root dir or in */ + if(dirname[0]=='/' && dirname[1]=='\0') + { + if( (fs->type == FAT12) || (fs->type == FAT16) ) + { + for(i=0;i<=(fs->volumeId.RootEntryCount/16);i++) + { + loc.Sector=fs->FirstSectorRootDir + i; + part_readBuf(fs->part,loc.Sector,buf); + /* I STOPPED HERE*/ + /* FIXME */ + } + } + } + else /* Normal directory */ + { + /* Check if path given is a directory */ + if(fs_findFile(fs,dirname,&loc,0)!=2) + { + FUNC_OUT((TXT(""))); + return(-1); + } + + /* Find out what the startcluster of the directory is */ + part_readBuf(fs->part,loc.Sector, buf); + fileEntry = *(((FileRecord*)buf) + loc.Offset); + startCluster = (((unsigned long)fileEntry.FirstClusterHigh)<<16) + + fileEntry.FirstClusterLow; + + /* Init of dir */ + dir.fs=fs; + dir.Cache.LogicCluster=-1; + dir.Cache.FirstCluster=startCluster; + dir.DirEntry.Attribute=ATTR_DIRECTORY; + + while((file_fread(&dir,offset,512,buf))) + { + DBG((TXT("Read 512 bytes from dir with offset %li.\n"),offset)); + for(fileEntryCount=0;fileEntryCount<16;fileEntryCount++) + { + fileEntry = *(((FileRecord*)buf) + fileEntryCount); + if( !( (fileEntry.Attribute & 0x0F) == 0x0F ) ) + { + if + ( + (fileEntry.FileName[0]>='A' && fileEntry.FileName[0]<='Z') + || + (fileEntry.FileName[0]>='0' && fileEntry.FileName[0]<='9') + ) + { + DBG((TXT("Filename: %s\n"),fileEntry.FileName)); + counter++; + } + } + } + offset+=512; + } + } + + FUNC_OUT((TXT(""))); + return(counter); + + return(-1); +} +/*****************************************************************************/ + +/* **************************************************************************** + * esint16 rmfile(FileSystem *fs,euint8* filename) + * Description: This function takes a filename as argument and deletes it, + * by freeing it's clusterchain, and deleting it's entry from the directory. + * Return value: 0 on success, -1 on errors, like file not found. +*/ +esint16 rmfile(FileSystem *fs,euint8* filename) +{ + FileLocation loc; + ClusterChain cache; + euint8* buf; + euint32 firstCluster=0; + + if((fs_findFile(fs,(eint8*)filename,&loc,0))==1){ + buf=part_getSect(fs->part,loc.Sector,IOM_MODE_READWRITE); + firstCluster = ex_getb16(buf,loc.Offset*32+20); + firstCluster <<= 16; + firstCluster += ex_getb16(buf,loc.Offset*32+26); + /* Bugfix: + * By clearing the entire structure, you mark end of directory. + * If this is not the case, files that are further away cannot + * be opened anymore by implementations that follow the spec. */ + /*memClr(buf+(loc.Offset*32),32);*/ + *(buf+(loc.Offset*32)+0) = 0xE5; /* Mark file deleted */ + part_relSect(fs->part,buf); + cache.DiscCluster = cache.LastCluster = cache.Linear = cache.LogicCluster = 0; + cache.FirstCluster = firstCluster; + fat_unlinkClusterChain(fs,&cache); + return(0); + } + return(-1); +} + +/*****************************************************************************/ +esint8 mkdir(FileSystem *fs,eint8* dirname) +{ + FileLocation loc; + FileRecord direntry; + euint32 nc,parentdir; + euint8* buf; + eint8 ffname[11]; + + if( fs_findFile(fs,dirname,&loc,&parentdir) ){ + return(-1); + } + if(parentdir==0)return(-2); + + if(!fs_findFreeFile(fs,dirname,&loc,0))return(-3); + + /* You may never search for a free cluster, and the call + * functions that may cause changes to the FAT table, that + * is why getNextFreeCluster has to be called AFTER calling + * fs_findFreeFile, which may have to expand a directory in + * order to store the new filerecord !! + */ + + nc = fs_getNextFreeCluster(fs,fs_giveFreeClusterHint(fs)); + if(nc==0)return(0); + + fs_clearCluster(fs,nc); + + buf = part_getSect(fs->part,loc.Sector,IOM_MODE_READWRITE); + + dir_getFatFileName(dirname,ffname); + memClr(&direntry,sizeof(direntry)); + memCpy(ffname,&direntry,11); + direntry.FileSize = 0; + direntry.FirstClusterHigh=nc>>16; + direntry.FirstClusterLow=nc&0xFFFF; + direntry.Attribute = ATTR_DIRECTORY; + memCpy(&direntry,buf+(32*loc.Offset),32); + + part_relSect(fs->part,buf); + + buf = part_getSect(fs->part,fs_clusterToSector(fs,nc),IOM_MODE_READWRITE); + + memClr(&direntry,sizeof(direntry)); + memCpy(". ",&direntry,11); + direntry.Attribute = ATTR_DIRECTORY; + direntry.FileSize = 0; + direntry.FirstClusterHigh=nc>>16; + direntry.FirstClusterLow=nc&0xFFFF; + memCpy(&direntry,buf,32); + + if(fs->type == FAT32 && parentdir == fs->volumeId.RootCluster){ + parentdir = 0; + } + if(fs->type != FAT32 && parentdir<=1){ + parentdir = 0; + } + + memClr(&direntry,sizeof(direntry)); + memCpy(".. ",&direntry,11); + direntry.Attribute = ATTR_DIRECTORY; + direntry.FileSize = 0; + direntry.FirstClusterHigh=parentdir>>16; + direntry.FirstClusterLow=parentdir&0xFFFF; + memCpy(&direntry,buf+32,32); + + part_relSect(fs->part,buf); + + fat_setNextClusterAddress(fs,nc,fat_giveEocMarker(fs)); + + return(0); +} diff --git a/src/ersky9x/libraries/fat/efsl/testfiles/doregtest b/src/ersky9x/libraries/fat/efsl/testfiles/doregtest new file mode 100644 index 000000000..43a09298a --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/testfiles/doregtest @@ -0,0 +1,49 @@ +#!/bin/bash + +echo "Running file READ test on FAT 16 : " +cp regtest.orig.16 regtest.16 +rm -f REG_FILE_16_OUT +time ./regtest 0 +echo "a0d4606add9362f5bc550b6f22fb2626 Reference md5sum" +md5sum REG_FILE_16_OUT +echo "" + +echo "Running file READ test on FAT 32 : " +cp regtest.orig.32 regtest.32 +rm -f REG_FILE_32_OUT +time ./regtest 1 +echo "498960730a03a065c090d8c14a17bc61 Reference md5sum" +md5sum REG_FILE_32_OUT +echo "" + +echo "Running READ/WRITE > REREAD test on FAT32 : " +cp regtestrw.orig.32 regtestrw.32 +rm -f REG_FILE_RW32_OUT +time ./regtest 2 512 +echo "adbba484e04d238f0617365415d54364 Reference md5sum" +md5sum REG_FILE_RW32_OUT +echo "" + +echo "Running READ/WRITE > REREAD test on FAT32 w/ 1001 bpr: " +cp regtestrw.orig.32 regtestrw.32 +rm -f REG_FILE_RW32_OUT +time ./regtest 2 1001 +echo "adbba484e04d238f0617365415d54364 Reference md5sum" +md5sum REG_FILE_RW32_OUT +echo "" + +echo "Running READ test on FAT12: " +cp regtestrw.orig.12 regtest.12 +rm -f REG_FILE_12_OUT +time ./regtest 3 +echo "c49cc8382aaef52f10f0ac4f26213333 Reference md5sum" +md5sum REG_FILE_12_OUT +echo "" + +echo "Running READ/WRITE > REREAD test on FAT12 w/directory : " +cp regtestrw.orig.12 regtestrw.12 +rm -f REG_FILE_RW12_OUT +time ./regtest 4 512 +echo "c49cc8382aaef52f10f0ac4f26213333 Reference md5sum" +md5sum REG_FILE_RW12_OUT +echo "" \ No newline at end of file diff --git a/src/ersky9x/libraries/fat/efsl/testfiles/doregtest2 b/src/ersky9x/libraries/fat/efsl/testfiles/doregtest2 new file mode 100644 index 000000000..83bceb299 --- /dev/null +++ b/src/ersky9x/libraries/fat/efsl/testfiles/doregtest2 @@ -0,0 +1,195 @@ +#!/bin/sh + +####################################################### +curdir=`pwd` +workdir="/tmp/regtest" +copydir="/usr/src/linux/drivers/firmware/" +mkfs_vfat="/usr/sbin/mkfs.vfat" +efsdir="/home/len/prg/efsl/efsl-0.2/" +conffile=$efsdir/conf/config.h +RANDMAX=32767 + +sizestart=10 +sizestepmax=1500 +sizestop=5000 + +iomanstart=1 +iomanstepmax=10 +iomanstop=50 + +preallocstart=0 +preallocstepmax=40 +preallocstop=5 +####################################################### + +mountfail() +{ + echo "" + echo "Could not mount filesystems correctly." + echo "Please make sure the following lines are in your /etc/fstab:" + echo -e "\t$workdir/read.bin\t$workdir/read\tmsdos\trw,user,noauto,loop\t0\t0" + echo -e "\t$workdir/write.bin\t$workdir/write\tmsdos\trw,user,noauto,loop\t0\t0" + echo "" + exit -1 +} + +sizetest() +{ + cd $workdir + rm -rf $workdir/write/* + for file in $(ls $workdir/read/) + do + # Read + if $efsdir/linuxutils/cpo $workdir/read.bin $file $workdir/out $1; then a=1; else + echo "cpo returned error." + exit -1 + fi + checksum1=$(/usr/bin/md5sum $workdir/read/$file | cut -d ' ' -f 1) + checksum2=$(/usr/bin/md5sum $workdir/out | cut -d ' ' -f 1) + if [ $checksum1 = $checksum2 ] + then +# echo -ne "\nReading $file from $workdir/read.bin with bufsize $1: " +# echo -e "Ok :-)" + a=1 + else + echo -ne "\nReading $file from $workdir/read.bin with bufsize $1: " + echo -e "FAILED :-(" + exit -1 + fi + + # Write + umount $workdir/write + if $efsdir/linuxutils/cpi $workdir/write.bin $workdir/read/$file $file $1; then a=1; else + echo "cpi returned error" + exit -1 + fi + mount $workdir/write + checksum1=$(/usr/bin/md5sum $workdir/read/$file | cut -d ' ' -f 1) + checksum2=$(/usr/bin/md5sum $workdir/write/$file | cut -d ' ' -f 1) + if [ $checksum1 = $checksum2 ] + then +# echo -ne "\nWriting of $file into $workdir/write.bin with bufsize $1: " +# echo -e "Ok :-)" + a=1 + else + echo -ne "\nWriting of $file into $workdir/write.bin with bufsize $1: " + echo -e "FAILED :-(" + exit -1 + fi + done +} + +runtest() +{ + echo -e "\nTesting with on FAT$2 with IOMAN_NUMBUFFER = $1 & CLUSTER_PREALLOC = $3." + echo -e "--------------------------------------------------------------------------" + /bin/rm -f $conffile + /bin/touch $conffile + echo "#ifndef __EFSL_CONFIG_H__" >> $conffile + echo "#define __EFSL_CONFIG_H__" >> $conffile + echo "#define HW_ENDPOINT_LINUX64" >> $conffile + echo "#define IOMAN_NUMBUFFER $1" >> $conffile + echo "#define CLUSTER_PREALLOC_FILE $3" >> $conffile + echo "#define CLUSTER_PREALLOC_DIRECTORY" $3 >> $conffile + echo "#define IOMAN_NUMITERATIONS 3" >> $conffile + echo "#define IOMAN_DO_MEMALLOC" >> $conffile + echo "#define LITTLE_ENDIAN" >> $conffile + echo "#define LIST_MAXLENFILENAME 100" >> $conffile + #echo "#define DEBUG" >> $conffile + echo "#endif" >> $conffile + + tmp=`pwd` + cd $efsdir + /usr/bin/make -f $efsdir/Makefile-LINUX clean lib utils > /dev/null + cd $tmp + + size=$sizestart + while [ "$size" -le $sizestop ] + do + echo -n "Copying all files on FAT$2 with bufsize=$size: "; + sizetest $size +# if [ "$size" -le 1024 ] +# then +# if [ "$size" -eq 1024 ]; then size=4096; fi +# if [ "$size" -eq 512 ]; then size=1024; fi +# if [ "$size" -eq 1 ]; then size=512; fi +# else + sizestep=$sizestepmax*$RANDOM/$RANDMAX + size=$(($size+$sizestep)) +# fi + echo "Ok :-)" + done +} + +iomantest() +{ + prealloc=$preallocstart + while [ "$prealloc" -le $preallocstop ] + do + runtest $1 $2 $prealloc +# if [ "$prealloc" -le 3 ] +# then +# prealloc=$(($prealloc+1)) +# else + preallocstep=$preallocstepmax*$RANDOM/$RANDMAX + prealloc=$(($prealloc+$preallocstep)) +# fi + done +} + +echo "#################################################" +echo "# EFSL -- REGTEST 2 #" +echo "# ----------------------- #" +echo "# This test will create a FAT12/16/32 fs on #" +echo "# which it will copy some files and read them #" +echo "# back in with the efs library. #" +echo "#################################################" +echo "" + +/bin/umount $workdir/read 2> /dev/null +/bin/umount $workdir/write 2> /dev/null +rm -rf $workdir +/bin/mkdir $workdir +/bin/mkdir $workdir/read +/bin/mkdir $workdir/write +cd $workdir + +for fs in 32 16 12 +do + echo "" + echo "#################################################" + echo "# FAT$fs #" + echo "#################################################" + echo "" + if [ "$fs" -eq 12 ]; then fssize=25; else fssize=42; fi + /bin/dd if=/dev/zero of=./read.bin bs=1024 count=$((1024*$fssize)) > /dev/null 2> /dev/null + /bin/dd if=/dev/zero of=./write.bin bs=1024 count=$((1024*$fssize)) > /dev/null 2> /dev/null + $mkfs_vfat -F$fs read.bin > /dev/null + $mkfs_vfat -F$fs write.bin > /dev/null + + if /bin/mount $workdir/read; then echo "$workdir/read mounted correctly"; else mountfail; fi + if /bin/mount $workdir/write; then echo "$workdir/write mounted correctly"; else mountfail; fi + + # Copy files in read + /bin/cp $copydir/* $workdir/read/ + /bin/umount $workdir/read + /bin/mount $workdir/read + + iomansize=$iomanstart + while [ "$iomansize" -le $iomanstop ] + do + iomantest $iomansize $fs + if [ "$iomansize" -le 5 ] + then + iomansize=$(($iomansize+1)) + else + iomanstep=$iomanstepmax*$RANDOM/$RANDMAX + iomansize=$(($iomansize+$iomanstep)) + fi + done + + /bin/umount $workdir/read + /bin/umount $workdir/write +done + +cd $curdir diff --git a/src/ersky9x/libraries/fat/fatfs/doc/00index_e.html b/src/ersky9x/libraries/fat/fatfs/doc/00index_e.html new file mode 100644 index 000000000..63ebfcd61 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/00index_e.html @@ -0,0 +1,104 @@ + + + + + + + + + +ELM - FAT File System Module + + + +

FAT File System Module

+
+ + + + +
+

Application Interface

+

FatFs module provides following functions.

+ +
+ + +
+

Disk I/O Interface

+

Since the FatFs module is completely separated from disk I/O layer, it requires following functions to lower layer to read/write the physical disk and to get current time. The low level disk I/O module is not a part of FatFs module and it must be provided by user. The sample drivers are also available in the resources.

+ +
+ + +
+

Resources

+

The FatFs module is a free software and is opened for education, research and development. You can use, modify and/or republish it for personal, non-profit or commercial use without any restriction under your responsibility.

+ +
+ + +
+

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/00index_j.html b/src/ersky9x/libraries/fat/fatfs/doc/00index_j.html new file mode 100644 index 000000000..f38e79389 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/00index_j.html @@ -0,0 +1,104 @@ + + + + + + + + + +ELM - ”Ä—pFATƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€Eƒ‚ƒWƒ…[ƒ‹ + + + +

FATƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€Eƒ‚ƒWƒ…[ƒ‹

+
+ +
+layer +

¬‹K–Í‚È‘g‚Ýž‚݃VƒXƒeƒ€Œü‚¯‚̔ėpFATƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€Eƒ‚ƒWƒ…[ƒ‹‚Å‚·BANSI C€‹’‚Ńn[ƒhƒEƒFƒAEƒA[ƒLƒeƒNƒ`ƒƒ‚ɂ͈ˑ¶‚µ‚È‚¢‚Ì‚ÅA•K—v‚ȃ[ƒNEƒGƒŠƒA‚ªŠm•Û‚Å‚«‚ê‚ÎA8051, PIC, AVR, SH, Z80, H8, ARM‚ȂLjÀ‰¿‚ȃ}ƒCƒRƒ“‚Å‚»‚Ì‚Ü‚ÜŽg—p‰Â”\‚Å‚·B

+

FatFsƒ‚ƒWƒ…[ƒ‹‚Ì“Á’¥

+
    +
  • FAT12, FAT16, FAT32‚ɑΉž
    • +
  • •¡”‚̃{ƒŠƒ…[ƒ€(•¨—ƒhƒ‰ƒCƒuE‹æ‰æ)‚ɑΉž
    • +
  • 2Ží—Þ‚Ì‹æ‰æƒtƒH[ƒ}ƒbƒg(FDISK‚ÆSuper-floppy)‚ɑΉž
    • +
  • ‘½‚­‚Ì\¬ƒIƒvƒVƒ‡ƒ“: +
      +
    • ’·‚¢ƒtƒ@ƒCƒ‹–¼(LFN)
      • +
    • •¡”‚̃R[ƒhEƒy[ƒW
      • +
    • ƒ}ƒ‹ƒ`ƒ^ƒXƒN‘Ήž
      • +
    • ƒ}ƒ‹ƒ`EƒZƒNƒ^EƒTƒCƒY‘Ήž
      • +
    • ƒŠ[ƒhƒIƒ“ƒŠ[Aˆê•”‹@”\‚ÌíœAƒoƒbƒtƒ@\¬“™...
      • +
    +
    • +
+
+ + +
+

ãˆÊƒŒƒCƒ„I/F

+

FatFsƒ‚ƒWƒ…[ƒ‹‚ÍAŽŸ‚̃tƒ@ƒCƒ‹‘€ìŠÖ”‚ð’ñ‹Ÿ‚µ‚Ä‚¢‚Ü‚·B

+
    +
  • f_mount - ƒ[ƒNƒGƒŠƒA‚Ì“o˜^Eíœ
    • +
  • f_open - ƒtƒ@ƒCƒ‹‚̃I[ƒvƒ“Eì¬
    • +
  • f_close - ƒtƒ@ƒCƒ‹‚̃Nƒ[ƒY
    • +
  • f_read - ƒtƒ@ƒCƒ‹‚Ì“Ç‚Ýž‚Ý
    • +
  • f_write - ƒtƒ@ƒCƒ‹‚Ì‘‚«ž‚Ý
    • +
  • f_lseek - R/Wƒ|ƒCƒ“ƒ^‚̈ړ®, ƒtƒ@ƒCƒ‹EƒTƒCƒY‚ÌŠg’£
    • +
  • f_truncate - ƒtƒ@ƒCƒ‹EƒTƒCƒY‚ÌØ‚è‹l‚ß
    • +
  • f_sync - ƒLƒƒƒbƒVƒ…‚³‚ꂽƒf[ƒ^‚̃tƒ‰ƒbƒVƒ…
    • +
  • f_opendir - ƒfƒBƒŒƒNƒgƒŠ‚̃I[ƒvƒ“
    • +
  • f_readdir - ƒfƒBƒŒƒNƒgƒŠ‚Ì“Ç‚Ýo‚µ
    • +
  • f_getfree - ƒfƒBƒXƒN‹ó‚«—̈æ‚̎擾
    • +
  • f_stat - ƒtƒ@ƒCƒ‹EƒXƒe[ƒ^ƒX‚̎擾
    • +
  • f_mkdir - ƒfƒBƒŒƒNƒgƒŠ‚Ìì¬
    • +
  • f_unlink - ƒtƒ@ƒCƒ‹/ƒfƒBƒŒƒNƒgƒŠ‚Ìíœ
    • +
  • f_chmod - ƒtƒ@ƒCƒ‹/ƒfƒBƒŒƒNƒgƒŠ‚Ì‘®«‚Ì•ÏX
    • +
  • f_utime - ƒtƒ@ƒCƒ‹/ƒfƒBƒŒƒNƒgƒŠ‚̃^ƒCƒ€ƒXƒ^ƒ“ƒv‚Ì•ÏX
    • +
  • f_rename - ƒtƒ@ƒCƒ‹/ƒfƒBƒŒƒNƒgƒŠ‚Ì–¼‘O•ÏXEˆÚ“®
    • +
  • f_mkfs - ƒfƒBƒXƒN‚̃tƒH[ƒ}ƒbƒg
    • +
  • f_chdir - ƒJƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚Ì•ÏX
    • +
  • f_chdrive - ƒJƒŒƒ“ƒgEƒhƒ‰ƒCƒu‚Ì•ÏX
    • +
  • f_forward - ƒtƒ@ƒCƒ‹Eƒf[ƒ^‚ðƒXƒgƒŠ[ƒ€ŠÖ”‚É’¼Ú“]‘—‚·‚é
    • +
  • f_gets - •¶Žš—ñ‚Ì“Ç‚Ýž‚Ý
    • +
  • f_putc - •¶Žš‚Ì‘‚«ž‚Ý
    • +
  • f_puts - •¶Žš—ñ‚Ì‘‚«ž‚Ý
    • +
  • f_printf - ‘Ž®‰»•¶Žš—ñ‚Ì‘‚«ž‚Ý
    • +
+
+ + +
+

‰ºˆÊƒŒƒCƒ„I/F

+

FatFsƒ‚ƒWƒ…[ƒ‹‚ÍA•¨—ƒhƒ‰ƒCƒu‚ւ̃AƒNƒZƒX‚⌻ݎž‚𓾂邽‚ßA‰ºˆÊƒŒƒCƒ„‚ÉŽŸ‚̃Cƒ“ƒ^[ƒtƒF[ƒX‚ð—v‹‚µ‚Ü‚·B‚±‚ê‚ç‚̃Cƒ“ƒ^[ƒtƒF[ƒX‚ðŽ‚‚»‚ꂼ‚ê‚Ì‹L˜^ƒƒfƒBƒA‚ɑΉž‚µ‚½ƒfƒBƒXƒNI/Oƒ‚ƒWƒ…[ƒ‹‚ÍAƒ†[ƒU‚É‚æ‚è—pˆÓ‚·‚é•K—v‚ª‚ ‚è‚Ü‚·BŽ‘—¿‚ɃTƒ“ƒvƒ‹Eƒhƒ‰ƒCƒo‚ ‚èB

+
    +
  • disk_initialize - ƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚̉Šú‰»
    • +
  • disk_status - ƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚Ìó‘Ԏ擾
    • +
  • disk_read - ƒfƒBƒXƒN‚©‚ç‚Ì“Ç‚Ýž‚Ý
    • +
  • disk_write - ƒfƒBƒXƒN‚Ö‚Ì‘‚«ž‚Ý
    • +
  • disk_ioctl - ‚»‚Ì‘¼‚̃hƒ‰ƒCƒu§Œä
    • +
  • get_fattime - “ú•tEŽž‚̎擾
    • +
+
+ + +
+

Ž‘—¿

+

FatFsƒ‚ƒWƒ…[ƒ‹‚̓tƒŠ[Eƒ\ƒtƒgƒEƒFƒA‚Æ‚µ‚Ä‹³ˆçEŒ¤‹†EŠJ”­—p‚ÉŒöŠJ‚µ‚Ä‚¢‚Ü‚·B‚ǂ̂悤‚È—˜—p–Ú“IiŒÂlE”ñ¤—pE¤—pj‚Å‚àŽg—pE‰ü•ÏE”z•z‚ɂ‚¢‚Ĉê؂̧ŒÀ‚Í‚ ‚è‚Ü‚¹‚ñ‚ªA‘S‚Ä—˜—pŽÒ‚ÌÓ”C‚̉º‚Å‚Ì—˜—p‚Æ‚µ‚Ü‚·B

+ +
+ + +
+

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/css_e.css b/src/ersky9x/libraries/fat/fatfs/doc/css_e.css new file mode 100644 index 000000000..c49fb6bca --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/css_e.css @@ -0,0 +1,56 @@ +* {margin: 0; padding: 0; border-width: 0;} +body {margin: 8px; background-color: #e0ffff; font-color: black; font-family: serif; line-height: 133%; max-width: 1024px;} +a:link {color: blue;} +a:visited {color: darkmagenta;} +a:hover {background-color: #a0ffff;} +a:active {color: darkmagenta; position: relative; top: 1px; left: 1px;} +abbr {border-width: 1px;} + +p {margin: 0 0 0.3em 1em;} +em {font-style: normal; font-weight: bold; margin: 0 0.1em;} +pre em {font-style: italic; font-weight: normal;} +strong {} +pre {margin: 0.5em 1em; padding: 0.5em; line-height: 1.2em; background-color: white;} +tt {margin: 0 0.2em;} +ol {margin: 0 2em;} +ul {margin: 0 2em;} +dl {margin: 0 1em;} +dt {font-family: monospace;} +dl.par dt {margin: 0.5em 0 0 0 ; font-style: italic; } +dl.ret dt {margin: 0.5em 0 0 0 ; font-weight: bold;} +dd {margin: 0 2em;} +hr {border-width: 1px; margin: 1em;} +div.abst {font-family: sans-serif;} +div.para {clear: both; font-family: serif;} +.equ {text-indent: 0; margin: 1em 2em 1em;} +.indent {margin-left: 2em;} +.rset {float: right; margin: 0 0 0.5em 0.5em;} +.lset {float: left; margin: 0 0.5em 0.5em 0.5em;} +ul.flat li {list-style-type: none; margin: 0;} +a.imglnk img {border: 1px solid;} +.iequ {white-space: nowrap; font-weight: bold;} +.clr {clear: both;} +.it {font-style: italic;} +.mfd {font-size: 0.7em; padding: 0 1px; border: 1px solid; white-space : nowrap} + +h1 {line-height: 1em; font-size: 2em; font-family: sans-serif; padding: 0.3em 0 0.3em;} +p.hdd {float: right; text-align: right; margin-top: 0.5em;} +hr.hds {clear: both; margin-bottom: 1em;} + +h2 {font-size: 1.5em; font-family: sans-serif; margin: 0 0 0.5em;} +h3 {font-size: 1.5em; font-family: sans-serif; margin: 1.5em 0 0.5em;} +h4 {font-size: 1.2em; font-family: sans-serif; margin: 1em 0 0.2em;} +h5 {font-size: 1em; font-family: sans-serif; margin: 0.5em 0 0em;} +small {font-size: 80%;} +.indent {margin-left: 2em;} + +/* Tables */ +table {margin: 0.5em 1em; border-collapse: collapse; border-style: solid; border-width: 2px; border-color: black; } +th {background-color: white; border-style: solid; border-width: 1px 1px 2px; border-color: black; padding: 0 3px; vertical-align: top; white-space: nowrap;} +td {background-color: white; border-style: solid; border-width: 1px; border-color: black; padding: 0 3px; vertical-align: top; line-height: 1.3em;} +table.lst td:first-child {font-family: monospace;} +table.lst2 td {font-family: monospace;} +table caption {font-family: sans-serif; font-weight: bold;} +tr.lst3 td { border-width: 2px 1px 1px; } + +p.foot {clear: both; text-indent: 0; margin: 1em 0.5em 1em;} diff --git a/src/ersky9x/libraries/fat/fatfs/doc/css_j.css b/src/ersky9x/libraries/fat/fatfs/doc/css_j.css new file mode 100644 index 000000000..f7ef0d6f7 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/css_j.css @@ -0,0 +1,59 @@ +@charset "Shift_JIS"; +/* Common style sheet for Tech Notes */ + +* {margin: 0; padding: 0; border-width: 0;} +body {margin: 8px; background-color: #e0ffff; font-color: black; font-family:"‚l‚r ‚o–¾’©", serif; line-height: 150%; letter-spacing: 1px; max-width: 1024px;} +a:link {color: blue;} +a:visited {color: darkmagenta;} +a:hover {background-color: #a0ffff;} +a:active {color: darkmagenta; position: relative; top: 1px; left: 1px;} +abbr {border-width: 1px;} + +p {text-indent: 1em; margin: 0 0 0.3em 0.5em;} +em {font-style: normal; font-weight: bold; margin: 0 0.1em;} +pre em {font-style: italic; font-weight: normal;} +strong {} +pre {margin: 0.5em 1em; padding: 0.5em; line-height: 1.2em; letter-spacing: 0; background-color: white;} +tt {margin: 0 0.2em; letter-spacing: 0;} +ol {margin: 0 2em;} +ul {margin: 0 2em;} +dl {margin: 0 1em;} +dt {font-family: monospace;} +dl.par dt {margin: 0.5em 0 0 0 ; font-style: italic; letter-spacing: 0;} +dl.ret dt {margin: 0.5em 0 0 0 ; font-family: monospace; letter-spacing: 0; font-weight: bold;} +dd {margin: 0 2em;} +hr {border-width: 1px; margin: 1em;} +div.abst {font-family: "‚l‚r ‚oƒSƒVƒbƒN",sans-serif;} +div.para {clear: both; font-family: "‚l‚r ‚o–¾’©",serif;} +.equ {text-indent: 0; margin: 1em 2em 1em;} +.indent {margin-left: 2em;} +.rset {float: right; margin: 0 0 0.5em 0.5em;} +.lset {float: left; margin: 0 0.5em 0.5em 0.5em;} +ul.flat li {list-style-type: none; margin: 0;} +a.imglnk img {border: 1px solid;} +.iequ {white-space: nowrap; font-weight: bold;} +.clr {clear: both;} +.it {font-style: italic;} +.mfd {font-size: 0.7em; padding: 0 1px; border: 1px solid; white-space : nowrap} + +h1 {line-height: 1em; font-size: 2em; font-family: sans-serif; padding: 0.3em 0 0.3em;} +p.hdd {float: right; text-align: right; margin-top: 0.5em;} +hr.hds {clear: both; margin-bottom: 1em;} + +h2 {font-size: 1.5em; font-family: "‚l‚r ‚oƒSƒVƒbƒN",sans-serif; margin: 0 0 0.5em;} +h3 {font-size: 1.5em; font-family: "‚l‚r ‚oƒSƒVƒbƒN",sans-serif; margin: 1.5em 0 0.5em;} +h4 {font-size: 1.2em; font-family: "‚l‚r ‚oƒSƒVƒbƒN",sans-serif; margin: 1em 0 0.2em;} +h5 {font-size: 1em; font-family: "‚l‚r ‚oƒSƒVƒbƒN",sans-serif; margin: 0.5em 0 0em;} +small {font-size: 80%;} +.indent {margin-left: 2em;} + +/* Tables */ +table {margin: 0.5em 1em; border-collapse: collapse; border-style: solid; border-width: 2px; border-color: black; letter-spacing: 0;} +th {background-color: white; border-style: solid; border-width: 1px 1px 2px; border-color: black; padding: 0 3px; vertical-align: top;} +td {background-color: white; border-style: solid; border-width: 1px; border-color: black; padding: 0 3px; vertical-align: top; line-height: 1.3em;} +table.lst td:first-child {font-family: monospace; white-space: nowrap;} +table.lst2 td {font-family: monospace; white-space: nowrap;} +table caption {font-family: sans-serif; font-weight: bold;} +tr.lst3 td { border-width: 2px 1px 1px; } + +p.foot {clear: both; text-indent: 0; margin: 1em 0.5em 1em;} diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/appnote.html b/src/ersky9x/libraries/fat/fatfs/doc/en/appnote.html new file mode 100644 index 000000000..dc1b3d4ed --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/appnote.html @@ -0,0 +1,166 @@ + + + + + + + +FatFs Module Application Note + + + +

FatFs Module Application Note

+
+ +
+

Considerations on porting to various platform

+

The FatFs module is assuming following terms on portability.

+
    +
  • ANSI C
    +The FatFs module is a middleware that written in ANSI C. There is no platform dependence, so long as the compiler is in compliance with ANSI C.
    • +
  • Size of integer types
    +The FatFs module assumes that size of char/short/long are 8/16/32-bit and int is 16 or 32 bit. These correspondence are defined in integer.h. This will not be a problem on most compilers. When any conflict with existing definitions is occured, you must resolve it with care.
    • +
+
+ +
+

Memory Usage (R0.07c)

+ + + + + + + + + + + +
AVRH8/300HPICTLCS-870/CV850ESSH2ARM7TDMIIA-32
CompilerWinAVR(gcc)CH38C30(gcc)CC870CCA850SHCWinARM(gcc)MSC
_WORD_ACCESS10011001
ROM (Full, R/W)1196210433107531515377478707105847337
ROM (Min, R/W)74666799677299064901559965484787
ROM (Full, R/O)54004687480467443539379946763380
ROM (Min, R/O)38043527342150402561286732762533
RAM (Static)D*2 + 2D*4 + 2D*2 + 2D*2 + 2D*4 + 2D*4 + 2D*4 + 2D*4 + 2
RAM (Dynamic)
(_FS_TINY == 0)		D*560 +
F*544		D*560 +
F*550		D*560 +
F*544		D*560 +
F*550		D*560 +
F*550		D*560 +
F*550		D*560 +
F*550
RAM (Dynamic)
(_FS_TINY == 1)		D*560 +
F*32		D*560 +
F*36		D*560 +
F*32		D*560 +
F*32		D*560 +
F*36		D*560 +
F*36		D*560 +
F*36		D*560 +
F*36
+

These are the memory usage on some target systems with following condition. The memory sizes are in unit of byte, D means number of volumes and F means number of open files. All samples are optimezed in code size.

+
+_FS_READONLY     0 (R/W), 1 (R/O)
+_FS_MINIMIZE     0 (Full function), 3 (Minimized function)
+_USE_STRFUNC     0 (Disable string functions)
+_USE_MKFS        0 (Disable f_mkfs function)
+_USE_FORWARD     0 (Disable f_forward function)
+_CODE_PAGE       932 (Japanese Shift-JIS)
+_USE_LFN         0 (Disable LFN)
+_MAX_SS          512 (Single sector size)
+_FS_RPATH        0 (Disable relative path)
+_MULTI_PARTITION 0 (Single partition per drive)
+_FS_REENTRANT    0 (Disable reentrancy)
+
+
+ +
+

Module Size Reduction

+

Follwing table shows which function is removed by configuration options for the module size reduction.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Function_FS_MINIMIZE_FS_READONLY_USE_STRFUNC_FS_RPATH_USE_MKFS_USE_FORWARD
12310000
f_mount
f_open
f_close
f_read
f_writex
f_syncx
f_lseekx
f_opendirxx
f_readdirxx
f_statxxx
f_getfreexxxx
f_truncatexxxx
f_unlinkxxxx
f_mkdirxxxx
f_chmodxxxx
f_utimexxxx
f_renamexxxx
f_chdirx
f_chdrivex
f_mkfsxx
f_forwardx
f_putcxx
f_putsxx
f_printfxx
f_getsx
+
+ +
+

Long File Name

+

The FatFs module supports long file name (LFN) from revision 0.07. The two different file names, SFN and LFN, of a file is transparent in the file functions except for f_readdir function. To enable LFN feature, set _USE_LFN to 1 or 2, and add a Unicode code conversion function ff_convert and ff_wtoupper to the project. This function is available in cc*.c. The LFN feature requiers a certain working buffer in addition. The buffer size can be configured by _MAX_LFN corresponding to the available memory size. The size of long file name will reach up to 255 characters so that the _MAX_LFN should be set to 255 for full featured LFN operation. When the size of working buffer is insufficient for the given file name, the file function will fail with FR_INVALID_NAME. When enable the LFN feature with re-entrant feature, _USE_LFN must be set to 2. In this case, the file funciton allocates the working buffer on the stack. The working buffer occupies (_MAX_LFN + 1) * 2 bytes so that the caller's stack must be a sufficient size considering the working buffer.

+ + + + + + + + +
LFN cfg on ARM7
Code pageROM size [bytes]
SBCS+3721
932(Shift-JIS)+62609
936(GBK)+177797
949(Korean)+139857
950(Big5)+111497
+

When the LFN feature is enabled, the module size will be increased depends on the selected code page. Right table shows the difference in module size when LFN is enabled with some code pages. We are the Japanese, Chinese and Korean have tens of thousands of characters. Unfortunately, it requires a huge OEM-Unicode bidirectional conversion table and the module size will be drastically increased that shown in the table. As the result, the FatFs with LFN will not able to be implemented to most 8-bit microcontrollers including AVR. This is the reason why I had not been interested in implementing the LFN feature for a long time :-)

+

Note that the LFN feature on the FAT file system is a patent of Microsoft Corporation. When enable it on the commercial products, a license from Microsoft may be required depends on the final destination.

+
+ +
+

Re-entrancy

+

The file operations to the different volume can always work simultaneously regardless of re-entrancy setting. The re-entrancy to the same volume can be enabled with _FS_REENTRANT option. In this case, also the OS dependent synchronization object control functions, ff_cre_syncobj, ff_del_syncobj, ff_req_grant and ff_rel_grant must be added to the project. The sample code with documentation is available in syncobj.c.

+

When a file function is called while the volume is in use by any other task, the access is blocked until the task leaves file function. If wait time exceeded a period defined by _TIMEOUT, the file function will abort with FR_TIMEOUT. The timeout feature might not be supported on some RTOS.

+

There is an exception on f_mount and f_mkfs function. These functions are not re-entrant to the same volume. When use these functions, all other task must close the corresponding file on the volume and avoid to access the volume.

+

Note that this section describes on the re-entrancy of the FatFs module itself. There is no assumtion on the re-entrancy of low level disk I/O module.

+
+ +
+

Duplicated file access

+

FatFs module does not support the shareing controls of duplicated file access. It is permitted when open method to the file is only read mode. The duplicated open in write mode to a file is always prohibited and open file must not be renamed, deleted, otherwise the FAT structure on the volume can be collapted.

+
+ +
+

Performance effective file access

+

For good performance on reading/writing files on the small embedded system, application programmer should consider what process is done in the FatFs module. The file data on the disk is transferred in following sequence by f_read function.

+

Figure 1. Sector miss-aligned read (short)
+ +

+

Figure 2. Sector miss-aligned read (long)
+ +

+

Figure 3. Sector aligned read
+ +

+

The file I/O buffer means a sector buffer to read/write a partial data on the sector. The sector buffer is either file private sector buffer on each file object or shared sector buffer on the file system object. The buffer configuration option _FS_TINY determins which sector buffer is used for the file data transfer. When tiny buffer (1) is selected, data memory consumption is reduced 512 bytes each file object. In this case, FatFs module uses only a sector buffer on the file system object for file data transfer and FAT/directory access. The disadvantage of the tiny buffer configuration is: the FAT data cached in the sector buffer will be lost by file data transfer and it must be reloaded at every cluster boundary. However it will be suitable for most application from view point of the decent performance and low memory comsumption.

+

Figure 1 shows that partial sector data is transferred via the file I/O buffer. On long data transfer shown in Figure 2, middle of transfer data that covers one or more sector is transferred to application buffer directly. Figure 3 shows that the case of entier transfer data is aligned to the sector boundary. In this case, file I/O buffer is not used. On the direct transfer, the maximum extent of sectors are read with disk_read function at a time but the multi sector transfer never across the cluster boundary even if it is contiguous.

+

Therefore taking effort to sector aligned read/write accesss avoids buffered data transfer and the read/write performance will be improved. Besides the effect, cached FAT data will not be flushed by file data transfer on the tiny configuration so that it can achieve same performance as non tiny configuration with small memory footprint.

+
+ +
+

Critical Section

+

When write operation to the FAT file system is interrupted due to any accidental failure, such as sudden blackout, incorrect disk removal and unrecoverable disk error, the FAT structure can be collapted. Following images shows the critical section on the FatFs module.

+
+Figure 4. Long critical section
+fig.4 +
+
+Figure 5. Minimized critical section
+fig.5 +
+
+

An interruption in the red section can cause a cross link; as a result, the file/directory being changed may be lost. There is one or more possibility listed below when an interruption in the yellow section is occured.

+
    +
  • File data being rewrited is collapted.
    • +
  • A file being appended returns initial state.
    • +
  • A file created as new is gone.
    • +
  • A file created as new or in overwritten remains with length of zero.
    • +
  • Efficiency of disk use gets worse due to lost chain.
    • +
+

Each case does not affect the files that not in write mode open. To minimize risk of data loss, the critical section can be minimized like shown in Figure 5 by minimizing the time that file is opened in write mode or using f_sync function properly.

+
+ +
+

Unicode API

+

FatFs supports to switch the character encoding to Unicode on the API. For more information, refer to the description in the file name.

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/chdir.html b/src/ersky9x/libraries/fat/fatfs/doc/en/chdir.html new file mode 100644 index 000000000..cd4d8d7c1 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/chdir.html @@ -0,0 +1,81 @@ + + + + + + + +FatFs - f_chdir + + + + +
+

f_chdir

+

The f_chdir function changes the current directory of a drive.

+
+FRESULT f_chdir (
+  const XCHAR* Path /* Pointer to the path name */
+);
+
+
+ +
+

Parameters

+
+
Path
+
Pointer to the null-terminated string that specifies a directory to go.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The path name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_chdir function changes the current directory of the logical drive. The current directory of a drive is initialized to the root directory when the drive is auto-mounted. Note that the current directory is retained in the each file system object so that it also affects other tasks that using the drive. This function is available when _FS_RPATH == 1.

+
+ + +
+

Example

+
+    // Change current direcoty of the current drive (dir1 under root dir)
+    f_chdir("/dir1");
+
+    // Change current direcoty of drive 2 (parent dir)
+    f_chdir("2:..");
+
+
+ +
+

References

+

f_chdrive

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/chdrive.html b/src/ersky9x/libraries/fat/fatfs/doc/en/chdrive.html new file mode 100644 index 000000000..c411a62ed --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/chdrive.html @@ -0,0 +1,55 @@ + + + + + + + +FatFs - f_chdrive + + + + +
+

f_chdrive

+

The f_chdrive function changes the current drive.

+
+FRESULT f_chdrive (
+  BYTE Drive /* Logical drive number */
+);
+
+
+ +
+

Parameters

+
+
Drive
+
Specifies the logical drive number to be set as the current drive.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
+
+ + +
+

Description

+

The f_chdrive function changes the current drive. The initial value of the current drive number is 0. Note that the current drive is retained in a static variable so that it also affects other tasks that using the file functions. This function is available when _FS_RPATH == 1.

+
+ +
+

References

+

f_chdir

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/chmod.html b/src/ersky9x/libraries/fat/fatfs/doc/en/chmod.html new file mode 100644 index 000000000..99e5e6975 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/chmod.html @@ -0,0 +1,91 @@ + + + + + + + +FatFs - f_chmod + + + + +
+

f_chmod

+

The f_chmod function changes the attribute of a file or directory.

+
+FRESULT f_chmod (
+  const XCHAR* FileName, /* Pointer to the file or directory */
+  BYTE Attribute,        /* Attribute flags */
+  BYTE AttributeMask     /* Attribute masks */
+);
+
+
+ +
+

Parameters

+
+
FileName
+
Pointer to the null-terminated string that specifies a file or directory to be changed
+
Attribute
+
Attribute flags to be set in one or more combination of the following flags. The specified flags are set and others are cleard.
+ + + + + + +
AttributeDescription
AM_RDORead only
AM_ARCArchive
AM_SYSSystem
AM_HIDHidden
+
+
AttributeMask
+
Attribute mask that specifies which attribute is changed. The specified aattributes are set or cleard.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_FILE
+
Could not find the file.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The file name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_WRITE_PROTECTED
+
The medium is write protected.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_chmod function changes the attribute of a file or directory. This function is not available in read-only configuration and minimization level of >=1.

+
+ + +
+

Example

+
+    // Set read-only flag, clear archive flag and others are retained.
+    f_chmod("file.txt", AR_RDO, AR_RDO | AR_ARC);
+
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/close.html b/src/ersky9x/libraries/fat/fatfs/doc/en/close.html new file mode 100644 index 000000000..3c6f47f7d --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/close.html @@ -0,0 +1,62 @@ + + + + + + + +FatFs - f_close + + + + +
+

f_close

+

The f_close function closes an open file.

+
+FRESULT f_close (
+  FIL* FileObject     /* Pointer to the file object structure */
+);
+
+
+ +
+

Parameter

+
+
FileObject
+
Pointer to the open file object structure to be closed.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The file object has been closed successfuly.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The f_close function closes an open file object. If any data has been written to the file, the cached information of the file is written back to the disk. After the function succeeded, the file object is no longer valid and it can be discarded. If the file object has been opened in read-only mode, it may be discarded without closing process by this function.

+
+ + +
+

References

+

f_open, f_read, f_write, f_sync, FIL, FATFS

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/dinit.html b/src/ersky9x/libraries/fat/fatfs/doc/en/dinit.html new file mode 100644 index 000000000..3a2da87c3 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/dinit.html @@ -0,0 +1,45 @@ + + + + + + + +FatFs - disk_initialize + + + + +
+

disk_initialize

+

The disk_initialize function initializes the disk drive.

+
+DSTATUS disk_initialize (
+  BYTE Drive           /* Physical drive number */
+);
+
+
+ +
+

Parameter

+
+
Drive
+
Specifies the physical drive number to initialize.
+
+
+ + +
+

Return Values

+

This function returns a disk status as the result. For details of the disk status, refer to the disk_status function.

+

This function is called from volume mount process in the FatFs module to manage the media change. Application program must not call this function while FatFs module is active, or FAT structure on the drive may be collapted.

+
+ +
+

Description

+

The disk_initialize function initializes a physical drive. When the function succeeded, STA_NOINIT flag in the return value is cleard.

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/dioctl.html b/src/ersky9x/libraries/fat/fatfs/doc/en/dioctl.html new file mode 100644 index 000000000..942996768 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/dioctl.html @@ -0,0 +1,68 @@ + + + + + + + +FatFs - disk_ioctl + + + + +
+

disk_ioctl

+

The disk_ioctl function cntrols device specified features and miscellaneous functions other than disk read/write.

+
+DRESULT disk_ioctl (
+  BYTE Drive,      /* Drive number */
+  BYTE Command,    /* Control command code */
+  void* Buffer     /* Data transfer buffer */
+);
+
+
+ +
+

Parameters

+
+
Drive
+
Specifies the drive number (0-9).
+
Command
+
Specifies the command code.
+
Buffer
+
Pointer to the parameter buffer depends on the command code. When it is not used, specify a NULL pointer.
+
+
+ + +
+

Return Value

+
+
RES_OK (0)
+
The function succeeded.
+
RES_ERROR
+
Any error occured.
+
RES_PARERR
+
Invalid command code.
+
RES_NOTRDY
+
The disk drive has not been initialized.
+
+
+ + +
+

Description

+

The FatFs module uses only device independent commands described below. Any device dependent function is not used.

+ + + + + + +
CommandDescription
CTRL_SYNCMake sure that the disk drive has finished pending write process. When the disk I/O module has a write back cache, flush the dirty sector immediately. This function is not required in read-only configuration.

+
GET_SECTOR_SIZEReturns sector size of the drive into the WORD variable pointed by Buffer. This functions is not required in single sector size configuration, _MAX_SS is 512.
GET_SECTOR_COUNTReturns total sectors on the drive into the DWORD variable pointed by Buffer. This function is used in only f_mkfs function.
GET_BLOCK_SIZEReturns erase block size of the memory array in unit of sector into the DWORD variable pointed by Buffer. When the erase block size is unknown or magnetic disk device, return 1. This command is used in only f_mkfs function.
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/dread.html b/src/ersky9x/libraries/fat/fatfs/doc/en/dread.html new file mode 100644 index 000000000..bf26eb653 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/dread.html @@ -0,0 +1,58 @@ + + + + + + + +FatFs - disk_read + + + + +
+

disk_read

+

The disk_read function reads sector(s) from the disk drive.

+
+DRESULT disk_read (
+  BYTE Drive,          /* Physical drive number */
+  BYTE* Buffer,        /* Pointer to the read data buffer */
+  DWORD SectorNumber,  /* Start sector number */
+  BYTE SectorCount     /* Number of sectros to read */
+);
+
+
+ +
+

Parameters

+
+
Drive
+
Specifies the physical drive number.
+
Buffer
+
Pointer to the byte array to store the read data. The buffer size of number of bytes to be read is required. The start address specified by upper layer may be aligned or non-aligned.
+
SectorNumber
+
Specifies the start sector number in logical block address (LBA).
+
SectorCount
+
Specifies number of sectors to read. The value can be 1 to 255.
+
+
+ + +
+

Return Value

+
+
RES_OK (0)
+
The function succeeded.
+
RES_ERROR
+
Any hard error occured during the read operation and could not recover it.
+
RES_PARERR
+
Invalid parameter.
+
RES_NOTRDY
+
The disk drive has not been initialized.
+
+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/dstat.html b/src/ersky9x/libraries/fat/fatfs/doc/en/dstat.html new file mode 100644 index 000000000..6b3a24714 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/dstat.html @@ -0,0 +1,47 @@ + + + + + + + +FatFs - disk_status + + + + +
+

disk_status

+

The disk_status function returns the current disk status.

+
+DSTATUS disk_status (
+  BYTE Drive     /* Physical drive number */
+);
+
+
+ +
+

Parameter

+
+
Drive
+
Specifies the physical drive number to be confirmed.
+
+
+ + +
+

Return Values

+

The disk status is returned in combination of following flags.

+
+
STA_NOINIT
+
Indicates that the disk drive has not been initialized. This flag is set on: system reset, disk removal and disk_initialize function failed, and cleared on: disk_initialize function succeeded.
+
STA_NODISK
+
Indicates that no medium in the drive. This is always cleared on fixed disk drive.
+
STA_PROTECTED
+
Indicates that the medium is write protected. This is always cleared on the drive that does not support write protect notch. Not valid when STA_NODISK is set.
+
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/dwrite.html b/src/ersky9x/libraries/fat/fatfs/doc/en/dwrite.html new file mode 100644 index 000000000..e3686be63 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/dwrite.html @@ -0,0 +1,66 @@ + + + + + + + +FatFs - disk_write + + + + +
+

disk_write

+

The disk_write writes sector(s) to the disk.

+
+DRESULT disk_write (
+  BYTE Drive,          /* Physical drive number */
+  const BYTE* Buffer,  /* Pointer to the write data (may be non aligned) */
+  DWORD SectorNumber,  /* Sector number to write */
+  BYTE SectorCount     /* Number of sectors to write */
+);
+
+
+ +
+

Parameters

+
+
Drive
+
Specifies the physical drive number.
+
Buffer
+
Pointer to the byte array to be written. The start address specified by upper layer may be aligned or non-aligned.
+
SectorNumber
+
Specifies the start sector number in logical block address (LBA).
+
SectorCount
+
Specifies the number of sectors to write. The value can be 1 to 255.
+
+
+ + +
+

Return Values

+
+
RES_OK (0)
+
The function succeeded.
+
RES_ERROR
+
Any hard error occured during the write operation and could not recover it.
+
RES_WRPRT
+
The medium is write protected.
+
RES_PARERR
+
Invalid parameter.
+
RES_NOTRDY
+
The disk drive has not been initialized.
+
+
+ + +
+

Description

+

This function is not required in read only configuration.

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/fattime.html b/src/ersky9x/libraries/fat/fatfs/doc/en/fattime.html new file mode 100644 index 000000000..800f8bb91 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/fattime.html @@ -0,0 +1,50 @@ + + + + + + + +FatFs - get_fattime + + + + +
+

get_fattime

+

The get_fattime function gets current time.

+
+DWORD get_fattime (void);
+
+
+ + +
+

Return Value

+

Currnet time is returned with packed into a DWORD value. The bit field is as follows:

+
+
bit31:25
+
Year from 1980 (0..127)
+
bit24:21
+
Month (1..12)
+
bit20:16
+
Day in month(1..31)
+
bit15:11
+
Hour (0..23)
+
bit10:5
+
Minute (0..59)
+
bit4:0
+
Second / 2 (0..29)
+
+
+ + +
+

Description

+

The get_fattime function must return any valid time even if the system does not support a real time clock. This fucntion is not required in read only configuration.

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/filename.html b/src/ersky9x/libraries/fat/fatfs/doc/en/filename.html new file mode 100644 index 000000000..153e99110 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/filename.html @@ -0,0 +1,68 @@ + + + + + + + +FatFs - Path Names + + + + +
+

Format of the path names

+

The path name format on the FatFs module is similer to MS-DOS as follows.

+
+ "[drive#:][/]directory/file"
+
+

The FatFs module supports long file name and 8.3 format file name. The long file name can be handled in LFN configuration (_USE_LFN == 1). The path names are input/output in local code (SBCS/MBCS) or Unicode string depends on the configuration options. The sub directories are separated with a / or \. The logical drive number is specified in a numeral with a colon. When the drive number is omitted, it is assumed as default drive (0 or current drive).

+

In default configuration (_FS_RPATH == 0), it does not have a concept of current directory like OS oriented file system. All objects on the volume are always specified in full path name following from the root directory. Dot names are not available. Heading separator is ignored and it can be exist or omitted. The default drive number is fixed to 0.

+

When relative path feature is enabled (_FS_RPATH == 1), specified path is followed from the root directory if a heading separator is exist. If not, the path is followed from the current directory set with f_chdir function. Dot names are also available for the path name. The default drive number is the current drive number set with f_chdrive function.

+ + + + + + + + + + + + + +
Path name_FS_RPATH == 0_FS_RPATH == 1
file.txtA file in the root directory on the drive 0A file in the current directory on the current drive
/file.txtA file in the root directory on the drive 0A file in the root directory on the current drive
The root directory on the drive 0The current directory on the current drive
2:The root directory on the drive 2The current directory on the drive 2
2:file.txtA file in the root directory on the drive 2A file in the current directory on the drive 2
2:/The root directory on the drive 2The root directory on the drive 2
../file.txtInvalid nameA file in the parent directory
.Invalid nameThis directory
..Invalid nameParent directory of the current directory
dir1/..Invalid nameThe current directory
/..Invalid nameInvalid name (Cannot use dot names at the root directory)
+
+ +


+
+

Unicode API

+

The type of arguments that specifies the file names are defined as XCHAR, which is the alias of char in default. The code set of the file name string is the local code set that specifid by _CODE_PAGE. When _LFN_UNICODE is set to 1 with LFN configuration, the type of the XCHAR is switched to unsigned short (wide character) to support Unicode. In this case, the LFN feature is fully supported and the Unicode specific characters, such as ♥, ☭ and â¶, can also be used.

+
+ +


+
+

Correspondence between logical and physical drives

+

The FatFs module has work areas that called file system object for each volume (logical drive). In default, the logical drive is bound to the physical drive that has same drive number, and the first partition is mounted. When _MULTI_PARTITION == 1 is specified in configuration option, each individual logical drive can be bound to any physical drive/partition. In this case, a drive number resolution table must be defined as follows:

+
+Example: Logical drive 0-2 are assigned to three pri-partitions on the physical drive 0 (fixed disk)
+         Logical drive 3 is assigned to physical drive 1 (removable disk)
+
+const PARTITION Drives[] = {
+    {0, 0},     /* Logical drive 0 ==> Physical drive 0, 1st partition */
+    {0, 1},     /* Logical drive 1 ==> Physical drive 0, 2nd partition */
+    {0, 2},     /* Logical drive 2 ==> Physical drive 0, 3rd partition */
+    {1, 0}      /* Logical drive 3 ==> Physical drive 1 */
+};
+
+

There are some consideration when use _MULTI_PARTITION configuration.

+
    +
  • Only pri-partition (0-3) can be mounted.
    • +
  • When the physical drive has no partition table (SFD format), the partition number is ignored.
    • +
  • The physical drive that has two or more logical drives must not be removable drive.
    • +
+
+ + + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/forward.html b/src/ersky9x/libraries/fat/fatfs/doc/en/forward.html new file mode 100644 index 000000000..ae3588565 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/forward.html @@ -0,0 +1,137 @@ + + + + + + + +FatFs - f_forward + + + + +
+

f_forward

+

The f_forward function reads the file data and forward it to the data streaming device.

+
+FRESULT f_forward (
+  FIL* FileObject,                 /* File object */
+  UINT (*Func)(const BYTE*,UINT),  /* Data streaming function */
+  UINT ByteToFwd,                  /* Number of bytes to forward */
+  UINT* ByteFwd                    /* Number of bytes forwarded */
+);
+
+
+ +
+

Parameters

+
+
FileObject
+
Pointer to the open file object.
+
Func
+
Pointer to the user-defined data streaming function. For details, refer to the sample code.
+
ByteToFwd
+
Number of bytes to forward in range of UINT.
+
ByteFwd
+
Pointer to the UINT variable to return number of bytes forwarded.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_DENIED
+
The function denied due to the file has been opened in non-read mode.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The f_forward function reads the data from the file and forward it to the outgoing stream without data buffer. This is suitable for small memory system because it does not require any data buffer at application module. The file pointer of the file object increases in number of bytes forwarded. In case of *ByteFwd < ByteToFwd without error, it means the requested bytes could not be transferred due to end of file or stream goes busy during data transfer.

+

This function is available on _USE_FORWARD == 1 and _FS_TINY == 1.

+
+ + +
+

Example (Audio playback)

+
+/*-----------------------------------------------------------------------*/
+/* Sample code of data transfer function to be called from f_forward     */
+/*-----------------------------------------------------------------------*/
+
+UINT out_stream (   /* Returns number of bytes sent or stream status */
+    const BYTE *p,  /* Pointer to the data block to be sent */
+    UINT btf        /* >0: Transfer call (Number of bytes to be sent). 0: Sense call */
+)
+{
+    UINT cnt = 0;
+
+
+    if (btf == 0) {     /* Sense call */
+        /* Return stream status (0: Busy, 1: Ready) */
+        /* When once it returned ready to sense call, it must accept a byte at least */
+        /* at subsequent transfer call, or f_forward will fail with FR_INT_ERROR. */
+        if (FIFO_READY) cnt = 1;
+    }
+    else {              /* Transfer call */
+        do {    /* Repeat while there is any data to be sent and the stream is ready */
+            FIFO_PORT = *p++;
+            cnt++;
+        } while (cnt < btf && FIFO_READY);
+    }
+
+    return cnt;
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* Sample code using f_forward function                                  */
+/*-----------------------------------------------------------------------*/
+
+FRESULT play_file (
+    char *fn        /* Pointer to the audio file name to be played */
+)
+{
+    FRESULT rc;
+    FIL fil;
+    UINT dmy;
+
+    /* Open the audio file in read only mode */
+    rc = f_open(&fil, fn, FA_READ);
+
+    /* Repeat until the file pointer reaches end of the file */
+    while (rc == FR_OK && fil.fptr < fil.fsize) {
+
+        /* any other processes... */
+
+        /* Fill output stream periodicaly or on-demand */
+        rc = f_forward(&fil, out_stream, 1000, &dmy);
+    }
+
+    /* The read-only file object may be discarded without close */
+    return rc;
+}
+
+
+ + +
+

References

+

f_open, fgets, f_write, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/getfree.html b/src/ersky9x/libraries/fat/fatfs/doc/en/getfree.html new file mode 100644 index 000000000..d1d3ee099 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/getfree.html @@ -0,0 +1,96 @@ + + + + + + + +FatFs - f_getfree + + + + +
+

f_getfree

+

The f_getfree function gets number of the free clusters.

+
+FRESULT f_getfree (
+  const XCHAR* Path,        /* Root directory of the drive */
+  DWORD* Clusters,          /* Pointer to the variable to store number of free clusters */
+  FATFS** FileSystemObject  /* Pointer to pointer to file system object */
+);
+
+
+ +
+

Parameters

+
+
Path
+
Pinter to the null-terminated string that specifies the root directory of the logical drive.
+
Clusters
+
Pointer to the DWORD variable to store number of free clusters.
+
FileSystemObject
+
Pointer to pointer that to store a pointer to the corresponding file system object.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded. The *Clusters has number of free clusters and *FileSystemObject points the file system object.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Descriptions

+

The f_getfree function gets number of free clusters on the drive. The member csize in the file system object is refrecting number of sectors per cluster, so that the free space in unit of sector can be calcurated with this. When FSInfo structure on FAT32 volume is not in sync, this function can return an incorrect free cluster count.

+

This function is not supported in read-only configuration and minimization level of >= 1.

+
+ + +
+

Example

+
+    FATFS *fs;
+    DWORD fre_clust, fre_sect, tot_sect;
+
+
+    // Get drive information and free clusters
+    res = f_getfree("/", &fre_clust, &fs);
+    if (res) die(res);
+
+    // Get total sectors and free sectors
+    tot_sect = (fs->max_clust - 2) * fs->csize;
+    fre_sect = fre_clust * fs->csize;
+
+    // Print free space in unit of KB (assuming 512B/sector)
+    printf("%lu KB total drive space.\n"
+           "%lu KB available.\n",
+           fre_sect / 2, tot_sect / 2);
+
+
+ + +
+

References

+

FATFS

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/gets.html b/src/ersky9x/libraries/fat/fatfs/doc/en/gets.html new file mode 100644 index 000000000..611a3669f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/gets.html @@ -0,0 +1,58 @@ + + + + + + + +FatFs - f_gets + + + + +
+

f_gets

+

The f_gets reads a string from the file.

+
+char* f_gets (
+  char* Str,        /* Read buffer */
+  int Size,         /* Size of the read buffer */
+  FIL* FileObject   /* File object */
+);
+
+
+ +
+

Parameters

+
+
Str
+
Pointer to read buffer to store the read string.
+
Size
+
Size of the read buffer.
+
FileObject
+
Pointer to the open file object structure.
+
+
+ + +
+

Return Values

+

When the function succeeded, Str will be returuned.

+
+ + +
+

Description

+

The f_gets() is a wrapper function of f_read(). The read operation continues until a '\n' is stored, reached end of file or buffer is filled with Size - 1 characters. The read string is terminated with a '\0'. When the file has reached end of the file or any error occured during read operation, f_gets() returns a NULL. The EOF and error status can be examined with f_eof() and f_error() macro.

+

This function is available when _USE_STRFUNC is 1 or 2. When it is set to 2, '\r' contained in the file is stripped.

+
+ + +
+

References

+

f_open, f_read, f_putc, f_puts, f_printf, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/lseek.html b/src/ersky9x/libraries/fat/fatfs/doc/en/lseek.html new file mode 100644 index 000000000..b52af606b --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/lseek.html @@ -0,0 +1,105 @@ + + + + + + + +FatFs - f_lseek + + + + +
+

f_lseek

+

The f_lseek function moves the file read/write pointer of an open file object. It can also be used to extend the file size (cluster pre-allocation).

+ +
+FRESULT f_lseek (
+  FIL* FileObject,   /* Pointer to the file object structure */
+  DWORD Offset       /* File offset in unit of byte */
+);
+
+
+ +
+

Parameters

+
+
FileObject
+
Pointer to the open file object.
+
Offset
+
Number of bytes where from start of the file
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The f_lseek function moves the file R/W pointer of an open file. The offset can be specified in only origin from top of the file. When an offset above the file size is specified in write mode, the file size is extended to the offset and the data in the extended area is undefined. This is suitable to create a large file quickly, for fast write operation. After the f_lseek function succeeded, member fptr in the file object should be checked in order to make sure the R/W pointer has been moved correctry. In case of fptr is less than expected value, any of the followings has been occured.

+
    +
  • In read-only mode, the Offset was clipped in file size.
    • +
  • The drive gets full during the file extending process.
    • +
+

This function is not supported in minimization level of >= 3.

+ + +
+

Example

+
+    // Move to offset of 5000 from top of the file.
+    res = f_lseek(&file, 5000);
+
+    // Move to end of the file to append data
+    res = f_lseek(&file, file.fsize);
+
+    // Forward 3000 bytes
+    res = f_lseek(&file, file.fptr + 3000);
+
+    // Rewind 2000 bytes (take care on overflow)
+    res = f_lseek(&file, file.fptr - 2000);
+
+
+    // Cluster pre-allocation (to prevent buffer overrun on streaming write)
+
+    res = f_open(&file, recfile, FA_CREATE_NEW | FA_WRITE); // Create a file
+
+    res = f_lseek(&file, PRE_SIZE);        // Pre-allocate clusters
+    if (res || file.fptr != PRE_SIZE) .... // Check if the file is extended corrctly
+
+    res = f_lseek(&file, DATA_START);      // Record data stream without cluster allocation delay
+    ...
+
+    res = f_truncate(&file);               // Truncate unused area
+    res = f_lseek(&file, 0);               // Put file header
+    ...
+
+    res = f_close(&file);
+
+
+ + +
+

References

+

f_open, f_truncate, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/mkdir.html b/src/ersky9x/libraries/fat/fatfs/doc/en/mkdir.html new file mode 100644 index 000000000..bdc0c0822 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/mkdir.html @@ -0,0 +1,83 @@ + + + + + + + +FatFs - f_mkdir + + + + +
+

f_mkdir

+

The f_mkdir function creates a new directory.

+
+FRESULT f_mkdir (
+  const XCHAR* DirName /* Pointer to the directory name */
+);
+
+
+ +
+

Parameter

+
+
DirName
+
Pointer to the null-terminated string that specifies the directory name to create.
+
+
+ + +
+

Return Value

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The path name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_DENIED
+
The directory cannot be created due to directory table or disk is full.
+
FR_EXIST
+
A file or directory that has same name is already existing.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_WRITE_PROTECTED
+
The medium is write protected.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_mkdir function creates a new directory. This function is not supported in read-only configuration and minimization level of >= 1.

+
+ + +
+

Example

+
+    res = f_mkdir("sub1");
+    if (res) die(res);
+    res = f_mkdir("sub1/sub2");
+    if (res) die(res);
+    res = f_mkdir("sub1/sub2/sub3");
+    if (res) die(res);
+
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/mkfs.html b/src/ersky9x/libraries/fat/fatfs/doc/en/mkfs.html new file mode 100644 index 000000000..8e623e145 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/mkfs.html @@ -0,0 +1,73 @@ + + + + + + + +FatFs - f_mkfs + + + + +
+

f_mkfs

+

The f_mkfs fucntion creates a file system on the drive.

+
+FRESULT f_mkfs (
+  BYTE  Drive,            /* Logical drive number */
+  BYTE  PartitioningRule, /* Partitioning rule */
+  WORD  AllocSize         /* Allocation unit size */
+);
+
+
+ +
+

Parameters

+
+
Drive
+
Logical drive number (0-9) to be formatted.
+
PartitioningRule
+
When 0 is given, a partition table is created into first sector on the drive and then the file system is created on the partition. This is called FDISK format. When 1 is given, the file system starts from the first sector without partition table. This is often called super floppy (SFD) format.
+
AllocSize
+
Specifies allocation unit size in number of bytes per cluster. The value must be 0 or power of 2 in range of from 512 to 32768. When 0 is specified, the cluster size is determined by the drive size. FAT64 (64KB/cluster on FAT16) cannot be created by this function.
+
+
+ +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The drive cannot work due to any reason.
+
FR_WRITE_PROTECTED
+
The drive is write protected.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_MKFS_ABORTED
+
The function aborted before start in format due to a reason as follows. +
    +
  • The disk size is too small.
    • +
  • Invalid parameter was given to any parameter.
    • +
  • Not allowable cluster size for this drive. This can occure when number of clusters becomes around 0xFF7 and 0xFFF7.
    • +
+
+
+
+ +
+

Description

+

The f_mkfs function creates a FAT file system on the drive. There are two partitioning rules, FDISK and SFD, for removable media. It can be selected with an argument. The FDISK format is recommended for the most case. This function currently does not support multiple partition, so that existing partitions on the physical dirve will be deleted and re-created a new partition occupies entire disk space.

+

The FAT sub-type, FAT12/FAT16/FAT32, is determined by number of clusters on the drive and nothing else, according to the FAT specification issued by Microsoft. Thus which FAT sub-type is selected, is depends on the partition size and the specified cluster size. The cluster size affects performance of the file system and large cluster increases the performance.

+

This function is supported on only _USE_MKFS option is selected.

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/mount.html b/src/ersky9x/libraries/fat/fatfs/doc/en/mount.html new file mode 100644 index 000000000..fb7ac1dc2 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/mount.html @@ -0,0 +1,59 @@ + + + + + + + +FatFs - f_mount + + + + +
+

f_mount

+

The f_mount fucntion registers/unregisters a work area to the FatFs module.

+
+FRESULT f_mount (
+  BYTE  Drive,              /* Logical drive number */
+  FATFS*  FileSystemObject  /* Pointer to the work area */
+);
+
+
+ +
+

Parameters

+
+
Drive
+
Logical drive number (0-9) to register/unregister the work area.
+
FileSystemObject
+
Pointer to the work area (file system object) to be registered.
+
+
+ +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
+
+ + +
+

Description

+

The f_mount function registers/unregisters a work area to the FatFs module. The work area must be given to the logical drive with this function prior to any other file function. To unregister a work area, specify a NULL to the FileSystemObject, and then the work area can be discarded.

+

This function only initializes the given work area and registers its address to the internal table, any access to the disk I/O layer does not occure. The volume mount process is performed on first file access after f_mount or media change.

+
+ + +
+

References

+

FATFS

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/mountdrv.html b/src/ersky9x/libraries/fat/fatfs/doc/en/mountdrv.html new file mode 100644 index 000000000..7cc6bbfd6 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/mountdrv.html @@ -0,0 +1,57 @@ + + + + + + + +FatFs - f_mountdrv + + + + +
+

f_mountdrv

+

The f_mountdrv forces the partition mounted.

+
+FRESULT f_mountdrv (void);
+
+
+ +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_RW_ERROR
+
Any error occured in low level disk I/O.
+
FR_NOT_ENABLED
+
FatFs module is not enabled.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_mountdrv forces the partition mounted (initializes FATFS structure). The file system is initialized automatically in accordance with the necessity when any file function is called. This function should not be used except for recovering FR_INCORRECT_DISK_CHANGE error. Using this function, while any file is opened, can destroy the file system.

+

In this function, following processes are executed.


+
    +
  • Initializes lower level layer (disk I/O module).
    • +
  • Searches a FAT boot record in order of sector 0 (as SFD format) and first primary partition (as FDISK format).
    • +
  • Initializes file system object (FATFS structure).
    • +
+
+ + +
+

References

+

FATFS

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/open.html b/src/ersky9x/libraries/fat/fatfs/doc/en/open.html new file mode 100644 index 000000000..f86575d49 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/open.html @@ -0,0 +1,143 @@ + + + + + + + +FatFs - f_open + + + + +
+

f_open

+

The f_open function creates a file object to be used to access the file.

+
+FRESULT f_open (
+  FIL* FileObject,       /* Pointer to the blank file object structure */
+  const XCHAR* FileName, /* Pointer to the file neme */
+  BYTE ModeFlags         /* Mode flags */
+);
+
+
+ +
+

Parameters

+
+
FileObject
+
Pointer to the file object structure to be created. After the f_open funciton succeeded, the file can be accessed with the file object structure until it is closed.
+
FileName
+
Pointer to a null-terminated string that specifies the file name to create or open.
+
ModeFlags
+
Specifies the type of access and open method for the file. It is specified by a combination of following flags.
+ + + + + + + + +
ValueDescription
FA_READSpecifies read access to the object. Data can be read from the file.
Combine with FA_WRITE for read-write access.
FA_WRITESpecifies write access to the object. Data can be written to the file.
Combine with FA_READ for read-write access.
FA_OPEN_EXISTINGOpens the file. The function fails if the file is not existing. (Default)
FA_OPEN_ALWAYSOpens the file, if it is existing. If not, the function creates the new file.
FA_CREATE_NEWCreates a new file. The function fails if the file is already existing.
FA_CREATE_ALWAYSCreates a new file. If the file is existing, it is truncated and overwritten.
+
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded and the file object is valid.
+
FR_NO_FILE
+
Could not find the file.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The file name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_EXIST
+
The file is already existing.
+
FR_DENIED
+
The required access was denied due to one of the following reasons: +
  • Write mode open of a read-only file.
    • +
  • File cannot be created due to a read-only file or same name directory is existing.
    • +
  • File cannot be created due to the directory table or disk is full.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_WRITE_PROTECTED
+
Write mode open or creation under the medium is write protected.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The created file object is used for subsequent calls to refer to the file. When close an open file object, use f_close function. If the modified file is not closed, the file may be collapsed.

+

Before using any file function, a work area (file system object) must be given to the logical drive with f_mount function. All file functions can work after this procedure.

+

The mode flags, FA_WRITE, FA_CREATE_ALWAYS, FA_CREATE_NEW, FA_OPEN_ALWAYS, are not available in read-only configuration.

+
+ + +
+

Example (File Copy)

+
+void main (void)
+{
+    FATFS fs[2];         // Work area (file system object) for logical drives
+    FIL fsrc, fdst;      // file objects
+    BYTE buffer[4096];   // file copy buffer
+    FRESULT res;         // FatFs function common result code
+    UINT br, bw;         // File R/W count
+
+
+    // Register work area for logical drives
+    f_mount(0, &fs[0]);
+    f_mount(1, &fs[1]);
+
+    // Open source file on the drive 1
+    res = f_open(&fsrc, "1:srcfile.dat", FA_OPEN_EXISTING | FA_READ);
+    if (res) die(res);
+
+    // Create destination file on the drive 0
+    res = f_open(&fdst, "0:dstfile.dat", FA_CREATE_ALWAYS | FA_WRITE);
+    if (res) die(res);
+
+    // Copy source to destination
+    for (;;) {
+        res = f_read(&fsrc, buffer, sizeof(buffer), &br);
+        if (res || br == 0) break;   // error or eof
+        res = f_write(&fdst, buffer, br, &bw);
+        if (res || bw < br) break;   // error or disk full
+    }
+
+    // Close all files
+    f_close(&fsrc);
+    f_close(&fdst);
+
+    // Unregister work area before discard it
+    f_mount(0, NULL);
+    f_mount(1, NULL);
+}
+
+
+ + +
+

References

+

f_read, f_write, f_close, FIL, FATFS

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/opendir.html b/src/ersky9x/libraries/fat/fatfs/doc/en/opendir.html new file mode 100644 index 000000000..739873c8c --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/opendir.html @@ -0,0 +1,73 @@ + + + + + + + +FatFs - f_opendir + + + + +
+

f_opendir

+

The f_opendir function opens a directory.

+
+FRESULT f_opendir (
+  DIR* DirObject,       /* Pointer to the blank directory object structure */
+  const XCHAR* DirName  /* Pointer to the directory name */
+);
+
+
+ +
+

Parameters

+
+
DirObject
+
Pointer to the blank directory object to be created.
+
DirName
+
Pinter to the null-terminated string that specifies the directory name to be opened.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded and the directory object is created. It is used for subsequent calls to read the directory entries.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The path name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_opendir function opens an exsisting directory and creates the directory object for subsequent calls. The directory object structure can be discarded at any time without any procedure. This function is not supported in minimization level of >=2.

+
+ + +
+

References

+

f_readdir, DIR

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/printf.html b/src/ersky9x/libraries/fat/fatfs/doc/en/printf.html new file mode 100644 index 000000000..482d07da1 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/printf.html @@ -0,0 +1,72 @@ + + + + + + + +FatFs - f_printf + + + + +
+

f_printf

+

The f_printf function writes formatted string to the file.

+
+int f_printf (
+  FIL* FileObject,     /* File object */
+  const char* Foramt,  /* Format stirng */
+  ...
+);
+
+
+ +
+

Parameters

+
+
FileObject
+
Pointer to the open file object structure.
+
Format
+
Pointer to the null-terminated format string.
+
...
+
Optional arguments.
+ +
+
+ + +
+

Return Values

+

When the function succeeded, number of characters written is returned. When the function failed due to disk full or any error, an EOF will be returned.

+
+ + +
+

Description

+

The f_printf() is a wrapper function of f_putc() and f_puts(). The format control directive is a sub-set of standard library. It supports c s d u X for the data type, l for the precision and 0 for the flags.

+

This function is available when read-write configuration and _USE_STRFUNC is 1 or 2.

+
+ + +
+

Example

+
+    f_printf(&fil, "%6d", -200);         // "  -200"
+    f_printf(&fil, "%02u", 5);           // "05"
+    f_printf(&fil, "%ld", 12345678L);    // "12345678"
+    f_printf(&fil, "%08lX", 1194684UL);  // "00123ABC"
+    f_printf(&fil, "%s", "String");      // "String"
+    f_printf(&fil, "%c", 'a');           // "a"
+
+
+ + +
+

References

+

f_open, f_putc, f_puts, f_gets, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/putc.html b/src/ersky9x/libraries/fat/fatfs/doc/en/putc.html new file mode 100644 index 000000000..a09920a63 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/putc.html @@ -0,0 +1,54 @@ + + + + + + + +FatFs - f_putc + + + + +
+

f_putc

+

The f_putc funciton puts a character to the file.

+
+int f_putc (
+  int Chr,          /* A character to put */
+  FIL* FileObject   /* File object */
+);
+
+
+ +
+

Parameters

+
+
Chr
+
A character to be put.
+
FileObject
+
Pointer to the open file object structuer.
+
+
+ + +
+

Return Values

+

When the character was written successfuly, the function returns the character. When the function failed due to disk full or any error, an EOF will be returned.

+
+ + +
+

Description

+

The f_putc() is a wrapper function of f_write(). This function is available when read-write configuration and _USE_STRFUNC is 1 or 2. When it is set 2, a '\n' is extended to "\r\n".

+
+ + +
+

Reference

+

f_open, f_puts, f_printf, f_gets, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/puts.html b/src/ersky9x/libraries/fat/fatfs/doc/en/puts.html new file mode 100644 index 000000000..69f223256 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/puts.html @@ -0,0 +1,54 @@ + + + + + + + +FatFs - f_puts + + + + +
+

f_puts

+

The f_puts function writes a string to the file.

+
+int f_puts (
+  const char* Str,  /* String */
+  FIL* FileObject   /* File object */
+);
+
+
+ +
+

Parameters

+
+
Str
+
Pointer to the null terminated string to be written. The null character will not be written.
+
FileObject
+
Pointer to the open file object structure.
+
+
+ + +
+

Return Value

+

When the function succeeded, number of characters written (not minus value) is returned. When the function failed due to disk full or any error, an EOF will be returned.

+
+ + +
+

Description

+

The f_puts() is a wrapper function of f_putc(). This function is available when read-write configuration and _USE_STRFUNC is 1 or 2. When it is set 2, a '\n' is extended to "\r\n".

+
+ + +
+

Reference

+

f_open, f_putc, f_printf, f_gets, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/read.html b/src/ersky9x/libraries/fat/fatfs/doc/en/read.html new file mode 100644 index 000000000..4f602d171 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/read.html @@ -0,0 +1,73 @@ + + + + + + + +FatFs - f_read + + + + +
+

f_read

+

The f_read function reads data from a file.

+
+FRESULT f_read (
+  FIL* FileObject,    /* Pointer to the file object structure */
+  void* Buffer,       /* Pointer to the buffer to store read data */
+  UINT ByteToRead,    /* Number of bytes to read */
+  UINT* ByteRead      /* Pointer to the variable to return number of bytes read */
+);
+
+
+ +
+

Parameters

+
+
FileObject
+
Pointer to the open file object.
+
Buffer
+
Pointer to the buffer to store read data
+
ByteToRead
+
Number of bytes to read in range of UINT.
+
ByteRead
+
Pointer to the UINT variable to return number of bytes read.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_DENIED
+
The function denied due to the file has been opened in non-read mode.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The file pointer of the file object increases in number of bytes read. After the function succeeded, *ByteRead should be checked to detect end of file. In case of *ByteRead < ByteToRead, it means the R/W pointer reached end of file during read operation.

+
+ + +
+

References

+

f_open, fgets, f_write, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/readdir.html b/src/ersky9x/libraries/fat/fatfs/doc/en/readdir.html new file mode 100644 index 000000000..81508ceeb --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/readdir.html @@ -0,0 +1,114 @@ + + + + + + + +FatFs - f_readdir + + + + +
+

f_readdir

+

The f_readdir function reads directory entries.

+
+FRESULT f_readdir (
+  DIR* DirObject,    /* Pointer to the open directory object */
+  FILINFO* FileInfo  /* Pointer to the file information structure */
+);
+
+
+ +
+

Parameters

+
+
DirObject
+
Pointer to the open directory object.
+
FileInfo
+
Pointer to the file information structure to store the read item.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_INVALID_OBJECT
+
The directory object is invalid.
+
+
+ + +
+

Description

+

The f_readdir function reads directory entries in sequence. All items in the directory can be read by calling f_readdir function repeatedly. When all directory entries have been read and no item to read, the function returns a null string into f_name[] member without any error. When a null pointer is given to the FileInfo, the read index of the directory object will be rewinded.

+

When LFN feature is enabled, lfname and lfsize in the file information structure must be initialized with valid value prior to calling the f_readdir function. The lfname is a pointer to the string buffer to return the long file name. The lfsize is the size of the string buffer. If either the size of read buffer or LFN working buffer is insufficient for the LFN or the entry has no LFN, a null string will be returned to the LFN read buffer. If the LFN contains any charactrer that cannot be converted to OEM code, a null string will be returned but this is not the case on Unicode API configuration. When lfname is a NULL, nothing of the LFN is returned.

+

When relative path feature is enabled (_FS_RPATH == 1), "." and ".." entries are not filtered out and it will appear in the read entries.

+

This function is not supported in minimization level of >=2.

+
+ + +
+

Sample Code

+
+FRESULT scan_files (char* path)
+{
+    FRESULT res;
+    FILINFO fno;
+    DIR dir;
+    int i;
+    char *fn;
+#if _USE_LFN
+    static char lfn[_MAX_LFN * (_DF1S ? 2 : 1) + 1];
+    fno.lfname = lfn;
+    fno.lfsize = sizeof(lfn);
+#endif
+
+
+    res = f_opendir(&dir, path);
+    if (res == FR_OK) {
+        i = strlen(path);
+        for (;;) {
+            res = f_readdir(&dir, &fno);
+            if (res != FR_OK || fno.fname[0] == 0) break;
+#if _USE_LFN
+            fn = *fno.lfname ? fno.lfname : fno.fname;
+#else
+            fn = fno.fname;
+#endif
+            if (*fn == '.') continue;
+            if (fno.fattrib & AM_DIR) {
+                sprintf(&path[i], "/%s", fn);
+                res = scan_files(path);
+                if (res != FR_OK) break;
+                path[i] = 0;
+            } else {
+                printf("%s/%s\n", path, fn);
+            }
+        }
+    }
+
+    return res;
+}
+
+
+ + +
+

References

+

f_opendir, f_stat, FILINFO, DIR

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/rename.html b/src/ersky9x/libraries/fat/fatfs/doc/en/rename.html new file mode 100644 index 000000000..c1cde418e --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/rename.html @@ -0,0 +1,87 @@ + + + + + + + +FatFs - f_rename + + + + +
+

f_rename

+

Rename file or directory.

+
+FRESULT f_rename (
+  const XCHAR* OldName, /* Pointer to old file/directory name */
+  const XCHAR* NewName  /* Pointer to new file/directory name */
+);
+
+
+ +
+

Parameters

+
+
OldName
+
Pointer to a null-terminated string specifies the old file/directory name to be renamed.
+
NewName
+
Pointer to a null-terminated string specifies the new file/directory name without drive number. Existing object nannot be specified.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_FILE
+
Could not find the old name.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The file name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_EXIST
+
There is an object that have a name equal to new name.
+
FR_DENIED
+
The new name could not be created due to any reason.
+
FR_WRITE_PROTECTED
+
The medium is write protected.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

Rename a file or directory and can move it to other directory. Logical drive number is determined by old name, new name must not contain logical drive number. This function is not supported in read-only configuration or minimization level of >= 1.

+
+ + +
+

Example

+
+    // Rename a file or directory
+    f_rename("oldname.txt", "newname.txt");
+
+    // Rename and move a file or directory to other directory simultaneously
+    f_rename("oldname.txt", "dir1/newname.txt");
+
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/sdir.html b/src/ersky9x/libraries/fat/fatfs/doc/en/sdir.html new file mode 100644 index 000000000..f7691b50e --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/sdir.html @@ -0,0 +1,36 @@ + + + + + + + +FatFs - DIR + + + + +
+

DIR

+

The DIR structure is used for the work area to read a directory by f_oepndir, f_readdir function.

+
+typedef struct _DIR_ {
+    FATFS*  fs;         /* Pointer to the owner file system object */
+    WORD    id;         /* Owner file system mount ID */
+    WORD    index;      /* Current read/write index number */
+    DWORD   sclust;     /* Table start cluster (0:Static table) */
+    DWORD   clust;      /* Current cluster */
+    DWORD   sect;       /* Current sector */
+    BYTE*   dir;        /* Pointer to the current SFN entry in the win[] */
+    BYTE*   fn;         /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
+#if _USE_LFN
+    WCHAR*  lfn;        /* Pointer to the LFN working buffer */
+    WORD    lfn_idx;    /* Last matched LFN index (0xFFFF:No LFN) */
+#endif
+} DIR;
+
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/sfatfs.html b/src/ersky9x/libraries/fat/fatfs/doc/en/sfatfs.html new file mode 100644 index 000000000..1d354e584 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/sfatfs.html @@ -0,0 +1,53 @@ + + + + + + + +FatFs - FATFS + + + + +
+

FATFS

+

The FATFS structure holds dynamic work area of individual logical drives. It is given by application program and registerd/unregisterd to the FatFs module with f_mount function. Following members are in standard configuration. There is no member that can be changed from the application program.

+
+typedef struct _FATFS_ {
+    BYTE    fs_type;    /* FAT sub type */
+    BYTE    drive;      /* Physical drive number */
+    BYTE    csize;      /* Number of sectors per cluster */
+    BYTE    n_fats;     /* Number of FAT copies */
+    BYTE    wflag;      /* win[] dirty flag (1:must be written back) */
+    WORD    id;         /* File system mount ID */
+    WORD    n_rootdir;  /* Number of root directory entries (0 on FAT32) */
+#if _FS_REENTRANT
+    _SYNC_t sobj;       /* Identifier of sync object */
+#endif
+#if _MAX_SS != 512
+    WORD    s_size;     /* Sector size */
+#endif
+#if !_FS_READONLY
+    BYTE    fsi_flag;   /* fsinfo dirty flag (1:must be written back) */
+    DWORD   last_clust; /* Last allocated cluster */
+    DWORD   free_clust; /* Number of free clusters */
+    DWORD   fsi_sector; /* fsinfo sector */
+#endif
+#if _FS_RPATH
+    DWORD   cdir;       /* Current directory (0:root)*/
+#endif
+    DWORD   sects_fat;  /* Sectors per fat */
+    DWORD   max_clust;  /* Maximum cluster# + 1. Number of clusters is max_clust - 2 */
+    DWORD   fatbase;    /* FAT start sector */
+    DWORD   dirbase;    /* Root directory start sector (Cluster# on FAT32) */
+    DWORD   database;   /* Data start sector */
+    DWORD   winsect;    /* Current sector appearing in the win[] */
+    BYTE    win[_MAX_SS];/* Disk access window for Directory/FAT */
+} FATFS;
+
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/sfile.html b/src/ersky9x/libraries/fat/fatfs/doc/en/sfile.html new file mode 100644 index 000000000..c6af00882 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/sfile.html @@ -0,0 +1,42 @@ + + + + + + + +FatFs - FIL + + + + +
+

FIL

+

The FIL structure (file object) holds state of an open file. It is initialzed by f_open function and discarded by f_close function. There is no member that can be changed by the application program.

+ +
+typedef struct _FIL_ {
+    FATFS*  fs;         /* Pointer to the owner file system object */
+    WORD    id;         /* Owner file system mount ID */
+    BYTE    flag;       /* File status flags */
+    BYTE    csect;      /* Sector address in the cluster */
+    DWORD   fptr;       /* File R/W pointer */
+    DWORD   fsize;      /* File size */
+    DWORD   org_clust;  /* File start cluster */
+    DWORD   curr_clust; /* Current cluster */
+    DWORD   dsect;      /* Current data sector */
+#if !_FS_READONLY
+    DWORD   dir_sect;   /* Sector containing the directory entry */
+    BYTE*   dir_ptr;    /* Ponter to the directory entry in the window */
+#endif
+#if !_FS_TINY
+    BYTE    buf[_MAX_SS];/* File R/W buffer */
+#endif
+} FIL;
+
+ +
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/sfileinfo.html b/src/ersky9x/libraries/fat/fatfs/doc/en/sfileinfo.html new file mode 100644 index 000000000..d76f8845c --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/sfileinfo.html @@ -0,0 +1,69 @@ + + + + + + + +FatFs - FILINFO + + + + +
+

FILINFO

+

The FILINFO structure holds a file information returned by f_stat and f_readdir function.

+
+typedef struct _FILINFO_ {
+    DWORD fsize;      /* File size */
+    WORD  fdate;      /* Last modified date */
+    WORD  ftime;      /* Last modified time */
+    BYTE  fattrib;    /* Attribute */
+    char  fname[13];  /* Short file name (8.3 format) */
+#if _USE_LFN
+    XCHAR* lfname;    /* Pointer to the LFN buffer */
+    int   lfsize;     /* Size of LFN buffer [bytes] */
+#endif
+} FILINFO;
+
+
+ +

Members

+
+
fsize
+
Indicates size of the file in unit of byte. This is always zero when it is a directory.
+
fdate
+
Indicates the date that the file was modified or the directory was created.
+
+
bit15:9
+
Year origin from 1980 (0..127)
+
bit8:5
+
Month (1..12)
+
bit4:0
+
Day (1..31)
+
+
+
ftime
+
Indicates the time that the file was modified or the directory was created.
+
+
bit15:11
+
Hour (0..23)
+
bit10:5
+
Minute (0..59)
+
bit4:0
+
Second / 2 (0..29)
+
+
+
fattrib
+
Indicates the file/directory attribute in combination of AM_DIR, AM_RDO, AM_HID, AM_SYS and AM_ARC.
+
fname[]
+
Indicates the file/directory name in 8.3 format null-terminated string.
+
lfname
+
Pointer to the buffer to store the long file name. This member must be initialized by application prior to use this structure. Not available on non-LFN configuration.
+
lfsize
+
Size of long file name buffer. This member must be initialized by application prior to use this structure. Not available on non-LFN configuration.
+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/stat.html b/src/ersky9x/libraries/fat/fatfs/doc/en/stat.html new file mode 100644 index 000000000..fdc3c0cfc --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/stat.html @@ -0,0 +1,75 @@ + + + + + + + +FatFs - f_stat + + + + +
+

f_stat

+

The f_stat gets the file status.

+
+FRESULT f_stat (
+  const XCHAR* FileName,  /* Pointer to the file or directory name */
+  FILINFO* FileInfo       /* Pointer to the FILINFO structure */
+);
+
+
+ +
+

Parameters

+
+
FileName
+
Pointer to the null-terminated string that specifies the file or directory to get its information.
+
FileInfo
+
Pointer to the blank FILINFO structure to store the information.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_FILE
+
Could not find the file or directory.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The file name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_stat gets the information of a file or directory. For details of the infomation, refer to the FILINFO structure and f_readdir function. This function is not supported in minimization level of >= 1.

+
+ + +
+

References

+

f_opendir, f_readdir, FILINFO

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/sync.html b/src/ersky9x/libraries/fat/fatfs/doc/en/sync.html new file mode 100644 index 000000000..ab26c8aca --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/sync.html @@ -0,0 +1,62 @@ + + + + + + + +FatFs - f_sync + + + + +
+

f_sync

+

The f_sync function flushes the cached information of a writing file.

+
+FRESULT f_sync (
+  FIL* FileObject     /* Pointer to the file object */
+);
+
+
+ +
+

Parameter

+
+
FileObject
+
Pointer to the open file object to be flushed.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The f_sync function performs the same process as f_close function but the file is left opened and can continue read/write/seek operations to the file. This is suitable for applications that open files for a long time in writing mode, such as data logger. Performing f_sync of periodic or immediataly after f_write can minimize risk of data loss due to a sudden blackout or an unintentional disk removal. However f_sync immediataly before f_close has no advantage because f_close performs f_sync in it. This function is not available in read-only configuration.

+
+ + +
+

References

+

f_close

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/truncate.html b/src/ersky9x/libraries/fat/fatfs/doc/en/truncate.html new file mode 100644 index 000000000..e8bf8b689 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/truncate.html @@ -0,0 +1,65 @@ + + + + + + + +FatFs - f_truncate + + + + +
+

f_truncate

+

The f_truncate function truncates the file size.

+
+FRESULT f_truncate (
+  FIL* FileObject     /* Pointer to the file object */
+);
+
+
+ +
+

Parameter

+
+
FileObject
+
Pointer to the open file object to be truncated.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_DENIED
+
The file has been opened in read-only mode.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The f_truncate function truncates the file size to the current file R/W point. When the file R/W pointer is already pointing end of the file, this function has no effect. This function is not available in read-only configuration or minimization level of >=1.

+
+ + +
+

References

+

f_open, f_lseek, FIL

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/unlink.html b/src/ersky9x/libraries/fat/fatfs/doc/en/unlink.html new file mode 100644 index 000000000..4cad1810c --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/unlink.html @@ -0,0 +1,72 @@ + + + + + + + +FatFs - f_unlink + + + + +
+

f_unlink

+

The f_unlink removes file or directory.

+
+FRESULT f_unlink (
+  const XCHAR* FileName  /* Pointer to the file or directory name */
+);
+
+
+ +
+

Parameter

+
+
FileName
+
Pointer to the null-terminated string that specifies a file or directory to be removed.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_FILE
+
Could not find the file or directory.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The path name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_DENIED
+
The function was denied due to either of following reasons: +
  • The file or directory has read-only attribute
  • The directory is not empty.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_WRITE_PROTECTED
+
The medium is write protected.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_unlink function removes a file or directory. In read-only configuration or minimization level is >= 1, this function is not available.

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/utime.html b/src/ersky9x/libraries/fat/fatfs/doc/en/utime.html new file mode 100644 index 000000000..532a83863 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/utime.html @@ -0,0 +1,77 @@ + + + + + + + +FatFs - f_utime + + + + +
+

f_utime

+

The f_utime function changes the timestamp of a file or directory.

+
+FRESULT f_utime (
+  const XCHAR* FileName,   /* Pointer to the file or directory path */
+  const FILINFO* TimeDate  /* Time and data to be set */
+);
+
+
+ +
+

Parameters

+
+
FileName
+
Pointer to the null-terminated string that specifies a file or directory to be changed.
+
TimeDate
+
Pointer to the file information structure that has a timestamp to be set in member fdate and ftime. Do not care any other members.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_NO_FILE
+
Could not find the file.
+
FR_NO_PATH
+
Could not find the path.
+
FR_INVALID_NAME
+
The file name is invalid.
+
FR_INVALID_DRIVE
+
The drive number is invalid.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_WRITE_PROTECTED
+
The medium is write protected.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_ENABLED
+
The logical drive has no work area.
+
FR_NO_FILESYSTEM
+
There is no valid FAT partition on the disk.
+
+
+ + +
+

Description

+

The f_utime function changes the timestamp of a file or directory. This function is not supported in read-only configuration and minimization level of >=1.

+
+ + +
+

References

+

f_stat, FILINFO

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/en/write.html b/src/ersky9x/libraries/fat/fatfs/doc/en/write.html new file mode 100644 index 000000000..a5c60d52f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/en/write.html @@ -0,0 +1,74 @@ + + + + + + + +FatFs - f_write + + + + +
+

f_write

+

The f_write writes data to a file.

+
+FRESULT f_write (
+  FIL* FileObject,     /* Pointer to the file object structure */
+  const void* Buffer,  /* Pointer to the data to be written */
+  UINT ByteToWrite,    /* Number of bytes to write */
+  UINT* ByteWritten    /* Pointer to the variable to return number of bytes written */
+);
+
+
+ +
+

Parameters

+
+
FileObject
+
Pointer to the open file object structure.
+
Buffer
+
Pointer to the data to be written.
+
ByteToWrite
+
Specifies number of bytes to write in range of UINT.
+
ByteWritten
+
Pointer to the UINT variable to return number of bytes written.
+
+
+ + +
+

Return Values

+
+
FR_OK (0)
+
The function succeeded.
+
FR_DENIED
+
The function denied due to the file has been opened in non-write mode.
+
FR_DISK_ERR
+
The function failed due to an error in the disk function.
+
FR_INT_ERR
+
The function failed due to a wrong FAT structure or an internal error.
+
FR_NOT_READY
+
The disk drive cannot work due to no medium in the drive or any other reason.
+
FR_INVALID_OBJECT
+
The file object is invalid.
+
+
+ + +
+

Description

+

The read/write pointer in the file object is increased in number of bytes written. After the function succeeded, *ByteWritten should be checked to detect disk full. In case of *ByteWritten < ByteToWrite, it means the disk got full during write operation.

+

This function is not available in read-only configuration.

+
+ + +
+

References

+

f_open, f_read, fputc, fputs, fprintf, f_close, FIL

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/f1.png b/src/ersky9x/libraries/fat/fatfs/doc/img/f1.png new file mode 100644 index 000000000..42cc2713f Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/f1.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/f2.png b/src/ersky9x/libraries/fat/fatfs/doc/img/f2.png new file mode 100644 index 000000000..8ef0ec241 Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/f2.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/f3.png b/src/ersky9x/libraries/fat/fatfs/doc/img/f3.png new file mode 100644 index 000000000..9111bfc97 Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/f3.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/f4.png b/src/ersky9x/libraries/fat/fatfs/doc/img/f4.png new file mode 100644 index 000000000..f9a6b4648 Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/f4.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/f5.png b/src/ersky9x/libraries/fat/fatfs/doc/img/f5.png new file mode 100644 index 000000000..b110b291e Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/f5.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/layers.png b/src/ersky9x/libraries/fat/fatfs/doc/img/layers.png new file mode 100644 index 000000000..d485d6b60 Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/layers.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/rwtest.png b/src/ersky9x/libraries/fat/fatfs/doc/img/rwtest.png new file mode 100644 index 000000000..a34bf0621 Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/rwtest.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/img/rwtest2.png b/src/ersky9x/libraries/fat/fatfs/doc/img/rwtest2.png new file mode 100644 index 000000000..aeb38be63 Binary files /dev/null and b/src/ersky9x/libraries/fat/fatfs/doc/img/rwtest2.png differ diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/appnote.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/appnote.html new file mode 100644 index 000000000..b58af9594 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/appnote.html @@ -0,0 +1,172 @@ + + + + + + + +FatFsモジュール アプリケーション・ノート + + + +

FatFsモジュール アプリケーション・ノート

+
+ +
+

ãƒãƒ¼ãƒ†ã‚£ãƒ³ã‚°ã®éš›ã«é…æ…®ã™ã¹ãã“ã¨

+

FatFsモジュールã¯ç§»æ¤æ€§ã«é–¢ã—ã¦æ¬¡ã®ç‚¹ã‚’å‰æã¨ã—ã¦ã„ã¾ã™ã€‚

+
    +
  • 処ç†ç³»ã¯ANSI C準拠ã§ã‚ã‚‹ã“ã¨ã€‚
    +FatFsモジュールã¯ANSI C準拠ã§è¨˜è¿°ã•ã‚Œã¦ã„ã‚‹ã®ã§ã€ANSI C準拠ã®ã‚³ãƒ³ãƒ‘イラãªã‚‰ç‰¹ã«å‡¦ç†ç³»ä¾å­˜ãªç‚¹ã¯ã‚ã‚Šã¾ã›ã‚“。
    • +
  • char/short/longã®ã‚µã‚¤ã‚ºã¯ã€ãã‚Œãžã‚Œ8/16/32ビットã§ã€intã¯16ã¾ãŸã¯32ビットã§ã‚ã‚‹ã“ã¨ã€‚
    +使用ã•ã‚Œã‚‹æ•´æ•°ã®åž‹ã¯ integer.h 内㧠typedef ã•ã‚Œã¦ã„ã¾ã™ã€‚æ•´æ•°ã®åž‹ã¨ã‚µã‚¤ã‚ºã«é–¢ã—ã¦ã¯ã€ã¾ã£ã¨ã†ãªå‡¦ç†ç³»ãªã‚‰å•é¡Œãªã„ã¯ãšã§ã™ãŒã€æ—¢å­˜ã®å®šç¾©ã¨è¡çªã—ãŸå ´åˆã¯ãƒ¦ãƒ¼ã‚¶ã«ã‚ˆã£ã¦è§£æ±ºã•ã‚Œãªã‘ã‚Œã°ãªã‚Šã¾ã›ã‚“。
    • +
+
+ +
+

ãƒ¡ãƒ¢ãƒªä½¿ç”¨é‡ (R0.07c)

+ + + + + + + + + + + +
AVRH8/300HPICTLCS-870/CV850ESSH2ARM7TDMIIA-32
CompilerWinAVR(gcc)CH38C30(gcc)CC870CCA850SHCWinARM(gcc)MSC
_WORD_ACCESS10011001
ROM (Full, R/W)1196210433107531515377478707105847337
ROM (Min, R/W)74666799677299064901559965484787
ROM (Full, R/O)54004687480467443539379946763380
ROM (Min, R/O)38043527342150402561286732762533
RAM (Static)D*2 + 2D*4 + 2D*2 + 2D*2 + 2D*4 + 2D*4 + 2D*4 + 2D*4 + 2
RAM (Dynamic)
(_FS_TINY == 0)		D*560 +
F*544		D*560 +
F*550		D*560 +
F*544		D*560 +
F*550		D*560 +
F*550		D*560 +
F*550		D*560 +
F*550
RAM (Dynamic)
(_FS_TINY == 1)		D*560 +
F*32		D*560 +
F*36		D*560 +
F*32		D*560 +
F*32		D*560 +
F*36		D*560 +
F*36		D*560 +
F*36		D*560 +
F*36
+

上ã®è¡¨ã«ã„ãã¤ã‹ã®ã‚¿ãƒ¼ã‚²ãƒƒãƒˆã«ãŠã‘るメモリ使用é‡ã®ä¾‹ã‚’示ã—ã¾ã™ã€‚テスト時ã®æ§‹æˆã‚ªãƒ—ションã¯æ¬¡ã®é€šã‚Šã§ã™ã€‚数値ã®å˜ä½ã¯ãƒã‚¤ãƒˆã§ã€Dã¯è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–æ•°ã€Fã¯åŒæ™‚オープン・ファイル数を示ã—ã¾ã™ã€‚コンパイラã®æœ€é©åŒ–オプションã¯ã‚³ãƒ¼ãƒ‰ãƒ»ã‚µã‚¤ã‚ºã¨ã—ã¦ã„ã¾ã™ã€‚

+
+_FS_READONLY     0 (R/W), 1 (R/O)
+_FS_MINIMIZE     0 (Full function), 3 (Minimized function)
+_USE_STRFUNC     0 (Disable string functions)
+_USE_MKFS        0 (Disable f_mkfs function)
+_USE_FORWARD     0 (Disable f_forward function)
+_CODE_PAGE       932 (Japanese Shift-JIS)
+_USE_LFN         0 (Disable LFN)
+_MAX_SS          512 (Single sector size)
+_FS_RPATH        0 (Disable relative path)
+_MULTI_PARTITION 0 (Single partition per drive)
+_FS_REENTRANT    0 (Disable reentrancy)
+
+
+ +
+

モジュール・サイズã®ç¸®å°

+

次ã®è¡¨ã¯æ§‹æˆã‚ªãƒ—ションã®è¨­å®šå€¤ã«ã‚ˆã‚Šã©ã®æ©Ÿèƒ½ãŒå‰Šé™¤ã•ã‚Œã‚‹ã‹ã‚’示ã—ã¾ã™ã€‚

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Function_FS_MINIMIZE_FS_READONLY_USE_STRFUNC_FS_RPATH_USE_MKFS_USE_FORWARD
12310000
f_mount
f_open
f_close
f_read
f_writex
f_syncx
f_lseekx
f_opendirxx
f_readdirxx
f_statxxx
f_getfreexxxx
f_truncatexxxx
f_unlinkxxxx
f_mkdirxxxx
f_chmodxxxx
f_utimexxxx
f_renamexxxx
f_chdirx
f_chdrivex
f_mkfsxx
f_forwardx
f_putcxx
f_putsxx
f_printfxx
f_getsx
+
+ +
+

é•·ã„ファイルå

+

FatFsモジュールã¯R0.07ã‹ã‚‰é•·ã„ファイルå(LFN)をサãƒãƒ¼ãƒˆã—ã¾ã—ãŸã€‚ファイルã«ä»˜ã‘られãŸ2ã¤ã®ç•°ãªã‚‹åå‰(短ã„ファルåã¨é•·ã„ファイルå)ã¯ã€f_readdir関数を除ãファイルæ“作関数ã«ãŠã„ã¦é€éŽã§ã™ã€‚LFN機能を有効ã«ã™ã‚‹ã«ã¯ã€_USE_LFNã‚’1ã¾ãŸã¯2ã«è¨­å®šã—ã€Unicode変æ›é–¢æ•° ff_convert, ff_wtoupper をプロジェクトã«è¿½åŠ ã—ã¾ã™ã€‚ã“れらã®é–¢æ•°ã¯ã€cc*.cã«å«ã¾ã‚Œã¦ã„ã¾ã™ã€‚LFN機能ã¯ã€åŠ ãˆã¦ã‚る程度ã®ãƒ¯ãƒ¼ã‚¯ãƒ»ã‚¨ãƒªã‚¢(LFNæ“作ãƒãƒƒãƒ•ã‚¡)ã‚’å¿…è¦ã¨ã—ã¾ã™ã€‚ãƒãƒƒãƒ•ã‚¡é•·ã¯ä½¿ç”¨ã§ãるメモリã«å¿œã˜ã¦_MAX_LFNオプションã§æ§‹æˆã•ã‚Œã‚‹ã“ã¨ãŒã§ãã¾ã™ã€‚LFNã®é•·ã•ã¯æœ€å¤§255文字ã«é”ã™ã‚‹ã®ã§ã€LFN完全対応ã®ãŸã‚ã«ã¯_MAX_LFNã¯255ã«è¨­å®šã•ã‚Œã‚‹ã¹ãã§ã™ã€‚与ãˆã‚‰ã‚ŒãŸãƒ•ã‚¡ã‚¤ãƒ«åã«å¯¾ã—ã¦ãƒãƒƒãƒ•ã‚¡é•·ãŒä¸è¶³ã—ãŸå ´åˆã€ãƒ•ã‚¡ã‚¤ãƒ«é–¢æ•°ã¯FR_INVALID_NAMEã§å¤±æ•—ã—ã¾ã™ã€‚

+

LFN機能をリエントラント構æˆã§ä½¿ç”¨ã™ã‚‹å ´åˆã¯ã€_USE_LFNã¯2ã«è¨­å®šã•ã‚Œãªã‘ã‚Œã°ãªã‚Šã¾ã›ã‚“。ã“ã®å ´åˆã€ãƒ•ã‚¡ã‚¤ãƒ«é–¢æ•°ã¯ãƒãƒƒãƒ•ã‚¡ã‚’スタックã«ç¢ºä¿ã—ã¾ã™ã€‚ãƒãƒƒãƒ•ã‚¡ãƒ»ã‚µã‚¤ã‚ºã¯ã€(_MAX_LFN + 1) * 2ãƒã‚¤ãƒˆã«ãªã‚‹ã®ã§ã€å‘¼ã³å‡ºã—å´ã‚¹ã‚¿ãƒƒã‚¯ã®ã‚µã‚¤ã‚ºã¯ãれを考慮ã—ãŸå分ãªã‚µã‚¤ã‚ºã§ãªã‘ã‚Œã°ãªã‚Šã¾ã›ã‚“。

+ + + + + + + + +
LFN cfg on ARM7
コードページROMサイズ[bytes]
SBCS+3721
932(Shift-JIS)+62609
936(GBK)+177797
949(Korean)+139857
950(Big5)+111497
+

LFNを有効ã«ã™ã‚‹ã¨ã€é¸æŠžã•ã‚ŒãŸã‚³ãƒ¼ãƒ‰ãƒ»ãƒšãƒ¼ã‚¸ã«å¿œã˜ã¦ãƒ¢ã‚¸ãƒ¥ãƒ¼ãƒ«ãƒ»ã‚µã‚¤ã‚ºãŒå¢—大ã•ã‚Œã¾ã™ã€‚å³ã®è¡¨ã«å„コード・ページã«ãŠã‘ã‚‹LFNを有効ã«ã—ãŸã¨ãã®ãƒ¢ã‚¸ãƒ¥ãƒ¼ãƒ«ãƒ»ã‚µã‚¤ã‚ºã®é•ã„を示ã—ã¾ã™ã€‚ç§ãŸã¡æ—¥æœ¬äººã€ä¸­å›½äººãŠã‚ˆã³éŸ“国人ã¯æ•°ä¸‡ã®æ–‡å­—ã‚’æŒã¡ã¾ã™ã€‚ä¸å¹¸ãªã“ã¨ã«ã€ãã‚Œã¯å·¨å¤§ãªOEMï¼Unicode相互変æ›ãƒ†ãƒ¼ãƒ–ルをè¦æ±‚ã—ã€ãƒ¢ã‚¸ãƒ¥ãƒ¼ãƒ«ãƒ»ã‚µã‚¤ã‚ºã¯åŠ‡çš„ã«å¢—大ã•ã‚Œã¾ã™ã€‚ãã®çµæžœã€LFNを有効ã«ã—ãŸFatFsモジュールã¯ã€AVRã‚’å«ã‚€æ®†ã©ã®8ビット・マイコンã«ã‚¤ãƒ³ãƒ—リメントã•ã‚Œã‚‹ã“ã¨ãŒã§ãã¾ã›ã‚“。ã“ã‚Œã¯é•·ã„é–“ç§ãŒLFNをインプリメントã™ã‚‹ã“ã¨ã«èˆˆå‘³ã‚’æŒã£ã¦ã“ãªã‹ã£ãŸç†ç”±ã§ã™ã€‚

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注: FATファイル・システム上ã®LFN機能ã¯ãƒžã‚¤ã‚¯ãƒ­ã‚½ãƒ•ãƒˆç¤¾ã®ç‰¹è¨±ã§ã™ã€‚商用製å“ã§ãれを有効ã«ã™ã‚‹ã¨ãã¯ã€æœ€çµ‚仕å‘地ã«ã‚ˆã£ã¦ã¯ãƒ©ã‚¤ã‚»ãƒ³ã‚¹ãŒå¿…è¦ã‹ã‚‚知れã¾ã›ã‚“。

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+ +
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リエントランシー

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ç•°ãªã‚‹ãƒœãƒªãƒ¥ãƒ¼ãƒ (è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–)ã«å¯¾ã™ã‚‹ãƒ•ã‚¡ã‚¤ãƒ«æ“作ã¯ã€ãƒªã‚¨ãƒ³ãƒˆãƒ©ãƒ³ãƒˆè¨­å®šã«ã‚ˆã‚‰ãšå¸¸ã«åŒæ™‚平行ã«å‹•ä½œã§ãã¾ã™ã€‚åŒã˜ãƒœãƒªãƒ¥ãƒ¼ãƒ ã«å¯¾ã™ã‚‹ãƒªã‚¨ãƒ³ãƒˆãƒ©ãƒ³ã‚·ãƒ¼ã¯_FS_REENTRANTオプションã§æœ‰åŠ¹ã«ã•ã‚Œã‚‹ã“ã¨ãŒã§ãã¾ã™ã€‚ã“ã®å ´åˆã€OSä¾å­˜ã®åŒæœŸã‚ªãƒ–ジェクトæ“作関数 ff_cre_syncobj, ff_del_syncobj, ff_req_grant 㨠ff_rel_grant ã‚‚ã¾ãŸãƒ—ロジェクトã«è¿½åŠ ã•ã‚Œãªã‘ã‚Œã°ãªã‚Šã¾ã›ã‚“。サンプル・コードã¨è§£èª¬ã¯syncobj.cã«ã‚ã‚Šã¾ã™ã€‚

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ä»–ã®ã‚¿ã‚¹ã‚¯ãŒãã®ãƒœãƒªãƒ¥ãƒ¼ãƒ ã‚’使用中ã«ãƒ•ã‚¡ã‚¤ãƒ«é–¢æ•°ãŒå‘¼ã³å‡ºã•ã‚Œã‚‹ã¨ã€ãã®ã‚¢ã‚¯ã‚»ã‚¹ã¯ãã®ã‚¿ã‚¹ã‚¯ãŒãƒ•ã‚¡ã‚¤ãƒ«é–¢æ•°ã‚’抜ã‘ã‚‹ã¾ã§ãƒ–ロックã•ã‚Œã¾ã™ã€‚ã‚‚ã—ã€å¾…ã¡æ™‚é–“ãŒ_TIMEOUTã§æŒ‡å®šã•ã‚ŒãŸæœŸé–“を越ã™ã¨ã€ãã®é–¢æ•°ã¯FR_TIMEOUTã§ã‚¢ãƒœãƒ¼ãƒˆã—ã¾ã™ã€‚ã„ãã¤ã‹ã®RTOSã§ã¯ã‚¿ã‚¤ãƒ ã‚¢ã‚¦ãƒˆæ©Ÿèƒ½ã¯ã‚µãƒãƒ¼ãƒˆã•ã‚Œãªã„ã‹ã‚‚知れã¾ã›ã‚“。

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ã²ã¨ã¤ã®ä¾‹å¤–ãŒf_mountã¨f_mkfs関数ã«ã‚ã‚Šã¾ã™ã€‚ã“れらã®é–¢æ•°ã¯åŒã˜ãƒœãƒªãƒ¥ãƒ¼ãƒ ã«å¯¾ã—ã¦ãƒªã‚¨ãƒ³ãƒˆãƒ©ãƒ³ãƒˆã§ã¯ã‚ã‚Šã¾ã›ã‚“。ã“れらã®é–¢æ•°ã‚’使用ã™ã‚‹ã¨ãã¯ã€ä»–ã®ã‚¹ãƒ¬ãƒƒãƒ‰ã¯é–¢é€£ã™ã‚‹ãƒ•ã‚¡ã‚¤ãƒ«ã‚’é–‰ã˜ã€ãã®ãƒœãƒªãƒ¥ãƒ¼ãƒ ã¸ã®ã‚¢ã‚¯ã‚»ã‚¹ã‚’é¿ã‘ãªã‘ã‚Œã°ãªã‚Šã¾ã›ã‚“。

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注: ã“ã®ã‚»ã‚¯ã‚·ãƒ§ãƒ³ã¯FatFsモジュールãれ自体ã®ãƒªã‚¨ãƒ³ãƒˆãƒ©ãƒ³ã‚·ãƒ¼ã«ã¤ã„ã¦èª¬æ˜Žã—ã¦ã„ã¾ã™ã€‚ディスクI/Oモジュールã®ãƒªã‚¨ãƒ³ãƒˆãƒ©ãƒ³ã‚·ãƒ¼ã«é–¢ã—ã¦ã¯ä½•ã®å‰æã‚‚ã‚ã‚Šã¾ã›ã‚“。

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+ +
+

多é‡ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ã‚¢ã‚¯ã‚»ã‚¹

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FatFsモジュールã§ã¯å¤šé‡ã‚¢ã‚¯ã‚»ã‚¹æ©Ÿèƒ½ã¯ã‚µãƒãƒ¼ãƒˆã•ã‚Œã¾ã›ã‚“。ファイルã«å¯¾ã™ã‚‹å¤šé‡ã‚¢ã‚¯ã‚»ã‚¹ã¯ã€ãã®ã‚¢ã‚¯ã‚»ã‚¹ãƒ»ãƒ¢ãƒ¼ãƒ‰ã«ã‚ˆã£ã¦åˆ¶é™ã•ã‚Œã¾ã™ã€‚一ã¤ã®ãƒ•ã‚¡ã‚¤ãƒ«ã«å¯¾ã™ã‚‹å¤šé‡ã‚ªãƒ¼ãƒ—ンã¯ã€ãれらãŒå…¨ã¦ãƒªãƒ¼ãƒ‰ãƒ»ãƒ¢ãƒ¼ãƒ‰ã®ã¨ã許å¯ã•ã‚Œã¾ã™ã€‚書ãè¾¼ã¿ãƒ¢ãƒ¼ãƒ‰ã‚’å«ã‚€å¤šé‡ã‚ªãƒ¼ãƒ—ンã€ã¾ãŸé–‹ã‹ã‚Œã¦ã„るファイルã«å¯¾ã™ã‚‹ãƒªãƒãƒ¼ãƒ ã‚„消去を行ã£ã¦ã¯ãªã‚Šã¾ã›ã‚“。ã•ã‚‚ãªã„ã¨ã€ãã®ãƒœãƒªãƒ¥ãƒ¼ãƒ ã®FAT構造ãŒç ´å£Šã•ã‚Œã‚‹å¯èƒ½æ€§ãŒã‚ã‚Šã¾ã™ã€‚

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効率的ãªãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ã‚¢ã‚¯ã‚»ã‚¹

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å°è¦æ¨¡ãªçµ„込システムã§ã®ãƒ•ã‚¡ã‚¤ãƒ«ã®èª­ã¿æ›¸ãã«ãŠã‘る効率ã®è‰¯ã„アクセスã®ãŸã‚ã€ã‚¢ãƒ—リケーション・プログラマã¯FatFsモジュールã®ä¸­ã§ã©ã®ã‚ˆã†ãªå‡¦ç†ãŒè¡Œã‚ã‚Œã¦ã„ã‚‹ã‹è€ƒæ…®ã™ã¹ãã§ã™ã€‚ディスク上ã®ãƒ‡ãƒ¼ã‚¿ã¯f_read関数ã«ã‚ˆã‚Šæ¬¡ã®ã‚·ãƒ¼ã‚±ãƒ³ã‚¹ã§è»¢é€ã•ã‚Œã¾ã™ã€‚

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図1. セクタ・ミスアラインド・リード (ショート)
+fig.1 +

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図2. セクタ・ミスアラインド・リード (ロング)
+fig.2 +

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図3. セクタ・アラインド・リード
+fig.3 +

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ファイルI/Oãƒãƒƒãƒ•ã‚¡ã¯ã‚»ã‚¯ã‚¿ã®ä¸€éƒ¨ã®ãƒ‡ãƒ¼ã‚¿ã‚’読ã¿æ›¸ãã™ã‚‹ãŸã‚ã®ã‚»ã‚¯ã‚¿ãƒ»ãƒãƒƒãƒ•ã‚¡ã‚’æ„味ã—ã¾ã™ã€‚セクタ・ãƒãƒƒãƒ•ã‚¡ã¯ã€ãã‚Œãžã‚Œã®ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ã‚ªãƒ–ジェクト内ã®ãƒ—ライベート・セクタ・ãƒãƒƒãƒ•ã‚¡ã¾ãŸã¯ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ã‚·ã‚¹ãƒ†ãƒ ãƒ»ã‚ªãƒ–ジェクト内ã®å…±æœ‰ã‚»ã‚¯ã‚¿ãƒ»ãƒãƒƒãƒ•ã‚¡ã®ã©ã¡ã‚‰ã‹ã§ã™ã€‚ãƒãƒƒãƒ•ã‚¡æ§‹æˆã‚ªãƒ—ションã®_FS_TINYã¯ã€ãƒ‡ãƒ¼ã‚¿è»¢é€ã«ã©ã¡ã‚‰ã‚’使ã†ã‹ã‚’決定ã—ã¾ã™ã€‚タイニー・ãƒãƒƒãƒ•ã‚¡(1)ãŒé¸æŠžã•ã‚Œã‚‹ã¨ãƒ‡ãƒ¼ã‚¿ãƒ»ãƒ¡ãƒ¢ãƒªã®æ¶ˆè²»ã¯ãã‚Œãžã‚Œã®ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ã‚ªãƒ–ジェクトã§512ãƒã‚¤ãƒˆæ¸›å°‘ã•ã‚Œã¾ã™ã€‚ã“ã®å ´åˆã€FatFsモジュールã¯ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ãƒ‡ãƒ¼ã‚¿ã®è»¢é€ã¨FAT/ディレクトリ・アクセスã«ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ã‚·ã‚¹ãƒ†ãƒ ãƒ»ã‚ªãƒ–ジェクト内ã®ã‚»ã‚¯ã‚¿ãƒ»ãƒãƒƒãƒ•ã‚¡ã ã‘を使用ã—ã¾ã™ã€‚タイニー・ãƒãƒƒãƒ•ã‚¡ã®æ¬ ç‚¹ã¯ã€ã‚»ã‚¯ã‚¿ãƒ»ãƒãƒƒãƒ•ã‚¡ã«ã‚­ãƒ£ãƒƒã‚·ãƒ¥ã•ã‚ŒãŸFATデータãŒãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ãƒ‡ãƒ¼ã‚¿ã®è»¢é€ã«ã‚ˆã‚Šå¤±ã‚ã‚Œã€ã‚¯ãƒ©ã‚¹ã‚¿å¢ƒç•Œã®æ¯Žã«ãƒªãƒ­ãƒ¼ãƒ‰ã•ã‚Œãªã‘ã‚Œã°ãªã‚‰ãªã„ã“ã¨ã§ã™ã€‚ã§ã‚‚ã€æ‚ªããªã„性能ã¨å°‘ãªã„メモリ消費ã®è¦–点ã‹ã‚‰å¤šãã®ã‚¢ãƒ—リケーションã«é©ã™ã‚‹ã§ã—ょã†ã€‚

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図1ã¯ã‚»ã‚¯ã‚¿ã®ä¸€éƒ¨ã®ãƒ‡ãƒ¼ã‚¿ãŒãƒ•ã‚¡ã‚¤ãƒ«I/Oãƒãƒƒãƒ•ã‚¡ã‚’経由ã§è»¢é€ã•ã‚Œã‚‹ã“ã¨ã‚’示ã—ã¾ã™ã€‚図2ã«ç¤ºã•ã‚Œã‚‹é•·ã„データã®è»¢é€ã§ã¯ã€è»¢é€ãƒ‡ãƒ¼ã‚¿ã®ä¸­é–“ã®1セクタã¾ãŸã¯ãれ以上ã®ã‚»ã‚¯ã‚¿ã«ã¾ãŸãŒã‚‹è»¢é€ãƒ‡ãƒ¼ã‚¿ãŒã‚¢ãƒ—リケーション・ãƒãƒƒãƒ•ã‚¡ã«ç›´æŽ¥è»¢é€ã•ã‚Œã¦ã„ã¾ã™ã€‚図3ã¯è»¢é€ãƒ‡ãƒ¼ã‚¿å…¨ä½“ãŒã‚»ã‚¯ã‚¿å¢ƒç•Œã«ã‚¢ãƒ©ã‚¤ãƒ¡ãƒ³ãƒˆã•ã‚Œã¦ã„ã‚‹å ´åˆã‚’示ã—ã¦ã„ã¾ã™ã€‚ã“ã®å ´åˆã€ãƒ•ã‚¡ã‚¤ãƒ«I/Oãƒãƒƒãƒ•ã‚¡ã¯ä½¿ç”¨ã•ã‚Œã¾ã›ã‚“。直接転é€ã«ãŠã„ã¦ã¯æœ€å¤§ã®ç¯„囲ã®ã‚»ã‚¯ã‚¿ãŒdisk_read関数ã§ä¸€åº¦ã«èª­ã¿è¾¼ã¾ã‚Œã¾ã™ãŒã€ã‚¯ãƒ©ã‚¹ã‚¿å¢ƒç•Œã‚’越ãˆã‚‹ãƒžãƒ«ãƒãƒ»ã‚»ã‚¯ã‚¿è»¢é€ã¯ãã‚ŒãŒéš£æŽ¥ã§ã‚ã£ã¦ã‚‚è¡Œã‚ã‚Œã¾ã›ã‚“。

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ã“ã®ã‚ˆã†ã«ã€ã‚»ã‚¯ã‚¿ã«ã‚¢ãƒ©ã‚¤ãƒ¡ãƒ³ãƒˆã—ãŸãƒ•ã‚¡ã‚¤ãƒ«ã®èª­ã¿æ›¸ãã¸ã®é…æ…®ã¯ãƒãƒƒãƒ•ã‚¡çµŒç”±ã®ãƒ‡ãƒ¼ã‚¿è»¢é€ã‚’é¿ã‘ã€èª­ã¿æ›¸ã性能ã¯æ”¹å–„ã•ã‚Œã‚‹ã§ã—ょã†ã€‚ãã®åŠ¹æžœã«åŠ ãˆã€ã‚¿ã‚¤ãƒ‹ãƒ¼æ§‹æˆã§ã‚­ãƒ£ãƒƒã‚·ãƒ¥ã•ã‚ŒãŸFATデータãŒãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ãƒ‡ãƒ¼ã‚¿ã®è»¢é€ã«ã‚ˆã‚Šãƒ•ãƒ©ãƒƒã‚·ãƒ¥ã•ã‚Œãšã€éžã‚¿ã‚¤ãƒ‹ãƒ¼æ§‹æˆã¨åŒã˜æ€§èƒ½ã‚’å°ã•ãªãƒ¡ãƒ¢ãƒªãƒ»ãƒ•ãƒƒãƒˆãƒ—リントã§é”æˆã§ãã¾ã™ã€‚

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+ +
+

クリãƒã‚«ãƒ«ãƒ»ã‚»ã‚¯ã‚·ãƒ§ãƒ³

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ディスク上ã®FAT構造をæ“作ã—ã¦ã„る途中ã§ã€åœé›»ã€ä¸æ­£ãªãƒ¡ãƒ‡ã‚£ã‚¢ã®å–り外ã—ã€å›žå¾©ä¸èƒ½ãªãƒ‡ãƒ¼ã‚¿ãƒ»ã‚¨ãƒ©ãƒ¼ç­‰ã®éšœå®³ãŒç™ºç”Ÿã™ã‚‹ã¨ã€å‡¦ç†ãŒä¸­é€”åŠç«¯ãªçŠ¶æ…‹ã§ä¸­æ–­ã•ã‚Œã€ãã®çµæžœã¨ã—ã¦FAT構造ãŒç ´å£Šã•ã‚Œã‚‹å¯èƒ½æ€§ãŒã‚ã‚Šã¾ã™ã€‚次ã«FatFsモジュールã«ãŠã‘るクリãƒã‚«ãƒ«ãƒ»ã‚»ã‚¯ã‚·ãƒ§ãƒ³ã¨ã€ãã®é–“ã®éšœå®³ã«ã‚ˆã‚Šèµ·ãã†ã‚‹ã‚¨ãƒ©ãƒ¼ã®çŠ¶æ…‹ã‚’示ã—ã¾ã™ã€‚

+
+図4. é•·ã„クリãƒã‚«ãƒ«ãƒ»ã‚»ã‚¯ã‚·ãƒ§ãƒ³
+fig.4 +
+
+図5. 最å°åŒ–ã—ãŸã‚¯ãƒªãƒã‚«ãƒ«ãƒ»ã‚»ã‚¯ã‚·ãƒ§ãƒ³
+fig.5 +
+
+

赤ã§ç¤ºã—ãŸã‚»ã‚¯ã‚·ãƒ§ãƒ³ã‚’実行中ã«éšœå®³ãŒç™ºç”Ÿã—ãŸå ´åˆã€ã‚¯ãƒ­ã‚¹ãƒ»ãƒªãƒ³ã‚¯ãŒç™ºç”Ÿã—ã¦æ“作対象ã®ãƒ•ã‚¡ã‚¤ãƒ«ãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªãŒå¤±ã‚れるå¯èƒ½æ€§ãŒã‚ã‚Šã¾ã™ã€‚黄色ã§ç¤ºã—ãŸã‚»ã‚¯ã‚·ãƒ§ãƒ³ã‚’実行中ã«éšœå®³ãŒç™ºç”Ÿã—ãŸå ´åˆã€ã¤ãŽã®ã†ã¡ã„ãšã‚Œã‹ã¾ãŸã¯è¤‡æ•°ã®çµæžœãŒç”Ÿã˜ã‚‹å¯èƒ½æ€§ãŒã‚ã‚Šã¾ã™ã€‚

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    +
  • 書ãæ›ãˆä¸­ã®ãƒ•ã‚¡ã‚¤ãƒ«ã®å†…容ãŒç ´å£Šã•ã‚Œã‚‹ã€‚
    • +
  • 追記中ã®ãƒ•ã‚¡ã‚¤ãƒ«ãŒã‚ªãƒ¼ãƒ—ンå‰ã®çŠ¶æ…‹ã«æˆ»ã‚‹ã€‚
    • +
  • æ–°è¦ã«ä½œæˆã•ã‚ŒãŸãƒ•ã‚¡ã‚¤ãƒ«ãŒæ¶ˆãˆã‚‹ã€‚
    • +
  • æ–°è¦ã¾ãŸã¯ä¸Šæ›¸ãã§ä½œæˆã•ã‚ŒãŸãƒ•ã‚¡ã‚¤ãƒ«ã®é•·ã•ãŒã‚¼ãƒ­ã«ãªã£ã¦æ®‹ã‚‹ã€‚
    • +
  • ロストãƒã‚§ãƒ¼ãƒ³ã®ç™ºç”Ÿã«ã‚ˆã‚Šãƒ‡ã‚£ã‚¹ã‚¯ã®åˆ©ç”¨åŠ¹çŽ‡ãŒæ‚ªåŒ–ã™ã‚‹ã€‚
    • +
+

ã„ãšã‚Œã‚‚書ãè¾¼ã¿ä¸­ã‚„æ“作対象ã§ãªã„ファイルã«ã¯å½±éŸ¿ã¯ã‚ã‚Šã¾ã›ã‚“。ã“れらã®ã‚¯ãƒªãƒã‚«ãƒ«ãƒ»ã‚»ã‚¯ã‚·ãƒ§ãƒ³ã¯ã€ãƒ•ã‚¡ã‚¤ãƒ«ã‚’書ãè¾¼ã¿ãƒ¢ãƒ¼ãƒ‰ã§é–‹ã„ã¦ã„る時間を最å°é™ã«ã™ã‚‹ã‹ã€f_sync()ã‚’é©å®œä½¿ç”¨ã™ã‚‹ã“ã¨ã§å›³5ã®ã‚ˆã†ã«ãƒªã‚¹ã‚¯ã‚’最å°åŒ–ã™ã‚‹ã“ã¨ãŒã§ãã¾ã™ã€‚

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+ +
+

ファイルåã®å¤§æ–‡å­—変æ›

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CP932(Shift_JIS)ã§ã‹ã¤éžLFN構æˆã®ã¨ãã¯ã€æ‹¡å¼µæ–‡å­—(2ãƒã‚¤ãƒˆã®è‹±å­—・キリル文字・ギリシャ文字)ã«å¯¾ã—ã¦å¤§æ–‡å­—変æ›ã‚’è¡Œã‚ãšã€å°æ–‡å­—ã¯å°æ–‡å­—ã§ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã«è¨˜éŒ²ãƒ»æ¯”較ã•ã‚Œã¾ã™ã€‚ã“ã‚Œã¯æ—¥æœ¬èªžMSDOSã¨åŒã˜ä»•æ§˜ã¨ãªã‚Šã¾ã™ã€‚ã“ã®ãŸã‚ã€å…¨è§’å°æ–‡å­—ã‚’å«ã‚€ãƒ•ã‚¡ã‚¤ãƒ«ã‚’作æˆã™ã‚‹ã¨ã€Windows環境ã§ãã®ãƒ•ã‚¡ã‚¤ãƒ«ã‚’é–‹ã‘ãªããªã‚Šã¾ã™ã€‚LFN構æˆã§ã¯å¤§æ–‡å­—変æ›ã‚’è¡Œã„ã¾ã™(Windows仕様)。

+
+ +
+

Unicode入出力ã¸ã®å¯¾å¿œ

+

ファイル関数ã®ãƒ•ã‚¡ã‚¤ãƒ«å入出力をUnicodeã«åˆ‡ã‚Šæ›¿ãˆã‚‹ã“ã¨ãŒã§ãã¾ã™ã€‚詳細ã¯ã€ãƒ•ã‚¡ã‚¤ãƒ«åã‚’å‚ç…§ã—ã¦ãã ã•ã„。

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+ +

戻る

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/chdir.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/chdir.html new file mode 100644 index 000000000..1fea6f291 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/chdir.html @@ -0,0 +1,85 @@ + + + + + + + +FatFs - f_chdir + + + + +
+

f_chdir

+

ƒJƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚ð•ÏX‚µ‚Ü‚·B

+
+FRESULT f_chdir (
+  const XCHAR* Path /* ƒfƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
Path
+
ˆÚ“®‘Îۂ̃fƒBƒŒƒNƒgƒŠ‚̃pƒX–¼‚Ì“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_FILE
+
ƒtƒ@ƒCƒ‹‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ª—^‚¦‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

f_chdirŠÖ”‚ÍŠeƒ{ƒŠƒ…[ƒ€‚̃JƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚ð•ÏX‚µ‚Ü‚·BƒJƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚̓tƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg‚̉Šú‰»‚ªs‚í‚ꂽ‚Æ‚«Aƒ‹[ƒgEƒfƒBƒŒƒNƒgƒŠ‚Éݒ肳‚ê‚Ü‚·BƒJƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚ÍAƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg‚É‹L˜^‚³‚ê‚邽‚ßA‚»‚̃{ƒŠƒ…[ƒ€‚ðŽg—p‚·‚é‘S‚Ẵ^ƒXƒN‚ɑ΂µ‚ĉe‹¿‚ð—^‚¦‚Ü‚·B‚±‚ÌŠÖ”‚Í‘Š‘΃pƒX‚ª—LŒø‚È‚Æ‚«(_FS_RPATH == 1)‚ÉŽg—p‰Â”\‚Æ‚È‚è‚Ü‚·B

+
+ + +
+

ƒTƒ“ƒvƒ‹EƒR[ƒh

+
+    // ƒJƒŒƒ“ƒgEƒhƒ‰ƒCƒu‚̃JƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚ð•ÏX (ƒ‹[ƒg‰º‚Ìdir1‚Ö)
+    f_chdir("/dir1");
+
+    // ƒhƒ‰ƒCƒu2‚̃JƒŒƒ“ƒgEƒfƒBƒŒƒNƒgƒŠ‚ð•ÏX (eƒfƒBƒŒƒNƒgƒŠ‚Ö)
+    f_chdir("2:..");
+
+
+ +
+

ŽQÆ

+

f_chdrive

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/chdrive.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/chdrive.html new file mode 100644 index 000000000..61890859b --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/chdrive.html @@ -0,0 +1,55 @@ + + + + + + + +FatFs - f_chdrive + + + + +
+

f_chdrive

+

ƒJƒŒƒ“ƒgEƒhƒ‰ƒCƒu‚ð•ÏX‚µ‚Ü‚·B

+
+FRESULT f_chdrive (
+  BYTE Drive /* ˜_—ƒhƒ‰ƒCƒu”Ô† */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
ƒJƒŒƒ“ƒgEƒhƒ‰ƒCƒu‚ÉÝ’è‚·‚é˜_—ƒhƒ‰ƒCƒu”Ô†‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
+
+ + +
+

‰ðà

+

f_chdriveŠÖ”‚̓JƒŒƒ“ƒgEƒhƒ‰ƒCƒu‚ð•ÏX‚µ‚Ü‚·BƒVƒXƒeƒ€‹N“®Žž‚̉Šú’l‚Í0‚Å‚·B‚±‚ÌÝ’è‚ÍFatFsƒ‚ƒWƒ…[ƒ‹‚ÌÓI•Ï”‚É‹L˜^‚³‚ê‚邽‚ßA‘S‚Ẵ^ƒXƒN‚ɑ΂µ‚ĉe‹¿‚ð—^‚¦‚Ü‚·B‚±‚ÌŠÖ”‚Í‘Š‘΃pƒX‚ª—LŒø‚È‚Æ‚«(_FS_RPATH == 1)‚ÉŽg—p‰Â”\‚Æ‚È‚è‚Ü‚·B

+
+ +
+

ŽQÆ

+

f_chdir

+
+ +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/chmod.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/chmod.html new file mode 100644 index 000000000..54975b779 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/chmod.html @@ -0,0 +1,91 @@ + + + + + + + +FatFs - f_chmod + + + + +
+

f_chmod

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚Ì‘®«‚ð•ÏX‚µ‚Ü‚·B

+
+FRESULT f_chmod (
+  const XCHAR* FileName, /* ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+  BYTE Attribute,        /* Ý’è’l */
+  BYTE AttributeMask     /* •ÏXƒ}ƒXƒN */
+);
+
+
+ +
+

ˆø”

+
+
FileName
+
‘®«•ÏX‘Îۂ̃tƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚̃pƒX–¼‚Ì“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ðŽw’肵‚Ü‚·B
+
Attribute
+
Ý’è‚·‚é‘®«BŽw’è‰Â”\‚È‘®«‚ÍŽŸ‚Ì’Ê‚è‚ÅA‚±‚ê‚ç‚Ì‘g‚݇‚킹‚ÅŽw’肵‚Ü‚·BŽw’肳‚ê‚È‚©‚Á‚½‘®«‚͉𜂳‚ê‚Ü‚·B
+ + + + + + +
’lˆÓ–¡
AM_RDOƒŠ[ƒhEƒIƒ“ƒŠ[
AM_ARCƒA[ƒJƒCƒu
AM_SYSƒVƒXƒeƒ€
AM_HIDƒqƒhƒDƒ“
+
+
AttributeMask
+
•ÏX‚·‚é‘®«‚̃}ƒXƒNBŽw’肵‚½‘®«‚ªÝ’è‚Ü‚½‚͉𜂳‚êAŽw’肳‚ê‚È‚©‚Á‚½‘®«‚Íó‘Ô‚ª•ÛŽ‚³‚ê‚Ü‚·BAttribute‚Æ“¯‚¶’l‚ðŽg‚¢‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_FILE
+
ƒtƒ@ƒCƒ‹‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ª—^‚¦‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚Ì‘®«‚ð•ÏX‚µ‚Ü‚·BƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚¨‚æ‚Ñ_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—á

+
+    // Set read-only flag , clear archive flag and others are left unchanged.
+    f_chmod("file.txt", AM_RDO, AM_RDO | AM_ARC);
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/close.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/close.html new file mode 100644 index 000000000..e68a92b5f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/close.html @@ -0,0 +1,62 @@ + + + + + + + +FatFs - f_close + + + + +
+

f_close

+

ƒtƒ@ƒCƒ‹‚ð•Â‚¶‚Ü‚·B

+
+FRESULT f_close (
+  FIL* FileObject     /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
•Â‚¶‚悤‚Æ‚·‚éƒtƒ@ƒCƒ‹‚̃tƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚ð•Â‚¶‚Ü‚·B‘‚«ž‚Ý‚Ìs‚í‚ꂽƒtƒ@ƒCƒ‹‚Ìê‡AƒLƒƒƒbƒVƒ…‚³‚ꂽó‘ÔiR/Wƒoƒbƒtƒ@ã‚̃f[ƒ^A•ÏX‚³‚ꂽFAT‚âƒfƒBƒŒƒNƒgƒŠ€–Új‚̓fƒBƒXƒN‚É‘‚«–ß‚³‚ê‚Ü‚·BŠÖ”‚ª³íI—¹‚·‚é‚ÆA‚»‚̃tƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚Í–³Œø‚É‚È‚èA‚»‚̃ƒ‚ƒŠ‚à‰ð•ú‚Å‚«‚Ü‚·B“Ç‚Ýž‚Ýê—pƒ‚[ƒh‚ÅŠJ‚©‚ꂽƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ÍA‚±‚ÌŠÖ”‚É‚æ‚éƒNƒ[ƒYˆ—‚ðŒo‚¸‚É”jŠü‚·‚邱‚Æ‚à‚Å‚«‚Ü‚·B

+
+ + +
+

ŽQÆ

+f_open, f_read, f_write, f_sync, FIL, FATFS +
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/dinit.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/dinit.html new file mode 100644 index 000000000..dcaa9ef0d --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/dinit.html @@ -0,0 +1,45 @@ + + + + + + + +FatFs - disk_initialize + + + + +
+

disk_initialize

+

ƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ð‰Šú‰»‚µ‚Ü‚·B

+
+DSTATUS disk_initialize (
+  BYTE Drive      /* •¨—ƒhƒ‰ƒCƒu”Ô† */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
‰Šú‰»‚·‚镨—ƒhƒ‰ƒCƒu”Ô†(0-9)‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+

‚±‚ÌŠÖ”‚Í–ß‚è’l‚Æ‚µ‚ăfƒBƒXƒNEƒXƒe[ƒ^ƒX‚ð•Ô‚µ‚Ü‚·BƒfƒBƒXƒNEƒXƒe[ƒ^ƒX‚ÌÚׂɊւµ‚Ä‚Ídisk_status()‚ðŽQÆ‚µ‚Ä‚­‚¾‚³‚¢B

+

FatFsƒ‚ƒWƒ…[ƒ‹‚ÍAŽ©“®ƒ}ƒEƒ“ƒg“®ì‚Å•K—v‚ɉž‚¶‚Ä‚±‚ÌŠÖ”‚ðŒÄ‚Ño‚µ‚Ü‚·BFatFsƒ‚ƒWƒ…[ƒ‹Žg—p’†‚̓AƒvƒŠƒP[ƒVƒ‡ƒ“‚©‚炱‚ÌŠÖ”‚ðŒÄ‚Ño‚µ‚Ä‚Í‚È‚è‚Ü‚¹‚ñB‚³‚à‚È‚¢‚ÆFAT\‘¢‚ª”j‰ó‚³‚ê‚é‰Â”\«‚ª‚ ‚è‚Ü‚·B

+
+ +
+

‰ðà

+

ƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ð‰Šú‰»‚µ‚Ü‚·BŠÖ”‚ª¬Œ÷‚·‚é‚ÆA–ß‚è’l‚ÌSTA_NOINITƒtƒ‰ƒO‚ªƒNƒŠƒA‚³‚ê‚Ü‚·B

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/dioctl.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/dioctl.html new file mode 100644 index 000000000..af5f4b38f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/dioctl.html @@ -0,0 +1,67 @@ + + + + + + + +FatFs - disk_ioctl + + + + +
+

disk_ioctl

+

ƒZƒNƒ^‚Ì“Ç‚Ý‘‚«ˆÈŠO‚̃fƒBƒXƒNEƒhƒ‰ƒCƒuŽ©‘̂ɑ΂·‚é—lX‚ȧŒä‚ð‚µ‚Ü‚·B

+
+DRESULT disk_ioctl (
+  BYTE Drive,      /* •¨—ƒhƒ‰ƒCƒu”Ô† */
+  BYTE Command,    /* §ŒäƒRƒ}ƒ“ƒh */
+  void* Buffer     /* ƒf[ƒ^Žó‚¯“n‚µƒoƒbƒtƒ@ */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
•¨—ƒhƒ‰ƒCƒu”Ô†(0-9)‚ðŽw’肵‚Ü‚·B
+
Command
+
§ŒäƒRƒ}ƒ“ƒhEƒR[ƒh‚ðŽw’肵‚Ü‚·B
+
Buffer
+
§ŒäƒRƒ}ƒ“ƒh‚Ɉˑ¶‚µ‚½ƒpƒ‰ƒ[ƒ^‚ðŽöŽó‚·‚éƒoƒbƒtƒ@‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·Bƒoƒbƒtƒ@‚ðŽg—p‚µ‚È‚¢ƒRƒ}ƒ“ƒh‚ÌꇂÍANULL‚ðŽw’肵‚Ü‚·B
+
+
+ +
+

–ß‚è’l

+
+
RES_OK (0)
+
³íI—¹B
+
RES_ERROR
+
‰½‚ç‚©‚̃Gƒ‰[‚ª”­¶‚µ‚½B
+
RES_PARERR
+
ƒRƒ}ƒ“ƒh‚ª•s³B
+
RES_NOTRDY
+
ƒhƒ‰ƒCƒu‚ª“®ì‰Â”\ó‘Ô‚Å‚Í‚È‚¢A‚Ü‚½‚͉Šú‰»‚³‚ê‚Ä‚¢‚È‚¢B
+
+
+ +
+

‰ðà

+

•¨—ƒhƒ‰ƒCƒu‚ÌŽí—Þ‚É‚æ‚èƒTƒ|[ƒg‚³‚ê‚éƒRƒ}ƒ“ƒh‚͈قȂè‚Ü‚·‚ªAFatFsƒ‚ƒWƒ…[ƒ‹‚Å‚ÍAŽŸ‚̔ėpƒRƒ}ƒ“ƒh‚Ì‚ÝŽg—p‚µAƒhƒ‰ƒCƒu‚ÌŽí—ނɈˑ¶‚µ‚½§Œä‚Ís‚¢‚Ü‚¹‚ñB

+

‚±‚ÌŠÖ”‚̓Š[ƒhEƒIƒ“ƒŠ[\¬‚Å‚Í•K—v‚Æ‚³‚ê‚Ü‚¹‚ñB

+ + + + + + +
ƒRƒ}ƒ“ƒh‰ðà
CTRL_SYNCƒhƒ‰ƒCƒu‚ªƒf[ƒ^‚Ì‘‚«ž‚Ý‚ðŠ®—¹‚·‚é‚Ì‚ð‘Ò‚¿‚Ü‚·Bƒ‰ƒCƒgEƒoƒbƒNEƒLƒƒƒbƒVƒ…‚ª‚ ‚éꇂÍA‘‚«ž‚Ü‚ê‚Ä‚¢‚È‚¢ƒf[ƒ^‚𑦎ž‘‚«–ß‚µ‚Ü‚·B
GET_SECTOR_SIZEBuffer‚ÌŽw‚·WORD•Ï”‚Ƀhƒ‰ƒCƒu‚̃ZƒNƒ^EƒTƒCƒY‚ð•Ô‚µ‚Ü‚·B_MAX_SS‚ª1024ˆÈã‚Ì‚Æ‚«•K—v‚Æ‚³‚ê‚Ü‚·B
GET_SECTOR_COUNTBuffer‚ÌŽw‚·DWORD•Ï”‚Ƀhƒ‰ƒCƒuã‚Ì‘ƒZƒNƒ^”‚ð•Ô‚µ‚Ü‚·Bf_mkfs“à‚Å‚Ì‚ÝŽg—pB
GET_BLOCK_SIZEBuffer‚ÌŽw‚·DWORD•Ï”‚Ƀƒ‚ƒŠEƒAƒŒ[‚ÌÁ‹ŽƒuƒƒbƒNƒTƒCƒY‚ðƒZƒNƒ^’PˆÊ‚Å•Ô‚µ‚Ü‚·B•s–¾‚Èꇂ܂½‚ÍHDD‚Å‚Í1‚ð•Ô‚µ‚Ü‚·Bf_mkfs“à‚Å‚Ì‚ÝŽg—pB
+
+ + +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/dread.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/dread.html new file mode 100644 index 000000000..5baf77051 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/dread.html @@ -0,0 +1,58 @@ + + + + + + + +FatFs - disk_read + + + + +
+

disk_read

+

ƒfƒBƒXƒN‚©‚çƒZƒNƒ^‚ð“Ç‚Ýo‚µ‚Ü‚·B

+
+DRESULT disk_read (
+  BYTE Drive,          /* •¨—ƒhƒ‰ƒCƒu”Ô† */
+  BYTE* Buffer,        /* “Ç‚Ýo‚µƒoƒbƒtƒ@‚ւ̃|ƒCƒ“ƒ^ */
+  DWORD SectorNumber,  /* “Ç‚Ýo‚µŠJŽnƒZƒNƒ^”Ô† */
+  BYTE SectorCount     /* “Ç‚Ýo‚µƒZƒNƒ^” */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
•¨—ƒhƒ‰ƒCƒu”Ô†(0-9)‚ðŽw’肵‚Ü‚·B
+
Buffer
+
ƒfƒBƒXƒN‚©‚ç“Ç‚Ýo‚µ‚½ƒf[ƒ^‚ðŠi”[‚·‚éƒoƒCƒg”z—ñ‚ÅA“Ç‚Ýo‚³‚ê‚éƒoƒCƒg”•ª‚̃TƒCƒY‚ª•K—v‚Å‚·BƒAƒhƒŒƒX‚̓Aƒ‰ƒCƒƒ“ƒg‚³‚ê‚Ä‚¢‚é‚Æ‚ÍŒÀ‚è‚Ü‚¹‚ñB
+
SectorNumber
+
“Ç‚Ýo‚µ‚ðŠJŽn‚·‚éƒZƒNƒ^”Ô†BLBA‚ÅŽw’肵‚Ü‚·B
+
SectorCount
+
“Ç‚Ýo‚·ƒZƒNƒ^”B 1`255‚͈̔͂Åݒ肵‚Ü‚·
+
+
+ + +
+

–ß‚è’l

+
+
RES_OK (0)
+
³íI—¹B
+
RES_ERROR
+
“Ç‚Ýž‚Ý’†‚ɃGƒ‰[‚ª”­¶‚µA‚»‚̉ñ•œ‚É‚àŽ¸”s‚µ‚½B
+
RES_PARERR
+
ƒpƒ‰ƒ[ƒ^‚ª•s³B
+
RES_NOTRDY
+
ƒhƒ‰ƒCƒu‚ª“®ì‰Â”\ó‘Ô‚Å‚Í‚È‚¢i‰Šú‰»‚³‚ê‚Ä‚¢‚È‚¢jB
+
+
+ + +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/dstat.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/dstat.html new file mode 100644 index 000000000..9e04ccb1c --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/dstat.html @@ -0,0 +1,47 @@ + + + + + + + +FatFs - disk_status + + + + +
+

disk_status

+

ƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚Ìó‘Ô‚ðŽæ“¾‚µ‚Ü‚·B

+
+DSTATUS disk_status (
+  BYTE Drive           /* •¨—ƒhƒ‰ƒCƒu”Ô† */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
ƒXƒe[ƒ^ƒX‚ðŽæ“¾‚·‚镨—ƒhƒ‰ƒCƒu”Ô†‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+

•¨—ƒhƒ‰ƒCƒu‚Ìó‘Ô‚ªŽŸ‚̃tƒ‰ƒO‚Ì‘g‚݇‚킹‚Ì’l‚Å•Ô‚³‚ê‚Ü‚·B

+
+
STA_NOINIT
+
ƒhƒ‰ƒCƒu‚ª‰Šú‰»‚³‚ê‚Ä‚¢‚È‚¢‚±‚Æ‚ðŽ¦‚·ƒtƒ‰ƒOBƒVƒXƒeƒ€EƒŠƒZƒbƒg‚⃃fƒBƒA‚ÌŽæ‚èŠO‚µ“™‚ŃZƒbƒg‚³‚êAdisk_initialize() ‚̳íI—¹‚ŃNƒŠƒAAŽ¸”s‚ŃZƒbƒg‚³‚ê‚Ü‚·B
+
STA_NODISK
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚±‚Æ‚ðŽ¦‚·ƒtƒ‰ƒOBƒƒfƒBƒA‚ªŽæ‚èŠO‚³‚ê‚Ä‚¢‚éŠÔ‚̓Zƒbƒg‚³‚êAƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚éŠÔ‚̓NƒŠƒA‚³‚ê‚Ü‚·BŒÅ’èƒfƒBƒXƒN‚Å‚Íí‚ɃNƒŠƒA‚³‚ê‚Ä‚¢‚Ü‚·B
+
STA_PROTECTED
+
ƒƒfƒBƒA‚ªƒ‰ƒCƒgEƒvƒƒeƒNƒg‚³‚ê‚Ä‚¢‚邱‚Æ‚ðŽ¦‚·ƒtƒ‰ƒOBƒ‰ƒCƒgEƒvƒƒeƒNƒg‹@”\‚ðƒTƒ|[ƒg‚µ‚È‚¢ƒƒfƒBƒA‚Å‚Íí‚ɃNƒŠƒA‚³‚ê‚Ä‚¢‚Ü‚·B
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/dwrite.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/dwrite.html new file mode 100644 index 000000000..821989ca2 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/dwrite.html @@ -0,0 +1,66 @@ + + + + + + + +FatFs - disk_write + + + + +
+

disk_write

+

ƒfƒBƒXƒN‚Ƀf[ƒ^‚ð‘‚«ž‚Ý‚Ü‚·B

+
+DRESULT disk_write (
+  BYTE Drive,          /* •¨—ƒhƒ‰ƒCƒu”Ô† */
+  const BYTE* Buffer,  /* ‘‚«ž‚Þƒf[ƒ^‚ւ̃|ƒCƒ“ƒ^ */
+  DWORD SectorNumber,  /* ‘‚«ž‚ÝŠJŽnƒZƒNƒ^”Ô† */
+  BYTE SectorCount     /* ‘‚«ž‚݃ZƒNƒ^” */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
•¨—ƒhƒ‰ƒCƒu”Ô†(0-9)‚ðŽw’肵‚Ü‚·B
+
Buffer
+
ƒfƒBƒXƒN‚É‘‚«ž‚ÞƒoƒCƒg”z—ñ‚ðŽw’肵‚Ü‚·BƒAƒhƒŒƒX‚̓Aƒ‰ƒCƒƒ“ƒg‚³‚ê‚Ä‚¢‚é‚Æ‚ÍŒÀ‚è‚Ü‚¹‚ñB
+
SectorNumber
+
‘‚«ž‚Ý‚ðŠJŽn‚·‚éƒZƒNƒ^”Ô†BLBA‚ÅŽw’肵‚Ü‚·B
+
SectorCount
+
‘‚«ž‚ÞƒZƒNƒ^”B 1`255‚Åݒ肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
RES_OK (0)
+
³íI—¹B
+
RES_ERROR
+
‘‚«ž‚Ý’†‚ɃGƒ‰[‚ª”­¶‚µA‚»‚̉ñ•œ‚É‚àŽ¸”s‚µ‚½B
+
RES_WRPRT
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
RES_PARERR
+
ƒpƒ‰ƒ[ƒ^‚ª•s³B
+
RES_NOTRDY
+
ƒhƒ‰ƒCƒu‚ª“®ì‰Â”\ó‘Ô‚Å‚Í‚È‚¢i‰Šú‰»‚³‚ê‚Ä‚¢‚È‚¢jB
+
+
+ + +
+

‰ðà

+

ƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚Å‚Í‚±‚ÌŠÖ”‚Í•K—v‚Æ‚³‚ê‚Ü‚¹‚ñB

+
+ + +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/fattime.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/fattime.html new file mode 100644 index 000000000..5473557e2 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/fattime.html @@ -0,0 +1,50 @@ + + + + + + + +FatFs - get_fattime + + + + +
+

get_fattime

+

Œ»ÝŽž‚ðŽæ“¾‚µ‚Ü‚·B

+
+DWORD get_fattime (void);
+
+
+ + +
+

–ß‚è’l

+

Œ»Ý‚̃[ƒJƒ‹Eƒ^ƒCƒ€‚ªDWORD’l‚ɃpƒbƒN‚³‚ê‚Ä•Ô‚³‚ê‚Ü‚·BƒrƒbƒgEƒtƒB[ƒ‹ƒh‚ÍŽŸ‚ÉŽ¦‚·‚悤‚É‚È‚è‚Ü‚·B

+
+
bit31:25
+
1980”N‚ð‹N“_‚Æ‚µ‚½”N‚ª 0..127 ‚Å“ü‚è‚Ü‚·B
+
bit24:21
+
ŒŽ‚ª 1..12 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit20:16
+
“ú‚ª 1..31 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit15:11
+
Žž‚ª 0..23 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit10:5
+
•ª‚ª 0..59 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit4:0
+
•b/2‚ª 0..29 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
+
+ + +
+

‰ðà

+

RTC‚ðƒTƒ|[ƒg‚µ‚È‚¢ƒVƒXƒeƒ€‚Å‚àA‰½‚ç‚©‚Ì“ú•t‚Æ‚µ‚Ä—LŒø‚È’l‚ð•Ô‚³‚È‚¯‚ê‚΂Ȃè‚Ü‚¹‚ñBƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚Å‚Í‚±‚ÌŠÖ”‚Í•K—v‚Æ‚³‚ê‚Ü‚¹‚ñB

+
+ + +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/filename.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/filename.html new file mode 100644 index 000000000..262d4347f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/filename.html @@ -0,0 +1,67 @@ + + + + + + + +FatFs - ファイル・ディレクトリã®æŒ‡å®šæ–¹æ³• + + + +
+

ファイル・ディレクトリã®æŒ‡å®šæ–¹æ³•

+

FatFsモジュールã§ã®ãƒ•ã‚¡ã‚¤ãƒ«ã€ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã€ãƒ‰ãƒ©ã‚¤ãƒ–ã®æŒ‡å®šæ–¹æ³•ã¯MS-DOSã¨ã»ã¼åŒã˜ã§ã™ã€‚パスåã®ãƒ•ã‚©ãƒ¼ãƒžãƒƒãƒˆã¯æ¬¡ã®é€šã‚Šã§ã™ã€‚

+
+ "[è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–番å·:][/]ディレクトリå/ファイルå"
+
+

FatFsモジュールã¯é•·ã„ファイルåãŠã‚ˆã³8.3å½¢å¼ãƒ•ã‚¡ã‚¤ãƒ«åã«å¯¾å¿œã—ã¦ã„ã¾ã™ã€‚é•·ã„ファイルåã¯ã€_USE_LFN == 1ã®ã¨ã使用å¯èƒ½ã«ãªã‚Šã¾ã™ã€‚ディレクトリ・セパレータã«ã¯ / ã¾ãŸã¯ \ を使用ã—ã¾ã™ã€‚è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–番å·ã¯ã€'0'～'9'ã®ä¸€æ–‡å­—ã®æ•°å­—ã¨ã‚³ãƒ­ãƒ³ã§æŒ‡å®šã—ã¾ã™ã€‚çœç•¥ã—ãŸå ´åˆã¯ã€ãƒ‡ãƒ•ã‚©ãƒ«ãƒˆãƒ»ãƒ‰ãƒ©ã‚¤ãƒ–(0ã¾ãŸã¯ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‰ãƒ©ã‚¤ãƒ–)ãŒé¸æŠžã•ã‚Œã¾ã™

+

標準構æˆ(_FS_RPATH == 0)ã®ã¨ãã¯ã€å…¨ã¦ã®ã‚ªãƒ–ジェクトãŒãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã‹ã‚‰è¾¿ã‚‹çµ¶å¯¾ãƒ‘スã§æŒ‡å®šã•ã‚Œã¾ã™ã€‚OS指å‘ãªã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã¨ã„ã†æ¦‚念ã¯ç„¡ãã€ã¾ãŸãƒ‰ãƒƒãƒˆå("."ã‚„"..")ã¯ä½¿ç”¨ã§ãã¾ã›ã‚“。パスå先頭ã®ã‚»ãƒ‘レータã¯ç„¡è¦–ã•ã‚Œã¾ã™ã€‚デフォルト・ドライブ番å·ã¯å¸¸ã«0ã«ãªã‚Šã¾ã™ã€‚

+

相対パスを有効(_FS_RPATH == 1)ã«ã—ãŸã¨ãã¯ã€å…ˆè¡Œã™ã‚‹ã‚»ãƒ‘レータã®æœ‰ç„¡ã«ã‚ˆã£ã¦æ¤œç´¢é–‹å§‹ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªãŒå¤‰ã‚ã‚Šã€ã‚»ãƒ‘レータãŒã‚ã‚‹å ´åˆã¯ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã‹ã‚‰ã€ç„¡ã„å ´åˆã¯f_chdir関数ã§è¨­å®šã•ã‚Œã‚‹ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã‹ã‚‰ã«ãªã‚Šã¾ã™ã€‚ã¾ãŸãƒ‘スåã®æŒ‡å®šã«ãƒ‰ãƒƒãƒˆåãŒä½¿ç”¨ã§ãã¾ã™ã€‚デフォルト・ドライブ番å·ã¯f_chdrive関数ã§è¨­å®šã•ã‚ŒãŸå€¤ã¨ãªã‚Šã¾ã™ã€‚

+ + + + + + + + + + + + + +
パスå_FS_RPATH == 0_FS_RPATH == 1
file.txtドライブ0ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªä¸‹ã®ãƒ•ã‚¡ã‚¤ãƒ«ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‰ãƒ©ã‚¤ãƒ–ã®ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªä¸‹ã®ãƒ•ã‚¡ã‚¤ãƒ«
/file.txtドライブ0ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªä¸‹ã®ãƒ•ã‚¡ã‚¤ãƒ«ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‰ãƒ©ã‚¤ãƒ–ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªä¸‹ã®ãƒ•ã‚¡ã‚¤ãƒ«
ドライブ0ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‰ãƒ©ã‚¤ãƒ–ã®ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒª
2:ドライブ2ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªãƒ‰ãƒ©ã‚¤ãƒ–2ã®ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒª
2:file1.txtドライブ2ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªä¸‹ã®ãƒ•ã‚¡ã‚¤ãƒ«ãƒ‰ãƒ©ã‚¤ãƒ–2ã®ã‚«ãƒ¬ãƒ³ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªä¸‹ã®ãƒ•ã‚¡ã‚¤ãƒ«
2:/ドライブ2ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒªãƒ‰ãƒ©ã‚¤ãƒ–2ã®ãƒ«ãƒ¼ãƒˆãƒ»ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒª
../file.txt無効親ディレクトリ下ã®ãƒ•ã‚¡ã‚¤ãƒ«
.無効ã“ã®ãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒª
..無効カレント・ディレクトリã®è¦ªãƒ‡ã‚£ãƒ¬ã‚¯ãƒˆãƒª
dir1/..無効カレント・ディレクトリ
/..無効無効(ルート・ディレクトリã§ã¯ãƒ‰ãƒƒãƒˆåã¯ä½¿ç”¨ä¸å¯)
+
+ +


+
+

Unicode API

+

ファイル関数ã®å…¥å‡ºåŠ›ã®ã†ã¡ãƒ•ã‚¡ã‚¤ãƒ«åやパスåを指定ã™ã‚‹å¼•æ•°ã®åž‹ã¯ã€XCHARã§å®šç¾©ã•ã‚Œã¦ã„ã¾ã™ãŒã€ã“れらã¯charã§typedefã•ã‚Œã¦ã„ã¾ã™ã€‚ãã—ã¦ã€_CODE_PAGEã§æŒ‡å®šã•ã‚Œã‚‹ãƒ­ãƒ¼ã‚«ãƒ«ãƒ»ã‚³ãƒ¼ãƒ‰(SBCSã¾ãŸã¯DBCS)ã®æ–‡å­—列ã¨ã—ã¦æ‰±ã‚ã‚Œã¾ã™ã€‚ファイルå入出力をUnicodeã¨ã™ã‚‹æ§‹æˆ(_USE_LFN != 0ã§ã€ã‹ã¤_LFN_UNICODE == 1)ã«ã—ãŸã¨ãã¯ã€XCHARã¯ãƒ¯ã‚¤ãƒ‰æ–‡å­—(unsigned short)ã«åˆ‡ã‚Šæ›¿ã‚ã‚Šã¾ã™ã€‚ã“ã‚Œã«ã‚ˆã‚ŠLFNフル対応ã¨ãªã‚Šã€ãƒ­ãƒ¼ã‚«ãƒ«ãƒ»ã‚³ãƒ¼ãƒ‰ã«ãªã„文字(♥☭â¶ãªã©)も使用ã§ãã¾ã™ã€‚

+
+ +


+
+

è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã¨ç‰©ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã®å¯¾å¿œ

+

標準構æˆã§ã¯ã€ãã‚Œãžã‚Œã®è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã¯åŒã˜ç•ªå·ã®ç‰©ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã«1:1ã§çµã³ã¤ã‘られã¦ã„ã¦ã€ç‰©ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã®å…ˆé ­ã®åŒºç”»ãŒãƒžã‚¦ãƒ³ãƒˆã•ã‚Œã¾ã™ã€‚_MULTI_PARTITION == 1を指定ã™ã‚‹ã¨ã€è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã«å¯¾ã—ã¦å€‹åˆ¥ã«ç‰©ç†ãƒ‰ãƒ©ã‚¤ãƒ–番å·ãƒ»åŒºç”»ã‚’指定ã§ãるよã†ã«ãªã‚Šã¾ã™ã€‚ã“ã®æ§‹æˆã§ã¯ã€è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã¨åŒºç”»ã®å¯¾å¿œã‚’解決ã™ã‚‹ãŸã‚ã®ãƒ†ãƒ¼ãƒ–ルを次ã«ç¤ºã™ã‚ˆã†ã«å®šç¾©ã™ã‚‹å¿…è¦ãŒã‚ã‚Šã¾ã™ã€‚

+
+例:è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–0～2を物ç†ãƒ‰ãƒ©ã‚¤ãƒ–0(固定ディスク)ã®3ã¤ã®åŸºæœ¬åŒºç”»ã«å‰²ã‚Šå½“ã¦ã€
+   è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–3を物ç†ãƒ‰ãƒ©ã‚¤ãƒ–1(リムーãƒãƒ–ル・ディスク)ã«å‰²ã‚Šå½“ã¦ã‚‹å ´åˆã€‚
+
+const PARTITION Drives[] = {
+    {0, 0},     /* Logical drive 0 ==> Physical drive 0, 1st partition */
+    {0, 1},     /* Logical drive 1 ==> Physical drive 0, 2nd partition */
+    {0, 2},     /* Logical drive 2 ==> Physical drive 0, 3rd partition */
+    {1, 0}      /* Logical drive 3 ==> Physical drive 1 */
+};
+
+

複数区画指定を使用ã™ã‚‹å ´åˆã€æ¬¡ã®ç‚¹ã«æ³¨æ„ã—ãªã‘ã‚Œã°ãªã‚Šã¾ã›ã‚“。 +

    +
  • 指定å¯èƒ½ãªåŒºç”»ã¯åŸºæœ¬åŒºç”»(0～3)ã®ã¿ã€‚
    • +
  • 物ç†ãƒ‰ãƒ©ã‚¤ãƒ–ãŒSFDå½¢å¼(区画テーブル無ã—)ã®å ´åˆã€åŒºç”»æŒ‡å®šã¯ç„¡è¦–ã•ã‚Œã‚‹ã€‚
    • +
  • 複数ã®è«–ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã‚’æŒã¤ç‰©ç†ãƒ‰ãƒ©ã‚¤ãƒ–ã¯ã€å›ºå®šãƒ‡ã‚£ã‚¹ã‚¯ã§ãªã‘ã‚Œã°ãªã‚‰ãªã„。
    • +
+
+ + + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/forward.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/forward.html new file mode 100644 index 000000000..c330a3634 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/forward.html @@ -0,0 +1,136 @@ + + + + + + + +FatFs - f_forward + + + + +
+

f_forward

+

ƒtƒ@ƒCƒ‹‚©‚çƒf[ƒ^‚ð“Ç‚Ýo‚µA‘—MƒXƒgƒŠ[ƒ€‚É’¼Ú“]‘—‚µ‚Ü‚·B

+
+FRESULT f_forward (
+  FIL* FileObject,                 /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘Ì */
+  UINT (*Func)(const BYTE*,UINT),  /* ƒf[ƒ^“]‘—ŠÖ” */
+  UINT ByteToFwd,                  /* “]‘—‚·‚éƒoƒCƒg” */
+  UINT* ByteFwd                    /* “]‘—‚³‚ꂽƒoƒCƒg” */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Func
+
ƒf[ƒ^‚ð“n‚·ƒ†[ƒU’è‹`ŠÖ”‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B‚±‚ÌŠÖ”‚ÌŽd—l‚̓Tƒ“ƒvƒ‹‚ðŽQÆ‚µ‚Ä‚­‚¾‚³‚¢B
+
ByteToRead
+
“]‘—‚·‚éƒoƒCƒg”(0`UINT‚ÌÅ‘å’l)‚ðŽw’肵‚Ü‚·B
+
ByteRead
+
ŽÀÛ‚É“]‘—‚³‚ꂽƒoƒCƒg”‚ðŠi”[‚·‚é•Ï”‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DENIED
+
”ñ“Ç‚Ýž‚݃‚[ƒh‚ÅŠJ‚¢‚½ƒtƒ@ƒCƒ‹‚©‚ç“Ç‚Ýž‚à‚¤‚Æ‚µ‚½B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚̃f[ƒ^‚ðƒoƒbƒtƒ@‚É“Ç‚Ýo‚³‚¸‚É‘—MƒXƒgƒŠ[ƒ€‚É’¼Ú“]‘—‚µ‚Ü‚·BƒAƒvƒŠƒP[ƒVƒ‡ƒ“‘¤‚Ńf[ƒ^Eƒoƒbƒtƒ@‚ð•K—v‚Æ‚µ‚È‚¢‚Ì‚ÅAƒƒ‚ƒŠ‚ÌŒÀ‚ç‚ꂽŠÂ‹«‚Å—LŒø‚Å‚·B“]‘—ŠJŽnˆÊ’u‚ÍAŒ»Ý‚̃tƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚©‚ç‚É‚È‚è‚Ü‚·Bƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚Í“]‘—‚³‚ꂽƒoƒCƒg”‚¾‚¯i‚Ý‚Ü‚·BŽw’肳‚ꂽƒoƒCƒg”‚Ì“]‘—’†‚Ƀtƒ@ƒCƒ‹‚ÌI’[‚É’B‚µ‚½ê‡‚â‘—MƒXƒgƒŠ[ƒ€‚ªƒrƒW[‚É‚È‚Á‚½ê‡A*ByteFwd‚ÍByteToFwd‚æ‚è‚ଂ³‚­‚È‚è‚Ü‚·B

+

‚±‚ÌŠÖ”‚ÍA_USE_FORWARD == 1‚ÅAŠŽ‚Â_FS_TINY == 1‚Ì‚Æ‚«‚ɃTƒ|[ƒg‚³‚ê‚Ü‚·B

+
+ + +
+

Žg—p—áiƒI[ƒfƒBƒIĶj

+
+/*-----------------------------------------------------------------------*/
+/* f_forwardŠÖ”‚©‚çŒÄ‚΂ê‚éƒf[ƒ^‘—MŠÖ”‚Ì—á                           */
+/*-----------------------------------------------------------------------*/
+
+UINT out_stream (   /* –ß‚è’l: “]‘—‚³‚ꂽƒoƒCƒg”‚Ü‚½‚̓XƒgƒŠ[ƒ€‚Ìó‘Ô */
+    const BYTE *p,  /* “]‘—‚·‚éƒf[ƒ^‚ðŽw‚·ƒ|ƒCƒ“ƒ^ */
+    UINT btf        /* >0: “]‘—‚ðs‚¤(ƒoƒCƒg”). 0: ƒXƒgƒŠ[ƒ€‚Ìó‘Ԃ𒲂ׂé */
+)
+{
+    UINT cnt = 0;
+
+
+    if (btf == 0) {     /* ƒZƒ“ƒX—v‹ */
+        /* ƒXƒgƒŠ[ƒ€‚Ìó‘Ô‚ð•Ô‚· (0: ƒrƒW[, 1: ƒŒƒfƒB) */
+        /* ˆê’UAƒŒƒfƒB‚ð•Ô‚µ‚½‚çA‘±‚­“]‘——v‹‚Å­‚È‚­‚Æ‚à1ƒoƒCƒg‚Í */
+        /* “]‘—‚³‚ê‚È‚¢‚Æ f_forwardŠÖ”‚Í FR_RW_ERROR ‚Æ‚È‚éB */
+        if (FIFO_READY) cnt = 1;
+    }
+    else {              /* “]‘——v‹ */
+        do {    /* ‘S‚ẴoƒCƒg‚ð“]‘—‚·‚é‚©AƒXƒgƒŠ[ƒ€‚ªƒrƒW[‚É‚È‚é‚Ü‚ÅŒJ‚è•Ô‚· */
+            FIFO_PORT = *p++;
+            cnt++;
+        } while (cnt < btf && FIFO_READY);
+    }
+
+    return cnt;
+}
+
+
+/*-----------------------------------------------------------------------*/
+/* f_forwardŠÖ”‚ÌŽg—p—á                                                 */
+/*-----------------------------------------------------------------------*/
+
+FRESULT play_file (
+    char *fn        /* Ķ‚·‚éƒI[ƒfƒBƒIEƒtƒ@ƒCƒ‹–¼‚ðŽw‚·ƒ|ƒCƒ“ƒ^ */
+)
+{
+    FRESULT rc;
+    FIL fil;
+    UINT dmy;
+
+    /* ƒtƒ@ƒCƒ‹‚ð“Ç‚Ýo‚µƒ‚[ƒh‚ÅŠJ‚­ */
+    rc = f_open(&fil, fn, FA_READ);
+
+    /* ‘S‚Ẵf[ƒ^‚ª“]‘—‚³‚ê‚é‚©ƒGƒ‰[‚ª”­¶‚·‚é‚Ü‚Å‘±‚¯‚é */
+    while (rc == FR_OK && fil.fptr < fil.fsize) {
+
+        /* ‚Ù‚©‚̈—... */
+
+        /* ’èŠú“I‚Ü‚½‚Í—v‹‚ɉž‚¶‚ăf[ƒ^‚ðƒXƒgƒŠ[ƒ€‚É‘—o‚·‚é */
+        rc = f_forward(&fil, out_stream, 1000, &dmy);
+    }
+
+    return rc;	/* FR_OK: ³íI—¹, ‚Ù‚©:ˆÙíI—¹ */
+}
+
+
+ + +
+

ŽQÆ

+

f_open, fgets, f_write, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/getfree.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/getfree.html new file mode 100644 index 000000000..aa5f06f26 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/getfree.html @@ -0,0 +1,96 @@ + + + + + + + +FatFs - f_getfree + + + + +
+

f_getfree

+

˜_—ƒhƒ‰ƒCƒuã‚Ì–¢Žg—pƒNƒ‰ƒXƒ^”‚𓾂܂·B

+
+FRESULT f_getfree (
+  const XCHAR* Path,       /* ‘ÎÛƒhƒ‰ƒCƒu‚̃‹[ƒgEƒfƒBƒŒƒNƒgƒŠ */
+  DWORD* Clusters,         /* ‹ó‚«ƒNƒ‰ƒXƒ^”‚ðŠi”[‚·‚é•Ï”‚ւ̃|ƒCƒ“ƒ^ */
+  FATFS** FileSystemObject /* ƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
Path
+
‘Îۂ̘_—ƒhƒ‰ƒCƒu‚̃‹[ƒgƒfƒBƒŒƒNƒgƒŠ‚̃pƒX–¼‚ª“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Clusters
+
‹ó‚«ƒNƒ‰ƒXƒ^”‚ðŠi”[‚·‚éDWORD•Ï”‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
FileSystemObject
+
‘ÎÛƒhƒ‰ƒCƒu‚̃tƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ª•Ô‚³‚ê‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B*Clusters‚ɋ󂫃Nƒ‰ƒXƒ^”‚ª•Ô‚³‚ê‚Ü‚·B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ª—^‚¦‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

˜_—ƒhƒ‰ƒCƒuã‚̋󂫃Nƒ‰ƒXƒ^”‚ðŽæ“¾‚µ‚Ü‚·B•Ô‚³‚ꂽƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg‚Ìcsizeƒƒ“ƒo‚ªƒNƒ‰ƒXƒ^‚ ‚½‚è‚̃ZƒNƒ^”‚ðŽ¦‚µ‚Ä‚¢‚é‚Ì‚ÅA‚±‚ê‚ðŒ³‚ÉŽÀۂ̋󂫃TƒCƒY‚ªŒvŽZ‚Å‚«‚Ü‚·BFAT32ƒ{ƒŠƒ…[ƒ€‚É‚¨‚¢‚Ä‚ÍAFSINFO‚Ìó‘Ô‚É‚æ‚Á‚Ä‚Í•s³Šm‚È’l‚ð•Ô‚µ‚½‚èAˆ—‚ÉŽžŠÔ‚ª‚©‚©‚Á‚½‚è‚·‚é‰Â”\«‚ª‚ ‚è‚Ü‚·B

+

ƒŠ[ƒhƒIƒ“ƒŠ[\¬‚¨‚æ‚Ñ_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—á

+
+    FATFS *fs;
+    DWORD fre_clust, fre_sect, tot_sect;
+
+
+    // Get drive information and free clusters
+    res = f_getfree("/", &fre_clust, &fs);
+    if (res) die(res);
+
+    // Get total sectors and free sectors
+    tot_sect = (fs->max_clust - 2) * fs->csize;
+    fre_sect = fre_clust * fs->csize;
+
+    // Print free space in unit of KB (assuming 512B/sector)
+    printf("%lu KB total drive space.\n"
+           "%lu KB available.\n",
+           fre_sect / 2, tot_sect / 2);
+
+
+ + +
+

ŽQÆ

+FATFS +
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/gets.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/gets.html new file mode 100644 index 000000000..0a71314e6 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/gets.html @@ -0,0 +1,58 @@ + + + + + + + +FatFs - f_gets + + + + +
+

f_gets

+

ƒtƒ@ƒCƒ‹‚©‚當Žš—ñ‚ð“Ç‚Ýo‚µ‚Ü‚·B

+
+char* f_gets (
+  char* Str,        /* ƒoƒbƒtƒ@ */
+  int Size,         /* ƒoƒbƒtƒ@‚̃TƒCƒY */
+  FIL* FileObject   /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg */
+);
+
+
+ +
+

ˆø”

+
+
Str
+
•¶Žš—ñ‚ð“Ç‚Ýo‚·ƒoƒbƒtƒ@‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Size
+
ƒoƒbƒtƒ@‚̃TƒCƒY‚ðŽw’肵‚Ü‚·B
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+

ŠÖ”‚ª¬Œ÷‚·‚é‚ÆStr‚ª•Ô‚³‚ê‚Ü‚·B

+
+ + +
+

‰ðà

+

‚±‚ÌŠÖ”‚Íf_read()‚̃‰ƒbƒp[ŠÖ”‚Å‚·B“Ç‚Ýo‚µ“®ì‚ÍAʼn‚Ì'\n'‚ð“Ç‚Ýž‚Þ‚©Aƒtƒ@ƒCƒ‹I’[‚É’B‚·‚é‚©ASize - 1•¶Žš‚ð“Ç‚Ýo‚·‚Ü‚Å‘±‚«‚Ü‚·B“Ç‚Ýž‚܂ꂽ•¶Žš—ñ‚ÌI’[‚É‚Í'\0'‚ª•t‰Á‚³‚ê‚Ü‚·BŠù‚Ƀtƒ@ƒCƒ‹I’[‚Å1•¶Žš‚à“Ç‚Ýž‚Ü‚ê‚È‚©‚Á‚½‚Æ‚«A‚Ü‚½‚͉½‚ç‚©‚̃Gƒ‰[‚ª”­¶‚µ‚½‚Æ‚«‚ÍNULL‚ð•Ô‚µ‚Ü‚·Bƒtƒ@ƒCƒ‹I’[‚©ƒGƒ‰[‚©‚Íf_eof(),f_error()ƒ}ƒNƒ‚Å’²‚ׂç‚ê‚Ü‚·B

+

_USE_STRFUNC‚ª1‚Ü‚½‚Í2‚Ì‚Æ‚«‚±‚ÌŠÖ”‚ªƒTƒ|[ƒg‚³‚ê‚Ü‚·B2‚Ì‚Æ‚«‚ÍAƒtƒ@ƒCƒ‹‚ÉŠÜ‚Ü‚ê‚é'\r'‚ªŽæ‚蜂©‚ê‚ăoƒbƒtƒ@‚É“Ç‚Ýž‚Ü‚ê‚Ü‚·B

+
+ + +
+

ŽQÆ

+

f_open, f_read, f_putc, f_puts, f_printf, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/lseek.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/lseek.html new file mode 100644 index 000000000..487c13b95 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/lseek.html @@ -0,0 +1,105 @@ + + + + + + + +FatFs - f_lseek + + + + +
+

f_lseek

+

ƒtƒ@ƒCƒ‹‚ÌR/Wƒ|ƒCƒ“ƒ^‚ðˆÚ“®‚µ‚Ü‚·B

+
+FRESULT f_lseek (
+  FIL* FileObject,   /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^ */
+  DWORD Offset       /* ˆÚ“®æƒIƒtƒZƒbƒg */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
‘ÎÛ‚Æ‚È‚éƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Offset
+
ˆÚ“®æ‚̃IƒtƒZƒbƒgiR/Wƒ|ƒCƒ“ƒ^j’lBƒtƒ@ƒCƒ‹æ“ª‚©‚ç‚̃IƒtƒZƒbƒg‚ðƒoƒCƒg’PˆÊ‚ÅŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^(ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg“à‚Ìfptrƒƒ“ƒo‚ÅAŽŸ‚É“Ç‚Ýo‚µE‘‚«ž‚Ý‚³‚ê‚éƒoƒCƒg‚̃IƒtƒZƒbƒg‚ðŽ¦‚·)‚ðˆÚ“®‚µ‚Ü‚·BƒIƒtƒZƒbƒg‚ÌŒ´“_‚̓tƒ@ƒCƒ‹æ“ª‚©‚ç‚Å‚·B‘‚«ž‚݃‚[ƒh‚Ńtƒ@ƒCƒ‹EƒTƒCƒY‚æ‚è‘å‚«‚È’l‚ðŽw’è‚·‚é‚ÆA‚»‚±‚܂Ńtƒ@ƒCƒ‹‚ªŠg’£‚³‚êAŠg’£‚³‚ꂽ•”•ª‚̃f[ƒ^‚Í–¢’è‹`‚Æ‚È‚è‚Ü‚·Bƒf[ƒ^‚ð’x‰„–³‚­‚‘¬‚É‘‚«ž‚Ý‚½‚¢‚Æ‚«‚ÍA—\‚ß‚±‚ÌŠÖ”‚Å•K—v‚ȃTƒCƒY‚܂Ńtƒ@ƒCƒ‹EƒTƒCƒY‚ðŠg’£‚µ‚Ä‚¨‚­‚Æ—Ç‚¢‚Å‚µ‚傤Bf_lseekŠÖ”‚ª³íI—¹‚µ‚½‚ ‚Æ‚ÍAƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚ª³‚µ‚­ˆÚ“®‚µ‚½‚©fptr‚ðƒ`ƒFƒbƒN‚·‚é‚ׂ«‚Å‚·Bƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚ªŽw’è‚æ‚謂³‚¢‚Æ‚«‚ÍAŽŸ‚ÌŒ´ˆö‚ªl‚¦‚ç‚ê‚Ü‚·B

+
    +
  • ”ñ‘‚«ž‚݃‚[ƒh‚Ì‚½‚ßAƒtƒ@ƒCƒ‹EƒTƒCƒY‚ŃNƒŠƒbƒv‚³‚ꂽB
    • +
  • ƒtƒ@ƒCƒ‹Šg’£’†‚ɃfƒBƒXƒN‚ª–ž”t‚É‚È‚Á‚½B
    • +
+

_FS_MINIMIZE >= 3‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—á

+
+    // ƒtƒ@ƒCƒ‹EƒIƒtƒZƒbƒg5000‚ÖˆÚ“®
+    res = f_lseek(&file, 5000);
+
+    // ƒtƒ@ƒCƒ‹’Ç‹L‚Ì€”õ (ƒtƒ@ƒCƒ‹I’[‚ÖˆÚ“®)
+    res = f_lseek(&file, file.fsize);
+
+    // 3000ƒoƒCƒgi‚ß‚é
+    res = f_lseek(&file, file.fptr + 3000);
+
+    // 2000ƒoƒCƒg–ß‚· (ƒI[ƒo[ƒtƒ[‚É’ˆÓ)
+    res = f_lseek(&file, file.fptr - 2000);
+
+
+    // ƒNƒ‰ƒXƒ^æsŠ„‚è“–‚Ä (ƒXƒgƒŠ[ƒ~ƒ“ƒOEƒ‰ƒCƒgŽž‚̃oƒbƒtƒ@EƒI[ƒo[ƒ‰ƒ“–hŽ~)
+
+    res = f_open(&file, "record.wav", FA_CREATE_NEW | FA_WRITE); // ƒtƒ@ƒCƒ‹ì¬
+
+    res = f_lseek(&file, MAX_SIZE);        // \•ª‚ȃNƒ‰ƒXƒ^‚ÌæsŠ„‚è“–‚Ä
+    if (res || file.fptr != PRE_SIZE) .... // ³‚µ‚­ƒtƒ@ƒCƒ‹‚ªŠg’£‚³‚ꂽ‚©ƒ`ƒFƒbƒN
+
+    res = f_lseek(&file, DATA_START);      // ƒf[ƒ^EƒXƒgƒŠ[ƒ€‚Ì‹L˜^(ƒAƒƒP[ƒVƒ‡ƒ“ƒfƒBƒŒƒC–³‚µ)
+    ...
+
+    res = f_truncate(&file);              // •s—v—̈æ‚ÌØ‚èŽÌ‚Ä
+    res = f_lseek(&file, 0);              // ƒwƒbƒ_‚Ì‹L˜^
+    ...
+
+    res = f_close(&file);
+
+
+ + +
+

ŽQÆ

+

f_open, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/mkdir.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/mkdir.html new file mode 100644 index 000000000..b080bb54c --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/mkdir.html @@ -0,0 +1,83 @@ + + + + + + + +FatFs - f_mkdir + + + + +
+

f_mkdir

+

ƒfƒBƒŒƒNƒgƒŠ‚ð쬂µ‚Ü‚·B

+
+FRESULT f_mkdir (
+  const XCHAR* DirName /* 쬂·‚éƒfƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
DirName
+
쬂·‚éƒfƒBƒŒƒNƒgƒŠ‚̃pƒX–¼‚ª“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_DENIED
+
ƒfƒBƒXƒN‚âƒfƒBƒŒƒNƒgƒŠEƒGƒ“ƒgƒŠ‚ª–ž”t‚ÌꇂȂÇB
+
FR_EXIST
+
“¯–¼‚̃fƒBƒŒƒNƒgƒŠ‚âƒtƒ@ƒCƒ‹‚ª‘¶Ý‚·‚éB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ª—^‚¦‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

‹ó‚̃fƒBƒŒƒNƒgƒŠ‚ð쬂µ‚Ü‚·BƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚¨‚æ‚Ñ_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—á

+
+    res = f_mkdir("sub1");
+    if (res) die(res);
+    res = f_mkdir("sub1/sub2");
+    if (res) die(res);
+    res = f_mkdir("sub1/sub2/sub3");
+    if (res) die(res);
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/mkfs.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/mkfs.html new file mode 100644 index 000000000..0a84a8499 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/mkfs.html @@ -0,0 +1,73 @@ + + + + + + + +FatFs - f_mkfs + + + + +
+

f_mkfs

+

ƒhƒ‰ƒCƒuã‚ÉFATƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€‚ðì¬(ƒtƒH[ƒ}ƒbƒg)‚µ‚Ü‚·B

+
+FRESULT f_mkfs (
+  BYTE  Drive,              /* ˜_—ƒhƒ‰ƒCƒu”Ô† */
+  BYTE  PartitioningRule,   /* ‹æ‰æ쬕û–@ */
+  WORD  AllocSize           /* ƒNƒ‰ƒXEƒ^ƒTƒCƒY */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
ƒtƒH[ƒ}ƒbƒg‚·‚é˜_—ƒhƒ‰ƒCƒu(0-9)B
+
PartitioningRule
+
0‚ðŽw’è‚·‚é‚ÆAƒhƒ‰ƒCƒu‚Ì‘S—̈æ‚ðè‚ß‚éŠî–{DOS‹æ‰æ‚ð쬂µ‚½‚ ‚Æ‚»‚Ì‹æ‰æ‚Ƀtƒ@ƒCƒ‹EƒVƒXƒeƒ€‚ð쬂µ‚Ü‚·(FDISKƒtƒH[ƒ}ƒbƒg)B1‚ðŽw’è‚·‚é‚ÆA‹æ‰æƒe[ƒuƒ‹‚ð쬂¹‚¸ƒhƒ‰ƒCƒu‚Ì擪ƒZƒNƒ^‚©‚ç’¼Úƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€‚ð쬂µ‚Ü‚·(super floppy (SFD) ƒtƒH[ƒ}ƒbƒg)B
+
AllocSize
+
ƒNƒ‰ƒXƒ^EƒTƒCƒY‚ðƒoƒCƒg’PˆÊ‚ÅŽw’肵‚Ü‚·B0‚Ü‚½‚Í512`32768‚͈̔͂ł©‚Â2‚Ì—Ýæ‚Å‚È‚¯‚ê‚΂Ȃè‚Ü‚¹‚ñB0‚ðŽw’è‚·‚é‚ƃhƒ‰ƒCƒuEƒTƒCƒY‚ɉž‚¶‚½ƒfƒtƒHƒ‹ƒg‚̃Nƒ‰ƒXƒ^EƒTƒCƒY‚ð‘I‘ð‚µ‚Ü‚·BFAT64(64KB/ƒNƒ‰ƒXƒ^)‚Í‘I‘ð‚Å‚«‚Ü‚¹‚ñB
+
+
+ +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª–³ŒøB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇA•¨—ƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ªŠ„‚è“–‚Ä‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_MKFS_ABORTED
+
ŽŸ‚Ì——R‚ÅŠJŽn‘O‚Ɉ—‚ª’†’f‚³‚ꂽB +
    +
  • ƒfƒBƒXƒNEƒTƒCƒY‚ª¬‚³‚·‚¬‚éB
    • +
  • ‰½‚ç‚©‚̈ø”‚ª•s³B
    • +
  • ‚»‚̃Nƒ‰ƒXƒ^EƒTƒCƒY‚ªŽg‚¦‚È‚¢BƒNƒ‰ƒXƒ^”‚ª0xFF7‚Æ0xFFF7‹ß•Ó‚É‚È‚é‚Æ‚«”­¶‚·‚é‰Â”\«‚ª‚ ‚éB
    • +
+
+
+
+ +
+

à–¾

+

f_mkfsŠÖ”‚ÍFATƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€‚ðƒhƒ‰ƒCƒuã‚É쬂µ‚Ü‚·BƒŠƒ€[ƒoƒuƒ‹EƒƒfƒBƒA‚̃p[ƒe[ƒVƒ‡ƒjƒ“ƒOEƒ‹[ƒ‹‚Æ‚µ‚Ä‚ÍFDISKŒ`Ž®‚ÆSFDŒ`Ž®‚ª‚ ‚èAƒƒ‚ƒŠEƒJ[ƒh‚Å‚ÍFDISKŒ`Ž®‚ª•’Ê‚Å‚·B‚±‚ÌŠÖ”‚Í•¡”‹æ‰æ‚ɂ͑Ήž‚µ‚Ä‚¢‚È‚¢‚Ì‚ÅA‚»‚Ì•¨—ƒhƒ‰ƒCƒu‚ÌŠù‘¶‚Ì‹æ‰æ‚Í‘S‚Ä휂³‚êA‘S‘Ì‚ªˆê‚‚̋æ‰æ‚É‚È‚è‚Ü‚·B

+

FATƒ^ƒCƒv(FAT12/FAT16/FAT32)‚ÍA‚»‚̘_—ƒhƒ‰ƒCƒuã‚̃Nƒ‰ƒXƒ^”‚É‚æ‚Á‚Ä‚Ì‚ÝŒˆ’肳‚ê‚é[FATŽd—l‘‚æ‚è]Œˆ‚Ü‚è‚É‚È‚Á‚Ä‚¢‚ÄA‚»‚êˆÈŠO‚Ì—vˆö‚Í‚ ‚è‚Ü‚¹‚ñB‚µ‚½‚ª‚Á‚ÄA‚Ç‚ÌFATƒ^ƒCƒv‚É‚È‚é‚©‚̓hƒ‰ƒCƒuEƒTƒCƒY‚ÆŽw’肳‚ꂽƒNƒ‰ƒXƒ^EƒTƒCƒY‚Ɉˑ¶‚µ‚Ü‚·BƒNƒ‰ƒXƒ^EƒTƒCƒY‚Í‘å‚«‚­‚·‚é‚Ù‚Ç«”\‚ªã‚ª‚èA‹t‚ɃfƒBƒXƒN—˜—pŒø—¦‚Í—Ž‚¿‚Ü‚·B

+

‚±‚ÌŠÖ”‚ÍA\¬ƒIƒvƒVƒ‡ƒ“_USE_MKFS‚ð‘I‘ð‚µ‚½‚Æ‚«‚ɃTƒ|[ƒg‚³‚ê‚Ü‚·B

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/mount.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/mount.html new file mode 100644 index 000000000..607d2fb56 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/mount.html @@ -0,0 +1,59 @@ + + + + + + + +FatFs - f_mount + + + + +
+

f_mount

+

˜_—ƒhƒ‰ƒCƒu(ƒ{ƒŠƒ…[ƒ€)‚̃[ƒNEƒGƒŠƒA‚ð“o˜^E–•Á‚µ‚Ü‚·B

+
+FRESULT f_mount (
+  BYTE  Drive,               /* ˜_—ƒhƒ‰ƒCƒu”Ô† */
+  FATFS*  FileSystemObject   /* ƒ[ƒNEƒGƒŠƒA‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
Drive
+
˜_—ƒhƒ‰ƒCƒu”Ô†(0-9)B
+
FileSystemObject
+
“o˜^‚·‚éƒ[ƒNEƒGƒŠƒA(ƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg)‚ւ̃|ƒCƒ“ƒ^B
+
+
+ +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª–³ŒøB
+
+
+ + +
+

‰ðà

+

FatFsƒ‚ƒWƒ…[ƒ‹‚Å‚Í‚»‚ꂼ‚ê‚̘_—ƒhƒ‰ƒCƒu‚Ƀtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg‚Æ‚¢‚¤ƒ[ƒNEƒGƒŠƒA‚ª•K—v‚Å‚·B‚±‚ÌŠÖ”‚͘_—ƒhƒ‰ƒCƒu‚É‚»‚̃[ƒNEƒGƒŠƒA‚ð“o˜^‚µ‚½‚è–•Á‚µ‚½‚肵‚Ü‚·B‰½‚ç‚©‚̃tƒ@ƒCƒ‹ŠÖ”‚ðŽg—p‚·‚é‘O‚É‚±‚ÌŠÖ”‚Å‚»‚̘_—ƒhƒ‰ƒCƒu‚̃[ƒNEƒGƒŠƒA‚ð—^‚¦‚Ä‚¨‚©‚È‚¯‚ê‚΂Ȃè‚Ü‚¹‚ñBFileSystemObject‚Ƀkƒ‹Eƒ|ƒCƒ“ƒ^‚ðŽw’è‚·‚é‚Æ‚»‚̘_—ƒhƒ‰ƒCƒu‚̃[ƒNEƒGƒŠƒA‚Ì“o˜^‚Í–•Á‚³‚êA“o˜^‚³‚ê‚Ä‚¢‚½ƒ[ƒNEƒGƒŠƒA‚Í”jŠü‚Å‚«‚Ü‚·B

+

‚±‚ÌŠÖ”“à‚Å‚Í•¨—ƒhƒ‰ƒCƒu‚ւ̃AƒNƒZƒX‚Í”­¶‚¹‚¸Aƒ[ƒNEƒGƒŠƒA‚ð‰Šú‰»‚µ‚Ä“à•””z—ñ‚É‚»‚̃AƒhƒŒƒX‚ð“o˜^‚·‚邾‚¯‚Å‚·BŽÀۂ̃}ƒEƒ“ƒg“®ì‚ÍAf_mount()‚Ü‚½‚̓ƒfƒBƒAŒðŠ·ŒãAʼn‚̃tƒ@ƒCƒ‹EƒAƒNƒZƒX‚Ì‚Æ‚«‚És‚í‚ê‚Ü‚·B

+
+ + +
+

ŽQÆ

+

FATFS

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/mountdrv.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/mountdrv.html new file mode 100644 index 000000000..9411bead5 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/mountdrv.html @@ -0,0 +1,58 @@ + + + + + + + +FatFs - f_mountdrv + + + + +
+

f_mountdrv

+

ƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€‚𖾎¦“I‚ɉŠú‰»‚µ‚Ü‚·B

+
+FRESULT f_mountdrv (void);
+
+
+ +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_RW_ERROR
+
ƒfƒBƒXƒNƒAƒNƒZƒX‚ŃGƒ‰[‚ª”­¶‚µ‚½B
+
FR_NOT_ENABLED
+
FatFsƒ‚ƒWƒ…[ƒ‹‚ª’âŽ~ó‘ÔB
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€‚ð‹­§“I‚ɉŠú‰»iƒ}ƒEƒ“ƒgj‚µ‚Ü‚·BFatFsƒ‚ƒWƒ…[ƒ‹‚ł̓}ƒEƒ“ƒg“®ì‚̓tƒ@ƒCƒ‹ŠÖ”ŒÄ‚Ño‚µŽž‚É•K—v‚ɉž‚¶‚Ä“à•”‚Ås‚í‚ê‚é‚Ì‚ÅA’Êí‚Í‚±‚ÌŠÖ”‚ðŽg—p‚·‚ׂ«‚Å‚Í‚ ‚è‚Ü‚¹‚ñBŽ©“®ƒ}ƒEƒ“ƒg“®ì’†‚ɉñ•œ•s”\ƒGƒ‰[i‚½‚Æ‚¦‚ÎFR_INCORRECT_DISK_CHANGEj‚ª”­¶‚µ‚½ê‡A‘S‚Ẵtƒ@ƒCƒ‹ŠÖ”‚ªŽg‚¦‚È‚­‚È‚é‚Ì‚ÅA‚»‚Ì‚Æ‚«‚Í‚±‚ÌŠÖ”‚Åă}ƒEƒ“ƒg‚µ‚ĉñ•œ‚·‚邱‚Æ‚ª‚Å‚«‚Ü‚·B

+

f_mountdrvŠÖ”“à‚Å‚ÍŽŸ‚̈—‚ªs‚í‚ê‚Ü‚·B

+
+
    +
  • ‰ºˆÊƒŒƒCƒ„iƒfƒBƒXƒNI/Oƒ‚ƒWƒ…[ƒ‹j‚̉Šú‰»B
    • +
  • FATƒu[ƒgƒŒƒR[ƒh‚ÌŒŸõB擪ƒZƒNƒ^(SFD)¨‘æˆêŠî–{‹æ‰æ(FDISK)‚̇‚ÉŒŸõ‚µ‚Ü‚·B
    • +
  • ƒtƒ@ƒCƒ‹ƒVƒXƒeƒ€ƒIƒuƒWƒFƒNƒg\‘¢‘̂̉Šú‰»B
    • +
+
+ + +
+

ŽQÆ

+

FATFS

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/open.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/open.html new file mode 100644 index 000000000..cc5a0895f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/open.html @@ -0,0 +1,139 @@ + + + + + + + +FatFs - f_open + + + + +
+

f_open

+

ƒtƒ@ƒCƒ‹‚ðƒI[ƒvƒ“‚Ü‚½‚Í쬂µ‚Ü‚·B

+
+FRESULT f_open (
+  FIL* FileObject,       /* ‹ó‚̃tƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^ */
+  const XCHAR* FileName, /* ƒtƒ@ƒCƒ‹‚̃tƒ‹ƒpƒX–¼‚ւ̃|ƒCƒ“ƒ^ */
+  BYTE ModeFlags         /* ƒ‚[ƒhƒtƒ‰ƒO */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
V‚µ‚­ì¬‚·‚éƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·BˆÈ~A‚»‚̃tƒ@ƒCƒ‹‚ð•Â‚¶‚é‚Ü‚Å‚±‚̃tƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ðŽg—p‚µ‚ătƒ@ƒCƒ‹‘€ì‚ð‚µ‚Ü‚·B
+
FileName
+
ŠJ‚­(‚Ü‚½‚Í쬂·‚é)ƒtƒ@ƒCƒ‹‚Ì ƒtƒ@ƒCƒ‹–¼‚ª“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
ModeFlags
+
ƒtƒ@ƒCƒ‹‚̃AƒNƒZƒX•û–@‚âƒI[ƒvƒ“•û–@‚ðŒˆ‚ß‚éƒtƒ‰ƒO‚Å‚·B‚±‚̃pƒ‰ƒ[ƒ^‚É‚ÍŽŸ‚Ì‘g‚݇‚킹‚ðŽw’肵‚Ü‚·B
+ + + + + + + + +
’lˆÓ–¡
FA_READ“Ç‚Ýo‚µƒ‚[ƒh‚ÅŠJ‚«‚Ü‚·B“Ç‚Ý‘‚«‚·‚éꇂÍFA_WRITE‚Æ‹¤‚ÉŽw’肵‚Ü‚·B
FA_WRITE‘‚«ž‚݃‚[ƒh‚ÅŠJ‚«‚Ü‚·B“Ç‚Ý‘‚«‚·‚éꇂÍFA_READ‚Æ‹¤‚ÉŽw’肵‚Ü‚·B
FA_OPEN_EXISTINGŠù‘¶‚̃tƒ@ƒCƒ‹‚ðŠJ‚«‚Ü‚·Bƒtƒ@ƒCƒ‹‚ª–³‚¢‚Æ‚«‚̓Gƒ‰[‚É‚È‚è‚Ü‚·B(ƒfƒtƒHƒ‹ƒg)
FA_OPEN_ALWAYSŠù‘¶‚̃tƒ@ƒCƒ‹‚ðŠJ‚«‚Ü‚·Bƒtƒ@ƒCƒ‹‚ª–³‚¢‚Æ‚«‚̓tƒ@ƒCƒ‹‚ð쬂µ‚Ü‚·B
FA_CREATE_NEWƒtƒ@ƒCƒ‹‚ð쬂µ‚Ü‚·B“¯–¼‚̃tƒ@ƒCƒ‹‚ª‚ ‚éꇂÍAƒGƒ‰[‚É‚È‚è‚Ü‚·B
FA_CREATE_ALWAYSƒtƒ@ƒCƒ‹‚ð쬂µ‚Ü‚·B“¯–¼‚̃tƒ@ƒCƒ‹‚ª‚ ‚éꇂÍAƒTƒCƒY‚ð0‚É‚µ‚Ä‚©‚çŠJ‚«‚Ü‚·B
+
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹BˆÈ~AFileObject\‘¢‘Ì‚ðŽg‚Á‚Ä‚±‚̃tƒ@ƒCƒ‹‚ð‘€ì‚Å‚«‚Ü‚·B
+
FR_NO_FILE
+
ƒtƒ@ƒCƒ‹‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒtƒ@ƒCƒ‹–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_EXIST
+
“¯–¼‚̃tƒ@ƒCƒ‹‚ªŠù‚É‚ ‚éB
+
FR_DENIED
+
ƒAƒNƒZƒX‚ª‹‘”Û‚³‚ꂽBƒŠ[ƒhEƒIƒ“ƒŠ[Eƒtƒ@ƒCƒ‹‚Ì‘‚«ž‚݃‚[ƒhEƒI[ƒvƒ“A“¯–¼‚̃fƒBƒŒƒNƒgƒŠ‚Ü‚½‚̓Š[ƒhEƒIƒ“ƒŠ[Eƒtƒ@ƒCƒ‹‚ª‚ ‚éó‘Ԃł̃tƒ@ƒCƒ‹ì¬AƒfƒBƒXƒN‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠEƒe[ƒuƒ‹‚ª–ž”t‚Ńtƒ@ƒCƒ‹‚ð쬂ł«‚È‚¢‚È‚ÇB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘Ô‚Å‘‚«ž‚ÝŒnƒI[ƒvƒ“‚ð‚µ‚½B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ªŠ„‚è“–‚Ä‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

쬂³‚ꂽƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ÍAˆÈ~‚»‚̃tƒ@ƒCƒ‹‚ɑ΂·‚éƒAƒNƒZƒX‚ÉŽg—p‚µ‚Ü‚·Bƒtƒ@ƒCƒ‹‚ð•Â‚¶‚é‚Æ‚«‚ÍAf_close()‚ðŽg—p‚µ‚Ü‚·B‰½‚ç‚©‚Ì•ÏX‚ªs‚í‚ꂽƒtƒ@ƒCƒ‹‚ª³‚µ‚­•Â‚¶‚ç‚ê‚È‚©‚Á‚½ê‡A‚»‚̃tƒ@ƒCƒ‹‚ª”j‘¹‚·‚éꇂª‚ ‚è‚Ü‚·B

+

ƒtƒ@ƒCƒ‹EƒAƒNƒZƒX‚ðŠJŽn‚·‚é‘O‚ÉAf_mount()‚ðŽg‚Á‚Ä‚»‚ꂼ‚ê‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA(ƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg)‚ð—^‚¦‚é•K—v‚ª‚ ‚è‚Ü‚·B‚±‚̉Šú‰»‚ÌŒãA‚»‚̘_—ƒhƒ‰ƒCƒu‚ɑ΂µ‚Ä‘S‚Ẵtƒ@ƒCƒ‹ŠÖ”‚ªŽg‚¦‚é‚悤‚É‚È‚è‚Ü‚·B

+

ƒŠ[ƒhƒIƒ“ƒŠ[\¬‚Å‚ÍAFA_WRITE, FA_CREATE_ALWAYS, FA_CREATE_NEW, FA_OPEN_ALWAYS‚ÌŠeƒtƒ‰ƒO‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—áiƒtƒ@ƒCƒ‹EƒRƒs[j

+
+void main (void)
+{
+    FATFS fs[2];         // ˜_—ƒhƒ‰ƒCƒu‚̃[ƒNEƒGƒŠƒA(ƒtƒ@ƒCƒ‹EƒVƒXƒeƒ€EƒIƒuƒWƒFƒNƒg)
+    FIL fsrc, fdst;      // ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg
+    BYTE buffer[4096];   // file copy buffer
+    FRESULT res;         // FatFs function common result code
+    UINT br, bw;         // File R/W count
+
+    // ƒhƒ‰ƒCƒu0,1‚Ƀ[ƒNEƒGƒŠƒA‚ð—^‚¦‚é
+    f_mount(0, &fs[0]);
+    f_mount(1, &fs[1]);
+
+    // ƒhƒ‰ƒCƒu1‚̃\[ƒXEƒtƒ@ƒCƒ‹‚ðŠJ‚­
+    res = f_open(&fsrc, "1:srcfile.dat", FA_OPEN_EXISTING | FA_READ);
+    if (res) die(res);
+
+    // ƒhƒ‰ƒCƒu0‚ɃfƒXƒeƒBƒl[ƒVƒ‡ƒ“Eƒtƒ@ƒCƒ‹‚ð쬂·‚é
+    res = f_open(&fdst, "0:dstfile.dat", FA_CREATE_ALWAYS | FA_WRITE);
+    if (res) die(res);
+
+    // ƒ\[ƒX‚©‚çƒfƒXƒeƒBƒl[ƒVƒ‡ƒ“‚ɃRƒs[‚·‚é
+    for (;;) {
+        res = f_read(&fsrc, buffer, sizeof(buffer), &br);
+        if (res || br == 0) break;   // error or eof
+        res = f_write(&fdst, buffer, br, &bw);
+        if (res || bw < br) break;   // error or disk full
+    }
+
+    // ‘S‚Ẵtƒ@ƒCƒ‹‚ð•Â‚¶‚é
+    f_close(&fsrc);
+    f_close(&fdst);
+
+    // ƒ[ƒNEƒGƒŠƒA‚ðŠJ•ú‚·‚é
+    f_mount(0, NULL);
+    f_mount(1, NULL);
+}
+
+
+ + +
+

ŽQÆ

+

f_read, f_write, f_close, FIL, FATFS

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/opendir.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/opendir.html new file mode 100644 index 000000000..b98cb91f3 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/opendir.html @@ -0,0 +1,73 @@ + + + + + + + +FatFs - f_opendir + + + + +
+

f_opendir

+

ƒfƒBƒŒƒNƒgƒŠ‚ðƒI[ƒvƒ“‚µ‚Ü‚·B

+
+FRESULT f_opendir (
+  DIR* DirObject,       /* ƒfƒBƒŒƒNƒgƒŠEƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^ */
+  const XCHAR* DirName  /* ƒfƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
DirObject
+
‰Šú‰»‚·‚éƒfƒBƒŒƒNƒgƒŠEƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
DirName
+
ƒI[ƒvƒ“‚·‚éƒfƒBƒŒƒNƒgƒŠ‚ւ̃pƒX–¼‚ª“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
˜_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ª—^‚¦‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒfƒBƒŒƒNƒgƒŠ‚ðƒI[ƒvƒ“‚µ‚Ü‚·B³íI—¹‚µ‚½‚çADirObject\‘¢‘Ì‚ðŽg‚Á‚Ä‚±‚̃fƒBƒŒƒNƒgƒŠ‚Ì€–Ú‚ð‡ŽŸ“Ç‚Ýo‚¹‚Ü‚·BDirObject\‘¢‘Ì‚ÍŽg—pŒã‚Í”CˆÓ‚ÌŽž“_‚Å”jŠü‚Å‚«‚Ü‚·B_FS_MINIMIZE >= 2‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

ŽQÆ

+

f_readdir, DIR

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/printf.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/printf.html new file mode 100644 index 000000000..0ff73f9bd --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/printf.html @@ -0,0 +1,71 @@ + + + + + + + +FatFs - f_printf + + + + +
+

f_printf

+

ƒtƒ@ƒCƒ‹‚É‘Ž®‰»•¶Žš—ñ‚ð‘‚«ž‚Ý‚Ü‚·B

+
+int f_printf (
+  FIL* FileObject,     /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg */
+  const char* Foramt,  /* ‘Ž®§Œä•¶Žš—ñ */
+  ...
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Format
+
'\0'‚ÅI‚í‚é‘Ž®§Œä•¶Žš—ñ‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B'\0'‚Í‘‚«ž‚Ü‚ê‚Ü‚¹‚ñB
+
...
+
ƒIƒvƒVƒ‡ƒ“‚̈ø”B
+ +
+
+ + +
+

–ß‚è’l

+

•¶Žš—ñ‚ª³í‚É‘‚«ž‚Ü‚ê‚é‚Æ‘‚«ž‚ñ‚¾•¶Žš”‚ª•Ô‚³‚ê‚Ü‚·BƒfƒBƒXƒN‚ª–ž”t‚Ü‚½‚Í‚»‚Ì‘¼ƒGƒ‰[‚É‚æ‚è³í‚É‘‚«ž‚Ü‚ê‚È‚©‚Á‚½‚Æ‚«‚ÍEOF(-1)‚ª•Ô‚³‚ê‚Ü‚·B

+
+ + +
+

‰ðà

+

‚±‚ÌŠÖ”‚Íf_putc()‚¨‚æ‚Ñf_puts()‚̃‰ƒbƒp[ŠÖ”‚Å‚·B‘Ž®§Œä‹@”\‚̓TƒuƒZƒbƒg‚Æ‚È‚Á‚Ä‚¢‚ÄAŽg—p‰Â”\‚̓^ƒCƒv‚Íc s d u XA¸“xŽw’è‚ÍlAƒtƒ‰ƒO‚Í0‚Æ‚È‚Á‚Ä‚¢‚Ü‚·BƒŠ[ƒhEƒ‰ƒCƒg\¬‚Å_USE_STRFUNC‚ª1‚Ü‚½‚Í2‚Ì‚Æ‚«‚±‚ÌŠÖ”‚ªƒTƒ|[ƒg‚³‚ê‚Ü‚·B

+
+ + +
+

Žg—p—á

+
+    f_printf(&fil, "%6d", -200);         // "  -200"
+    f_printf(&fil, "%02u", 5);           // "05"
+    f_printf(&fil, "%ld", 12345678L);    // "12345678"
+    f_printf(&fil, "%08lX", 1194684UL);  // "00123ABC"
+    f_printf(&fil, "%s", "String");      // "String"
+    f_printf(&fil, "%c", 'a');           // "a"
+
+
+ + +
+

ŽQÆ

+

f_open, f_putc, f_puts, f_gets, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/putc.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/putc.html new file mode 100644 index 000000000..3be83d182 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/putc.html @@ -0,0 +1,54 @@ + + + + + + + +FatFs - f_putc + + + + +
+

f_putc

+

ƒtƒ@ƒCƒ‹‚É•¶Žš‚ð‘‚«ž‚Ý‚Ü‚·B

+
+int f_putc (
+  int Chr,          /* ‘‚«ž‚Þ•¶Žš */
+  FIL* FileObject   /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg */
+);
+
+
+ +
+

ˆø”

+
+
Chr
+
‘‚«ž‚Þ•¶Žš‚ðŽw’肵‚Ü‚·B
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+

•¶Žš‚ª³í‚É‘‚«ž‚Ü‚ê‚é‚Æ‘‚«ž‚ñ‚¾•¶Žš‚ª•Ô‚³‚ê‚Ü‚·BƒfƒBƒXƒN‚ª–ž”t‚Ü‚½‚Í‚»‚Ì‘¼ƒGƒ‰[‚É‚æ‚è‘‚«ž‚Ü‚ê‚È‚©‚Á‚½‚Æ‚«‚ÍEOF‚ª•Ô‚³‚ê‚Ü‚·B

+
+ + +
+

‰ðà

+

‚±‚ÌŠÖ”‚Íf_write()‚̃‰ƒbƒp[ŠÖ”‚Å‚·BƒŠ[ƒhEƒ‰ƒCƒg\¬‚ÅA_USE_STRFUNC‚ª1‚Ü‚½‚Í2‚Ì‚Æ‚«‚±‚ÌŠÖ”‚ªƒTƒ|[ƒg‚³‚ê‚Ü‚·B2‚ðŽw’è‚·‚é‚ÆA'\n'‚Í"\r\n"‚É•ÏŠ·‚³‚ê‚Ä‘‚«ž‚Ü‚ê‚Ü‚·B

+
+ + +
+

ŽQÆ

+

f_open, f_puts, f_printf, f_gets, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/puts.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/puts.html new file mode 100644 index 000000000..212029c72 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/puts.html @@ -0,0 +1,54 @@ + + + + + + + +FatFs - f_puts + + + + +
+

f_puts

+

ƒtƒ@ƒCƒ‹‚É•¶Žš—ñ‚ð‘‚«ž‚Ý‚Ü‚·B

+
+int f_puts (
+  const char* Str,  /* •¶Žš—ñ */
+  FIL* FileObject   /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg */
+);
+
+
+ +
+

ˆø”

+
+
Str
+
‘‚«ž‚Þ'\0'‚ÅI‚í‚镶Žš—ñ‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B'\0'‚Í‘‚«ž‚Ü‚ê‚Ü‚¹‚ñB
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+

•¶Žš—ñ‚ª³í‚É‘‚«ž‚Ü‚ê‚é‚Æ‘‚«ž‚ñ‚¾•¶Žš”‚ª•Ô‚³‚ê‚Ü‚·BƒfƒBƒXƒN‚ª–ž”t‚Ü‚½‚Í‚»‚Ì‘¼ƒGƒ‰[‚É‚æ‚è³í‚É‘‚«ž‚Ü‚ê‚È‚©‚Á‚½‚Æ‚«‚ÍEOF‚ª•Ô‚³‚ê‚Ü‚·B

+
+ + +
+

‰ðà

+

‚±‚ÌŠÖ”‚Íf_putc()‚̃‰ƒbƒp[ŠÖ”‚Å‚·BƒŠ[ƒhEƒ‰ƒCƒg\¬‚ÅA_USE_STRFUNC‚ª1‚Ü‚½‚Í2‚Ì‚Æ‚«‚±‚ÌŠÖ”‚ªƒTƒ|[ƒg‚³‚ê‚Ü‚·B2‚ðŽw’è‚·‚é‚ÆA•¶Žš—ñ’†‚Ì'\n'‚ª"\r\n"‚É•ÏŠ·‚³‚ê‚Ä‘‚«ž‚Ü‚ê‚Ü‚·B

+
+ + +
+

ŽQÆ

+

f_open, f_putc, f_printf, f_gets, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/read.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/read.html new file mode 100644 index 000000000..54295ab37 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/read.html @@ -0,0 +1,73 @@ + + + + + + + +FatFs - f_read + + + + +
+

f_read

+

ƒtƒ@ƒCƒ‹‚©‚çƒf[ƒ^‚ð“Ç‚Ýo‚µ‚Ü‚·B

+
+FRESULT f_read (
+  FIL* FileObject,    /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘Ì */
+  void* Buffer,       /* “Ç‚Ýo‚µ‚½ƒf[ƒ^‚ðŠi”[‚·‚éƒoƒbƒtƒ@ */
+  UINT ByteToRead,    /* “Ç‚Ýo‚·ƒoƒCƒg” */
+  UINT* ByteRead      /* “Ç‚Ýo‚³‚ꂽƒoƒCƒg” */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Buffer
+
“Ç‚Ýo‚µ‚½ƒf[ƒ^‚ðŠi”[‚·‚éƒoƒbƒtƒ@‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
ByteToRead
+
“Ç‚Ýo‚·ƒoƒCƒg”(0`UINT‚ÌÅ‘å’l)‚ðŽw’肵‚Ü‚·B
+
ByteRead
+
ŽÀÛ‚É“Ç‚Ýo‚³‚ꂽƒoƒCƒg”‚ðŠi”[‚·‚é•Ï”‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DENIED
+
”ñ“Ç‚Ýž‚݃‚[ƒh‚ÅŠJ‚¢‚½ƒtƒ@ƒCƒ‹‚©‚ç“Ç‚Ýž‚à‚¤‚Æ‚µ‚½B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

“Ç‚Ýž‚ÝŠJŽnˆÊ’u‚ÍAŒ»Ý‚̃tƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚©‚ç‚É‚È‚è‚Ü‚·Bƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚Í“Ç‚Ýž‚܂ꂽƒoƒCƒg”‚¾‚¯i‚Ý‚Ü‚·B“Ç‚Ýž‚Ý’†‚Ƀtƒ@ƒCƒ‹‚ÌI’[‚É’B‚·‚é‚ÆA*ByteRead‚ÍByteToRead‚æ‚è‚ଂ³‚­‚È‚è‚Ü‚·B

+
+ + +
+

ŽQÆ

+

f_open, fgets, f_write, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/readdir.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/readdir.html new file mode 100644 index 000000000..b1b3c13e6 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/readdir.html @@ -0,0 +1,113 @@ + + + + + + + +FatFs - f_readdir + + + + +
+

f_readdir

+

ƒfƒBƒŒƒNƒgƒŠ€–Ú‚ð“Ç‚Ýo‚µ‚Ü‚·

+
+FRESULT f_readdir (
+  DIR* DirObject,    /* ƒfƒBƒŒƒNƒgƒŠEƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^ */
+  FILINFO* FileInfo  /* ƒtƒ@ƒCƒ‹î•ñ\‘¢‘̂ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
DirObject
+
ƒfƒBƒŒƒNƒgƒŠEƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
FileInfo
+
“Ç‚Ýo‚µ‚½ƒfƒBƒŒƒNƒgƒŠ€–Ú‚ðŠi”[‚·‚éƒtƒ@ƒCƒ‹î•ñ\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃfƒBƒŒƒNƒgƒŠEƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

ƒfƒBƒŒƒNƒgƒŠ€–Ú‚ð‡ŽŸ“Ç‚Ýo‚µ‚Ü‚·B‚±‚ÌŠÖ”‚ðŒJ‚è•Ô‚µŽÀs‚·‚邱‚Æ‚É‚æ‚èƒfƒBƒŒƒNƒgƒŠ‚Ì‘S‚Ä‚Ì€–Ú‚ð“Ç‚Ýo‚·‚±‚Æ‚ª‚Å‚«‚Ü‚·B‘S‚Ä‚Ì€–Ú‚ð“Ç‚Ýo‚µA“Ç‚Ýo‚·€–Ú‚ª‚à‚¤–³‚¢‚Æ‚«‚ÍAf_name[]ƒƒ“ƒo‚Ƀkƒ‹•¶Žš—ñ‚ª•Ô‚³‚ê‚Ü‚·Bƒ{ƒŠƒ…[ƒ€–¼‚Í“Ç‚Ýo‚·‚Æ‚«‚ÉŠü‚Ä‚ç‚êAŒ»‚ê‚邱‚Æ‚Í‚ ‚è‚Ü‚¹‚ñB"."A".."‚ÍA‘Š‘΃pƒX‚ª—LŒø‚È‚Æ‚«(_FS_RPATH == 1)‚Ì‚ÝŒ»‚ê‚Ü‚·B“¾‚ç‚ê‚éƒtƒ@ƒCƒ‹î•ñ‚ÌÚׂɂ‚¢‚Ä‚Í FILINFO\‘¢‘Ì‚ðŽQÆ‚µ‚Ä‚­‚¾‚³‚¢BFileInfo‚Ƀkƒ‹Eƒ|ƒCƒ“ƒ^‚ðŽw’è‚·‚é‚ÆA‚»‚̃fƒBƒŒƒNƒgƒŠ‚̃Š[ƒhEƒCƒ“ƒfƒbƒNƒX‚ðŠª‚«–ß‚µ‚Ü‚·B

+

LFN‹@”\‚ª—LŒø‚ÈŽž‚ÍAf_readdirŠÖ”‚̌ĂÑo‚µ‚Éæ—§‚Á‚ÄFILINFO\‘¢‘Ì‚Ìlfname‚Ælfsize‚ª—LŒø‚È’l‚ʼnŠú‰»‚³‚ê‚Ä‚¢‚È‚¯‚ê‚΂Ȃè‚Ü‚¹‚ñBlfname‚ÍLFN‚ðŠi”[‚·‚éƒoƒbƒtƒ@‚ÅAlfsize‚Í‚»‚̃oƒbƒtƒ@EƒTƒCƒY‚Å‚·BLFNŠi”[ƒoƒbƒtƒ@‚Ü‚½‚ÍLFN‘€ìƒoƒbƒtƒ@‚Ç‚¿‚ç‚©‚̃TƒCƒY‚ª‚»‚ÌLFN‚̃TƒCƒY‚ɑ΂µ‚Ä•s\•ª‚¾‚Á‚½ê‡‚Ü‚½‚ÍLFN‚ª‘¶Ý‚µ‚È‚¢ê‡‚ÍALFNŠi”[ƒoƒbƒtƒ@‚Ƀkƒ‹•¶Žš—ñ‚ª•Ô‚³‚ê‚Ü‚·BLFN‚Ƀ[ƒJƒ‹EƒR[ƒh‚É‘¶Ý‚µ‚È‚¢•¶Žš‚ªŠÜ‚Ü‚ê‚Ä‚¢‚éê‡‚à“¯—l‚Å‚·‚ªAUnicode API‚ªŽw’肳‚ê‚Ä‚¢‚éꇂ͕¶ŽšƒR[ƒh‚̧–ñ‚Í‚ ‚è‚Ü‚¹‚ñBlfname‚Ƀkƒ‹Eƒ|ƒCƒ“ƒ^‚ðŽw’肵‚½ê‡‚ÍALFN‚ÉŠÖ‚µ‚ĉ½‚à•Ô‚³‚ê‚Ü‚¹‚ñB

+

_FS_MINIMIZE >= 2‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—á

+
+FRESULT scan_files (char* path)
+{
+    FRESULT res;
+    FILINFO fno;
+    DIR dir;
+    int i;
+    char *fn;
+#if _USE_LFN
+    static char lfn[_MAX_LFN * (_DF1S ? 2 : 1) + 1];
+    fno.lfname = lfn;
+    fno.lfsize = sizeof(lfn);
+#endif
+
+
+    res = f_opendir(&dir, path);
+    if (res == FR_OK) {
+        i = strlen(path);
+        for (;;) {
+            res = f_readdir(&dir, &fno);
+            if (res != FR_OK || fno.fname[0] == 0) break;
+#if _USE_LFN
+            fn = *fno.lfname ? fno.lfname : fno.fname;
+#else
+            fn = fno.fname;
+#endif
+            if (*fn == '.') continue;
+            if (fno.fattrib & AM_DIR) {
+                sprintf(&path[i], "/%s", fn);
+                res = scan_files(path);
+                if (res != FR_OK) break;
+                path[i] = 0;
+            } else {
+                printf("%s/%s\n", path, fn);
+            }
+        }
+    }
+
+    return res;
+}
+
+
+ + +
+

ŽQÆ

+

f_opendir, f_stat, FILINFO, DIR

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/rename.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/rename.html new file mode 100644 index 000000000..8c427850c --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/rename.html @@ -0,0 +1,87 @@ + + + + + + + +FatFs - f_rename + + + + +
+

f_rename

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚Ì–¼‘O‚Ì•ÏX‚Ü‚½‚͈ړ®B

+
+FRESULT f_rename (
+  const XCHAR* OldName, /* ŒÃ‚¢ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼ */
+  const XCHAR* NewName  /* V‚µ‚¢ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼ */
+);
+
+
+ +
+

ˆø”

+
+
OldName
+
•ÏX‘Îۂ̃IƒuƒWƒFƒNƒg(ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ)‚ւ̃pƒX–¼‚Ì“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
NewName
+
V‚µ‚¢ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚̃tƒ‹ƒpƒX–¼‚Ì“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·BŠù‚É‘¶Ý‚·‚é‚à‚Ì‚Æ“¯‚¶–¼‘O‚ÍŽg‚¦‚Ü‚¹‚ñB‚Ü‚½Aƒhƒ‰ƒCƒu”Ô†‚ÍŽw’è‚Å‚«‚¸AOldName‚ÅŽw’肳‚ꂽƒhƒ‰ƒCƒuã‚̃IƒuƒWƒFƒNƒg‚Æ‚µ‚Ĉµ‚í‚ê‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_FILE
+
OldName‚̃IƒuƒWƒFƒNƒg‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_DENIED
+
ƒhƒ‰ƒCƒu—e—Ê‚Ì•s‘«“™‚Ì——R‚ÅV‚µ‚¢–¼‘O‚̃IƒuƒWƒFƒNƒg‚ªì‚ê‚È‚¢B
+
FR_EXIST
+
NewName‚Æ“¯‚¶ƒIƒuƒWƒFƒNƒg‚ªŠù‚É‘¶Ý‚·‚éB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
˜_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNƒGƒŠƒA‚ªŠ„‚è“–‚Ä‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚Ì–¼‘O‚ð•ÏX‚µ‚Ü‚·B‚Ü‚½A•Ê‚̃fƒBƒŒƒNƒgƒŠ‚ւ̈ړ®(“¯‚¶ƒhƒ‰ƒCƒu“à‚Ì‚Ý)‚à‰Â”\‚Å‚·BƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚¨‚æ‚Ñ_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

Žg—p—á

+
+    // ƒtƒ@ƒCƒ‹‚Ü‚½‚̓TƒuƒfƒBƒŒƒNƒgƒŠ‚Ì–¼‘O‚ð•ÏX‚·‚é
+    f_rename("oldname.txt", "newname.txt");
+
+    // ƒtƒ@ƒCƒ‹‚Ü‚½‚̓TƒuƒfƒBƒŒƒNƒgƒŠ‚Ì–¼‘O‚ð•ÏX‚·‚é‚Æ“¯Žž‚ɕʂ̃fƒBƒŒƒNƒgƒŠ‚ÖˆÚ“®‚·‚é
+    f_rename("oldname.txt", "dir1/newname.txt");
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/sdir.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/sdir.html new file mode 100644 index 000000000..909673da7 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/sdir.html @@ -0,0 +1,36 @@ + + + + + + + +FatFs - DIR + + + + +
+

DIR

+

DIR\‘¢‘Ì‚ÍAf_opendir(), f_readdir()‚̃[ƒNEƒGƒŠƒA‚Æ‚µ‚ÄŽg—p‚³‚ê‚Ü‚·B

+
+typedef struct _DIR_ {
+    FATFS*  fs;        /* Pointer to the owner file system object */
+    WORD    id;        /* Owner file system mount ID */
+    WORD    index;     /* Current index number */
+    DWORD   sclust;    /* Table start cluster (0:Static table) */
+    DWORD   clust;     /* Current cluster */
+    DWORD   sect;      /* Current sector */
+    BYTE*   dir;       /* Pointer to the current SFN entry in the win[] */
+    BYTE*   fn;        /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */
+#if _USE_LFN
+    WCHAR*  lfn;       /* Pointer to the LFN working buffer */
+    WORD    lfn_idx;   /* Last matched LFN index (0xFFFF:No LFN) */
+#endif
+} DIR;
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/sfatfs.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/sfatfs.html new file mode 100644 index 000000000..e9335e7fc --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/sfatfs.html @@ -0,0 +1,53 @@ + + + + + + + +FatFs - FATFS + + + + +
+

FATFS

+

FATFS\‘¢‘Ì‚ÍAŒÂX‚̘_—ƒhƒ‰ƒCƒu‚̃_ƒCƒiƒ~ƒbƒNEƒ[ƒNEƒGƒŠƒA‚ð•ÛŽ‚µAf_mount()‚ÅFatFsƒ‚ƒWƒ…[ƒ‹‚É“o˜^‚³‚ê‚Ü‚·B•W€ó‘Ô‚Å‚ÍŽŸ‚̂悤‚ȃƒ“ƒo‚É‚È‚Á‚Ä‚¢‚Ü‚·BƒAƒvƒŠƒP[ƒVƒ‡ƒ“‚©‚ç‘‚«Š·‚¦‰Â”\‚ȃƒ“ƒo‚Í‚ ‚è‚Ü‚¹‚ñB

+ +
+typedef struct _FATFS_ {
+    BYTE    fs_type;      /* FAT sub type */
+    BYTE    drive;        /* Physical drive number */
+    BYTE    csize;        /* Number of sectors per cluster */
+    BYTE    n_fats;       /* Number of FAT copies */
+    BYTE    wflag;        /* win[] dirty flag (1:must be written back) */
+    BYTE    pad1;
+    WORD    id;           /* File system mount ID */
+    WORD    n_rootdir;    /* Number of root directory entries (0 on FAT32) */
+#if _FS_REENTRANT
+    HANDLE  h_mutex;      /* Handle to the mutex (Platform dependent) */
+#endif
+#if _MAX_SS != 512
+    WORD    s_size;       /* Sector size */
+#endif
+#if !_FS_READONLY
+    BYTE    fsi_flag;     /* fsinfo dirty flag (1:must be written back) */
+    BYTE    pad2;
+    DWORD   last_clust;   /* Last allocated cluster */
+    DWORD   free_clust;   /* Number of free clusters */
+    DWORD   fsi_sector;   /* fsinfo sector */
+#endif
+    DWORD   sects_fat;    /* Sectors per fat */
+    DWORD   max_clust;    /* Maximum cluster# + 1. Number of clusters is max_clust - 2 */
+    DWORD   fatbase;      /* FAT start sector */
+    DWORD   dirbase;      /* Root directory start sector (Cluster# on FAT32) */
+    DWORD   database;     /* Data start sector */
+    DWORD   winsect;      /* Current sector appearing in the win[] */
+    BYTE    win[_MAX_SS]; /* Disk access window for Directory/FAT */
+} FATFS;
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/sfile.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/sfile.html new file mode 100644 index 000000000..e30b910f8 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/sfile.html @@ -0,0 +1,41 @@ + + + + + + + +FatFs - FIL + + + + +
+

FIL

+

FIL\‘¢‘Ì‚ÍAf_open()‚Å쬂³‚êA‚»‚̃tƒ@ƒCƒ‹‚Ìó‘Ô‚ð•ÛŽ‚µ‚Ü‚·BƒAƒvƒŠƒP[ƒVƒ‡ƒ“‚©‚ç‘‚«Š·‚¦‰Â”\‚ȃƒ“ƒo‚Í‚ ‚è‚Ü‚¹‚ñB

+ +
+typedef struct _FIL_ {
+    FATFS*  fs;           /* Pointer to the owner file system object */
+    WORD    id;           /* Owner file system mount ID */
+    BYTE    flag;         /* File status flags */
+    BYTE    csect;        /* Sector address in the cluster */
+    DWORD   fptr;         /* File R/W pointer */
+    DWORD   fsize;        /* File size */
+    DWORD   org_clust;    /* File start cluster */
+    DWORD   curr_clust;   /* Current cluster */
+    DWORD   dsect;        /* Current data sector */
+#if _FS_READONLY == 0
+    DWORD   dir_sect;     /* Sector containing the directory entry */
+    BYTE*   dir_ptr;      /* Ponter to the directory entry in the window */
+#endif
+#if !_FS_TINY
+    BYTE    buf[_MAX_SS];  /* File R/W buffer */
+#endif
+} FIL;
+
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/sfileinfo.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/sfileinfo.html new file mode 100644 index 000000000..2e7131e40 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/sfileinfo.html @@ -0,0 +1,69 @@ + + + + + + + +FatFs - FILINFO + + + + +
+

FILINFO

+

FILINFO\‘¢‘Ì‚ÍAf_stat(), f_readdir()‚Å•Ô‚³‚ê‚éƒtƒ@ƒCƒ‹î•ñ‚ð•ÛŽ‚µ‚Ü‚·B

+
+typedef struct _FILINFO_ {
+    DWORD fsize;     /* File size */
+    WORD fdate;      /* Last modified date */
+    WORD ftime;      /* Last modified time */
+    BYTE fattrib;    /* Attribute */
+    char fname[13];  /* Short file name (8.3 format) */
+#if _USE_LFN
+    XCHAR* lfname;   /* Pointer to the LFN buffer */
+    int lfsize;      /* Size of LFN buffer [bytes] */
+#endif
+} FILINFO;
+
+
+ +

ƒƒ“ƒo

+
+
fsize
+
ƒtƒ@ƒCƒ‹‚̃oƒCƒg’PˆÊ‚̃TƒCƒY‚ªŠi”[‚³‚ê‚Ü‚·BƒfƒBƒŒƒNƒgƒŠ‚ÌꇂÍí‚É0‚Å‚·B
+
fdate
+
ƒtƒ@ƒCƒ‹‚Ì•ÏX‚³‚ꂽ“ú•tA‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚Ì쬂³‚ꂽ“ú•t‚ªŠi”[‚³‚ê‚Ü‚·B
+
+
bit15:9
+
1980”N‚ð‹N“_‚Æ‚µ‚½”N‚ª 0..127 ‚Å“ü‚è‚Ü‚·B
+
bit8:5
+
ŒŽ‚ª 1..12 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit4:0
+
“ú‚ª 1..31 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
+
+
ftime
+
ƒtƒ@ƒCƒ‹‚Ì•ÏX‚³‚ꂽŽžA‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚Ì쬂³‚ꂽŽž‚ªŠi”[‚³‚ê‚Ü‚·B
+
+
bit15:11
+
Žž‚ª 0..23 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit10:5
+
•ª‚ª 0..59 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
bit4:0
+
•b/2‚ª 0..29 ‚Ì’l‚Å“ü‚è‚Ü‚·B
+
+
+
fattrib
+
‘®«ƒtƒ‰ƒO‚ªŠi”[‚³‚ê‚Ü‚·Bƒtƒ‰ƒO‚ÍAM_DIR, AM_RDO, AM_HID, AM_SYS, AM_ARC‚Ì‘g‚݇‚킹‚Æ‚È‚è‚Ü‚·B
+
fname[]
+
8.3Œ`Ž®‚Ì–¼‘O‚ª'\0'‚ÅI‚í‚镶Žš—ñ‚Æ‚µ‚ÄŠi”[‚³‚ê‚Ü‚·B
+
lfname
+
•Ô‚³‚ê‚é’·‚¢ƒtƒ@ƒCƒ‹–¼‚ðŠi”[‚·‚éƒoƒbƒtƒ@‚ւ̃|ƒCƒ“ƒ^B‚±‚Ì\‘¢‘Ì‚ðŽg—p‚·‚é‘O‚ɃAƒvƒŠƒP[ƒVƒ‡ƒ“‚É‚æ‚艊ú‰»‚³‚ê‚È‚¯‚ê‚΂Ȃè‚Ü‚¹‚ñB”ñLFN\¬‚Ì‚Æ‚«‚Í‘¶Ý‚µ‚Ü‚¹‚ñB
+
lfsize
+
’·‚¢ƒtƒ@ƒCƒ‹–¼‚ðŠi”[‚·‚éƒoƒbƒtƒ@‚̃TƒCƒY(•¶Žš”)B‚±‚Ì\‘¢‘Ì‚ðŽg—p‚·‚é‘O‚ɃAƒvƒŠƒP[ƒVƒ‡ƒ“‚É‚æ‚艊ú‰»‚³‚ê‚È‚¯‚ê‚΂Ȃè‚Ü‚¹‚ñB”ñLFN\¬‚Ì‚Æ‚«‚Í‘¶Ý‚µ‚Ü‚¹‚ñB
+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/stat.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/stat.html new file mode 100644 index 000000000..b8bfed12f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/stat.html @@ -0,0 +1,74 @@ + + + + + + + +FatFs - f_stat + + + + +
+

f_stat

+
+FRESULT f_stat (
+  const char* FileName,  /* ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+  FILINFO* FileInfo      /* ƒtƒ@ƒCƒ‹î•ñ\‘¢‘̂ւ̃|ƒCƒ“ƒ^ *
+);
+
+
+ +
+

ˆø”

+
+
FileName
+
î•ñ‚𓾂éƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼‚Ì'\0'‚ÅI‚í‚镶Žš—ñ‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
FileInfo
+
“Ç‚Ýo‚µ‚½ƒtƒ@ƒCƒ‹î•ñ‚ðŠi”[‚·‚éƒtƒ@ƒCƒ‹î•ñ\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_FILE
+
ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
˜_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNƒGƒŠƒA‚ªŠ„‚è“–‚Ä‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚ÉŠÖ‚·‚éî•ñ‚𓾂܂·B“¾‚ç‚ê‚éƒtƒ@ƒCƒ‹î•ñ‚ÌÚׂɂ‚¢‚Ä‚Í FILINFO\‘¢‘Ì‚ðŽQÆ‚µ‚Ä‚­‚¾‚³‚¢B_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

ŽQÆ

+

f_opendir, f_readdir, FILINFO, DIR

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/sync.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/sync.html new file mode 100644 index 000000000..0114e9071 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/sync.html @@ -0,0 +1,63 @@ + + + + + + + +FatFs - f_sync + + + + +
+

f_sync

+

‘‚«ž‚Ý’†‚̃tƒ@ƒCƒ‹‚̃LƒƒƒbƒVƒ…‚³‚ꂽî•ñ‚ðƒtƒ‰ƒbƒVƒ…‚µ‚Ü‚·B

+
+FRESULT f_sync (
+  FIL* FileObject     /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
sync‚·‚éƒtƒ@ƒCƒ‹‚̃tƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ª–³ŒøB
+
+
+ + +
+

‰ðà

+

‚±‚ÌŠÖ”‚Íf_close()‚Æ“¯‚¶ˆ—‚ðŽÀs‚µ‚Ü‚·‚ªAƒtƒ@ƒCƒ‹‚͈ø‚«‘±‚«ŠJ‚©‚ꂽ‚Ü‚Ü‚É‚È‚èA“Ç‚Ý‘‚«‚ð‘±s‚Å‚«‚Ü‚·BƒƒMƒ“ƒO‚È‚ÇA‘‚«ž‚݃‚[ƒh‚Å’·ŽžŠÔƒtƒ@ƒCƒ‹‚ªŠJ‚©‚ê‚Ä‚¢‚éƒAƒvƒŠƒP[ƒVƒ‡ƒ“‚É‚¨‚¢‚ÄA’èŠú“I‚Ü‚½‚Í‹æØ‚è‚Ì—Ç‚¢‚Æ‚±‚ë‚Åsync‚·‚邱‚Æ‚É‚æ‚èA•sˆÓ‚Ì“dŒ¹’f‚⃃fƒBƒA‚ÌŽæ‚èŠO‚µ‚É‚æ‚莸‚í‚ê‚éƒf[ƒ^‚ðŬ‚É‚·‚邱‚Æ‚ª‚Å‚«‚Ü‚·BŽÀÛ‚Ì‚Æ‚±‚ëAf_close‚Å‚Ísync‚µ‚½‚ ‚ƃtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ð”jŠü‚µ‚Ä‚¢‚邾‚¯‚È‚Ì‚ÅAf_close’¼‘O‚Ìsync‚͈Ӗ¡‚ª‚ ‚è‚Ü‚¹‚ñB

+

ƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

ŽQÆ

+

f_close

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/truncate.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/truncate.html new file mode 100644 index 000000000..3a7a58007 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/truncate.html @@ -0,0 +1,65 @@ + + + + + + + +FatFs - f_truncate + + + + +
+

f_truncate

+

ƒtƒ@ƒCƒ‹’·‚ðØ‚è‹l‚ß‚Ü‚·B

+
+FRESULT f_truncate (
+  FIL* FileObject     /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
Ø‚è‹l‚ß‘ÎÛƒtƒ@ƒCƒ‹‚̃tƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg‚ւ̃|ƒCƒ“ƒ^
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DENIED
+
ƒtƒ@ƒCƒ‹‚ª”ñ‘‚«ž‚݃‚[ƒh‚ÅŠJ‚©‚ê‚Ä‚¢‚éB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇA•¨—ƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚Ì’·‚³‚ªŒ»Ý‚̃tƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚ÉØ‚è‹l‚ß‚ç‚ê‚Ü‚·Bƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚ªƒtƒ@ƒCƒ‹‚ÌI’[‚ðŽw‚µ‚Ä‚¢‚é‚Æ‚«‚ÍA‚±‚ÌŠÖ”‚͉½‚ÌŒø‰Ê‚àŽ‚¿‚Ü‚¹‚ñBƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚¨‚æ‚Ñ_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

ŽQÆ

+

f_open, f_lseek, FIL

+
+ + +

Return

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/unlink.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/unlink.html new file mode 100644 index 000000000..f7526b370 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/unlink.html @@ -0,0 +1,70 @@ + + + + + + + +FatFs - f_unlink + + + + +
+

f_unlink

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚ð휂µ‚Ü‚·B

+
+FRESULT f_unlink (
+  const XCHAR* FileName  /* ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+);
+
+
+ +
+

ˆø”

+
+
FileName
+
휑Îۂ̃tƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼‚Ì“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_FILE
+
ƒtƒ@ƒCƒ‹‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_DRIVE
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_DENIED
+
‘ÎÛƒtƒ@ƒCƒ‹EƒfƒBƒŒƒNƒgƒŠ‚ªƒŠ[ƒhEƒIƒ“ƒŠ[ó‘ÔA‘ÎÛƒfƒBƒŒƒNƒgƒŠ‚ª‹ó‚Å‚È‚¢ê‡‚È‚ÇB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇA•¨—ƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
˜_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ªŠ„‚è“–‚Ä‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚ð휂µ‚Ü‚·BƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚â_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/utime.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/utime.html new file mode 100644 index 000000000..b3d039a34 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/utime.html @@ -0,0 +1,77 @@ + + + + + + + +FatFs - f_utime + + + + +
+

f_utime

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚̃^ƒCƒ€ƒXƒ^ƒ“ƒv‚ð•ÏX‚µ‚Ü‚·B

+
+FRESULT f_utime (
+  const XCHAR* FileName,   /* ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ–¼‚ւ̃|ƒCƒ“ƒ^ */
+  const FILINFO* TimeDate  /* Ý’è‚·‚é“ú•t */
+);
+
+
+ +
+

ˆø”

+
+
FileName
+
•ÏX‘Îۂ̃tƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚ւ̃pƒX–¼‚Ì“ü‚Á‚½'\0'‚ÅI‚í‚镶Žš—ñ‚ðŽw’肵‚Ü‚·B
+
TimeDate
+
Ý’è‚·‚é“ú•t‚ÆŽžŠÔ‚ðfdate‚Æftimeƒƒ“ƒo‚Éݒ肳‚ꂽFILINFO\‘¢‘̂ւ̃|ƒCƒ“ƒ^B‘¼‚̃ƒ“ƒo‚ÍDon't care‚Å‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_NO_FILE
+
ƒtƒ@ƒCƒ‹‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_NO_PATH
+
ƒpƒX‚ªŒ©‚‚©‚ç‚È‚¢B
+
FR_INVALID_NAME
+
ƒpƒX–¼‚ª•s³B
+
FR_INVALID_NAME
+
ƒhƒ‰ƒCƒu”Ô†‚ª•s³B
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_WRITE_PROTECTED
+
ƒƒfƒBƒA‚ª‘‚«ž‚Ý‹ÖŽ~ó‘ÔB
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_ENABLED
+
‚»‚̘_—ƒhƒ‰ƒCƒu‚Ƀ[ƒNEƒGƒŠƒA‚ª—^‚¦‚ç‚ê‚Ä‚¢‚È‚¢B
+
FR_NO_FILESYSTEM
+
ƒfƒBƒXƒNã‚É—LŒø‚ÈFATƒp[ƒe[ƒVƒ‡ƒ“‚ªŒ©‚‚©‚ç‚È‚¢B
+
+
+ + +
+

‰ðà

+

ƒtƒ@ƒCƒ‹‚Ü‚½‚̓fƒBƒŒƒNƒgƒŠ‚̃^ƒCƒ€ƒXƒ^ƒ“ƒv‚ð•ÏX‚µ‚Ü‚·BƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚¨‚æ‚Ñ_FS_MINIMIZE >= 1‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

ŽQÆ

+

f_stat, FILINFO

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/ja/write.html b/src/ersky9x/libraries/fat/fatfs/doc/ja/write.html new file mode 100644 index 000000000..1e5fe656e --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/ja/write.html @@ -0,0 +1,74 @@ + + + + + + + +FatFs - f_write + + + + +
+

f_write

+

ƒtƒ@ƒCƒ‹‚Ƀf[ƒ^‚ð‘‚«ž‚Ý‚Ü‚·B

+
+FRESULT f_write (
+  FIL* FileObject,     /* ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg */
+  const void* Buffer,  /* ‘‚«ž‚݃f[ƒ^ */
+  UINT ByteToWrite,    /* ‘‚«ž‚ÞƒoƒCƒg” */
+  UINT* ByteWritten    /* ‘‚«ž‚܂ꂽƒoƒCƒg” */
+);
+
+
+ +
+

ˆø”

+
+
FileObject
+
ƒtƒ@ƒCƒ‹EƒIƒuƒWƒFƒNƒg\‘¢‘̂ւ̃|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
Buffer
+
‘‚«ž‚Þƒf[ƒ^‚ðŠi”[‚µ‚½ƒoƒbƒtƒ@‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
ByteToWrite
+
‘‚«ž‚ÞƒoƒCƒg”(0`UINT‚ÌÅ‘å’l)‚ðŽw’肵‚Ü‚·B
+
ByteWritten
+
‘‚«ž‚܂ꂽƒoƒCƒg”‚ðŠi”[‚·‚é•Ï”‚ðŽw‚·ƒ|ƒCƒ“ƒ^‚ðŽw’肵‚Ü‚·B
+
+
+ + +
+

–ß‚è’l

+
+
FR_OK (0)
+
³íI—¹B
+
FR_DENIED
+
”ñ‘‚«ž‚݃‚[ƒh‚ÅŠJ‚©‚ꂽƒtƒ@ƒCƒ‹‚É‘‚«ž‚à‚¤‚Æ‚µ‚½B
+
FR_DISK_ERR
+
ƒfƒBƒXƒNEƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_INT_ERR
+
•s³‚ÈFAT\‘¢‚Ü‚½‚Í“à•”ƒGƒ‰[‚É‚æ‚鎸”sB
+
FR_NOT_READY
+
ƒƒfƒBƒA‚ªƒZƒbƒg‚³‚ê‚Ä‚¢‚È‚¢‚È‚ÇAƒfƒBƒXƒNEƒhƒ‰ƒCƒu‚ª“®ì•s”\ó‘ÔB
+
FR_INVALID_OBJECT
+
–³Œø‚ȃtƒ@ƒCƒ‹ƒIƒuƒWƒFƒNƒgB
+
+
+ + +
+

‰ðà

+

‘‚«ž‚ÝŠJŽnˆÊ’u‚ÍAƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚̈ʒu‚©‚ç‚É‚È‚è‚Ü‚·Bƒtƒ@ƒCƒ‹R/Wƒ|ƒCƒ“ƒ^‚ÍŽÀÛ‚É‘‚«ž‚܂ꂽƒoƒCƒg”‚¾‚¯i‚Ý‚Ü‚·BŠÖ”‚ª³íI—¹‚µ‚½ŒãA—v‹‚µ‚½ƒoƒCƒg”‚ª‘‚«ž‚܂ꂽ‚©‚Ç‚¤‚©*ByteWritten‚ðƒ`ƒFƒbƒN‚·‚ׂ«‚Å‚·B*ByteWritten < ByteToWrite‚Ì‚Æ‚«‚ÍAƒfƒBƒXƒNEƒtƒ‹‚ðˆÓ–¡‚µ‚Ü‚·B

+

ƒŠ[ƒhEƒIƒ“ƒŠ[\¬‚Å‚Í‚±‚ÌŠÖ”‚̓Tƒ|[ƒg‚³‚ê‚Ü‚¹‚ñB

+
+ + +
+

ŽQÆ

+

f_open, f_read, fputc, fputs, fprintf, f_close, FIL

+
+ +

–ß‚é

+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/patches.html b/src/ersky9x/libraries/fat/fatfs/doc/patches.html new file mode 100644 index 000000000..59f667b0e --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/patches.html @@ -0,0 +1,18 @@ + + + + + + + +Patches for FatFs R0.07b + + +

Patches for FatFs R0.07b

+
+Jun 21, 2009
+------------------------------------------------------------------------------
+Currently no known problem.
+
+ + diff --git a/src/ersky9x/libraries/fat/fatfs/doc/updates.txt b/src/ersky9x/libraries/fat/fatfs/doc/updates.txt new file mode 100644 index 000000000..6e706d15f --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/doc/updates.txt @@ -0,0 +1,82 @@ +R0.07b, Jun 21, 2009 + Fixed f_unlink() may return FR_OK on error. + Fixed wrong cache control in f_lseek(). + Added relative path feature. + Added f_chdir(). + Added f_chdrive(). + Added proper case conversion to extended char. + +R0.07a, Apr 14, 2009 + Separated out OS dependent code on re-entrant configuration. + Added multiple sector size support. + +R0.07, Apr 01, 2009 + Merged Tiny-FatFs as a buffer configuration option. + Added long file name support. + Added multiple code page support. + Added re-entrancy for multitask operation. + Added auto cluster size selection to f_mkfs(). + Added rewind option to f_readdir(). + Changed result code of critical errors. + Renamed string functions to avoid name collision. + +R0.06, Apr 01, 2008 + Added f_forward. (Tiny-FatFs) + Added string functions: fgets, fputc, fputs and fprintf. + Improved performance of f_lseek on moving to the same or following cluster. + +R0.05a, Feb 03, 2008 + Added f_truncate. + Added f_utime. + Fixed off by one error at FAT sub-type determination. + Fixed btr in f_read can be mistruncated. + Fixed cached sector is left not flushed when create and close without write. + +R0.05, Aug 26, 2007 + Changed arguments of f_read, f_write. + Changed arguments of f_mkfs. (FatFs) + Fixed f_mkfs on FAT32 creates incorrect FSInfo. (FatFs) + Fixed f_mkdir on FAT32 creates incorrect directory. (FatFs) + +R0.04b, May 05, 2007 + Added _USE_NTFLAG option. + Added FSInfo support. + Fixed some problems corresponds to FAT32. (Tiny-FatFs) + Fixed DBCS name can result FR_INVALID_NAME. + Fixed short seek (<= csize) collapses the file object. + +R0.04a, Apr 01, 2007 + Supported multiple partitions on a plysical drive. (FatFs) + Added minimization level 3. + Added a capability of extending file size to f_lseek. + Fixed an endian sensitive code in f_mkfs. (FatFs) + Fixed a problem corresponds to FAT32 support. (Tiny-FatFs) + +R0.04, Feb 04, 2007 + Supported multiple drive system. (FatFs) + Changed some APIs for multiple drive system. + Added f_mkfs. (FatFs) + Added _USE_FAT32 option. (Tiny-FatFs) + +R0.03a, Dec 11, 2006 + Improved cluster scan algolithm to write files fast. + Fixed f_mkdir creates incorrect directory on FAT32. + +R0.03, Sep 22, 2006 + Added f_rename. + Changed option _FS_MINIMUM to _FS_MINIMIZE. + +R0.02a, Jun 10, 2006 + Added a configuration option _FS_MINIMUM. + +R0.02, Jun 01, 2006 + Added FAT12. + Removed unbuffered mode. + Fixed a problem on small (<32M) patition. + +R0.01, Apr 29, 2006 + First release + +R0.00, Feb 26, 2006 + Prototype (not released) + diff --git a/src/ersky9x/libraries/fat/fatfs/src/00readme.txt b/src/ersky9x/libraries/fat/fatfs/src/00readme.txt new file mode 100644 index 000000000..806dce0ab --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/00readme.txt @@ -0,0 +1,104 @@ +FatFs Module Source Files R0.07c (C)ChaN, 2009 + + +FILES + + ff.h Common include file for FatFs and application module. + ff.c FatFs module. + diskio.h Common include file for FatFs and disk I/O module. + diskio.c Skeleton of low level disk I/O module. + integer.h Alternative type definitions for integer variables. + option Optional external functions. + + Low level disk I/O module is not included in this archive because the FatFs + module is only a generic file system layer and not depend on any specific + storage device. You have to provide a low level disk I/O module that written + to control your storage device. + + + +AGREEMENTS + + FatFs module is an open source software to implement FAT file system to + small embedded systems. This is a free software and is opened for education, + research and commercial developments under license policy of following trems. + + Copyright (C) 2009, ChaN, all right reserved. + + * The FatFs module is a free software and there is NO WARRANTY. + * No restriction on use. You can use, modify and redistribute it for + personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY. + * Redistributions of source code must retain the above copyright notice. + + + +REVISION HISTORY + + Feb 26, 2006 R0.00 Prototype + + Apr 29, 2006 R0.01 First release. + + Jun 01, 2006 R0.02 Added FAT12. + Removed unbuffered mode. + Fixed a problem on small (<32M) patition. + + Jun 10, 2006 R0.02a Added a configuration option _FS_MINIMUM. + + Sep 22, 2006 R0.03 Added f_rename. + Changed option _FS_MINIMUM to _FS_MINIMIZE. + + Dec 11, 2006 R0.03a Improved cluster scan algolithm to write files fast. + Fixed f_mkdir creates incorrect directory on FAT32. + + Feb 04, 2007 R0.04 Supported multiple drive system. (FatFs) + Changed some APIs for multiple drive system. + Added f_mkfs. (FatFs) + Added _USE_FAT32 option. (Tiny-FatFs) + + Apr 01, 2007 R0.04a Supported multiple partitions on a plysical drive. (FatFs) + Fixed an endian sensitive code in f_mkfs. (FatFs) + Added a capability of extending the file size to f_lseek. + Added minimization level 3. + Fixed a problem that can collapse a sector when recreate an + existing file in any sub-directory at non FAT32 cfg. (Tiny-FatFs) + + May 05, 2007 R0.04b Added _USE_NTFLAG option. + Added FSInfo support. + Fixed some problems corresponds to FAT32. (Tiny-FatFs) + Fixed DBCS name can result FR_INVALID_NAME. + Fixed short seek (0 < ofs <= csize) collapses the file object. + + Aug 25, 2007 R0.05 Changed arguments of f_read, f_write. + Changed arguments of f_mkfs. (FatFs) + Fixed f_mkfs on FAT32 creates incorrect FSInfo. (FatFs) + Fixed f_mkdir on FAT32 creates incorrect directory. (FatFs) + + Feb 03, 2008 R0.05a Added f_truncate(). + Added f_utime(). + Fixed off by one error at FAT sub-type determination. + Fixed btr in f_read() can be mistruncated. + Fixed cached sector is not flushed when create and close without write. + + Apr 01, 2008 R0.06 Added f_forward(). (Tiny-FatFs) + Added string functions: fputc(), fputs(), fprintf() and fgets(). + Improved performance of f_lseek() on move to the same or following cluster. + + Apr 01, 2009, R0.07 Merged Tiny-FatFs as a buffer configuration option. + Added long file name support. + Added multiple code page support. + Added re-entrancy for multitask operation. + Added auto cluster size selection to f_mkfs(). + Added rewind option to f_readdir(). + Changed result code of critical errors. + Renamed string functions to avoid name collision. + + Apr 14, 2009, R0.07a Separated out OS dependent code on reentrant cfg. + Added multiple sector size support. + + Jun 21, 2009, R0.07c Fixed f_unlink() may return FR_OK on error. + Fixed wrong cache control in f_lseek(). + Added relative path feature. + Added f_chdir(). + Added f_chdrive(). + Added proper case conversion to extended char. + diff --git a/src/ersky9x/libraries/fat/fatfs/src/diskio.c b/src/ersky9x/libraries/fat/fatfs/src/diskio.c new file mode 100644 index 000000000..930bcda97 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/diskio.c @@ -0,0 +1,371 @@ +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */ +/*-----------------------------------------------------------------------*/ +/* This is a stub disk I/O module that acts as front end of the existing */ +/* disk I/O modules and attach it to FatFs module with common interface. */ +/*-----------------------------------------------------------------------*/ + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include "integer.h" +#include "fatfs_config.h" + +//------------------------------------------------------------------------------ +// Internal variables +//------------------------------------------------------------------------------ + +/*-----------------------------------------------------------------------*/ +/* Initialize a Drive */ +/*-----------------------------------------------------------------------*/ + + +DSTATUS disk_initialize ( + BYTE drv /* Physical drive number (0..) */ +) +{ + DSTATUS stat = STA_NOINIT; + + switch (drv) { + case DRV_SDRAM : + stat = 0; + break; + + case DRV_MMC : + stat = 0; + break; + + case DRV_NAND: + stat = 0; + break; + } + + return stat; +} + +/*-----------------------------------------------------------------------*/ +/* Return Disk Status */ +/*-----------------------------------------------------------------------*/ + +DSTATUS disk_status ( + BYTE drv /* Physical drive number (0..) */ +) +{ + DSTATUS stat=STA_NOINIT; + + switch (drv) { + case DRV_SDRAM : + stat = 0; // ok + break; + + case DRV_MMC : + stat = 0; // ok + break; + case DRV_NAND: + stat = 0; + break; + } + + return stat; +} + +/*-----------------------------------------------------------------------*/ +/* Read Sector(s) */ +/*-----------------------------------------------------------------------*/ + +DRESULT disk_read ( + BYTE drv, /* Physical drive number (0..) */ + BYTE *buff, /* Data buffer to store read data */ + DWORD sector, /* Sector number (LBA) */ + BYTE count /* Sector count (1..255) */ +) +{ + unsigned char result; + DRESULT res = RES_ERROR; + + unsigned int addr, len; + RtMedia *pRtMedia; + Media *pMedia; + + if (drv == DRV_NAND) + pRtMedia = &(gRtNandMedias); + else { + TRACE_ERROR("disk_read: Unknown drive\n\r"); + return RES_ERROR; + } + + pMedia = &(pRtMedia->media); + + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) { + addr = sector * (SECTOR_SIZE_DEFAULT / pMedia->blockSize); + len = count * (SECTOR_SIZE_DEFAULT / pMedia->blockSize); + } + else { + addr = sector; + len = count; + } + + result = RTMEDIA_Read(pRtMedia, + addr, // address + (void*)buff, // data + len, // data size + NULL, + NULL); + + if( result == MED_STATUS_SUCCESS ) { + res = RES_OK; + } + else { + TRACE_ERROR("RTMEDIA_Read pb: 0x%X\n\r", result); + res = RES_ERROR; + } + + return res; +} + +/*-----------------------------------------------------------------------*/ +/* Write Sector(s) */ +/*-----------------------------------------------------------------------*/ + +#if _READONLY == 0 + +DRESULT disk_write ( + BYTE drv, /* Physical drive number (0..) */ + const BYTE *buff, /* Data to be written */ + DWORD sector, /* Sector number (LBA) */ + BYTE count /* Sector count (1..255) */ +) +{ + DRESULT res=RES_PARERR; + unsigned int result; + void * tmp; + tmp = (void *) buff; + RtMedia *pRtMedia; + Media *pMedia; + unsigned int addr, len; + + if (drv == DRV_NAND) + pRtMedia = &(gRtNandMedias); + else { + TRACE_ERROR("disk_read: Unknown drive\n\r"); + return RES_ERROR; + } + + pMedia = &(pRtMedia->media); + + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) { + addr = sector * (SECTOR_SIZE_DEFAULT / pMedia->blockSize); + len = count * (SECTOR_SIZE_DEFAULT / pMedia->blockSize); + } + else { + addr = sector; + len = count; + } + + result = RTMEDIA_Write(pRtMedia, + addr, // address + (void*)tmp, // data + len, // data size + NULL, + NULL); + + if( result == MED_STATUS_SUCCESS ) { + + res = RES_OK; + } + else { + + TRACE_ERROR("RTMEDIA_Write pb: 0x%X\n\r", result); + res = RES_ERROR; + } + + return res; +} +#endif /* _READONLY */ + +/*-----------------------------------------------------------------------*/ +/* Miscellaneous Functions */ +// Command Description +// +//CTRL_SYNC Make sure that the disk drive has finished pending write process. +// When the disk I/O module has a write back cache, flush the dirty sector immediately. +// In read-only configuration, this command is not needed. +// +//GET_SECTOR_COUNT Returns total sectors on the drive into the DWORD variable pointed by Buffer. +// This command is used in only f_mkfs function. +// +//GET_BLOCK_SIZE Returns erase block size of the memory array in unit +// of sector into the DWORD variable pointed by Buffer. +// When the erase block size is unknown or magnetic disk device, return 1. +// This command is used in only f_mkfs function. +/*-----------------------------------------------------------------------*/ + +DRESULT disk_ioctl ( + BYTE drv, /* Physical drive number (0..) */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive control data */ +) +{ + DRESULT res=RES_PARERR; + RtMedia *pRtMedia; + Media *pMedia; + + if (drv == DRV_NAND) + pRtMedia = &(gRtNandMedias); + else { + TRACE_ERROR("disk_read: Unknown drive\n\r"); + return RES_ERROR; + } + + pMedia = &(pRtMedia->media); + + switch (drv) { + case DRV_SDRAM : + switch (ctrl) { + + case GET_BLOCK_SIZE: + *(WORD*)buff = 1; + res = RES_OK; + break; + + case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ + //*(DWORD*)buff = (DWORD)(medias[DRV_SDRAM].size); + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) + *(DWORD*)buff = (DWORD)(pMedia->size / + (SECTOR_SIZE_DEFAULT / + pMedia->blockSize)); + else + *(DWORD*)buff = (DWORD)(pMedia->size); + + res = RES_OK; + break; + + case GET_SECTOR_SIZE : /* Get sectors on the disk (WORD) */ + //*(WORD*)buff = medias[DRV_SDRAM].blockSize; + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) + *(WORD*)buff = SECTOR_SIZE_DEFAULT; + else + *(WORD*)buff = pMedia->blockSize; + res = RES_OK; + break; + + case CTRL_SYNC : /* Make sure that data has been written */ + res = RES_OK; + break; + + default: + res = RES_PARERR; + } + break; + + case DRV_MMC : + switch (ctrl) { + + case GET_BLOCK_SIZE: + *(WORD*)buff = 1; + res = RES_OK; + break; + + case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ + //*(DWORD*)buff = (DWORD)(medias[DRV_MMC].size); + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) + *(DWORD*)buff = (DWORD)(pMedia->size / + (SECTOR_SIZE_DEFAULT / + pMedia->blockSize)); + else + *(DWORD*)buff = (DWORD)(pMedia->size); + res = RES_OK; + break; + + case GET_SECTOR_SIZE : /* Get sectors on the disk (WORD) */ + //*(WORD*)buff = medias[DRV_MMC].blockSize; + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) + *(WORD*)buff = SECTOR_SIZE_DEFAULT; + else + *(WORD*)buff = pMedia->blockSize; + res = RES_OK; + break; + + case CTRL_SYNC : /* Make sure that data has been written */ + res = RES_OK; + break; + + default: + res = RES_PARERR; + } + break; + + case DRV_NAND : + switch (ctrl) { + + case GET_BLOCK_SIZE: + *(WORD*)buff = 1; + res = RES_OK; + break; + + case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */ + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) + *(DWORD*)buff = (DWORD)(pMedia->size / + (SECTOR_SIZE_DEFAULT / + pMedia->blockSize)); + else + *(DWORD*)buff = (DWORD)(pMedia->size); + res = RES_OK; + break; + + case GET_SECTOR_SIZE : /* Get sectors on the disk (WORD) */ + //*(WORD*)buff = medias[DRV_MMC].blockSize; + if (pMedia->blockSize < SECTOR_SIZE_DEFAULT) + *(WORD*)buff = SECTOR_SIZE_DEFAULT; + else + *(WORD*)buff = pMedia->blockSize; + res = RES_OK; + break; + + case CTRL_SYNC : /* Make sure that data has been written */ + MED_Flush(pMedia); + res = RES_OK; + break; + + default: + res = RES_PARERR; + } + + } + + return res; +} + +//------------------------------------------------------------------------------ +/// Currnet time is returned with packed into a DWORD value. +/// The bit field is as follows: +/// bit31:25 Year from 1980 (0..127) +/// bit24:21 Month (1..12) +/// bit20:16 Day in month(1..31) +/// bit15:11 Hour (0..23) +/// bit10:5 Minute (0..59) +/// bit4:0 Second / 2 (0..29) +//------------------------------------------------------------------------------ +DWORD get_fattime (void) +{ + unsigned int time; + + time = ((2009-1980)<<25) + | ( 9<<21) + | (15<<16) + | (17<<11) + | (45<<5) + | ((59/2)<<0); + + return time; +} + + + diff --git a/src/ersky9x/libraries/fat/fatfs/src/diskio.h b/src/ersky9x/libraries/fat/fatfs/src/diskio.h new file mode 100644 index 000000000..1be5e7b88 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/diskio.h @@ -0,0 +1,70 @@ +/*----------------------------------------------------------------------- +/ Low level disk interface modlue include file R0.07 (C)ChaN, 2009 +/-----------------------------------------------------------------------*/ + +#ifndef _DISKIO + +#define _READONLY 0 /* 1: Read-only mode */ +#define _USE_IOCTL 1 + +#include "integer.h" + + +/* Status of Disk Functions */ +typedef BYTE DSTATUS; + +/* Results of Disk Functions */ +typedef enum { + RES_OK = 0, /* 0: Successful */ + RES_ERROR, /* 1: R/W Error */ + RES_WRPRT, /* 2: Write Protected */ + RES_NOTRDY, /* 3: Not Ready */ + RES_PARERR /* 4: Invalid Parameter */ +} DRESULT; + + +/*---------------------------------------*/ +/* Prototypes for disk control functions */ + +BOOL assign_drives (int argc, char *argv[]); +DSTATUS disk_initialize (BYTE); +DSTATUS disk_status (BYTE); +DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE); +#if _READONLY == 0 +DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE); +#endif +DRESULT disk_ioctl (BYTE, BYTE, void*); + + + +/* Disk Status Bits (DSTATUS) */ + +#define STA_NOINIT 0x01 /* Drive not initialized */ +#define STA_NODISK 0x02 /* No medium in the drive */ +#define STA_PROTECT 0x04 /* Write protected */ + + +/* Command code for disk_ioctrl() */ + +/* Generic command */ +#define CTRL_SYNC 0 /* Mandatory for write functions */ +#define GET_SECTOR_COUNT 1 /* Mandatory for only f_mkfs() */ +#define GET_SECTOR_SIZE 2 +#define GET_BLOCK_SIZE 3 /* Mandatory for only f_mkfs() */ +#define CTRL_POWER 4 +#define CTRL_LOCK 5 +#define CTRL_EJECT 6 +/* MMC/SDC command */ +#define MMC_GET_TYPE 10 +#define MMC_GET_CSD 11 +#define MMC_GET_CID 12 +#define MMC_GET_OCR 13 +#define MMC_GET_SDSTAT 14 +/* ATA/CF command */ +#define ATA_GET_REV 20 +#define ATA_GET_MODEL 21 +#define ATA_GET_SN 22 + + +#define _DISKIO +#endif diff --git a/src/ersky9x/libraries/fat/fatfs/src/ff.c b/src/ersky9x/libraries/fat/fatfs/src/ff.c new file mode 100644 index 000000000..82ab87680 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/ff.c @@ -0,0 +1,3139 @@ +/*----------------------------------------------------------------------------/ +/ FatFs - FAT file system module R0.07c (C)ChaN, 2009 +/-----------------------------------------------------------------------------/ +/ FatFs module is an open source software to implement FAT file system to +/ small embedded systems. This is a free software and is opened for education, +/ research and commercial use under license policy of following trems. +/ +/ Copyright (C) 2009, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +/ +/-----------------------------------------------------------------------------/ +/ Feb 26,'06 R0.00 Prototype. +/ +/ Apr 29,'06 R0.01 First stable version. +/ +/ Jun 01,'06 R0.02 Added FAT12 support. +/ Removed unbuffered mode. +/ Fixed a problem on small (<32M) patition. +/ Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM). +/ +/ Sep 22,'06 R0.03 Added f_rename(). +/ Changed option _FS_MINIMUM to _FS_MINIMIZE. +/ Dec 11,'06 R0.03a Improved cluster scan algolithm to write files fast. +/ Fixed f_mkdir() creates incorrect directory on FAT32. +/ +/ Feb 04,'07 R0.04 Supported multiple drive system. +/ Changed some interfaces for multiple drive system. +/ Changed f_mountdrv() to f_mount(). +/ Added f_mkfs(). +/ Apr 01,'07 R0.04a Supported multiple partitions on a plysical drive. +/ Added a capability of extending file size to f_lseek(). +/ Added minimization level 3. +/ Fixed an endian sensitive code in f_mkfs(). +/ May 05,'07 R0.04b Added a configuration option _USE_NTFLAG. +/ Added FSInfo support. +/ Fixed DBCS name can result FR_INVALID_NAME. +/ Fixed short seek (<= csize) collapses the file object. +/ +/ Aug 25,'07 R0.05 Changed arguments of f_read(), f_write() and f_mkfs(). +/ Fixed f_mkfs() on FAT32 creates incorrect FSInfo. +/ Fixed f_mkdir() on FAT32 creates incorrect directory. +/ Feb 03,'08 R0.05a Added f_truncate() and f_utime(). +/ Fixed off by one error at FAT sub-type determination. +/ Fixed btr in f_read() can be mistruncated. +/ Fixed cached sector is not flushed when create and close +/ without write. +/ +/ Apr 01,'08 R0.06 Added fputc(), fputs(), fprintf() and fgets(). +/ Improved performance of f_lseek() on moving to the same +/ or following cluster. +/ +/ Apr 01,'09 R0.07 Merged Tiny-FatFs as a buffer configuration option. +/ Added long file name support. +/ Added multiple code page support. +/ Added re-entrancy for multitask operation. +/ Added auto cluster size selection to f_mkfs(). +/ Added rewind option to f_readdir(). +/ Changed result code of critical errors. +/ Renamed string functions to avoid name collision. +/ Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg. +/ Added multiple sector size support. +/ Jun 21,'09 R0.07c Fixed f_unlink() may return FR_OK on error. +/ Fixed wrong cache control in f_lseek(). +/ Added relative path feature. +/ Added f_chdir() and f_chdrive(). +/ Added proper case conversion to extended char. +/---------------------------------------------------------------------------*/ + +#include "ff.h" /* FatFs configurations and declarations */ +#include "diskio.h" /* Declarations of low level disk I/O functions */ + +/*-------------------------------------------------------------------------- + + Module Private Definitions + +---------------------------------------------------------------------------*/ + +#if _FS_REENTRANT +#if _USE_LFN == 1 +#error Static LFN work area must not be used in re-entrant configuration. +#endif +#define ENTER_FF(fs) { if (!lock_fs(fs)) return FR_TIMEOUT; } +#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; } + +#else +#define ENTER_FF(fs) +#define LEAVE_FF(fs, res) return res + +#endif + +#define ABORT(fs, res) { fp->flag |= FA__ERROR; LEAVE_FF(fs, res); } + +#ifndef NULL +#define NULL 0 +#endif + +/* Name status flags */ +#define NS_LOSS 0x01 /* Lossy conversion */ +#define NS_LFN 0x02 /* Force to create LFN entry */ +#define NS_LAST 0x04 /* Last segment */ +#define NS_BODY 0x08 /* Lower case flag (body) */ +#define NS_EXT 0x10 /* Lower case flag (ext) */ +#define NS_DOT 0x20 /* Dot entry */ + + + + +/*-------------------------------------------------------------------------- + + Private Work Area + +---------------------------------------------------------------------------*/ + +static +FATFS *FatFs[_DRIVES]; /* Pointer to the file system objects (logical drives) */ + +static +WORD Fsid; /* File system mount ID */ + +#if _FS_RPATH +static +BYTE Drive; /* Current drive */ +#endif + + +#if _USE_LFN == 1 /* LFN with static LFN working buffer */ +static +WORD LfnBuf[_MAX_LFN + 1]; +#define NAMEBUF(sp,lp) BYTE sp[12]; WCHAR *lp = LfnBuf +#define INITBUF(dj,sp,lp) dj.fn = sp; dj.lfn = lp + +#elif _USE_LFN > 1 /* LFN with dynamic LFN working buffer */ +#define NAMEBUF(sp,lp) BYTE sp[12]; WCHAR lbuf[_MAX_LFN + 1], *lp = lbuf +#define INITBUF(dj,sp,lp) dj.fn = sp; dj.lfn = lp + +#else /* No LFN */ +#define NAMEBUF(sp,lp) BYTE sp[12] +#define INITBUF(dj,sp,lp) dj.fn = sp + +#endif + + + + +/*-------------------------------------------------------------------------- + + Private Functions + +---------------------------------------------------------------------------*/ + + +/*-----------------------------------------------------------------------*/ +/* String functions */ +/*-----------------------------------------------------------------------*/ + +/* Copy memory to memory */ +static +void mem_cpy (void* dst, const void* src, int cnt) { + char *d = (char*)dst; + const char *s = (const char *)src; + while (cnt--) *d++ = *s++; +} + +/* Fill memory */ +static +void mem_set (void* dst, int val, int cnt) { + char *d = (char*)dst; + while (cnt--) *d++ = (char)val; +} + +/* Compare memory to memory */ +static +int mem_cmp (const void* dst, const void* src, int cnt) { + const char *d = (const char *)dst, *s = (const char *)src; + int r = 0; + while (cnt-- && (r = *d++ - *s++) == 0) ; + return r; +} + +/* Check if chr is contained in the string */ +static +int chk_chr (const char* str, int chr) { + while (*str && *str != chr) str++; + return *str; +} + + + +/*-----------------------------------------------------------------------*/ +/* Request/Release grant to access the volume */ +/*-----------------------------------------------------------------------*/ +#if _FS_REENTRANT + +static +BOOL lock_fs ( + FATFS *fs /* File system object */ +) +{ + return ff_req_grant(fs->sobj); +} + + +static +void unlock_fs ( + FATFS *fs, /* File system object */ + FRESULT res /* Result code to be returned */ +) +{ + if (res != FR_NOT_ENABLED && + res != FR_INVALID_DRIVE && + res != FR_INVALID_OBJECT && + res != FR_TIMEOUT) { + ff_rel_grant(fs->sobj); + } +} +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Change window offset */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT move_window ( + FATFS *fs, /* File system object */ + DWORD sector /* Sector number to make apperance in the fs->win[] */ +) /* Move to zero only writes back dirty window */ +{ + DWORD wsect; + + + wsect = fs->winsect; + if (wsect != sector) { /* Changed current window */ +#if !_FS_READONLY + if (fs->wflag) { /* Write back dirty window if needed */ + if (disk_write(fs->drive, fs->win, wsect, 1) != RES_OK) + return FR_DISK_ERR; + fs->wflag = 0; + if (wsect < (fs->fatbase + fs->sects_fat)) { /* In FAT area */ + BYTE nf; + for (nf = fs->n_fats; nf > 1; nf--) { /* Refrect the change to all FAT copies */ + wsect += fs->sects_fat; + disk_write(fs->drive, fs->win, wsect, 1); + } + } + } +#endif + if (sector) { + if (disk_read(fs->drive, fs->win, sector, 1) != RES_OK) + return FR_DISK_ERR; + fs->winsect = sector; + } + } + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Clean-up cached data */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT sync ( /* FR_OK: successful, FR_DISK_ERR: failed */ + FATFS *fs /* File system object */ +) +{ + FRESULT res; + + + res = move_window(fs, 0); + if (res == FR_OK) { + /* Update FSInfo sector if needed */ + if (fs->fs_type == FS_FAT32 && fs->fsi_flag) { + fs->winsect = 0; + mem_set(fs->win, 0, 512); + ST_WORD(fs->win+BS_55AA, 0xAA55); + ST_DWORD(fs->win+FSI_LeadSig, 0x41615252); + ST_DWORD(fs->win+FSI_StrucSig, 0x61417272); + ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust); + ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust); + disk_write(fs->drive, fs->win, fs->fsi_sector, 1); + fs->fsi_flag = 0; + } + /* Make sure that no pending write process in the physical drive */ + if (disk_ioctl(fs->drive, CTRL_SYNC, (void*)NULL) != RES_OK) + res = FR_DISK_ERR; + } + + return res; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* FAT access - Read value of a FAT entry */ +/*-----------------------------------------------------------------------*/ + +static +DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Interal error, Else:Cluster status */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to get the link information */ +) +{ + UINT wc, bc; + DWORD fsect; + + + if (clst < 2 || clst >= fs->max_clust) /* Range check */ + return 1; + + fsect = fs->fatbase; + switch (fs->fs_type) { + case FS_FAT12 : + bc = clst; bc += bc / 2; + if (move_window(fs, fsect + (bc / SS(fs)))) break; + wc = fs->win[bc & (SS(fs) - 1)]; bc++; + if (move_window(fs, fsect + (bc / SS(fs)))) break; + wc |= (WORD)fs->win[bc & (SS(fs) - 1)] << 8; + return (clst & 1) ? (wc >> 4) : (wc & 0xFFF); + + case FS_FAT16 : + if (move_window(fs, fsect + (clst / (SS(fs) / 2)))) break; + return LD_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)]); + + case FS_FAT32 : + if (move_window(fs, fsect + (clst / (SS(fs) / 4)))) break; + return LD_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF; + } + + return 0xFFFFFFFF; /* An error occured at the disk I/O layer */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* FAT access - Change value of a FAT entry */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT put_fat ( + FATFS *fs, /* File system object */ + DWORD clst, /* Cluster# to be changed in range of 2 to fs->max_clust - 1 */ + DWORD val /* New value to mark the cluster */ +) +{ + UINT bc; + BYTE *p; + DWORD fsect; + FRESULT res; + + + if (clst < 2 || clst >= fs->max_clust) { /* Range check */ + res = FR_INT_ERR; + + } else { + fsect = fs->fatbase; + switch (fs->fs_type) { + case FS_FAT12 : + bc = clst; bc += bc / 2; + res = move_window(fs, fsect + (bc / SS(fs))); + if (res != FR_OK) break; + p = &fs->win[bc & (SS(fs) - 1)]; + *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val; + bc++; + fs->wflag = 1; + res = move_window(fs, fsect + (bc / SS(fs))); + if (res != FR_OK) break; + p = &fs->win[bc & (SS(fs) - 1)]; + *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); + break; + + case FS_FAT16 : + res = move_window(fs, fsect + (clst / (SS(fs) / 2))); + if (res != FR_OK) break; + ST_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)], (WORD)val); + break; + + case FS_FAT32 : + res = move_window(fs, fsect + (clst / (SS(fs) / 4))); + if (res != FR_OK) break; + ST_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)], val); + break; + + default : + res = FR_INT_ERR; + } + fs->wflag = 1; + } + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* FAT handling - Remove a cluster chain */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT remove_chain ( + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to remove a chain from */ +) +{ + FRESULT res; + DWORD nxt; + + + if (clst < 2 || clst >= fs->max_clust) { /* Check the range of cluster# */ + res = FR_INT_ERR; + + } else { + res = FR_OK; + while (clst < fs->max_clust) { /* Not a last link? */ + nxt = get_fat(fs, clst); /* Get cluster status */ + if (nxt == 0) break; /* Empty cluster? */ + if (nxt == 1) { res = FR_INT_ERR; break; } /* Internal error? */ + if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } /* Disk error? */ + res = put_fat(fs, clst, 0); /* Mark the cluster "empty" */ + if (res != FR_OK) break; + if (fs->free_clust != 0xFFFFFFFF) { /* Update FSInfo */ + fs->free_clust++; + fs->fsi_flag = 1; + } + clst = nxt; /* Next cluster */ + } + } + + return res; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* FAT handling - Stretch or Create a cluster chain */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to stretch. 0 means create a new chain. */ +) +{ + DWORD cs, ncl, scl, mcl; + + + mcl = fs->max_clust; + if (clst == 0) { /* Create new chain */ + scl = fs->last_clust; /* Get suggested start point */ + if (scl == 0 || scl >= mcl) scl = 1; + } + else { /* Stretch existing chain */ + cs = get_fat(fs, clst); /* Check the cluster status */ + if (cs < 2) return 1; /* It is an invalid cluster */ + if (cs < mcl) return cs; /* It is already followed by next cluster */ + scl = clst; + } + + ncl = scl; /* Start cluster */ + for (;;) { + ncl++; /* Next cluster */ + if (ncl >= mcl) { /* Wrap around */ + ncl = 2; + if (ncl > scl) return 0; /* No free custer */ + } + cs = get_fat(fs, ncl); /* Get the cluster status */ + if (cs == 0) break; /* Found a free cluster */ + if (cs == 0xFFFFFFFF || cs == 1)/* An error occured */ + return cs; + if (ncl == scl) return 0; /* No free custer */ + } + + if (put_fat(fs, ncl, 0x0FFFFFFF)) /* Mark the new cluster "in use" */ + return 0xFFFFFFFF; + if (clst != 0) { /* Link it to the previous one if needed */ + if (put_fat(fs, clst, ncl)) + return 0xFFFFFFFF; + } + + fs->last_clust = ncl; /* Update FSINFO */ + if (fs->free_clust != 0xFFFFFFFF) { + fs->free_clust--; + fs->fsi_flag = 1; + } + + return ncl; /* Return new cluster number */ +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Get sector# from cluster# */ +/*-----------------------------------------------------------------------*/ + +static +DWORD clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to be converted */ +) +{ + clst -= 2; + if (clst >= (fs->max_clust - 2)) return 0; /* Invalid cluster# */ + return clst * fs->csize + fs->database; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Seek directory index */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_seek ( + DIR *dj, /* Pointer to directory object */ + WORD idx /* Directory index number */ +) +{ + DWORD clst; + WORD ic; + + + dj->index = idx; + clst = dj->sclust; + if (clst == 1 || clst >= dj->fs->max_clust) /* Check start cluster range */ + return FR_INT_ERR; + if (!clst && dj->fs->fs_type == FS_FAT32) /* Replace cluster# 0 with root cluster# if in FAT32 */ + clst = dj->fs->dirbase; + + if (clst == 0) { /* Static table */ + dj->clust = clst; + if (idx >= dj->fs->n_rootdir) /* Index is out of range */ + return FR_INT_ERR; + dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / 32); /* Sector# */ + } + else { /* Dynamic table */ + ic = SS(dj->fs) / 32 * dj->fs->csize; /* Entries per cluster */ + while (idx >= ic) { /* Follow cluster chain */ + clst = get_fat(dj->fs, clst); /* Get next cluster */ + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ + if (clst < 2 || clst >= dj->fs->max_clust) /* Reached to end of table or int error */ + return FR_INT_ERR; + idx -= ic; + } + dj->clust = clst; + dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / 32); /* Sector# */ + } + + dj->dir = dj->fs->win + (idx % (SS(dj->fs) / 32)) * 32; /* Ptr to the entry in the sector */ + + return FR_OK; /* Seek succeeded */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Move directory index next */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_next ( /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not streach */ + DIR *dj, /* Pointer to directory object */ + BOOL streach /* FALSE: Do not streach table, TRUE: Streach table if needed */ +) +{ + DWORD clst; + WORD i; + + + i = dj->index + 1; + if (!i || !dj->sect) /* Report EOT when index has reached 65535 */ + return FR_NO_FILE; + + if (!(i % (SS(dj->fs) / 32))) { /* Sector changed? */ + dj->sect++; /* Next sector */ + + if (dj->clust == 0) { /* Static table */ + if (i >= dj->fs->n_rootdir) /* Report EOT when end of table */ + return FR_NO_FILE; + } + else { /* Dynamic table */ + if (((i / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) { /* Cluster changed? */ + clst = get_fat(dj->fs, dj->clust); /* Get next cluster */ + if (clst <= 1) return FR_INT_ERR; + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; + if (clst >= dj->fs->max_clust) { /* When it reached end of dynamic table */ +#if !_FS_READONLY + BYTE c; + if (!streach) return FR_NO_FILE; /* When do not streach, report EOT */ + clst = create_chain(dj->fs, dj->clust); /* Streach cluster chain */ + if (clst == 0) return FR_DENIED; /* No free cluster */ + if (clst == 1) return FR_INT_ERR; + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; + /* Clean-up streached table */ + if (move_window(dj->fs, 0)) return FR_DISK_ERR; /* Flush active window */ + mem_set(dj->fs->win, 0, SS(dj->fs)); /* Clear window buffer */ + dj->fs->winsect = clust2sect(dj->fs, clst); /* Cluster start sector */ + for (c = 0; c < dj->fs->csize; c++) { /* Fill the new cluster with 0 */ + dj->fs->wflag = 1; + if (move_window(dj->fs, 0)) return FR_DISK_ERR; + dj->fs->winsect++; + } + dj->fs->winsect -= c; /* Rewind window address */ +#else + return FR_NO_FILE; /* Report EOT */ +#endif + } + dj->clust = clst; /* Initialize data for new cluster */ + dj->sect = clust2sect(dj->fs, clst); + } + } + } + + dj->index = i; + dj->dir = dj->fs->win + (i % (SS(dj->fs) / 32)) * 32; + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* LFN handling - Test/Pick/Fit an LFN segment from/to directory entry */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +static +const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* Offset of LFN chars in the directory entry */ + + +static +BOOL cmp_lfn ( /* TRUE:Matched, FALSE:Not matched */ + WCHAR *lfnbuf, /* Pointer to the LFN to be compared */ + BYTE *dir /* Pointer to the directory entry containing a part of LFN */ +) +{ + int i, s; + WCHAR wc; + + + i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13; /* Get offset in the LFN buffer */ + s = 0; + do { + wc = ff_wtoupper(LD_WORD(dir+LfnOfs[s])); /* Get an LFN character */ + if (i >= _MAX_LFN || wc != ff_wtoupper(lfnbuf[i++])) /* Compare it with the reference character */ + return FALSE; + } while (++s < 13 && wc); /* Repeat until all chars in the entry or a NUL char is processed */ + + return TRUE; /* The LFN entry matched */ +} + + + +static +BOOL pick_lfn ( /* TRUE:Succeeded, FALSE:Buffer overflow */ + WCHAR *lfnbuf, /* Pointer to the Unicode-LFN buffer */ + BYTE *dir /* Pointer to the directory entry */ +) +{ + int i, s; + WCHAR wc; + + + i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13; /* Offset in the LFN buffer */ + + s = 0; + do { + if (i >= _MAX_LFN) return FALSE; /* Buffer overflow? */ + wc = LD_WORD(dir+LfnOfs[s]); /* Get an LFN char */ + if (!wc) break; /* End of LFN? */ + lfnbuf[i++] = wc; /* Store it */ + } while (++s < 13); /* Repeat until last char is copied */ + + if (dir[LDIR_Ord] & 0x40) { /* Put terminator if it is the last LFN part */ + if (i >= _MAX_LFN) return FALSE; /* Buffer overflow? */ + lfnbuf[i] = 0; + } + + return TRUE; +} + + +#if !_FS_READONLY +static +void fit_lfn ( + const WCHAR *lfnbuf, /* Pointer to the LFN buffer */ + BYTE *dir, /* Pointer to the directory entry */ + BYTE ord, /* LFN order (1-20) */ + BYTE sum /* SFN sum */ +) +{ + int i, s; + WCHAR wc; + + + dir[LDIR_Chksum] = sum; /* Set check sum */ + dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */ + dir[LDIR_Type] = 0; + ST_WORD(dir+LDIR_FstClusLO, 0); + + i = (ord - 1) * 13; /* Get offset in the LFN buffer */ + s = wc = 0; + do { + if (wc != 0xFFFF) wc = lfnbuf[i++]; /* Get an effective char */ + ST_WORD(dir+LfnOfs[s], wc); /* Put it */ + if (!wc) wc = 0xFFFF; /* Padding chars following last char */ + } while (++s < 13); + if (wc == 0xFFFF || !lfnbuf[i]) ord |= 0x40; /* Bottom LFN part is the start of LFN sequence */ + dir[LDIR_Ord] = ord; /* Set the LFN order */ +} + +#endif +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Create numbered name */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +void gen_numname ( + BYTE *dst, /* Pointer to genartated SFN */ + const BYTE *src, /* Pointer to source SFN to be modified */ + const WCHAR *lfn, /* Pointer to LFN */ + WORD num /* Sequense number */ +) +{ + char ns[8]; + int i, j; + + + mem_cpy(dst, src, 11); + + if (num > 5) { /* On many collisions, generate a hash number instead of sequencial number */ + do num = (num >> 1) + (num << 15) + (WORD)*lfn++; while (*lfn); + } + + /* itoa */ + i = 7; + do { + ns[i--] = (num % 10) + '0'; + num /= 10; + } while (num); + ns[i] = '~'; + + /* Append the number */ + for (j = 0; j < i && dst[j] != ' '; j++) { + if (IsDBCS1(dst[j])) { + if (j == i - 1) break; + j++; + } + } + do { + dst[j++] = (i < 8) ? ns[i++] : ' '; + } while (j < 8); +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Calculate sum of an SFN */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +static +BYTE sum_sfn ( + const BYTE *dir /* Ptr to directory entry */ +) +{ + BYTE sum = 0; + int n = 11; + + do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n); + return sum; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Find an object in the directory */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_find ( + DIR *dj /* Pointer to the directory object linked to the file name */ +) +{ + FRESULT res; + BYTE c, *dir; +#if _USE_LFN + BYTE a, lfen, ord, sum; +#endif + + res = dir_seek(dj, 0); /* Rewind directory object */ + if (res != FR_OK) return res; + +#if _USE_LFN + ord = sum = 0xFF; lfen = *(dj->fn+11) & NS_LOSS; +#endif + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + dir = dj->dir; /* Ptr to the directory entry of current index */ + c = dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ +#if _USE_LFN /* LFN configuration */ + a = dir[DIR_Attr] & AM_MASK; + if (c == 0xE5 || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (dj->lfn) { + if (c & 0x40) { /* Is it start of LFN sequence? */ + sum = dir[LDIR_Chksum]; + c &= 0xBF; ord = c; /* LFN start order */ + dj->lfn_idx = dj->index; + } + /* Check LFN validity. Compare LFN if it is out of 8.3 format */ + ord = (c == ord && sum == dir[LDIR_Chksum] && (!lfen || cmp_lfn(dj->lfn, dir))) ? ord - 1 : 0xFF; + } + } else { /* An SFN entry is found */ + if (ord || sum != sum_sfn(dir)) /* Did not LFN match? */ + dj->lfn_idx = 0xFFFF; + if (lfen) { /* Match LFN if it is out of 8.3 format */ + if (ord == 0) break; + } else { /* Match SFN if LFN is in 8.3 format */ + if (!mem_cmp(dir, dj->fn, 11)) break; + } + ord = 0xFF; + } + } +#else /* Non LFN configuration */ + if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */ + break; +#endif + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK); + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read an object from the directory */ +/*-----------------------------------------------------------------------*/ +#if _FS_MINIMIZE <= 1 +static +FRESULT dir_read ( + DIR *dj /* Pointer to the directory object that pointing the entry to be read */ +) +{ + FRESULT res; + BYTE c, *dir; +#if _USE_LFN + BYTE a, ord = 0xFF, sum = 0xFF; +#endif + + res = FR_NO_FILE; + while (dj->sect) { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + dir = dj->dir; /* Ptr to the directory entry of current index */ + c = dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ +#if _USE_LFN /* LFN configuration */ + a = dir[DIR_Attr] & AM_MASK; + if (c == 0xE5 || (!_FS_RPATH && c == '.') || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (c & 0x40) { /* Is it start of LFN sequence? */ + sum = dir[LDIR_Chksum]; + c &= 0xBF; ord = c; + dj->lfn_idx = dj->index; + } + /* Check LFN validity and capture it */ + ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF; + } else { /* An SFN entry is found */ + if (ord || sum != sum_sfn(dir)) /* Is there a valid LFN entry? */ + dj->lfn_idx = 0xFFFF; /* No LFN. */ + break; + } + } +#else /* Non LFN configuration */ + if (c != 0xE5 && (_FS_RPATH || c != '.') && !(dir[DIR_Attr] & AM_VOL)) /* Is it a valid entry? */ + break; +#endif + res = dir_next(dj, FALSE); /* Next entry */ + if (res != FR_OK) break; + } + + if (res != FR_OK) dj->sect = 0; + + return res; +} +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Register an object to the directory */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT dir_register ( /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */ + DIR *dj /* Target directory with object name to be created */ +) +{ + FRESULT res; + BYTE c, *dir; +#if _USE_LFN /* LFN configuration */ + WORD n, ne, is; + BYTE sn[12], *fn, sum; + WCHAR *lfn; + + + fn = dj->fn; lfn = dj->lfn; + mem_cpy(sn, fn, 12); + + if (_FS_RPATH && (sn[11] & NS_DOT)) return FR_INVALID_NAME; /* Cannot create dot entry */ + + if (sn[11] & NS_LOSS) { /* When LFN is out of 8.3 format, generate a numbered name */ + fn[11] = 0; dj->lfn = NULL; /* Find only SFN */ + for (n = 1; n < 100; n++) { + gen_numname(fn, sn, lfn, n); /* Generate a numbered name */ + res = dir_find(dj); /* Check if the name collides with existing SFN */ + if (res != FR_OK) break; + } + if (n == 100) return FR_DENIED; /* Abort if too many collisions */ + if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */ + fn[11] = sn[11]; dj->lfn = lfn; + } + + if (sn[11] & NS_LFN) { /* When LFN is to be created, reserve reserve an SFN + LFN entries. */ + for (ne = 0; lfn[ne]; ne++) ; + ne = (ne + 25) / 13; + } else { /* Otherwise reserve only an SFN entry. */ + ne = 1; + } + + /* Reserve contiguous entries */ + res = dir_seek(dj, 0); + if (res != FR_OK) return res; + n = is = 0; + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + c = *dj->dir; /* Check the entry status */ + if (c == 0xE5 || c == 0) { /* Is it a blank entry? */ + if (n == 0) is = dj->index; /* First index of the contigulus entry */ + if (++n == ne) break; /* A contiguous entry that requiered count is found */ + } else { + n = 0; /* Not a blank entry. Restart to search */ + } + res = dir_next(dj, TRUE); /* Next entry with table streach */ + } while (res == FR_OK); + + if (res == FR_OK && ne > 1) { /* Initialize LFN entry if needed */ + res = dir_seek(dj, is); + if (res == FR_OK) { + sum = sum_sfn(dj->fn); /* Sum of the SFN tied to the LFN */ + ne--; + do { /* Store LFN entries in bottom first */ + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + fit_lfn(dj->lfn, dj->dir, (BYTE)ne, sum); + dj->fs->wflag = 1; + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK && --ne); + } + } + +#else /* Non LFN configuration */ + res = dir_seek(dj, 0); + if (res == FR_OK) { + do { /* Find a blank entry for the SFN */ + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + c = *dj->dir; + if (c == 0xE5 || c == 0) break; /* Is it a blank entry? */ + res = dir_next(dj, TRUE); /* Next entry with table streach */ + } while (res == FR_OK); + } +#endif + + if (res == FR_OK) { /* Initialize the SFN entry */ + res = move_window(dj->fs, dj->sect); + if (res == FR_OK) { + dir = dj->dir; + mem_set(dir, 0, 32); /* Clean the entry */ + mem_cpy(dir, dj->fn, 11); /* Put SFN */ + dir[DIR_NTres] = *(dj->fn+11) & 0x18; /* Put NT flag */ + dj->fs->wflag = 1; + } + } + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Remove an object from the directory */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY && !_FS_MINIMIZE +static +FRESULT dir_remove ( /* FR_OK: Successful, FR_DISK_ERR: A disk error */ + DIR *dj /* Directory object pointing the entry to be removed */ +) +{ + FRESULT res; +#if _USE_LFN /* LFN configuration */ + WORD i; + + i = dj->index; /* SFN index */ + res = dir_seek(dj, (WORD)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx)); /* Goto the SFN or top of the LFN entries */ + if (res == FR_OK) { + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + *dj->dir = 0xE5; /* Mark the entry "deleted" */ + dj->fs->wflag = 1; + if (dj->index >= i) break; /* When reached SFN, all entries of the object has been deleted. */ + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK); + if (res == FR_NO_FILE) res = FR_INT_ERR; + } + +#else /* Non LFN configuration */ + res = dir_seek(dj, dj->index); + if (res == FR_OK) { + res = move_window(dj->fs, dj->sect); + if (res == FR_OK) { + *dj->dir = 0xE5; /* Mark the entry "deleted" */ + dj->fs->wflag = 1; + } + } +#endif + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Pick a segment and create the object name in directory form */ +/*-----------------------------------------------------------------------*/ + + +static +FRESULT create_name ( + DIR *dj, /* Pointer to the directory object */ + const XCHAR **path /* Pointer to pointer to the segment in the path string */ +) +{ +#ifdef _EXCVT + static const BYTE cvt[] = _EXCVT; +#endif +#if _USE_LFN /* LFN configuration */ + BYTE b, cf; + WCHAR w, *lfn; + int i, ni, si, di; + const XCHAR *p; + + /* Create LFN in Unicode */ + si = di = 0; + p = *path; + lfn = dj->lfn; + for (;;) { + w = p[si++]; /* Get a character */ + if (w < L' ' || w == L'/' || w == L'\\') break; /* Break on end of segment */ + if (di >= _MAX_LFN) /* Reject too long name */ + return FR_INVALID_NAME; +#if !_LFN_UNICODE + w &= 0xFF; + if (IsDBCS1(w)) { /* If it is a DBC 1st byte */ + BYTE c = p[si++]; /* Get 2nd byte */ + if (!IsDBCS2(c)) /* Reject invalid code for DBC */ + return FR_INVALID_NAME; + w = (w << 8) + c; + } + w = ff_convert(w, 1); /* Convert OEM to Unicode */ + if (!w) return FR_INVALID_NAME; /* Reject invalid code */ +#endif + if (w < 0x80 && chk_chr("\"*:<>\?|\x7F", w)) /* Reject unallowable chars for LFN */ + return FR_INVALID_NAME; + lfn[di++] = w; /* Store the Unicode char */ + } + *path = &p[si]; /* Rerurn pointer to the next segment */ + cf = (w < L' ') ? NS_LAST : 0; /* Set last segment flag if end of path */ +#if _FS_RPATH + if ((di == 1 && lfn[di - 1] == L'.') || /* Is this a dot entry? */ + (di == 2 && lfn[di - 1] == L'.' && lfn[di - 2] == L'.')) { + lfn[di] = 0; + for (i = 0; i < 11; i++) + dj->fn[i] = (i < di) ? '.' : ' '; + dj->fn[i] = cf | NS_DOT; /* This is a dot entry */ + return FR_OK; + } +#endif + while (di) { /* Strip trailing spaces and dots */ + w = lfn[di - 1]; + if (w != L' ' && w != L'.') break; + di--; + } + if (!di) return FR_INVALID_NAME; /* Reject null string */ + + lfn[di] = 0; /* LFN is created */ + + /* Create SFN in directory form */ + mem_set(dj->fn, ' ', 11); + for (si = 0; lfn[si] == L' ' || lfn[si] == L'.'; si++) ; /* Strip leading spaces and dots */ + if (si) cf |= NS_LOSS | NS_LFN; + while (di && lfn[di - 1] != '.') di--; /* Find extension (di<=si: no extension) */ + + b = i = 0; ni = 8; + for (;;) { + w = lfn[si++]; /* Get an LFN char */ + if (!w) break; /* Break when enf of the LFN */ + if (w == L' ' || (w == L'.' && si != di)) { /* Remove spaces and dots */ + cf |= NS_LOSS | NS_LFN; continue; + } + + if (i >= ni || si == di) { /* Extension or end of SFN */ + if (ni == 11) { /* Long extension */ + cf |= NS_LOSS | NS_LFN; break; + } + if (si != di) cf |= NS_LOSS | NS_LFN; /* File name is longer than 8 bytes */ + if (si > di) break; /* No extension */ + si = di; i = 8; ni = 11; /* Enter extension section */ + b <<= 2; continue; + } + + if (w >= 0x80) { /* Non ASCII char */ +#ifdef _EXCVT + w = ff_convert(w, 0); /* Unicode -> OEM code */ + if (w) w = cvt[w - 0x80]; /* Convert extend char (SBCS) */ +#else + w = ff_convert(ff_wtoupper(w), 0); /* Unicode (Caps) -> OEM code */ +#endif + cf |= NS_LFN; /* Force create an LFN */ + } + + if (_DF1S && w >= 0x100) { /* Double byte char */ + if (i >= ni - 1) { + cf |= NS_LOSS | NS_LFN; i = ni; continue; + } + dj->fn[i++] = (BYTE)(w >> 8); + } else { /* Single byte char */ + if (!w || chk_chr("+,;[=]", w)) { /* Replace unallowable chars for SFN */ + w = '_'; cf |= NS_LOSS | NS_LFN; /* Lossy conversion */ + } else { + if (IsUpper(w)) { /* Large capital */ + b |= 2; + } else { + if (IsLower(w)) { /* Small capital */ + b |= 1; w -= 0x20; + } + } + } + } + dj->fn[i++] = (BYTE)w; + } + + if (dj->fn[0] == 0xE5) dj->fn[0] = 0x05; /* If the first char collides with 0xE5, replace it with 0x05 */ + + if (ni == 8) b <<= 2; + if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) /* Create LFN entry when there are composite capitals */ + cf |= NS_LFN; + if (!(cf & NS_LFN)) { /* When LFN is in 8.3 format without extended char, NT flags are created */ + if ((b & 0x03) == 0x01) cf |= NS_EXT; /* NT flag (Extension has only small capital) */ + if ((b & 0x0C) == 0x04) cf |= NS_BODY; /* NT flag (Filename has only small capital) */ + } + + dj->fn[11] = cf; /* SFN is created */ + + +#else /* Non-LFN configuration */ + BYTE b, c, d, *sfn; + int ni, si, i; + const char *p; + + /* Create file name in directory form */ + sfn = dj->fn; + mem_set(sfn, ' ', 11); + si = i = b = 0; ni = 8; + p = *path; +#if _FS_RPATH + if (p[si] == '.') { /* Is this a dot entry? */ + for (;;) { + c = p[si++]; + if (c != '.' || si >= 3) break; + sfn[i++] = c; + } + if (c != '/' && c != '\\' && c >= ' ') return FR_INVALID_NAME; + *path = &p[si]; /* Rerurn pointer to the next segment */ + sfn[11] = (c < ' ') ? NS_LAST|NS_DOT : NS_DOT; /* Set last segment flag if end of path */ + return FR_OK; + } +#endif + for (;;) { + c = p[si++]; + if (c < ' ' || c == '/' || c == '\\') break; /* Break on end of segment */ + if (c == '.' || i >= ni) { + if (ni != 8 || c != '.') return FR_INVALID_NAME; + i = 8; ni = 11; + b <<= 2; continue; + } + if (c >= 0x80) { /* Extended char */ +#ifdef _EXCVT + c = cvt[c - 0x80]; /* Convert extend char (SBCS) */ +#else + b |= 3; /* Eliminate NT flag if ext char is exist */ +#if !_DF1S /* ASCII only cfg */ + return FR_INVALID_NAME; +#endif +#endif + } + if (IsDBCS1(c)) { /* If it is DBC 1st byte */ + d = p[si++]; /* Get 2nd byte */ + if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */ + return FR_INVALID_NAME; + sfn[i++] = c; + sfn[i++] = d; + } else { + if (chk_chr(" \"*+,[=]|\x7F", c)) /* Reject unallowable chrs for SFN */ + return FR_INVALID_NAME; + if (IsUpper(c)) { + b |= 2; + } else { + if (IsLower(c)) { + b |= 1; c -= 0x20; + } + } + sfn[i++] = c; + } + } + *path = &p[si]; /* Rerurn pointer to the next segment */ + c = (c < ' ') ? NS_LAST : 0; /* Set last segment flag if end of path */ + + if (!i) return FR_INVALID_NAME; /* Reject null string */ + if (sfn[0] == 0xE5) sfn[0] = 0x05; /* When first char collides with 0xE5, replace it with 0x05 */ + + if (ni == 8) b <<= 2; + if ((b & 0x03) == 0x01) c |= NS_EXT; /* NT flag (Extension has only small capital) */ + if ((b & 0x0C) == 0x04) c |= NS_BODY; /* NT flag (Filename has only small capital) */ + + sfn[11] = c; /* Store NT flag, File name is created */ +#endif + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Get file information from directory entry */ +/*-----------------------------------------------------------------------*/ +#if _FS_MINIMIZE <= 1 +static +void get_fileinfo ( /* No return code */ + DIR *dj, /* Pointer to the directory object */ + FILINFO *fno /* Pointer to store the file information */ +) +{ + int i; + BYTE c, nt, *dir; + char *p; +#if _USE_LFN + XCHAR *tp; +#endif + + + p = fno->fname; + if (dj->sect) { + dir = dj->dir; + nt = dir[DIR_NTres]; /* NT flag */ + for (i = 0; i < 8; i++) { /* Copy name body */ + c = dir[i]; + if (c == ' ') break; + if (c == 0x05) c = 0xE5; + if ((nt & 0x08) && IsUpper(c)) c += 0x20; + *p++ = c; + } + if (dir[8] != ' ') { /* Copy name extension */ + *p++ = '.'; + for (i = 8; i < 11; i++) { + c = dir[i]; + if (c == ' ') break; + if ((nt & 0x10) && IsUpper(c)) c += 0x20; + *p++ = c; + } + } + fno->fattrib = dir[DIR_Attr]; /* Attribute */ + fno->fsize = LD_DWORD(dir+DIR_FileSize); /* Size */ + fno->fdate = LD_WORD(dir+DIR_WrtDate); /* Date */ + fno->ftime = LD_WORD(dir+DIR_WrtTime); /* Time */ + } + *p = 0; + +#if _USE_LFN + tp = fno->lfname; + if (tp) { + WCHAR w, *lfn; + + i = 0; + if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */ + lfn = dj->lfn; + while ((w = *lfn++) != 0) { /* Get an LFN char */ +#if !_LFN_UNICODE + w = ff_convert(w, 0); /* Unicode -> OEM conversion */ + if (!w) { i = 0; break; } /* Could not convert, no LFN */ + if (_DF1S && w >= 0x100) /* Put 1st byte if it is a DBC */ + tp[i++] = (XCHAR)(w >> 8); + if (i >= fno->lfsize - 1) { i = 0; break; } /* Buffer overrun, no LFN */ +#endif + tp[i++] = (XCHAR)w; + } + } + tp[i] = 0; /* Terminator */ + } +#endif +} +#endif /* _FS_MINIMIZE <= 1 */ + + + + +/*-----------------------------------------------------------------------*/ +/* Follow a file path */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ + DIR *dj, /* Directory object to return last directory and found object */ + const XCHAR *path /* Full-path string to find a file or directory */ +) +{ + FRESULT res; + BYTE *dir, last; + + +#if _FS_RPATH + if (*path == '/' || *path == '\\') { /* There is a heading separator */ + path++; dj->sclust = 0; /* Strip it and start from the root dir */ + } else { /* No heading saparator */ + dj->sclust = dj->fs->cdir; /* Start from the current dir */ + } +#else + if (*path == '/' || *path == '\\') /* Strip heading separator if exist */ + path++; + dj->sclust = 0; /* Start from the root dir */ +#endif + + if ((UINT)*path < ' ') { /* Null path means the start directory itself */ + res = dir_seek(dj, 0); + dj->dir = NULL; + + } else { /* Follow path */ + for (;;) { + res = create_name(dj, &path); /* Get a segment */ + if (res != FR_OK) break; + res = dir_find(dj); /* Find it */ + last = *(dj->fn+11) & NS_LAST; + if (res != FR_OK) { /* Could not find the object */ + if (res == FR_NO_FILE && !last) + res = FR_NO_PATH; + break; + } + if (last) break; /* Last segment match. Function completed. */ + dir = dj->dir; /* There is next segment. Follow the sub directory */ + if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */ + res = FR_NO_PATH; break; + } + dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + } + } + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Load boot record and check if it is an FAT boot record */ +/*-----------------------------------------------------------------------*/ + +static +BYTE check_fs ( /* 0:The FAT boot record, 1:Valid boot record but not an FAT, 2:Not a boot record, 3:Error */ + FATFS *fs, /* File system object */ + DWORD sect /* Sector# (lba) to check if it is an FAT boot record or not */ +) +{ + static const char fatstr[] = "FAT"; + + + if (disk_read(fs->drive, fs->win, sect, 1) != RES_OK) /* Load boot record */ + return 3; + if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55) /* Check record signature (always placed at offset 510 even if the sector size is >512) */ + return 2; + + if (!mem_cmp(&fs->win[BS_FilSysType], fatstr, 3)) /* Check FAT signature */ + return 0; + if (!mem_cmp(&fs->win[BS_FilSysType32], fatstr, 3) && !(fs->win[BPB_ExtFlags] & 0x80)) + return 0; + + return 1; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Make sure that the file system is valid */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT auto_mount ( /* FR_OK(0): successful, !=0: any error occured */ + const XCHAR **path, /* Pointer to pointer to the path name (drive number) */ + FATFS **rfs, /* Pointer to pointer to the found file system object */ + BYTE chk_wp /* !=0: Check media write protection for write access */ +) +{ + FRESULT res; + BYTE fmt, *tbl; + UINT vol; + DSTATUS stat; + DWORD bsect, fsize, tsect, mclst; + const XCHAR *p = *path; + FATFS *fs; + + + /* Get logical drive number from the path name */ + vol = p[0] - '0'; /* Is there a drive number? */ + if (vol <= 9 && p[1] == ':') { /* Found a drive number, get and strip it */ + p += 2; *path = p; /* Return pointer to the path name */ + } else { /* No drive number is given */ +#if _FS_RPATH + vol = Drive; /* Use current drive */ +#else + vol = 0; /* Use drive 0 */ +#endif + } + + /* Check if the logical drive is valid or not */ + if (vol >= _DRIVES) /* Is the drive number valid? */ + return FR_INVALID_DRIVE; + *rfs = fs = FatFs[vol]; /* Returen pointer to the corresponding file system object */ + if (!fs) return FR_NOT_ENABLED; /* Is the file system object registered? */ + + ENTER_FF(fs); /* Lock file system */ + + if (fs->fs_type) { /* If the logical drive has been mounted */ + stat = disk_status(fs->drive); + if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized (has not been changed), */ +#if !_FS_READONLY + if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */ + return FR_WRITE_PROTECTED; +#endif + return FR_OK; /* The file system object is valid */ + } + } + + /* The logical drive must be mounted. Following code attempts to mount the volume */ + + fs->fs_type = 0; /* Clear the file system object */ + fs->drive = (BYTE)LD2PD(vol); /* Bind the logical drive and a physical drive */ + stat = disk_initialize(fs->drive); /* Initialize low level disk I/O layer */ + if (stat & STA_NOINIT) /* Check if the drive is ready */ + return FR_NOT_READY; +#if _MAX_SS != 512 /* Get disk sector size if needed */ + if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS) + return FR_NO_FILESYSTEM; +#endif +#if !_FS_READONLY + if (chk_wp && (stat & STA_PROTECT)) /* Check disk write protection if needed */ + return FR_WRITE_PROTECTED; +#endif + /* Search FAT partition on the drive */ + fmt = check_fs(fs, bsect = 0); /* Check sector 0 as an SFD format */ + if (fmt == 1) { /* Not an FAT boot record, it may be patitioned */ + /* Check a partition listed in top of the partition table */ + tbl = &fs->win[MBR_Table + LD2PT(vol) * 16]; /* Partition table */ + if (tbl[4]) { /* Is the partition existing? */ + bsect = LD_DWORD(&tbl[8]); /* Partition offset in LBA */ + fmt = check_fs(fs, bsect); /* Check the partition */ + } + } + if (fmt == 3) return FR_DISK_ERR; + if (fmt || LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs)) /* No valid FAT patition is found */ + return FR_NO_FILESYSTEM; + + /* Initialize the file system object */ + fsize = LD_WORD(fs->win+BPB_FATSz16); /* Number of sectors per FAT */ + if (!fsize) fsize = LD_DWORD(fs->win+BPB_FATSz32); + fs->sects_fat = fsize; + fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FAT copies */ + fsize *= fs->n_fats; /* (Number of sectors in FAT area) */ + fs->fatbase = bsect + LD_WORD(fs->win+BPB_RsvdSecCnt); /* FAT start sector (lba) */ + fs->csize = fs->win[BPB_SecPerClus]; /* Number of sectors per cluster */ + fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt); /* Nmuber of root directory entries */ + tsect = LD_WORD(fs->win+BPB_TotSec16); /* Number of sectors on the file system */ + if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32); + fs->max_clust = mclst = (tsect /* Last cluster# + 1 */ + - LD_WORD(fs->win+BPB_RsvdSecCnt) - fsize - fs->n_rootdir / (SS(fs)/32) + ) / fs->csize + 2; + + fmt = FS_FAT12; /* Determine the FAT sub type */ + if (mclst >= 0xFF7) fmt = FS_FAT16; /* Number of clusters >= 0xFF5 */ + if (mclst >= 0xFFF7) fmt = FS_FAT32; /* Number of clusters >= 0xFFF5 */ + + if (fmt == FS_FAT32) + fs->dirbase = LD_DWORD(fs->win+BPB_RootClus); /* Root directory start cluster */ + else + fs->dirbase = fs->fatbase + fsize; /* Root directory start sector (lba) */ + fs->database = fs->fatbase + fsize + fs->n_rootdir / (SS(fs)/32); /* Data start sector (lba) */ + +#if !_FS_READONLY + /* Initialize allocation information */ + fs->free_clust = 0xFFFFFFFF; + fs->wflag = 0; + /* Get fsinfo if needed */ + if (fmt == FS_FAT32) { + fs->fsi_flag = 0; + fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo); + if (disk_read(fs->drive, fs->win, fs->fsi_sector, 1) == RES_OK && + LD_WORD(fs->win+BS_55AA) == 0xAA55 && + LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 && + LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) { + fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free); + fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count); + } + } +#endif + fs->fs_type = fmt; /* FAT sub-type */ + fs->winsect = 0; /* Invalidate sector cache */ +#if _FS_RPATH + fs->cdir = 0; /* Current directory (root dir) */ +#endif + fs->id = ++Fsid; /* File system mount ID */ + res = FR_OK; + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Check if the file/dir object is valid or not */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT validate ( /* FR_OK(0): The object is valid, !=0: Invalid */ + FATFS *fs, /* Pointer to the file system object */ + WORD id /* Member id of the target object to be checked */ +) +{ + if (!fs || !fs->fs_type || fs->id != id) + return FR_INVALID_OBJECT; + + ENTER_FF(fs); /* Lock file system */ + + if (disk_status(fs->drive) & STA_NOINIT) + return FR_NOT_READY; + + return FR_OK; +} + + + + +/*-------------------------------------------------------------------------- + + Public Functions + +--------------------------------------------------------------------------*/ + + + +/*-----------------------------------------------------------------------*/ +/* Mount/Unmount a Locical Drive */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mount ( + BYTE vol, /* Logical drive number to be mounted/unmounted */ + FATFS *fs /* Pointer to new file system object (NULL for unmount)*/ +) +{ + FATFS *rfs; + + + if (vol >= _DRIVES) /* Check if the drive number is valid */ + return FR_INVALID_DRIVE; + rfs = FatFs[vol]; /* Get current fs object */ + + if (rfs) { +#if _FS_REENTRANT /* Discard sync object of the current volume */ + if (!ff_del_syncobj(rfs->sobj)) return FR_INT_ERR; +#endif + rfs->fs_type = 0; /* Clear old fs object */ + } + + if (fs) { + fs->fs_type = 0; /* Clear new fs object */ +#if _FS_REENTRANT /* Create sync object for the new volume */ + if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR; +#endif + } + FatFs[vol] = fs; /* Register new fs object */ + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Open or Create a File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_open ( + FIL *fp, /* Pointer to the blank file object */ + const XCHAR *path, /* Pointer to the file name */ + BYTE mode /* Access mode and file open mode flags */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + fp->fs = NULL; /* Clear file object */ +#if !_FS_READONLY + mode &= (FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW); + res = auto_mount(&path, &dj.fs, (BYTE)(mode & (FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW))); +#else + mode &= FA_READ; + res = auto_mount(&path, &dj.fs, 0); +#endif + if (res != FR_OK) LEAVE_FF(dj.fs, res); + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + +#if !_FS_READONLY + /* Create or Open a file */ + if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) { + DWORD ps, cl; + + if (res != FR_OK) { /* No file, create new */ + if (res == FR_NO_FILE) /* There is no file to open, create a new entry */ + res = dir_register(&dj); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + mode |= FA_CREATE_ALWAYS; + dir = dj.dir; /* Created entry (SFN entry) */ + } + else { /* Any object is already existing */ + if (mode & FA_CREATE_NEW) /* Cannot create new */ + LEAVE_FF(dj.fs, FR_EXIST); + dir = dj.dir; + if (!dir || (dir[DIR_Attr] & (AM_RDO | AM_DIR))) /* Cannot overwrite it (R/O or DIR) */ + LEAVE_FF(dj.fs, FR_DENIED); + if (mode & FA_CREATE_ALWAYS) { /* Resize it to zero on over write mode */ + cl = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); /* Get start cluster */ + ST_WORD(dir+DIR_FstClusHI, 0); /* cluster = 0 */ + ST_WORD(dir+DIR_FstClusLO, 0); + ST_DWORD(dir+DIR_FileSize, 0); /* size = 0 */ + dj.fs->wflag = 1; + ps = dj.fs->winsect; /* Remove the cluster chain */ + if (cl) { + res = remove_chain(dj.fs, cl); + if (res) LEAVE_FF(dj.fs, res); + dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */ + } + res = move_window(dj.fs, ps); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + } + } + if (mode & FA_CREATE_ALWAYS) { + dir[DIR_Attr] = 0; /* Reset attribute */ + ps = get_fattime(); + ST_DWORD(dir+DIR_CrtTime, ps); /* Created time */ + dj.fs->wflag = 1; + mode |= FA__WRITTEN; /* Set file changed flag */ + } + } + /* Open an existing file */ + else { +#endif /* !_FS_READONLY */ + if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */ + dir = dj.dir; + if (!dir || (dir[DIR_Attr] & AM_DIR)) /* It is a directory */ + LEAVE_FF(dj.fs, FR_NO_FILE); +#if !_FS_READONLY + if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */ + LEAVE_FF(dj.fs, FR_DENIED); + } + fp->dir_sect = dj.fs->winsect; /* Pointer to the directory entry */ + fp->dir_ptr = dj.dir; +#endif + fp->flag = mode; /* File access mode */ + fp->org_clust = /* File start cluster */ + ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + fp->fsize = LD_DWORD(dir+DIR_FileSize); /* File size */ + fp->fptr = 0; fp->csect = 255; /* File pointer */ + fp->dsect = 0; + fp->fs = dj.fs; fp->id = dj.fs->id; /* Owner file system object of the file */ + + LEAVE_FF(dj.fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_read ( + FIL *fp, /* Pointer to the file object */ + void *buff, /* Pointer to data buffer */ + UINT btr, /* Number of bytes to read */ + UINT *br /* Pointer to number of bytes read */ +) +{ + FRESULT res; + DWORD clst, sect, remain; + UINT rcnt, cc; + BYTE *rbuff = buff; + + + *br = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_READ)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + remain = fp->fsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr; /* Repeat until all data transferred */ + rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->org_clust : get_fat(fp->fs, fp->curr_clust); + if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector offset in the cluster */ + } + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect; + cc = btr / SS(fp->fs); /* When remaining bytes >= sector size, */ + if (cc) { /* Read maximum contiguous sectors directly */ + if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */ + cc = fp->fs->csize - fp->csect; + if (disk_read(fp->fs->drive, rbuff, sect, (BYTE)cc) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#if !_FS_READONLY && _FS_MINIMIZE <= 2 +#if _FS_TINY + if (fp->fs->wflag && fp->fs->winsect - sect < cc) /* Replace one of the read sectors with cached data if it contains a dirty sector */ + mem_cpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win, SS(fp->fs)); +#else + if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc) /* Replace one of the read sectors with cached data if it contains a dirty sector */ + mem_cpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf, SS(fp->fs)); +#endif +#endif + fp->csect += (BYTE)cc; /* Next sector address in the cluster */ + rcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ + continue; + } +#if !_FS_TINY +#if !_FS_READONLY + if (fp->flag & FA__DIRTY) { /* Write sector I/O buffer if needed */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= ~FA__DIRTY; + } +#endif + if (fp->dsect != sect) { /* Fill sector buffer with file data */ + if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + } +#endif + fp->dsect = sect; + fp->csect++; /* Next sector address in the cluster */ + } + rcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs)); /* Get partial sector data from sector buffer */ + if (rcnt > btr) rcnt = btr; +#if _FS_TINY + if (move_window(fp->fs, fp->dsect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ +#else + mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ +#endif + } + + LEAVE_FF(fp->fs, FR_OK); +} + + + + +#if !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Write File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_write ( + FIL *fp, /* Pointer to the file object */ + const void *buff, /* Pointer to the data to be written */ + UINT btw, /* Number of bytes to write */ + UINT *bw /* Pointer to number of bytes written */ +) +{ + FRESULT res; + DWORD clst, sect; + UINT wcnt, cc; + const BYTE *wbuff = buff; + + + *bw = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_WRITE)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + if (fp->fsize + btw < fp->fsize) btw = 0; /* File size cannot reach 4GB */ + + for ( ; btw; /* Repeat until all data transferred */ + wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + if (fp->fptr == 0) { /* On the top of the file? */ + clst = fp->org_clust; /* Follow from the origin */ + if (clst == 0) /* When there is no cluster chain, */ + fp->org_clust = clst = create_chain(fp->fs, 0); /* Create a new cluster chain */ + } else { /* Middle or end of the file */ + clst = create_chain(fp->fs, fp->curr_clust); /* Follow or streach cluster chain */ + } + if (clst == 0) break; /* Could not allocate a new cluster (disk full) */ + if (clst == 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector address in the cluster */ + } +#if _FS_TINY + if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0)) /* Write back data buffer prior to following direct transfer */ + ABORT(fp->fs, FR_DISK_ERR); +#else + if (fp->flag & FA__DIRTY) { /* Write back data buffer prior to following direct transfer */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= ~FA__DIRTY; + } +#endif + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect; + cc = btw / SS(fp->fs); /* When remaining bytes >= sector size, */ + if (cc) { /* Write maximum contiguous sectors directly */ + if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */ + cc = fp->fs->csize - fp->csect; + if (disk_write(fp->fs->drive, wbuff, sect, (BYTE)cc) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#if _FS_TINY + if (fp->fs->winsect - sect < cc) { /* Refill sector cache if it gets dirty by the direct write */ + mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs)); + fp->fs->wflag = 0; + } +#else + if (fp->dsect - sect < cc) { /* Refill sector cache if it gets dirty by the direct write */ + mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs)); + fp->flag &= ~FA__DIRTY; + } +#endif + fp->csect += (BYTE)cc; /* Next sector address in the cluster */ + wcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ + continue; + } +#if _FS_TINY + if (fp->fptr >= fp->fsize) { /* Avoid silly buffer filling at growing edge */ + if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR); + fp->fs->winsect = sect; + } +#else + if (fp->dsect != sect) { /* Fill sector buffer with file data */ + if (fp->fptr < fp->fsize && + disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + } +#endif + fp->dsect = sect; + fp->csect++; /* Next sector address in the cluster */ + } + wcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs)); /* Put partial sector into file I/O buffer */ + if (wcnt > btw) wcnt = btw; +#if _FS_TINY + if (move_window(fp->fs, fp->dsect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + mem_cpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ + fp->fs->wflag = 1; +#else + mem_cpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ + fp->flag |= FA__DIRTY; +#endif + } + + if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */ + fp->flag |= FA__WRITTEN; /* Set file changed flag */ + + LEAVE_FF(fp->fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Synchronize the File Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_sync ( + FIL *fp /* Pointer to the file object */ +) +{ + FRESULT res; + DWORD tim; + BYTE *dir; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res == FR_OK) { + if (fp->flag & FA__WRITTEN) { /* Has the file been written? */ +#if !_FS_TINY /* Write-back dirty buffer */ + if (fp->flag & FA__DIRTY) { + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + LEAVE_FF(fp->fs, FR_DISK_ERR); + fp->flag &= ~FA__DIRTY; + } +#endif + /* Update the directory entry */ + res = move_window(fp->fs, fp->dir_sect); + if (res == FR_OK) { + dir = fp->dir_ptr; + dir[DIR_Attr] |= AM_ARC; /* Set archive bit */ + ST_DWORD(dir+DIR_FileSize, fp->fsize); /* Update file size */ + ST_WORD(dir+DIR_FstClusLO, fp->org_clust); /* Update start cluster */ + ST_WORD(dir+DIR_FstClusHI, fp->org_clust >> 16); + tim = get_fattime(); /* Updated time */ + ST_DWORD(dir+DIR_WrtTime, tim); + fp->flag &= ~FA__WRITTEN; + fp->fs->wflag = 1; + res = sync(fp->fs); + } + } + } + + LEAVE_FF(fp->fs, res); +} + +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Close File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_close ( + FIL *fp /* Pointer to the file object to be closed */ +) +{ + FRESULT res; + + +#if _FS_READONLY + res = validate(fp->fs, fp->id); + if (res == FR_OK) fp->fs = NULL; + LEAVE_FF(fp->fs, res); +#else + res = f_sync(fp); + if (res == FR_OK) fp->fs = NULL; + return res; +#endif +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change Current Drive/Directory */ +/*-----------------------------------------------------------------------*/ + +#if _FS_RPATH + +FRESULT f_chdrive ( + BYTE drv /* Drive number */ +) +{ + if (drv >= _DRIVES) return FR_INVALID_DRIVE; + + Drive = drv; + + return FR_OK; +} + + + + +FRESULT f_chdir ( + const XCHAR *path /* Pointer to the directory path */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 0); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { /* Follow completed */ + dir = dj.dir; /* Pointer to the entry */ + if (!dir) { + dj.fs->cdir = 0; /* No entry (root dir) */ + } else { + if (dir[DIR_Attr] & AM_DIR) /* Reached to the dir */ + dj.fs->cdir = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + else + res = FR_NO_PATH; /* Could not reach the dir (it is a file) */ + } + } + if (res == FR_NO_FILE) res = FR_NO_PATH; + } + + LEAVE_FF(dj.fs, res); +} + +#endif + + + +#if _FS_MINIMIZE <= 2 +/*-----------------------------------------------------------------------*/ +/* Seek File R/W Pointer */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_lseek ( + FIL *fp, /* Pointer to the file object */ + DWORD ofs /* File pointer from top of file */ +) +{ + FRESULT res; + DWORD clst, bcs, nsect, ifptr; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (ofs > fp->fsize /* In read-only mode, clip offset with the file size */ +#if !_FS_READONLY + && !(fp->flag & FA_WRITE) +#endif + ) ofs = fp->fsize; + + ifptr = fp->fptr; + fp->fptr = nsect = 0; fp->csect = 255; + if (ofs > 0) { + bcs = (DWORD)fp->fs->csize * SS(fp->fs); /* Cluster size (byte) */ + if (ifptr > 0 && + (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */ + fp->fptr = (ifptr - 1) & ~(bcs - 1); /* start from the current cluster */ + ofs -= fp->fptr; + clst = fp->curr_clust; + } else { /* When seek to back cluster, */ + clst = fp->org_clust; /* start from the first cluster */ +#if !_FS_READONLY + if (clst == 0) { /* If no cluster chain, create a new chain */ + clst = create_chain(fp->fs, 0); + if (clst == 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->org_clust = clst; + } +#endif + fp->curr_clust = clst; + } + if (clst != 0) { + while (ofs > bcs) { /* Cluster following loop */ +#if !_FS_READONLY + if (fp->flag & FA_WRITE) { /* Check if in write mode or not */ + clst = create_chain(fp->fs, clst); /* Force streached if in write mode */ + if (clst == 0) { /* When disk gets full, clip file size */ + ofs = bcs; break; + } + } else +#endif + clst = get_fat(fp->fs, clst); /* Follow cluster chain if not in write mode */ + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + if (clst <= 1 || clst >= fp->fs->max_clust) ABORT(fp->fs, FR_INT_ERR); + fp->curr_clust = clst; + fp->fptr += bcs; + ofs -= bcs; + } + fp->fptr += ofs; + fp->csect = (BYTE)(ofs / SS(fp->fs)); /* Sector offset in the cluster */ + if (ofs % SS(fp->fs)) { + nsect = clust2sect(fp->fs, clst); /* Current sector */ + if (!nsect) ABORT(fp->fs, FR_INT_ERR); + nsect += fp->csect; + fp->csect++; + } + } + } + if (fp->fptr % SS(fp->fs) && nsect != fp->dsect) { +#if !_FS_TINY +#if !_FS_READONLY + if (fp->flag & FA__DIRTY) { /* Write-back dirty buffer if needed */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= ~FA__DIRTY; + } +#endif + if (disk_read(fp->fs->drive, fp->buf, nsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#endif + fp->dsect = nsect; + } +#if !_FS_READONLY + if (fp->fptr > fp->fsize) { /* Set changed flag if the file size is extended */ + fp->fsize = fp->fptr; + fp->flag |= FA__WRITTEN; + } +#endif + + LEAVE_FF(fp->fs, res); +} + + + + +#if _FS_MINIMIZE <= 1 +/*-----------------------------------------------------------------------*/ +/* Create a Directroy Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_opendir ( + DIR *dj, /* Pointer to directory object to create */ + const XCHAR *path /* Pointer to the directory path */ +) +{ + FRESULT res; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj->fs, 0); + if (res == FR_OK) { + INITBUF((*dj), sfn, lfn); + res = follow_path(dj, path); /* Follow the path to the directory */ + if (res == FR_OK) { /* Follow completed */ + dir = dj->dir; + if (dir) { /* It is not the root dir */ + if (dir[DIR_Attr] & AM_DIR) { /* The object is a directory */ + dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + } else { /* The object is not a directory */ + res = FR_NO_PATH; + } + } + if (res == FR_OK) { + dj->id = dj->fs->id; + res = dir_seek(dj, 0); /* Rewind dir */ + } + } + if (res == FR_NO_FILE) res = FR_NO_PATH; + } + + LEAVE_FF(dj->fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read Directory Entry in Sequense */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_readdir ( + DIR *dj, /* Pointer to the open directory object */ + FILINFO *fno /* Pointer to file information to return */ +) +{ + FRESULT res; + NAMEBUF(sfn, lfn); + + + res = validate(dj->fs, dj->id); /* Check validity of the object */ + if (res == FR_OK) { + INITBUF((*dj), sfn, lfn); + if (!fno) { + res = dir_seek(dj, 0); + } else { + res = dir_read(dj); + if (res == FR_NO_FILE) { + dj->sect = 0; + res = FR_OK; + } + if (res == FR_OK) { /* A valid entry is found */ + get_fileinfo(dj, fno); /* Get the object information */ + res = dir_next(dj, FALSE); /* Increment index for next */ + if (res == FR_NO_FILE) { + dj->sect = 0; + res = FR_OK; + } + } + } + } + + LEAVE_FF(dj->fs, res); +} + + + +#if _FS_MINIMIZE == 0 +/*-----------------------------------------------------------------------*/ +/* Get File Status */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_stat ( + const XCHAR *path, /* Pointer to the file path */ + FILINFO *fno /* Pointer to file information to return */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + + + res = auto_mount(&path, &dj.fs, 0); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { /* Follwo completed */ + if (dj.dir) /* Found an object */ + get_fileinfo(&dj, fno); + else /* It is root dir */ + res = FR_INVALID_NAME; + } + } + + LEAVE_FF(dj.fs, res); +} + + + +#if !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Get Number of Free Clusters */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_getfree ( + const XCHAR *path, /* Pointer to the logical drive number (root dir) */ + DWORD *nclst, /* Pointer to the variable to return number of free clusters */ + FATFS **fatfs /* Pointer to pointer to corresponding file system object to return */ +) +{ + FRESULT res; + DWORD n, clst, sect, stat; + UINT i; + BYTE fat, *p; + + + /* Get drive number */ + res = auto_mount(&path, fatfs, 0); + if (res != FR_OK) LEAVE_FF(*fatfs, res); + + /* If number of free cluster is valid, return it without cluster scan. */ + if ((*fatfs)->free_clust <= (*fatfs)->max_clust - 2) { + *nclst = (*fatfs)->free_clust; + LEAVE_FF(*fatfs, FR_OK); + } + + /* Get number of free clusters */ + fat = (*fatfs)->fs_type; + n = 0; + if (fat == FS_FAT12) { + clst = 2; + do { + stat = get_fat(*fatfs, clst); + if (stat == 0xFFFFFFFF) LEAVE_FF(*fatfs, FR_DISK_ERR); + if (stat == 1) LEAVE_FF(*fatfs, FR_INT_ERR); + if (stat == 0) n++; + } while (++clst < (*fatfs)->max_clust); + } else { + clst = (*fatfs)->max_clust; + sect = (*fatfs)->fatbase; + i = 0; p = 0; + do { + if (!i) { + res = move_window(*fatfs, sect++); + if (res != FR_OK) + LEAVE_FF(*fatfs, res); + p = (*fatfs)->win; + i = SS(*fatfs); + } + if (fat == FS_FAT16) { + if (LD_WORD(p) == 0) n++; + p += 2; i -= 2; + } else { + if (LD_DWORD(p) == 0) n++; + p += 4; i -= 4; + } + } while (--clst); + } + (*fatfs)->free_clust = n; + if (fat == FS_FAT32) (*fatfs)->fsi_flag = 1; + *nclst = n; + + LEAVE_FF(*fatfs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Truncate File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_truncate ( + FIL *fp /* Pointer to the file object */ +) +{ + FRESULT res; + DWORD ncl; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_WRITE)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + + if (fp->fsize > fp->fptr) { + fp->fsize = fp->fptr; /* Set file size to current R/W point */ + fp->flag |= FA__WRITTEN; + if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */ + res = remove_chain(fp->fs, fp->org_clust); + fp->org_clust = 0; + } else { /* When truncate a part of the file, remove remaining clusters */ + ncl = get_fat(fp->fs, fp->curr_clust); + res = FR_OK; + if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; + if (ncl == 1) res = FR_INT_ERR; + if (res == FR_OK && ncl < fp->fs->max_clust) { + res = put_fat(fp->fs, fp->curr_clust, 0x0FFFFFFF); + if (res == FR_OK) res = remove_chain(fp->fs, ncl); + } + } + } + if (res != FR_OK) fp->flag |= FA__ERROR; + + LEAVE_FF(fp->fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Delete a File or Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_unlink ( + const XCHAR *path /* Pointer to the file or directory path */ +) +{ + FRESULT res; + DIR dj, sdj; + NAMEBUF(sfn, lfn); + BYTE *dir; + DWORD dclst; + + + res = auto_mount(&path, &dj.fs, 1); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (_FS_RPATH && res == FR_OK && (dj.fn[11] & NS_DOT)) + res = FR_INVALID_NAME; + if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */ + + dir = dj.dir; + if (!dir) /* Is it the root directory? */ + LEAVE_FF(dj.fs, FR_INVALID_NAME); + if (dir[DIR_Attr] & AM_RDO) /* Is it a R/O object? */ + LEAVE_FF(dj.fs, FR_DENIED); + dclst = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + + if (dir[DIR_Attr] & AM_DIR) { /* It is a sub-directory */ + if (dclst < 2) LEAVE_FF(dj.fs, FR_INT_ERR); + mem_cpy(&sdj, &dj, sizeof(DIR)); /* Check if the sub-dir is empty or not */ + sdj.sclust = dclst; + res = dir_seek(&sdj, 0); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + res = dir_read(&sdj); + if (res == FR_OK) res = FR_DENIED; /* Not empty sub-dir */ + if (res != FR_NO_FILE) LEAVE_FF(dj.fs, res); + } + + res = dir_remove(&dj); /* Remove directory entry */ + if (res == FR_OK) { + if (dclst) + res = remove_chain(dj.fs, dclst); /* Remove the cluster chain */ + if (res == FR_OK) res = sync(dj.fs); + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Create a Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mkdir ( + const XCHAR *path /* Pointer to the directory path */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir, n; + DWORD dsect, dclst, pclst, tim; + + + res = auto_mount(&path, &dj.fs, 1); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) res = FR_EXIST; /* Any file or directory is already existing */ + if (_FS_RPATH && res == FR_NO_FILE && (dj.fn[11] & NS_DOT)) + res = FR_INVALID_NAME; + if (res != FR_NO_FILE) /* Any error occured */ + LEAVE_FF(dj.fs, res); + + dclst = create_chain(dj.fs, 0); /* Allocate a new cluster for new directory table */ + res = FR_OK; + if (dclst == 0) res = FR_DENIED; + if (dclst == 1) res = FR_INT_ERR; + if (dclst == 0xFFFFFFFF) res = FR_DISK_ERR; + if (res == FR_OK) + res = move_window(dj.fs, 0); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + dsect = clust2sect(dj.fs, dclst); + + dir = dj.fs->win; /* Initialize the new directory table */ + mem_set(dir, 0, SS(dj.fs)); + mem_set(dir+DIR_Name, ' ', 8+3); /* Create "." entry */ + dir[DIR_Name] = '.'; + dir[DIR_Attr] = AM_DIR; + tim = get_fattime(); + ST_DWORD(dir+DIR_WrtTime, tim); + ST_WORD(dir+DIR_FstClusLO, dclst); + ST_WORD(dir+DIR_FstClusHI, dclst >> 16); + mem_cpy(dir+32, dir, 32); /* Create ".." entry */ + dir[33] = '.'; + pclst = dj.sclust; + if (dj.fs->fs_type == FS_FAT32 && pclst == dj.fs->dirbase) + pclst = 0; + ST_WORD(dir+32+DIR_FstClusLO, pclst); + ST_WORD(dir+32+DIR_FstClusHI, pclst >> 16); + for (n = 0; n < dj.fs->csize; n++) { /* Write dot entries and clear left sectors */ + dj.fs->winsect = dsect++; + dj.fs->wflag = 1; + res = move_window(dj.fs, 0); + if (res) LEAVE_FF(dj.fs, res); + mem_set(dir, 0, SS(dj.fs)); + } + + res = dir_register(&dj); + if (res != FR_OK) { + remove_chain(dj.fs, dclst); + } else { + dir = dj.dir; + dir[DIR_Attr] = AM_DIR; /* Attribute */ + ST_DWORD(dir+DIR_WrtTime, tim); /* Crated time */ + ST_WORD(dir+DIR_FstClusLO, dclst); /* Table start cluster */ + ST_WORD(dir+DIR_FstClusHI, dclst >> 16); + dj.fs->wflag = 1; + res = sync(dj.fs); + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change File Attribute */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_chmod ( + const XCHAR *path, /* Pointer to the file path */ + BYTE value, /* Attribute bits */ + BYTE mask /* Attribute mask to change */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 1); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (_FS_RPATH && res == FR_OK && (dj.fn[11] & NS_DOT)) + res = FR_INVALID_NAME; + if (res == FR_OK) { + dir = dj.dir; + if (!dir) { /* Is it a root directory? */ + res = FR_INVALID_NAME; + } else { /* File or sub directory */ + mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */ + dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */ + dj.fs->wflag = 1; + res = sync(dj.fs); + } + } + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change Timestamp */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_utime ( + const XCHAR *path, /* Pointer to the file/directory name */ + const FILINFO *fno /* Pointer to the timestamp to be set */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 1); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (_FS_RPATH && res == FR_OK && (dj.fn[11] & NS_DOT)) + res = FR_INVALID_NAME; + if (res == FR_OK) { + dir = dj.dir; + if (!dir) { /* Root directory */ + res = FR_INVALID_NAME; + } else { /* File or sub-directory */ + ST_WORD(dir+DIR_WrtTime, fno->ftime); + ST_WORD(dir+DIR_WrtDate, fno->fdate); + dj.fs->wflag = 1; + res = sync(dj.fs); + } + } + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Rename File/Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_rename ( + const XCHAR *path_old, /* Pointer to the old name */ + const XCHAR *path_new /* Pointer to the new name */ +) +{ + FRESULT res; + DIR dj_old, dj_new; + NAMEBUF(sfn, lfn); + BYTE buf[21], *dir; + DWORD dw; + + + INITBUF(dj_old, sfn, lfn); + res = auto_mount(&path_old, &dj_old.fs, 1); + if (res == FR_OK) { + dj_new.fs = dj_old.fs; + res = follow_path(&dj_old, path_old); /* Check old object */ + if (_FS_RPATH && res == FR_OK && (dj_old.fn[11] & NS_DOT)) + res = FR_INVALID_NAME; + } + if (res != FR_OK) LEAVE_FF(dj_old.fs, res); /* The old object is not found */ + + if (!dj_old.dir) LEAVE_FF(dj_old.fs, FR_NO_FILE); /* Is root dir? */ + mem_cpy(buf, dj_old.dir+DIR_Attr, 21); /* Save the object information */ + + mem_cpy(&dj_new, &dj_old, sizeof(DIR)); + res = follow_path(&dj_new, path_new); /* Check new object */ + if (res == FR_OK) res = FR_EXIST; /* The new object name is already existing */ + if (res == FR_NO_FILE) { /* Is it a valid path and no name collision? */ + res = dir_register(&dj_new); /* Register the new object */ + if (res == FR_OK) { + dir = dj_new.dir; /* Copy object information into new entry */ + mem_cpy(dir+13, buf+2, 19); + dir[DIR_Attr] = buf[0] | AM_ARC; + dj_old.fs->wflag = 1; + if (dir[DIR_Attr] & AM_DIR) { /* Update .. entry in the directory if needed */ + dw = clust2sect(dj_new.fs, (DWORD)LD_WORD(dir+DIR_FstClusHI) | LD_WORD(dir+DIR_FstClusLO)); + if (!dw) { + res = FR_INT_ERR; + } else { + res = move_window(dj_new.fs, dw); + dir = dj_new.fs->win+32; + if (res == FR_OK && dir[1] == '.') { + dw = (dj_new.fs->fs_type == FS_FAT32 && dj_new.sclust == dj_new.fs->dirbase) ? 0 : dj_new.sclust; + ST_WORD(dir+DIR_FstClusLO, dw); + ST_WORD(dir+DIR_FstClusHI, dw >> 16); + dj_new.fs->wflag = 1; + } + } + } + if (res == FR_OK) { + res = dir_remove(&dj_old); /* Remove old entry */ + if (res == FR_OK) + res = sync(dj_old.fs); + } + } + } + + LEAVE_FF(dj_old.fs, res); +} + +#endif /* !_FS_READONLY */ +#endif /* _FS_MINIMIZE == 0 */ +#endif /* _FS_MINIMIZE <= 1 */ +#endif /* _FS_MINIMIZE <= 2 */ + + + +/*-----------------------------------------------------------------------*/ +/* Forward data to the stream directly (Available on only _FS_TINY cfg) */ +/*-----------------------------------------------------------------------*/ +#if _USE_FORWARD && _FS_TINY + +FRESULT f_forward ( + FIL *fp, /* Pointer to the file object */ + UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */ + UINT btr, /* Number of bytes to forward */ + UINT *bf /* Pointer to number of bytes forwarded */ +) +{ + FRESULT res; + DWORD remain, clst, sect; + UINT rcnt; + + + *bf = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check error flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_READ)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + + remain = fp->fsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr && (*func)(NULL, 0); /* Repeat until all data transferred or stream becomes busy */ + fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->org_clust : get_fat(fp->fs, fp->curr_clust); + if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector address in the cluster */ + } + fp->csect++; /* Next sector address in the cluster */ + } + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current data sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect - 1; + if (move_window(fp->fs, sect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + fp->dsect = sect; + rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs)); /* Forward data from sector window */ + if (rcnt > btr) rcnt = btr; + rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt); + if (!rcnt) ABORT(fp->fs, FR_INT_ERR); + } + + LEAVE_FF(fp->fs, FR_OK); +} +#endif /* _USE_FORWARD */ + + + +#if _USE_MKFS && !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Create File System on the Drive */ +/*-----------------------------------------------------------------------*/ +#define N_ROOTDIR 512 /* Multiple of 32 and <= 2048 */ +#define N_FATS 1 /* 1 or 2 */ +#define MAX_SECTOR 131072000UL /* Maximum partition size */ +#define MIN_SECTOR 2000UL /* Minimum partition size */ + + +FRESULT f_mkfs ( + BYTE drv, /* Logical drive number */ + BYTE partition, /* Partitioning rule 0:FDISK, 1:SFD */ + WORD allocsize /* Allocation unit size [bytes] */ +) +{ + static const DWORD sstbl[] = { 2048000, 1024000, 512000, 256000, 128000, 64000, 32000, 16000, 8000, 4000, 0 }; + static const WORD cstbl[] = { 32768, 16384, 8192, 4096, 2048, 16384, 8192, 4096, 2048, 1024, 512 }; + BYTE fmt, m, *tbl; + DWORD b_part, b_fat, b_dir, b_data; /* Area offset (LBA) */ + DWORD n_part, n_rsv, n_fat, n_dir; /* Area size */ + DWORD n_clst, d, n; + WORD as; + FATFS *fs; + DSTATUS stat; + + + /* Check validity of the parameters */ + if (drv >= _DRIVES) return FR_INVALID_DRIVE; + if (partition >= 2) return FR_MKFS_ABORTED; + + /* Check mounted drive and clear work area */ + fs = FatFs[drv]; + if (!fs) return FR_NOT_ENABLED; + fs->fs_type = 0; + drv = LD2PD(drv); + + /* Get disk statics */ + stat = disk_initialize(drv); + if (stat & STA_NOINIT) return FR_NOT_READY; + if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; +#if _MAX_SS != 512 /* Get disk sector size */ + if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK + || SS(fs) > _MAX_SS) + return FR_MKFS_ABORTED; +#endif + if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR) + return FR_MKFS_ABORTED; + if (n_part > MAX_SECTOR) n_part = MAX_SECTOR; + b_part = (!partition) ? 63 : 0; /* Boot sector */ + n_part -= b_part; + for (d = 512; d <= 32768U && d != allocsize; d <<= 1) ; /* Check validity of the allocation unit size */ + if (d != allocsize) allocsize = 0; + if (!allocsize) { /* Auto selection of cluster size */ + d = n_part; + for (as = SS(fs); as > 512U; as >>= 1) d >>= 1; + for (n = 0; d < sstbl[n]; n++) ; + allocsize = cstbl[n]; + } + if (allocsize < SS(fs)) allocsize = SS(fs); + + allocsize /= SS(fs); /* Number of sectors per cluster */ + + /* Pre-compute number of clusters and FAT type */ + n_clst = n_part / allocsize; + fmt = FS_FAT12; + if (n_clst >= 0xFF5) fmt = FS_FAT16; + if (n_clst >= 0xFFF5) fmt = FS_FAT32; + + /* Determine offset and size of FAT structure */ + switch (fmt) { + case FS_FAT12: + n_fat = ((n_clst * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs); + n_rsv = 1 + partition; + n_dir = N_ROOTDIR * 32 / SS(fs); + break; + case FS_FAT16: + n_fat = ((n_clst * 2) + 4 + SS(fs) - 1) / SS(fs); + n_rsv = 1 + partition; + n_dir = N_ROOTDIR * 32 / SS(fs); + break; + default: + n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs); + n_rsv = 33 - partition; + n_dir = 0; + } + b_fat = b_part + n_rsv; /* FATs start sector */ + b_dir = b_fat + n_fat * N_FATS; /* Directory start sector */ + b_data = b_dir + n_dir; /* Data start sector */ + + /* Align data start sector to erase block boundary (for flash memory media) */ + if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED; + n = (b_data + n - 1) & ~(n - 1); + n_fat += (n - b_data) / N_FATS; + /* b_dir and b_data are no longer used below */ + + /* Determine number of cluster and final check of validity of the FAT type */ + n_clst = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize; + if ( (fmt == FS_FAT16 && n_clst < 0xFF5) + || (fmt == FS_FAT32 && n_clst < 0xFFF5)) + return FR_MKFS_ABORTED; + + /* Create partition table if needed */ + if (!partition) { + DWORD n_disk = b_part + n_part; + + mem_set(fs->win, 0, SS(fs)); + tbl = fs->win+MBR_Table; + ST_DWORD(tbl, 0x00010180); /* Partition start in CHS */ + if (n_disk < 63UL * 255 * 1024) { /* Partition end in CHS */ + n_disk = n_disk / 63 / 255; + tbl[7] = (BYTE)n_disk; + tbl[6] = (BYTE)((n_disk >> 2) | 63); + } else { + ST_WORD(&tbl[6], 0xFFFF); + } + tbl[5] = 254; + if (fmt != FS_FAT32) /* System ID */ + tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06; + else + tbl[4] = 0x0c; + ST_DWORD(tbl+8, 63); /* Partition start in LBA */ + ST_DWORD(tbl+12, n_part); /* Partition size in LBA */ + ST_WORD(tbl+64, 0xAA55); /* Signature */ + if (disk_write(drv, fs->win, 0, 1) != RES_OK) + return FR_DISK_ERR; + partition = 0xF8; + } else { + partition = 0xF0; + } + + /* Create boot record */ + tbl = fs->win; /* Clear buffer */ + mem_set(tbl, 0, SS(fs)); + ST_DWORD(tbl+BS_jmpBoot, 0x90FEEB); /* Boot code (jmp $, nop) */ + ST_WORD(tbl+BPB_BytsPerSec, SS(fs)); /* Sector size */ + tbl[BPB_SecPerClus] = (BYTE)allocsize; /* Sectors per cluster */ + ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv); /* Reserved sectors */ + tbl[BPB_NumFATs] = N_FATS; /* Number of FATs */ + ST_WORD(tbl+BPB_RootEntCnt, SS(fs) / 32 * n_dir); /* Number of rootdir entries */ + if (n_part < 0x10000) { /* Number of total sectors */ + ST_WORD(tbl+BPB_TotSec16, n_part); + } else { + ST_DWORD(tbl+BPB_TotSec32, n_part); + } + tbl[BPB_Media] = partition; /* Media descripter */ + ST_WORD(tbl+BPB_SecPerTrk, 63); /* Number of sectors per track */ + ST_WORD(tbl+BPB_NumHeads, 255); /* Number of heads */ + ST_DWORD(tbl+BPB_HiddSec, b_part); /* Hidden sectors */ + n = get_fattime(); /* Use current time as a VSN */ + if (fmt != FS_FAT32) { + ST_DWORD(tbl+BS_VolID, n); /* Volume serial number */ + ST_WORD(tbl+BPB_FATSz16, n_fat); /* Number of secters per FAT */ + tbl[BS_DrvNum] = 0x80; /* Drive number */ + tbl[BS_BootSig] = 0x29; /* Extended boot signature */ + mem_cpy(tbl+BS_VolLab, "NO NAME FAT ", 19); /* Volume lavel, FAT signature */ + } else { + ST_DWORD(tbl+BS_VolID32, n); /* Volume serial number */ + ST_DWORD(tbl+BPB_FATSz32, n_fat); /* Number of secters per FAT */ + ST_DWORD(tbl+BPB_RootClus, 2); /* Root directory cluster (2) */ + ST_WORD(tbl+BPB_FSInfo, 1); /* FSInfo record offset (bs+1) */ + ST_WORD(tbl+BPB_BkBootSec, 6); /* Backup boot record offset (bs+6) */ + tbl[BS_DrvNum32] = 0x80; /* Drive number */ + tbl[BS_BootSig32] = 0x29; /* Extended boot signature */ + mem_cpy(tbl+BS_VolLab32, "NO NAME FAT32 ", 19); /* Volume lavel, FAT signature */ + } + ST_WORD(tbl+BS_55AA, 0xAA55); /* Signature */ + if (SS(fs) > 512U) { + ST_WORD(tbl+SS(fs)-2, 0xAA55); + } + if (disk_write(drv, tbl, b_part+0, 1) != RES_OK) + return FR_DISK_ERR; + if (fmt == FS_FAT32) + disk_write(drv, tbl, b_part+6, 1); + + /* Initialize FAT area */ + for (m = 0; m < N_FATS; m++) { + mem_set(tbl, 0, SS(fs)); /* 1st sector of the FAT */ + if (fmt != FS_FAT32) { + n = (fmt == FS_FAT12) ? 0x00FFFF00 : 0xFFFFFF00; + n |= partition; + ST_DWORD(tbl, n); /* Reserve cluster #0-1 (FAT12/16) */ + } else { + ST_DWORD(tbl+0, 0xFFFFFFF8); /* Reserve cluster #0-1 (FAT32) */ + ST_DWORD(tbl+4, 0xFFFFFFFF); + ST_DWORD(tbl+8, 0x0FFFFFFF); /* Reserve cluster #2 for root dir */ + } + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + mem_set(tbl, 0, SS(fs)); /* Following FAT entries are filled by zero */ + for (n = 1; n < n_fat; n++) { + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + } + } + + /* Initialize Root directory */ + m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir); + do { + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + } while (--m); + + /* Create FSInfo record if needed */ + if (fmt == FS_FAT32) { + ST_WORD(tbl+BS_55AA, 0xAA55); + ST_DWORD(tbl+FSI_LeadSig, 0x41615252); + ST_DWORD(tbl+FSI_StrucSig, 0x61417272); + ST_DWORD(tbl+FSI_Free_Count, n_clst - 1); + ST_DWORD(tbl+FSI_Nxt_Free, 0xFFFFFFFF); + disk_write(drv, tbl, b_part+1, 1); + disk_write(drv, tbl, b_part+7, 1); + } + + return (disk_ioctl(drv, CTRL_SYNC, (void*)NULL) == RES_OK) ? FR_OK : FR_DISK_ERR; +} + +#endif /* _USE_MKFS && !_FS_READONLY */ + + + + +#if _USE_STRFUNC +/*-----------------------------------------------------------------------*/ +/* Get a string from the file */ +/*-----------------------------------------------------------------------*/ +char* f_gets ( + char* buff, /* Pointer to the string buffer to read */ + int len, /* Size of string buffer */ + FIL* fil /* Pointer to the file object */ +) +{ + int i = 0; + char *p = buff; + UINT rc; + + + while (i < len - 1) { /* Read bytes until buffer gets filled */ + f_read(fil, p, 1, &rc); + if (rc != 1) break; /* Break when no data to read */ +#if _USE_STRFUNC >= 2 + if (*p == '\r') continue; /* Strip '\r' */ +#endif + i++; + if (*p++ == '\n') break; /* Break when reached end of line */ + } + *p = 0; + return i ? buff : NULL; /* When no data read (eof or error), return with error. */ +} + + + +#if !_FS_READONLY +#include +/*-----------------------------------------------------------------------*/ +/* Put a character to the file */ +/*-----------------------------------------------------------------------*/ +int f_putc ( + int chr, /* A character to be output */ + FIL* fil /* Ponter to the file object */ +) +{ + UINT bw; + char c; + + +#if _USE_STRFUNC >= 2 + if (chr == '\n') f_putc ('\r', fil); /* LF -> CRLF conversion */ +#endif + if (!fil) { /* Special value may be used to switch the destination to any other device */ + /* put_console(chr); */ + return chr; + } + c = (char)chr; + f_write(fil, &c, 1, &bw); /* Write a byte to the file */ + return bw ? chr : EOF; /* Return the result */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a string to the file */ +/*-----------------------------------------------------------------------*/ +int f_puts ( + const char* str, /* Pointer to the string to be output */ + FIL* fil /* Pointer to the file object */ +) +{ + int n; + + + for (n = 0; *str; str++, n++) { + if (f_putc(*str, fil) == EOF) return EOF; + } + return n; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a formatted string to the file */ +/*-----------------------------------------------------------------------*/ +int f_printf ( + FIL* fil, /* Pointer to the file object */ + const char* str, /* Pointer to the format string */ + ... /* Optional arguments... */ +) +{ + va_list arp; + UCHAR c, f, r; + ULONG val; + char s[16]; + int i, w, res, cc; + + + va_start(arp, str); + + for (cc = res = 0; cc != EOF; res += cc) { + c = *str++; + if (c == 0) break; /* End of string */ + if (c != '%') { /* Non escape cahracter */ + cc = f_putc(c, fil); + if (cc != EOF) cc = 1; + continue; + } + w = f = 0; + c = *str++; + if (c == '0') { /* Flag: '0' padding */ + f = 1; c = *str++; + } + while (c >= '0' && c <= '9') { /* Precision */ + w = w * 10 + (c - '0'); + c = *str++; + } + if (c == 'l') { /* Prefix: Size is long int */ + f |= 2; c = *str++; + } + if (c == 's') { /* Type is string */ + cc = f_puts(va_arg(arp, char*), fil); + continue; + } + if (c == 'c') { /* Type is character */ + cc = f_putc(va_arg(arp, int), fil); + if (cc != EOF) cc = 1; + continue; + } + r = 0; + if (c == 'd') r = 10; /* Type is signed decimal */ + if (c == 'u') r = 10; /* Type is unsigned decimal */ + if (c == 'X') r = 16; /* Type is unsigned hexdecimal */ + if (r == 0) break; /* Unknown type */ + if (f & 2) { /* Get the value */ + val = (ULONG)va_arg(arp, long); + } else { + val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int); + } + /* Put numeral string */ + if (c == 'd') { + if (val & 0x80000000) { + val = 0 - val; + f |= 4; + } + } + i = sizeof(s) - 1; s[i] = 0; + do { + c = (UCHAR)(val % r + '0'); + if (c > '9') c += 7; + s[--i] = c; + val /= r; + } while (i && val); + if (i && (f & 4)) s[--i] = '-'; + w = sizeof(s) - 1 - w; + while (i && i > w) s[--i] = (f & 1) ? '0' : ' '; + cc = f_puts(&s[i], fil); + } + + va_end(arp); + return (cc == EOF) ? cc : res; +} + +#endif /* !_FS_READONLY */ +#endif /* _USE_STRFUNC */ diff --git a/src/ersky9x/libraries/fat/fatfs/src/ff.h b/src/ersky9x/libraries/fat/fatfs/src/ff.h new file mode 100644 index 000000000..bd0da6585 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/ff.h @@ -0,0 +1,730 @@ +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module include file R0.07c (C)ChaN, 2009 +/----------------------------------------------------------------------------/ +/ FatFs module is an open source software to implement FAT file system to +/ small embedded systems. This is a free software and is opened for education, +/ research and commercial developments under license policy of following trems. +/ +/ Copyright (C) 2009, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +/----------------------------------------------------------------------------*/ + +#include "integer.h" + +/*---------------------------------------------------------------------------/ +/ FatFs Configuration Options +/ +/ CAUTION! Do not forget to make clean the project after any changes to +/ the configuration options. +/ +/----------------------------------------------------------------------------*/ + +#include "fatfs_config.h" +#define _FATFS 0x007C + +#ifndef _FATFS +#define _FATFS 0x007C + +#define _WORD_ACCESS 0 +/* The _WORD_ACCESS option defines which access method is used to the word +/ data in the FAT structure. +/ +/ 0: Byte-by-byte access. Always compatible with all platforms. +/ 1: Word access. Do not choose this unless following condition is met. +/ +/ When the byte order on the memory is big-endian or address miss-aligned +/ word access results incorrect behavior, the _WORD_ACCESS must be set to 0. +/ If it is not the case, the value can also be set to 1 to improve the +/ performance and code efficiency. */ + + +#define _FS_READONLY 0 +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, +/ f_truncate and useless f_getfree. */ + + +#define _FS_MINIMIZE 0 +/* The _FS_MINIMIZE option defines minimization level to remove some functions. +/ +/ 0: Full function. +/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename +/ are removed. +/ 2: f_opendir and f_readdir are removed in addition to level 1. +/ 3: f_lseek is removed in addition to level 2. */ + + +#define _FS_TINY 0 +/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system +/ object instead of the sector buffer in the individual file object for file +/ data transfer. This reduces memory consumption 512 bytes each file object. */ + + +#define _USE_STRFUNC 0 +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + + +#define _USE_MKFS 0 +/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#define _USE_FORWARD 0 +/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +#define _CODE_PAGE 932 +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ +/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows) +/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows) +/ 949 - Korean (DBCS, OEM, Windows) +/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) +/ 1250 - Central Europe (Windows) +/ 1251 - Cyrillic (Windows) +/ 1252 - Latin 1 (Windows) +/ 1253 - Greek (Windows) +/ 1254 - Turkish (Windows) +/ 1255 - Hebrew (Windows) +/ 1256 - Arabic (Windows) +/ 1257 - Baltic (Windows) +/ 1258 - Vietnam (OEM, Windows) +/ 437 - U.S. (OEM) +/ 720 - Arabic (OEM) +/ 737 - Greek (OEM) +/ 775 - Baltic (OEM) +/ 850 - Multilingual Latin 1 (OEM) +/ 858 - Multilingual Latin 1 + Euro (OEM) +/ 852 - Latin 2 (OEM) +/ 855 - Cyrillic (OEM) +/ 866 - Russian (OEM) +/ 857 - Turkish (OEM) +/ 862 - Hebrew (OEM) +/ 874 - Thai (OEM, Windows) +/ 1 - ASCII (Valid for only non LFN cfg.) +*/ + + +#define _USE_LFN 0 +#define _MAX_LFN 255 /* Maximum LFN length to handle (max:255) */ +/* The _USE_LFN option switches the LFN support. +/ +/ 0: Disable LFN. +/ 1: Enable LFN with static working buffer on the bss. NOT REENTRANT. +/ 2: Enable LFN with dynamic working buffer on the caller's STACK. +/ +/ The working buffer occupies (_MAX_LFN + 1) * 2 bytes. When enable LFN, +/ a Unicode handling functions ff_convert() and ff_wtoupper() must be added +/ to the project. */ + + +#define _FS_RPATH 0 +/* When _FS_RPATH is set to 1, relative path feature is enabled and f_chdir, +/ f_chdrive function are available. +/ Note that output of the f_readdir fnction is affected by this option. */ + + +#define _FS_REENTRANT 1 +#define _TIMEOUT 1000 /* Timeout period in unit of time ticks of the OS */ +#define _SYNC_t HANDLE /* Type of sync object used on the OS. e.g. HANDLE, OS_EVENT*, ID and etc.. */ +/* To make the FatFs module re-entrant, set _FS_REENTRANT to 1 and add user +/ provided synchronization handlers, ff_req_grant, ff_rel_grant, ff_del_syncobj +/ and ff_cre_syncobj function to the project. */ + + +#define _DRIVES 1 +/* Number of volumes (logical drives) to be used. */ + + +#define _MAX_SS 512 +/* Maximum sector size to be handled. (512/1024/2048/4096) */ +/* Usually set 512 for memory card and hard disk but 1024 for floppy disk, 2048 for MO disk */ +/* When _MAX_SS > 512, GET_SECTOR_SIZE must be implememted to disk_ioctl() */ + + +#define _MULTI_PARTITION 0 +/* When _MULTI_PARTITION is set to 0, each volume is bound to the same physical +/ drive number and can mount only first primaly partition. When it is set to 1, +/ each volume is tied to the partitions listed in Drives[]. */ + + + +/* End of configuration options. Do not change followings without care. */ +/*--------------------------------------------------------------------------*/ + + + +/* DBCS code ranges and SBCS extend char conversion table */ + +#if _CODE_PAGE == 932 /* Japanese Shift-JIS */ +#define _DF1S 0x81 /* DBC 1st byte range 1 start */ +#define _DF1E 0x9F /* DBC 1st byte range 1 end */ +#define _DF2S 0xE0 /* DBC 1st byte range 2 start */ +#define _DF2E 0xFC /* DBC 1st byte range 2 end */ +#define _DS1S 0x40 /* DBC 2nd byte range 1 start */ +#define _DS1E 0x7E /* DBC 2nd byte range 1 end */ +#define _DS2S 0x80 /* DBC 2nd byte range 2 start */ +#define _DS2E 0xFC /* DBC 2nd byte range 2 end */ + +#elif _CODE_PAGE == 936 /* Simplified Chinese GBK */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x40 +#define _DS1E 0x7E +#define _DS2S 0x80 +#define _DS2E 0xFE + +#elif _CODE_PAGE == 949 /* Korean */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x41 +#define _DS1E 0x5A +#define _DS2S 0x61 +#define _DS2E 0x7A +#define _DS3S 0x81 +#define _DS3E 0xFE + +#elif _CODE_PAGE == 950 /* Traditional Chinese Big5 */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x40 +#define _DS1E 0x7E +#define _DS2S 0xA1 +#define _DS2E 0xFE + +#elif _CODE_PAGE == 437 /* U.S. (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 720 /* Arabic (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 737 /* Greek (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \ + 0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 775 /* Baltic (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 850 /* Multilingual Latin 1 (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ + 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 852 /* Latin 2 (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \ + 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF} + +#elif _CODE_PAGE == 855 /* Cyrillic (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \ + 0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \ + 0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 857 /* Turkish (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \ + 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 858 /* Multilingual Latin 1 + Euro (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ + 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 862 /* Hebrew (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 866 /* Russian (OEM) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 874 /* Thai (OEM, Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF} + +#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \ + 0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF} + +#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \ + 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F} + +#elif _CODE_PAGE == 1253 /* Greek (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \ + 0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF} + +#elif _CODE_PAGE == 1254 /* Turkish (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \ + 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F} + +#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 1256 /* Arabic (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF} + +#elif _CODE_PAGE == 1257 /* Baltic (Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF} + +#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */ +#define _DF1S 0 +#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \ + 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F} + +#elif _CODE_PAGE == 1 /* ASCII (for only non-LFN cfg) */ +#define _DF1S 0 + +#else +#error Unknown code page + +#endif + + + +/* Character code support macros */ + +#define IsUpper(c) (((c)>='A')&&((c)<='Z')) +#define IsLower(c) (((c)>='a')&&((c)<='z')) +#define IsDigit(c) (((c)>='0')&&((c)<='9')) + +#if _DF1S /* DBCS configuration */ + +#if _DF2S /* Two 1st byte areas */ +#define IsDBCS1(c) (((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E)) +#else /* One 1st byte area */ +#define IsDBCS1(c) ((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) +#endif + +#if _DS3S /* Three 2nd byte areas */ +#define IsDBCS2(c) (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E)) +#else /* Two 2nd byte areas */ +#define IsDBCS2(c) (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E)) +#endif + +#else /* SBCS configuration */ + +#define IsDBCS1(c) 0 +#define IsDBCS2(c) 0 + +#endif /* _DF1S */ + + + +/* Definitions corresponds to multi partition */ + +#if _MULTI_PARTITION /* Multiple partition configuration */ + +typedef struct _PARTITION { + BYTE pd; /* Physical drive# */ + BYTE pt; /* Partition # (0-3) */ +} PARTITION; + +extern +const PARTITION Drives[]; /* Logical drive# to physical location conversion table */ +#define LD2PD(drv) (Drives[drv].pd) /* Get physical drive# */ +#define LD2PT(drv) (Drives[drv].pt) /* Get partition# */ + +#else /* Single partition configuration */ + +#define LD2PD(drv) (drv) /* Physical drive# is equal to the logical drive# */ +#define LD2PT(drv) 0 /* Always mounts the 1st partition */ + +#endif + + + +/* Definitions corresponds to multiple sector size */ + +#if _MAX_SS == 512 +#define SS(fs) 512U + +#elif _MAX_SS == 1024 || _MAX_SS == 2048 || _MAX_SS == 4096 +#define SS(fs) ((fs)->s_size) + +#else +#error Sector size must be 512, 1024, 2048 or 4096. + +#endif + + + +/* Type of file name on FatFs API */ + +#if _LFN_UNICODE && _USE_LFN +typedef WCHAR XCHAR; /* Unicode */ +#else +typedef char XCHAR; /* SBCS, DBCS */ +#endif + + + +/* File system object structure */ + +typedef struct _FATFS_ { + BYTE fs_type; /* FAT sub type */ + BYTE drive; /* Physical drive number */ + BYTE csize; /* Number of sectors per cluster */ + BYTE n_fats; /* Number of FAT copies */ + BYTE wflag; /* win[] dirty flag (1:must be written back) */ + WORD id; /* File system mount ID */ + WORD n_rootdir; /* Number of root directory entries (0 on FAT32) */ +#if _FS_REENTRANT + _SYNC_t sobj; /* Identifier of sync object */ +#endif +#if _MAX_SS != 512 + WORD s_size; /* Sector size */ +#endif +#if !_FS_READONLY + BYTE fsi_flag; /* fsinfo dirty flag (1:must be written back) */ + DWORD last_clust; /* Last allocated cluster */ + DWORD free_clust; /* Number of free clusters */ + DWORD fsi_sector; /* fsinfo sector */ +#endif +#if _FS_RPATH + DWORD cdir; /* Current directory (0:root)*/ +#endif + DWORD sects_fat; /* Sectors per fat */ + DWORD max_clust; /* Maximum cluster# + 1. Number of clusters is max_clust - 2 */ + DWORD fatbase; /* FAT start sector */ + DWORD dirbase; /* Root directory start sector (Cluster# on FAT32) */ + DWORD database; /* Data start sector */ + DWORD winsect; /* Current sector appearing in the win[] */ + BYTE win[_MAX_SS];/* Disk access window for Directory/FAT */ +} FATFS; + + + +/* Directory object structure */ + +typedef struct _DIR_ { + FATFS* fs; /* Pointer to the owner file system object */ + WORD id; /* Owner file system mount ID */ + WORD index; /* Current read/write index number */ + DWORD sclust; /* Table start cluster (0:Static table) */ + DWORD clust; /* Current cluster */ + DWORD sect; /* Current sector */ + BYTE* dir; /* Pointer to the current SFN entry in the win[] */ + BYTE* fn; /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */ +#if _USE_LFN + WCHAR* lfn; /* Pointer to the LFN working buffer */ + WORD lfn_idx; /* Last matched LFN index number (0xFFFF:No LFN) */ +#endif +} DIR; + + + +/* File object structure */ + +typedef struct _FIL_ { + FATFS* fs; /* Pointer to the owner file system object */ + WORD id; /* Owner file system mount ID */ + BYTE flag; /* File status flags */ + BYTE csect; /* Sector address in the cluster */ + DWORD fptr; /* File R/W pointer */ + DWORD fsize; /* File size */ + DWORD org_clust; /* File start cluster */ + DWORD curr_clust; /* Current cluster */ + DWORD dsect; /* Current data sector */ +#if !_FS_READONLY + DWORD dir_sect; /* Sector containing the directory entry */ + BYTE* dir_ptr; /* Ponter to the directory entry in the window */ +#endif +#if !_FS_TINY + BYTE buf[_MAX_SS];/* File R/W buffer */ +#endif +} FIL; + + + +/* File status structure */ + +typedef struct _FILINFO_ { + DWORD fsize; /* File size */ + WORD fdate; /* Last modified date */ + WORD ftime; /* Last modified time */ + BYTE fattrib; /* Attribute */ + char fname[13]; /* Short file name (8.3 format) */ +#if _USE_LFN + XCHAR* lfname; /* Pointer to the LFN buffer */ + int lfsize; /* Size of LFN buffer [chrs] */ +#endif +} FILINFO; + + + +/* File function return code (FRESULT) */ + +typedef enum { + FR_OK = 0, /* 0 */ + FR_DISK_ERR, /* 1 */ + FR_INT_ERR, /* 2 */ + FR_NOT_READY, /* 3 */ + FR_NO_FILE, /* 4 */ + FR_NO_PATH, /* 5 */ + FR_INVALID_NAME, /* 6 */ + FR_DENIED, /* 7 */ + FR_EXIST, /* 8 */ + FR_INVALID_OBJECT, /* 9 */ + FR_WRITE_PROTECTED, /* 10 */ + FR_INVALID_DRIVE, /* 11 */ + FR_NOT_ENABLED, /* 12 */ + FR_NO_FILESYSTEM, /* 13 */ + FR_MKFS_ABORTED, /* 14 */ + FR_TIMEOUT /* 15 */ +} FRESULT; + + + +/*--------------------------------------------------------------*/ +/* FatFs module application interface */ + +FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */ +FRESULT f_open (FIL*, const XCHAR*, BYTE); /* Open or create a file */ +FRESULT f_read (FIL*, void*, UINT, UINT*); /* Read data from a file */ +FRESULT f_write (FIL*, const void*, UINT, UINT*); /* Write data to a file */ +FRESULT f_lseek (FIL*, DWORD); /* Move file pointer of a file object */ +FRESULT f_close (FIL*); /* Close an open file object */ +FRESULT f_opendir (DIR*, const XCHAR*); /* Open an existing directory */ +FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */ +FRESULT f_stat (const XCHAR*, FILINFO*); /* Get file status */ +FRESULT f_getfree (const XCHAR*, DWORD*, FATFS**); /* Get number of free clusters on the drive */ +FRESULT f_truncate (FIL*); /* Truncate file */ +FRESULT f_sync (FIL*); /* Flush cached data of a writing file */ +FRESULT f_unlink (const XCHAR*); /* Delete an existing file or directory */ +FRESULT f_mkdir (const XCHAR*); /* Create a new directory */ +FRESULT f_chmod (const XCHAR*, BYTE, BYTE); /* Change attriburte of the file/dir */ +FRESULT f_utime (const XCHAR*, const FILINFO*); /* Change timestamp of the file/dir */ +FRESULT f_rename (const XCHAR*, const XCHAR*); /* Rename/Move a file or directory */ +FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*); /* Forward data to the stream */ +FRESULT f_mkfs (BYTE, BYTE, WORD); /* Create a file system on the drive */ +FRESULT f_chdir (const XCHAR*); /* Change current directory */ +FRESULT f_chdrive (BYTE); /* Change current drive */ + +#if _USE_STRFUNC +int f_putc (int, FIL*); /* Put a character to the file */ +int f_puts (const char*, FIL*); /* Put a string to the file */ +int f_printf (FIL*, const char*, ...); /* Put a formatted string to the file */ +char* f_gets (char*, int, FIL*); /* Get a string from the file */ +#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0) +#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0) +#ifndef EOF +#define EOF -1 +#endif +#endif + + + +/*--------------------------------------------------------------*/ +/* User defined functions */ + +/* Real time clock */ +#if !_FS_READONLY +DWORD get_fattime (void); /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */ + /* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */ +#endif + +/* Unicode - OEM code conversion */ +#if _USE_LFN +WCHAR ff_convert (WCHAR, UINT); +WCHAR ff_wtoupper (WCHAR); +#endif + +/* Sync functions */ +#if _FS_REENTRANT +BOOL ff_cre_syncobj(BYTE, _SYNC_t*); +BOOL ff_del_syncobj(_SYNC_t); +BOOL ff_req_grant(_SYNC_t); +void ff_rel_grant(_SYNC_t); +#endif + + + +/*--------------------------------------------------------------*/ +/* Flags and offset address */ + + +/* File access control and file status flags (FIL.flag) */ + +#define FA_READ 0x01 +#define FA_OPEN_EXISTING 0x00 +#if _FS_READONLY == 0 +#define FA_WRITE 0x02 +#define FA_CREATE_NEW 0x04 +#define FA_CREATE_ALWAYS 0x08 +#define FA_OPEN_ALWAYS 0x10 +#define FA__WRITTEN 0x20 +#define FA__DIRTY 0x40 +#endif +#define FA__ERROR 0x80 + + +/* FAT sub type (FATFS.fs_type) */ + +#define FS_FAT12 1 +#define FS_FAT16 2 +#define FS_FAT32 3 + + +/* File attribute bits for directory entry */ + +#define AM_RDO 0x01 /* Read only */ +#define AM_HID 0x02 /* Hidden */ +#define AM_SYS 0x04 /* System */ +#define AM_VOL 0x08 /* Volume label */ +#define AM_LFN 0x0F /* LFN entry */ +#define AM_DIR 0x10 /* Directory */ +#define AM_ARC 0x20 /* Archive */ +#define AM_MASK 0x3F /* Mask of defined bits */ + + +/* FatFs refers the members in the FAT structures with byte offset instead +/ of structure member because there are incompatibility of the packing option +/ between various compilers. */ + +#define BS_jmpBoot 0 +#define BS_OEMName 3 +#define BPB_BytsPerSec 11 +#define BPB_SecPerClus 13 +#define BPB_RsvdSecCnt 14 +#define BPB_NumFATs 16 +#define BPB_RootEntCnt 17 +#define BPB_TotSec16 19 +#define BPB_Media 21 +#define BPB_FATSz16 22 +#define BPB_SecPerTrk 24 +#define BPB_NumHeads 26 +#define BPB_HiddSec 28 +#define BPB_TotSec32 32 +#define BS_55AA 510 + +#define BS_DrvNum 36 +#define BS_BootSig 38 +#define BS_VolID 39 +#define BS_VolLab 43 +#define BS_FilSysType 54 + +#define BPB_FATSz32 36 +#define BPB_ExtFlags 40 +#define BPB_FSVer 42 +#define BPB_RootClus 44 +#define BPB_FSInfo 48 +#define BPB_BkBootSec 50 +#define BS_DrvNum32 64 +#define BS_BootSig32 66 +#define BS_VolID32 67 +#define BS_VolLab32 71 +#define BS_FilSysType32 82 + +#define FSI_LeadSig 0 +#define FSI_StrucSig 484 +#define FSI_Free_Count 488 +#define FSI_Nxt_Free 492 + +#define MBR_Table 446 + +#define DIR_Name 0 +#define DIR_Attr 11 +#define DIR_NTres 12 +#define DIR_CrtTime 14 +#define DIR_CrtDate 16 +#define DIR_FstClusHI 20 +#define DIR_WrtTime 22 +#define DIR_WrtDate 24 +#define DIR_FstClusLO 26 +#define DIR_FileSize 28 +#define LDIR_Ord 0 +#define LDIR_Attr 11 +#define LDIR_Type 12 +#define LDIR_Chksum 13 +#define LDIR_FstClusLO 26 + + + +/*--------------------------------*/ +/* Multi-byte word access macros */ + +#if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */ +#define LD_WORD(ptr) (WORD)(*(WORD*)(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr)) +#define ST_WORD(ptr,val) *(WORD*)(BYTE*)(ptr)=(WORD)(val) +#define ST_DWORD(ptr,val) *(DWORD*)(BYTE*)(ptr)=(DWORD)(val) +#else /* Use byte-by-byte access to the FAT structure */ +#define LD_WORD(ptr) (WORD)(((WORD)*(BYTE*)((ptr)+1)<<8)|(WORD)*(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(((DWORD)*(BYTE*)((ptr)+3)<<24)|((DWORD)*(BYTE*)((ptr)+2)<<16)|((WORD)*(BYTE*)((ptr)+1)<<8)|*(BYTE*)(ptr)) +#define ST_WORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8) +#define ST_DWORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24) +#endif + + +#endif /* _FATFS */ diff --git a/src/ersky9x/libraries/fat/fatfs/src/integer.h b/src/ersky9x/libraries/fat/fatfs/src/integer.h new file mode 100644 index 000000000..1d6bac368 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/integer.h @@ -0,0 +1,37 @@ +/*-------------------------------------------*/ +/* Integer type definitions for FatFs module */ +/*-------------------------------------------*/ + +#ifndef _INTEGER + +#if 0 +#include +#else + +/* These types must be 16-bit, 32-bit or larger integer */ +typedef int INT; +typedef unsigned int UINT; + +/* These types must be 8-bit integer */ +typedef signed char CHAR; +typedef unsigned char UCHAR; +typedef unsigned char BYTE; + +/* These types must be 16-bit integer */ +typedef short SHORT; +typedef unsigned short USHORT; +typedef unsigned short WORD; +typedef unsigned short WCHAR; + +/* These types must be 32-bit integer */ +typedef long LONG; +typedef unsigned long ULONG; +typedef unsigned long DWORD; + +/* Boolean type */ +typedef enum { FALSE = 0, TRUE } BOOL; + +#endif + +#define _INTEGER +#endif diff --git a/src/ersky9x/libraries/fat/fatfs/src/option/cc932.c b/src/ersky9x/libraries/fat/fatfs/src/option/cc932.c new file mode 100644 index 000000000..779ef68db --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/option/cc932.c @@ -0,0 +1,3798 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP932 (Japanese Shift-JIS) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + +#define _TINY_TABLE 0 + +#if !_USE_LFN || _CODE_PAGE != 932 +#error This file is not needed in current configuration. +#endif + + +static +const WCHAR uni2sjis[] = { +/* Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, */ + 0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D, + 0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180, + 0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2, + 0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6, + 0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA, + 0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE, + 0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2, + 0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6, + 0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2, + 0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6, + 0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA, + 0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE, + 0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2, + 0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6, + 0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442, + 0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447, + 0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B, + 0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F, + 0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453, + 0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457, + 0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B, + 0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F, + 0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472, + 0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477, + 0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B, + 0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480, + 0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484, + 0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488, + 0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C, + 0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490, + 0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C, + 0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168, + 0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163, + 0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6, + 0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0, + 0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757, + 0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B, + 0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41, + 0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45, + 0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49, + 0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB, + 0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD, + 0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9, + 0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187, + 0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8, + 0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7, + 0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6, + 0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF, + 0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2, + 0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 0x2287, 0x81BB, + 0x22A5, 0x81DB, 0x22BF, 0x8799, 0x2312, 0x81DC, 0x2460, 0x8740, + 0x2461, 0x8741, 0x2462, 0x8742, 0x2463, 0x8743, 0x2464, 0x8744, + 0x2465, 0x8745, 0x2466, 0x8746, 0x2467, 0x8747, 0x2468, 0x8748, + 0x2469, 0x8749, 0x246A, 0x874A, 0x246B, 0x874B, 0x246C, 0x874C, + 0x246D, 0x874D, 0x246E, 0x874E, 0x246F, 0x874F, 0x2470, 0x8750, + 0x2471, 0x8751, 0x2472, 0x8752, 0x2473, 0x8753, 0x2500, 0x849F, + 0x2501, 0x84AA, 0x2502, 0x84A0, 0x2503, 0x84AB, 0x250C, 0x84A1, + 0x250F, 0x84AC, 0x2510, 0x84A2, 0x2513, 0x84AD, 0x2514, 0x84A4, + 0x2517, 0x84AF, 0x2518, 0x84A3, 0x251B, 0x84AE, 0x251C, 0x84A5, + 0x251D, 0x84BA, 0x2520, 0x84B5, 0x2523, 0x84B0, 0x2524, 0x84A7, + 0x2525, 0x84BC, 0x2528, 0x84B7, 0x252B, 0x84B2, 0x252C, 0x84A6, + 0x252F, 0x84B6, 0x2530, 0x84BB, 0x2533, 0x84B1, 0x2534, 0x84A8, + 0x2537, 0x84B8, 0x2538, 0x84BD, 0x253B, 0x84B3, 0x253C, 0x84A9, + 0x253F, 0x84B9, 0x2542, 0x84BE, 0x254B, 0x84B4, 0x25A0, 0x81A1, + 0x25A1, 0x81A0, 0x25B2, 0x81A3, 0x25B3, 0x81A2, 0x25BC, 0x81A5, + 0x25BD, 0x81A4, 0x25C6, 0x819F, 0x25C7, 0x819E, 0x25CB, 0x819B, + 0x25CE, 0x819D, 0x25CF, 0x819C, 0x25EF, 0x81FC, 0x2605, 0x819A, + 0x2606, 0x8199, 0x2640, 0x818A, 0x2642, 0x8189, 0x266A, 0x81F4, + 0x266D, 0x81F3, 0x266F, 0x81F2, 0x3000, 0x8140, 0x3001, 0x8141, + 0x3002, 0x8142, 0x3003, 0x8156, 0x3005, 0x8158, 0x3006, 0x8159, + 0x3007, 0x815A, 0x3008, 0x8171, 0x3009, 0x8172, 0x300A, 0x8173, + 0x300B, 0x8174, 0x300C, 0x8175, 0x300D, 0x8176, 0x300E, 0x8177, + 0x300F, 0x8178, 0x3010, 0x8179, 0x3011, 0x817A, 0x3012, 0x81A7, + 0x3013, 0x81AC, 0x3014, 0x816B, 0x3015, 0x816C, 0x301D, 0x8780, + 0x301F, 0x8781, 0x3041, 0x829F, 0x3042, 0x82A0, 0x3043, 0x82A1, + 0x3044, 0x82A2, 0x3045, 0x82A3, 0x3046, 0x82A4, 0x3047, 0x82A5, + 0x3048, 0x82A6, 0x3049, 0x82A7, 0x304A, 0x82A8, 0x304B, 0x82A9, + 0x304C, 0x82AA, 0x304D, 0x82AB, 0x304E, 0x82AC, 0x304F, 0x82AD, + 0x3050, 0x82AE, 0x3051, 0x82AF, 0x3052, 0x82B0, 0x3053, 0x82B1, + 0x3054, 0x82B2, 0x3055, 0x82B3, 0x3056, 0x82B4, 0x3057, 0x82B5, + 0x3058, 0x82B6, 0x3059, 0x82B7, 0x305A, 0x82B8, 0x305B, 0x82B9, + 0x305C, 0x82BA, 0x305D, 0x82BB, 0x305E, 0x82BC, 0x305F, 0x82BD, + 0x3060, 0x82BE, 0x3061, 0x82BF, 0x3062, 0x82C0, 0x3063, 0x82C1, + 0x3064, 0x82C2, 0x3065, 0x82C3, 0x3066, 0x82C4, 0x3067, 0x82C5, + 0x3068, 0x82C6, 0x3069, 0x82C7, 0x306A, 0x82C8, 0x306B, 0x82C9, + 0x306C, 0x82CA, 0x306D, 0x82CB, 0x306E, 0x82CC, 0x306F, 0x82CD, + 0x3070, 0x82CE, 0x3071, 0x82CF, 0x3072, 0x82D0, 0x3073, 0x82D1, + 0x3074, 0x82D2, 0x3075, 0x82D3, 0x3076, 0x82D4, 0x3077, 0x82D5, + 0x3078, 0x82D6, 0x3079, 0x82D7, 0x307A, 0x82D8, 0x307B, 0x82D9, + 0x307C, 0x82DA, 0x307D, 0x82DB, 0x307E, 0x82DC, 0x307F, 0x82DD, + 0x3080, 0x82DE, 0x3081, 0x82DF, 0x3082, 0x82E0, 0x3083, 0x82E1, + 0x3084, 0x82E2, 0x3085, 0x82E3, 0x3086, 0x82E4, 0x3087, 0x82E5, + 0x3088, 0x82E6, 0x3089, 0x82E7, 0x308A, 0x82E8, 0x308B, 0x82E9, + 0x308C, 0x82EA, 0x308D, 0x82EB, 0x308E, 0x82EC, 0x308F, 0x82ED, + 0x3090, 0x82EE, 0x3091, 0x82EF, 0x3092, 0x82F0, 0x3093, 0x82F1, + 0x3094, 0x8394, 0x309B, 0x814A, 0x309C, 0x814B, 0x309D, 0x8154, + 0x309E, 0x8155, 0x30A1, 0x8340, 0x30A2, 0x8341, 0x30A3, 0x8342, + 0x30A4, 0x8343, 0x30A5, 0x8344, 0x30A6, 0x8345, 0x30A7, 0x8346, + 0x30A8, 0x8347, 0x30A9, 0x8348, 0x30AA, 0x8349, 0x30AB, 0x834A, + 0x30AC, 0x834B, 0x30AD, 0x834C, 0x30AE, 0x834D, 0x30AF, 0x834E, + 0x30B0, 0x834F, 0x30B1, 0x8350, 0x30B2, 0x8351, 0x30B3, 0x8352, + 0x30B4, 0x8353, 0x30B5, 0x8354, 0x30B6, 0x8355, 0x30B7, 0x8356, + 0x30B8, 0x8357, 0x30B9, 0x8358, 0x30BA, 0x8359, 0x30BB, 0x835A, + 0x30BC, 0x835B, 0x30BD, 0x835C, 0x30BE, 0x835D, 0x30BF, 0x835E, + 0x30C0, 0x835F, 0x30C1, 0x8360, 0x30C2, 0x8361, 0x30C3, 0x8362, + 0x30C4, 0x8363, 0x30C5, 0x8364, 0x30C6, 0x8365, 0x30C7, 0x8366, + 0x30C8, 0x8367, 0x30C9, 0x8368, 0x30CA, 0x8369, 0x30CB, 0x836A, + 0x30CC, 0x836B, 0x30CD, 0x836C, 0x30CE, 0x836D, 0x30CF, 0x836E, + 0x30D0, 0x836F, 0x30D1, 0x8370, 0x30D2, 0x8371, 0x30D3, 0x8372, + 0x30D4, 0x8373, 0x30D5, 0x8374, 0x30D6, 0x8375, 0x30D7, 0x8376, + 0x30D8, 0x8377, 0x30D9, 0x8378, 0x30DA, 0x8379, 0x30DB, 0x837A, + 0x30DC, 0x837B, 0x30DD, 0x837C, 0x30DE, 0x837D, 0x30DF, 0x837E, + 0x30E0, 0x8380, 0x30E1, 0x8381, 0x30E2, 0x8382, 0x30E3, 0x8383, + 0x30E4, 0x8384, 0x30E5, 0x8385, 0x30E6, 0x8386, 0x30E7, 0x8387, + 0x30E8, 0x8388, 0x30E9, 0x8389, 0x30EA, 0x838A, 0x30EB, 0x838B, + 0x30EC, 0x838C, 0x30ED, 0x838D, 0x30EE, 0x838E, 0x30EF, 0x838F, + 0x30F0, 0x8390, 0x30F1, 0x8391, 0x30F2, 0x8392, 0x30F3, 0x8393, + 0x30F4, 0x8394, 0x30F5, 0x8395, 0x30F6, 0x8396, 0x30FB, 0x8145, + 0x30FC, 0x815B, 0x30FD, 0x8152, 0x30FE, 0x8153, 0x3231, 0x878A, + 0x3232, 0x878B, 0x3239, 0x878C, 0x32A4, 0x8785, 0x32A5, 0x8786, + 0x32A6, 0x8787, 0x32A7, 0x8788, 0x32A8, 0x8789, 0x3303, 0x8765, + 0x330D, 0x8769, 0x3314, 0x8760, 0x3318, 0x8763, 0x3322, 0x8761, + 0x3323, 0x876B, 0x3326, 0x876A, 0x3327, 0x8764, 0x332B, 0x876C, + 0x3336, 0x8766, 0x333B, 0x876E, 0x3349, 0x875F, 0x334A, 0x876D, + 0x334D, 0x8762, 0x3351, 0x8767, 0x3357, 0x8768, 0x337B, 0x877E, + 0x337C, 0x878F, 0x337D, 0x878E, 0x337E, 0x878D, 0x338E, 0x8772, + 0x338F, 0x8773, 0x339C, 0x876F, 0x339D, 0x8770, 0x339E, 0x8771, + 0x33A1, 0x8775, 0x33C4, 0x8774, 0x33CD, 0x8783, 0x4E00, 0x88EA, + 0x4E01, 0x929A, 0x4E03, 0x8EB5, 0x4E07, 0x969C, 0x4E08, 0x8FE4, + 0x4E09, 0x8E4F, 0x4E0A, 0x8FE3, 0x4E0B, 0x89BA, 0x4E0D, 0x9573, + 0x4E0E, 0x975E, 0x4E10, 0x98A0, 0x4E11, 0x894E, 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0x9B3C, 0x8B53, 0x9B41, 0x8A40, 0x9B42, 0x8DB0, 0x9B43, 0xE9AF, + 0x9B44, 0xE9AE, 0x9B45, 0x96A3, 0x9B4D, 0xE9B1, 0x9B4E, 0xE9B2, + 0x9B4F, 0xE9B0, 0x9B51, 0xE9B3, 0x9B54, 0x9682, 0x9B58, 0xE9B4, + 0x9B5A, 0x8B9B, 0x9B6F, 0x9844, 0x9B72, 0xFC42, 0x9B74, 0xE9B5, + 0x9B75, 0xFC41, 0x9B83, 0xE9B7, 0x9B8E, 0x88BC, 0x9B8F, 0xFC43, + 0x9B91, 0xE9B8, 0x9B92, 0x95A9, 0x9B93, 0xE9B6, 0x9B96, 0xE9B9, + 0x9B97, 0xE9BA, 0x9B9F, 0xE9BB, 0x9BA0, 0xE9BC, 0x9BA8, 0xE9BD, + 0x9BAA, 0x968E, 0x9BAB, 0x8E4C, 0x9BAD, 0x8DF8, 0x9BAE, 0x914E, + 0x9BB1, 0xFC44, 0x9BB4, 0xE9BE, 0x9BB9, 0xE9C1, 0x9BBB, 0xFC45, + 0x9BC0, 0xE9BF, 0x9BC6, 0xE9C2, 0x9BC9, 0x8CEF, 0x9BCA, 0xE9C0, + 0x9BCF, 0xE9C3, 0x9BD1, 0xE9C4, 0x9BD2, 0xE9C5, 0x9BD4, 0xE9C9, + 0x9BD6, 0x8E49, 0x9BDB, 0x91E2, 0x9BE1, 0xE9CA, 0x9BE2, 0xE9C7, + 0x9BE3, 0xE9C6, 0x9BE4, 0xE9C8, 0x9BE8, 0x8C7E, 0x9BF0, 0xE9CE, + 0x9BF1, 0xE9CD, 0x9BF2, 0xE9CC, 0x9BF5, 0x88B1, 0x9C00, 0xFC46, + 0x9C04, 0xE9D8, 0x9C06, 0xE9D4, 0x9C08, 0xE9D5, 0x9C09, 0xE9D1, + 0x9C0A, 0xE9D7, 0x9C0C, 0xE9D3, 0x9C0D, 0x8A82, 0x9C10, 0x986B, + 0x9C12, 0xE9D6, 0x9C13, 0xE9D2, 0x9C14, 0xE9D0, 0x9C15, 0xE9CF, + 0x9C1B, 0xE9DA, 0x9C21, 0xE9DD, 0x9C24, 0xE9DC, 0x9C25, 0xE9DB, + 0x9C2D, 0x9568, 0x9C2E, 0xE9D9, 0x9C2F, 0x88F1, 0x9C30, 0xE9DE, + 0x9C32, 0xE9E0, 0x9C39, 0x8A8F, 0x9C3A, 0xE9CB, 0x9C3B, 0x8956, + 0x9C3E, 0xE9E2, 0x9C46, 0xE9E1, 0x9C47, 0xE9DF, 0x9C48, 0x924C, + 0x9C52, 0x9690, 0x9C57, 0x97D8, 0x9C5A, 0xE9E3, 0x9C60, 0xE9E4, + 0x9C67, 0xE9E5, 0x9C76, 0xE9E6, 0x9C78, 0xE9E7, 0x9CE5, 0x92B9, + 0x9CE7, 0xE9E8, 0x9CE9, 0x94B5, 0x9CEB, 0xE9ED, 0x9CEC, 0xE9E9, + 0x9CF0, 0xE9EA, 0x9CF3, 0x9650, 0x9CF4, 0x96C2, 0x9CF6, 0x93CE, + 0x9D03, 0xE9EE, 0x9D06, 0xE9EF, 0x9D07, 0x93BC, 0x9D08, 0xE9EC, + 0x9D09, 0xE9EB, 0x9D0E, 0x89A8, 0x9D12, 0xE9F7, 0x9D15, 0xE9F6, + 0x9D1B, 0x8995, 0x9D1F, 0xE9F4, 0x9D23, 0xE9F3, 0x9D26, 0xE9F1, + 0x9D28, 0x8A9B, 0x9D2A, 0xE9F0, 0x9D2B, 0x8EB0, 0x9D2C, 0x89A7, + 0x9D3B, 0x8D83, 0x9D3E, 0xE9FA, 0x9D3F, 0xE9F9, 0x9D41, 0xE9F8, + 0x9D44, 0xE9F5, 0x9D46, 0xE9FB, 0x9D48, 0xE9FC, 0x9D50, 0xEA44, + 0x9D51, 0xEA43, 0x9D59, 0xEA45, 0x9D5C, 0x894C, 0x9D5D, 0xEA40, + 0x9D5E, 0xEA41, 0x9D60, 0x8D94, 0x9D61, 0x96B7, 0x9D64, 0xEA42, + 0x9D6B, 0xFC48, 0x9D6C, 0x9651, 0x9D6F, 0xEA4A, 0x9D70, 0xFC47, + 0x9D72, 0xEA46, 0x9D7A, 0xEA4B, 0x9D87, 0xEA48, 0x9D89, 0xEA47, + 0x9D8F, 0x8C7B, 0x9D9A, 0xEA4C, 0x9DA4, 0xEA4D, 0x9DA9, 0xEA4E, + 0x9DAB, 0xEA49, 0x9DAF, 0xE9F2, 0x9DB2, 0xEA4F, 0x9DB4, 0x92DF, + 0x9DB8, 0xEA53, 0x9DBA, 0xEA54, 0x9DBB, 0xEA52, 0x9DC1, 0xEA51, + 0x9DC2, 0xEA57, 0x9DC4, 0xEA50, 0x9DC6, 0xEA55, 0x9DCF, 0xEA56, + 0x9DD3, 0xEA59, 0x9DD9, 0xEA58, 0x9DE6, 0xEA5B, 0x9DED, 0xEA5C, + 0x9DEF, 0xEA5D, 0x9DF2, 0x9868, 0x9DF8, 0xEA5A, 0x9DF9, 0x91E9, + 0x9DFA, 0x8DEB, 0x9DFD, 0xEA5E, 0x9E19, 0xFC4A, 0x9E1A, 0xEA5F, + 0x9E1B, 0xEA60, 0x9E1E, 0xEA61, 0x9E75, 0xEA62, 0x9E78, 0x8CB2, + 0x9E79, 0xEA63, 0x9E7D, 0xEA64, 0x9E7F, 0x8EAD, 0x9E81, 0xEA65, + 0x9E88, 0xEA66, 0x9E8B, 0xEA67, 0x9E8C, 0xEA68, 0x9E91, 0xEA6B, + 0x9E92, 0xEA69, 0x9E93, 0x985B, 0x9E95, 0xEA6A, 0x9E97, 0x97ED, + 0x9E9D, 0xEA6C, 0x9E9F, 0x97D9, 0x9EA5, 0xEA6D, 0x9EA6, 0x949E, + 0x9EA9, 0xEA6E, 0x9EAA, 0xEA70, 0x9EAD, 0xEA71, 0x9EB8, 0xEA6F, + 0x9EB9, 0x8D8D, 0x9EBA, 0x96CB, 0x9EBB, 0x9683, 0x9EBC, 0x9BF5, + 0x9EBE, 0x9F80, 0x9EBF, 0x969B, 0x9EC4, 0x89A9, 0x9ECC, 0xEA73, + 0x9ECD, 0x8B6F, 0x9ECE, 0xEA74, 0x9ECF, 0xEA75, 0x9ED0, 0xEA76, + 0x9ED1, 0xFC4B, 0x9ED2, 0x8D95, 0x9ED4, 0xEA77, 0x9ED8, 0xE0D2, + 0x9ED9, 0x96D9, 0x9EDB, 0x91E1, 0x9EDC, 0xEA78, 0x9EDD, 0xEA7A, + 0x9EDE, 0xEA79, 0x9EE0, 0xEA7B, 0x9EE5, 0xEA7C, 0x9EE8, 0xEA7D, + 0x9EEF, 0xEA7E, 0x9EF4, 0xEA80, 0x9EF6, 0xEA81, 0x9EF7, 0xEA82, + 0x9EF9, 0xEA83, 0x9EFB, 0xEA84, 0x9EFC, 0xEA85, 0x9EFD, 0xEA86, + 0x9F07, 0xEA87, 0x9F08, 0xEA88, 0x9F0E, 0x9343, 0x9F13, 0x8CDB, + 0x9F15, 0xEA8A, 0x9F20, 0x916C, 0x9F21, 0xEA8B, 0x9F2C, 0xEA8C, + 0x9F3B, 0x9540, 0x9F3E, 0xEA8D, 0x9F4A, 0xEA8E, 0x9F4B, 0xE256, + 0x9F4E, 0xE6D8, 0x9F4F, 0xE8EB, 0x9F52, 0xEA8F, 0x9F54, 0xEA90, + 0x9F5F, 0xEA92, 0x9F60, 0xEA93, 0x9F61, 0xEA94, 0x9F62, 0x97EE, + 0x9F63, 0xEA91, 0x9F66, 0xEA95, 0x9F67, 0xEA96, 0x9F6A, 0xEA98, + 0x9F6C, 0xEA97, 0x9F72, 0xEA9A, 0x9F76, 0xEA9B, 0x9F77, 0xEA99, + 0x9F8D, 0x97B4, 0x9F95, 0xEA9C, 0x9F9C, 0xEA9D, 0x9F9D, 0xE273, + 0x9FA0, 0xEA9E, 0xF929, 0xFAE0, 0xF9DC, 0xFBE9, 0xFA0E, 0xFA90, + 0xFA0F, 0xFA9B, 0xFA10, 0xFA9C, 0xFA11, 0xFAB1, 0xFA12, 0xFAD8, + 0xFA13, 0xFAE8, 0xFA14, 0xFAEA, 0xFA15, 0xFB58, 0xFA16, 0xFB5E, + 0xFA17, 0xFB75, 0xFA18, 0xFB7D, 0xFA19, 0xFB7E, 0xFA1A, 0xFB80, + 0xFA1B, 0xFB82, 0xFA1C, 0xFB86, 0xFA1D, 0xFB89, 0xFA1E, 0xFB92, + 0xFA1F, 0xFB9D, 0xFA20, 0xFB9F, 0xFA21, 0xFBA0, 0xFA22, 0xFBA9, + 0xFA23, 0xFBB1, 0xFA24, 0xFBB3, 0xFA25, 0xFBB4, 0xFA26, 0xFBB7, + 0xFA27, 0xFBD3, 0xFA28, 0xFBDA, 0xFA29, 0xFBEA, 0xFA2A, 0xFBF6, + 0xFA2B, 0xFBF7, 0xFA2C, 0xFBF9, 0xFA2D, 0xFC49, 0xFF01, 0x8149, + 0xFF02, 0xFA57, 0xFF03, 0x8194, 0xFF04, 0x8190, 0xFF05, 0x8193, + 0xFF06, 0x8195, 0xFF07, 0xFA56, 0xFF08, 0x8169, 0xFF09, 0x816A, + 0xFF0A, 0x8196, 0xFF0B, 0x817B, 0xFF0C, 0x8143, 0xFF0D, 0x817C, + 0xFF0E, 0x8144, 0xFF0F, 0x815E, 0xFF10, 0x824F, 0xFF11, 0x8250, + 0xFF12, 0x8251, 0xFF13, 0x8252, 0xFF14, 0x8253, 0xFF15, 0x8254, + 0xFF16, 0x8255, 0xFF17, 0x8256, 0xFF18, 0x8257, 0xFF19, 0x8258, + 0xFF1A, 0x8146, 0xFF1B, 0x8147, 0xFF1C, 0x8183, 0xFF1D, 0x8181, + 0xFF1E, 0x8184, 0xFF1F, 0x8148, 0xFF20, 0x8197, 0xFF21, 0x8260, + 0xFF22, 0x8261, 0xFF23, 0x8262, 0xFF24, 0x8263, 0xFF25, 0x8264, + 0xFF26, 0x8265, 0xFF27, 0x8266, 0xFF28, 0x8267, 0xFF29, 0x8268, + 0xFF2A, 0x8269, 0xFF2B, 0x826A, 0xFF2C, 0x826B, 0xFF2D, 0x826C, + 0xFF2E, 0x826D, 0xFF2F, 0x826E, 0xFF30, 0x826F, 0xFF31, 0x8270, + 0xFF32, 0x8271, 0xFF33, 0x8272, 0xFF34, 0x8273, 0xFF35, 0x8274, + 0xFF36, 0x8275, 0xFF37, 0x8276, 0xFF38, 0x8277, 0xFF39, 0x8278, + 0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E, + 0xFF3E, 0x814F, 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281, + 0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285, + 0xFF46, 0x8286, 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289, + 0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D, + 0xFF4E, 0x828E, 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291, + 0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295, + 0xFF56, 0x8296, 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299, + 0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170, + 0xFF5E, 0x8160, 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3, + 0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7, + 0xFF68, 0x00A8, 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB, + 0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF, + 0xFF70, 0x00B0, 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3, + 0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7, + 0xFF78, 0x00B8, 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB, + 0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF, + 0xFF80, 0x00C0, 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3, + 0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7, + 0xFF88, 0x00C8, 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB, + 0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF, + 0xFF90, 0x00D0, 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3, + 0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7, + 0xFF98, 0x00D8, 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB, + 0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF, + 0xFFE0, 0x8191, 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150, + 0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0 +}; + +#if !_TINY_TABLE +static +const WCHAR sjis2uni[] = { +/* SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, */ + 0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64, + 0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68, + 0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C, + 0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70, + 0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74, + 0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78, + 0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C, + 0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80, + 0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84, + 0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88, + 0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C, + 0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90, + 0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94, + 0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98, + 0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C, + 0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000, + 0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E, + 0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F, + 0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4, + 0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3, + 0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D, + 0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005, + 0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015, + 0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E, + 0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025, + 0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D, + 0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015, + 0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D, + 0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B, + 0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F, + 0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D, + 0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D, + 0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266, + 0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642, + 0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033, + 0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0, + 0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06, + 0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606, + 0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE, + 0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0, + 0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC, + 0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190, + 0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208, + 0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282, + 0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227, + 0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4, + 0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5, + 0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261, + 0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A, + 0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B, + 0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F, + 0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021, + 0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11, + 0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15, + 0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19, + 0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24, + 0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28, + 0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C, + 0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30, + 0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34, + 0x8274, 0xFF35, 0x8275, 0xFF36, 0x8276, 0xFF37, 0x8277, 0xFF38, + 0x8278, 0xFF39, 0x8279, 0xFF3A, 0x8281, 0xFF41, 0x8282, 0xFF42, + 0x8283, 0xFF43, 0x8284, 0xFF44, 0x8285, 0xFF45, 0x8286, 0xFF46, + 0x8287, 0xFF47, 0x8288, 0xFF48, 0x8289, 0xFF49, 0x828A, 0xFF4A, + 0x828B, 0xFF4B, 0x828C, 0xFF4C, 0x828D, 0xFF4D, 0x828E, 0xFF4E, + 0x828F, 0xFF4F, 0x8290, 0xFF50, 0x8291, 0xFF51, 0x8292, 0xFF52, + 0x8293, 0xFF53, 0x8294, 0xFF54, 0x8295, 0xFF55, 0x8296, 0xFF56, + 0x8297, 0xFF57, 0x8298, 0xFF58, 0x8299, 0xFF59, 0x829A, 0xFF5A, + 0x829F, 0x3041, 0x82A0, 0x3042, 0x82A1, 0x3043, 0x82A2, 0x3044, + 0x82A3, 0x3045, 0x82A4, 0x3046, 0x82A5, 0x3047, 0x82A6, 0x3048, + 0x82A7, 0x3049, 0x82A8, 0x304A, 0x82A9, 0x304B, 0x82AA, 0x304C, + 0x82AB, 0x304D, 0x82AC, 0x304E, 0x82AD, 0x304F, 0x82AE, 0x3050, + 0x82AF, 0x3051, 0x82B0, 0x3052, 0x82B1, 0x3053, 0x82B2, 0x3054, + 0x82B3, 0x3055, 0x82B4, 0x3056, 0x82B5, 0x3057, 0x82B6, 0x3058, + 0x82B7, 0x3059, 0x82B8, 0x305A, 0x82B9, 0x305B, 0x82BA, 0x305C, + 0x82BB, 0x305D, 0x82BC, 0x305E, 0x82BD, 0x305F, 0x82BE, 0x3060, + 0x82BF, 0x3061, 0x82C0, 0x3062, 0x82C1, 0x3063, 0x82C2, 0x3064, + 0x82C3, 0x3065, 0x82C4, 0x3066, 0x82C5, 0x3067, 0x82C6, 0x3068, + 0x82C7, 0x3069, 0x82C8, 0x306A, 0x82C9, 0x306B, 0x82CA, 0x306C, + 0x82CB, 0x306D, 0x82CC, 0x306E, 0x82CD, 0x306F, 0x82CE, 0x3070, + 0x82CF, 0x3071, 0x82D0, 0x3072, 0x82D1, 0x3073, 0x82D2, 0x3074, + 0x82D3, 0x3075, 0x82D4, 0x3076, 0x82D5, 0x3077, 0x82D6, 0x3078, + 0x82D7, 0x3079, 0x82D8, 0x307A, 0x82D9, 0x307B, 0x82DA, 0x307C, + 0x82DB, 0x307D, 0x82DC, 0x307E, 0x82DD, 0x307F, 0x82DE, 0x3080, + 0x82DF, 0x3081, 0x82E0, 0x3082, 0x82E1, 0x3083, 0x82E2, 0x3084, + 0x82E3, 0x3085, 0x82E4, 0x3086, 0x82E5, 0x3087, 0x82E6, 0x3088, + 0x82E7, 0x3089, 0x82E8, 0x308A, 0x82E9, 0x308B, 0x82EA, 0x308C, + 0x82EB, 0x308D, 0x82EC, 0x308E, 0x82ED, 0x308F, 0x82EE, 0x3090, + 0x82EF, 0x3091, 0x82F0, 0x3092, 0x82F1, 0x3093, 0x8340, 0x30A1, + 0x8341, 0x30A2, 0x8342, 0x30A3, 0x8343, 0x30A4, 0x8344, 0x30A5, + 0x8345, 0x30A6, 0x8346, 0x30A7, 0x8347, 0x30A8, 0x8348, 0x30A9, + 0x8349, 0x30AA, 0x834A, 0x30AB, 0x834B, 0x30AC, 0x834C, 0x30AD, + 0x834D, 0x30AE, 0x834E, 0x30AF, 0x834F, 0x30B0, 0x8350, 0x30B1, + 0x8351, 0x30B2, 0x8352, 0x30B3, 0x8353, 0x30B4, 0x8354, 0x30B5, + 0x8355, 0x30B6, 0x8356, 0x30B7, 0x8357, 0x30B8, 0x8358, 0x30B9, + 0x8359, 0x30BA, 0x835A, 0x30BB, 0x835B, 0x30BC, 0x835C, 0x30BD, + 0x835D, 0x30BE, 0x835E, 0x30BF, 0x835F, 0x30C0, 0x8360, 0x30C1, + 0x8361, 0x30C2, 0x8362, 0x30C3, 0x8363, 0x30C4, 0x8364, 0x30C5, + 0x8365, 0x30C6, 0x8366, 0x30C7, 0x8367, 0x30C8, 0x8368, 0x30C9, + 0x8369, 0x30CA, 0x836A, 0x30CB, 0x836B, 0x30CC, 0x836C, 0x30CD, + 0x836D, 0x30CE, 0x836E, 0x30CF, 0x836F, 0x30D0, 0x8370, 0x30D1, + 0x8371, 0x30D2, 0x8372, 0x30D3, 0x8373, 0x30D4, 0x8374, 0x30D5, + 0x8375, 0x30D6, 0x8376, 0x30D7, 0x8377, 0x30D8, 0x8378, 0x30D9, + 0x8379, 0x30DA, 0x837A, 0x30DB, 0x837B, 0x30DC, 0x837C, 0x30DD, + 0x837D, 0x30DE, 0x837E, 0x30DF, 0x8380, 0x30E0, 0x8381, 0x30E1, + 0x8382, 0x30E2, 0x8383, 0x30E3, 0x8384, 0x30E4, 0x8385, 0x30E5, + 0x8386, 0x30E6, 0x8387, 0x30E7, 0x8388, 0x30E8, 0x8389, 0x30E9, + 0x838A, 0x30EA, 0x838B, 0x30EB, 0x838C, 0x30EC, 0x838D, 0x30ED, + 0x838E, 0x30EE, 0x838F, 0x30EF, 0x8390, 0x30F0, 0x8391, 0x30F1, + 0x8392, 0x30F2, 0x8393, 0x30F3, 0x8394, 0x3094, 0x8394, 0x30F4, + 0x8395, 0x30F5, 0x8396, 0x30F6, 0x839F, 0x0391, 0x83A0, 0x0392, + 0x83A1, 0x0393, 0x83A2, 0x0394, 0x83A3, 0x0395, 0x83A4, 0x0396, + 0x83A5, 0x0397, 0x83A6, 0x0398, 0x83A7, 0x0399, 0x83A8, 0x039A, + 0x83A9, 0x039B, 0x83AA, 0x039C, 0x83AB, 0x039D, 0x83AC, 0x039E, + 0x83AD, 0x039F, 0x83AE, 0x03A0, 0x83AF, 0x03A1, 0x83B0, 0x03A3, + 0x83B1, 0x03A4, 0x83B2, 0x03A5, 0x83B3, 0x03A6, 0x83B4, 0x03A7, + 0x83B5, 0x03A8, 0x83B6, 0x03A9, 0x83BF, 0x03B1, 0x83C0, 0x03B2, + 0x83C1, 0x03B3, 0x83C2, 0x03B4, 0x83C3, 0x03B5, 0x83C4, 0x03B6, + 0x83C5, 0x03B7, 0x83C6, 0x03B8, 0x83C7, 0x03B9, 0x83C8, 0x03BA, + 0x83C9, 0x03BB, 0x83CA, 0x03BC, 0x83CB, 0x03BD, 0x83CC, 0x03BE, + 0x83CD, 0x03BF, 0x83CE, 0x03C0, 0x83CF, 0x03C1, 0x83D0, 0x03C3, + 0x83D1, 0x03C4, 0x83D2, 0x03C5, 0x83D3, 0x03C6, 0x83D4, 0x03C7, + 0x83D5, 0x03C8, 0x83D6, 0x03C9, 0x8440, 0x0410, 0x8441, 0x0411, + 0x8442, 0x0412, 0x8443, 0x0413, 0x8444, 0x0414, 0x8445, 0x0415, + 0x8446, 0x0401, 0x8447, 0x0416, 0x8448, 0x0417, 0x8449, 0x0418, + 0x844A, 0x0419, 0x844B, 0x041A, 0x844C, 0x041B, 0x844D, 0x041C, + 0x844E, 0x041D, 0x844F, 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0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9, + 0xFB62, 0x73D6, 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407, + 0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429, + 0xFB6A, 0x742E, 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F, + 0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C, + 0xFB72, 0x769E, 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17, + 0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E, + 0xFB7A, 0x7864, 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18, + 0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B, + 0xFB83, 0x799B, 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C, + 0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48, + 0xFB8B, 0x7D5C, 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6, + 0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E, + 0xFB93, 0x8301, 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7, + 0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553, + 0xFB9B, 0x8559, 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0, + 0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5, + 0xFBA3, 0x8A12, 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7, + 0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6, + 0xFBAB, 0x8B53, 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4, + 0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF, + 0xFBB3, 0xFA24, 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE, + 0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA, + 0xFBBB, 0x91D7, 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE, + 0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210, + 0xFBC3, 0x920A, 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C, + 0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239, + 0xFBCB, 0x9267, 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278, + 0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0, + 0xFBD3, 0xFA27, 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3, + 0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28, + 0xFBDB, 0x931E, 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302, + 0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6, + 0xFBE3, 0x93DE, 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445, + 0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29, + 0xFBEB, 0x969D, 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B, + 0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751, + 0xFBF3, 0x9755, 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A, + 0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E, + 0xFBFB, 0x9A4E, 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75, + 0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB, + 0xFC46, 0x9C00, 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D, + 0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0 +}; +#endif + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src <= 0x80) { /* ASCII */ + c = src; + } else { +#if !_TINY_TABLE + if (dir) { /* OEMCP to unicode */ + p = sjis2uni; + hi = sizeof(sjis2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2sjis; + hi = sizeof(uni2sjis) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; +#else + if (dir) { /* OEMCP to unicode (Incremental search)*/ + p = &uni2sjis[1]; + do { + c = *p; + p += 2; + p -= 3; + c = *p; + } while (c && c != src); + } else { /* Unicode to OEMCP */ + li = 0; hi = sizeof(uni2sjis) / 4 - 1; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == uni2sjis[i * 2]) break; + if (src > uni2sjis[i * 2]) + li = i; + else + hi = i; + } + c = n ? uni2sjis[i * 2 + 1] : 0; + } +#endif + } + + return c; +} + + + +WCHAR ff_wtoupper ( /* Upper converted character */ + WCHAR chr /* Input character */ +) +{ + static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; + static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; + int i; + + + for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; + + return tbl_lower[i] ? tbl_upper[i] : chr; +} diff --git a/src/ersky9x/libraries/fat/fatfs/src/option/cc936.c b/src/ersky9x/libraries/fat/fatfs/src/option/cc936.c new file mode 100644 index 000000000..276a83f9b --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/option/cc936.c @@ -0,0 +1,10973 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP936 (Simplified Chinese GBK) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if !_USE_LFN || _CODE_PAGE != 936 +#error This file is not needed in current configuration. +#endif + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A4, 0xA1E8, 0x00A7, 0xA1EC, 0x00A8, 0xA1A7, 0x00B0, 0xA1E3, + 0x00B1, 0xA1C0, 0x00B7, 0xA1A4, 0x00D7, 0xA1C1, 0x00E0, 0xA8A4, + 0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA, + 0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE, + 0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9, + 0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9, + 0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1, + 0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3, + 0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8, + 0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5, + 0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1, + 0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5, + 0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9, + 0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD, + 0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1, + 0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5, + 0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1, + 0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5, + 0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9, + 0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD, + 0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1, + 0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5, + 0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7, + 0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4, + 0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9, + 0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD, + 0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1, + 0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5, + 0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9, + 0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD, + 0x042C, 0xA7BE, 0x042D, 0xA7BF, 0x042E, 0xA7C0, 0x042F, 0xA7C1, + 0x0430, 0xA7D1, 0x0431, 0xA7D2, 0x0432, 0xA7D3, 0x0433, 0xA7D4, + 0x0434, 0xA7D5, 0x0435, 0xA7D6, 0x0436, 0xA7D8, 0x0437, 0xA7D9, + 0x0438, 0xA7DA, 0x0439, 0xA7DB, 0x043A, 0xA7DC, 0x043B, 0xA7DD, + 0x043C, 0xA7DE, 0x043D, 0xA7DF, 0x043E, 0xA7E0, 0x043F, 0xA7E1, + 0x0440, 0xA7E2, 0x0441, 0xA7E3, 0x0442, 0xA7E4, 0x0443, 0xA7E5, + 0x0444, 0xA7E6, 0x0445, 0xA7E7, 0x0446, 0xA7E8, 0x0447, 0xA7E9, + 0x0448, 0xA7EA, 0x0449, 0xA7EB, 0x044A, 0xA7EC, 0x044B, 0xA7ED, + 0x044C, 0xA7EE, 0x044D, 0xA7EF, 0x044E, 0xA7F0, 0x044F, 0xA7F1, + 0x0451, 0xA7D7, 0x2010, 0xA95C, 0x2013, 0xA843, 0x2014, 0xA1AA, + 0x2015, 0xA844, 0x2016, 0xA1AC, 0x2018, 0xA1AE, 0x2019, 0xA1AF, + 0x201C, 0xA1B0, 0x201D, 0xA1B1, 0x2025, 0xA845, 0x2026, 0xA1AD, + 0x2030, 0xA1EB, 0x2032, 0xA1E4, 0x2033, 0xA1E5, 0x2035, 0xA846, + 0x203B, 0xA1F9, 0x20AC, 0x0080, 0x2103, 0xA1E6, 0x2105, 0xA847, + 0x2109, 0xA848, 0x2116, 0xA1ED, 0x2121, 0xA959, 0x2160, 0xA2F1, + 0x2161, 0xA2F2, 0x2162, 0xA2F3, 0x2163, 0xA2F4, 0x2164, 0xA2F5, + 0x2165, 0xA2F6, 0x2166, 0xA2F7, 0x2167, 0xA2F8, 0x2168, 0xA2F9, + 0x2169, 0xA2FA, 0x216A, 0xA2FB, 0x216B, 0xA2FC, 0x2170, 0xA2A1, + 0x2171, 0xA2A2, 0x2172, 0xA2A3, 0x2173, 0xA2A4, 0x2174, 0xA2A5, + 0x2175, 0xA2A6, 0x2176, 0xA2A7, 0x2177, 0xA2A8, 0x2178, 0xA2A9, + 0x2179, 0xA2AA, 0x2190, 0xA1FB, 0x2191, 0xA1FC, 0x2192, 0xA1FA, + 0x2193, 0xA1FD, 0x2196, 0xA849, 0x2197, 0xA84A, 0x2198, 0xA84B, + 0x2199, 0xA84C, 0x2208, 0xA1CA, 0x220F, 0xA1C7, 0x2211, 0xA1C6, + 0x2215, 0xA84D, 0x221A, 0xA1CC, 0x221D, 0xA1D8, 0x221E, 0xA1DE, + 0x221F, 0xA84E, 0x2220, 0xA1CF, 0x2223, 0xA84F, 0x2225, 0xA1CE, + 0x2227, 0xA1C4, 0x2228, 0xA1C5, 0x2229, 0xA1C9, 0x222A, 0xA1C8, + 0x222B, 0xA1D2, 0x222E, 0xA1D3, 0x2234, 0xA1E0, 0x2235, 0xA1DF, + 0x2236, 0xA1C3, 0x2237, 0xA1CB, 0x223D, 0xA1D7, 0x2248, 0xA1D6, + 0x224C, 0xA1D5, 0x2252, 0xA850, 0x2260, 0xA1D9, 0x2261, 0xA1D4, + 0x2264, 0xA1DC, 0x2265, 0xA1DD, 0x2266, 0xA851, 0x2267, 0xA852, + 0x226E, 0xA1DA, 0x226F, 0xA1DB, 0x2295, 0xA892, 0x2299, 0xA1D1, + 0x22A5, 0xA1CD, 0x22BF, 0xA853, 0x2312, 0xA1D0, 0x2460, 0xA2D9, + 0x2461, 0xA2DA, 0x2462, 0xA2DB, 0x2463, 0xA2DC, 0x2464, 0xA2DD, + 0x2465, 0xA2DE, 0x2466, 0xA2DF, 0x2467, 0xA2E0, 0x2468, 0xA2E1, + 0x2469, 0xA2E2, 0x2474, 0xA2C5, 0x2475, 0xA2C6, 0x2476, 0xA2C7, + 0x2477, 0xA2C8, 0x2478, 0xA2C9, 0x2479, 0xA2CA, 0x247A, 0xA2CB, + 0x247B, 0xA2CC, 0x247C, 0xA2CD, 0x247D, 0xA2CE, 0x247E, 0xA2CF, + 0x247F, 0xA2D0, 0x2480, 0xA2D1, 0x2481, 0xA2D2, 0x2482, 0xA2D3, + 0x2483, 0xA2D4, 0x2484, 0xA2D5, 0x2485, 0xA2D6, 0x2486, 0xA2D7, + 0x2487, 0xA2D8, 0x2488, 0xA2B1, 0x2489, 0xA2B2, 0x248A, 0xA2B3, + 0x248B, 0xA2B4, 0x248C, 0xA2B5, 0x248D, 0xA2B6, 0x248E, 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0x9F42, 0xFD4B, + 0x9F43, 0xFD4C, 0x9F44, 0xF7FE, 0x9F45, 0xFD4D, 0x9F46, 0xFD4E, + 0x9F47, 0xFD4F, 0x9F48, 0xFD50, 0x9F49, 0xFD51, 0x9F4A, 0xFD52, + 0x9F4B, 0xFD53, 0x9F4C, 0xFD54, 0x9F4D, 0xFD55, 0x9F4E, 0xFD56, + 0x9F4F, 0xFD57, 0x9F50, 0xC6EB, 0x9F51, 0xECB4, 0x9F52, 0xFD58, + 0x9F53, 0xFD59, 0x9F54, 0xFD5A, 0x9F55, 0xFD5B, 0x9F56, 0xFD5C, + 0x9F57, 0xFD5D, 0x9F58, 0xFD5E, 0x9F59, 0xFD5F, 0x9F5A, 0xFD60, + 0x9F5B, 0xFD61, 0x9F5C, 0xFD62, 0x9F5D, 0xFD63, 0x9F5E, 0xFD64, + 0x9F5F, 0xFD65, 0x9F60, 0xFD66, 0x9F61, 0xFD67, 0x9F62, 0xFD68, + 0x9F63, 0xFD69, 0x9F64, 0xFD6A, 0x9F65, 0xFD6B, 0x9F66, 0xFD6C, + 0x9F67, 0xFD6D, 0x9F68, 0xFD6E, 0x9F69, 0xFD6F, 0x9F6A, 0xFD70, + 0x9F6B, 0xFD71, 0x9F6C, 0xFD72, 0x9F6D, 0xFD73, 0x9F6E, 0xFD74, + 0x9F6F, 0xFD75, 0x9F70, 0xFD76, 0x9F71, 0xFD77, 0x9F72, 0xFD78, + 0x9F73, 0xFD79, 0x9F74, 0xFD7A, 0x9F75, 0xFD7B, 0x9F76, 0xFD7C, + 0x9F77, 0xFD7D, 0x9F78, 0xFD7E, 0x9F79, 0xFD80, 0x9F7A, 0xFD81, + 0x9F7B, 0xFD82, 0x9F7C, 0xFD83, 0x9F7D, 0xFD84, 0x9F7E, 0xFD85, + 0x9F7F, 0xB3DD, 0x9F80, 0xF6B3, 0x9F81, 0xFD86, 0x9F82, 0xFD87, + 0x9F83, 0xF6B4, 0x9F84, 0xC1E4, 0x9F85, 0xF6B5, 0x9F86, 0xF6B6, + 0x9F87, 0xF6B7, 0x9F88, 0xF6B8, 0x9F89, 0xF6B9, 0x9F8A, 0xF6BA, + 0x9F8B, 0xC8A3, 0x9F8C, 0xF6BB, 0x9F8D, 0xFD88, 0x9F8E, 0xFD89, + 0x9F8F, 0xFD8A, 0x9F90, 0xFD8B, 0x9F91, 0xFD8C, 0x9F92, 0xFD8D, + 0x9F93, 0xFD8E, 0x9F94, 0xFD8F, 0x9F95, 0xFD90, 0x9F96, 0xFD91, + 0x9F97, 0xFD92, 0x9F98, 0xFD93, 0x9F99, 0xC1FA, 0x9F9A, 0xB9A8, + 0x9F9B, 0xEDE8, 0x9F9C, 0xFD94, 0x9F9D, 0xFD95, 0x9F9E, 0xFD96, + 0x9F9F, 0xB9EA, 0x9FA0, 0xD9DF, 0x9FA1, 0xFD97, 0x9FA2, 0xFD98, + 0x9FA3, 0xFD99, 0x9FA4, 0xFD9A, 0x9FA5, 0xFD9B, 0xF92C, 0xFD9C, + 0xF979, 0xFD9D, 0xF995, 0xFD9E, 0xF9E7, 0xFD9F, 0xF9F1, 0xFDA0, + 0xFA0C, 0xFE40, 0xFA0D, 0xFE41, 0xFA0E, 0xFE42, 0xFA0F, 0xFE43, + 0xFA11, 0xFE44, 0xFA13, 0xFE45, 0xFA14, 0xFE46, 0xFA18, 0xFE47, + 0xFA1F, 0xFE48, 0xFA20, 0xFE49, 0xFA21, 0xFE4A, 0xFA23, 0xFE4B, + 0xFA24, 0xFE4C, 0xFA27, 0xFE4D, 0xFA28, 0xFE4E, 0xFA29, 0xFE4F, + 0xFE30, 0xA955, 0xFE31, 0xA6F2, 0xFE33, 0xA6F4, 0xFE34, 0xA6F5, + 0xFE35, 0xA6E0, 0xFE36, 0xA6E1, 0xFE37, 0xA6F0, 0xFE38, 0xA6F1, + 0xFE39, 0xA6E2, 0xFE3A, 0xA6E3, 0xFE3B, 0xA6EE, 0xFE3C, 0xA6EF, + 0xFE3D, 0xA6E6, 0xFE3E, 0xA6E7, 0xFE3F, 0xA6E4, 0xFE40, 0xA6E5, + 0xFE41, 0xA6E8, 0xFE42, 0xA6E9, 0xFE43, 0xA6EA, 0xFE44, 0xA6EB, + 0xFE49, 0xA968, 0xFE4A, 0xA969, 0xFE4B, 0xA96A, 0xFE4C, 0xA96B, + 0xFE4D, 0xA96C, 0xFE4E, 0xA96D, 0xFE4F, 0xA96E, 0xFE50, 0xA96F, + 0xFE51, 0xA970, 0xFE52, 0xA971, 0xFE54, 0xA972, 0xFE55, 0xA973, + 0xFE56, 0xA974, 0xFE57, 0xA975, 0xFE59, 0xA976, 0xFE5A, 0xA977, + 0xFE5B, 0xA978, 0xFE5C, 0xA979, 0xFE5D, 0xA97A, 0xFE5E, 0xA97B, + 0xFE5F, 0xA97C, 0xFE60, 0xA97D, 0xFE61, 0xA97E, 0xFE62, 0xA980, + 0xFE63, 0xA981, 0xFE64, 0xA982, 0xFE65, 0xA983, 0xFE66, 0xA984, + 0xFE68, 0xA985, 0xFE69, 0xA986, 0xFE6A, 0xA987, 0xFE6B, 0xA988, + 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA1E7, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, + 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, + 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, + 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, + 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, + 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, + 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, + 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, + 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, + 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, + 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, + 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA, + 0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4, + 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05, + 0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17, + 0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23, + 0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F, + 0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37, + 0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42, + 0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51, + 0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B, + 0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65, + 0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B, + 0x8167, 0x4E6C, 0x8168, 0x4E6D, 0x8169, 0x4E6E, 0x816A, 0x4E6F, + 0x816B, 0x4E72, 0x816C, 0x4E74, 0x816D, 0x4E75, 0x816E, 0x4E76, + 0x816F, 0x4E77, 0x8170, 0x4E78, 0x8171, 0x4E79, 0x8172, 0x4E7A, + 0x8173, 0x4E7B, 0x8174, 0x4E7C, 0x8175, 0x4E7D, 0x8176, 0x4E7F, + 0x8177, 0x4E80, 0x8178, 0x4E81, 0x8179, 0x4E82, 0x817A, 0x4E83, + 0x817B, 0x4E84, 0x817C, 0x4E85, 0x817D, 0x4E87, 0x817E, 0x4E8A, + 0x8180, 0x4E90, 0x8181, 0x4E96, 0x8182, 0x4E97, 0x8183, 0x4E99, + 0x8184, 0x4E9C, 0x8185, 0x4E9D, 0x8186, 0x4E9E, 0x8187, 0x4EA3, + 0x8188, 0x4EAA, 0x8189, 0x4EAF, 0x818A, 0x4EB0, 0x818B, 0x4EB1, + 0x818C, 0x4EB4, 0x818D, 0x4EB6, 0x818E, 0x4EB7, 0x818F, 0x4EB8, + 0x8190, 0x4EB9, 0x8191, 0x4EBC, 0x8192, 0x4EBD, 0x8193, 0x4EBE, + 0x8194, 0x4EC8, 0x8195, 0x4ECC, 0x8196, 0x4ECF, 0x8197, 0x4ED0, + 0x8198, 0x4ED2, 0x8199, 0x4EDA, 0x819A, 0x4EDB, 0x819B, 0x4EDC, + 0x819C, 0x4EE0, 0x819D, 0x4EE2, 0x819E, 0x4EE6, 0x819F, 0x4EE7, + 0x81A0, 0x4EE9, 0x81A1, 0x4EED, 0x81A2, 0x4EEE, 0x81A3, 0x4EEF, + 0x81A4, 0x4EF1, 0x81A5, 0x4EF4, 0x81A6, 0x4EF8, 0x81A7, 0x4EF9, + 0x81A8, 0x4EFA, 0x81A9, 0x4EFC, 0x81AA, 0x4EFE, 0x81AB, 0x4F00, + 0x81AC, 0x4F02, 0x81AD, 0x4F03, 0x81AE, 0x4F04, 0x81AF, 0x4F05, + 0x81B0, 0x4F06, 0x81B1, 0x4F07, 0x81B2, 0x4F08, 0x81B3, 0x4F0B, + 0x81B4, 0x4F0C, 0x81B5, 0x4F12, 0x81B6, 0x4F13, 0x81B7, 0x4F14, + 0x81B8, 0x4F15, 0x81B9, 0x4F16, 0x81BA, 0x4F1C, 0x81BB, 0x4F1D, + 0x81BC, 0x4F21, 0x81BD, 0x4F23, 0x81BE, 0x4F28, 0x81BF, 0x4F29, + 0x81C0, 0x4F2C, 0x81C1, 0x4F2D, 0x81C2, 0x4F2E, 0x81C3, 0x4F31, + 0x81C4, 0x4F33, 0x81C5, 0x4F35, 0x81C6, 0x4F37, 0x81C7, 0x4F39, + 0x81C8, 0x4F3B, 0x81C9, 0x4F3E, 0x81CA, 0x4F3F, 0x81CB, 0x4F40, + 0x81CC, 0x4F41, 0x81CD, 0x4F42, 0x81CE, 0x4F44, 0x81CF, 0x4F45, + 0x81D0, 0x4F47, 0x81D1, 0x4F48, 0x81D2, 0x4F49, 0x81D3, 0x4F4A, + 0x81D4, 0x4F4B, 0x81D5, 0x4F4C, 0x81D6, 0x4F52, 0x81D7, 0x4F54, + 0x81D8, 0x4F56, 0x81D9, 0x4F61, 0x81DA, 0x4F62, 0x81DB, 0x4F66, + 0x81DC, 0x4F68, 0x81DD, 0x4F6A, 0x81DE, 0x4F6B, 0x81DF, 0x4F6D, + 0x81E0, 0x4F6E, 0x81E1, 0x4F71, 0x81E2, 0x4F72, 0x81E3, 0x4F75, + 0x81E4, 0x4F77, 0x81E5, 0x4F78, 0x81E6, 0x4F79, 0x81E7, 0x4F7A, + 0x81E8, 0x4F7D, 0x81E9, 0x4F80, 0x81EA, 0x4F81, 0x81EB, 0x4F82, + 0x81EC, 0x4F85, 0x81ED, 0x4F86, 0x81EE, 0x4F87, 0x81EF, 0x4F8A, + 0x81F0, 0x4F8C, 0x81F1, 0x4F8E, 0x81F2, 0x4F90, 0x81F3, 0x4F92, + 0x81F4, 0x4F93, 0x81F5, 0x4F95, 0x81F6, 0x4F96, 0x81F7, 0x4F98, + 0x81F8, 0x4F99, 0x81F9, 0x4F9A, 0x81FA, 0x4F9C, 0x81FB, 0x4F9E, + 0x81FC, 0x4F9F, 0x81FD, 0x4FA1, 0x81FE, 0x4FA2, 0x8240, 0x4FA4, + 0x8241, 0x4FAB, 0x8242, 0x4FAD, 0x8243, 0x4FB0, 0x8244, 0x4FB1, + 0x8245, 0x4FB2, 0x8246, 0x4FB3, 0x8247, 0x4FB4, 0x8248, 0x4FB6, + 0x8249, 0x4FB7, 0x824A, 0x4FB8, 0x824B, 0x4FB9, 0x824C, 0x4FBA, + 0x824D, 0x4FBB, 0x824E, 0x4FBC, 0x824F, 0x4FBD, 0x8250, 0x4FBE, + 0x8251, 0x4FC0, 0x8252, 0x4FC1, 0x8253, 0x4FC2, 0x8254, 0x4FC6, + 0x8255, 0x4FC7, 0x8256, 0x4FC8, 0x8257, 0x4FC9, 0x8258, 0x4FCB, + 0x8259, 0x4FCC, 0x825A, 0x4FCD, 0x825B, 0x4FD2, 0x825C, 0x4FD3, + 0x825D, 0x4FD4, 0x825E, 0x4FD5, 0x825F, 0x4FD6, 0x8260, 0x4FD9, + 0x8261, 0x4FDB, 0x8262, 0x4FE0, 0x8263, 0x4FE2, 0x8264, 0x4FE4, + 0x8265, 0x4FE5, 0x8266, 0x4FE7, 0x8267, 0x4FEB, 0x8268, 0x4FEC, + 0x8269, 0x4FF0, 0x826A, 0x4FF2, 0x826B, 0x4FF4, 0x826C, 0x4FF5, + 0x826D, 0x4FF6, 0x826E, 0x4FF7, 0x826F, 0x4FF9, 0x8270, 0x4FFB, + 0x8271, 0x4FFC, 0x8272, 0x4FFD, 0x8273, 0x4FFF, 0x8274, 0x5000, + 0x8275, 0x5001, 0x8276, 0x5002, 0x8277, 0x5003, 0x8278, 0x5004, + 0x8279, 0x5005, 0x827A, 0x5006, 0x827B, 0x5007, 0x827C, 0x5008, + 0x827D, 0x5009, 0x827E, 0x500A, 0x8280, 0x500B, 0x8281, 0x500E, + 0x8282, 0x5010, 0x8283, 0x5011, 0x8284, 0x5013, 0x8285, 0x5015, + 0x8286, 0x5016, 0x8287, 0x5017, 0x8288, 0x501B, 0x8289, 0x501D, + 0x828A, 0x501E, 0x828B, 0x5020, 0x828C, 0x5022, 0x828D, 0x5023, + 0x828E, 0x5024, 0x828F, 0x5027, 0x8290, 0x502B, 0x8291, 0x502F, + 0x8292, 0x5030, 0x8293, 0x5031, 0x8294, 0x5032, 0x8295, 0x5033, + 0x8296, 0x5034, 0x8297, 0x5035, 0x8298, 0x5036, 0x8299, 0x5037, + 0x829A, 0x5038, 0x829B, 0x5039, 0x829C, 0x503B, 0x829D, 0x503D, + 0x829E, 0x503F, 0x829F, 0x5040, 0x82A0, 0x5041, 0x82A1, 0x5042, + 0x82A2, 0x5044, 0x82A3, 0x5045, 0x82A4, 0x5046, 0x82A5, 0x5049, + 0x82A6, 0x504A, 0x82A7, 0x504B, 0x82A8, 0x504D, 0x82A9, 0x5050, + 0x82AA, 0x5051, 0x82AB, 0x5052, 0x82AC, 0x5053, 0x82AD, 0x5054, + 0x82AE, 0x5056, 0x82AF, 0x5057, 0x82B0, 0x5058, 0x82B1, 0x5059, + 0x82B2, 0x505B, 0x82B3, 0x505D, 0x82B4, 0x505E, 0x82B5, 0x505F, + 0x82B6, 0x5060, 0x82B7, 0x5061, 0x82B8, 0x5062, 0x82B9, 0x5063, + 0x82BA, 0x5064, 0x82BB, 0x5066, 0x82BC, 0x5067, 0x82BD, 0x5068, + 0x82BE, 0x5069, 0x82BF, 0x506A, 0x82C0, 0x506B, 0x82C1, 0x506D, + 0x82C2, 0x506E, 0x82C3, 0x506F, 0x82C4, 0x5070, 0x82C5, 0x5071, + 0x82C6, 0x5072, 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0xA0BA, 0x7276, 0xA0BB, 0x7277, 0xA0BC, 0x7278, 0xA0BD, 0x727B, + 0xA0BE, 0x727C, 0xA0BF, 0x727D, 0xA0C0, 0x7282, 0xA0C1, 0x7283, + 0xA0C2, 0x7285, 0xA0C3, 0x7286, 0xA0C4, 0x7287, 0xA0C5, 0x7288, + 0xA0C6, 0x7289, 0xA0C7, 0x728C, 0xA0C8, 0x728E, 0xA0C9, 0x7290, + 0xA0CA, 0x7291, 0xA0CB, 0x7293, 0xA0CC, 0x7294, 0xA0CD, 0x7295, + 0xA0CE, 0x7296, 0xA0CF, 0x7297, 0xA0D0, 0x7298, 0xA0D1, 0x7299, + 0xA0D2, 0x729A, 0xA0D3, 0x729B, 0xA0D4, 0x729C, 0xA0D5, 0x729D, + 0xA0D6, 0x729E, 0xA0D7, 0x72A0, 0xA0D8, 0x72A1, 0xA0D9, 0x72A2, + 0xA0DA, 0x72A3, 0xA0DB, 0x72A4, 0xA0DC, 0x72A5, 0xA0DD, 0x72A6, + 0xA0DE, 0x72A7, 0xA0DF, 0x72A8, 0xA0E0, 0x72A9, 0xA0E1, 0x72AA, + 0xA0E2, 0x72AB, 0xA0E3, 0x72AE, 0xA0E4, 0x72B1, 0xA0E5, 0x72B2, + 0xA0E6, 0x72B3, 0xA0E7, 0x72B5, 0xA0E8, 0x72BA, 0xA0E9, 0x72BB, + 0xA0EA, 0x72BC, 0xA0EB, 0x72BD, 0xA0EC, 0x72BE, 0xA0ED, 0x72BF, + 0xA0EE, 0x72C0, 0xA0EF, 0x72C5, 0xA0F0, 0x72C6, 0xA0F1, 0x72C7, + 0xA0F2, 0x72C9, 0xA0F3, 0x72CA, 0xA0F4, 0x72CB, 0xA0F5, 0x72CC, + 0xA0F6, 0x72CF, 0xA0F7, 0x72D1, 0xA0F8, 0x72D3, 0xA0F9, 0x72D4, + 0xA0FA, 0x72D5, 0xA0FB, 0x72D6, 0xA0FC, 0x72D8, 0xA0FD, 0x72DA, + 0xA0FE, 0x72DB, 0xA1A1, 0x3000, 0xA1A2, 0x3001, 0xA1A3, 0x3002, + 0xA1A4, 0x00B7, 0xA1A5, 0x02C9, 0xA1A6, 0x02C7, 0xA1A7, 0x00A8, + 0xA1A8, 0x3003, 0xA1A9, 0x3005, 0xA1AA, 0x2014, 0xA1AB, 0xFF5E, + 0xA1AC, 0x2016, 0xA1AD, 0x2026, 0xA1AE, 0x2018, 0xA1AF, 0x2019, + 0xA1B0, 0x201C, 0xA1B1, 0x201D, 0xA1B2, 0x3014, 0xA1B3, 0x3015, + 0xA1B4, 0x3008, 0xA1B5, 0x3009, 0xA1B6, 0x300A, 0xA1B7, 0x300B, + 0xA1B8, 0x300C, 0xA1B9, 0x300D, 0xA1BA, 0x300E, 0xA1BB, 0x300F, + 0xA1BC, 0x3016, 0xA1BD, 0x3017, 0xA1BE, 0x3010, 0xA1BF, 0x3011, + 0xA1C0, 0x00B1, 0xA1C1, 0x00D7, 0xA1C2, 0x00F7, 0xA1C3, 0x2236, + 0xA1C4, 0x2227, 0xA1C5, 0x2228, 0xA1C6, 0x2211, 0xA1C7, 0x220F, + 0xA1C8, 0x222A, 0xA1C9, 0x2229, 0xA1CA, 0x2208, 0xA1CB, 0x2237, + 0xA1CC, 0x221A, 0xA1CD, 0x22A5, 0xA1CE, 0x2225, 0xA1CF, 0x2220, + 0xA1D0, 0x2312, 0xA1D1, 0x2299, 0xA1D2, 0x222B, 0xA1D3, 0x222E, + 0xA1D4, 0x2261, 0xA1D5, 0x224C, 0xA1D6, 0x2248, 0xA1D7, 0x223D, + 0xA1D8, 0x221D, 0xA1D9, 0x2260, 0xA1DA, 0x226E, 0xA1DB, 0x226F, + 0xA1DC, 0x2264, 0xA1DD, 0x2265, 0xA1DE, 0x221E, 0xA1DF, 0x2235, + 0xA1E0, 0x2234, 0xA1E1, 0x2642, 0xA1E2, 0x2640, 0xA1E3, 0x00B0, + 0xA1E4, 0x2032, 0xA1E5, 0x2033, 0xA1E6, 0x2103, 0xA1E7, 0xFF04, + 0xA1E8, 0x00A4, 0xA1E9, 0xFFE0, 0xA1EA, 0xFFE1, 0xA1EB, 0x2030, + 0xA1EC, 0x00A7, 0xA1ED, 0x2116, 0xA1EE, 0x2606, 0xA1EF, 0x2605, + 0xA1F0, 0x25CB, 0xA1F1, 0x25CF, 0xA1F2, 0x25CE, 0xA1F3, 0x25C7, + 0xA1F4, 0x25C6, 0xA1F5, 0x25A1, 0xA1F6, 0x25A0, 0xA1F7, 0x25B3, + 0xA1F8, 0x25B2, 0xA1F9, 0x203B, 0xA1FA, 0x2192, 0xA1FB, 0x2190, + 0xA1FC, 0x2191, 0xA1FD, 0x2193, 0xA1FE, 0x3013, 0xA2A1, 0x2170, + 0xA2A2, 0x2171, 0xA2A3, 0x2172, 0xA2A4, 0x2173, 0xA2A5, 0x2174, + 0xA2A6, 0x2175, 0xA2A7, 0x2176, 0xA2A8, 0x2177, 0xA2A9, 0x2178, + 0xA2AA, 0x2179, 0xA2B1, 0x2488, 0xA2B2, 0x2489, 0xA2B3, 0x248A, + 0xA2B4, 0x248B, 0xA2B5, 0x248C, 0xA2B6, 0x248D, 0xA2B7, 0x248E, + 0xA2B8, 0x248F, 0xA2B9, 0x2490, 0xA2BA, 0x2491, 0xA2BB, 0x2492, + 0xA2BC, 0x2493, 0xA2BD, 0x2494, 0xA2BE, 0x2495, 0xA2BF, 0x2496, + 0xA2C0, 0x2497, 0xA2C1, 0x2498, 0xA2C2, 0x2499, 0xA2C3, 0x249A, + 0xA2C4, 0x249B, 0xA2C5, 0x2474, 0xA2C6, 0x2475, 0xA2C7, 0x2476, + 0xA2C8, 0x2477, 0xA2C9, 0x2478, 0xA2CA, 0x2479, 0xA2CB, 0x247A, + 0xA2CC, 0x247B, 0xA2CD, 0x247C, 0xA2CE, 0x247D, 0xA2CF, 0x247E, + 0xA2D0, 0x247F, 0xA2D1, 0x2480, 0xA2D2, 0x2481, 0xA2D3, 0x2482, + 0xA2D4, 0x2483, 0xA2D5, 0x2484, 0xA2D6, 0x2485, 0xA2D7, 0x2486, + 0xA2D8, 0x2487, 0xA2D9, 0x2460, 0xA2DA, 0x2461, 0xA2DB, 0x2462, + 0xA2DC, 0x2463, 0xA2DD, 0x2464, 0xA2DE, 0x2465, 0xA2DF, 0x2466, + 0xA2E0, 0x2467, 0xA2E1, 0x2468, 0xA2E2, 0x2469, 0xA2E5, 0x3220, + 0xA2E6, 0x3221, 0xA2E7, 0x3222, 0xA2E8, 0x3223, 0xA2E9, 0x3224, + 0xA2EA, 0x3225, 0xA2EB, 0x3226, 0xA2EC, 0x3227, 0xA2ED, 0x3228, + 0xA2EE, 0x3229, 0xA2F1, 0x2160, 0xA2F2, 0x2161, 0xA2F3, 0x2162, + 0xA2F4, 0x2163, 0xA2F5, 0x2164, 0xA2F6, 0x2165, 0xA2F7, 0x2166, + 0xA2F8, 0x2167, 0xA2F9, 0x2168, 0xA2FA, 0x2169, 0xA2FB, 0x216A, + 0xA2FC, 0x216B, 0xA3A1, 0xFF01, 0xA3A2, 0xFF02, 0xA3A3, 0xFF03, + 0xA3A4, 0xFFE5, 0xA3A5, 0xFF05, 0xA3A6, 0xFF06, 0xA3A7, 0xFF07, + 0xA3A8, 0xFF08, 0xA3A9, 0xFF09, 0xA3AA, 0xFF0A, 0xA3AB, 0xFF0B, + 0xA3AC, 0xFF0C, 0xA3AD, 0xFF0D, 0xA3AE, 0xFF0E, 0xA3AF, 0xFF0F, + 0xA3B0, 0xFF10, 0xA3B1, 0xFF11, 0xA3B2, 0xFF12, 0xA3B3, 0xFF13, + 0xA3B4, 0xFF14, 0xA3B5, 0xFF15, 0xA3B6, 0xFF16, 0xA3B7, 0xFF17, + 0xA3B8, 0xFF18, 0xA3B9, 0xFF19, 0xA3BA, 0xFF1A, 0xA3BB, 0xFF1B, + 0xA3BC, 0xFF1C, 0xA3BD, 0xFF1D, 0xA3BE, 0xFF1E, 0xA3BF, 0xFF1F, + 0xA3C0, 0xFF20, 0xA3C1, 0xFF21, 0xA3C2, 0xFF22, 0xA3C3, 0xFF23, + 0xA3C4, 0xFF24, 0xA3C5, 0xFF25, 0xA3C6, 0xFF26, 0xA3C7, 0xFF27, + 0xA3C8, 0xFF28, 0xA3C9, 0xFF29, 0xA3CA, 0xFF2A, 0xA3CB, 0xFF2B, + 0xA3CC, 0xFF2C, 0xA3CD, 0xFF2D, 0xA3CE, 0xFF2E, 0xA3CF, 0xFF2F, + 0xA3D0, 0xFF30, 0xA3D1, 0xFF31, 0xA3D2, 0xFF32, 0xA3D3, 0xFF33, + 0xA3D4, 0xFF34, 0xA3D5, 0xFF35, 0xA3D6, 0xFF36, 0xA3D7, 0xFF37, + 0xA3D8, 0xFF38, 0xA3D9, 0xFF39, 0xA3DA, 0xFF3A, 0xA3DB, 0xFF3B, + 0xA3DC, 0xFF3C, 0xA3DD, 0xFF3D, 0xA3DE, 0xFF3E, 0xA3DF, 0xFF3F, + 0xA3E0, 0xFF40, 0xA3E1, 0xFF41, 0xA3E2, 0xFF42, 0xA3E3, 0xFF43, + 0xA3E4, 0xFF44, 0xA3E5, 0xFF45, 0xA3E6, 0xFF46, 0xA3E7, 0xFF47, + 0xA3E8, 0xFF48, 0xA3E9, 0xFF49, 0xA3EA, 0xFF4A, 0xA3EB, 0xFF4B, + 0xA3EC, 0xFF4C, 0xA3ED, 0xFF4D, 0xA3EE, 0xFF4E, 0xA3EF, 0xFF4F, + 0xA3F0, 0xFF50, 0xA3F1, 0xFF51, 0xA3F2, 0xFF52, 0xA3F3, 0xFF53, + 0xA3F4, 0xFF54, 0xA3F5, 0xFF55, 0xA3F6, 0xFF56, 0xA3F7, 0xFF57, + 0xA3F8, 0xFF58, 0xA3F9, 0xFF59, 0xA3FA, 0xFF5A, 0xA3FB, 0xFF5B, + 0xA3FC, 0xFF5C, 0xA3FD, 0xFF5D, 0xA3FE, 0xFFE3, 0xA4A1, 0x3041, + 0xA4A2, 0x3042, 0xA4A3, 0x3043, 0xA4A4, 0x3044, 0xA4A5, 0x3045, + 0xA4A6, 0x3046, 0xA4A7, 0x3047, 0xA4A8, 0x3048, 0xA4A9, 0x3049, + 0xA4AA, 0x304A, 0xA4AB, 0x304B, 0xA4AC, 0x304C, 0xA4AD, 0x304D, + 0xA4AE, 0x304E, 0xA4AF, 0x304F, 0xA4B0, 0x3050, 0xA4B1, 0x3051, + 0xA4B2, 0x3052, 0xA4B3, 0x3053, 0xA4B4, 0x3054, 0xA4B5, 0x3055, + 0xA4B6, 0x3056, 0xA4B7, 0x3057, 0xA4B8, 0x3058, 0xA4B9, 0x3059, + 0xA4BA, 0x305A, 0xA4BB, 0x305B, 0xA4BC, 0x305C, 0xA4BD, 0x305D, + 0xA4BE, 0x305E, 0xA4BF, 0x305F, 0xA4C0, 0x3060, 0xA4C1, 0x3061, + 0xA4C2, 0x3062, 0xA4C3, 0x3063, 0xA4C4, 0x3064, 0xA4C5, 0x3065, + 0xA4C6, 0x3066, 0xA4C7, 0x3067, 0xA4C8, 0x3068, 0xA4C9, 0x3069, + 0xA4CA, 0x306A, 0xA4CB, 0x306B, 0xA4CC, 0x306C, 0xA4CD, 0x306D, + 0xA4CE, 0x306E, 0xA4CF, 0x306F, 0xA4D0, 0x3070, 0xA4D1, 0x3071, + 0xA4D2, 0x3072, 0xA4D3, 0x3073, 0xA4D4, 0x3074, 0xA4D5, 0x3075, + 0xA4D6, 0x3076, 0xA4D7, 0x3077, 0xA4D8, 0x3078, 0xA4D9, 0x3079, + 0xA4DA, 0x307A, 0xA4DB, 0x307B, 0xA4DC, 0x307C, 0xA4DD, 0x307D, + 0xA4DE, 0x307E, 0xA4DF, 0x307F, 0xA4E0, 0x3080, 0xA4E1, 0x3081, + 0xA4E2, 0x3082, 0xA4E3, 0x3083, 0xA4E4, 0x3084, 0xA4E5, 0x3085, + 0xA4E6, 0x3086, 0xA4E7, 0x3087, 0xA4E8, 0x3088, 0xA4E9, 0x3089, + 0xA4EA, 0x308A, 0xA4EB, 0x308B, 0xA4EC, 0x308C, 0xA4ED, 0x308D, + 0xA4EE, 0x308E, 0xA4EF, 0x308F, 0xA4F0, 0x3090, 0xA4F1, 0x3091, + 0xA4F2, 0x3092, 0xA4F3, 0x3093, 0xA5A1, 0x30A1, 0xA5A2, 0x30A2, + 0xA5A3, 0x30A3, 0xA5A4, 0x30A4, 0xA5A5, 0x30A5, 0xA5A6, 0x30A6, + 0xA5A7, 0x30A7, 0xA5A8, 0x30A8, 0xA5A9, 0x30A9, 0xA5AA, 0x30AA, + 0xA5AB, 0x30AB, 0xA5AC, 0x30AC, 0xA5AD, 0x30AD, 0xA5AE, 0x30AE, + 0xA5AF, 0x30AF, 0xA5B0, 0x30B0, 0xA5B1, 0x30B1, 0xA5B2, 0x30B2, + 0xA5B3, 0x30B3, 0xA5B4, 0x30B4, 0xA5B5, 0x30B5, 0xA5B6, 0x30B6, + 0xA5B7, 0x30B7, 0xA5B8, 0x30B8, 0xA5B9, 0x30B9, 0xA5BA, 0x30BA, + 0xA5BB, 0x30BB, 0xA5BC, 0x30BC, 0xA5BD, 0x30BD, 0xA5BE, 0x30BE, + 0xA5BF, 0x30BF, 0xA5C0, 0x30C0, 0xA5C1, 0x30C1, 0xA5C2, 0x30C2, + 0xA5C3, 0x30C3, 0xA5C4, 0x30C4, 0xA5C5, 0x30C5, 0xA5C6, 0x30C6, + 0xA5C7, 0x30C7, 0xA5C8, 0x30C8, 0xA5C9, 0x30C9, 0xA5CA, 0x30CA, + 0xA5CB, 0x30CB, 0xA5CC, 0x30CC, 0xA5CD, 0x30CD, 0xA5CE, 0x30CE, + 0xA5CF, 0x30CF, 0xA5D0, 0x30D0, 0xA5D1, 0x30D1, 0xA5D2, 0x30D2, + 0xA5D3, 0x30D3, 0xA5D4, 0x30D4, 0xA5D5, 0x30D5, 0xA5D6, 0x30D6, + 0xA5D7, 0x30D7, 0xA5D8, 0x30D8, 0xA5D9, 0x30D9, 0xA5DA, 0x30DA, + 0xA5DB, 0x30DB, 0xA5DC, 0x30DC, 0xA5DD, 0x30DD, 0xA5DE, 0x30DE, + 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0x9F3D, 0xF7FD, 0x9F3E, 0xF7FE, 0x9F44, + 0xF840, 0x9CE3, 0xF841, 0x9CE4, 0xF842, 0x9CE5, 0xF843, 0x9CE6, + 0xF844, 0x9CE7, 0xF845, 0x9CE8, 0xF846, 0x9CE9, 0xF847, 0x9CEA, + 0xF848, 0x9CEB, 0xF849, 0x9CEC, 0xF84A, 0x9CED, 0xF84B, 0x9CEE, + 0xF84C, 0x9CEF, 0xF84D, 0x9CF0, 0xF84E, 0x9CF1, 0xF84F, 0x9CF2, + 0xF850, 0x9CF3, 0xF851, 0x9CF4, 0xF852, 0x9CF5, 0xF853, 0x9CF6, + 0xF854, 0x9CF7, 0xF855, 0x9CF8, 0xF856, 0x9CF9, 0xF857, 0x9CFA, + 0xF858, 0x9CFB, 0xF859, 0x9CFC, 0xF85A, 0x9CFD, 0xF85B, 0x9CFE, + 0xF85C, 0x9CFF, 0xF85D, 0x9D00, 0xF85E, 0x9D01, 0xF85F, 0x9D02, + 0xF860, 0x9D03, 0xF861, 0x9D04, 0xF862, 0x9D05, 0xF863, 0x9D06, + 0xF864, 0x9D07, 0xF865, 0x9D08, 0xF866, 0x9D09, 0xF867, 0x9D0A, + 0xF868, 0x9D0B, 0xF869, 0x9D0C, 0xF86A, 0x9D0D, 0xF86B, 0x9D0E, + 0xF86C, 0x9D0F, 0xF86D, 0x9D10, 0xF86E, 0x9D11, 0xF86F, 0x9D12, + 0xF870, 0x9D13, 0xF871, 0x9D14, 0xF872, 0x9D15, 0xF873, 0x9D16, + 0xF874, 0x9D17, 0xF875, 0x9D18, 0xF876, 0x9D19, 0xF877, 0x9D1A, + 0xF878, 0x9D1B, 0xF879, 0x9D1C, 0xF87A, 0x9D1D, 0xF87B, 0x9D1E, + 0xF87C, 0x9D1F, 0xF87D, 0x9D20, 0xF87E, 0x9D21, 0xF880, 0x9D22, + 0xF881, 0x9D23, 0xF882, 0x9D24, 0xF883, 0x9D25, 0xF884, 0x9D26, + 0xF885, 0x9D27, 0xF886, 0x9D28, 0xF887, 0x9D29, 0xF888, 0x9D2A, + 0xF889, 0x9D2B, 0xF88A, 0x9D2C, 0xF88B, 0x9D2D, 0xF88C, 0x9D2E, + 0xF88D, 0x9D2F, 0xF88E, 0x9D30, 0xF88F, 0x9D31, 0xF890, 0x9D32, + 0xF891, 0x9D33, 0xF892, 0x9D34, 0xF893, 0x9D35, 0xF894, 0x9D36, + 0xF895, 0x9D37, 0xF896, 0x9D38, 0xF897, 0x9D39, 0xF898, 0x9D3A, + 0xF899, 0x9D3B, 0xF89A, 0x9D3C, 0xF89B, 0x9D3D, 0xF89C, 0x9D3E, + 0xF89D, 0x9D3F, 0xF89E, 0x9D40, 0xF89F, 0x9D41, 0xF8A0, 0x9D42, + 0xF940, 0x9D43, 0xF941, 0x9D44, 0xF942, 0x9D45, 0xF943, 0x9D46, + 0xF944, 0x9D47, 0xF945, 0x9D48, 0xF946, 0x9D49, 0xF947, 0x9D4A, + 0xF948, 0x9D4B, 0xF949, 0x9D4C, 0xF94A, 0x9D4D, 0xF94B, 0x9D4E, + 0xF94C, 0x9D4F, 0xF94D, 0x9D50, 0xF94E, 0x9D51, 0xF94F, 0x9D52, + 0xF950, 0x9D53, 0xF951, 0x9D54, 0xF952, 0x9D55, 0xF953, 0x9D56, + 0xF954, 0x9D57, 0xF955, 0x9D58, 0xF956, 0x9D59, 0xF957, 0x9D5A, + 0xF958, 0x9D5B, 0xF959, 0x9D5C, 0xF95A, 0x9D5D, 0xF95B, 0x9D5E, + 0xF95C, 0x9D5F, 0xF95D, 0x9D60, 0xF95E, 0x9D61, 0xF95F, 0x9D62, + 0xF960, 0x9D63, 0xF961, 0x9D64, 0xF962, 0x9D65, 0xF963, 0x9D66, + 0xF964, 0x9D67, 0xF965, 0x9D68, 0xF966, 0x9D69, 0xF967, 0x9D6A, + 0xF968, 0x9D6B, 0xF969, 0x9D6C, 0xF96A, 0x9D6D, 0xF96B, 0x9D6E, + 0xF96C, 0x9D6F, 0xF96D, 0x9D70, 0xF96E, 0x9D71, 0xF96F, 0x9D72, + 0xF970, 0x9D73, 0xF971, 0x9D74, 0xF972, 0x9D75, 0xF973, 0x9D76, + 0xF974, 0x9D77, 0xF975, 0x9D78, 0xF976, 0x9D79, 0xF977, 0x9D7A, + 0xF978, 0x9D7B, 0xF979, 0x9D7C, 0xF97A, 0x9D7D, 0xF97B, 0x9D7E, + 0xF97C, 0x9D7F, 0xF97D, 0x9D80, 0xF97E, 0x9D81, 0xF980, 0x9D82, + 0xF981, 0x9D83, 0xF982, 0x9D84, 0xF983, 0x9D85, 0xF984, 0x9D86, + 0xF985, 0x9D87, 0xF986, 0x9D88, 0xF987, 0x9D89, 0xF988, 0x9D8A, + 0xF989, 0x9D8B, 0xF98A, 0x9D8C, 0xF98B, 0x9D8D, 0xF98C, 0x9D8E, + 0xF98D, 0x9D8F, 0xF98E, 0x9D90, 0xF98F, 0x9D91, 0xF990, 0x9D92, + 0xF991, 0x9D93, 0xF992, 0x9D94, 0xF993, 0x9D95, 0xF994, 0x9D96, + 0xF995, 0x9D97, 0xF996, 0x9D98, 0xF997, 0x9D99, 0xF998, 0x9D9A, + 0xF999, 0x9D9B, 0xF99A, 0x9D9C, 0xF99B, 0x9D9D, 0xF99C, 0x9D9E, + 0xF99D, 0x9D9F, 0xF99E, 0x9DA0, 0xF99F, 0x9DA1, 0xF9A0, 0x9DA2, + 0xFA40, 0x9DA3, 0xFA41, 0x9DA4, 0xFA42, 0x9DA5, 0xFA43, 0x9DA6, + 0xFA44, 0x9DA7, 0xFA45, 0x9DA8, 0xFA46, 0x9DA9, 0xFA47, 0x9DAA, + 0xFA48, 0x9DAB, 0xFA49, 0x9DAC, 0xFA4A, 0x9DAD, 0xFA4B, 0x9DAE, + 0xFA4C, 0x9DAF, 0xFA4D, 0x9DB0, 0xFA4E, 0x9DB1, 0xFA4F, 0x9DB2, + 0xFA50, 0x9DB3, 0xFA51, 0x9DB4, 0xFA52, 0x9DB5, 0xFA53, 0x9DB6, + 0xFA54, 0x9DB7, 0xFA55, 0x9DB8, 0xFA56, 0x9DB9, 0xFA57, 0x9DBA, + 0xFA58, 0x9DBB, 0xFA59, 0x9DBC, 0xFA5A, 0x9DBD, 0xFA5B, 0x9DBE, + 0xFA5C, 0x9DBF, 0xFA5D, 0x9DC0, 0xFA5E, 0x9DC1, 0xFA5F, 0x9DC2, + 0xFA60, 0x9DC3, 0xFA61, 0x9DC4, 0xFA62, 0x9DC5, 0xFA63, 0x9DC6, + 0xFA64, 0x9DC7, 0xFA65, 0x9DC8, 0xFA66, 0x9DC9, 0xFA67, 0x9DCA, + 0xFA68, 0x9DCB, 0xFA69, 0x9DCC, 0xFA6A, 0x9DCD, 0xFA6B, 0x9DCE, + 0xFA6C, 0x9DCF, 0xFA6D, 0x9DD0, 0xFA6E, 0x9DD1, 0xFA6F, 0x9DD2, + 0xFA70, 0x9DD3, 0xFA71, 0x9DD4, 0xFA72, 0x9DD5, 0xFA73, 0x9DD6, + 0xFA74, 0x9DD7, 0xFA75, 0x9DD8, 0xFA76, 0x9DD9, 0xFA77, 0x9DDA, + 0xFA78, 0x9DDB, 0xFA79, 0x9DDC, 0xFA7A, 0x9DDD, 0xFA7B, 0x9DDE, + 0xFA7C, 0x9DDF, 0xFA7D, 0x9DE0, 0xFA7E, 0x9DE1, 0xFA80, 0x9DE2, + 0xFA81, 0x9DE3, 0xFA82, 0x9DE4, 0xFA83, 0x9DE5, 0xFA84, 0x9DE6, + 0xFA85, 0x9DE7, 0xFA86, 0x9DE8, 0xFA87, 0x9DE9, 0xFA88, 0x9DEA, + 0xFA89, 0x9DEB, 0xFA8A, 0x9DEC, 0xFA8B, 0x9DED, 0xFA8C, 0x9DEE, + 0xFA8D, 0x9DEF, 0xFA8E, 0x9DF0, 0xFA8F, 0x9DF1, 0xFA90, 0x9DF2, + 0xFA91, 0x9DF3, 0xFA92, 0x9DF4, 0xFA93, 0x9DF5, 0xFA94, 0x9DF6, + 0xFA95, 0x9DF7, 0xFA96, 0x9DF8, 0xFA97, 0x9DF9, 0xFA98, 0x9DFA, + 0xFA99, 0x9DFB, 0xFA9A, 0x9DFC, 0xFA9B, 0x9DFD, 0xFA9C, 0x9DFE, + 0xFA9D, 0x9DFF, 0xFA9E, 0x9E00, 0xFA9F, 0x9E01, 0xFAA0, 0x9E02, + 0xFB40, 0x9E03, 0xFB41, 0x9E04, 0xFB42, 0x9E05, 0xFB43, 0x9E06, + 0xFB44, 0x9E07, 0xFB45, 0x9E08, 0xFB46, 0x9E09, 0xFB47, 0x9E0A, + 0xFB48, 0x9E0B, 0xFB49, 0x9E0C, 0xFB4A, 0x9E0D, 0xFB4B, 0x9E0E, + 0xFB4C, 0x9E0F, 0xFB4D, 0x9E10, 0xFB4E, 0x9E11, 0xFB4F, 0x9E12, + 0xFB50, 0x9E13, 0xFB51, 0x9E14, 0xFB52, 0x9E15, 0xFB53, 0x9E16, + 0xFB54, 0x9E17, 0xFB55, 0x9E18, 0xFB56, 0x9E19, 0xFB57, 0x9E1A, + 0xFB58, 0x9E1B, 0xFB59, 0x9E1C, 0xFB5A, 0x9E1D, 0xFB5B, 0x9E1E, + 0xFB5C, 0x9E24, 0xFB5D, 0x9E27, 0xFB5E, 0x9E2E, 0xFB5F, 0x9E30, + 0xFB60, 0x9E34, 0xFB61, 0x9E3B, 0xFB62, 0x9E3C, 0xFB63, 0x9E40, + 0xFB64, 0x9E4D, 0xFB65, 0x9E50, 0xFB66, 0x9E52, 0xFB67, 0x9E53, + 0xFB68, 0x9E54, 0xFB69, 0x9E56, 0xFB6A, 0x9E59, 0xFB6B, 0x9E5D, + 0xFB6C, 0x9E5F, 0xFB6D, 0x9E60, 0xFB6E, 0x9E61, 0xFB6F, 0x9E62, + 0xFB70, 0x9E65, 0xFB71, 0x9E6E, 0xFB72, 0x9E6F, 0xFB73, 0x9E72, + 0xFB74, 0x9E74, 0xFB75, 0x9E75, 0xFB76, 0x9E76, 0xFB77, 0x9E77, + 0xFB78, 0x9E78, 0xFB79, 0x9E79, 0xFB7A, 0x9E7A, 0xFB7B, 0x9E7B, + 0xFB7C, 0x9E7C, 0xFB7D, 0x9E7D, 0xFB7E, 0x9E80, 0xFB80, 0x9E81, + 0xFB81, 0x9E83, 0xFB82, 0x9E84, 0xFB83, 0x9E85, 0xFB84, 0x9E86, + 0xFB85, 0x9E89, 0xFB86, 0x9E8A, 0xFB87, 0x9E8C, 0xFB88, 0x9E8D, + 0xFB89, 0x9E8E, 0xFB8A, 0x9E8F, 0xFB8B, 0x9E90, 0xFB8C, 0x9E91, + 0xFB8D, 0x9E94, 0xFB8E, 0x9E95, 0xFB8F, 0x9E96, 0xFB90, 0x9E97, + 0xFB91, 0x9E98, 0xFB92, 0x9E99, 0xFB93, 0x9E9A, 0xFB94, 0x9E9B, + 0xFB95, 0x9E9C, 0xFB96, 0x9E9E, 0xFB97, 0x9EA0, 0xFB98, 0x9EA1, + 0xFB99, 0x9EA2, 0xFB9A, 0x9EA3, 0xFB9B, 0x9EA4, 0xFB9C, 0x9EA5, + 0xFB9D, 0x9EA7, 0xFB9E, 0x9EA8, 0xFB9F, 0x9EA9, 0xFBA0, 0x9EAA, + 0xFC40, 0x9EAB, 0xFC41, 0x9EAC, 0xFC42, 0x9EAD, 0xFC43, 0x9EAE, + 0xFC44, 0x9EAF, 0xFC45, 0x9EB0, 0xFC46, 0x9EB1, 0xFC47, 0x9EB2, + 0xFC48, 0x9EB3, 0xFC49, 0x9EB5, 0xFC4A, 0x9EB6, 0xFC4B, 0x9EB7, + 0xFC4C, 0x9EB9, 0xFC4D, 0x9EBA, 0xFC4E, 0x9EBC, 0xFC4F, 0x9EBF, + 0xFC50, 0x9EC0, 0xFC51, 0x9EC1, 0xFC52, 0x9EC2, 0xFC53, 0x9EC3, + 0xFC54, 0x9EC5, 0xFC55, 0x9EC6, 0xFC56, 0x9EC7, 0xFC57, 0x9EC8, + 0xFC58, 0x9ECA, 0xFC59, 0x9ECB, 0xFC5A, 0x9ECC, 0xFC5B, 0x9ED0, + 0xFC5C, 0x9ED2, 0xFC5D, 0x9ED3, 0xFC5E, 0x9ED5, 0xFC5F, 0x9ED6, + 0xFC60, 0x9ED7, 0xFC61, 0x9ED9, 0xFC62, 0x9EDA, 0xFC63, 0x9EDE, + 0xFC64, 0x9EE1, 0xFC65, 0x9EE3, 0xFC66, 0x9EE4, 0xFC67, 0x9EE6, + 0xFC68, 0x9EE8, 0xFC69, 0x9EEB, 0xFC6A, 0x9EEC, 0xFC6B, 0x9EED, + 0xFC6C, 0x9EEE, 0xFC6D, 0x9EF0, 0xFC6E, 0x9EF1, 0xFC6F, 0x9EF2, + 0xFC70, 0x9EF3, 0xFC71, 0x9EF4, 0xFC72, 0x9EF5, 0xFC73, 0x9EF6, + 0xFC74, 0x9EF7, 0xFC75, 0x9EF8, 0xFC76, 0x9EFA, 0xFC77, 0x9EFD, + 0xFC78, 0x9EFF, 0xFC79, 0x9F00, 0xFC7A, 0x9F01, 0xFC7B, 0x9F02, + 0xFC7C, 0x9F03, 0xFC7D, 0x9F04, 0xFC7E, 0x9F05, 0xFC80, 0x9F06, + 0xFC81, 0x9F07, 0xFC82, 0x9F08, 0xFC83, 0x9F09, 0xFC84, 0x9F0A, + 0xFC85, 0x9F0C, 0xFC86, 0x9F0F, 0xFC87, 0x9F11, 0xFC88, 0x9F12, + 0xFC89, 0x9F14, 0xFC8A, 0x9F15, 0xFC8B, 0x9F16, 0xFC8C, 0x9F18, + 0xFC8D, 0x9F1A, 0xFC8E, 0x9F1B, 0xFC8F, 0x9F1C, 0xFC90, 0x9F1D, + 0xFC91, 0x9F1E, 0xFC92, 0x9F1F, 0xFC93, 0x9F21, 0xFC94, 0x9F23, + 0xFC95, 0x9F24, 0xFC96, 0x9F25, 0xFC97, 0x9F26, 0xFC98, 0x9F27, + 0xFC99, 0x9F28, 0xFC9A, 0x9F29, 0xFC9B, 0x9F2A, 0xFC9C, 0x9F2B, + 0xFC9D, 0x9F2D, 0xFC9E, 0x9F2E, 0xFC9F, 0x9F30, 0xFCA0, 0x9F31, + 0xFD40, 0x9F32, 0xFD41, 0x9F33, 0xFD42, 0x9F34, 0xFD43, 0x9F35, + 0xFD44, 0x9F36, 0xFD45, 0x9F38, 0xFD46, 0x9F3A, 0xFD47, 0x9F3C, + 0xFD48, 0x9F3F, 0xFD49, 0x9F40, 0xFD4A, 0x9F41, 0xFD4B, 0x9F42, + 0xFD4C, 0x9F43, 0xFD4D, 0x9F45, 0xFD4E, 0x9F46, 0xFD4F, 0x9F47, + 0xFD50, 0x9F48, 0xFD51, 0x9F49, 0xFD52, 0x9F4A, 0xFD53, 0x9F4B, + 0xFD54, 0x9F4C, 0xFD55, 0x9F4D, 0xFD56, 0x9F4E, 0xFD57, 0x9F4F, + 0xFD58, 0x9F52, 0xFD59, 0x9F53, 0xFD5A, 0x9F54, 0xFD5B, 0x9F55, + 0xFD5C, 0x9F56, 0xFD5D, 0x9F57, 0xFD5E, 0x9F58, 0xFD5F, 0x9F59, + 0xFD60, 0x9F5A, 0xFD61, 0x9F5B, 0xFD62, 0x9F5C, 0xFD63, 0x9F5D, + 0xFD64, 0x9F5E, 0xFD65, 0x9F5F, 0xFD66, 0x9F60, 0xFD67, 0x9F61, + 0xFD68, 0x9F62, 0xFD69, 0x9F63, 0xFD6A, 0x9F64, 0xFD6B, 0x9F65, + 0xFD6C, 0x9F66, 0xFD6D, 0x9F67, 0xFD6E, 0x9F68, 0xFD6F, 0x9F69, + 0xFD70, 0x9F6A, 0xFD71, 0x9F6B, 0xFD72, 0x9F6C, 0xFD73, 0x9F6D, + 0xFD74, 0x9F6E, 0xFD75, 0x9F6F, 0xFD76, 0x9F70, 0xFD77, 0x9F71, + 0xFD78, 0x9F72, 0xFD79, 0x9F73, 0xFD7A, 0x9F74, 0xFD7B, 0x9F75, + 0xFD7C, 0x9F76, 0xFD7D, 0x9F77, 0xFD7E, 0x9F78, 0xFD80, 0x9F79, + 0xFD81, 0x9F7A, 0xFD82, 0x9F7B, 0xFD83, 0x9F7C, 0xFD84, 0x9F7D, + 0xFD85, 0x9F7E, 0xFD86, 0x9F81, 0xFD87, 0x9F82, 0xFD88, 0x9F8D, + 0xFD89, 0x9F8E, 0xFD8A, 0x9F8F, 0xFD8B, 0x9F90, 0xFD8C, 0x9F91, + 0xFD8D, 0x9F92, 0xFD8E, 0x9F93, 0xFD8F, 0x9F94, 0xFD90, 0x9F95, + 0xFD91, 0x9F96, 0xFD92, 0x9F97, 0xFD93, 0x9F98, 0xFD94, 0x9F9C, + 0xFD95, 0x9F9D, 0xFD96, 0x9F9E, 0xFD97, 0x9FA1, 0xFD98, 0x9FA2, + 0xFD99, 0x9FA3, 0xFD9A, 0x9FA4, 0xFD9B, 0x9FA5, 0xFD9C, 0xF92C, + 0xFD9D, 0xF979, 0xFD9E, 0xF995, 0xFD9F, 0xF9E7, 0xFDA0, 0xF9F1, + 0xFE40, 0xFA0C, 0xFE41, 0xFA0D, 0xFE42, 0xFA0E, 0xFE43, 0xFA0F, + 0xFE44, 0xFA11, 0xFE45, 0xFA13, 0xFE46, 0xFA14, 0xFE47, 0xFA18, + 0xFE48, 0xFA1F, 0xFE49, 0xFA20, 0xFE4A, 0xFA21, 0xFE4B, 0xFA23, + 0xFE4C, 0xFA24, 0xFE4D, 0xFA27, 0xFE4E, 0xFA28, 0xFE4F, 0xFA29, + 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} + + + +WCHAR ff_wtoupper ( /* Upper converted character */ + WCHAR chr /* Input character */ +) +{ + static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; + static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; + int i; + + + for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; + + return tbl_lower[i] ? tbl_upper[i] : chr; +} diff --git a/src/ersky9x/libraries/fat/fatfs/src/option/cc949.c b/src/ersky9x/libraries/fat/fatfs/src/option/cc949.c new file mode 100644 index 000000000..5dcb0a878 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/option/cc949.c @@ -0,0 +1,8603 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP949 (Korean) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if !_USE_LFN || _CODE_PAGE != 949 +#error This file is not needed in current configuration. +#endif + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A1, 0xA2AE, 0x00A4, 0xA2B4, 0x00A7, 0xA1D7, 0x00A8, 0xA1A7, + 0x00AA, 0xA8A3, 0x00AD, 0xA1A9, 0x00AE, 0xA2E7, 0x00B0, 0xA1C6, + 0x00B1, 0xA1BE, 0x00B2, 0xA9F7, 0x00B3, 0xA9F8, 0x00B4, 0xA2A5, + 0x00B6, 0xA2D2, 0x00B7, 0xA1A4, 0x00B8, 0xA2AC, 0x00B9, 0xA9F6, + 0x00BA, 0xA8AC, 0x00BC, 0xA8F9, 0x00BD, 0xA8F6, 0x00BE, 0xA8FA, + 0x00BF, 0xA2AF, 0x00C6, 0xA8A1, 0x00D0, 0xA8A2, 0x00D7, 0xA1BF, + 0x00D8, 0xA8AA, 0x00DE, 0xA8AD, 0x00DF, 0xA9AC, 0x00E6, 0xA9A1, + 0x00F0, 0xA9A3, 0x00F7, 0xA1C0, 0x00F8, 0xA9AA, 0x00FE, 0xA9AD, + 0x0111, 0xA9A2, 0x0126, 0xA8A4, 0x0127, 0xA9A4, 0x0131, 0xA9A5, + 0x0132, 0xA8A6, 0x0133, 0xA9A6, 0x0138, 0xA9A7, 0x013F, 0xA8A8, + 0x0140, 0xA9A8, 0x0141, 0xA8A9, 0x0142, 0xA9A9, 0x0149, 0xA9B0, + 0x014A, 0xA8AF, 0x014B, 0xA9AF, 0x0152, 0xA8AB, 0x0153, 0xA9AB, + 0x0166, 0xA8AE, 0x0167, 0xA9AE, 0x02C7, 0xA2A7, 0x02D0, 0xA2B0, + 0x02D8, 0xA2A8, 0x02D9, 0xA2AB, 0x02DA, 0xA2AA, 0x02DB, 0xA2AD, + 0x02DD, 0xA2A9, 0x0391, 0xA5C1, 0x0392, 0xA5C2, 0x0393, 0xA5C3, + 0x0394, 0xA5C4, 0x0395, 0xA5C5, 0x0396, 0xA5C6, 0x0397, 0xA5C7, + 0x0398, 0xA5C8, 0x0399, 0xA5C9, 0x039A, 0xA5CA, 0x039B, 0xA5CB, + 0x039C, 0xA5CC, 0x039D, 0xA5CD, 0x039E, 0xA5CE, 0x039F, 0xA5CF, + 0x03A0, 0xA5D0, 0x03A1, 0xA5D1, 0x03A3, 0xA5D2, 0x03A4, 0xA5D3, + 0x03A5, 0xA5D4, 0x03A6, 0xA5D5, 0x03A7, 0xA5D6, 0x03A8, 0xA5D7, + 0x03A9, 0xA5D8, 0x03B1, 0xA5E1, 0x03B2, 0xA5E2, 0x03B3, 0xA5E3, + 0x03B4, 0xA5E4, 0x03B5, 0xA5E5, 0x03B6, 0xA5E6, 0x03B7, 0xA5E7, + 0x03B8, 0xA5E8, 0x03B9, 0xA5E9, 0x03BA, 0xA5EA, 0x03BB, 0xA5EB, + 0x03BC, 0xA5EC, 0x03BD, 0xA5ED, 0x03BE, 0xA5EE, 0x03BF, 0xA5EF, + 0x03C0, 0xA5F0, 0x03C1, 0xA5F1, 0x03C3, 0xA5F2, 0x03C4, 0xA5F3, + 0x03C5, 0xA5F4, 0x03C6, 0xA5F5, 0x03C7, 0xA5F6, 0x03C8, 0xA5F7, + 0x03C9, 0xA5F8, 0x0401, 0xACA7, 0x0410, 0xACA1, 0x0411, 0xACA2, + 0x0412, 0xACA3, 0x0413, 0xACA4, 0x0414, 0xACA5, 0x0415, 0xACA6, + 0x0416, 0xACA8, 0x0417, 0xACA9, 0x0418, 0xACAA, 0x0419, 0xACAB, + 0x041A, 0xACAC, 0x041B, 0xACAD, 0x041C, 0xACAE, 0x041D, 0xACAF, + 0x041E, 0xACB0, 0x041F, 0xACB1, 0x0420, 0xACB2, 0x0421, 0xACB3, + 0x0422, 0xACB4, 0x0423, 0xACB5, 0x0424, 0xACB6, 0x0425, 0xACB7, + 0x0426, 0xACB8, 0x0427, 0xACB9, 0x0428, 0xACBA, 0x0429, 0xACBB, + 0x042A, 0xACBC, 0x042B, 0xACBD, 0x042C, 0xACBE, 0x042D, 0xACBF, + 0x042E, 0xACC0, 0x042F, 0xACC1, 0x0430, 0xACD1, 0x0431, 0xACD2, + 0x0432, 0xACD3, 0x0433, 0xACD4, 0x0434, 0xACD5, 0x0435, 0xACD6, + 0x0436, 0xACD8, 0x0437, 0xACD9, 0x0438, 0xACDA, 0x0439, 0xACDB, + 0x043A, 0xACDC, 0x043B, 0xACDD, 0x043C, 0xACDE, 0x043D, 0xACDF, + 0x043E, 0xACE0, 0x043F, 0xACE1, 0x0440, 0xACE2, 0x0441, 0xACE3, + 0x0442, 0xACE4, 0x0443, 0xACE5, 0x0444, 0xACE6, 0x0445, 0xACE7, + 0x0446, 0xACE8, 0x0447, 0xACE9, 0x0448, 0xACEA, 0x0449, 0xACEB, + 0x044A, 0xACEC, 0x044B, 0xACED, 0x044C, 0xACEE, 0x044D, 0xACEF, + 0x044E, 0xACF0, 0x044F, 0xACF1, 0x0451, 0xACD7, 0x2015, 0xA1AA, + 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, + 0x2020, 0xA2D3, 0x2021, 0xA2D4, 0x2025, 0xA1A5, 0x2026, 0xA1A6, + 0x2030, 0xA2B6, 0x2032, 0xA1C7, 0x2033, 0xA1C8, 0x203B, 0xA1D8, + 0x2074, 0xA9F9, 0x207F, 0xA9FA, 0x2081, 0xA9FB, 0x2082, 0xA9FC, + 0x2083, 0xA9FD, 0x2084, 0xA9FE, 0x20AC, 0xA2E6, 0x2103, 0xA1C9, + 0x2109, 0xA2B5, 0x2113, 0xA7A4, 0x2116, 0xA2E0, 0x2121, 0xA2E5, + 0x2122, 0xA2E2, 0x2126, 0xA7D9, 0x212B, 0xA1CA, 0x2153, 0xA8F7, + 0x2154, 0xA8F8, 0x215B, 0xA8FB, 0x215C, 0xA8FC, 0x215D, 0xA8FD, + 0x215E, 0xA8FE, 0x2160, 0xA5B0, 0x2161, 0xA5B1, 0x2162, 0xA5B2, + 0x2163, 0xA5B3, 0x2164, 0xA5B4, 0x2165, 0xA5B5, 0x2166, 0xA5B6, + 0x2167, 0xA5B7, 0x2168, 0xA5B8, 0x2169, 0xA5B9, 0x2170, 0xA5A1, + 0x2171, 0xA5A2, 0x2172, 0xA5A3, 0x2173, 0xA5A4, 0x2174, 0xA5A5, + 0x2175, 0xA5A6, 0x2176, 0xA5A7, 0x2177, 0xA5A8, 0x2178, 0xA5A9, + 0x2179, 0xA5AA, 0x2190, 0xA1E7, 0x2191, 0xA1E8, 0x2192, 0xA1E6, + 0x2193, 0xA1E9, 0x2194, 0xA1EA, 0x2195, 0xA2D5, 0x2196, 0xA2D8, + 0x2197, 0xA2D6, 0x2198, 0xA2D9, 0x2199, 0xA2D7, 0x21D2, 0xA2A1, + 0x21D4, 0xA2A2, 0x2200, 0xA2A3, 0x2202, 0xA1D3, 0x2203, 0xA2A4, + 0x2207, 0xA1D4, 0x2208, 0xA1F4, 0x220B, 0xA1F5, 0x220F, 0xA2B3, + 0x2211, 0xA2B2, 0x221A, 0xA1EE, 0x221D, 0xA1F0, 0x221E, 0xA1C4, + 0x2220, 0xA1D0, 0x2225, 0xA1AB, 0x2227, 0xA1FC, 0x2228, 0xA1FD, + 0x2229, 0xA1FB, 0x222A, 0xA1FA, 0x222B, 0xA1F2, 0x222C, 0xA1F3, + 0x222E, 0xA2B1, 0x2234, 0xA1C5, 0x2235, 0xA1F1, 0x223C, 0xA1AD, + 0x223D, 0xA1EF, 0x2252, 0xA1D6, 0x2260, 0xA1C1, 0x2261, 0xA1D5, + 0x2264, 0xA1C2, 0x2265, 0xA1C3, 0x226A, 0xA1EC, 0x226B, 0xA1ED, + 0x2282, 0xA1F8, 0x2283, 0xA1F9, 0x2286, 0xA1F6, 0x2287, 0xA1F7, + 0x2299, 0xA2C1, 0x22A5, 0xA1D1, 0x2312, 0xA1D2, 0x2460, 0xA8E7, + 0x2461, 0xA8E8, 0x2462, 0xA8E9, 0x2463, 0xA8EA, 0x2464, 0xA8EB, + 0x2465, 0xA8EC, 0x2466, 0xA8ED, 0x2467, 0xA8EE, 0x2468, 0xA8EF, + 0x2469, 0xA8F0, 0x246A, 0xA8F1, 0x246B, 0xA8F2, 0x246C, 0xA8F3, + 0x246D, 0xA8F4, 0x246E, 0xA8F5, 0x2474, 0xA9E7, 0x2475, 0xA9E8, + 0x2476, 0xA9E9, 0x2477, 0xA9EA, 0x2478, 0xA9EB, 0x2479, 0xA9EC, + 0x247A, 0xA9ED, 0x247B, 0xA9EE, 0x247C, 0xA9EF, 0x247D, 0xA9F0, + 0x247E, 0xA9F1, 0x247F, 0xA9F2, 0x2480, 0xA9F3, 0x2481, 0xA9F4, + 0x2482, 0xA9F5, 0x249C, 0xA9CD, 0x249D, 0xA9CE, 0x249E, 0xA9CF, + 0x249F, 0xA9D0, 0x24A0, 0xA9D1, 0x24A1, 0xA9D2, 0x24A2, 0xA9D3, + 0x24A3, 0xA9D4, 0x24A4, 0xA9D5, 0x24A5, 0xA9D6, 0x24A6, 0xA9D7, + 0x24A7, 0xA9D8, 0x24A8, 0xA9D9, 0x24A9, 0xA9DA, 0x24AA, 0xA9DB, + 0x24AB, 0xA9DC, 0x24AC, 0xA9DD, 0x24AD, 0xA9DE, 0x24AE, 0xA9DF, + 0x24AF, 0xA9E0, 0x24B0, 0xA9E1, 0x24B1, 0xA9E2, 0x24B2, 0xA9E3, + 0x24B3, 0xA9E4, 0x24B4, 0xA9E5, 0x24B5, 0xA9E6, 0x24D0, 0xA8CD, + 0x24D1, 0xA8CE, 0x24D2, 0xA8CF, 0x24D3, 0xA8D0, 0x24D4, 0xA8D1, + 0x24D5, 0xA8D2, 0x24D6, 0xA8D3, 0x24D7, 0xA8D4, 0x24D8, 0xA8D5, + 0x24D9, 0xA8D6, 0x24DA, 0xA8D7, 0x24DB, 0xA8D8, 0x24DC, 0xA8D9, + 0x24DD, 0xA8DA, 0x24DE, 0xA8DB, 0x24DF, 0xA8DC, 0x24E0, 0xA8DD, + 0x24E1, 0xA8DE, 0x24E2, 0xA8DF, 0x24E3, 0xA8E0, 0x24E4, 0xA8E1, + 0x24E5, 0xA8E2, 0x24E6, 0xA8E3, 0x24E7, 0xA8E4, 0x24E8, 0xA8E5, + 0x24E9, 0xA8E6, 0x2500, 0xA6A1, 0x2501, 0xA6AC, 0x2502, 0xA6A2, + 0x2503, 0xA6AD, 0x250C, 0xA6A3, 0x250D, 0xA6C8, 0x250E, 0xA6C7, + 0x250F, 0xA6AE, 0x2510, 0xA6A4, 0x2511, 0xA6C2, 0x2512, 0xA6C1, + 0x2513, 0xA6AF, 0x2514, 0xA6A6, 0x2515, 0xA6C6, 0x2516, 0xA6C5, + 0x2517, 0xA6B1, 0x2518, 0xA6A5, 0x2519, 0xA6C4, 0x251A, 0xA6C3, + 0x251B, 0xA6B0, 0x251C, 0xA6A7, 0x251D, 0xA6BC, 0x251E, 0xA6C9, + 0x251F, 0xA6CA, 0x2520, 0xA6B7, 0x2521, 0xA6CB, 0x2522, 0xA6CC, + 0x2523, 0xA6B2, 0x2524, 0xA6A9, 0x2525, 0xA6BE, 0x2526, 0xA6CD, + 0x2527, 0xA6CE, 0x2528, 0xA6B9, 0x2529, 0xA6CF, 0x252A, 0xA6D0, + 0x252B, 0xA6B4, 0x252C, 0xA6A8, 0x252D, 0xA6D1, 0x252E, 0xA6D2, + 0x252F, 0xA6B8, 0x2530, 0xA6BD, 0x2531, 0xA6D3, 0x2532, 0xA6D4, + 0x2533, 0xA6B3, 0x2534, 0xA6AA, 0x2535, 0xA6D5, 0x2536, 0xA6D6, + 0x2537, 0xA6BA, 0x2538, 0xA6BF, 0x2539, 0xA6D7, 0x253A, 0xA6D8, + 0x253B, 0xA6B5, 0x253C, 0xA6AB, 0x253D, 0xA6D9, 0x253E, 0xA6DA, + 0x253F, 0xA6BB, 0x2540, 0xA6DB, 0x2541, 0xA6DC, 0x2542, 0xA6C0, + 0x2543, 0xA6DD, 0x2544, 0xA6DE, 0x2545, 0xA6DF, 0x2546, 0xA6E0, + 0x2547, 0xA6E1, 0x2548, 0xA6E2, 0x2549, 0xA6E3, 0x254A, 0xA6E4, + 0x254B, 0xA6B6, 0x2592, 0xA2C6, 0x25A0, 0xA1E1, 0x25A1, 0xA1E0, + 0x25A3, 0xA2C3, 0x25A4, 0xA2C7, 0x25A5, 0xA2C8, 0x25A6, 0xA2CB, + 0x25A7, 0xA2CA, 0x25A8, 0xA2C9, 0x25A9, 0xA2CC, 0x25B2, 0xA1E3, + 0x25B3, 0xA1E2, 0x25B6, 0xA2BA, 0x25B7, 0xA2B9, 0x25BC, 0xA1E5, + 0x25BD, 0xA1E4, 0x25C0, 0xA2B8, 0x25C1, 0xA2B7, 0x25C6, 0xA1DF, + 0x25C7, 0xA1DE, 0x25C8, 0xA2C2, 0x25CB, 0xA1DB, 0x25CE, 0xA1DD, + 0x25CF, 0xA1DC, 0x25D0, 0xA2C4, 0x25D1, 0xA2C5, 0x2605, 0xA1DA, + 0x2606, 0xA1D9, 0x260E, 0xA2CF, 0x260F, 0xA2CE, 0x261C, 0xA2D0, + 0x261E, 0xA2D1, 0x2640, 0xA1CF, 0x2642, 0xA1CE, 0x2660, 0xA2BC, + 0x2661, 0xA2BD, 0x2663, 0xA2C0, 0x2664, 0xA2BB, 0x2665, 0xA2BE, + 0x2667, 0xA2BF, 0x2668, 0xA2CD, 0x2669, 0xA2DB, 0x266A, 0xA2DC, + 0x266C, 0xA2DD, 0x266D, 0xA2DA, 0x3000, 0xA1A1, 0x3001, 0xA1A2, + 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3008, 0xA1B4, 0x3009, 0xA1B5, + 0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9, + 0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BC, 0x3011, 0xA1BD, + 0x3013, 0xA1EB, 0x3014, 0xA1B2, 0x3015, 0xA1B3, 0x3041, 0xAAA1, + 0x3042, 0xAAA2, 0x3043, 0xAAA3, 0x3044, 0xAAA4, 0x3045, 0xAAA5, + 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0xC8F6, 0xD782, 0xC599, 0xD783, 0xC59A, + 0xD784, 0xC59B, 0xD785, 0xC59C, 0xD786, 0xC59D, 0xD787, 0xC59E, + 0xD788, 0xC8F7, 0xD789, 0xC8F8, 0xD78A, 0xC59F, 0xD78B, 0xC5A0, + 0xD78C, 0xC8F9, 0xD78D, 0xC641, 0xD78E, 0xC642, 0xD78F, 0xC643, + 0xD790, 0xC8FA, 0xD791, 0xC644, 0xD792, 0xC645, 0xD793, 0xC646, + 0xD794, 0xC647, 0xD795, 0xC648, 0xD796, 0xC649, 0xD797, 0xC64A, + 0xD798, 0xC8FB, 0xD799, 0xC8FC, 0xD79A, 0xC64B, 0xD79B, 0xC8FD, + 0xD79C, 0xC64C, 0xD79D, 0xC8FE, 0xD79E, 0xC64D, 0xD79F, 0xC64E, + 0xD7A0, 0xC64F, 0xD7A1, 0xC650, 0xD7A2, 0xC651, 0xD7A3, 0xC652, + 0xF900, 0xCBD0, 0xF901, 0xCBD6, 0xF902, 0xCBE7, 0xF903, 0xCDCF, + 0xF904, 0xCDE8, 0xF905, 0xCEAD, 0xF906, 0xCFFB, 0xF907, 0xD0A2, + 0xF908, 0xD0B8, 0xF909, 0xD0D0, 0xF90A, 0xD0DD, 0xF90B, 0xD1D4, + 0xF90C, 0xD1D5, 0xF90D, 0xD1D8, 0xF90E, 0xD1DB, 0xF90F, 0xD1DC, + 0xF910, 0xD1DD, 0xF911, 0xD1DE, 0xF912, 0xD1DF, 0xF913, 0xD1E0, + 0xF914, 0xD1E2, 0xF915, 0xD1E3, 0xF916, 0xD1E4, 0xF917, 0xD1E5, + 0xF918, 0xD1E6, 0xF919, 0xD1E8, 0xF91A, 0xD1E9, 0xF91B, 0xD1EA, + 0xF91C, 0xD1EB, 0xF91D, 0xD1ED, 0xF91E, 0xD1EF, 0xF91F, 0xD1F0, + 0xF920, 0xD1F2, 0xF921, 0xD1F6, 0xF922, 0xD1FA, 0xF923, 0xD1FC, + 0xF924, 0xD1FD, 0xF925, 0xD1FE, 0xF926, 0xD2A2, 0xF927, 0xD2A3, + 0xF928, 0xD2A7, 0xF929, 0xD2A8, 0xF92A, 0xD2A9, 0xF92B, 0xD2AA, + 0xF92C, 0xD2AB, 0xF92D, 0xD2AD, 0xF92E, 0xD2B2, 0xF92F, 0xD2BE, + 0xF930, 0xD2C2, 0xF931, 0xD2C3, 0xF932, 0xD2C4, 0xF933, 0xD2C6, + 0xF934, 0xD2C7, 0xF935, 0xD2C8, 0xF936, 0xD2C9, 0xF937, 0xD2CA, + 0xF938, 0xD2CB, 0xF939, 0xD2CD, 0xF93A, 0xD2CE, 0xF93B, 0xD2CF, + 0xF93C, 0xD2D0, 0xF93D, 0xD2D1, 0xF93E, 0xD2D2, 0xF93F, 0xD2D3, + 0xF940, 0xD2D4, 0xF941, 0xD2D5, 0xF942, 0xD2D6, 0xF943, 0xD2D7, + 0xF944, 0xD2D9, 0xF945, 0xD2DA, 0xF946, 0xD2DE, 0xF947, 0xD2DF, + 0xF948, 0xD2E1, 0xF949, 0xD2E2, 0xF94A, 0xD2E4, 0xF94B, 0xD2E5, + 0xF94C, 0xD2E6, 0xF94D, 0xD2E7, 0xF94E, 0xD2E8, 0xF94F, 0xD2E9, + 0xF950, 0xD2EA, 0xF951, 0xD2EB, 0xF952, 0xD2F0, 0xF953, 0xD2F1, + 0xF954, 0xD2F2, 0xF955, 0xD2F3, 0xF956, 0xD2F4, 0xF957, 0xD2F5, + 0xF958, 0xD2F7, 0xF959, 0xD2F8, 0xF95A, 0xD4E6, 0xF95B, 0xD4FC, + 0xF95C, 0xD5A5, 0xF95D, 0xD5AB, 0xF95E, 0xD5AE, 0xF95F, 0xD6B8, + 0xF960, 0xD6CD, 0xF961, 0xD7CB, 0xF962, 0xD7E4, 0xF963, 0xDBC5, + 0xF964, 0xDBE4, 0xF965, 0xDCA5, 0xF966, 0xDDA5, 0xF967, 0xDDD5, + 0xF968, 0xDDF4, 0xF969, 0xDEFC, 0xF96A, 0xDEFE, 0xF96B, 0xDFB3, + 0xF96C, 0xDFE1, 0xF96D, 0xDFE8, 0xF96E, 0xE0F1, 0xF96F, 0xE1AD, + 0xF970, 0xE1ED, 0xF971, 0xE3F5, 0xF972, 0xE4A1, 0xF973, 0xE4A9, + 0xF974, 0xE5AE, 0xF975, 0xE5B1, 0xF976, 0xE5B2, 0xF977, 0xE5B9, + 0xF978, 0xE5BB, 0xF979, 0xE5BC, 0xF97A, 0xE5C4, 0xF97B, 0xE5CE, + 0xF97C, 0xE5D0, 0xF97D, 0xE5D2, 0xF97E, 0xE5D6, 0xF97F, 0xE5FA, + 0xF980, 0xE5FB, 0xF981, 0xE5FC, 0xF982, 0xE5FE, 0xF983, 0xE6A1, + 0xF984, 0xE6A4, 0xF985, 0xE6A7, 0xF986, 0xE6AD, 0xF987, 0xE6AF, + 0xF988, 0xE6B0, 0xF989, 0xE6B1, 0xF98A, 0xE6B3, 0xF98B, 0xE6B7, + 0xF98C, 0xE6B8, 0xF98D, 0xE6BC, 0xF98E, 0xE6C4, 0xF98F, 0xE6C6, + 0xF990, 0xE6C7, 0xF991, 0xE6CA, 0xF992, 0xE6D2, 0xF993, 0xE6D6, + 0xF994, 0xE6D9, 0xF995, 0xE6DC, 0xF996, 0xE6DF, 0xF997, 0xE6E1, + 0xF998, 0xE6E4, 0xF999, 0xE6E5, 0xF99A, 0xE6E6, 0xF99B, 0xE6E8, + 0xF99C, 0xE6EA, 0xF99D, 0xE6EB, 0xF99E, 0xE6EC, 0xF99F, 0xE6EF, + 0xF9A0, 0xE6F1, 0xF9A1, 0xE6F2, 0xF9A2, 0xE6F5, 0xF9A3, 0xE6F6, + 0xF9A4, 0xE6F7, 0xF9A5, 0xE6F9, 0xF9A6, 0xE7A1, 0xF9A7, 0xE7A6, + 0xF9A8, 0xE7A9, 0xF9A9, 0xE7AA, 0xF9AA, 0xE7AC, 0xF9AB, 0xE7AD, + 0xF9AC, 0xE7B0, 0xF9AD, 0xE7BF, 0xF9AE, 0xE7C1, 0xF9AF, 0xE7C6, + 0xF9B0, 0xE7C7, 0xF9B1, 0xE7CB, 0xF9B2, 0xE7CD, 0xF9B3, 0xE7CF, + 0xF9B4, 0xE7D0, 0xF9B5, 0xE7D3, 0xF9B6, 0xE7DF, 0xF9B7, 0xE7E4, + 0xF9B8, 0xE7E6, 0xF9B9, 0xE7F7, 0xF9BA, 0xE8E7, 0xF9BB, 0xE8E8, + 0xF9BC, 0xE8F0, 0xF9BD, 0xE8F1, 0xF9BE, 0xE8F7, 0xF9BF, 0xE8F9, + 0xF9C0, 0xE8FB, 0xF9C1, 0xE8FE, 0xF9C2, 0xE9A7, 0xF9C3, 0xE9AC, + 0xF9C4, 0xE9CC, 0xF9C5, 0xE9F7, 0xF9C6, 0xEAC1, 0xF9C7, 0xEAE5, + 0xF9C8, 0xEAF4, 0xF9C9, 0xEAF7, 0xF9CA, 0xEAFC, 0xF9CB, 0xEAFE, + 0xF9CC, 0xEBA4, 0xF9CD, 0xEBA7, 0xF9CE, 0xEBA9, 0xF9CF, 0xEBAA, + 0xF9D0, 0xEBBA, 0xF9D1, 0xEBBB, 0xF9D2, 0xEBBD, 0xF9D3, 0xEBC1, + 0xF9D4, 0xEBC2, 0xF9D5, 0xEBC6, 0xF9D6, 0xEBC7, 0xF9D7, 0xEBCC, + 0xF9D8, 0xEBCF, 0xF9D9, 0xEBD0, 0xF9DA, 0xEBD1, 0xF9DB, 0xEBD2, + 0xF9DC, 0xEBD8, 0xF9DD, 0xECA6, 0xF9DE, 0xECA7, 0xF9DF, 0xECAA, + 0xF9E0, 0xECAF, 0xF9E1, 0xECB0, 0xF9E2, 0xECB1, 0xF9E3, 0xECB2, + 0xF9E4, 0xECB5, 0xF9E5, 0xECB8, 0xF9E6, 0xECBA, 0xF9E7, 0xECC0, + 0xF9E8, 0xECC1, 0xF9E9, 0xECC5, 0xF9EA, 0xECC6, 0xF9EB, 0xECC9, + 0xF9EC, 0xECCA, 0xF9ED, 0xECD5, 0xF9EE, 0xECDD, 0xF9EF, 0xECDE, + 0xF9F0, 0xECE1, 0xF9F1, 0xECE4, 0xF9F2, 0xECE7, 0xF9F3, 0xECE8, + 0xF9F4, 0xECF7, 0xF9F5, 0xECF8, 0xF9F6, 0xECFA, 0xF9F7, 0xEDA1, + 0xF9F8, 0xEDA2, 0xF9F9, 0xEDA3, 0xF9FA, 0xEDEE, 0xF9FB, 0xEEDB, + 0xF9FC, 0xF2BD, 0xF9FD, 0xF2FA, 0xF9FE, 0xF3B1, 0xF9FF, 0xF4A7, + 0xFA00, 0xF4EE, 0xFA01, 0xF6F4, 0xFA02, 0xF6F6, 0xFA03, 0xF7B8, + 0xFA04, 0xF7C8, 0xFA05, 0xF7D3, 0xFA06, 0xF8DB, 0xFA07, 0xF8F0, + 0xFA08, 0xFAA1, 0xFA09, 0xFAA2, 0xFA0A, 0xFAE6, 0xFA0B, 0xFCA9, + 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA3A4, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, + 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, + 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, + 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, + 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, + 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, + 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, + 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, + 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, + 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, + 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, + 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC, + 0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC, + 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06, + 0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E, + 0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F, + 0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25, + 0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29, + 0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32, + 0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36, + 0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D, + 0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42, + 0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46, + 0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A, + 0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50, + 0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55, + 0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A, + 0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F, + 0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63, + 0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67, + 0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B, + 0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F, + 0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76, + 0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D, + 0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87, + 0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F, + 0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95, + 0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99, + 0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2, + 0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6, + 0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE, + 0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4, + 0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA, + 0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2, + 0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7, + 0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD, + 0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1, + 0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6, + 0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB, + 0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF, + 0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6, + 0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE, + 0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8, + 0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE, + 0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03, + 0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09, + 0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10, + 0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15, + 0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A, + 0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F, + 0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24, + 0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28, + 0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F, + 0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33, + 0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A, + 0x8265, 0xAD3B, 0x8266, 0xAD3D, 0x8267, 0xAD3E, 0x8268, 0xAD3F, + 0x8269, 0xAD40, 0x826A, 0xAD41, 0x826B, 0xAD42, 0x826C, 0xAD43, + 0x826D, 0xAD46, 0x826E, 0xAD48, 0x826F, 0xAD4A, 0x8270, 0xAD4B, + 0x8271, 0xAD4C, 0x8272, 0xAD4D, 0x8273, 0xAD4E, 0x8274, 0xAD4F, + 0x8275, 0xAD51, 0x8276, 0xAD52, 0x8277, 0xAD53, 0x8278, 0xAD55, + 0x8279, 0xAD56, 0x827A, 0xAD57, 0x8281, 0xAD59, 0x8282, 0xAD5A, + 0x8283, 0xAD5B, 0x8284, 0xAD5C, 0x8285, 0xAD5D, 0x8286, 0xAD5E, + 0x8287, 0xAD5F, 0x8288, 0xAD60, 0x8289, 0xAD62, 0x828A, 0xAD64, + 0x828B, 0xAD65, 0x828C, 0xAD66, 0x828D, 0xAD67, 0x828E, 0xAD68, + 0x828F, 0xAD69, 0x8290, 0xAD6A, 0x8291, 0xAD6B, 0x8292, 0xAD6E, + 0x8293, 0xAD6F, 0x8294, 0xAD71, 0x8295, 0xAD72, 0x8296, 0xAD77, + 0x8297, 0xAD78, 0x8298, 0xAD79, 0x8299, 0xAD7A, 0x829A, 0xAD7E, + 0x829B, 0xAD80, 0x829C, 0xAD83, 0x829D, 0xAD84, 0x829E, 0xAD85, + 0x829F, 0xAD86, 0x82A0, 0xAD87, 0x82A1, 0xAD8A, 0x82A2, 0xAD8B, + 0x82A3, 0xAD8D, 0x82A4, 0xAD8E, 0x82A5, 0xAD8F, 0x82A6, 0xAD91, + 0x82A7, 0xAD92, 0x82A8, 0xAD93, 0x82A9, 0xAD94, 0x82AA, 0xAD95, + 0x82AB, 0xAD96, 0x82AC, 0xAD97, 0x82AD, 0xAD98, 0x82AE, 0xAD99, + 0x82AF, 0xAD9A, 0x82B0, 0xAD9B, 0x82B1, 0xAD9E, 0x82B2, 0xAD9F, + 0x82B3, 0xADA0, 0x82B4, 0xADA1, 0x82B5, 0xADA2, 0x82B6, 0xADA3, + 0x82B7, 0xADA5, 0x82B8, 0xADA6, 0x82B9, 0xADA7, 0x82BA, 0xADA8, + 0x82BB, 0xADA9, 0x82BC, 0xADAA, 0x82BD, 0xADAB, 0x82BE, 0xADAC, + 0x82BF, 0xADAD, 0x82C0, 0xADAE, 0x82C1, 0xADAF, 0x82C2, 0xADB0, + 0x82C3, 0xADB1, 0x82C4, 0xADB2, 0x82C5, 0xADB3, 0x82C6, 0xADB4, + 0x82C7, 0xADB5, 0x82C8, 0xADB6, 0x82C9, 0xADB8, 0x82CA, 0xADB9, + 0x82CB, 0xADBA, 0x82CC, 0xADBB, 0x82CD, 0xADBC, 0x82CE, 0xADBD, + 0x82CF, 0xADBE, 0x82D0, 0xADBF, 0x82D1, 0xADC2, 0x82D2, 0xADC3, + 0x82D3, 0xADC5, 0x82D4, 0xADC6, 0x82D5, 0xADC7, 0x82D6, 0xADC9, + 0x82D7, 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0xB6BE, + 0x8CFB, 0xB6BF, 0x8CFC, 0xB6C0, 0x8CFD, 0xB6C1, 0x8CFE, 0xB6C2, + 0x8D41, 0xB6C3, 0x8D42, 0xB6C4, 0x8D43, 0xB6C5, 0x8D44, 0xB6C6, + 0x8D45, 0xB6C7, 0x8D46, 0xB6C8, 0x8D47, 0xB6C9, 0x8D48, 0xB6CA, + 0x8D49, 0xB6CB, 0x8D4A, 0xB6CC, 0x8D4B, 0xB6CD, 0x8D4C, 0xB6CE, + 0x8D4D, 0xB6CF, 0x8D4E, 0xB6D0, 0x8D4F, 0xB6D1, 0x8D50, 0xB6D2, + 0x8D51, 0xB6D3, 0x8D52, 0xB6D5, 0x8D53, 0xB6D6, 0x8D54, 0xB6D7, + 0x8D55, 0xB6D8, 0x8D56, 0xB6D9, 0x8D57, 0xB6DA, 0x8D58, 0xB6DB, + 0x8D59, 0xB6DC, 0x8D5A, 0xB6DD, 0x8D61, 0xB6DE, 0x8D62, 0xB6DF, + 0x8D63, 0xB6E0, 0x8D64, 0xB6E1, 0x8D65, 0xB6E2, 0x8D66, 0xB6E3, + 0x8D67, 0xB6E4, 0x8D68, 0xB6E5, 0x8D69, 0xB6E6, 0x8D6A, 0xB6E7, + 0x8D6B, 0xB6E8, 0x8D6C, 0xB6E9, 0x8D6D, 0xB6EA, 0x8D6E, 0xB6EB, + 0x8D6F, 0xB6EC, 0x8D70, 0xB6ED, 0x8D71, 0xB6EE, 0x8D72, 0xB6EF, + 0x8D73, 0xB6F1, 0x8D74, 0xB6F2, 0x8D75, 0xB6F3, 0x8D76, 0xB6F5, + 0x8D77, 0xB6F6, 0x8D78, 0xB6F7, 0x8D79, 0xB6F9, 0x8D7A, 0xB6FA, + 0x8D81, 0xB6FB, 0x8D82, 0xB6FC, 0x8D83, 0xB6FD, 0x8D84, 0xB6FE, + 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0x4F48, 0xF8D0, 0x5305, + 0xF8D1, 0x530D, 0xF8D2, 0x530F, 0xF8D3, 0x5486, 0xF8D4, 0x54FA, + 0xF8D5, 0x5703, 0xF8D6, 0x5E03, 0xF8D7, 0x6016, 0xF8D8, 0x629B, + 0xF8D9, 0x62B1, 0xF8DA, 0x6355, 0xF8DB, 0xFA06, 0xF8DC, 0x6CE1, + 0xF8DD, 0x6D66, 0xF8DE, 0x75B1, 0xF8DF, 0x7832, 0xF8E0, 0x80DE, + 0xF8E1, 0x812F, 0xF8E2, 0x82DE, 0xF8E3, 0x8461, 0xF8E4, 0x84B2, + 0xF8E5, 0x888D, 0xF8E6, 0x8912, 0xF8E7, 0x900B, 0xF8E8, 0x92EA, + 0xF8E9, 0x98FD, 0xF8EA, 0x9B91, 0xF8EB, 0x5E45, 0xF8EC, 0x66B4, + 0xF8ED, 0x66DD, 0xF8EE, 0x7011, 0xF8EF, 0x7206, 0xF8F0, 0xFA07, + 0xF8F1, 0x4FF5, 0xF8F2, 0x527D, 0xF8F3, 0x5F6A, 0xF8F4, 0x6153, + 0xF8F5, 0x6753, 0xF8F6, 0x6A19, 0xF8F7, 0x6F02, 0xF8F8, 0x74E2, + 0xF8F9, 0x7968, 0xF8FA, 0x8868, 0xF8FB, 0x8C79, 0xF8FC, 0x98C7, + 0xF8FD, 0x98C4, 0xF8FE, 0x9A43, 0xF9A1, 0x54C1, 0xF9A2, 0x7A1F, + 0xF9A3, 0x6953, 0xF9A4, 0x8AF7, 0xF9A5, 0x8C4A, 0xF9A6, 0x98A8, + 0xF9A7, 0x99AE, 0xF9A8, 0x5F7C, 0xF9A9, 0x62AB, 0xF9AA, 0x75B2, + 0xF9AB, 0x76AE, 0xF9AC, 0x88AB, 0xF9AD, 0x907F, 0xF9AE, 0x9642, + 0xF9AF, 0x5339, 0xF9B0, 0x5F3C, 0xF9B1, 0x5FC5, 0xF9B2, 0x6CCC, + 0xF9B3, 0x73CC, 0xF9B4, 0x7562, 0xF9B5, 0x758B, 0xF9B6, 0x7B46, + 0xF9B7, 0x82FE, 0xF9B8, 0x999D, 0xF9B9, 0x4E4F, 0xF9BA, 0x903C, + 0xF9BB, 0x4E0B, 0xF9BC, 0x4F55, 0xF9BD, 0x53A6, 0xF9BE, 0x590F, + 0xF9BF, 0x5EC8, 0xF9C0, 0x6630, 0xF9C1, 0x6CB3, 0xF9C2, 0x7455, + 0xF9C3, 0x8377, 0xF9C4, 0x8766, 0xF9C5, 0x8CC0, 0xF9C6, 0x9050, + 0xF9C7, 0x971E, 0xF9C8, 0x9C15, 0xF9C9, 0x58D1, 0xF9CA, 0x5B78, + 0xF9CB, 0x8650, 0xF9CC, 0x8B14, 0xF9CD, 0x9DB4, 0xF9CE, 0x5BD2, + 0xF9CF, 0x6068, 0xF9D0, 0x608D, 0xF9D1, 0x65F1, 0xF9D2, 0x6C57, + 0xF9D3, 0x6F22, 0xF9D4, 0x6FA3, 0xF9D5, 0x701A, 0xF9D6, 0x7F55, + 0xF9D7, 0x7FF0, 0xF9D8, 0x9591, 0xF9D9, 0x9592, 0xF9DA, 0x9650, + 0xF9DB, 0x97D3, 0xF9DC, 0x5272, 0xF9DD, 0x8F44, 0xF9DE, 0x51FD, + 0xF9DF, 0x542B, 0xF9E0, 0x54B8, 0xF9E1, 0x5563, 0xF9E2, 0x558A, + 0xF9E3, 0x6ABB, 0xF9E4, 0x6DB5, 0xF9E5, 0x7DD8, 0xF9E6, 0x8266, + 0xF9E7, 0x929C, 0xF9E8, 0x9677, 0xF9E9, 0x9E79, 0xF9EA, 0x5408, + 0xF9EB, 0x54C8, 0xF9EC, 0x76D2, 0xF9ED, 0x86E4, 0xF9EE, 0x95A4, + 0xF9EF, 0x95D4, 0xF9F0, 0x965C, 0xF9F1, 0x4EA2, 0xF9F2, 0x4F09, + 0xF9F3, 0x59EE, 0xF9F4, 0x5AE6, 0xF9F5, 0x5DF7, 0xF9F6, 0x6052, + 0xF9F7, 0x6297, 0xF9F8, 0x676D, 0xF9F9, 0x6841, 0xF9FA, 0x6C86, + 0xF9FB, 0x6E2F, 0xF9FC, 0x7F38, 0xF9FD, 0x809B, 0xF9FE, 0x822A, + 0xFAA1, 0xFA08, 0xFAA2, 0xFA09, 0xFAA3, 0x9805, 0xFAA4, 0x4EA5, + 0xFAA5, 0x5055, 0xFAA6, 0x54B3, 0xFAA7, 0x5793, 0xFAA8, 0x595A, + 0xFAA9, 0x5B69, 0xFAAA, 0x5BB3, 0xFAAB, 0x61C8, 0xFAAC, 0x6977, + 0xFAAD, 0x6D77, 0xFAAE, 0x7023, 0xFAAF, 0x87F9, 0xFAB0, 0x89E3, + 0xFAB1, 0x8A72, 0xFAB2, 0x8AE7, 0xFAB3, 0x9082, 0xFAB4, 0x99ED, + 0xFAB5, 0x9AB8, 0xFAB6, 0x52BE, 0xFAB7, 0x6838, 0xFAB8, 0x5016, + 0xFAB9, 0x5E78, 0xFABA, 0x674F, 0xFABB, 0x8347, 0xFABC, 0x884C, + 0xFABD, 0x4EAB, 0xFABE, 0x5411, 0xFABF, 0x56AE, 0xFAC0, 0x73E6, + 0xFAC1, 0x9115, 0xFAC2, 0x97FF, 0xFAC3, 0x9909, 0xFAC4, 0x9957, + 0xFAC5, 0x9999, 0xFAC6, 0x5653, 0xFAC7, 0x589F, 0xFAC8, 0x865B, + 0xFAC9, 0x8A31, 0xFACA, 0x61B2, 0xFACB, 0x6AF6, 0xFACC, 0x737B, + 0xFACD, 0x8ED2, 0xFACE, 0x6B47, 0xFACF, 0x96AA, 0xFAD0, 0x9A57, + 0xFAD1, 0x5955, 0xFAD2, 0x7200, 0xFAD3, 0x8D6B, 0xFAD4, 0x9769, + 0xFAD5, 0x4FD4, 0xFAD6, 0x5CF4, 0xFAD7, 0x5F26, 0xFAD8, 0x61F8, + 0xFAD9, 0x665B, 0xFADA, 0x6CEB, 0xFADB, 0x70AB, 0xFADC, 0x7384, + 0xFADD, 0x73B9, 0xFADE, 0x73FE, 0xFADF, 0x7729, 0xFAE0, 0x774D, + 0xFAE1, 0x7D43, 0xFAE2, 0x7D62, 0xFAE3, 0x7E23, 0xFAE4, 0x8237, + 0xFAE5, 0x8852, 0xFAE6, 0xFA0A, 0xFAE7, 0x8CE2, 0xFAE8, 0x9249, + 0xFAE9, 0x986F, 0xFAEA, 0x5B51, 0xFAEB, 0x7A74, 0xFAEC, 0x8840, + 0xFAED, 0x9801, 0xFAEE, 0x5ACC, 0xFAEF, 0x4FE0, 0xFAF0, 0x5354, + 0xFAF1, 0x593E, 0xFAF2, 0x5CFD, 0xFAF3, 0x633E, 0xFAF4, 0x6D79, + 0xFAF5, 0x72F9, 0xFAF6, 0x8105, 0xFAF7, 0x8107, 0xFAF8, 0x83A2, + 0xFAF9, 0x92CF, 0xFAFA, 0x9830, 0xFAFB, 0x4EA8, 0xFAFC, 0x5144, + 0xFAFD, 0x5211, 0xFAFE, 0x578B, 0xFBA1, 0x5F62, 0xFBA2, 0x6CC2, + 0xFBA3, 0x6ECE, 0xFBA4, 0x7005, 0xFBA5, 0x7050, 0xFBA6, 0x70AF, + 0xFBA7, 0x7192, 0xFBA8, 0x73E9, 0xFBA9, 0x7469, 0xFBAA, 0x834A, + 0xFBAB, 0x87A2, 0xFBAC, 0x8861, 0xFBAD, 0x9008, 0xFBAE, 0x90A2, + 0xFBAF, 0x93A3, 0xFBB0, 0x99A8, 0xFBB1, 0x516E, 0xFBB2, 0x5F57, + 0xFBB3, 0x60E0, 0xFBB4, 0x6167, 0xFBB5, 0x66B3, 0xFBB6, 0x8559, + 0xFBB7, 0x8E4A, 0xFBB8, 0x91AF, 0xFBB9, 0x978B, 0xFBBA, 0x4E4E, + 0xFBBB, 0x4E92, 0xFBBC, 0x547C, 0xFBBD, 0x58D5, 0xFBBE, 0x58FA, + 0xFBBF, 0x597D, 0xFBC0, 0x5CB5, 0xFBC1, 0x5F27, 0xFBC2, 0x6236, + 0xFBC3, 0x6248, 0xFBC4, 0x660A, 0xFBC5, 0x6667, 0xFBC6, 0x6BEB, + 0xFBC7, 0x6D69, 0xFBC8, 0x6DCF, 0xFBC9, 0x6E56, 0xFBCA, 0x6EF8, + 0xFBCB, 0x6F94, 0xFBCC, 0x6FE0, 0xFBCD, 0x6FE9, 0xFBCE, 0x705D, + 0xFBCF, 0x72D0, 0xFBD0, 0x7425, 0xFBD1, 0x745A, 0xFBD2, 0x74E0, + 0xFBD3, 0x7693, 0xFBD4, 0x795C, 0xFBD5, 0x7CCA, 0xFBD6, 0x7E1E, + 0xFBD7, 0x80E1, 0xFBD8, 0x82A6, 0xFBD9, 0x846B, 0xFBDA, 0x84BF, + 0xFBDB, 0x864E, 0xFBDC, 0x865F, 0xFBDD, 0x8774, 0xFBDE, 0x8B77, + 0xFBDF, 0x8C6A, 0xFBE0, 0x93AC, 0xFBE1, 0x9800, 0xFBE2, 0x9865, + 0xFBE3, 0x60D1, 0xFBE4, 0x6216, 0xFBE5, 0x9177, 0xFBE6, 0x5A5A, + 0xFBE7, 0x660F, 0xFBE8, 0x6DF7, 0xFBE9, 0x6E3E, 0xFBEA, 0x743F, + 0xFBEB, 0x9B42, 0xFBEC, 0x5FFD, 0xFBED, 0x60DA, 0xFBEE, 0x7B0F, + 0xFBEF, 0x54C4, 0xFBF0, 0x5F18, 0xFBF1, 0x6C5E, 0xFBF2, 0x6CD3, + 0xFBF3, 0x6D2A, 0xFBF4, 0x70D8, 0xFBF5, 0x7D05, 0xFBF6, 0x8679, + 0xFBF7, 0x8A0C, 0xFBF8, 0x9D3B, 0xFBF9, 0x5316, 0xFBFA, 0x548C, + 0xFBFB, 0x5B05, 0xFBFC, 0x6A3A, 0xFBFD, 0x706B, 0xFBFE, 0x7575, + 0xFCA1, 0x798D, 0xFCA2, 0x79BE, 0xFCA3, 0x82B1, 0xFCA4, 0x83EF, + 0xFCA5, 0x8A71, 0xFCA6, 0x8B41, 0xFCA7, 0x8CA8, 0xFCA8, 0x9774, + 0xFCA9, 0xFA0B, 0xFCAA, 0x64F4, 0xFCAB, 0x652B, 0xFCAC, 0x78BA, + 0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A, + 0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3, + 0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853, + 0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08, + 0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B, + 0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA, + 0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D, + 0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643, + 0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F, + 0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C, + 0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352, + 0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3, + 0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A, + 0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666, + 0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE, + 0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE, + 0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4, + 0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B, + 0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D, + 0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F, + 0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4, + 0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019, + 0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589, + 0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D, + 0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB, + 0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104, + 0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13, + 0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684, + 0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599, + 0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE, + 0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D, + 0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB, + 0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E, + 0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308, + 0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615, + 0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403, + 0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20, + 0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070, + 0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6, + 0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD, + 0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199, + 0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6, + 0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7, + 0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70, + 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} + + + + +WCHAR ff_wtoupper ( /* Upper converted character */ + WCHAR chr /* Input character */ +) +{ + static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; + static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; + int i; + + + for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; + + return tbl_lower[i] ? tbl_upper[i] : chr; +} diff --git a/src/ersky9x/libraries/fat/fatfs/src/option/cc950.c b/src/ersky9x/libraries/fat/fatfs/src/option/cc950.c new file mode 100644 index 000000000..aa02a7574 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/option/cc950.c @@ -0,0 +1,6829 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP950 (Traditional Chinese Big5) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if !_USE_LFN || _CODE_PAGE != 950 +#error This file is not needed in current configuration. +#endif + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3, + 0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE, + 0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5, + 0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346, + 0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A, + 0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E, + 0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352, + 0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356, + 0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A, + 0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E, + 0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362, + 0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366, + 0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A, + 0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E, + 0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372, + 0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5, + 0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C, + 0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB, + 0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1, + 0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB, + 0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF, + 0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6, + 0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8, + 0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241, + 0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7, + 0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5, + 0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE, + 0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8, + 0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6, + 0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A, + 0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275, + 0x2524, 0xA274, 0x252C, 0xA273, 0x2534, 0xA272, 0x253C, 0xA271, + 0x2550, 0xA2A4, 0x2550, 0xF9F9, 0x2551, 0xF9F8, 0x2552, 0xF9E6, + 0x2553, 0xF9EF, 0x2554, 0xF9DD, 0x2555, 0xF9E8, 0x2556, 0xF9F1, + 0x2557, 0xF9DF, 0x2558, 0xF9EC, 0x2559, 0xF9F5, 0x255A, 0xF9E3, + 0x255B, 0xF9EE, 0x255C, 0xF9F7, 0x255D, 0xF9E5, 0x255E, 0xA2A5, + 0x255E, 0xF9E9, 0x255F, 0xF9F2, 0x2560, 0xF9E0, 0x2561, 0xA2A7, + 0x2561, 0xF9EB, 0x2562, 0xF9F4, 0x2563, 0xF9E2, 0x2564, 0xF9E7, + 0x2565, 0xF9F0, 0x2566, 0xF9DE, 0x2567, 0xF9ED, 0x2568, 0xF9F6, + 0x2569, 0xF9E4, 0x256A, 0xA2A6, 0x256A, 0xF9EA, 0x256B, 0xF9F3, + 0x256C, 0xF9E1, 0x256D, 0xA27E, 0x256D, 0xF9FA, 0x256E, 0xA2A1, + 0x256E, 0xF9FB, 0x256F, 0xA2A3, 0x256F, 0xF9FD, 0x2570, 0xA2A2, + 0x2570, 0xF9FC, 0x2571, 0xA2AC, 0x2572, 0xA2AD, 0x2573, 0xA2AE, + 0x2574, 0xA15A, 0x2581, 0xA262, 0x2582, 0xA263, 0x2583, 0xA264, + 0x2584, 0xA265, 0x2585, 0xA266, 0x2586, 0xA267, 0x2587, 0xA268, + 0x2588, 0xA269, 0x2589, 0xA270, 0x258A, 0xA26F, 0x258B, 0xA26E, + 0x258C, 0xA26D, 0x258D, 0xA26C, 0x258E, 0xA26B, 0x258F, 0xA26A, + 0x2593, 0xF9FE, 0x2594, 0xA276, 0x2595, 0xA279, 0x25A0, 0xA1BD, + 0x25A1, 0xA1BC, 0x25B2, 0xA1B6, 0x25B3, 0xA1B5, 0x25BC, 0xA1BF, + 0x25BD, 0xA1BE, 0x25C6, 0xA1BB, 0x25C7, 0xA1BA, 0x25CB, 0xA1B3, + 0x25CE, 0xA1B7, 0x25CF, 0xA1B4, 0x25E2, 0xA2A8, 0x25E3, 0xA2A9, + 0x25E4, 0xA2AB, 0x25E5, 0xA2AA, 0x2605, 0xA1B9, 0x2606, 0xA1B8, + 0x2640, 0xA1F0, 0x2642, 0xA1F1, 0x3000, 0xA140, 0x3001, 0xA142, + 0x3002, 0xA143, 0x3003, 0xA1B2, 0x3008, 0xA171, 0x3009, 0xA172, + 0x300A, 0xA16D, 0x300B, 0xA16E, 0x300C, 0xA175, 0x300D, 0xA176, + 0x300E, 0xA179, 0x300F, 0xA17A, 0x3010, 0xA169, 0x3011, 0xA16A, + 0x3012, 0xA245, 0x3014, 0xA165, 0x3015, 0xA166, 0x301D, 0xA1A9, + 0x301E, 0xA1AA, 0x3021, 0xA2C3, 0x3022, 0xA2C4, 0x3023, 0xA2C5, + 0x3024, 0xA2C6, 0x3025, 0xA2C7, 0x3026, 0xA2C8, 0x3027, 0xA2C9, + 0x3028, 0xA2CA, 0x3029, 0xA2CB, 0x3105, 0xA374, 0x3106, 0xA375, + 0x3107, 0xA376, 0x3108, 0xA377, 0x3109, 0xA378, 0x310A, 0xA379, + 0x310B, 0xA37A, 0x310C, 0xA37B, 0x310D, 0xA37C, 0x310E, 0xA37D, + 0x310F, 0xA37E, 0x3110, 0xA3A1, 0x3111, 0xA3A2, 0x3112, 0xA3A3, + 0x3113, 0xA3A4, 0x3114, 0xA3A5, 0x3115, 0xA3A6, 0x3116, 0xA3A7, + 0x3117, 0xA3A8, 0x3118, 0xA3A9, 0x3119, 0xA3AA, 0x311A, 0xA3AB, + 0x311B, 0xA3AC, 0x311C, 0xA3AD, 0x311D, 0xA3AE, 0x311E, 0xA3AF, + 0x311F, 0xA3B0, 0x3120, 0xA3B1, 0x3121, 0xA3B2, 0x3122, 0xA3B3, + 0x3123, 0xA3B4, 0x3124, 0xA3B5, 0x3125, 0xA3B6, 0x3126, 0xA3B7, + 0x3127, 0xA3B8, 0x3128, 0xA3B9, 0x3129, 0xA3BA, 0x32A3, 0xA1C0, + 0x338E, 0xA255, 0x338F, 0xA256, 0x339C, 0xA250, 0x339D, 0xA251, + 0x339E, 0xA252, 0x33A1, 0xA254, 0x33C4, 0xA257, 0x33CE, 0xA253, + 0x33D1, 0xA1EB, 0x33D2, 0xA1EA, 0x33D5, 0xA24F, 0x4E00, 0xA440, + 0x4E01, 0xA442, 0x4E03, 0xA443, 0x4E07, 0xC945, 0x4E08, 0xA456, + 0x4E09, 0xA454, 0x4E0A, 0xA457, 0x4E0B, 0xA455, 0x4E0C, 0xC946, + 0x4E0D, 0xA4A3, 0x4E0E, 0xC94F, 0x4E0F, 0xC94D, 0x4E10, 0xA4A2, + 0x4E11, 0xA4A1, 0x4E14, 0xA542, 0x4E15, 0xA541, 0x4E16, 0xA540, + 0x4E18, 0xA543, 0x4E19, 0xA4FE, 0x4E1E, 0xA5E0, 0x4E1F, 0xA5E1, + 0x4E26, 0xA8C3, 0x4E2B, 0xA458, 0x4E2D, 0xA4A4, 0x4E2E, 0xC950, + 0x4E30, 0xA4A5, 0x4E31, 0xC963, 0x4E32, 0xA6EA, 0x4E33, 0xCBB1, + 0x4E38, 0xA459, 0x4E39, 0xA4A6, 0x4E3B, 0xA544, 0x4E3C, 0xC964, + 0x4E42, 0xC940, 0x4E43, 0xA444, 0x4E45, 0xA45B, 0x4E47, 0xC947, + 0x4E48, 0xA45C, 0x4E4B, 0xA4A7, 0x4E4D, 0xA545, 0x4E4E, 0xA547, + 0x4E4F, 0xA546, 0x4E52, 0xA5E2, 0x4E53, 0xA5E3, 0x4E56, 0xA8C4, + 0x4E58, 0xADBC, 0x4E59, 0xA441, 0x4E5C, 0xC941, 0x4E5D, 0xA445, + 0x4E5E, 0xA45E, 0x4E5F, 0xA45D, 0x4E69, 0xA5E4, 0x4E73, 0xA8C5, + 0x4E7E, 0xB0AE, 0x4E7F, 0xD44B, 0x4E82, 0xB6C3, 0x4E83, 0xDCB1, + 0x4E84, 0xDCB2, 0x4E86, 0xA446, 0x4E88, 0xA4A9, 0x4E8B, 0xA8C6, + 0x4E8C, 0xA447, 0x4E8D, 0xC948, 0x4E8E, 0xA45F, 0x4E91, 0xA4AA, + 0x4E92, 0xA4AC, 0x4E93, 0xC951, 0x4E94, 0xA4AD, 0x4E95, 0xA4AB, + 0x4E99, 0xA5E5, 0x4E9B, 0xA8C7, 0x4E9E, 0xA8C8, 0x4E9F, 0xAB45, + 0x4EA1, 0xA460, 0x4EA2, 0xA4AE, 0x4EA4, 0xA5E6, 0x4EA5, 0xA5E8, + 0x4EA6, 0xA5E7, 0x4EA8, 0xA6EB, 0x4EAB, 0xA8C9, 0x4EAC, 0xA8CA, + 0x4EAD, 0xAB46, 0x4EAE, 0xAB47, 0x4EB3, 0xADBD, 0x4EB6, 0xDCB3, + 0x4EB9, 0xF6D6, 0x4EBA, 0xA448, 0x4EC0, 0xA4B0, 0x4EC1, 0xA4AF, + 0x4EC2, 0xC952, 0x4EC3, 0xA4B1, 0x4EC4, 0xA4B7, 0x4EC6, 0xA4B2, + 0x4EC7, 0xA4B3, 0x4EC8, 0xC954, 0x4EC9, 0xC953, 0x4ECA, 0xA4B5, + 0x4ECB, 0xA4B6, 0x4ECD, 0xA4B4, 0x4ED4, 0xA54A, 0x4ED5, 0xA54B, + 0x4ED6, 0xA54C, 0x4ED7, 0xA54D, 0x4ED8, 0xA549, 0x4ED9, 0xA550, + 0x4EDA, 0xC96A, 0x4EDC, 0xC966, 0x4EDD, 0xC969, 0x4EDE, 0xA551, + 0x4EDF, 0xA561, 0x4EE1, 0xC968, 0x4EE3, 0xA54E, 0x4EE4, 0xA54F, + 0x4EE5, 0xA548, 0x4EE8, 0xC965, 0x4EE9, 0xC967, 0x4EF0, 0xA5F5, + 0x4EF1, 0xC9B0, 0x4EF2, 0xA5F2, 0x4EF3, 0xA5F6, 0x4EF4, 0xC9BA, + 0x4EF5, 0xC9AE, 0x4EF6, 0xA5F3, 0x4EF7, 0xC9B2, 0x4EFB, 0xA5F4, + 0x4EFD, 0xA5F7, 0x4EFF, 0xA5E9, 0x4F00, 0xC9B1, 0x4F01, 0xA5F8, + 0x4F02, 0xC9B5, 0x4F04, 0xC9B9, 0x4F05, 0xC9B6, 0x4F08, 0xC9B3, + 0x4F09, 0xA5EA, 0x4F0A, 0xA5EC, 0x4F0B, 0xA5F9, 0x4F0D, 0xA5EE, + 0x4F0E, 0xC9AB, 0x4F0F, 0xA5F1, 0x4F10, 0xA5EF, 0x4F11, 0xA5F0, + 0x4F12, 0xC9BB, 0x4F13, 0xC9B8, 0x4F14, 0xC9AF, 0x4F15, 0xA5ED, + 0x4F18, 0xC9AC, 0x4F19, 0xA5EB, 0x4F1D, 0xC9B4, 0x4F22, 0xC9B7, + 0x4F2C, 0xC9AD, 0x4F2D, 0xCA66, 0x4F2F, 0xA742, 0x4F30, 0xA6F4, + 0x4F33, 0xCA67, 0x4F34, 0xA6F1, 0x4F36, 0xA744, 0x4F38, 0xA6F9, + 0x4F3A, 0xA6F8, 0x4F3B, 0xCA5B, 0x4F3C, 0xA6FC, 0x4F3D, 0xA6F7, + 0x4F3E, 0xCA60, 0x4F3F, 0xCA68, 0x4F41, 0xCA64, 0x4F43, 0xA6FA, + 0x4F46, 0xA6FD, 0x4F47, 0xA6EE, 0x4F48, 0xA747, 0x4F49, 0xCA5D, + 0x4F4C, 0xCBBD, 0x4F4D, 0xA6EC, 0x4F4E, 0xA743, 0x4F4F, 0xA6ED, + 0x4F50, 0xA6F5, 0x4F51, 0xA6F6, 0x4F52, 0xCA62, 0x4F53, 0xCA5E, + 0x4F54, 0xA6FB, 0x4F55, 0xA6F3, 0x4F56, 0xCA5A, 0x4F57, 0xA6EF, + 0x4F58, 0xCA65, 0x4F59, 0xA745, 0x4F5A, 0xA748, 0x4F5B, 0xA6F2, + 0x4F5C, 0xA740, 0x4F5D, 0xA746, 0x4F5E, 0xA6F0, 0x4F5F, 0xCA63, + 0x4F60, 0xA741, 0x4F61, 0xCA69, 0x4F62, 0xCA5C, 0x4F63, 0xA6FE, + 0x4F64, 0xCA5F, 0x4F67, 0xCA61, 0x4F69, 0xA8D8, 0x4F6A, 0xCBBF, + 0x4F6B, 0xCBCB, 0x4F6C, 0xA8D0, 0x4F6E, 0xCBCC, 0x4F6F, 0xA8CB, + 0x4F70, 0xA8D5, 0x4F73, 0xA8CE, 0x4F74, 0xCBB9, 0x4F75, 0xA8D6, + 0x4F76, 0xCBB8, 0x4F77, 0xCBBC, 0x4F78, 0xCBC3, 0x4F79, 0xCBC1, + 0x4F7A, 0xA8DE, 0x4F7B, 0xA8D9, 0x4F7C, 0xCBB3, 0x4F7D, 0xCBB5, + 0x4F7E, 0xA8DB, 0x4F7F, 0xA8CF, 0x4F80, 0xCBB6, 0x4F81, 0xCBC2, + 0x4F82, 0xCBC9, 0x4F83, 0xA8D4, 0x4F84, 0xCBBB, 0x4F85, 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0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4, + 0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5, + 0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3, + 0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA, + 0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B, + 0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D, + 0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D, + 0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4, + 0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9, + 0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5, + 0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC, + 0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD, + 0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6, + 0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569, + 0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5, + 0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1, + 0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED, + 0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969, + 0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365, + 0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE, + 0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF, + 0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A, + 0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F, + 0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167, + 0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F, + 0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177, + 0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6, + 0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8, + 0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E, + 0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153, + 0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1, + 0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC, + 0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF, + 0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242, + 0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149, + 0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE, + 0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF, + 0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE, + 0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2, + 0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6, + 0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146, + 0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148, + 0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1, + 0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5, + 0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9, + 0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD, + 0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1, + 0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5, + 0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240, + 0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB, + 0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF, + 0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3, + 0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7, + 0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB, + 0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340, + 0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161, + 0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246, + 0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002, + 0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A, + 0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026, + 0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52, + 0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56, + 0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31, + 0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34, + 0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35, + 0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37, + 0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39, + 0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B, + 0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D, + 0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F, + 0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41, + 0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43, + 0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B, + 0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018, + 0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D, + 0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03, + 0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7, + 0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3, + 0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605, + 0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0, + 0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105, + 0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD, + 0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E, + 0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60, + 0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7, + 0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C, + 0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267, + 0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261, + 0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65, + 0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A, + 0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF, + 0xA1EA, 0x33D2, 0xA1EB, 0x33D1, 0xA1EC, 0x222B, 0xA1ED, 0x222E, + 0xA1EE, 0x2235, 0xA1EF, 0x2234, 0xA1F0, 0x2640, 0xA1F1, 0x2642, + 0xA1F2, 0x2295, 0xA1F3, 0x2299, 0xA1F4, 0x2191, 0xA1F5, 0x2193, + 0xA1F6, 0x2190, 0xA1F7, 0x2192, 0xA1F8, 0x2196, 0xA1F9, 0x2197, + 0xA1FA, 0x2199, 0xA1FB, 0x2198, 0xA1FC, 0x2225, 0xA1FD, 0x2223, + 0xA1FE, 0xFF0F, 0xA240, 0xFF3C, 0xA241, 0x2215, 0xA242, 0xFE68, + 0xA243, 0xFF04, 0xA244, 0xFFE5, 0xA245, 0x3012, 0xA246, 0xFFE0, + 0xA247, 0xFFE1, 0xA248, 0xFF05, 0xA249, 0xFF20, 0xA24A, 0x2103, + 0xA24B, 0x2109, 0xA24C, 0xFE69, 0xA24D, 0xFE6A, 0xA24E, 0xFE6B, + 0xA24F, 0x33D5, 0xA250, 0x339C, 0xA251, 0x339D, 0xA252, 0x339E, + 0xA253, 0x33CE, 0xA254, 0x33A1, 0xA255, 0x338E, 0xA256, 0x338F, + 0xA257, 0x33C4, 0xA258, 0x00B0, 0xA259, 0x5159, 0xA25A, 0x515B, + 0xA25B, 0x515E, 0xA25C, 0x515D, 0xA25D, 0x5161, 0xA25E, 0x5163, + 0xA25F, 0x55E7, 0xA260, 0x74E9, 0xA261, 0x7CCE, 0xA262, 0x2581, + 0xA263, 0x2582, 0xA264, 0x2583, 0xA265, 0x2584, 0xA266, 0x2585, + 0xA267, 0x2586, 0xA268, 0x2587, 0xA269, 0x2588, 0xA26A, 0x258F, + 0xA26B, 0x258E, 0xA26C, 0x258D, 0xA26D, 0x258C, 0xA26E, 0x258B, + 0xA26F, 0x258A, 0xA270, 0x2589, 0xA271, 0x253C, 0xA272, 0x2534, + 0xA273, 0x252C, 0xA274, 0x2524, 0xA275, 0x251C, 0xA276, 0x2594, + 0xA277, 0x2500, 0xA278, 0x2502, 0xA279, 0x2595, 0xA27A, 0x250C, + 0xA27B, 0x2510, 0xA27C, 0x2514, 0xA27D, 0x2518, 0xA27E, 0x256D, + 0xA2A1, 0x256E, 0xA2A2, 0x2570, 0xA2A3, 0x256F, 0xA2A4, 0x2550, + 0xA2A5, 0x255E, 0xA2A6, 0x256A, 0xA2A7, 0x2561, 0xA2A8, 0x25E2, + 0xA2A9, 0x25E3, 0xA2AA, 0x25E5, 0xA2AB, 0x25E4, 0xA2AC, 0x2571, + 0xA2AD, 0x2572, 0xA2AE, 0x2573, 0xA2AF, 0xFF10, 0xA2B0, 0xFF11, + 0xA2B1, 0xFF12, 0xA2B2, 0xFF13, 0xA2B3, 0xFF14, 0xA2B4, 0xFF15, + 0xA2B5, 0xFF16, 0xA2B6, 0xFF17, 0xA2B7, 0xFF18, 0xA2B8, 0xFF19, + 0xA2B9, 0x2160, 0xA2BA, 0x2161, 0xA2BB, 0x2162, 0xA2BC, 0x2163, + 0xA2BD, 0x2164, 0xA2BE, 0x2165, 0xA2BF, 0x2166, 0xA2C0, 0x2167, + 0xA2C1, 0x2168, 0xA2C2, 0x2169, 0xA2C3, 0x3021, 0xA2C4, 0x3022, + 0xA2C5, 0x3023, 0xA2C6, 0x3024, 0xA2C7, 0x3025, 0xA2C8, 0x3026, + 0xA2C9, 0x3027, 0xA2CA, 0x3028, 0xA2CB, 0x3029, 0xA2CC, 0x5341, + 0xA2CD, 0x5344, 0xA2CE, 0x5345, 0xA2CF, 0xFF21, 0xA2D0, 0xFF22, + 0xA2D1, 0xFF23, 0xA2D2, 0xFF24, 0xA2D3, 0xFF25, 0xA2D4, 0xFF26, + 0xA2D5, 0xFF27, 0xA2D6, 0xFF28, 0xA2D7, 0xFF29, 0xA2D8, 0xFF2A, + 0xA2D9, 0xFF2B, 0xA2DA, 0xFF2C, 0xA2DB, 0xFF2D, 0xA2DC, 0xFF2E, + 0xA2DD, 0xFF2F, 0xA2DE, 0xFF30, 0xA2DF, 0xFF31, 0xA2E0, 0xFF32, + 0xA2E1, 0xFF33, 0xA2E2, 0xFF34, 0xA2E3, 0xFF35, 0xA2E4, 0xFF36, + 0xA2E5, 0xFF37, 0xA2E6, 0xFF38, 0xA2E7, 0xFF39, 0xA2E8, 0xFF3A, + 0xA2E9, 0xFF41, 0xA2EA, 0xFF42, 0xA2EB, 0xFF43, 0xA2EC, 0xFF44, + 0xA2ED, 0xFF45, 0xA2EE, 0xFF46, 0xA2EF, 0xFF47, 0xA2F0, 0xFF48, + 0xA2F1, 0xFF49, 0xA2F2, 0xFF4A, 0xA2F3, 0xFF4B, 0xA2F4, 0xFF4C, + 0xA2F5, 0xFF4D, 0xA2F6, 0xFF4E, 0xA2F7, 0xFF4F, 0xA2F8, 0xFF50, + 0xA2F9, 0xFF51, 0xA2FA, 0xFF52, 0xA2FB, 0xFF53, 0xA2FC, 0xFF54, + 0xA2FD, 0xFF55, 0xA2FE, 0xFF56, 0xA340, 0xFF57, 0xA341, 0xFF58, + 0xA342, 0xFF59, 0xA343, 0xFF5A, 0xA344, 0x0391, 0xA345, 0x0392, + 0xA346, 0x0393, 0xA347, 0x0394, 0xA348, 0x0395, 0xA349, 0x0396, + 0xA34A, 0x0397, 0xA34B, 0x0398, 0xA34C, 0x0399, 0xA34D, 0x039A, + 0xA34E, 0x039B, 0xA34F, 0x039C, 0xA350, 0x039D, 0xA351, 0x039E, + 0xA352, 0x039F, 0xA353, 0x03A0, 0xA354, 0x03A1, 0xA355, 0x03A3, + 0xA356, 0x03A4, 0xA357, 0x03A5, 0xA358, 0x03A6, 0xA359, 0x03A7, + 0xA35A, 0x03A8, 0xA35B, 0x03A9, 0xA35C, 0x03B1, 0xA35D, 0x03B2, + 0xA35E, 0x03B3, 0xA35F, 0x03B4, 0xA360, 0x03B5, 0xA361, 0x03B6, + 0xA362, 0x03B7, 0xA363, 0x03B8, 0xA364, 0x03B9, 0xA365, 0x03BA, + 0xA366, 0x03BB, 0xA367, 0x03BC, 0xA368, 0x03BD, 0xA369, 0x03BE, + 0xA36A, 0x03BF, 0xA36B, 0x03C0, 0xA36C, 0x03C1, 0xA36D, 0x03C3, + 0xA36E, 0x03C4, 0xA36F, 0x03C5, 0xA370, 0x03C6, 0xA371, 0x03C7, + 0xA372, 0x03C8, 0xA373, 0x03C9, 0xA374, 0x3105, 0xA375, 0x3106, + 0xA376, 0x3107, 0xA377, 0x3108, 0xA378, 0x3109, 0xA379, 0x310A, + 0xA37A, 0x310B, 0xA37B, 0x310C, 0xA37C, 0x310D, 0xA37D, 0x310E, + 0xA37E, 0x310F, 0xA3A1, 0x3110, 0xA3A2, 0x3111, 0xA3A3, 0x3112, + 0xA3A4, 0x3113, 0xA3A5, 0x3114, 0xA3A6, 0x3115, 0xA3A7, 0x3116, + 0xA3A8, 0x3117, 0xA3A9, 0x3118, 0xA3AA, 0x3119, 0xA3AB, 0x311A, + 0xA3AC, 0x311B, 0xA3AD, 0x311C, 0xA3AE, 0x311D, 0xA3AF, 0x311E, + 0xA3B0, 0x311F, 0xA3B1, 0x3120, 0xA3B2, 0x3121, 0xA3B3, 0x3122, + 0xA3B4, 0x3123, 0xA3B5, 0x3124, 0xA3B6, 0x3125, 0xA3B7, 0x3126, + 0xA3B8, 0x3127, 0xA3B9, 0x3128, 0xA3BA, 0x3129, 0xA3BB, 0x02D9, + 0xA3BC, 0x02C9, 0xA3BD, 0x02CA, 0xA3BE, 0x02C7, 0xA3BF, 0x02CB, + 0xA3E1, 0x20AC, 0xA440, 0x4E00, 0xA441, 0x4E59, 0xA442, 0x4E01, + 0xA443, 0x4E03, 0xA444, 0x4E43, 0xA445, 0x4E5D, 0xA446, 0x4E86, + 0xA447, 0x4E8C, 0xA448, 0x4EBA, 0xA449, 0x513F, 0xA44A, 0x5165, + 0xA44B, 0x516B, 0xA44C, 0x51E0, 0xA44D, 0x5200, 0xA44E, 0x5201, + 0xA44F, 0x529B, 0xA450, 0x5315, 0xA451, 0x5341, 0xA452, 0x535C, + 0xA453, 0x53C8, 0xA454, 0x4E09, 0xA455, 0x4E0B, 0xA456, 0x4E08, + 0xA457, 0x4E0A, 0xA458, 0x4E2B, 0xA459, 0x4E38, 0xA45A, 0x51E1, + 0xA45B, 0x4E45, 0xA45C, 0x4E48, 0xA45D, 0x4E5F, 0xA45E, 0x4E5E, + 0xA45F, 0x4E8E, 0xA460, 0x4EA1, 0xA461, 0x5140, 0xA462, 0x5203, + 0xA463, 0x52FA, 0xA464, 0x5343, 0xA465, 0x53C9, 0xA466, 0x53E3, + 0xA467, 0x571F, 0xA468, 0x58EB, 0xA469, 0x5915, 0xA46A, 0x5927, + 0xA46B, 0x5973, 0xA46C, 0x5B50, 0xA46D, 0x5B51, 0xA46E, 0x5B53, + 0xA46F, 0x5BF8, 0xA470, 0x5C0F, 0xA471, 0x5C22, 0xA472, 0x5C38, + 0xA473, 0x5C71, 0xA474, 0x5DDD, 0xA475, 0x5DE5, 0xA476, 0x5DF1, + 0xA477, 0x5DF2, 0xA478, 0x5DF3, 0xA479, 0x5DFE, 0xA47A, 0x5E72, + 0xA47B, 0x5EFE, 0xA47C, 0x5F0B, 0xA47D, 0x5F13, 0xA47E, 0x624D, + 0xA4A1, 0x4E11, 0xA4A2, 0x4E10, 0xA4A3, 0x4E0D, 0xA4A4, 0x4E2D, + 0xA4A5, 0x4E30, 0xA4A6, 0x4E39, 0xA4A7, 0x4E4B, 0xA4A8, 0x5C39, + 0xA4A9, 0x4E88, 0xA4AA, 0x4E91, 0xA4AB, 0x4E95, 0xA4AC, 0x4E92, + 0xA4AD, 0x4E94, 0xA4AE, 0x4EA2, 0xA4AF, 0x4EC1, 0xA4B0, 0x4EC0, + 0xA4B1, 0x4EC3, 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0xF6AF, 0x9C29, 0xF6B0, 0x9C24, 0xF6B1, 0x9C21, 0xF6B2, 0x9DB7, + 0xF6B3, 0x9DB6, 0xF6B4, 0x9DBC, 0xF6B5, 0x9DC1, 0xF6B6, 0x9DC7, + 0xF6B7, 0x9DCA, 0xF6B8, 0x9DCF, 0xF6B9, 0x9DBE, 0xF6BA, 0x9DC5, + 0xF6BB, 0x9DC3, 0xF6BC, 0x9DBB, 0xF6BD, 0x9DB5, 0xF6BE, 0x9DCE, + 0xF6BF, 0x9DB9, 0xF6C0, 0x9DBA, 0xF6C1, 0x9DAC, 0xF6C2, 0x9DC8, + 0xF6C3, 0x9DB1, 0xF6C4, 0x9DAD, 0xF6C5, 0x9DCC, 0xF6C6, 0x9DB3, + 0xF6C7, 0x9DCD, 0xF6C8, 0x9DB2, 0xF6C9, 0x9E7A, 0xF6CA, 0x9E9C, + 0xF6CB, 0x9EEB, 0xF6CC, 0x9EEE, 0xF6CD, 0x9EED, 0xF6CE, 0x9F1B, + 0xF6CF, 0x9F18, 0xF6D0, 0x9F1A, 0xF6D1, 0x9F31, 0xF6D2, 0x9F4E, + 0xF6D3, 0x9F65, 0xF6D4, 0x9F64, 0xF6D5, 0x9F92, 0xF6D6, 0x4EB9, + 0xF6D7, 0x56C6, 0xF6D8, 0x56C5, 0xF6D9, 0x56CB, 0xF6DA, 0x5971, + 0xF6DB, 0x5B4B, 0xF6DC, 0x5B4C, 0xF6DD, 0x5DD5, 0xF6DE, 0x5DD1, + 0xF6DF, 0x5EF2, 0xF6E0, 0x6521, 0xF6E1, 0x6520, 0xF6E2, 0x6526, + 0xF6E3, 0x6522, 0xF6E4, 0x6B0B, 0xF6E5, 0x6B08, 0xF6E6, 0x6B09, + 0xF6E7, 0x6C0D, 0xF6E8, 0x7055, 0xF6E9, 0x7056, 0xF6EA, 0x7057, + 0xF6EB, 0x7052, 0xF6EC, 0x721E, 0xF6ED, 0x721F, 0xF6EE, 0x72A9, + 0xF6EF, 0x737F, 0xF6F0, 0x74D8, 0xF6F1, 0x74D5, 0xF6F2, 0x74D9, + 0xF6F3, 0x74D7, 0xF6F4, 0x766D, 0xF6F5, 0x76AD, 0xF6F6, 0x7935, + 0xF6F7, 0x79B4, 0xF6F8, 0x7A70, 0xF6F9, 0x7A71, 0xF6FA, 0x7C57, + 0xF6FB, 0x7C5C, 0xF6FC, 0x7C59, 0xF6FD, 0x7C5B, 0xF6FE, 0x7C5A, + 0xF740, 0x7CF4, 0xF741, 0x7CF1, 0xF742, 0x7E91, 0xF743, 0x7F4F, + 0xF744, 0x7F87, 0xF745, 0x81DE, 0xF746, 0x826B, 0xF747, 0x8634, + 0xF748, 0x8635, 0xF749, 0x8633, 0xF74A, 0x862C, 0xF74B, 0x8632, + 0xF74C, 0x8636, 0xF74D, 0x882C, 0xF74E, 0x8828, 0xF74F, 0x8826, + 0xF750, 0x882A, 0xF751, 0x8825, 0xF752, 0x8971, 0xF753, 0x89BF, + 0xF754, 0x89BE, 0xF755, 0x89FB, 0xF756, 0x8B7E, 0xF757, 0x8B84, + 0xF758, 0x8B82, 0xF759, 0x8B86, 0xF75A, 0x8B85, 0xF75B, 0x8B7F, + 0xF75C, 0x8D15, 0xF75D, 0x8E95, 0xF75E, 0x8E94, 0xF75F, 0x8E9A, + 0xF760, 0x8E92, 0xF761, 0x8E90, 0xF762, 0x8E96, 0xF763, 0x8E97, + 0xF764, 0x8F60, 0xF765, 0x8F62, 0xF766, 0x9147, 0xF767, 0x944C, + 0xF768, 0x9450, 0xF769, 0x944A, 0xF76A, 0x944B, 0xF76B, 0x944F, + 0xF76C, 0x9447, 0xF76D, 0x9445, 0xF76E, 0x9448, 0xF76F, 0x9449, + 0xF770, 0x9446, 0xF771, 0x973F, 0xF772, 0x97E3, 0xF773, 0x986A, + 0xF774, 0x9869, 0xF775, 0x98CB, 0xF776, 0x9954, 0xF777, 0x995B, + 0xF778, 0x9A4E, 0xF779, 0x9A53, 0xF77A, 0x9A54, 0xF77B, 0x9A4C, + 0xF77C, 0x9A4F, 0xF77D, 0x9A48, 0xF77E, 0x9A4A, 0xF7A1, 0x9A49, + 0xF7A2, 0x9A52, 0xF7A3, 0x9A50, 0xF7A4, 0x9AD0, 0xF7A5, 0x9B19, + 0xF7A6, 0x9B2B, 0xF7A7, 0x9B3B, 0xF7A8, 0x9B56, 0xF7A9, 0x9B55, + 0xF7AA, 0x9C46, 0xF7AB, 0x9C48, 0xF7AC, 0x9C3F, 0xF7AD, 0x9C44, + 0xF7AE, 0x9C39, 0xF7AF, 0x9C33, 0xF7B0, 0x9C41, 0xF7B1, 0x9C3C, + 0xF7B2, 0x9C37, 0xF7B3, 0x9C34, 0xF7B4, 0x9C32, 0xF7B5, 0x9C3D, + 0xF7B6, 0x9C36, 0xF7B7, 0x9DDB, 0xF7B8, 0x9DD2, 0xF7B9, 0x9DDE, + 0xF7BA, 0x9DDA, 0xF7BB, 0x9DCB, 0xF7BC, 0x9DD0, 0xF7BD, 0x9DDC, + 0xF7BE, 0x9DD1, 0xF7BF, 0x9DDF, 0xF7C0, 0x9DE9, 0xF7C1, 0x9DD9, + 0xF7C2, 0x9DD8, 0xF7C3, 0x9DD6, 0xF7C4, 0x9DF5, 0xF7C5, 0x9DD5, + 0xF7C6, 0x9DDD, 0xF7C7, 0x9EB6, 0xF7C8, 0x9EF0, 0xF7C9, 0x9F35, + 0xF7CA, 0x9F33, 0xF7CB, 0x9F32, 0xF7CC, 0x9F42, 0xF7CD, 0x9F6B, + 0xF7CE, 0x9F95, 0xF7CF, 0x9FA2, 0xF7D0, 0x513D, 0xF7D1, 0x5299, + 0xF7D2, 0x58E8, 0xF7D3, 0x58E7, 0xF7D4, 0x5972, 0xF7D5, 0x5B4D, + 0xF7D6, 0x5DD8, 0xF7D7, 0x882F, 0xF7D8, 0x5F4F, 0xF7D9, 0x6201, + 0xF7DA, 0x6203, 0xF7DB, 0x6204, 0xF7DC, 0x6529, 0xF7DD, 0x6525, + 0xF7DE, 0x6596, 0xF7DF, 0x66EB, 0xF7E0, 0x6B11, 0xF7E1, 0x6B12, + 0xF7E2, 0x6B0F, 0xF7E3, 0x6BCA, 0xF7E4, 0x705B, 0xF7E5, 0x705A, + 0xF7E6, 0x7222, 0xF7E7, 0x7382, 0xF7E8, 0x7381, 0xF7E9, 0x7383, + 0xF7EA, 0x7670, 0xF7EB, 0x77D4, 0xF7EC, 0x7C67, 0xF7ED, 0x7C66, + 0xF7EE, 0x7E95, 0xF7EF, 0x826C, 0xF7F0, 0x863A, 0xF7F1, 0x8640, + 0xF7F2, 0x8639, 0xF7F3, 0x863C, 0xF7F4, 0x8631, 0xF7F5, 0x863B, + 0xF7F6, 0x863E, 0xF7F7, 0x8830, 0xF7F8, 0x8832, 0xF7F9, 0x882E, + 0xF7FA, 0x8833, 0xF7FB, 0x8976, 0xF7FC, 0x8974, 0xF7FD, 0x8973, + 0xF7FE, 0x89FE, 0xF840, 0x8B8C, 0xF841, 0x8B8E, 0xF842, 0x8B8B, + 0xF843, 0x8B88, 0xF844, 0x8C45, 0xF845, 0x8D19, 0xF846, 0x8E98, + 0xF847, 0x8F64, 0xF848, 0x8F63, 0xF849, 0x91BC, 0xF84A, 0x9462, + 0xF84B, 0x9455, 0xF84C, 0x945D, 0xF84D, 0x9457, 0xF84E, 0x945E, + 0xF84F, 0x97C4, 0xF850, 0x97C5, 0xF851, 0x9800, 0xF852, 0x9A56, + 0xF853, 0x9A59, 0xF854, 0x9B1E, 0xF855, 0x9B1F, 0xF856, 0x9B20, + 0xF857, 0x9C52, 0xF858, 0x9C58, 0xF859, 0x9C50, 0xF85A, 0x9C4A, + 0xF85B, 0x9C4D, 0xF85C, 0x9C4B, 0xF85D, 0x9C55, 0xF85E, 0x9C59, + 0xF85F, 0x9C4C, 0xF860, 0x9C4E, 0xF861, 0x9DFB, 0xF862, 0x9DF7, + 0xF863, 0x9DEF, 0xF864, 0x9DE3, 0xF865, 0x9DEB, 0xF866, 0x9DF8, + 0xF867, 0x9DE4, 0xF868, 0x9DF6, 0xF869, 0x9DE1, 0xF86A, 0x9DEE, + 0xF86B, 0x9DE6, 0xF86C, 0x9DF2, 0xF86D, 0x9DF0, 0xF86E, 0x9DE2, + 0xF86F, 0x9DEC, 0xF870, 0x9DF4, 0xF871, 0x9DF3, 0xF872, 0x9DE8, + 0xF873, 0x9DED, 0xF874, 0x9EC2, 0xF875, 0x9ED0, 0xF876, 0x9EF2, + 0xF877, 0x9EF3, 0xF878, 0x9F06, 0xF879, 0x9F1C, 0xF87A, 0x9F38, + 0xF87B, 0x9F37, 0xF87C, 0x9F36, 0xF87D, 0x9F43, 0xF87E, 0x9F4F, + 0xF8A1, 0x9F71, 0xF8A2, 0x9F70, 0xF8A3, 0x9F6E, 0xF8A4, 0x9F6F, + 0xF8A5, 0x56D3, 0xF8A6, 0x56CD, 0xF8A7, 0x5B4E, 0xF8A8, 0x5C6D, + 0xF8A9, 0x652D, 0xF8AA, 0x66ED, 0xF8AB, 0x66EE, 0xF8AC, 0x6B13, + 0xF8AD, 0x705F, 0xF8AE, 0x7061, 0xF8AF, 0x705D, 0xF8B0, 0x7060, + 0xF8B1, 0x7223, 0xF8B2, 0x74DB, 0xF8B3, 0x74E5, 0xF8B4, 0x77D5, + 0xF8B5, 0x7938, 0xF8B6, 0x79B7, 0xF8B7, 0x79B6, 0xF8B8, 0x7C6A, + 0xF8B9, 0x7E97, 0xF8BA, 0x7F89, 0xF8BB, 0x826D, 0xF8BC, 0x8643, + 0xF8BD, 0x8838, 0xF8BE, 0x8837, 0xF8BF, 0x8835, 0xF8C0, 0x884B, + 0xF8C1, 0x8B94, 0xF8C2, 0x8B95, 0xF8C3, 0x8E9E, 0xF8C4, 0x8E9F, + 0xF8C5, 0x8EA0, 0xF8C6, 0x8E9D, 0xF8C7, 0x91BE, 0xF8C8, 0x91BD, + 0xF8C9, 0x91C2, 0xF8CA, 0x946B, 0xF8CB, 0x9468, 0xF8CC, 0x9469, + 0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747, + 0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5, + 0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66, + 0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02, + 0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06, + 0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09, + 0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0, + 0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75, + 0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8, + 0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A, + 0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8, + 0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B, + 0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B, + 0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646, + 0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A, + 0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98, + 0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3, + 0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471, + 0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F, + 0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B, + 0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12, + 0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09, + 0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A, + 0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F, + 0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3, + 0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475, + 0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71, + 0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6, + 0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065, + 0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D, + 0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9, + 0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874, + 0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64, + 0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15, + 0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E, + 0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482, + 0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68, + 0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B, + 0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7, + 0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D, + 0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E, + 0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9, + 0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7, + 0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557, + 0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A, + 0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564, + 0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561, + 0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553, + 0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B, + 0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C, + 0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E, + 0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} + + + + +WCHAR ff_wtoupper ( /* Upper converted character */ + WCHAR chr /* Input character */ +) +{ + static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; + static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; + int i; + + + for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; + + return tbl_lower[i] ? tbl_upper[i] : chr; +} diff --git a/src/ersky9x/libraries/fat/fatfs/src/option/ccsbcs.c b/src/ersky9x/libraries/fat/fatfs/src/option/ccsbcs.c new file mode 100644 index 000000000..359755ac5 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/option/ccsbcs.c @@ -0,0 +1,540 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - Local code bidirectional converter (C)ChaN, 2009 */ +/* (SBCS code pages) */ +/*------------------------------------------------------------------------*/ +/* 437 U.S. (OEM) +/ 720 Arabic (OEM) +/ 1256 Arabic (Windows) +/ 737 Greek (OEM) +/ 1253 Greek (Windows) +/ 1250 Central Europe (Windows) +/ 775 Baltic (OEM) +/ 1257 Baltic (Windows) +/ 850 Multilingual Latin 1 (OEM) +/ 852 Latin 2 (OEM) +/ 1252 Latin 1 (Windows) +/ 855 Cyrillic (OEM) +/ 1251 Cyrillic (Windows) +/ 866 Russian (OEM) +/ 857 Turkish (OEM) +/ 1254 Turkish (Windows) +/ 858 Multilingual Latin 1 + Euro (OEM) +/ 862 Hebrew (OEM) +/ 1255 Hebrew (Windows) +/ 874 Thai (OEM, Windows) +/ 1258 Vietnam (OEM, Windows) +*/ + +#include "../ff.h" + + +#if _CODE_PAGE == 437 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, + 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 720 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */ + 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, + 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, + 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, + 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A, + 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 737 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */ + 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, + 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0, + 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, + 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8, + 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, + 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, + 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E, + 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 775 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */ + 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, + 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, + 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4, + 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, + 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, + 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D, + 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, + 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, + 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019, + 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, + 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 850 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, + 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 852 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, + 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106, + 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, + 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, + 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, + 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, + 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, + 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4, + 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 855 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */ + 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, + 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, + 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, + 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A, + 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, + 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, + 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, + 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580, + 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, + 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116, + 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, + 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 857 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, + 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 858 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, + 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 862 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */ + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, + 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, + 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, + 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 866 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */ + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, + 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 874 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07, + 0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F, + 0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17, + 0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F, + 0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27, + 0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F, + 0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37, + 0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F, + 0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47, + 0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F, + 0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57, + 0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000 +}; + +#elif _CODE_PAGE == 1250 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A, + 0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B, + 0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C, + 0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7, + 0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E, + 0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7, + 0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF, + 0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7, + 0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F, + 0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7, + 0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9 +}; + +#elif _CODE_PAGE == 1251 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */ + 0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021, + 0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F, + 0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F, + 0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7, + 0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407, + 0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7, + 0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457, + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042A, 0x042D, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F +}; + +#elif _CODE_PAGE == 1252 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, + 0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x00DD, 0x00DE, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, + 0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF +}; + +#elif _CODE_PAGE == 1253 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7, + 0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F, + 0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, + 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, + 0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, + 0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF, + 0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, + 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, + 0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7, + 0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000 +}; + +#elif _CODE_PAGE == 1254 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, + 0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, + 0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF +}; + +#elif _CODE_PAGE == 1255 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7, + 0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF, + 0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3, + 0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, + 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, + 0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000 +}; + +#elif _CODE_PAGE == 1256 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688, + 0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA, + 0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F, + 0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, + 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7, + 0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643, + 0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF, + 0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7, + 0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2 +} + +#elif _CODE_PAGE == 1257 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000, + 0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7, + 0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6, + 0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112, + 0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B, + 0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7, + 0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF, + 0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113, + 0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C, + 0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7, + 0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9 +}; + +#elif _CODE_PAGE == 1258 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF, + 0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF, + 0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF +}; + +#endif + + +#if !_TBLDEF || !_USE_LFN +#error This file is not needed in current configuration +#endif + + +WCHAR ff_convert ( /* Converted character, Returns zero on error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + WCHAR c; + + + if (src < 0x80) { /* ASCII */ + c = src; + + } else { + if (dir) { /* OEMCP to Unicode */ + c = (src >= 0x100) ? 0 : Tbl[src - 0x80]; + + } else { /* Unicode to OEMCP */ + for (c = 0; c < 0x80; c++) { + if (src == Tbl[c]) break; + } + c = (c + 0x80) & 0xFF; + } + } + + return c; +} + + +WCHAR ff_wtoupper ( /* Upper converted character */ + WCHAR chr /* Input character */ +) +{ + static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; + static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; + int i; + + + for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; + + return tbl_lower[i] ? tbl_upper[i] : chr; +} diff --git a/src/ersky9x/libraries/fat/fatfs/src/option/syncobj.c b/src/ersky9x/libraries/fat/fatfs/src/option/syncobj.c new file mode 100644 index 000000000..beee1f3c1 --- /dev/null +++ b/src/ersky9x/libraries/fat/fatfs/src/option/syncobj.c @@ -0,0 +1,115 @@ +/*------------------------------------------------------------------------*/ +/* Sample code of OS dependent synchronization object controls */ +/* for FatFs R0.07a (C)ChaN, 2009 */ +/*------------------------------------------------------------------------*/ + +#include // Win32 +//#include // uC/OS-II + +#include "../ff.h" + +#if _FS_REENTRANT + +/*------------------------------------------------------------------------*/ +/* Create a Synchronization Object for a Volume +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount function to create a new +/ synchronization object, such as semaphore and mutex. When a FALSE is +/ returned, the f_mount function fails with FR_INT_ERR. +*/ + +BOOL ff_cre_syncobj ( /* TRUE:Function succeeded, FALSE:Could not create due to any error */ + BYTE vol, /* Corresponding logical drive being processed */ + _SYNC_t *sobj /* Pointer to return the created sync object */ +) +{ + BOOL ret; + + *sobj = CreateMutex(NULL, FALSE, NULL); // Win32 + ret = (*sobj != INVALID_HANDLE_VALUE) ? TRUE : FALSE; // + +// *sobj = VolumeSemId[vol]; // uITRON (give a static created sync object) +// ret = TRUE; // The initial value of the semaphore must be 1. + +// *sobj = OSMutexCreate(0, &err); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Delete a Synchronization Object */ +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount function to delete a synchronization +/ object that created with ff_cre_syncobj function. When a FALSE is +/ returned, the f_mount function fails with FR_INT_ERR. +*/ + +BOOL ff_del_syncobj ( /* TRUE:Function succeeded, FALSE:Could not delete due to any error */ + _SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ +) +{ + BOOL ret; + + ret = CloseHandle(sobj); // Win32 + +// ret = TRUE; // uITRON (nothing to do) + +// OSMutexDel(sobj, OS_DEL_ALWAYS, &err); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Request Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on entering file functions to lock the volume. +/ When a FALSE is returned, the file function fails with FR_TIMEOUT. +*/ + +BOOL ff_req_grant ( /* TRUE:Got a grant to access the volume, FALSE:Could not get a grant */ + _SYNC_t sobj /* Sync object to wait */ +) +{ + BOOL ret; + + ret = (WaitForSingleObject(sobj, _TIMEOUT) == WAIT_OBJECT_0) ? TRUE : FALSE; // Win32 + +// ret = (wai_sem(sobj) == E_OK) ? TRUE : FALSE; // uITRON + +// OSMutexPend(sobj, _TIMEOUT, &err)); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Release Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on leaving file functions to unlock the volume. +*/ + +void ff_rel_grant ( + _SYNC_t sobj /* Sync object to be signaled */ +) +{ + ReleaseMutex(sobj); // Win32 + +// sig_sem(sobj); // uITRON + +// OSMutexPost(sobj); // uC/OS-II +} + + +#else + +#error This file is not needed in this configuration. + +#endif diff --git a/src/ersky9x/libraries/memories/MEDSdcard.c b/src/ersky9x/libraries/memories/MEDSdcard.c new file mode 100644 index 000000000..e612db53e --- /dev/null +++ b/src/ersky9x/libraries/memories/MEDSdcard.c @@ -0,0 +1,454 @@ +/* ---------------------------------------------------------------------------- + * ATMEL Microcontroller Software Support + * ---------------------------------------------------------------------------- + * Copyright (c) 2008, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +//------------------------------------------------------------------------------ +// Headers +//------------------------------------------------------------------------------ + +#include +#include "Media.h" +#include "debug.h" +#include "board.h" +#include "../FatFs/diskio.h" + +//------------------------------------------------------------------------------ +// Constants +//------------------------------------------------------------------------------ + +/// Number of SD Slots +#define NUM_SD_SLOTS 1 +#define SD_BLOCK_SIZE 512 + +//------------------------------------------------------------------------------ +/// Checks if the device is write protected. +/// \return 1 if protected. +//------------------------------------------------------------------------------ +#if 0 +static unsigned char CardIsProtected(unsigned char slot) +{ + if (slot == 0) { + #ifdef BOARD_SD_PIN_WP + PIO_Configure(&pinMciWriteProtect, 1); + return (PIO_Get(&pinMciWriteProtect) != 0); + #else + return 0; + #endif + } + + if (slot == 1) { + #ifdef BOARD_SD_MCI1_PIN_WP + PIO_Configure(&pinMciWriteProtect1, 1); + return (PIO_Get(&pinMciWriteProtect1) != 0); + #else + return 0; + #endif + } + + return 0; +} +#endif + +//------------------------------------------------------------------------------ +/// Configure the PIO for SD +//------------------------------------------------------------------------------ +#if 0 +static void ConfigurePIO(unsigned char mciID) +{ + #ifdef BOARD_SD_PINS + const Pin pinSd0[] = {BOARD_SD_PINS}; + #endif + + #ifdef BOARD_SD_MCI1_PINS + const Pin pinSd1[] = {BOARD_SD_MCI1_PINS}; + #endif + + if(mciID == 0) { + #ifdef BOARD_SD_PINS + PIO_Configure(pinSd0, PIO_LISTSIZE(pinSd0)); + #endif + } else { + #ifdef BOARD_SD_MCI1_PINS + PIO_Configure(pinSd1, PIO_LISTSIZE(pinSd1)); + #endif + } +} +#endif + +//------------------------------------------------------------------------------ +//! \brief Reads a specified amount of data from a SDCARD memory +//! \param media Pointer to a Media instance +//! \param address Address of the data to read +//! \param data Pointer to the buffer in which to store the retrieved +//! data +//! \param length Length of the buffer +//! \param callback Optional pointer to a callback function to invoke when +//! the operation is finished +//! \param argument Optional pointer to an argument for the callback +//! \return Operation result code +//------------------------------------------------------------------------------ +static unsigned char MEDSdcard_Read(Media *media, + unsigned int address, + void *data, + unsigned int length, + MediaCallback callback, + void *argument) +{ + TRACE_DEBUG("MEDSdcard_Read(address=%d length=%d)\n\r", address, length); + + // Check that the media is ready + if (media->state != MED_STATE_READY) { + + TRACE_INFO("Media busy\n\r"); + return MED_STATUS_BUSY; + } + + // Check that the data to read is not too big + if ((length + address) > media->size) { + + TRACE_WARNING("MEDSdcard_Read: Data too big: %d, %d\n\r", + (int)length, (int)address); + return MED_STATUS_ERROR; + } + + // Enter Busy state + media->state = MED_STATE_BUSY; + + disk_read (0, data, address, length); + + // Leave the Busy state + media->state = MED_STATE_READY; + + // Invoke callback + if (callback != 0) { + + callback(argument, MED_STATUS_SUCCESS, 0, 0); + } + + return MED_STATUS_SUCCESS; +} + +//------------------------------------------------------------------------------ +//! \brief Writes data on a SDRAM media +//! \param media Pointer to a Media instance +//! \param address Address at which to write +//! \param data Pointer to the data to write +//! \param length Size of the data buffer +//! \param callback Optional pointer to a callback function to invoke when +//! the write operation terminates +//! \param argument Optional argument for the callback function +//! \return Operation result code +//! \see Media +//! \see MediaCallback +//------------------------------------------------------------------------------ +static unsigned char MEDSdcard_Write(Media *media, + unsigned int address, + void *data, + unsigned int length, + MediaCallback callback, + void *argument) +{ + + TRACE_DEBUG("MEDSdcard_Write(address=%d length=%d)\n\r", address, length); + + // Check that the media if ready + if (media->state != MED_STATE_READY) { + + TRACE_WARNING("MEDSdcard_Write: Media is busy\n\r"); + return MED_STATUS_BUSY; + } + + // Check that the data to write is not too big + if ((length + address) > media->size) { + + TRACE_WARNING("MEDSdcard_Write: Data too big\n\r"); + return MED_STATUS_ERROR; + } + + // Put the media in Busy state + media->state = MED_STATE_BUSY; + + disk_write(0, data, address, length); + + // Leave the Busy state + media->state = MED_STATE_READY; + + // Invoke the callback if it exists + if (callback != 0) { + + callback(argument, MED_STATUS_SUCCESS, 0, 0); + } + + return MED_STATUS_SUCCESS; +} + + +//------------------------------------------------------------------------------ +/// Initializes a Media instance and the associated physical interface +/// \param media Pointer to the Media instance to initialize +/// \return 1 if success. +//------------------------------------------------------------------------------ + +extern uint32_t Card_CSD[4]; + +unsigned char MEDSdcard_Initialize(Media *media, unsigned char mciID) +{ + TRACE_INFO("MEDSdcard init\n\r"); + + // Initialize SDcard + //-------------------------------------------------------------------------- + + if ( !CardIsConnected( ) ) + { + return 0; + } + + // Configure SDcard pins + // ConfigurePIO(mciID); + +#if defined(MCI2_INTERFACE) + // DMAD_Initialize(BOARD_MCI_DMA_CHANNEL, DMAD_NO_DEFAULT_IT); +#endif + +#if 0 + // Initialize the MCI driver + if ( mciID == 0 ) + { + IRQ_ConfigureIT(BOARD_SD_MCI_ID, 1, MCI0_IrqHandler); + MCI_Init(mciDrv, BOARD_SD_MCI_BASE, BOARD_SD_MCI_ID, BOARD_SD_SLOT, BOARD_MCK ); + IRQ_EnableIT(BOARD_SD_MCI_ID); + } + else + { + #ifdef BOARD_SD_MCI1_ID + IRQ_ConfigureIT(BOARD_SD_MCI1_ID, 1, MCI0_IrqHandler); + MCI_Init(mciDrv, BOARD_SD_MCI1_BASE, BOARD_SD_MCI1_ID, BOARD_SD_MCI1_SLOT, BOARD_MCK ); + IRQ_EnableIT(BOARD_SD_MCI1_ID); + #else + TRACE_ERROR("SD/MMC card initialization failed (MCI1 not supported)\n\r"); + #endif + } +#if MCI_BUSY_CHECK_FIX && defined(BOARD_SD_DAT0) + MCI_SetBusyFix(mciDrv, &pinSdDAT0); +#endif + + // Initialize the SD card driver + if (SD_Init(sdDrv, (SdDriver *)mciDrv)) + { + TRACE_ERROR("SD/MMC card initialization failed\n\r"); + return 0; + } + else + { + //SD_DisplayRegisterCSD(&sdDrv); + TRACE_INFO("SD/MMC card initialization successful\n\r"); + TRACE_INFO("Card size: %d MB\n\r", (int)(MMC_GetTotalSizeKB(sdDrv)/1024)); + } + MCI_SetSpeed(mciDrv, sdDrv->transSpeed, sdDrv->transSpeed, BOARD_MCK); +#endif + + + media->write = MEDSdcard_Write; + media->read = MEDSdcard_Read; + media->lock = 0; + media->unlock = 0; + media->handler = 0; + media->flush = 0; + + media->blockSize = SD_BLOCK_SIZE; + media->baseAddress = 0; + +#define SD_CSD(csd, bitfield, bits) ((csd[3-(bitfield)/32] >> ((bitfield)%32)) & ((1 << (bits)) - 1)) + +#define SD_CSD_C_SIZE_HC(csd) ((SD_CSD(csd, 64, 6) << 16) + \ + (SD_CSD(csd, 56, 8) << 8) + \ + SD_CSD(csd, 48, 8)) ///< Device size v2.0 High Capacity + + media->size = ((SD_CSD_C_SIZE_HC(Card_CSD) + 1) * 1024); + + media->mappedRD = 0; + media->mappedWR = 0; + media->protected = 0; // TODO BSS CardIsProtected(mciID); + media->removable = 1; + + media->state = MED_STATE_READY; + + media->transfer.data = 0; + media->transfer.address = 0; + media->transfer.length = 0; + media->transfer.callback = 0; + media->transfer.argument = 0; + + return 1; +} + +#if 0 +//------------------------------------------------------------------------------ +/// Initializes a Media instance and the associated physical interface +/// \param media Pointer to the Media instance to initialize +/// \return 1 if success. +//------------------------------------------------------------------------------ +unsigned char MEDSdusb_Initialize(Media *media, unsigned char mciID) +{ + TRACE_INFO("MEDSdusb init\n\r"); + + // Initialize SDcard + //-------------------------------------------------------------------------- + + if (!CardIsConnected()) return 0; +#if 0 + // Configure SDcard pins + ConfigurePIO(mciID); + +#if defined(MCI2_INTERFACE) + DMAD_Initialize(BOARD_MCI_DMA_CHANNEL, DMAD_NO_DEFAULT_IT); +#endif + // Initialize the MCI driver + if ( mciID == 0 ) + { + IRQ_ConfigureIT(BOARD_SD_MCI_ID, 1, MCI0_IrqHandler); + MCI_Init(mciDrv, BOARD_SD_MCI_BASE, BOARD_SD_MCI_ID, BOARD_SD_SLOT, BOARD_MCK ); + IRQ_EnableIT(BOARD_SD_MCI_ID); + } + else + { +#ifdef BOARD_SD_MCI1_ID + IRQ_ConfigureIT(BOARD_SD_MCI1_ID, 1, MCI0_IrqHandler); + MCI_Init(mciDrv, BOARD_SD_MCI1_BASE, BOARD_SD_MCI1_ID, BOARD_SD_SLOT, BOARD_MCK ); + IRQ_EnableIT(BOARD_SD_MCI1_ID); +#else + TRACE_ERROR("SD/MMC card initialization failed (MCI1 not supported)\n\r"); +#endif + } +#if MCI_BUSY_CHECK_FIX && defined(BOARD_SD_DAT0) + MCI_SetBusyFix(mciDrv, &pinSdDAT0); +#endif + + // Initialize the SD card driver + if (SD_Init(sdDrv, (SdDriver *)mciDrv)) + { + TRACE_ERROR("SD/MMC card initialization failed\n\r"); + return 0; + } + else + { + TRACE_INFO("SD/MMC card initialization successful\n\r"); + TRACE_INFO("Card size: %d MB\n\r", (int)(MMC_GetTotalSizeKB(sdDrv)/1024)); + } + MCI_SetSpeed(mciDrv, sdDrv->transSpeed, sdDrv->transSpeed, BOARD_MCK); +#endif + // Initialize media fields + //-------------------------------------------------------------------------- + //media->interface = sdDrv; + media->write = MEDSdusb_Write; + media->read = MEDSdusb_Read; + media->lock = 0; + media->unlock = 0; + media->handler = 0; + media->flush = 0; + + media->blockSize = SD_BLOCK_SIZE; + media->baseAddress = 0; + media->size = 1024*1024; // TODO BSS SD_TOTAL_BLOCK(sdDrv); + + media->mappedRD = 0; + media->mappedWR = 0; + media->protectedd = false; // TODO BSS CardIsProtected(mciID); + media->removable = 1; + + media->state = MED_STATE_READY; + + media->transfer.data = 0; + media->transfer.address = 0; + media->transfer.length = 0; + media->transfer.callback = 0; + media->transfer.argument = 0; + + return 1; +} +#endif + +#if 0 +//------------------------------------------------------------------------------ +/// erase all the Sdcard +/// \param media Pointer to the Media instance to initialize +//------------------------------------------------------------------------------ +void MEDSdcard_EraseAll(Media *media) +{ + unsigned char buffer[SD_BLOCK_SIZE]; + unsigned int block; + unsigned int multiBlock = 1; // change buffer size for multiblocks + unsigned char error; + + TRACE_INFO("MEDSdcard Erase All ...\n\r"); + + // Clear the block buffer + memset(buffer, 0, media->blockSize * multiBlock); + + for (block=0; + block < (SD_TOTAL_BLOCK((SdCard*)media->interface)-multiBlock); + block += multiBlock) + { + // TODO BSS error = SD_WriteBlock((SdCard*)media->interface, block, multiBlock, buffer); + assert( !error ); /* "\n\r-F- Failed to write block (%d) #%u\n\r", error, block */ + } +} +#endif + +//------------------------------------------------------------------------------ +/// erase block +/// \param media Pointer to the Media instance to initialize +/// \param block to erase +//------------------------------------------------------------------------------ +#if 0 +void MEDSdcard_EraseBlock(Media *media, unsigned int block) +{ + unsigned char buffer[SD_BLOCK_SIZE]; + unsigned char error; + + // Clear the block buffer + memset(buffer, 0, media->blockSize); + + // TODO BSS error = SD_WriteBlock((SdCard*)media->interface, block, 1, buffer); + assert( !error ) ; /* "\n\r-F- Failed to write block (%d) #%u\n\r", error, block */ +} +#endif +//------------------------------------------------------------------------------ +/// Get driver pointer +//------------------------------------------------------------------------------ +#if 0 +SdCard* MEDSdcard_GetDriver( unsigned int slot ) +{ + if (slot >= NUM_SD_SLOTS) + { + return 0; + } + + return &sdDrv[slot]; +} +#endif diff --git a/src/ersky9x/libraries/memories/MEDSdmmc.c b/src/ersky9x/libraries/memories/MEDSdmmc.c deleted file mode 100644 index 1c0d468cb..000000000 --- a/src/ersky9x/libraries/memories/MEDSdmmc.c +++ /dev/null @@ -1,474 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include -#include "Media.h" -#include "debug.h" -#include "board.h" -#include "sdmmc.h" - -// TODO BSS -/*#if defined MCI2_INTERFACE -# include "dmad/dmad.h" -#endif -*/ - -#define assert(...) - -/*------------------------------------------------------------------------------ - * Local variables - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal Functions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ -//! \brief Reads a specified amount of data from a SDCARD memory -//! \param media Pointer to a Media instance -//! \param address Address of the data to read -//! \param data Pointer to the buffer in which to store the retrieved -//! data -//! \param length Length of the buffer -//! \param callback Optional pointer to a callback function to invoke when -//! the operation is finished -//! \param argument Optional pointer to an argument for the callback -//! \return Operation result code - *------------------------------------------------------------------------------*/ -static uint8_t MEDSdmmc_Read( Media* media, unsigned int address, void* data, unsigned int length, MediaCallback callback, void* argument ) -{ - // uint8_t error ; - - // Check that the media is ready - if (media->state != MED_STATE_READY) - { - TRACE_INFO("Media busy\n\r"); - return MED_STATUS_BUSY; - } - - // Check that the data to read is not too big - if ((length + address) > media->size) - { - TRACE_WARNING("MEDSdmmc_Read: Data too big: %d, %d\n\r", length, address ) ; - - return MED_STATUS_ERROR; - } - - /* Enter Busy state */ - media->state = MED_STATE_BUSY; - - /*error = */SD_ReadBlocks((SdCard*)media->interface, address, length, data); - // assert( error == 0 ) ; - - /* Leave the Busy state */ - media->state = MED_STATE_READY; - - /* Invoke callback */ - if ( callback != 0 ) - { - callback( argument, MED_STATUS_SUCCESS, 0, 0 ) ; - } - - return MED_STATUS_SUCCESS ; -} - -/** -//! \brief Writes data on a SDRAM media -//! \param media Pointer to a Media instance -//! \param address Address at which to write -//! \param data Pointer to the data to write -//! \param length Size of the data buffer -//! \param callback Optional pointer to a callback function to invoke when -//! the write operation terminates -//! \param argument Optional argument for the callback function -//! \return Operation result code -//! \see Media -//! \see MediaCallback - *------------------------------------------------------------------------------*/ -static uint8_t MEDSdmmc_Write( Media* media, unsigned int address, void* data, unsigned int length, MediaCallback callback, void* argument ) -{ - // uint8_t error ; - - // Check that the media if ready - if (media->state != MED_STATE_READY) - { - TRACE_WARNING("MEDSdmmc_Write: Media is busy\n\r"); - return MED_STATUS_BUSY; - } - - // Check that the card is not protected - if (media->protected) - { - return MED_STATUS_PROTECTED; - } - - // Check that the data to write is not too big - if ((length + address) > media->size) - { - TRACE_WARNING("MEDSdmmc_Write: Data too big\n\r"); - return MED_STATUS_ERROR; - } - - // Put the media in Busy state - media->state = MED_STATE_BUSY; - - /*error = */SD_WriteBlocks((SdCard*)media->interface, address, length, data); - // assert( error == 0 ) ; - - // Leave the Busy state - media->state = MED_STATE_READY; - - // Invoke the callback if it exists - if ( callback != 0 ) - { - callback( argument, MED_STATUS_SUCCESS, 0, 0 ) ; - } - - return MED_STATUS_SUCCESS; -} - -#if 0 -// TODO BSS what do they do ??? - -/** -//! \brief Callback invoked when SD/MMC transfer done - *------------------------------------------------------------------------------*/ -static void SdMmcCallback(uint8_t status, void *pCommand) -{ - SdCmd * pCmd = (SdCmd*)pCommand; - Media * pMed = pCmd->pArg; - MEDTransfer * pXfr = &pMed->transfer; - volatile uint8_t medStatus = MED_STATUS_SUCCESS; - - TRACE_INFO_WP("SDCb "); - - // Error - if (status == SD_ERROR_BUSY) - { - //TRACE_WARNING("SD BUSY\n\r"); - medStatus = MED_STATUS_BUSY; - } - else - { - if (status != MED_STATUS_SUCCESS) - { - //TRACE_WARNING("SD st%d\n\r", status); - medStatus = MED_STATUS_ERROR; - } - } - - pMed->state = MED_STATE_READY; - if (pXfr->callback) - { - pXfr->callback(pXfr->argument, - medStatus, - pXfr->length * pMed->blockSize, - 0); - } -} - -/** -//! \brief Reads a specified amount of data from a SDCARD memory -//! \param media Pointer to a Media instance -//! \param address Address of the data to read -//! \param data Pointer to the buffer in which to store the retrieved -//! data -//! \param length Length of the buffer -//! \param callback Optional pointer to a callback function to invoke when -//! the operation is finished -//! \param argument Optional pointer to an argument for the callback -//! \return Operation result code - *------------------------------------------------------------------------------*/ -static uint8_t MEDSdusb_Read( Media* media, uint32_t address, void* data, uint32_t length, MediaCallback callback, void* argument ) -{ - MEDTransfer * pXfr; - uint8_t error; - - TRACE_INFO_WP("SDuRd(%d,%d) ", address, length); - - // Check that the media is ready - if ( media->state != MED_STATE_READY ) - { - TRACE_INFO("MEDSdusb_Read: Busy\n\r"); - return MED_STATUS_BUSY; - } - - // Check that the data to read is not too big - if ((length + address) > media->size) - { - TRACE_WARNING("MEDSdusb_Read: Data too big: %d, %d\n\r", length, address); - return MED_STATUS_ERROR; - } - // Enter Busy state - media->state = MED_STATE_BUSY; - - // Start media transfer - pXfr = &media->transfer; - pXfr->data = data; - pXfr->address = address; - pXfr->length = length; - pXfr->callback = callback; - pXfr->argument = argument; - - error = SD_Read( (SdCard*)media->interface, address, data, length, SdMmcCallback, media ) ; - - return (error ? MED_STATUS_ERROR : MED_STATUS_SUCCESS) ; -} - -/** -//! \brief Writes data on a SDRAM media -//! \param media Pointer to a Media instance -//! \param address Address at which to write -//! \param data Pointer to the data to write -//! \param length Size of the data buffer -//! \param callback Optional pointer to a callback function to invoke when -//! the write operation terminates -//! \param argument Optional argument for the callback function -//! \return Operation result code -//! \see Media -//! \see MediaCallback - *------------------------------------------------------------------------------*/ -static uint8_t MEDSdusb_Write( Media* media, uint32_t address, void* data, uint32_t length, MediaCallback callback, void* argument ) -{ - MEDTransfer * pXfr; - uint8_t error; - TRACE_INFO_WP("SDuWr(%d,%d) ", address, length); - - // Check that the media if ready - if (media->state != MED_STATE_READY) - { - TRACE_INFO("MEDSdusb_Write: Busy\n\r"); - return MED_STATUS_BUSY; - } - - // Check that the card is not protected - if (media->protected) - { - return MED_STATUS_PROTECTED; - } - - // Check that the data to write is not too big - if ((length + address) > media->size) - { - TRACE_WARNING("MEDSdmmc_Write: Data too big\n\r"); - return MED_STATUS_ERROR; - } - - // Put the media in Busy state - media->state = MED_STATE_BUSY; - - // Start media transfer - pXfr = &media->transfer; - pXfr->data = data; - pXfr->address = address; - pXfr->length = length; - pXfr->callback = callback; - pXfr->argument = argument; - - error = SD_Write( (SdCard*)media->interface, address, data, length, SdMmcCallback, media ) ; - - return (error ? MED_STATUS_ERROR : MED_STATUS_SUCCESS); -} -#endif - -/*------------------------------------------------------------------------------ - * Exported Functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes a Media instance and the associated physical interface - * \param media Pointer to the Media instance to initialize - * \param sdDrv Pointer to the SdCard instance that initialized. - * \param protected SD card protected status. - * \return 1 if success. - *------------------------------------------------------------------------------*/ -void MEDSdcard_Initialize(Media *media, SdCard * sdDrv, uint8_t protected) -{ - TRACE_INFO("MEDSdcard_Initialize\n\r"); - - // Initialize SDcard: Should have been done before media interface init - //-------------------------------------------------------------------------- - - // Initialize media fields - //-------------------------------------------------------------------------- - media->interface = sdDrv; - media->write = MEDSdmmc_Write; - media->read = MEDSdmmc_Read; - media->cancelIo = 0; - media->lock = 0; - media->unlock = 0; - media->handler = 0; - media->flush = 0; - - media->baseAddress = 0; - - if (SD_TOTAL_SIZE(sdDrv) == 0xFFFFFFFF) - { - media->blockSize = SD_BLOCK_SIZE; - media->size = SD_TOTAL_BLOCK(sdDrv); - } - else - { - media->blockSize = SD_TOTAL_SIZE(sdDrv) / SD_TOTAL_BLOCK(sdDrv); - if (media->blockSize != SD_BLOCK_SIZE) - { - media->blockSize = SD_BLOCK_SIZE; - media->size = SD_TOTAL_SIZE(sdDrv) / SD_BLOCK_SIZE; - } - else - { - media->size = SD_TOTAL_BLOCK(sdDrv); - } - } - - media->mappedRD = 0; - media->mappedWR = 0; - media->protected = protected; - media->removable = 1; - - media->state = MED_STATE_READY; - - media->transfer.data = 0; - media->transfer.address = 0; - media->transfer.length = 0; - media->transfer.callback = 0; - media->transfer.argument = 0; -} - -/** - * Initializes a Media instance and the associated physical interface - * \param media Pointer to the Media instance to initialize - * \param sdDrv Pointer to the SdCard instance that initialized. - * \param protected SD card protected status. - * \return 1 if success. - *------------------------------------------------------------------------------*/ -void MEDSdusb_Initialize(Media *media, SdCard * sdDrv, uint8_t protected) -{ - TRACE_INFO("MEDSdusb init\n\r"); - - // Initialize SDcard: Should have been done before media interface init - //-------------------------------------------------------------------------- - - // Initialize media fields - //-------------------------------------------------------------------------- - media->interface = sdDrv; -#if defined(AT91C_MCI_WRPROOF) - media->write = MEDSdusb_Write; -#else - media->write = MEDSdmmc_Write; -#endif -#if defined(AT91C_MCI_RDPROOF) - media->read = MEDSdusb_Read; -#else - media->read = MEDSdmmc_Read; -#endif - media->cancelIo = 0; // Cancel pending IO, add later. - media->lock = 0; - media->unlock = 0; - media->handler = 0; - media->flush = 0; - - media->baseAddress = 0; - if ( SD_TOTAL_SIZE(sdDrv) == 0xFFFFFFFF) - { - media->blockSize = SD_BLOCK_SIZE; - media->size = SD_TOTAL_BLOCK(sdDrv); - } - else - { - media->blockSize = SD_TOTAL_SIZE(sdDrv) / SD_TOTAL_BLOCK(sdDrv); - if (media->blockSize != SD_BLOCK_SIZE) - { - media->blockSize = SD_BLOCK_SIZE; - media->size = SD_TOTAL_SIZE(sdDrv) / SD_BLOCK_SIZE; - } - else - { - media->size = SD_TOTAL_BLOCK(sdDrv); - } - } - - media->mappedRD = 0; - media->mappedWR = 0; - media->protected = protected; - media->removable = 1; - - media->state = MED_STATE_READY; - - media->transfer.data = 0; - media->transfer.address = 0; - media->transfer.length = 0; - media->transfer.callback = 0; - media->transfer.argument = 0; -} - -/** - * erase all the Sdcard - * \param media Pointer to the Media instance to initialize - *------------------------------------------------------------------------------*/ -void MEDSdcard_EraseAll(Media *media) -{ - uint8_t buffer[SD_BLOCK_SIZE]; - uint32_t block; - uint16_t multiBlock = 1; // change buffer size for multiblocks - // uint8_t error; - - TRACE_INFO("MEDSdcard Erase All ...\n\r"); - - // Clear the block buffer - memset(buffer, 0, media->blockSize * multiBlock); - - for ( block=0 ; block < (SD_TOTAL_BLOCK((SdCard*)media->interface)-multiBlock) ; block += multiBlock ) - { - - /*error = */SD_WriteBlocks((SdCard*)media->interface, block, multiBlock, buffer); - // assert( error == 0 ) ; /* "\n\r-F- Failed to write block (%d) #%u\n\r", error, block */ - } -} - -/** - * erase block - * \param media Pointer to the Media instance to initialize - * \param block to erase - *------------------------------------------------------------------------------*/ -void MEDSdcard_EraseBlock(Media *media, uint32_t block) -{ - uint8_t buffer[SD_BLOCK_SIZE]; - // uint8_t error; - - // Clear the block buffer - memset(buffer, 0, media->blockSize); - - /*error = */SD_WriteBlocks((SdCard*)media->interface, block, 1, buffer); - // assert( error == 0 ) ; /* "\n\r-F- Failed to write block (%d) #%u\n\r", error, block */ -} diff --git a/src/ersky9x/libraries/memories/Media.c b/src/ersky9x/libraries/memories/Media.c index 1e33ed83b..f099b1750 100644 --- a/src/ersky9x/libraries/memories/Media.c +++ b/src/ersky9x/libraries/memories/Media.c @@ -33,8 +33,6 @@ #include "Media.h" -Media medias[MAX_MEDS]; - //------------------------------------------------------------------------------ // Exported functions //------------------------------------------------------------------------------ diff --git a/src/ersky9x/libraries/memories/Media.h b/src/ersky9x/libraries/memories/Media.h index 9efc0f54c..866bd3cfd 100644 --- a/src/ersky9x/libraries/memories/Media.h +++ b/src/ersky9x/libraries/memories/Media.h @@ -150,10 +150,7 @@ struct _Media { }; /// Available medias. -#define MAX_MEDS 1 -#define DRV_SDMMC 0 /** SD card */ - -extern Media medias[MAX_MEDS]; +extern Media medias[]; /// Number of medias which are effectively used. /// Defined by Media, shared usage by USB MSD & FS ... diff --git a/src/ersky9x/libraries/memories/mci_cmd_pdc.c b/src/ersky9x/libraries/memories/mci_cmd_pdc.c deleted file mode 100644 index a59788438..000000000 --- a/src/ersky9x/libraries/memories/mci_cmd_pdc.c +++ /dev/null @@ -1,2188 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * Implement for SD/MMC low level commands. - * - * \sa hsmci_module - */ - -/** \addtogroup sdmmc_hal - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "board.h" -#include "hsmci/hsmci.h" -#include "sdmmc_cmd.h" -#include "pmc/pmc.h" -#include "debug.h" - -#define assert(...) - -/*---------------------------------------------------------------------------- - * Local constants - *----------------------------------------------------------------------------*/ - -/** Return halfword(16-bit) count from byte count */ -#define toHWCOUNT(byteCnt) (((byteCnt)&0x1) ? (((byteCnt)/2)+1) : ((byteCnt)/2)) -/** Return word(32-bit) count from byte count */ -#define toWCOUNT(byteCnt) (((byteCnt)&0x3) ? (((byteCnt)/4)+1) : ((byteCnt)/4)) - - -/** Bit mask for status register errors. */ -#define STATUS_ERRORS ((uint32_t)(HSMCI_SR_UNRE \ - | HSMCI_SR_OVRE \ - | HSMCI_SR_ACKRCVE \ - /*| HSMCI_SR_BLKOVRE*/ \ - | HSMCI_SR_CSTOE \ - | HSMCI_SR_DTOE \ - | HSMCI_SR_DCRCE \ - | HSMCI_SR_RTOE \ - | HSMCI_SR_RENDE \ - | HSMCI_SR_RCRCE \ - | HSMCI_SR_RDIRE \ - | HSMCI_SR_RINDE)) - -/** Bit mask for response errors */ -#define STATUS_ERRORS_RESP ((uint32_t)(HSMCI_SR_CSTOE \ - | HSMCI_SR_RTOE \ - | HSMCI_SR_RENDE \ - | HSMCI_SR_RCRCE \ - | HSMCI_SR_RDIRE \ - | HSMCI_SR_RINDE)) - -/** Bit mask for data errors */ -#define STATUS_ERRORS_DATA ((uint32_t)(HSMCI_SR_UNRE \ - | HSMCI_SR_OVRE \ - /*| HSMCI_SR_BLKOVRE*/ \ - /*| HSMCI_SR_CSTOE*/ \ - | HSMCI_SR_DTOE \ - | HSMCI_SR_DCRCE)) - - -/*--------------------------------------------------------------------------- - * Special command - *---------------------------------------------------------------------------*/ - -/** MCI Perform SD/MMC Initialize sequence */ -#define SDMMC_POWER_ON_INIT (0 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_INIT \ - | HSMCI_CMDR_OPDCMD ) - -/*--------------------------------------------------------------------------- - * Command Classes - *---------------------------------------------------------------------------*/ - -/* - * Class 0, 2, 4, 5, 7 and 8 are mandatory and shall be supported by - * all SD Memory Cards. - */ - -/* Basic Commands (class 0) */ - -/** Cmd0 MCI + SPI, bc */ -#define SDMMC_GO_IDLE_STATE (0 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD ) -/** Cmd1 SDSPI + MMC, bcr, R3 */ -#define MMC_SEND_OP_COND (1 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_OPDCMD ) -/** Cmd2 MCI, bcr, R2 */ -#define SDMMC_ALL_SEND_CID (2 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_136_BIT \ - | HSMCI_CMDR_OPDCMD ) -/** Cmd3 MCI SD, bcr, R6 */ -#define SD_SEND_RELATIVE_ADDR (3 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_OPDCMD \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd3 MCI MMC, ac, R1 */ -#define MMC_SET_RELATIVE_ADDR (3 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_OPDCMD \ - | HSMCI_CMDR_MAXLAT ) - -/** Cmd4 MCI, bc */ -#define SDMMC_SET_DSR (4 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_NORESP \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd5 MMC, ac, R1b */ -#define MMC_SLEEP_AWAKE (5 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_R1B \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd6 MMC, ac, R1b */ -#define MMC_SWITCH (6 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_R1B \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd6 SD, adtc, R1 */ -#define SD_SWITCH_FUNC (6 | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_TRDIR \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd7 MCI, ac, R1/R1b */ -#define SDMMC_SELECT_CARD (7 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_R1B \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd7 MCI, ac */ -#define SDMMC_DESELECT_CARD (7 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_NORESP \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd8 SD + SPI, bcr, R7 */ -#define SD_SEND_IF_COND (8 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_OPDCMD \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd8 MMC, adtc, R1 */ -#define MMC_SEND_EXT_CSD (8 | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_TRDIR \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd9 MCI + SPI, ac, R2 */ -#define SDMMC_SEND_CSD (9 | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_136_BIT \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd10 MCI + SPI, ac, R2 */ -#define SDMMC_SEND_CID (10| HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_136_BIT \ - | HSMCI_CMDR_MAXLAT ) - -/** Cmd12 MCI + SPI, ac, R1b (MMC read R1?) */ -#define SDMMC_STOP_TRANSMISSION (12| HSMCI_CMDR_TRCMD_STOP_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - /*| HSMCI_CMDR_SPCMD_SYNC*/ \ - | HSMCI_CMDR_RSPTYP_R1B \ - | HSMCI_CMDR_MAXLAT ) -#define SDMMC_STOP_READ (12| HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_TRCMD_STOP_DATA \ - | HSMCI_CMDR_MAXLAT ) -#define SDMMC_STOP_WRITE (12| HSMCI_CMDR_RSPTYP_R1B \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_TRCMD_STOP_DATA \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd13 MCI + SPI, ac, R1 */ -#define SDMMC_SEND_STATUS (13| HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd14 MMC, adtc, R1 */ -#define MMC_BUSTEST_R (14| HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_TRDIR \ - | HSMCI_CMDR_RSPTYP_48_BIT ) \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd15 MCI, ac */ -#define SDMMC_GO_INACTIVE_STATE (15| HSMCI_CMDR_RSPTYP_NORESP ) - -/** Cmd19 MMC, adtc, R1 */ -#define MMC_BUSTEST_W (19| HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT ) - -/*------------------------------------------------- - * Class 1 commands: Stream oriented Read commands - *-------------------------------------------------*/ - -/** Cmd11 MMC, adtc, R1 */ -#define MMC_READ_DAT_UNTIL_STOP (11| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_STREAM \ - | HSMCI_CMDR_TRDIR_READ \ - | HSMCI_CMDR_MAXLAT ) - -/*------------------------------------------------- - * Class 2 commands: Block oriented Read commands - *-------------------------------------------------*/ - -/** Cmd16, ac, R1 */ -#define SDMMC_SET_BLOCKLEN (16| HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT_64 ) -/** Cmd17, adtc, R1 */ -#define SDMMC_READ_SINGLE_BLOCK (17| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_TRDIR_READ \ - | HSMCI_CMDR_MAXLAT) -/** Cmd18, adtc, R1 */ -#define SDMMC_READ_MULTIPLE_BLOCK (18| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_MULTIPLE \ - | HSMCI_CMDR_TRDIR_READ \ - | HSMCI_CMDR_MAXLAT) - -/*------------------------------------------------- - * Class 3 commands: Stream write commands - *-------------------------------------------------*/ - -#define MMC_WRITE_DAT_UNTIL_STOP (20| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_STREAM \ - | HSMCI_CMDR_TRDIR_WRITE \ - | HSMCI_CMDR_MAXLAT ) - -/*------------------------------------------------- - * Class 4 commands: Block oriented write commands - *-------------------------------------------------*/ - -/** Cmd23, MMC, ac, R1 */ -#define MMC_SET_BLOCK_COUNT (23| HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd24, adtc, R1 */ -#define SDMMC_WRITE_BLOCK (24| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_MULTIPLE \ - | HSMCI_CMDR_TRDIR_WRITE \ - | HSMCI_CMDR_MAXLAT) -/** Cmd25, adtc, R1 */ -#define SDMMC_WRITE_MULTIPLE_BLOCK (25| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_MULTIPLE \ - | HSMCI_CMDR_TRDIR_WRITE \ - | HSMCI_CMDR_MAXLAT) -/** Cmd26, MMC, adtc, R1 */ -#define MMC_PROGRAM_CID (26| HSMCI_CMDR_RSPTYP_48_BIT ) -/** Cmd27, adtc, R1 */ -#define SDMMC_PROGRAM_CSD (27| HSMCI_CMDR_RSPTYP_48_BIT ) - -/*------------------------------------------------ - * Class 8 commands: Application specific commands - *------------------------------------------------*/ - -/** Cmd55, SD, ac, R1 */ -#define SDMMC_APP_CMD (55| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT) -/** Cmd 56, SD, adtc, R1 */ -#define SDMMC_GEN_CMD (56| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT) - -/*------------------------------------------------ - * Class 9 commands: I/O mode commands - *------------------------------------------------*/ - -/** Cmd39, MMC, ac, R4 */ -#define MMC_FAST_IO (39| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT ) -/** Cmd40, MMC, bcr, R5 */ -#define MMC_GO_IRQ_STATE (40| HSMCI_CMDR_SPCMD_IT_CMD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_OPDCMD_OPENDRAIN \ - | HSMCI_CMDR_MAXLAT ) - -/*------------------------------------------------ - * SD Application Specific commands: - *------------------------------------------------*/ - -/** ACMD6, ac, R1 */ -#define SD_SET_BUS_WIDTH (6 | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT) -/** ACMD13, adtc, R1 */ -#define SD_SD_STATUS (13| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_TRDIR_READ \ - | HSMCI_CMDR_MAXLAT) -/** ACMD22, adtc, R1 */ -#define SD_SEND_NUM_WR_BLOCKS (22| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT) -/** ACMD23, ac, R1 */ -#define SD_SET_WR_BLK_ERASE_COUNT (23| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT) -/** ACMD41, bcr, R3 */ -#define SD_SD_SEND_OP_COND (41| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - /*| HSMCI_CMDR_OPDCMD_OPENDRAIN */ ) -/** ACMD42, ac, R1 */ -#define SD_SET_CLR_CARD_DETECT (42| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_MAXLAT) -/** ACMD51, adtc, R1 */ -#define SD_SEND_SCR (51| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_TRDIR_READ \ - | HSMCI_CMDR_TRTYP_SINGLE \ - | HSMCI_CMDR_MAXLAT) - -/*------------------------------------------------ - * SDIO commands: - *------------------------------------------------*/ - -/** SDIO CMD5, R4 */ -#define SDIO_SEND_OP_COND (5 | HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_OPDCMD ) - -/** SDIO CMD52, R5 */ -#define SDIO_IO_RW_DIRECT (52| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_TRCMD_NO_DATA \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT) - -/** SDIO CMD53, R5 */ -#define SDIO_IO_RW_EXTENDED (53| HSMCI_CMDR_SPCMD_STD \ - | HSMCI_CMDR_TRCMD_START_DATA \ - | HSMCI_CMDR_RSPTYP_48_BIT \ - | HSMCI_CMDR_MAXLAT ) - - -/*--------------------------------------------------------------------------- - * Local types - *---------------------------------------------------------------------------*/ - -/** Transfer parameters */ -typedef struct _MciTransfer { - uint8_t *pData; /** Pointer to data buffer */ - uint32_t size; /** Total number of bytes to transfer */ - uint32_t transferred; /** Number of bytes finished */ - uint16_t fifoed; /** bytes in FIFO */ - uint8_t isRx; /** 1 for RX */ - uint8_t reserved; -} MciTransfer; - -/*---------------------------------------------------------------------------- - * Local variable - *----------------------------------------------------------------------------*/ - -/** Tx/Rx parameters */ -MciTransfer hsmciXfr; - -static MciCmd mciCmd; - - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - - -#ifdef HSMCI_WRITE_FIFO -/** - * Write data to FIFO - * \param pHw Pointer to HSMCI register base. - * \param pXfr Pointer to transfer instance. - * \param size Size of data in bytes. - */ -static uint8_t FIFO_Write(Hsmci *pHw, MciTransfer *pXfr, uint32_t size) -{ - volatile uint32_t *pFIFO = (volatile uint32_t*)((uint32_t)pHw + 0x200); - register uint32_t c4, c1; - uint32_t *pData = (uint32_t*)&pXfr->pData[pXfr->transferred]; - - if (size > pXfr->size - pXfr->transferred) - size = pXfr->size - pXfr->transferred; - - if (size == 0) - return 0; - - pXfr->fifoed += size; - - /* convert bytes to DW */ - if (size & 0x3) size += 4; - size /= 4; - - c4 = size >> 2; - c1 = size & 0x3; - for (;c4; c4 --) { - *pFIFO ++ = *pData ++; - *pFIFO ++ = *pData ++; - *pFIFO ++ = *pData ++; - *pFIFO ++ = *pData ++; - } - for (;c1; c1 --) { - *pFIFO ++ = *pData ++; - } - - return 0; -} -#endif -#ifdef HSMCI_READ_FIFO -/** - * Read data from FIFO - * \param pHw Pointer to HSMCI register base. - * \param pXfr Pointer to transfer instance. - * \param size Size of data in DW. - */ -static uint8_t FIFO_Read(Hsmci *pHw, MciTransfer *pXfr, uint32_t size) -{ - volatile uint32_t *pFIFO = (volatile uint32_t*)((uint32_t)pHw + 0x200); - register uint32_t c4, c1; - uint32_t *pData = (uint32_t*)&pXfr->pData[pXfr->transferred]; - - if (size > pXfr->size - pXfr->transferred) - size = pXfr->size - pXfr->transferred; - - if (size == 0) - return 0; - - pXfr->fifoed -= size; - pXfr->transferred += size; - - /* convert bytes to DW */ - if (size & 0x3) size += 4; - size /= 4; - - c4 = size >> 2; - c1 = size & 0x3; - for (;c4; c4 --) { - *pData ++ = *pFIFO ++; - *pData ++ = *pFIFO ++; - *pData ++ = *pFIFO ++; - *pData ++ = *pFIFO ++; - } - for (;c1; c1 --) { - *pData ++ = *pFIFO ++; - } - - return 0; -} -#endif - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * Reset the MciCmd - */ -static void ResetMciCommand(MciCmd *pCommand) -{ - pCommand->cmd = 0; - pCommand->arg = 0; - pCommand->pData = 0; - pCommand->blockSize = 0; - pCommand->nbBlock = 0; - pCommand->pResp = 0; - pCommand->callback = 0; - pCommand->pArg = 0; - pCommand->resType = 0; - pCommand->tranType = 0; - pCommand->busyCheck = 0; - pCommand->status = 0; - pCommand->state = 0; -} - -/** - * Starts a MCI transfer. This is a non blocking function. It will return - * as soon as the transfer is started. - * Return 0 if successful; otherwise returns MCI_ERROR_LOCK if the driver is - * already in use. - * \param pMci Pointer to an MCI driver instance. - * \param pCommand Pointer to the command to execute. - */ -uint8_t Sdmmc_SendCommand(Mcid*pMci, MciCmd *pCommand) -{ - Hsmci* pMciHw = pMci->pMciHw; - uint32_t mciIer = 0, mciMr; - uint32_t transSize; - - assert(pMci); - assert(pMciHw); - assert(pCommand); - - /* Try to acquire the MCI semaphore */ - if (pMci->semaphore == 0) - { - return SDMMC_ERROR_BUSY; - } - pMci->semaphore--; - - /* Command is now being executed */ - pMci->pCommand = pCommand; - pCommand->state = SDMMC_CMD_PENDING; - - /* Enable the MCI peripheral clock */ - PMC_EnablePeripheral(pMci->mciId); - -#if 1 - /* Wait for NOTBUSY (DATA bus IDLE) */ - if (pCommand->tranType == MCI_STOP_TRANSFER) - { - volatile uint32_t busyWait = 0x00001000; - - while ( busyWait-- ) - { - uint32_t sr = pMciHw->HSMCI_SR; - - if ((sr & HSMCI_SR_NOTBUSY) && ((sr & HSMCI_SR_DTIP) == 0)) - { - break; - } - } - } -#endif - - /* Disable MCI */ - MCI_Disable(pMciHw); - - /* Prepare Default Mode register value */ - mciMr = pMciHw->HSMCI_MR & (~(HSMCI_MR_WRPROOF - |HSMCI_MR_RDPROOF - |HSMCI_MR_BLKLEN_Msk - |HSMCI_MR_PDCMODE - |HSMCI_MR_FBYTE)); - - /* Stop transfer: idle the bus */ - if (pCommand->tranType == MCI_STOP_TRANSFER) - { - pMciHw->HSMCI_MR = mciMr; - mciIer = HSMCI_IER_XFRDONE | STATUS_ERRORS_RESP; - } - /* No data transfer: stop at the end of the command */ - else if (pCommand->tranType == MCI_NO_TRANSFER) - { - pMciHw->HSMCI_MR = mciMr; - mciIer = HSMCI_IER_XFRDONE | STATUS_ERRORS_RESP; - /* R3 response, no CRC check */ - if (pCommand->resType == 3) - { - mciIer &= ~((uint32_t)HSMCI_IER_RCRCE); - } - } - /* Data command but no following: - Start an infinite block transfer */ - else - if (pCommand->nbBlock == 0) - { - /* Block size... Data length 0: no PDC */ - pMciHw->HSMCI_MR = mciMr | HSMCI_MR_WRPROOF - | HSMCI_MR_RDPROOF; - pMciHw->HSMCI_BLKR = (pCommand->blockSize << 16); - mciIer = HSMCI_IER_CMDRDY | STATUS_ERRORS_RESP; - } - /* Command with DATA stage */ - else - { - /* Check data size */ - if (pCommand->nbBlock == 0) - { - TRACE_ERROR("MCICmd: At least one block required\n\r"); - return SDMMC_ERROR_PARAM; - } - - /* Number of blocks to transfer */ - if ( pCommand->tranType == MCI_START_WRITE - || pCommand->tranType == MCI_START_READ) - { - /* Set number of blocks */ - pMciHw->HSMCI_BLKR = (pCommand->blockSize << 16) - | (pCommand->nbBlock << 0); - } - - /* Force byte transfer */ - transSize = (pCommand->nbBlock * pCommand->blockSize); - if (pCommand->blockSize & 0x3) - { - mciMr |= HSMCI_MR_FBYTE; - } - else - { - transSize = toWCOUNT(transSize); - } - - /* Set block size & enable PDC */ - pMciHw->HSMCI_MR = mciMr | HSMCI_MR_WRPROOF - | HSMCI_MR_RDPROOF - | HSMCI_MR_PDCMODE - | (pCommand->blockSize << 16); - - /* Update PDC for write */ - if ( pCommand->tranType == MCI_START_WRITE - || pCommand->tranType == MCI_WRITE ) - { - pMciHw->HSMCI_TPR = (uint32_t)pCommand->pData; - pMciHw->HSMCI_TCR = transSize; - pMciHw->HSMCI_TNCR = 0; - - if (pCommand->tranType == MCI_START_WRITE) - { - mciIer = (uint32_t)(HSMCI_IER_XFRDONE | STATUS_ERRORS_DATA); - } - else - { - mciIer = (uint32_t)(HSMCI_IER_TXBUFE | STATUS_ERRORS_DATA); - } - } - /* Update PDC for read */ - else - { - pMciHw->HSMCI_RPR = (uint32_t)pCommand->pData; - pMciHw->HSMCI_RCR = transSize; - pMciHw->HSMCI_RNCR = 0; - pMciHw->HSMCI_PTCR = HSMCI_PTCR_RXTEN; - if (pCommand->tranType == MCI_START_READ) - { - mciIer = (uint32_t)(HSMCI_IER_XFRDONE | STATUS_ERRORS_DATA); - } - else - { - mciIer = (uint32_t)(HSMCI_IER_RXBUFF | STATUS_ERRORS_DATA); - } - } - } - - /* Enable MCI */ - MCI_Enable(pMciHw); - - /* Send the command */ - if ( (pCommand->tranType != MCI_WRITE && pCommand->tranType != MCI_READ) || (pCommand->blockSize == 0) ) - { - pMciHw->HSMCI_ARGR = pCommand->arg; - pMciHw->HSMCI_CMDR = pCommand->cmd; - } - - /* Start sending PDC */ - if (pCommand->blockSize > 0 - && (pCommand->tranType == MCI_START_WRITE - || (pCommand->tranType == MCI_WRITE)) ) - { - pMciHw->HSMCI_PTCR = HSMCI_PTCR_TXTEN; - } - - /* Ignore CRC error for R3 & R4 */ - if (pCommand->resType == 3 || pCommand->resType == 4) - { - mciIer &= ~(uint32_t)(HSMCI_IER_RCRCE); - } - - /* Ignore data error on stop transfer command :) */ - if (pCommand->tranType == MCI_STOP_TRANSFER) - { - mciIer &= ~(STATUS_ERRORS_DATA); - } - - /* Interrupt enable shall be done after PDC TXTEN and RXTEN */ - pMciHw->HSMCI_IER = mciIer; - - return 0; -} - -/** - * Returns 1 if the given MCI transfer is complete; otherwise returns 0. - * \param pMci Pointer to a Mcid instance. - */ -uint8_t Sdmmc_IsCommandComplete( Mcid *pMci ) -{ - MciCmd *pCommand = pMci->pCommand; - - if ( pMci->semaphore == 0 ) - { - return 0; - } - - if ( pCommand ) - { - if ( pCommand->state == SDMMC_CMD_PENDING ) - { - return 0; - } - } - return 1; -} - -/** - * Sends the current SD card driver command to the card. - * Returns 0 if successful; Otherwise, returns the transfer status code or - * SDMMC_ERROR if there was a problem with the SD transfer. - * \param pSd Pointer to a SdCard driver instance. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -static uint8_t SendMciCommand(SdCard *pSd, SdmmcCallback fCallback) -{ - Mcid *pMcid = pSd->pSdDriver; - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - //TRACE_INFO("MCI Cmd: %x\n\r", pCommand->cmd); - - /* Fill callback */ - pCommand->callback = fCallback; - pCommand->pArg = pSd; - - /* Send command */ - error = Sdmmc_SendCommand(pMcid, pCommand); - if (error) { - TRACE_ERROR("Sdmmc_SendCommand(%x): %d\n\r", pCommand->cmd, error); - return SDMMC_ERROR; - } - - /* Wait for command to complete (if no callback defined) */ - if (pCommand->callback == 0) { - while (!Sdmmc_IsCommandComplete(pMcid)); - return pCommand->status; - } - - return 0; -} - - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - - -/** - * Initialization delay: The maximum of 1 msec, 74 clock cycles and supply ramp - * up time. - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SdCard driver instance. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcPowerOn(SdCard *pSd, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint32_t response; - uint8_t error; - - TRACE_DEBUG( "PowerON()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_POWER_ON_INIT; - pCommand->pResp = &response; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Resets all cards to idle state - * \param pSd Pointer to a SdCard driver instance. - * \param arg Argument used. - * \return the command transfer result (see SendMciCommand). - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd0(SdCard *pSd, uint32_t arg, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd0()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_GO_IDLE_STATE; - pCommand->arg = arg; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * MMC send operation condition command. - * Sends host capacity support information and activates the card's - * initialization process. - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SdCard driver instance. - * \param pOCR Pointer to fill OCR value to send and get. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t MmcCmd1(SdCard *pSd, uint32_t* pOCR, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd1()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = MMC_SEND_OP_COND; - pCommand->arg = *pOCR; - pCommand->resType = 3; - pCommand->pResp = pOCR; - - /* send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Asks any card to send the CID numbers - * on the CMD line (any card that is - * connected to the host will respond) - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param pCID Pointer to buffer for storing the CID numbers. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd2(SdCard *pSd, uint32_t *pCID, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - - TRACE_DEBUG("Cmd2()\n\r"); - ResetMciCommand(pCommand); - - /* Fill the command information */ - pCommand->cmd = SDMMC_ALL_SEND_CID; - pCommand->resType = 2; - pCommand->pResp = pSd->cid; - - /* Send the command */ - return SendMciCommand(pSd, fCallback); -} - -/** - * Ask the card to publish a new relative address (RCA) - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param pRsp Pointer to buffer to fill response (address on 31:16). - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdCmd3(SdCard *pSd, uint32_t *pRsp, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd3()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SD_SEND_RELATIVE_ADDR; - pCommand->resType = 6; - pCommand->pResp = pRsp; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Assign relative address to the card - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param cardAddr Card Relative Address value. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t MmcCmd3(SdCard *pSd, uint16_t cardAddr, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint32_t response; - uint8_t error; - - TRACE_DEBUG("Cmd3()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = MMC_SET_RELATIVE_ADDR; - pCommand->arg = (cardAddr << 16); - pCommand->resType = 6; - pCommand->pResp = &response; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Command toggles a card between the - * stand-by and transfer states or between - * the programming and disconnect states. - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param cardAddr Relative Card Address (0 deselects all). - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ - -// extern uint8_t CoTickDelay(uint32_t ticks); -uint8_t SdmmcCmd7(SdCard *pSd, uint16_t cardAddr, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - - // CoTickDelay(1); - TRACE_DEBUG("Cmd7(%d)\n\r", cardAddr); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = cardAddr ? SDMMC_SELECT_CARD : SDMMC_DESELECT_CARD; - pCommand->arg = cardAddr << 16; - pCommand->resType = 1; - - /* Send command */ - return SendMciCommand(pSd, fCallback); -} - -/** - * SDIO SEND OPERATION CONDITION (OCR) command. - * Sends host capacity support information and acrivates the card's - * initialization process. - * \return The command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD/MMC card driver instance. - * \param pIoData Pointer to data sent as well as response buffer (32bit). - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdioCmd5(SdCard *pSd, uint32_t *pIoData, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - - TRACE_DEBUG("Cmd5()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDIO_SEND_OP_COND; - pCommand->arg = *pIoData; - pCommand->resType = 4; - pCommand->pResp = pIoData; - - /* Send command */ - return SendMciCommand(pSd, fCallback); -} - -/** - * Switches the mode of operation of the selected card. - * CMD6 is valid under the "trans" state. - * \return The command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD/MMC card driver instance. - * \param pSwitchArg Pointer to a MmcCmd6Arg instance. - * \param pStatus Pointer to where the 512bit status is returned. - * \param pResp Pointer to where the response is returned. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdCmd6(SdCard *pSd, - const void * pSwitchArg, - uint32_t * pStatus, - uint32_t * pResp, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - SdCmd6Arg * pSdSwitch; - - assert(pSd); - assert(pSwitchArg); - - TRACE_DEBUG("CMD6()\n\r"); - ResetMciCommand(pCommand); - - pSdSwitch = (SdCmd6Arg*)pSwitchArg; - pCommand->cmd = SD_SWITCH_FUNC; - pCommand->resType = 1; - pCommand->arg = (pSdSwitch->mode << 31) - | (pSdSwitch->reserved << 30) - | (pSdSwitch->reserveFG6 << 20) - | (pSdSwitch->reserveFG5 << 16) - | (pSdSwitch->reserveFG4 << 12) - | (pSdSwitch->reserveFG3 << 8) - | (pSdSwitch->command << 4) - | (pSdSwitch->accessMode << 0); - if (pStatus) { - pCommand->blockSize = 512 / 8; - pCommand->nbBlock = 1; - pCommand->pData = (uint8_t*)pStatus; - pCommand->tranType = MCI_START_READ; - } - pCommand->pResp = pResp; - - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Switches the mode of operation of the selected card or - * Modifies the EXT_CSD registers. - * CMD6 is valid under the "trans" state. - * \return The command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD/MMC card driver instance. - * \param pSwitchArg Pointer to a MmcCmd6Arg instance. - * \param pResp Pointer to where the response is returned. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t MmcCmd6(SdCard *pSd, - const void * pSwitchArg, - uint32_t * pResp, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - MmcCmd6Arg * pMmcSwitch; - - assert(pSd); - assert(pSwitchArg); - - TRACE_DEBUG("CMD6()\n\r"); - ResetMciCommand(pCommand); - - pMmcSwitch = (MmcCmd6Arg*)pSwitchArg; - pCommand->cmd = MMC_SWITCH; - pCommand->resType = 1; - pCommand->arg = (pMmcSwitch->access << 24) - | (pMmcSwitch->index << 16) - | (pMmcSwitch->value << 8) - | (pMmcSwitch->cmdSet << 0); - pCommand->pResp = pResp; - - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Sends SD Memory Card interface condition, which includes host supply - * voltage information and asks the card whether card supports voltage. - * Should be performed at initialization time to detect the card type. - * \param pSd Pointer to a SD card driver instance. - * \param supplyVoltage Expected supply voltage(SD). - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - * \return 0 if successful; - * otherwise returns SD_ERROR_NORESPONSE if the card did not answer - * the command, or SDMMC_ERROR. - */ -uint8_t SdCmd8(SdCard *pSd, - uint8_t supplyVoltage, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint32_t response; - uint8_t error; - - TRACE_DEBUG("Cmd8()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SD_SEND_IF_COND; - pCommand->arg = (supplyVoltage << 8) | (0xAA); - pCommand->resType = 7; - pCommand->pResp = &response; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - - /* Return if there is callback */ - if (fCallback) - return error; - - /* Check result */ - if (error == SDMMC_ERROR_NORESPONSE) { - return SDMMC_ERROR_NORESPONSE; - } - /* SD_R7 - * Bit 0 - 7: check pattern (echo-back) - * Bit 8 -11: voltage accepted - */ - else if (!error && - ((response & 0x00000FFF) == ((supplyVoltage << 8) | 0xAA))) { - return 0; - } - else { - return SDMMC_ERROR; - } -} - -/** - * SEND_EXT_CSD, to get EXT_CSD register as a block of data. - * Valid under "trans" state. - * \param pSd Pointer to a SD card driver instance. - * \param pEXT 512 byte buffer pointer for EXT_CSD data. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - * \return 0 if successful; - * otherwise returns SD_ERROR_NORESPONSE if the card did not answer - * the command, or SDMMC_ERROR. - */ -uint8_t MmcCmd8(SdCard *pSd, - uint8_t* pEXT, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd8()\n\r"); - ResetMciCommand(pCommand); - - pCommand->cmd = MMC_SEND_EXT_CSD; - pCommand->resType = 1; - - pCommand->blockSize = 512; - pCommand->nbBlock = 1; - pCommand->pData = pEXT; - - pCommand->tranType = MCI_START_READ; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Addressed card sends its card-specific - * data (CSD) on the CMD line. - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param cardAddr Card Relative Address. - * \param pCSD Pointer to buffer for CSD data. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd9(SdCard *pSd, - uint16_t cardAddr, - uint32_t *pCSD, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd9()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_SEND_CSD; - pCommand->arg = cardAddr << 16; - pCommand->resType = 2; - pCommand->pResp = pCSD; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Forces the card to stop transmission - * \param pSd Pointer to a SD card driver instance. - * \param pStatus Pointer to a status variable. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd12(SdCard *pSd, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd12()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_STOP_TRANSMISSION; - pCommand->tranType = MCI_STOP_TRANSFER; - pCommand->resType = 1; - pCommand->busyCheck = 1; - pCommand->pResp = pStatus; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Addressed card sends its status register. - * Returns the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param cardAddr Card Relative Address. - * \param pStatus Pointer to a status variable. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd13(SdCard *pSd, - uint16_t cardAddr, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd13()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_SEND_STATUS; - pCommand->arg = cardAddr << 16; - pCommand->resType = 1; - pCommand->pResp = pStatus; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - - return error; -} - -/** - * In the case of a Standard Capacity SD Memory Card, this command sets the - * block length (in bytes) for all following block commands - * (read, write, lock). - * Default block length is fixed to 512 Bytes. - * Set length is valid for memory access commands only if partial block read - * operation are allowed in CSD. - * In the case of a High Capacity SD Memory Card, block length set by CMD16 - * command does not affect the memory read and write commands. Always 512 - * Bytes fixed block length is used. This command is effective for LOCK_UNLOCK - * command. In both cases, if block length is set larger than 512Bytes, the - * card sets the BLOCK_LEN_ERROR bit. - * \param pSd Pointer to a SD card driver instance. - * \param blockLength Block length in bytes. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd16(SdCard *pSd, uint16_t blockLength, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd16()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_SET_BLOCKLEN; - pCommand->arg = blockLength; - pCommand->resType = 1; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - - return error; -} - -/** - * Read single block command - * \param pSd Pointer to a SD card driver instance. - * \param blockSize Block size (shall be set to 512 in case of high capacity). - * \param pData Pointer to the DW aligned buffer to be filled. - * \param address Data Address on SD/MMC card. - * \param pStatus Pointer response buffer as status return. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd17(SdCard *pSd, - uint16_t blockSize, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - assert(pSd); - - TRACE_DEBUG("Cmd17()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_READ_SINGLE_BLOCK; - pCommand->arg = address; - pCommand->resType = 1; - pCommand->pResp = pStatus; - - pCommand->blockSize = blockSize; - pCommand->nbBlock = 1; - pCommand->pData = pData; - - pCommand->tranType = MCI_START_READ; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Continously transfers datablocks from card to host until interrupted by a - * STOP_TRANSMISSION command. - * \param pSd Pointer to a SD card driver instance. - * \param blockSize Block size (shall be set to 512 in case of high capacity). - * \param nbBlocks Number of blocks to send. - * \param pData Pointer to the DW aligned buffer to be filled. - * \param address Data Address on SD/MMC card. - * \param pStatus Pointer to the response status. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd18(SdCard *pSd, - uint16_t blockSize, - uint16_t nbBlocks, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd18()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_READ_MULTIPLE_BLOCK; - pCommand->arg = address; - pCommand->resType = 1; - pCommand->pResp = pStatus; - - pCommand->blockSize = blockSize; - pCommand->nbBlock = nbBlocks; - pCommand->pData = pData; - - pCommand->tranType = MCI_START_READ; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Write single block command - * \param pSd Pointer to a SD card driver instance. - * \param blockSize Block size (shall be set to 512 in case of high capacity). - * \param pData Pointer to the DW aligned buffer to be filled. - * \param address Data Address on SD/MMC card. - * \param pStatus Pointer to response buffer as status. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd24(SdCard *pSd, - uint16_t blockSize, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - assert(pSd); - - TRACE_DEBUG("Cmd24()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_WRITE_BLOCK; - pCommand->arg = address; - pCommand->resType = 1; - pCommand->pResp = pStatus; - - pCommand->blockSize = blockSize; - pCommand->nbBlock = 1; - pCommand->pData = pData; - - pCommand->tranType = MCI_START_WRITE; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Write multiple block command - * \param pSd Pointer to a SD card driver instance. - * \param blockSize Block size (shall be set to 512 in case of high capacity). - * \param nbBlock Number of blocks to send. - * \param pData Pointer to the DW aligned buffer to be filled. - * \param address Data Address on SD/MMC card. - * \param pStatus Pointer to the response buffer as status. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd25(SdCard *pSd, - uint16_t blockSize, - uint16_t nbBlock, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG("Cmd25()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_WRITE_MULTIPLE_BLOCK; - pCommand->arg = address; - pCommand->resType = 1; - pCommand->pResp = pStatus; - - pCommand->blockSize = blockSize; - pCommand->nbBlock = nbBlock; - pCommand->pData = pData; - - pCommand->tranType = MCI_START_WRITE; - pCommand->busyCheck = 1; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * SDIO IO_RW_DIRECT command, response R5. - * \return the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param pIoData Pointer to input argument (\ref SdioRwDirectArg) and - * response (\ref SdmmcR5) buffer. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdioCmd52(SdCard *pSd, uint32_t* pIoData, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - //SdioRwDirectArg *pArg = (SdioRwDirectArg*)pIoData; - - TRACE_DEBUG("Cmd52()\n\r"); - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDIO_IO_RW_DIRECT; - #if 1 - pCommand->arg = *pIoData; - #else - pCommand->arg = pArg->data /* data 7: 0 */ - | (pArg->regAddress << 9) /* address 25: 9 */ - | (pArg->rawFlag << 27) /* ReadAfterWrite 27 */ - | (pArg->functionNum << 28)/* FunctionNumber 30:28 */ - | (pArg->rwFlag << 31); /* Wr/Rd 31 */ - #endif - pCommand->resType = 5; - pCommand->pResp = (uint32_t*)pIoData; - - /* Send command */ - return SendMciCommand(pSd, fCallback); -} - -/** - * SDIO IO_RW_EXTENDED command, response R5. - * \param pSd Pointer to a SD card driver instance. - * \param pArgResp Pointer to input argument (\ref SdioRwExtArg) - * and response (\ref SdmmcR5) buffer. - * \param pData Pointer to data buffer to transfer. - * \param size Transfer data size. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - * \param pArg Callback argument. - */ -uint8_t SdioCmd53(SdCard *pSd, - uint32_t* pArgResp, - uint8_t * pData, uint32_t size, - SdmmcCallback fCallback, - void* pArg) -{ - MciCmd *pCommand = &(mciCmd); - SdioRwExtArg *pCmdArg = (SdioRwExtArg*)pArgResp; - uint8_t error; - - TRACE_DEBUG( "Cmd53()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDIO_IO_RW_EXTENDED; - /* Write/Read operation */ - if (pCmdArg->rwFlag) { - pCommand->tranType = MCI_START_WRITE; - } - else { - pCommand->cmd |= HSMCI_CMDR_TRDIR; - pCommand->tranType = MCI_START_READ; - } - /* Block/Byte mode */ - if (pCmdArg->blockMode) { - pCommand->cmd |= HSMCI_CMDR_TRTYP_BLOCK - | HSMCI_CMDR_TRCMD_START_DATA; - pCommand->blockSize = SDMMC_BLOCK_SIZE; - } - else { - pCommand->cmd |= HSMCI_CMDR_TRTYP_BYTE - | HSMCI_CMDR_TRCMD_START_DATA; - pCommand->blockSize = 1; - } - #if 1 - pCommand->arg = *pArgResp; - #else - pCommand->arg = pCmdArg->count /* data count 8: 0 */ - | (pCmdArg->regAddress << 9) /* address 27: 9 */ - | (pCmdArg->opCode << 26) /* address Inc/Fixed 26 */ - | (pCmdArg->blockMode << 27) /* block mode 27 */ - | (pCmdArg->functionNum << 28)/* FunctionNumber 30:28 */ - | (pCmdArg->rwFlag << 31); /* Wr/Rd 31 */ - #endif - pCommand->resType = 5; - pCommand->pResp = pArgResp; - pCommand->pData = pData; - pCommand->nbBlock = size; - /* Callback and its arguments */ - pCommand->callback = fCallback; - pCommand->pArg = pArg; - - /* Send command */ - error = Sdmmc_SendCommand(pSd->pSdDriver, pCommand); - if (fCallback == 0 && error == 0) { - while(!Sdmmc_IsCommandComplete(pSd->pSdDriver)); - } - return error; -} - -/** - * Indicates to the card that the next command is an application specific - * command rather than a standard command. - * \return the command transfer result (see SendMciCommand). - * \param pSd Pointer to a SD card driver instance. - * \param cardAddr Card Relative Address. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdmmcCmd55(SdCard *pSd, uint16_t cardAddr, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG( "Cmd55()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SDMMC_APP_CMD; - //if (addr == 0) pCommand->cmd |= HSMCI_CMDR_OPDCMD; - pCommand->arg = cardAddr << 16; - pCommand->resType = 1; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Defines the data bus width (00=1bit or 10=4 bits bus) to be used for data - * transfer. - * The allowed data bus widths are given in SCR register. - * Should be invoked after SdmmcCmd55(). - * \param pSd Pointer to a SD card driver instance. - * \param arg Argument for this command. - * \param pStatus Pointer to buffer for command response as status. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - * \return the command transfer result (see SendMciCommand). - */ -uint8_t SdAcmd6(SdCard *pSd, - uint32_t arg, - uint32_t *pStatus, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - - TRACE_DEBUG( "Acmd6()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SD_SET_BUS_WIDTH; - pCommand->arg = arg; - pCommand->resType = 1; - pCommand->pResp = pStatus; - - /* Send command */ - return SendMciCommand(pSd, fCallback); -} - -/** - * The SD Status contains status bits that are related to the SD memory Card - * proprietary features and may be used for future application-specific usage. - * Can be sent to a card only in 'tran_state'. - * Should be invoked after SdmmcCmd55(). - * \param pSd Pointer to a SD card driver instance. - * \param pSdSTAT Pointer to buffer for SD STATUS data. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - * \return the command transfer result (see SendMciCommand). - */ -uint8_t SdAcmd13(SdCard *pSd, - uint32_t * pSdSTAT, - SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG( "Acmd13()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SD_SD_STATUS; - pCommand->resType = 1; - - pCommand->blockSize = 512 / 8; - pCommand->nbBlock = 1; - pCommand->pData = (uint8_t*)pSdSTAT; - - pCommand->tranType = MCI_START_READ; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Asks to all cards to send their operations conditions. - * Returns the command transfer result (see SendMciCommand). - * Should be invoked after SdmmcCmd55(). - * \param pSd Pointer to a SD card driver instance. - * \param pOpIo Pointer to argument that should be sent and OCR content. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdAcmd41(SdCard *pSd, uint32_t* pOpIo, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - - assert(pSd); - assert(pOpIo); - - TRACE_DEBUG( "Acmd41()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SD_SD_SEND_OP_COND; - pCommand->arg = *pOpIo; - pCommand->resType = 3; - pCommand->pResp = pOpIo; - - return SendMciCommand(pSd, fCallback); -} - -/** - * SD Card Configuration Register (SCR) provides information on the SD Memory - * Card's special features that were configured into the given card. The size - * of SCR register is 64 bits. - * Should be invoked after SdmmcCmd55(). - * \param pSd Pointer to a SD card driver instance. - * \param pSCR Pointer to buffer for SCR content. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * Callback argument is fixed to a pointer to SdCard instance. - */ -uint8_t SdAcmd51(SdCard *pSd, uint32_t * pSCR, SdmmcCallback fCallback) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - assert(pSd); - - TRACE_DEBUG( "Acmd51()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->cmd = SD_SEND_SCR; - pCommand->resType = 1; - - pCommand->blockSize = 64 / 8; - pCommand->nbBlock = 1; - pCommand->pData = (uint8_t*)pSCR; - - pCommand->tranType = MCI_START_READ; - - /* Send command */ - error = SendMciCommand(pSd, fCallback); - return error; -} - -/** - * Continue to transfer datablocks from card to host until interrupted by a - * STOP_TRANSMISSION command. - * \param pSd Pointer to a SD card driver instance. - * \param blockSize Block size (shall be set to 512 in case of high capacity). - * \param nbBlock Number of blocks to send. - * \param pData Pointer to the application buffer to be filled. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * \param pArg Callback argument. - */ -uint8_t SdmmcRead(SdCard *pSd, - uint16_t blockSize, - uint16_t nbBlock, - uint8_t *pData, - SdmmcCallback fCallback, - void* pArg) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG( "Read()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->blockSize = blockSize; - pCommand->nbBlock = nbBlock; - pCommand->pData = pData; - - pCommand->tranType = MCI_READ; - - pCommand->callback = fCallback; - pCommand->pArg = pArg; - - /* Send command */ - error = Sdmmc_SendCommand(pSd->pSdDriver, pCommand); - if (fCallback == 0 && error == 0) { - while(!Sdmmc_IsCommandComplete(pSd->pSdDriver)); - } - return error; -} - -/** - * Continue to transfer datablocks from host to card until interrupted by a - * STOP_TRANSMISSION command. - * \param pSd Pointer to a SD card driver instance. - * \param blockSize Block size (shall be set to 512 in case of high capacity). - * \param nbBlock Number of blocks to send. - * \param pData Pointer to the application buffer to be filled. - * \param fCallback Pointer to optional callback invoked on command end. - * NULL: Function return until command finished. - * Pointer: Return immediately and invoke callback at end. - * \param pArg Callback argument. - */ -uint8_t SdmmcWrite(SdCard *pSd, - uint16_t blockSize, - uint16_t nbBlock, - const uint8_t *pData, - SdmmcCallback fCallback, - void* pArg) -{ - MciCmd *pCommand = &(mciCmd); - uint8_t error; - - TRACE_DEBUG( "Write()\n\r" ) ; - ResetMciCommand(pCommand); - - /* Fill command information */ - pCommand->blockSize = blockSize; - pCommand->nbBlock = nbBlock; - pCommand->pData = (uint8_t*)pData; - - pCommand->tranType = MCI_WRITE; - pCommand->busyCheck = 1; - - pCommand->callback = fCallback; - pCommand->pArg = pArg; - - /* Send command */ - error = Sdmmc_SendCommand(pSd->pSdDriver, pCommand); - if (fCallback == 0 && error == 0) { - while(!Sdmmc_IsCommandComplete(pSd->pSdDriver)); - } - return error; -} - -/** - * Return different properties of the SD/MMC low level driver. - * \param pSd Pointer to \ref SdCard instance. - * \param property Property code (\ref sdmmc_properties) that should return. - * \param pExtData Pointer to additional data for the property. - */ -uint32_t SdmmcGetProperty(SdCard * pSd, - uint32_t property, - void * pExtData) -{ - switch(property) { - case SDMMC_PROP_BUS_MODE: - return SDMMC_BUS_4_BIT; - case SDMMC_PROP_HS_MODE: - return 1; - case SDMMC_PROP_BOOT_MODE: - return 0; - } - return 0; -} - -/** - * Setup HW to use the desired slot. - * \param pSd Pointer to SdCard instance. - * \param slot Desired slot. - */ -uint8_t SdmmcSetSlot(SdCard * pSd, uint8_t slot) -{ - return 0; -} - -/** - * Setup HW to use the desired bus width. - * \param pSd Pointer to SdCard instance. - * \param busWidth Desired bus width. - */ -uint32_t SdmmcSetBusWidth(SdCard * pSd, uint32_t busWidth) -{ - switch(busWidth) { - case SDMMC_BUS_4_BIT: busWidth = HSMCI_SDCR_SDCBUS_4; break; - case SDMMC_BUS_8_BIT: busWidth = HSMCI_SDCR_SDCBUS_8; break; - default: busWidth = HSMCI_SDCR_SDCBUS_1; - } - return MCI_SetBusWidth(pSd->pSdDriver, busWidth); -} - -/** - * Setup HW to enable High-Speed mode - * \param pSd Pointer to SdCard instance. - * \param enable 1 to enable, 0 to disable. - */ -uint8_t SdmmcEnableHsMode(SdCard * pSd, uint8_t enable) -{ - return MCI_EnableHsMode(pSd->pSdDriver, enable); -} - -/** - * Setup HW to change to desired clock speed. - * \param pSd Pointer to SdCard instance. - * \param clock Clock frequence in Hz. - * \return Actually running clock. - */ -uint32_t SdmmcSetSpeed(SdCard * pSd,uint32_t clock) -{ - return MCI_SetSpeed(pSd->pSdDriver, clock, BOARD_MCK); -} - -/** - * Processes pending events on the given MCI driver. - * \param pMci Pointer to a MCI driver instance. - */ -void Sdmmc_Handler(Mcid*pMci) -{ - Hsmci *pMciHw = pMci->pMciHw; - MciCmd *pCommand = pMci->pCommand; - volatile uint32_t SR; - volatile uint32_t maskedSR; - volatile uint32_t mask; - uint8_t i; - - assert(pMci); - assert(pMciHw); - assert(pCommand); - - /* Read the status register */ - SR = pMciHw->HSMCI_SR; - mask = pMciHw->HSMCI_IMR; - maskedSR = SR & mask; - - //TRACE_INFO_WP("i%dS %x\n\r", (pCommand->cmd & HSMCI_CMDR_CMDNB_Msk), SR); - //TRACE_INFO_WP("i%dM %x\n\r", (pCommand->cmd & HSMCI_CMDR_CMDNB_Msk), maskedSR); - - /* Check if an error has occured */ - if ((maskedSR & STATUS_ERRORS) != 0) - { - pCommand->state = SDMMC_CMD_ERROR; - /* Check error code */ - if ((maskedSR & STATUS_ERRORS) == HSMCI_SR_RTOE) - { - pCommand->status = SDMMC_ERROR_NORESPONSE; - } - else - { - TRACE_INFO( "iERR %x: C%x(%d), R%d\n\r", maskedSR, pCommand->cmd, (pCommand->cmd & HSMCI_CMDR_CMDNB_Msk), pCommand->resType ) ; - /* If the command is SEND_OP_COND the CRC error flag is always - present (cf: R3,R4 response, no CRC) */ - if ( ((pCommand->resType == 3)||(pCommand->resType == 4)) - && (maskedSR & STATUS_ERRORS) == HSMCI_SR_RCRCE) - { - } - else - { - pCommand->status = SDMMC_ERROR; - } - } - } - mask &= ~STATUS_ERRORS; - - /* Check if a command has been completed */ - if (maskedSR & HSMCI_SR_CMDRDY) - { - /* Command OK, disable interrupt */ - pMciHw->HSMCI_IDR = HSMCI_IDR_CMDRDY; - - /* Check BUSY */ - if (pCommand->busyCheck - && (pCommand->tranType == MCI_NO_TRANSFER - || (pCommand->tranType == MCI_STOP_TRANSFER)) ) - { - /* Check XFRDONE to confirm no bus action */ - if (SR & HSMCI_SR_NOTBUSY) - { - mask &= ~(uint32_t)HSMCI_IMR_CMDRDY; - } - else - { - pMciHw->HSMCI_IER = HSMCI_SR_NOTBUSY; - } - } - else - { - mask &= ~(uint32_t)HSMCI_IMR_CMDRDY; - } - } - - /* Check if transfer stopped */ - if (maskedSR & HSMCI_SR_XFRDONE) - { - mask &= ~(uint32_t)HSMCI_IMR_XFRDONE; - } - - /* Check if not busy */ - if (maskedSR & HSMCI_SR_NOTBUSY) - { - mask &= ~(uint32_t)HSMCI_IMR_NOTBUSY; - } - - /* Check if data read done */ - if (maskedSR & HSMCI_SR_RXBUFF) - { - mask &= ~(uint32_t)HSMCI_IMR_RXBUFF; - } - - /* Check if TX ready */ - if (maskedSR & HSMCI_SR_TXRDY) - { - mask &= ~(uint32_t)HSMCI_IMR_TXRDY; - } - - /* Check if FIFO empty (TX & All data sent) */ - if (maskedSR & HSMCI_SR_FIFOEMPTY) - { - /* Disable FIFO EMPTY */ - pMciHw->HSMCI_IDR = HSMCI_SR_FIFOEMPTY; - /* Byte transfer no BLKE */ - if (pMciHw->HSMCI_MR & HSMCI_MR_FBYTE) - { - mask &= ~(uint32_t)HSMCI_IMR_FIFOEMPTY; - } - /* End command until no data on bus */ - else - { - if ((SR & HSMCI_SR_BLKE) == 0) - { - pMciHw->HSMCI_IER = HSMCI_IER_BLKE; - } - else - { - mask &= ~(uint32_t)HSMCI_IMR_FIFOEMPTY; - } - } - } - - /* Check if BLKE (TX & no data on bus) */ - if (maskedSR & HSMCI_SR_BLKE) - { - if (SR & HSMCI_SR_TXRDY ) - { - mask &= ~(uint32_t)HSMCI_SR_BLKE; - } - else - { - pMciHw->HSMCI_IDR = HSMCI_SR_BLKE; - pMciHw->HSMCI_IER = HSMCI_SR_TXRDY; - } - } - - /* Check if data write finished */ - if (maskedSR & HSMCI_SR_TXBUFE) - { - /* Data OK, disable interrupt */ - pMciHw->HSMCI_IDR = HSMCI_IDR_TXBUFE; - - /* End command until no data on bus */ - if ((SR & HSMCI_SR_FIFOEMPTY) == 0) - { - pMciHw->HSMCI_IER = HSMCI_IER_FIFOEMPTY; - } - else - { - mask &= ~(uint32_t)HSMCI_SR_TXBUFE; - } - } - - /* All non-error mask done, complete the command */ - if (0 == mask || pCommand->state != SDMMC_CMD_PENDING) - { - /* Store the card response in the provided buffer */ - if (pCommand->pResp) - { - uint8_t resSize; - switch (pCommand->resType) - { - case 1: - case 3: - case 4: - case 5: - case 6: - case 7: - resSize = 1; - break; - - case 2: - resSize = 4; - break; - - default: - resSize = 0; - break; - } - - for (i=0; i < resSize; i++) - { - pCommand->pResp[i] = pMciHw->HSMCI_RSPR[0]; - } - } - - /* If no error occured, the transfer is successful */ - if (pCommand->state == SDMMC_CMD_PENDING) - { - pCommand->state = 0; - } - /* Error ? Reset to remove transfer statuses */ - else - { - MCI_Reset(pMci, 1); - } - - /* Disable PDC */ - pMciHw->HSMCI_PTCR = HSMCI_PTCR_RXTDIS | HSMCI_PTCR_TXTDIS; - - /* Disable interrupts */ - pMciHw->HSMCI_IDR = pMciHw->HSMCI_IMR; - - /* Disable peripheral */ - PMC_DisablePeripheral(pMci->mciId); - - /* Release the semaphore */ - pMci->semaphore++; - - /* Invoke the callback associated with the current command (if any) */ - if ( pCommand->callback ) - { - (pCommand->callback)(pCommand->status, pCommand->pArg); - } - } -} - -/**@}*/ diff --git a/src/ersky9x/libraries/memories/sdio.h b/src/ersky9x/libraries/memories/sdio.h deleted file mode 100644 index 097295fb6..000000000 --- a/src/ersky9x/libraries/memories/sdio.h +++ /dev/null @@ -1,283 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file */ - -#ifndef SDIO_H -#define SDIO_H - -/** \addtogroup sdmmc_api - * @{ - * \addtogroup sdio_api SDIO Driver API - * @{ - */ - -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/** \addtogroup sdio_fun_def SDIO Functions - * Here lists SDIO functions definitions - * - \ref SDIO_CIA or \ref SDIO_FN0 - * - \ref SDIO_FN1 - * - \ref SDIO_FN2 - * - \ref SDIO_FN3 - * - \ref SDIO_FN4 - * - \ref SDIO_FN5 - * - \ref SDIO_FN6 - * - \ref SDIO_FN7 - * @{*/ -#define SDIO_CIA 0 /**< SDIO Function 0 (CIA) */ -#define SDIO_FN0 0 /**< SDIO Function 0 */ -#define SDIO_FN1 1 /**< SDIO Function 1 */ -#define SDIO_FN2 2 /**< SDIO Function 2 */ -#define SDIO_FN3 3 /**< SDIO Function 3 */ -#define SDIO_FN4 4 /**< SDIO Function 4 */ -#define SDIO_FN5 5 /**< SDIO Function 5 */ -#define SDIO_FN6 6 /**< SDIO Function 6 */ -#define SDIO_FN7 7 /**< SDIO Function 7 */ -/** @}*/ - -/** \addtogroup sdio_cccr_def SDIO Card Common Control Registers (CCCR) - * Here lists SDIO CCCR definitions - * -# \ref SDIO_CCCR_REG - * -# \ref SDIO_SD_REV_REG - * -# \ref SDIO_IOE_REG - * -# \ref SDIO_IOR_REG - * -# \ref SDIO_IEN_REG - * -# \ref SDIO_INT_REG - * -# \ref SDIO_IOA_REG - * -# \ref SDIO_BUS_CTRL_REG - * -# \ref SDIO_CAP_REG - * -# \ref SDIO_CIS_PTR_REG - * -# . - * -# . - * -# \ref SDIO_BUS_SUSP_REG - * -# \ref SDIO_FUN_SEL_REG - * -# \ref SDIO_EXEC_REG - * -# \ref SDIO_READY_REG - * -# \ref SDIO_FN0_BLKSIZ_REG - * -# . - * -# \ref SDIO_POWER_REG - * -# \ref SDIO_HS_REG - * @{*/ -#define SDIO_CCCR_REG 0x00 /**< CCCR/SDIO revision (RO) */ -#define SDIO_CCCR (0xFUL << 0)/**< CCCR Format Version number */ -#define SDIO_CCCR_1_00 (0x0UL << 0)/**< CCCR/FBR Version 1.00 */ -#define SDIO_CCCR_1_10 (0x1UL << 0)/**< CCCR/FBR Version 1.10 */ -#define SDIO_CCCR_1_20 (0x2UL << 0)/**< CCCR/FBR Version 1.20 */ -#define SDIO_SDIO (0xFUL << 4)/**< SDIO Specification */ -#define SDIO_SDIO_1_00 (0x0UL << 4)/**< SDIO Specification 1.00 */ -#define SDIO_SDIO_1_10 (0x1UL << 4)/**< SDIO Specification 1.10 */ -#define SDIO_SDIO_1_20 (0x2UL << 4)/**< SDIO Specification 1.20(unreleased) */ -#define SDIO_SDIO_2_00 (0x3UL << 4)/**< SDIO Specification Version 2.00 */ -#define SDIO_SD_REV_REG 0x01 /**< SD Specification Revision (RO) */ -#define SDIO_SD (0xFUL << 0)/**< SD Physical Specification */ -#define SDIO_SD_1_01 (0x0UL << 0)/**< SD 1.01 (Mar 2000) */ -#define SDIO_SD_1_10 (0x1UL << 0)/**< SD 1.10 (Oct 2004) */ -#define SDIO_SD_2_00 (0x2UL << 0)/**< SD 2.00 (May 2006) */ -#define SDIO_IOE_REG 0x02 /**< I/O Enable (R/W) */ -#define SDIO_IOE 0xFEUL /**< Enable/Disable Function */ -#define SDIO_IOE_FN1 (0x1UL << 1)/**< Function 1 Enable/Disable */ -#define SDIO_IOE_FN2 (0x1UL << 2)/**< Function 2 Enable/Disable */ -#define SDIO_IOE_FN3 (0x1UL << 3)/**< Function 3 Enable/Disable */ -#define SDIO_IOE_FN4 (0x1UL << 4)/**< Function 4 Enable/Disable */ -#define SDIO_IOE_FN5 (0x1UL << 5)/**< Function 5 Enable/Disable */ -#define SDIO_IOE_FN6 (0x1UL << 6)/**< Function 6 Enable/Disable */ -#define SDIO_IOE_FN7 (0x1UL << 7)/**< Function 7 Enable/Disable */ -#define SDIO_IOR_REG 0x03 /**< I/O Ready (RO) */ -#define SDIO_IOR 0xFEUL /**< I/O Function Ready */ -#define SDIO_IOR_FN1 (0x1UL << 1)/**< Function 1 ready */ -#define SDIO_IOR_FN2 (0x1UL << 2)/**< Function 2 ready */ -#define SDIO_IOR_FN3 (0x1UL << 3)/**< Function 3 ready */ -#define SDIO_IOR_FN4 (0x1UL << 4)/**< Function 4 ready */ -#define SDIO_IOR_FN5 (0x1UL << 5)/**< Function 5 ready */ -#define SDIO_IOR_FN6 (0x1UL << 6)/**< Function 6 ready */ -#define SDIO_IOR_FN7 (0x1UL << 7)/**< Function 7 ready */ -#define SDIO_IEN_REG 0x04 /**< Int Enable */ -#define SDIO_IENM 0x01UL /**< Int Enable Master (R/W) */ -#define SDIO_IEN 0xFEUL /**< Int Enable for function (R/W) */ -#define SDIO_IEN_FN1 (0x1UL << 1)/**< Function 1 Int Enable */ -#define SDIO_IEN_FN2 (0x1UL << 2)/**< Function 2 Int Enable */ -#define SDIO_IEN_FN3 (0x1UL << 3)/**< Function 3 Int Enable */ -#define SDIO_IEN_FN4 (0x1UL << 4)/**< Function 4 Int Enable */ -#define SDIO_IEN_FN5 (0x1UL << 5)/**< Function 5 Int Enable */ -#define SDIO_IEN_FN6 (0x1UL << 6)/**< Function 6 Int Enable */ -#define SDIO_IEN_FN7 (0x1UL << 7)/**< Function 7 Int Enable */ -#define SDIO_INT_REG 0x05 /**< Int Pending */ -#define SDIO_INT 0xFE /**< Int Pending for functions (RO) */ -#define SDIO_INT_FN1 (0x1UL << 1)/**< Function 1 Int pending */ -#define SDIO_INT_FN2 (0x1UL << 2)/**< Function 2 Int pending */ -#define SDIO_INT_FN3 (0x1UL << 3)/**< Function 3 Int pending */ -#define SDIO_INT_FN4 (0x1UL << 4)/**< Function 4 Int pending */ -#define SDIO_INT_FN5 (0x1UL << 5)/**< Function 5 Int pending */ -#define SDIO_INT_FN6 (0x1UL << 6)/**< Function 6 Int pending */ -#define SDIO_INT_FN7 (0x1UL << 7)/**< Function 7 Int pending */ -#define SDIO_IOA_REG 0x06 /**< I/O Abort */ -#define SDIO_AS (0x7UL << 0)/**< Abort Select In Order (WO) */ -#define SDIO_AS_FN1 (0x1UL << 0)/**< Abort function 1 IO */ -#define SDIO_AS_FN2 (0x2UL << 0)/**< Abort function 2 IO */ -#define SDIO_AS_FN3 (0x3UL << 0)/**< Abort function 3 IO */ -#define SDIO_AS_FN4 (0x4UL << 0)/**< Abort function 4 IO */ -#define SDIO_AS_FN5 (0x5UL << 0)/**< Abort function 5 IO */ -#define SDIO_AS_FN6 (0x6UL << 0)/**< Abort function 6 IO */ -#define SDIO_AS_FN7 (0x7UL << 0)/**< Abort function 7 IO */ -#define SDIO_RES (0x1UL << 3)/**< IO CARD RESET (WO) */ -#define SDIO_BUS_CTRL_REG 0x07 /**< Bus Interface Control */ -#define SDIO_BUSWIDTH (0x3UL << 0)/**< Data bus width (R/W) */ -#define SDIO_BUSWIDTH_1B (0x0UL << 0)/**< 1-bit data bus */ -#define SDIO_BUSWIDTH_4B (0x2UL << 0)/**< 4-bit data bus */ -#define SDIO_ECSI (0x1UL << 5)/**< Enable Continuous SPI interrupt (R/W) */ -#define SDIO_SCSI (0x1UL << 6)/**< Support Continuous SPI interrupt (RO) */ -#define SDIO_CD (0x1UL << 7)/**< Connect(0)/Disconnect(1) pull-up on CD/DAT[3] (R/W) */ -#define SDIO_CAP_REG 0x08 /**< Card Capability */ -#define SDIO_SDC (0x1UL << 0)/**< Support Direct Commands during data transfer (RO) */ -#define SDIO_SMB (0x1UL << 1)/**< Support Multi-Block (RO) */ -#define SDIO_SRW (0x1UL << 2)/**< Support Read Wait (RO) */ -#define SDIO_SBS (0x1UL << 3)/**< Support Suspend/Resume (RO) */ -#define SDIO_S4MI (0x1UL << 4)/**< Support interrupt between blocks of data in 4-bit SD mode (RO) */ -#define SDIO_E4MI (0x1UL << 5)/**< Enable interrupt between blocks of data in 4-bit SD mode (R/W) */ -#define SDIO_LSC (0x1UL << 6)/**< Low-Speed Card (RO) */ -#define SDIO_4BLS (0x1UL << 7)/**< 4-bit support for Low-Speed Card (RO) */ -#define SDIO_CIS_PTR_REG 0x09 /**< Pointer to CIS (3B, LSB first) */ -#define SDIO_BUS_SUSP_REG 0x0C /**< Bus Suspend */ -#define SDIO_BS (0x1UL << 0)/**< Bus Status (transfer on DAT[x] lines) (RO) */ -#define SDIO_BR (0x1UL << 1)/**< Bus Release Request/Status (R/W) */ -#define SDIO_FUN_SEL_REG 0x0D /**< Function select */ -#define SDIO_DF (0x1UL << 7)/**< Resume Data Flag (RO) */ -#define SDIO_FS (0xFUL << 0)/**< Select Function (R/W) */ -#define SDIO_FS_CIA (0x0UL << 0)/**< Select CIA (function 0) */ -#define SDIO_FS_FN1 (0x1UL << 0)/**< Select Function 1 */ -#define SDIO_FS_FN2 (0x2UL << 0)/**< Select Function 2 */ -#define SDIO_FS_FN3 (0x3UL << 0)/**< Select Function 3 */ -#define SDIO_FS_FN4 (0x4UL << 0)/**< Select Function 4 */ -#define SDIO_FS_FN5 (0x5UL << 0)/**< Select Function 5 */ -#define SDIO_FS_FN6 (0x6UL << 0)/**< Select Function 6 */ -#define SDIO_FS_FN7 (0x7UL << 0)/**< Select Function 7 */ -#define SDIO_FS_MEM (0x8UL << 0)/**< Select memory in combo card */ -#define SDIO_EXEC_REG 0x0E /**< Exec Flags (RO) */ -#define SDIO_EXM (0x1UL << 0)/**< Executing status of memory */ -#define SDIO_EX (0xFEUL) /**< Executing status of functions */ -#define SDIO_EX_FN1 (0x1UL << 1)/**< Executing status of function 1 */ -#define SDIO_EX_FN2 (0x1UL << 2)/**< Executing status of function 2 */ -#define SDIO_EX_FN3 (0x1UL << 3)/**< Executing status of function 3 */ -#define SDIO_EX_FN4 (0x1UL << 4)/**< Executing status of function 4 */ -#define SDIO_EX_FN5 (0x1UL << 5)/**< Executing status of function 5 */ -#define SDIO_EX_FN6 (0x1UL << 6)/**< Executing status of function 6 */ -#define SDIO_EX_FN7 (0x1UL << 7)/**< Executing status of function 7 */ -#define SDIO_READY_REG 0x0F /**< Ready Flags (RO) */ -#define SDIO_RFM (0x1UL << 0)/**< Ready Flag for memory */ -#define SDIO_RF (0xFEUL) /**< Ready Flag for functions */ -#define SDIO_RF_FN1 (0x1UL << 1)/**< Ready Flag for function 1 */ -#define SDIO_RF_FN2 (0x1UL << 2)/**< Ready Flag for function 2 */ -#define SDIO_RF_FN3 (0x1UL << 3)/**< Ready Flag for function 3 */ -#define SDIO_RF_FN4 (0x1UL << 4)/**< Ready Flag for function 4 */ -#define SDIO_RF_FN5 (0x1UL << 5)/**< Ready Flag for function 5 */ -#define SDIO_RF_FN6 (0x1UL << 6)/**< Ready Flag for function 6 */ -#define SDIO_RF_FN7 (0x1UL << 7)/**< Ready Flag for function 7 */ -#define SDIO_FN0_BLKSIZ_REG 0x10 /**< FN0 Block Size (2B, LSB first) (R/W) */ -#define SDIO_POWER_REG 0x12 /**< Power Control */ -#define SDIO_SMPC (0x1UL << 0)/**< Support Master Power Control (RO) */ -#define SDIO_EMPC (0x1UL << 1)/**< Enable Master Power Control (R/W) */ -#define SDIO_HS_REG 0x13 /**< High-Speed */ -#define SDIO_SHS (0x1UL << 0)/**< Support High-Speed (RO) */ -#define SDIO_EHS (0x1UL << 1)/**< Enable High-Speed (R/W) */ -/** @}*/ - -/** \addtogroup sdio_fbr_def SDIO Function Basic Registers (FBR) - * Here lists SDIO Function Basic Register definitions. - * - SDIO_FBR_ADDR() - * -# \ref SDIO_FBR_CSA_IF - * -# \ref SDIO_FBR_EXT_IF - * -# \ref SDIO_FBR_PWR - * -# \ref SDIO_FBR_CIS_PTR - * -# . - * -# . - * -# \ref SDIO_FBR_CSA_PTR - * -# . - * -# . - * -# \ref SDIO_FBR_CSA_DATA - * -# \ref SDIO_FBR_BLK_SIZ - * -# . - * @{*/ -#define SDIO_FBR_ADDR(fn, x) (0x100*(fn) + (x)) -#define SDIO_FBR_CSA_IF 0x0 /**< CSA and function interface code (RO) */ -#define SDIO_IFC (0xFUL << 0)/**< Standard SDIO Fun Interface Code */ -#define SDIO_IFC_NO_IF (0x0UL << 0)/**< No SDIO standard interface */ -#define SDIO_IFC_UART (0x1UL << 0)/**< UART */ -#define SDIO_IFC_TA_BT (0x2UL << 0)/**< Type-A Bluetooth */ -#define SDIO_IFC_TB_BT (0x3UL << 0)/**< Type-B Bluetooth */ -#define SDIO_IFC_GPS (0x4UL << 0)/**< GPS */ -#define SDIO_IFC_CAMERA (0x5UL << 0)/**< Camera */ -#define SDIO_IFC_PHS (0x6UL << 0)/**< PHS */ -#define SDIO_IFC_WLAN (0x7UL << 0)/**< WLAN */ -#define SDIO_IFC_ATA (0x8UL << 0)/**< Embedded SDIO-ATA */ -#define SDIO_IFC_EXT (0xFUL << 0)/**< Check EXT interface code */ -#define SDIO_SCSA (0x1UL << 6)/**< Function supports Code Storage Area (CSA) */ -#define SDIO_FBR_CSA (0x1UL << 7)/**< Function CSA enable */ -#define SDIO_FBR_EXT_IF 0x1 /**< Extended function interface code (RO) */ -#define SDIO_FBR_PWR 0x2 /**< function power control */ -#define SDIO_SPS (0x1UL << 0)/**< function support power selection (RO) */ -#define SDIO_EPS (0x1UL << 1)/**< Low Current Mode/High Current Mode (R/W) */ -#define SDIO_FBR_CIS_PTR 0x9 /**< Address pointer to function CIS (3B, LSB first) (RO) */ -#define SDIO_FBR_CSA_PTR 0xC /**< Address pointer to CSA (3B, LSB first) (R/W) */ -#define SDIO_FBR_CSA_DATA 0xF /**< Read/Write fifo to CSA (R/W) */ -#define SDIO_FBR_BLK_SIZ 0x10 /**< Block size (2B, LSB first) (R/W) */ -/** @}*/ - -/** \addtogroup sdio_meta_def SDIO Card Metaformat - * Here lists definitions for SDIO metaformats. - * - \ref CISTPL_NULL - * - \ref CISTPL_DEVICE - * - \ref CISTPL_CHECKSUM - * - \ref CISTPL_VERS_1 - * - \ref CISTPL_ALTSTR - * - \ref CISTPL_MANFID - * - \ref CISTPL_FUNCID - * - \ref CISTPL_FUNCE - * - \ref CISTPL_SDIO_STD - * - \ref CISTPL_SDIO_EXT - * - \ref CISTPL_END - * @{*/ -#define CISTPL_NULL 0x00 /**< Null tuple (PCMCIA 3.1.9) */ -#define CISTPL_DEVICE 0x01 /**< Device tuple (PCMCIA 3.2.2) */ -#define CISTPL_CHECKSUM 0x10 /**< Checksum control (PCMCIA 3.1.1) */ -#define CISTPL_VERS_1 0x15 /**< Level 1 version (PCMCIA 3.2.10) */ -#define CISTPL_ALTSTR 0x16 /**< Alternate Language String (PCMCIA 3.2.1) */ -#define CISTPL_MANFID 0x20 /**< Manufacturer Identification String (PCMCIA 3.2.9) */ -#define CISTPL_FUNCID 0x21 /**< Function Identification (PCMCIA 3.2.7) */ -#define CISTPL_FUNCE 0x22 /**< Function Extensions (PCMCIA 3.2.6) */ -#define CISTPL_SDIO_STD 0x91 /**< Additional information for SDIO (PCMCIA 6.1.2) */ -#define CISTPL_SDIO_EXT 0x92 /**< Reserved for future SDIO (PCMCIA 6.1.3) */ -#define CISTPL_END 0xFF /**< The End-of-chain Tuple (PCMCIA 3.1.2) */ -/** @}*/ - -/** @}*/ -/**@}*/ -#endif // #define SDIO_H diff --git a/src/ersky9x/libraries/memories/sdmmc.c b/src/ersky9x/libraries/memories/sdmmc.c deleted file mode 100644 index 1f542cdc4..000000000 --- a/src/ersky9x/libraries/memories/sdmmc.c +++ /dev/null @@ -1,2345 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup sdmmc_api - * @{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - - -#include -#include -#include -#include "board.h" -#include "sdmmc.h" -#include "debug.h" - -#define assert(...) -/*---------------------------------------------------------------------------- - * Global variables - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - * Local constants - *----------------------------------------------------------------------------*/ - -/** \addtogroup sdmmc_op_state SD/MMC operation states - * @{*/ -#define SD_STATE_IDLE 0 -#define SD_STATE_INIT 1 -#define SD_STATE_READY 2 -#define SD_STATE_READ 0x10 -#define SD_STATE_RD_RDY 0x11 -#define SD_STATE_RD_BSY 0x12 -#define SD_STATE_WRITE 0x20 -#define SD_STATE_WR_RDY 0x21 -#define SD_STATE_WR_BSY 0x22 -#define SD_STATE_BOOT 0x30 -/** @}*/ - -/** \addtogroup sdmmc_status_bm SD/MMC Status register constants - * @{*/ -#define STATUS_APP_CMD (1UL << 5) -#define STATUS_SWITCH_ERROR (1UL << 7) -#define STATUS_READY_FOR_DATA (1UL << 8) -#define STATUS_IDLE (0UL << 9) -#define STATUS_READY (1UL << 9) -#define STATUS_IDENT (2UL << 9) -#define STATUS_STBY (3UL << 9) -#define STATUS_TRAN (4UL << 9) -#define STATUS_DATA (5UL << 9) -#define STATUS_RCV (6UL << 9) -#define STATUS_PRG (7UL << 9) -#define STATUS_DIS (8UL << 9) -#define STATUS_STATE (0xFUL << 9) -#define STATUS_ERASE_RESET (1UL << 13) -#define STATUS_WP_ERASE_SKIP (1UL << 15) -#define STATUS_CIDCSD_OVERWRITE (1UL << 16) -#define STATUS_OVERRUN (1UL << 17) -#define STATUS_UNERRUN (1UL << 18) -#define STATUS_ERROR (1UL << 19) -#define STATUS_CC_ERROR (1UL << 20) -#define STATUS_CARD_ECC_FAILED (1UL << 21) -#define STATUS_ILLEGAL_COMMAND (1UL << 22) -#define STATUS_COM_CRC_ERROR (1UL << 23) -#define STATUS_UN_LOCK_FAILED (1UL << 24) -#define STATUS_CARD_IS_LOCKED (1UL << 25) -#define STATUS_WP_VIOLATION (1UL << 26) -#define STATUS_ERASE_PARAM (1UL << 27) -#define STATUS_ERASE_SEQ_ERROR (1UL << 28) -#define STATUS_BLOCK_LEN_ERROR (1UL << 29) -#define STATUS_ADDRESS_MISALIGN (1UL << 30) -#define STATUS_ADDR_OUT_OR_RANGE (1UL << 31) - -#define STATUS_STOP ((uint32_t)( STATUS_CARD_IS_LOCKED \ - | STATUS_COM_CRC_ERROR \ - | STATUS_ILLEGAL_COMMAND \ - | STATUS_CC_ERROR \ - | STATUS_ERROR \ - | STATUS_STATE \ - | STATUS_READY_FOR_DATA )) - -#define STATUS_WRITE ((uint32_t)( STATUS_ADDR_OUT_OR_RANGE \ - | STATUS_ADDRESS_MISALIGN \ - | STATUS_BLOCK_LEN_ERROR \ - | STATUS_WP_VIOLATION \ - | STATUS_CARD_IS_LOCKED \ - | STATUS_COM_CRC_ERROR \ - | STATUS_ILLEGAL_COMMAND \ - | STATUS_CC_ERROR \ - | STATUS_ERROR \ - | STATUS_ERASE_RESET \ - | STATUS_STATE \ - | STATUS_READY_FOR_DATA )) - -#define STATUS_READ ((uint32_t)( STATUS_ADDR_OUT_OR_RANGE \ - | STATUS_ADDRESS_MISALIGN \ - | STATUS_BLOCK_LEN_ERROR \ - | STATUS_CARD_IS_LOCKED \ - | STATUS_COM_CRC_ERROR \ - | STATUS_ILLEGAL_COMMAND \ - | STATUS_CARD_ECC_FAILED \ - | STATUS_CC_ERROR \ - | STATUS_ERROR \ - | STATUS_ERASE_RESET \ - | STATUS_STATE \ - | STATUS_READY_FOR_DATA )) - -#define STATUS_SD_SWITCH ((uint32_t)( STATUS_ADDR_OUT_OR_RANGE \ - | STATUS_CARD_IS_LOCKED \ - | STATUS_COM_CRC_ERROR \ - | STATUS_ILLEGAL_COMMAND \ - | STATUS_CARD_ECC_FAILED \ - | STATUS_CC_ERROR \ - | STATUS_ERROR \ - | STATUS_UNERRUN \ - | STATUS_OVERRUN \ - /*| STATUS_STATE*/)) - -#define STATUS_MMC_SWITCH ((uint32_t)( STATUS_CARD_IS_LOCKED \ - | STATUS_COM_CRC_ERROR \ - | STATUS_ILLEGAL_COMMAND \ - | STATUS_CC_ERROR \ - | STATUS_ERROR \ - | STATUS_ERASE_RESET \ - /*| STATUS_STATE*/ \ - /*| STATUS_READY_FOR_DATA*/ \ - | STATUS_SWITCH_ERROR )) -/** @}*/ - -/** \addtogroup sdio_status_bm SDIO Status definitions - * @{*/ -/** The CRC check of the previous command failed. */ -#define SDIO_COM_CRC_ERROR (1UL << 15) -/** Command not legal for the card state. */ -#define SDIO_ILLEGAL_COMMAND (1UL << 14) -/** A general or an unknown error occurred during the operation. */ -#define SDIO_R6_ERROR (1UL << 13) -/** SDIO state (in R5) */ -#define SDIO_R5_STATE (3UL << 12)/**< SDIO R5 state mask */ -#define SDIO_R5_STATE_DIS (0UL << 12) /**< Disabled */ -#define SDIO_R5_STATE_CMD (1UL << 12) /**< DAT lines free */ -#define SDIO_R5_STATE_TRN (2UL << 12) /**< Transfer */ -#define SDIO_R5_STATE_RFU (3UL << 12) /**< Reserved */ -#define SDIO_R5_ERROR (1UL << 11)/**< General error */ -#define SDIO_R5_FUNC_NUM (1UL << 10)/**< Invalid function number */ -#define SDIO_R5_OUT_OF_RANGE (1UL << 9) /**< Argument out of range */ - -/** Status bits mask for SDIO R6 */ -#define STATUS_SDIO_R6 (SDIO_COM_CRC_ERROR \ - | SDIO_ILLEGAL_COMMAND \ - | SDIO_R6_ERROR) -/** Status bits mask for SDIO R5 */ -#define STATUS_SDIO_R5 (0/*SDIO_R5_STATE*/ \ - | SDIO_R5_ERROR \ - | SDIO_R5_FUNC_NUM \ - | SDIO_R5_OUT_OF_RANGE) -/** @}*/ - -/** \addtogroup sdmmc_ocr_bm OCR Register definitions - * @{*/ -#define OCR_VDD_16_17 ((uint32_t)(1 << 4)) -#define OCR_VDD_17_18 ((uint32_t)(1 << 5)) -#define OCR_VDD_18_19 ((uint32_t)(1 << 6)) -#define OCR_VDD_19_20 ((uint32_t)(1 << 7)) -#define OCR_VDD_20_21 ((uint32_t)(1 << 8)) -#define OCR_VDD_21_22 ((uint32_t)(1 << 9)) -#define OCR_VDD_22_23 ((uint32_t)(1 << 10)) -#define OCR_VDD_23_24 ((uint32_t)(1 << 11)) -#define OCR_VDD_24_25 ((uint32_t)(1 << 12)) -#define OCR_VDD_25_26 ((uint32_t)(1 << 13)) -#define OCR_VDD_26_27 ((uint32_t)(1 << 14)) -#define OCR_VDD_27_28 ((uint32_t)(1 << 15)) -#define OCR_VDD_28_29 ((uint32_t)(1 << 16)) -#define OCR_VDD_29_30 ((uint32_t)(1 << 17)) -#define OCR_VDD_30_31 ((uint32_t)(1 << 18)) -#define OCR_VDD_31_32 ((uint32_t)(1 << 19)) -#define OCR_VDD_32_33 ((uint32_t)(1 << 20)) -#define OCR_VDD_33_34 ((uint32_t)(1 << 21)) -#define OCR_VDD_34_35 ((uint32_t)(1 << 22)) -#define OCR_VDD_35_36 ((uint32_t)(1 << 23)) - -#define SDMMC_HOST_VOLTAGE_RANGE (OCR_VDD_27_28 +\ - OCR_VDD_28_29 +\ - OCR_VDD_29_30 +\ - OCR_VDD_30_31 +\ - OCR_VDD_31_32 +\ - OCR_VDD_32_33) - -#define OCR_BIT2930 (3UL << 29) -#define OCR_MMC_HIGH_DENSITY (0x2UL << 29) -#define OCR_MMC_HD (0x2UL << 29) - -#define OCR_SDIO_MP (1UL << 27) -#define OCR_SDIO_NF (7UL << 28) - -#define OCR_SD_CCS (1UL << 30) - -#define OCR_POWER_UP_BUSY (1UL << 31) -/** @}*/ - -// Optional commands -#define SD_ACMD6_SUPPORT ((uint32_t)1 << 0) -#define SD_ACMD13_SUPPORT ((uint32_t)1 << 1) -#define SD_ACMD41_SUPPORT ((uint32_t)1 << 2) -#define SD_ACMD51_SUPPORT ((uint32_t)1 << 3) -#define SD_CMD16_SUPPORT ((uint32_t)1 << 8) - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Return SD/MMC card address */ -#define CARD_ADDR(pSd) (pSd->cardAddress) - -/** Return SD/MMC card block size (Default size now, 512B) */ -#define BLOCK_SIZE(pSd) (SDMMC_BLOCK_SIZE) - -/** Convert block address to SD/MMC command parameter */ -#define SD_ADDRESS(pSd, address) \ - ( ((pSd)->totalSize == 0xFFFFFFFF) ? \ - (address):((address) << SDMMC_BLOCK_SIZE_SHIFT) ) - -/** Check if SD Spec version 1.10 or later */ -#define SD_IsVer1_10(pSd) \ - ( SD_SCR_SD_SPEC(pSd) >= SD_SCR_SD_SPEC_1_10 ) - -/** Check if SD card support HS mode (1.10 or later) */ -#define SD_IsHsModeSupported(pSd) \ - ( SD_IsVer1_10(pSd)||(SD_CSD_STRUCTURE(pSd)>=1) ) - -/** Check if SD card support 4-bit mode (All SD card) */ -#define SD_IsBusModeSupported(pSd) (1) - -/** Check if MMC Spec version 4 */ -#define MMC_IsVer4(pSd) ( SD_CSD_SPEC_VERS(pSd) >= 4 ) - -/** Check if MMC CSD structure is 1.2 (3.1 or later) */ -#define MMC_IsCSDVer1_2(pSd) \ - ( (SD_CSD_STRUCTURE(pSd)==2) \ - ||(SD_CSD_STRUCTURE(pSd)>2&&SD_EXTCSD_CSD_STRUCTURE(pSd)>=2) ) - -/** Check if MMC card support boot mode (4.3 or later) */ -#define MMC_IsBootModeSupported(pSd) \ - ( (MMC_IsVer4(pSd)&&(SD_CID_CBX(pSd)==0x01) ) - -/** Check if MMC card support 8-bit mode (4.0 or later) */ -#define MMC_IsBusModeSupported(pSd) (MMC_IsVer4(pSd)) - -/** Check if MMC card support HS mode (4.0 or later) */ -#define MMC_IsHsModeSupported(pSd) \ - (MMC_IsCSDVer1_2(pSd)&&(SD_EXTCSD_CARD_TYPE(pSd)&0x2)) - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** SD/MMC transfer rate unit codes (10K) list */ -static const uint32_t sdmmcTransUnits[7] = { - 10, 100, 1000, 10000, - 0, 0, 0 -}; - -/** SD transfer multiplier factor codes (1/10) list */ -static const uint32_t sdTransMultipliers[16] = { - 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 -}; - -/** MMC transfer multiplier factor codes (1/10) list */ -static const uint32_t mmcTransMultipliers[16] = { - 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80 -}; - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * Delay some loop - */ -static void Delay(volatile unsigned int loop) -{ - for(;loop > 0; loop --); -} - - -/** - * Find SDIO ManfID, Fun0 tuple. - * \param pSd Pointer to \ref SdCard instance. - * \param address Search area start address. - * \param size Search area size. - * \param pAddrManfID Pointer to ManfID address value buffer. - * \param pAddrFunc0 Pointer to Func0 address value buffer. - */ -static uint8_t SdioFindTuples(SdCard *pSd, - uint32_t address, uint32_t size, - uint32_t *pAddrManfID, - uint32_t *pAddrFunc0) -{ - uint8_t error, tmp[3]; - uint32_t addr = address; - uint8_t flagFound = 0; /* 1:Manf, 2:Func0 */ - uint32_t addManfID = 0, addFunc0 = 0; - for(;flagFound != 3;) { - error = SDIO_ReadDirect(pSd, SDIO_CIA, addr, tmp, 3); - if (error) { - TRACE_ERROR("SdioFindTuples.RdDirect: %u\n\r", error); - return error; - } - /* End */ - if (tmp[0] == CISTPL_END) break; - /* ManfID */ - else if (tmp[0] == CISTPL_MANFID) { - flagFound |= 1; addManfID = addr; - } - /* Func0 */ - else if (tmp[0] == CISTPL_FUNCE && tmp[2] == 0x00) { - flagFound |= 2; addFunc0 = addr; - } - /* Tuple error ? */ - if (tmp[1] == 0) break; - /* Next address */ - addr += (tmp[1] + 2); - if (addr > (address + size)) break; - } - if (pAddrManfID) *pAddrManfID = addManfID; - if (pAddrFunc0) *pAddrFunc0 = addFunc0; - return 0; -} - -/** - * \brief Decode Trans Speed Value - * \param code The trans speed code value. - * \param unitCodes Unit list in 10K, 0 as unused value. - * \param multiCodes Multiplier list in 1/10, index 1 ~ 15 is valid. - */ -static uint32_t SdmmcDecodeTransSpeed(uint32_t code, - const uint32_t *unitCodes, - const uint32_t *multiCodes) -{ - uint32_t speed; - uint8_t unitI, mulI; - - /* Unit code is valid ? */ - unitI = (code & 0x7); - if (unitCodes[unitI] == 0) return 0; - - /* Multi code is valid ? */ - mulI = (code >> 3) & 0xF; - if (multiCodes[mulI] == 0) return 0; - - speed = unitCodes[unitI] * multiCodes[mulI]; - return speed; -} - -static inline uint8_t Pon(SdCard *pSd) -{ - return SdmmcPowerOn(pSd, NULL); -} - -static inline uint8_t Cmd0(SdCard *pSd, uint8_t arg) -{ - return SdmmcCmd0(pSd, arg, NULL); -} - -static inline uint8_t Cmd1(SdCard *pSd, uint8_t* pHd) -{ - uint8_t error; - uint32_t arg; - arg = SDMMC_HOST_VOLTAGE_RANGE | OCR_MMC_HD; - error = MmcCmd1(pSd, &arg, NULL); - if (error) return error; - if (arg & OCR_POWER_UP_BUSY) { - *pHd = 0; - if ((arg & OCR_BIT2930) == OCR_MMC_HIGH_DENSITY) { - *pHd = 1; - } - return 0; - } - return SDMMC_ERROR_NOT_INITIALIZED; -} - -static inline uint8_t Cmd2(SdCard *pSd) -{ - return SdmmcCmd2(pSd, pSd->cid, NULL); -} - -static uint8_t Cmd3(SdCard *pSd) -{ - if (pSd->cardType == CARD_MMC || pSd->cardType == CARD_MMCHD) { - uint8_t error = MmcCmd3(pSd, 1, NULL); - if (!error) pSd->cardAddress = 1; - return error; - } - else { - uint8_t error; - uint32_t addr; - error = SdCmd3(pSd, &addr, NULL); - pSd->cardAddress = (addr >> 16); - return error; - } -} - -static uint8_t Cmd5(SdCard *pSd, uint32_t *pIo) -{ - return SdioCmd5(pSd, pIo, NULL); -} - -static inline uint8_t Cmd7(SdCard *pSd, uint16_t address) -{ - return SdmmcCmd7(pSd, address, NULL); -} - -static inline uint8_t Cmd9(SdCard *pSd) -{ - return SdmmcCmd9(pSd, CARD_ADDR(pSd), pSd->csd, NULL); -} - -static uint8_t Cmd12(SdCard *pSd, uint32_t *pStatus) -{ - return SdmmcCmd12(pSd, pStatus, NULL); -} - -static uint8_t Cmd13(SdCard *pSd, uint32_t *pStatus) -{ - return SdmmcCmd13(pSd, CARD_ADDR(pSd), pStatus, NULL); -} - -static inline uint8_t Cmd16(SdCard *pSd, uint16_t blkLen) -{ - return SdmmcCmd16(pSd, blkLen, NULL); -} - -static inline uint8_t Cmd17(SdCard *pSd, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus) -{ - return SdmmcCmd17(pSd, BLOCK_SIZE(pSd), pData, address, pStatus, NULL); -} - -static inline uint8_t Cmd18(SdCard *pSd, - uint16_t nbBlock, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus) -{ - return SdmmcCmd18(pSd, - BLOCK_SIZE(pSd), nbBlock, - pData, address, - pStatus, NULL); -} - -static inline uint8_t Cmd24(SdCard *pSd, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus) -{ - return SdmmcCmd24(pSd, BLOCK_SIZE(pSd), pData, address, pStatus, NULL); -} - -static inline uint8_t Cmd25(SdCard *pSd, - uint16_t nbBlock, - uint8_t *pData, - uint32_t address, - uint32_t *pStatus) -{ - return SdmmcCmd25(pSd, - BLOCK_SIZE(pSd), nbBlock, - pData, address, - pStatus, NULL); -} - -static inline uint8_t Cmd52(SdCard *pSd, - uint8_t wrFlag, - uint8_t funcNb, - uint8_t rdAfterWr, - uint32_t addr, - uint32_t *pIoData) -{ - SdioCmd52Arg *pArg52 = (SdioCmd52Arg*)pIoData; - pArg52->rwFlag = wrFlag; - pArg52->functionNum = funcNb; - pArg52->rawFlag = rdAfterWr; - pArg52->regAddress = addr; - return SdioCmd52(pSd, pIoData, NULL); -} - -static inline uint8_t Cmd53(SdCard *pSd, - uint8_t wrFlag, - uint8_t funcNb, - uint8_t blockMode, - uint8_t incAddr, - uint32_t addr, - uint8_t *pIoData, - uint16_t len, - uint32_t *pArgResp, - SdmmcCallback fCallback, - void* pCbArg) -{ - uint8_t error; - SdioCmd53Arg* pArg53; - pArg53 = (SdioCmd53Arg*)pArgResp; - pArg53->rwFlag = wrFlag; - pArg53->functionNum = funcNb; - pArg53->blockMode = blockMode; - pArg53->opCode = incAddr; - pArg53->regAddress = addr; - pArg53->count = len; - error = SdioCmd53(pSd, pArgResp, pIoData, len, fCallback, pCbArg); - return error; -} - -/** - * Defines the data bus width (00=1bit or 10=4 bits bus) to be used for data - * transfer. - * The allowed data bus widths are given in SCR register. - * \param pSd Pointer to a SD card driver instance. - * \param busWidth Bus width in bits. - * \return the command transfer result (see SendCommand). - */ -static uint8_t Acmd6(SdCard *pSd, uint8_t busWidth) -{ - uint8_t error; - uint32_t arg; - error = SdmmcCmd55(pSd, CARD_ADDR(pSd), NULL); - if (error) { - TRACE_ERROR("Acmd6.cmd55:%d\n\r", error); - return error; - } - arg = (busWidth == SDMMC_BUS_4_BIT) - ? SD_STAT_DATA_BUS_WIDTH_4BIT : SD_STAT_DATA_BUS_WIDTH_1BIT; - return SdAcmd6(pSd, arg, NULL, NULL); -} - -/** - * The SD Status contains status bits that are related to the SD memory Card - * proprietary features and may be used for future application-specific usage. - * Can be sent to a card only in 'tran_state'. - */ -static uint8_t Acmd13(SdCard *pSd, uint32_t *pSdSTAT) -{ - uint8_t error; - error = SdmmcCmd55(pSd, CARD_ADDR(pSd), NULL); - if (error) { - TRACE_ERROR("Acmd13.cmd55:%d\n\r", error); - return error; - } - return SdAcmd13(pSd, pSdSTAT, NULL); -} - -/** - * Asks to all cards to send their operations conditions. - * Returns the command transfer result (see SendCommand). - * \param pSd Pointer to a SD card driver instance. - * \param hcs Shall be true if Host support High capacity. - * \param pCCS Set the pointed flag to 1 if hcs != 0 and SD OCR CCS flag is set. - */ -static uint8_t Acmd41(SdCard *pSd, uint8_t hcs, uint8_t *pCCS) -{ - uint8_t error; - uint32_t arg; - do { - error = SdmmcCmd55(pSd, 0, NULL); - if (error) { - TRACE_ERROR("Acmd41.cmd55:%d\n\r", error); - return error; - } - arg = SDMMC_HOST_VOLTAGE_RANGE; - if (hcs) arg |= OCR_SD_CCS; - error = SdAcmd41(pSd, &arg, NULL); - if (error) { - TRACE_ERROR("Acmd41.cmd41:%d\n\r", error); - return error; - } - *pCCS = ((arg & OCR_SD_CCS)!=0); - } while ((arg & OCR_POWER_UP_BUSY) != OCR_POWER_UP_BUSY); - return 0; -} - -/** - * SD Card Configuration Register (SCR) provides information on the SD Memory - * Card's special features that were configured into the given card. The size - * of SCR register is 64 bits. - */ -static uint8_t Acmd51(SdCard* pSd, uint32_t *pSCR) -{ - uint8_t error; - error = SdmmcCmd55(pSd, CARD_ADDR(pSd), NULL); - if (error) { - TRACE_ERROR("Acmd51.cmd55:%d\n\r", error); - return error; - } - return SdAcmd51(pSd, pSCR, NULL); -} - -/** - * Try SW Reset several times (CMD0 with ARG 0) - * \param pSd Pointer to a SD card driver instance. - * \param retry Retry times. - * \return 0 or MCI error code. - */ -static uint8_t SwReset(SdCard *pSd, uint32_t retry) -{ - uint32_t i; - uint8_t error = 0; - - for (i = 0; i < retry; i ++) { - error = Cmd0(pSd, 0); - if (error != SDMMC_ERROR_NORESPONSE) - break; - } - return error; -} - -/** - * Perform sligle block transfer - */ -static uint8_t PerformSingleTransfer(SdCard *pSd, - uint32_t address, - uint8_t *pData, - uint8_t isRead) -{ - uint32_t status; - uint8_t error = 0; - /* Reset transfer state if previous in multi- mode */ - if( (pSd->state == SD_STATE_READ) - || (pSd->state == SD_STATE_WRITE)) { - /* Stop transfer */ - error = Cmd12(pSd, &status); - if (error) { - TRACE_ERROR("SingleTx.Cmd12: st%x, er%d\n\r", pSd->state, error); - } - pSd->state = SD_STATE_READY; - pSd->preBlock = 0xFFFFFFFF; - } - - if ( isRead ) - { - /* Wait for card to be ready for data transfers */ - do - { - error = Cmd13(pSd, &status); - if (error) - { - TRACE_ERROR("SingleTx.RD.Cmd13: %d\n\r", error); - - return error; - } - - if( ((status & STATUS_STATE) == STATUS_IDLE) - ||((status & STATUS_STATE) == STATUS_READY) - ||((status & STATUS_STATE) == STATUS_IDENT)) - { - TRACE_ERROR("SingleTx.mode\n\r"); - - return SDMMC_ERROR_NOT_INITIALIZED; - } - - /* If the card is in sending data state or - in receivce data state */ - if ( ((status & STATUS_STATE) == STATUS_RCV) ||((status & STATUS_STATE) == STATUS_DATA) ) - { - - TRACE_DEBUG("SingleTx.state = 0x%X\n\r", - (status & STATUS_STATE) >> 9); - } - } - - while ( ((status & STATUS_READY_FOR_DATA) == 0) || ((status & STATUS_STATE) != STATUS_TRAN) ) ; - - assert( (status & STATUS_STATE) == STATUS_TRAN ) ; /* "SD Card can't be configured in transfer state 0x%X\n\r", (status & STATUS_STATE)>>9 */ - - /* Read single block */ - error = Cmd17( pSd, pData, SD_ADDRESS(pSd,address), &status ) ; - - if ( error ) - { - TRACE_ERROR("SingleTx.Cmd17: %d\n\r", error); - return error; - } - - if (status & ~(STATUS_READY_FOR_DATA | STATUS_STATE)) - { - TRACE_ERROR("CMD17.stat: %x\n\r", - status & ~(STATUS_READY_FOR_DATA | STATUS_STATE)); - return SDMMC_ERROR; - } - return error; - } - /* Write */ - { - /* Wait for card to be ready for data transfers */ - do - { - error = Cmd13(pSd, &status); - if (error) - { - TRACE_ERROR("SingleTx.WR.Cmd13: %d\n\r", error); - return error; - } - } - - while ((status & STATUS_READY_FOR_DATA) == 0); - - /* Move to Sending data state */ - error = Cmd24(pSd, - pData, SD_ADDRESS(pSd,address), - &status); - if (error) - { - TRACE_DEBUG("SingleTx.Cmd24: %d\n\r", error); - return error; - } - - if (status & (STATUS_WRITE & ~(STATUS_READY_FOR_DATA | STATUS_STATE))) - { - TRACE_ERROR("CMD24(0x%x).stat: %x\n\r", - SD_ADDRESS(pSd,address), - status & (STATUS_WRITE - & ~(STATUS_READY_FOR_DATA | STATUS_STATE))); - return SDMMC_ERROR; - } - } - - return error; -} - -/** - * Move SD card to transfer state. The buffer size must be at - * least 512 byte long. This function checks the SD card status register and - * address the card if required before sending the transfer command. - * Returns 0 if successful; otherwise returns an code describing the error. - * \param pSd Pointer to a SD card driver instance. - * \param address Address of the block to transfer. - * \param nbBlocks Number of blocks to be transfer, 0 for infinite transfer. - * \param pData Data buffer whose size is at least the block size. - * \param isRead 1 for read data and 0 for write data. - */ -static uint8_t MoveToTransferState(SdCard *pSd, - uint32_t address, - uint16_t nbBlocks, - uint8_t *pData, - uint8_t isRead) -{ - uint32_t status; - uint8_t error; - - if ( (pSd->state == SD_STATE_READ) || (pSd->state == SD_STATE_WRITE) ) - { - /* Stop transfer */ - error = Cmd12(pSd, &status); - if (error) - { - TRACE_ERROR("MTTranState.Cmd12: st%x, er%d\n\r", pSd->state, error); - return error; - } - } - - if ( isRead ) - { - /* Wait for card to be ready for data transfers */ - do { - error = Cmd13(pSd, &status); - if (error) - { - TRACE_ERROR("MTTranState.RD.Cmd13: %d\n\r", error); - return error; - } - - if ( ((status & STATUS_STATE) == STATUS_IDLE) || ((status & STATUS_STATE) == STATUS_READY) || ((status & STATUS_STATE) == STATUS_IDENT) ) - { - TRACE_ERROR("Pb Card Identification mode\n\r"); - return SDMMC_ERROR_NOT_INITIALIZED; - } - - /* If the card is in sending data state or in receivce data state */ - if ( ((status & STATUS_STATE) == STATUS_RCV) || ((status & STATUS_STATE) == STATUS_DATA) ) - { - TRACE_DEBUG("state = 0x%X\n\r", (status & STATUS_STATE) >> 9); - } - } - - while ( ((status & STATUS_READY_FOR_DATA) == 0) || ((status & STATUS_STATE) != STATUS_TRAN) ) ; - - assert( (status & STATUS_STATE) == STATUS_TRAN ) ; /* "SD Card can't be configured in transfer state 0x%X\n\r", (status & STATUS_STATE)>>9 */ - - /* Move to Receiving data state */ - error = Cmd18(pSd, nbBlocks, pData, SD_ADDRESS(pSd,address), &status); - - //Cmd13(pSd, &status); //status -> 0xB00 - if (error) - { - TRACE_ERROR("MTTranState.Cmd18: %d\n\r", error); - return error; - } - if (status & ~(STATUS_READY_FOR_DATA | STATUS_STATE)) { - TRACE_ERROR("CMD18.stat: %x\n\r", - status & ~(STATUS_READY_FOR_DATA | STATUS_STATE)); - return SDMMC_ERROR; - } - } - else - { - /* Wait for card to be ready for data transfers */ - do - { - error = Cmd13(pSd, &status); - if (error) - { - TRACE_ERROR("MoveToTransferState.WR.Cmd13: %d\n\r", error); - return error; - } - } - - while ((status & STATUS_READY_FOR_DATA) == 0); - /* Move to Sending data state */ - error = Cmd25(pSd, - nbBlocks, - pData, SD_ADDRESS(pSd,address), - &status); - if (error) { - TRACE_DEBUG("MoveToTransferState.Cmd25: %d\n\r", error); - return error; - } - if (status & (STATUS_WRITE & ~(STATUS_READY_FOR_DATA | STATUS_STATE))) { - TRACE_ERROR("CMD25(0x%x, %d).stat: %x\n\r", - SD_ADDRESS(pSd,address), nbBlocks, - status & (STATUS_WRITE - & ~(STATUS_READY_FOR_DATA | STATUS_STATE))); - return SDMMC_ERROR; - } - } - - if (!error) pSd->preBlock = address + (nbBlocks-1); - return error; -} - -/** - * Switch card state between STBY and TRAN (or CMD and TRAN) - * \param pSd Pointer to a SD card driver instance. - * \param address Card address to TRAN, 0 to STBY - * \param statCheck Whether to check the status before CMD7. - */ -static uint8_t MmcSelectCard(SdCard *pSd, uint16_t address, uint8_t statCheck) -{ - uint8_t error; - uint32_t status; - uint32_t targetState = address ? STATUS_TRAN : STATUS_STBY; - uint32_t srcState = address ? STATUS_STBY : STATUS_TRAN; - - /* At this stage the Initialization and identification process is achieved - * The SD card is supposed to be in Stand-by State */ - while(statCheck) { - error = Cmd13(pSd, &status); - if (error) { - TRACE_ERROR("MmcSelectCard.Cmd13 (%d)\n\r", error); - return error; - } - if ((status & STATUS_READY_FOR_DATA)) { - uint32_t currState = status & STATUS_STATE; - if (currState == targetState) return 0; - if (currState != srcState) { - TRACE_ERROR("MmcSelectCard, wrong state %x\n\r", currState); - return SDMMC_ERROR; - } - break; - } - } - - /* witch to TRAN mode to Select the current SD/MMC - * so that SD ACMD6 can process or EXT_CSD can read. */ - error = Cmd7(pSd, address); - if (error == SDMMC_ERROR_NOT_INITIALIZED && address == 0) {} - else if (error) { - TRACE_ERROR("MmcSelectCard.Cmd7 (%d)\n\r", error); - } - - return error; -} - -/** - * Get MMC EXT_CSD information - * \param pSd Pointer to a SD card driver instance. - */ -static void MmcGetExtInformation(SdCard *pSd) -{ - uint8_t error; - /* MMC 4.0 Higher version */ - if(SD_CSD_STRUCTURE(pSd) >= 2 && MMC_IsVer4(pSd)) { - - error = MmcCmd8(pSd, (uint8_t*)pSd->extData, NULL); - if (error) { - TRACE_ERROR("MmcGetExt.Cmd8: %d\n\r", error); - } - } -} - -/** - * Get SD/MMC memory max transfer speed in K. - * \param pSd Pointer to a SD card driver instance. - */ -static uint32_t SdmmcGetMaxSpeed(SdCard *pSd) -{ - uint32_t speed = 0; - if (pSd->cardType & CARD_TYPE_bmSDMMC) { - speed = SdmmcDecodeTransSpeed(SD_CSD_TRAN_SPEED(pSd), - sdmmcTransUnits, - ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmSD) ? - sdTransMultipliers : mmcTransMultipliers); - } - return speed; -} - -/** - * Get SDIO max transfer speed, in K. - * \param pSd Pointer to a SD card driver instance. - */ -static uint32_t SdioGetMaxSpeed(SdCard *pSd) -{ - uint8_t error; - uint32_t speed = 0; - uint32_t addr = 0; - uint8_t buf[6]; - if (pSd->cardType & CARD_TYPE_bmSDIO) { - /* Check Func0 tuple in CIS area */ - error = SDIO_ReadDirect(pSd, - SDIO_CIA, SDIO_CIS_PTR_REG, - (uint8_t*)&addr, 3); - if (error) { - TRACE_ERROR("SdioUpdateCardInformation.RdDirect: %u\n\r", error); - return error; - } - error = SdioFindTuples(pSd, addr, 256, NULL, &addr); - if (error) { - TRACE_ERROR("SdioUpdateCardInformation.FindTuple: %u\n\r", error); - return error; - } - if (addr) { - /* Fun0 tuple: fn0_blk_siz & max_tran_speed */ - SDIO_ReadDirect(pSd, SDIO_CIA, addr, buf, 6); - speed = SdmmcDecodeTransSpeed(buf[5], - sdmmcTransUnits, - sdTransMultipliers); - } - } - return speed; -} - -/** - * Get SCR and SD Status information - * \param pSd Pointer to a SD card driver instance. - */ -static void SdGetExtInformation(SdCard *pSd) -{ - uint8_t error; - - /* SD Status */ - if (pSd->optCmdBitMap & SD_ACMD13_SUPPORT) { - error = Acmd13(pSd, &pSd->extData[SD_EXT_OFFSET_SD_STAT]); - if (error) { - TRACE_ERROR("SdGetExt.Acmd13: %d\n\r", error); - pSd->optCmdBitMap &= ~SD_ACMD13_SUPPORT; - } - } - - /* SD SCR */ - error = Acmd51(pSd, &pSd->extData[SD_EXT_OFFSET_SD_SCR]); - if (error) { - TRACE_ERROR("SdGetExt.Acmd51: %d\n\r", error); - } -} - -/** - * Update SD/MMC information. - * Update CSD for card speed switch. - * Update ExtDATA for any card function switch. - * \param pSd Pointer to a SD card driver instance. - * \return error code when update CSD error. - */ -static void SdMmcUpdateInformation(SdCard *pSd, - uint8_t csd, - uint8_t extData) -{ - uint8_t error; - - /* Update CSD for new TRAN_SPEED value */ - if (csd) { - MmcSelectCard(pSd, 0, 1); - Delay(800); - error = Cmd9(pSd); - if (error ) { - TRACE_ERROR("SdMmcUpdateInfo.Cmd9 (%d)\n\r", error); - return; - } - error = MmcSelectCard(pSd, pSd->cardAddress, 1); - } - if (extData) { - switch(pSd->cardType & CARD_TYPE_bmSDMMC) { - case CARD_TYPE_bmSD: SdGetExtInformation(pSd); break; - case CARD_TYPE_bmMMC: MmcGetExtInformation(pSd); break; - default: break; - } - } -} - -/** - * \brief Check HS capability and enable it - * \param pSd Pointer to SdCard instance. - */ -static uint8_t SdMmcEnableHighSpeed(SdCard *pSd) -{ - uint8_t error; - uint32_t status; - uint8_t io, sd, mmc; - - io = ((pSd->cardType & CARD_TYPE_bmSDIO) > 0); - sd = ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmSD); - mmc = ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmMMC); - - /* Check host driver capability */ - if (SdmmcGetProperty(pSd, SDMMC_PROP_HS_MODE, NULL) == 0) { - TRACE_INFO("HS Mode not supported by Host\n\r"); - return SDMMC_ERROR_NOT_SUPPORT; - } - /* Check MMC */ - if (mmc) { - /* MMC card type 3 (HS) */ - //if (SD_CSD_STRUCTURE(pSd) >= 2 && (SD_EXTCSD_CARD_TYPE(pSd) & 0x2)) { - if (MMC_IsHsModeSupported(pSd)) { - /* Try switch to HS mode */ - MmcCmd6Arg cmd6Arg = { - 0x3, - SD_EXTCSD_HS_TIMING_INDEX, - SD_EXTCSD_HS_TIMING_ENABLE, - 0}; - error = MmcCmd6(pSd, &cmd6Arg, &status, NULL); - if (error) { - TRACE_ERROR("SdMmcEnableHS.Cmd6: %u\n\r", error); - return SDMMC_ERROR; - } - else if (status & STATUS_MMC_SWITCH) { - TRACE_ERROR("Mmc Switch HS: %x\n\r", status); - return SDMMC_ERROR_NOT_SUPPORT; - } - } - else { - TRACE_INFO("MMC without HS support\n\r"); - return SDMMC_ERROR_NOT_SUPPORT; - } - TRACE_WARNING("MMC HS Enabled\n\r"); - } - /* SD (+IO) */ - else { - if (io) { - /* Check CIA.HS */ - status = 0; - error = Cmd52(pSd, 0, SDIO_CIA, 0, SDIO_HS_REG, &status); - if (error) { - TRACE_ERROR("SdMmcEnableHS.Cmd52: %u\n\r", error); - return SDMMC_ERROR; - } - if ((status & SDIO_SHS) == 0) { - TRACE_INFO("HS Mode not supported by SDIO\n\r"); - return SDMMC_ERROR_NOT_SUPPORT; - } - /* Enable HS mode */ - else { - status = SDIO_EHS; - error = Cmd52(pSd, 1, SDIO_CIA, 1, SDIO_HS_REG, &status); - if (error) { - TRACE_ERROR("SdMmcEnableHS.Cmd52 H: %u\n\r", error); - return SDMMC_ERROR; - } - if (status & SDIO_EHS) { - TRACE_WARNING("SDIO HS Enabled\n\r"); - } - } - } - if (sd) { - /* Check version */ - //if (SD_SCR_SD_SPEC(pSd) >= SD_SCR_SD_SPEC_1_10) { - if (SD_IsHsModeSupported(pSd)) { - /* Try enable HS mode */ - SdCmd6Arg cmd6Arg = { - 1, 0, 0xF, 0xF, 0xF, 0xF, 0, 1 - }; - uint32_t switchStatus[512/32]; - error = SdCmd6(pSd, &cmd6Arg, switchStatus, &status, NULL); - if (error || (status & STATUS_SWITCH_ERROR)) { - TRACE_INFO("SD HS Fail\n\r"); - return SDMMC_ERROR; - } - else if (SD_SW_STAT_FUN_GRP1_RC(switchStatus) - == SD_SW_STAT_FUN_GRP_RC_ERROR) { - TRACE_INFO("SD HS Not Supported\n\r"); - return SDMMC_ERROR_NOT_SUPPORT; - } - else if (SD_SW_STAT_FUN_GRP1_BUSY(switchStatus)) { - TRACE_INFO("SD HS Locked\n\r"); - return SDMMC_ERROR_BUSY; - } - else { - TRACE_WARNING("SD HS Enabled\n\r"); - } - } - else { - TRACE_INFO("HS Not Supported in SD Rev 0x%x\n\r", - SD_SCR_SD_SPEC(pSd)); - return SDMMC_ERROR_NOT_SUPPORT; - } - } - } - - /* Enable Host HS mode */ - SdmmcEnableHsMode(pSd, 1); - return 0; -} - -/** - * \brief Check bus width capability and enable it - */ -static uint8_t SdMmcDesideBuswidth(SdCard *pSd) -{ - uint8_t error, busWidth; - uint32_t status; - uint8_t mmc; - - /* Best width that the card support */ - busWidth = SdmmcGetProperty(pSd, SDMMC_PROP_BUS_MODE, NULL); - - mmc = ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmMMC); - - if (mmc) { - /* Check MMC revision 4 or later (1/4/8 bit mode) */ - if (SD_CSD_SPEC_VERS(pSd) >= 4) { - /* Select what's HC supported */ - MmcCmd6Arg cmd6Arg = { - 0x1, SD_EXTCSD_BUS_WIDTH_INDEX, SD_EXTCSD_BUS_WIDTH_1BIT, 0 - }; - switch(busWidth) { - case SDMMC_BUS_4_BIT: - cmd6Arg.value = SD_EXTCSD_BUS_WIDTH_4BIT; - break; - case SDMMC_BUS_8_BIT: - cmd6Arg.value = SD_EXTCSD_BUS_WIDTH_8BIT; - break; - case SDMMC_BUS_1_BIT: - break; - } - error = MmcCmd6(pSd, &cmd6Arg, &status, NULL); - if (error) { - TRACE_ERROR("SdMmcSetBuswidth.Cmd6: %u\n\r", error); - return SDMMC_ERROR; - } - else { - if (status & STATUS_MMC_SWITCH) { - TRACE_ERROR("MMC Bus Switch error %x\n\r", status); - return SDMMC_ERROR_NOT_SUPPORT; - } - TRACE_WARNING("MMC Bus mode %x\n\r", busWidth); - } - } - else { - TRACE_WARNING("MMC 1-bit only\n\r"); - return SDMMC_ERROR_NOT_SUPPORT; - } - } - else { - /* SD(IO): switch to 4-bit mode ? */ - uint8_t io = ((pSd->cardType & CARD_TYPE_bmSDIO) > 0); - uint8_t sd = ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmSD); - if (busWidth == SDMMC_BUS_1_BIT) - return SDMMC_ERROR_NOT_SUPPORT; - /* No 8-bit mode, default to 4-bit mode */ - busWidth = SDMMC_BUS_4_BIT; - - /* SDIO */ - if (io) { - /* SDIO 1 bit only */ - busWidth = SDMMC_BUS_1_BIT; - } - - /* SD */ - if (sd) { - error = Acmd6(pSd, busWidth); - if (error) { - TRACE_ERROR("SdMmcSetBusWidth.Acmd6: %u\n\r", error); - return SDMMC_ERROR; - } - TRACE_WARNING("SD 4-bit mode\n\r"); - } - } - - /* Switch to selected bus mode */ - pSd->busMode = busWidth; - SdmmcSetBusWidth(pSd, busWidth); - return 0; -} - -/** - * \brief Run the SD/MMC/SDIO Mode initialization sequence. - * This function runs the initialization procedure and the identification - * process. Then it leaves the card in ready state. The following procedure must - * check the card type and continue to put the card into tran(for memory card) - * or cmd(for io card) state for data exchange. - * \param pSd Pointer to a SD card driver instance. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "SD_ERROR code". - */ -static uint8_t SdMmcIdentify(SdCard *pSd) -{ - uint8_t mem = 0, io = 0, f8 = 0, mp = 1, ccs = 0; - uint32_t status; - uint8_t error; - /* Reset HC to default HS and BusMode */ - SdmmcEnableHsMode(pSd, 0); - SdmmcSetBusWidth(pSd, SDMMC_BUS_1_BIT); - /* Reset SDIO: CMD52, write 1 to RES bit in CCCR (bit 3 of register 6) */ - status = SDIO_RES; - error = Cmd52(pSd, 1, SDIO_CIA, 0, SDIO_IOA_REG, &status); - if (!error && ((status & STATUS_SDIO_R5)==0)) - { - } - else - { - if (error == SDMMC_ERROR_NORESPONSE) - { - } - else - { - TRACE_DEBUG("SdMmcIdentify.Cmd52 fail: %u, %x\n\r", error, status); - } - } - - /* Reset MEM: CMD0 */ - error = SwReset(pSd, 1); - if (error) { - TRACE_DEBUG("SdMmcIdentify.SwReset fail: %u\n\r", error); - } - - /* CMD8 is newly added in the Physical Layer Specification Version 2.00 to - * support multiple voltage ranges and used to check whether the card - * supports supplied voltage. The version 2.00 host shall issue CMD8 and - * verify voltage before card initialization. - * The host that does not support CMD8 shall supply high voltage range... */ - error = SdCmd8(pSd, 1, NULL); - if (error == 0) f8 = 1; - else if (error != SDMMC_ERROR_NORESPONSE) { - TRACE_ERROR("SdMmcIdentify.Cmd8: %u\n\r", error); - return SDMMC_ERROR; - } - /* Delay after "no response" */ - else Delay(800); - - /* CMD5 is newly added for SDIO initialize & power on */ - status = 0; - error = Cmd5(pSd, &status); - if (error) { - TRACE_WARNING("SdMmcIdentify.Cmd5: %u\n\r", error); - } - /* Card has SDIO function */ - else if ((status & OCR_SDIO_NF) > 0) { - unsigned int cmd5Retries = 10000; - do { - status &= SDMMC_HOST_VOLTAGE_RANGE; - error = Cmd5(pSd, &status); - if (status & OCR_POWER_UP_BUSY) break; - } while(!error && cmd5Retries --); - if (error) { - TRACE_ERROR("SdMmcIdentify.Cmd5 V: %u\n\r", error); - return SDMMC_ERROR; - } - io = 1; - TRACE_INFO("SDIO\n\r"); - /* IO only ?*/ - mp = ((status & OCR_SDIO_MP) > 0); - } - /* Has memory: SD/MMC/COMBO */ - if (mp) { - /* Try SD memory initialize */ - error = Acmd41(pSd, f8, &ccs); - if (error) { - unsigned int cmd1Retries = 10000; - TRACE_DEBUG("SdMmcIdentify.Acmd41: %u, try MMC\n\r", error); - /* Try MMC initialize */ - error = SwReset(pSd, 10); - if (error) { - TRACE_ERROR("SdMmcIdentify.Mmc.SwReset: %u\n\r", error); - return SDMMC_ERROR; - } - ccs = 1; - do { error = Cmd1(pSd, &ccs); }while(error && cmd1Retries -- > 0); - if (error) { - TRACE_ERROR("SdMmcIdentify.Cmd1: %u\n\r", error); - return SDMMC_ERROR; - } - else if (ccs) pSd->cardType = CARD_MMCHD; - else pSd->cardType = CARD_MMC; - /* MMC card identification OK */ - TRACE_INFO("MMC Card\n\r"); - return 0; - } - else if (ccs) { TRACE_INFO("SDHC MEM\n\r");} - else { TRACE_INFO("SD MEM\n\r");} - mem = 1; - } - /* SD(IO) + MEM ? */ - if (!mem) { - if (io) pSd->cardType = CARD_SDIO; - else { - TRACE_ERROR("Unknown card\n\r"); - return SDMMC_ERROR; - } - } - /* SD(HC) combo */ - else if (io) - pSd->cardType = ccs ? CARD_SDHCCOMBO : CARD_SDCOMBO; - /* SD(HC) */ - else - pSd->cardType = ccs ? CARD_SDHC : CARD_SD; - - return 0; -} - -/** - * \brief Run the SD/MMC/SDIO enumeration sequence. - * This function runs after the initialization and identification procedure. It - * gets all necessary information from the card and deside transfer block size, - * clock speed and bus width. It sets the SD/MMC/SDIO card in transfer - * (or command) state. - * \param pSd Pointer to a SD card driver instance. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "SD_ERROR code". - */ -static uint8_t SdMmcEnum(SdCard *pSd) -{ - uint8_t mem , io; - uint8_t error; - uint32_t ioSpeed = 0, memSpeed = 0; - uint8_t hsExec = 0, bwExec = 0; - - /* - has Memory/IO/High-Capacigy - */ - mem = ((pSd->cardType & CARD_TYPE_bmSDMMC) > 0); - io = ((pSd->cardType & CARD_TYPE_bmSDIO) > 0); - - /* For MEMORY cards: - * The host then issues the command ALL_SEND_CID (CMD2) to the card to get - * its unique card identification (CID) number. - * Card that is unidentified (i.e. which is in Ready State) sends its CID - * number as the response (on the CMD line). */ - if (mem) { - error = Cmd2(pSd); - if (error) { - TRACE_ERROR("SdMmcInit.cmd2(%d)\n\r", error); - return error; - } - } - - /* For MEMORY and SDIO cards: - * Thereafter, the host issues CMD3 (SEND_RELATIVE_ADDR) asks the - * card to publish a new relative card address (RCA), which is shorter than - * CID and which is used to address the card in the future data transfer - * mode. Once the RCA is received the card state changes to the Stand-by - * State. At this point, if the host wants to assign another RCA number, it - * can ask the card to publish a new number by sending another CMD3 command - * to the card. The last published RCA is the actual RCA number of the - * card. */ - error = Cmd3(pSd); - if (error) { - TRACE_ERROR("SdMmcInit.cmd3(%d)\n\r", error); - return error; - } - - /* For MEMORY cards: - * SEND_CSD (CMD9) to obtain the Card Specific Data (CSD register), - * e.g. block length, card storage capacity, etc... */ - if (mem) { - error = Cmd9(pSd); - if (error) { - TRACE_ERROR("SdMmcInit.cmd9(%d)\n\r", error); - return error; - } - } - - /* Now select the card, to TRAN state */ - error = MmcSelectCard(pSd, pSd->cardAddress, 0); - TRACE_ERROR("COUCOU"); - if (error) { - TRACE_ERROR("SdMmcInit.SelCard(%d)\n\r", error); - return error; - } - - /* - Now in TRAN, obtain extended setup information - */ - - /* If the card support EXT_CSD, read it! */ - TRACE_INFO("Card Type %d, CSD_STRUCTURE %d\n\r", - pSd->cardType, SD_CSD_STRUCTURE(pSd)); - - /* Get extended information of the card */ - SdMmcUpdateInformation(pSd, 0, 1); - - /* Calculate transfer speed */ - if (io) ioSpeed = SdioGetMaxSpeed(pSd); - if (mem) memSpeed = SdmmcGetMaxSpeed(pSd); - /* Combo, min speed */ - if (io && mem) { - pSd->transSpeed = (ioSpeed > memSpeed) ? memSpeed : ioSpeed; - } - /* SDIO only */ - else if (io) { - pSd->transSpeed = ioSpeed; - } - /* Memory card only */ - else if (mem) { - pSd->transSpeed = memSpeed; - } - pSd->transSpeed *= 1000; - - /* Enable more bus width Mode */ - error = SdMmcDesideBuswidth(pSd); - if (!error) bwExec = 1; - else if (error != SDMMC_ERROR_NOT_SUPPORT) { - TRACE_ERROR("SdmmcEnum.DesideBusWidth: %u\n\r", error); - return SDMMC_ERROR; - } - - /* Enable High-Speed Mode */ - error = SdMmcEnableHighSpeed(pSd); - if (!error) hsExec = 1; - else if (error != SDMMC_ERROR_NOT_SUPPORT) { - TRACE_ERROR("SdmmcEnum.EnableHS: %u\n\r", error); - return SDMMC_ERROR; - } - - /* In HS mode transfer speed *2 */ - if (hsExec) pSd->transSpeed *= 2; - - /* Update card information since status changed */ - if (bwExec || hsExec) SdMmcUpdateInformation(pSd, hsExec, 1); - return 0; -} - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -/** - * Read Blocks of data in a buffer pointed by pData. The buffer size must be at - * least 512 byte long. This function checks the SD card status register and - * address the card if required before sending the read command. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param address Address of the block to read. - * \param pData Data buffer whose size is at least the block size, it can - * be 1,2 or 4-bytes aligned when used with DMA. - * \param length Number of blocks to be read. - * \param pCallback Pointer to callback function that invoked when read done. - * 0 to start a blocked read. - * \param pArgs Pointer to callback function arguments. - */ -uint8_t SD_Read(SdCard *pSd, - uint32_t address, - void *pData, - uint16_t length, - SdmmcCallback pCallback, - void *pArgs) -{ - uint8_t error; - - assert( pSd != NULL ) ; - assert( pData != NULL ) ; - - if ( pSd->state != SD_STATE_READ - || pSd->preBlock + 1 != address ) { - /* Start infinite block reading */ - error = MoveToTransferState(pSd, address, 0, 0, 1); - } - else error = 0; - if (!error) { - pSd->state = SD_STATE_READ; - pSd->preBlock = address + (length - 1); - error = SdmmcRead(pSd, BLOCK_SIZE(pSd), length, pData, - pCallback, pArgs); - } - TRACE_DEBUG("SDrd(%u,%u):%u\n\r", address, length, error); - - return 0; -} - -/** - * Write Blocks of data in a buffer pointed by pData. The buffer size must be at - * least 512 byte long. This function checks the SD card status register and - * address the card if required before sending the read command. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param address Address of the block to read. - * \param pData Data buffer whose size is at least the block size, it can - * be 1,2 or 4-bytes aligned when used with DMA. - * \param length Number of blocks to be read. - * \param pCallback Pointer to callback function that invoked when read done. - * 0 to start a blocked read. - * \param pArgs Pointer to callback function arguments. - */ -uint8_t SD_Write(SdCard *pSd, - uint32_t address, - void *pData, - uint16_t length, - SdmmcCallback pCallback, - void *pArgs) -{ - uint8_t error = 0; - - assert( pSd != NULL ) ; - - if ( pSd->state != SD_STATE_WRITE - || pSd->preBlock + 1 != address ) { - /* Start infinite block writing */ - error = MoveToTransferState(pSd, address, 0, 0, 0); - } - if (!error) { - pSd->state = SD_STATE_WRITE; - error = SdmmcWrite(pSd, BLOCK_SIZE(pSd), length, pData, - pCallback, pArgs); - pSd->preBlock = address + (length - 1); - } - TRACE_DEBUG("SDwr(%u,%u):%u\n\r", address, length, error); - - return 0; -} - -/** - * Read 1 Block of data in a buffer pointed by pData. The buffer size must be - * one block size. This function checks the SD card status register and - * address the card if required before sending the read command. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param address Address of the block to read. - * \param pData Data buffer whose size is at least the block size. - */ -uint8_t SD_ReadBlock( SdCard *pSd, uint32_t address, uint8_t *pData ) -{ - assert( pSd != NULL ) ; - assert( pData != NULL ) ; - - TRACE_DEBUG("RdBlk(%d)\n\r", address); - - return PerformSingleTransfer(pSd, address, pData, 1); -} - -/** - * Write 1 Block of data pointed by pData. The buffer size must be - * one block size. This function checks the SD card status register and - * address the card if required before sending the read command. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param address Address of block to write. - * \param pData Data buffer whose size is at least the block size, it can - * be 1,2 or 4-bytes aligned when used with DMA. - */ -uint8_t SD_WriteBlock(SdCard *pSd, - uint32_t address, - uint8_t *pData) -{ - assert( pSd != NULL ) ; - assert( pData != NULL ) ; - - TRACE_DEBUG("WrBlk(%d)\n\r", address); - - return PerformSingleTransfer(pSd, address, pData, 0); -} - -/** - * Read Blocks of data in a buffer pointed by pData. The buffer size must be at - * least 512 byte long. This function checks the SD card status register and - * address the card if required before sending the read command. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param address Address of the block to read. - * \param nbBlocks Number of blocks to be read. - * \param pData Data buffer whose size is at least the block size, it can - * be 1,2 or 4-bytes aligned when used with DMA. - */ -uint8_t SD_ReadBlocks(SdCard *pSd, - uint32_t address, - uint16_t nbBlocks, - uint8_t *pData) -{ - uint8_t error = 0; - - assert( pSd != NULL ) ; - assert( pData != NULL ) ; - assert( nbBlocks != NULL ) ; - - TRACE_DEBUG("RdBlks(%d,%d)\n\r", address, nbBlocks); - while(nbBlocks --) { - error = PerformSingleTransfer(pSd, address, pData, 1); - if (error) - break; - address += 1; - pData = &pData[512]; - } - return error; -} - -/** - * Write Block of data pointed by pData. The buffer size must be at - * least 512 byte long. This function checks the SD card status register and - * address the card if required before sending the read command. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param address Address of block to write. - * \param nbBlocks Number of blocks to be read - * \param pData Data buffer whose size is at least the block size, it can - * be 1,2 or 4-bytes aligned when used with DMA. - */ -uint8_t SD_WriteBlocks(SdCard *pSd, - uint32_t address, - uint16_t nbBlocks, - uint8_t *pData) -{ - uint8_t error = 0; - uint8_t *pB = (uint8_t*)pData; - - assert( pSd != NULL ) ; - assert( pData != NULL ) ; - assert( nbBlocks != NULL ) ; - - TRACE_DEBUG("WrBlks(%d,%d)\n\r", address, nbBlocks); - - while(nbBlocks --) { - error = PerformSingleTransfer(pSd, address, pB, 0); - if (error) - break; - address += 1; - pB = &pB[512]; - } - return error; -} - -/** - * Run the SDcard initialization sequence. This function runs the - * initialisation procedure and the identification process, then it sets the - * SD card in transfer state to set the block length and the bus width. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - * \param pSd Pointer to a SD card driver instance. - * \param pSdDriver Pointer to SD driver already initialized. - */ -uint8_t SD_Init(SdCard *pSd, void *pSdDriver) -{ - uint8_t error; - uint32_t clock; - uint32_t i; - - /* Initialize SdCard structure */ - pSd->pSdDriver = pSdDriver; - - pSd->transSpeed = 0; - pSd->totalSize = 0; - pSd->blockNr = 0; - - pSd->preBlock = 0xffffffff; - pSd->optCmdBitMap = 0xFFFFFFFF; - - pSd->accSpeed = 0; - pSd->cardAddress = 0; - pSd->cardType = CARD_UNKNOWN; - pSd->busMode = 0; - pSd->cardSlot = 0; - pSd->state = SD_STATE_INIT; - - /* Clear CID, CSD, EXT_CSD data */ - for (i = 0; i < 4; i ++) pSd->cid[i] = 0; - for (i = 0; i < 4; i ++) pSd->csd[i] = 0; - for (i = 0; i < 512/4; i ++) pSd->extData[i] = 0; - - /* Set low speed for device identification (LS device max speed) */ - SdmmcSetSpeed(pSd, 400000); - - /* Initialization delay: The maximum of 1 msec, 74 clock cycles and supply - * ramp up time. Supply ramp up time provides the time that the power is - * built up to the operating level (the bus master supply voltage) and the - * time to wait until the SD card can accept the first command. */ - /* Power On Init Special Command */ - error = Pon(pSd); - if (error) { - TRACE_ERROR("SD_Init.PowON:%d\n\r", error); - return error; - } - - /* After power-on or CMD0, all cards? - * CMD lines are in input mode, waiting for start bit of the next command. - * The cards are initialized with a default relative card address - * (RCA=0x0000) and with a default driver stage register setting - * (lowest speed, highest driving current capability). */ - error = SdMmcIdentify(pSd); - if (error) { - TRACE_ERROR("SD_Init.Identify: %u\n\r", error); - return error; - } - error = SdMmcEnum(pSd); - if (error) { - TRACE_ERROR("SD_Init.Enum: %u\n\r", error); - return error; - } - - /* In the case of a Standard Capacity SD Memory Card, this command sets the - * block length (in bytes) for all following block commands - * (read, write, lock). - * Default block length is fixed to 512 Bytes. - * Set length is valid for memory access commands only if partial block read - * operation are allowed in CSD. - * In the case of a High Capacity SD Memory Card, block length set by CMD16 - * command does not affect the memory read and write commands. Always 512 - * Bytes fixed block length is used. This command is effective for - * LOCK_UNLOCK command. - * In both cases, if block length is set larger than 512Bytes, the card sets - * the BLOCK_LEN_ERROR bit. */ - if (pSd->cardType == CARD_SD) { - error = Cmd16(pSd, SDMMC_BLOCK_SIZE); - if (error) { - pSd->optCmdBitMap &= ~SD_CMD16_SUPPORT; - TRACE_INFO("SD_Init.Cmd16 (%d)\n\r", error); - TRACE_INFO("Fail to set BLK_LEN, default is 512\n\r"); - } - } - - /* Reset status for R/W */ - pSd->state = SD_STATE_READY; - - /* If MMC Card & get size from EXT_CSD */ - if ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmMMC - && SD_CSD_C_SIZE(pSd) == 0xFFF) { - pSd->blockNr = SD_EXTCSD_BLOCKNR(pSd); - /* Block number less than 0x100000000/512 */ - if (pSd->blockNr > 0x800000) - pSd->totalSize = 0xFFFFFFFF; - else - pSd->totalSize = SD_EXTCSD_TOTAL_SIZE(pSd); - } - /* If SD CSD v2.0 */ - else if((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_TYPE_bmSD - && SD_CSD_STRUCTURE(pSd) >= 1) { - pSd->blockNr = SD_CSD_BLOCKNR_HC(pSd); - pSd->totalSize = 0xFFFFFFFF; - } - /* Normal SD/MMC card */ - else if (pSd->cardType & CARD_TYPE_bmSDMMC) { - pSd->totalSize = SD_CSD_TOTAL_SIZE(pSd); - pSd->blockNr = SD_CSD_BLOCKNR(pSd); - } - - if (pSd->cardType == CARD_UNKNOWN) { - return SDMMC_ERROR_NOT_INITIALIZED; - } - /* Automatically select the max clock */ - clock = SdmmcSetSpeed(pSd, pSd->transSpeed); - TRACE_WARNING_WP("-I- Set SD/MMC clock to %dK\n\r", clock/1000); - pSd->accSpeed = clock; - return 0; -} - -/** - * Return type of the card. - * \param pSd Pointer to SdCard instance. - * \sa sdmmc_cardtype - */ -uint8_t SD_GetCardType(SdCard *pSd) -{ - assert( pSd != NULL ) ; - - return pSd->cardType; -} - -/** - * Return size of the SD/MMC card, in KB. - * \param pSd Pointer to SdCard instance. - */ -uint32_t SD_GetTotalSizeKB(SdCard *pSd) -{ - assert( pSd != NULL ) ; - - if (pSd->totalSize == 0xFFFFFFFF) { - - return pSd->blockNr / 2; - } - - return pSd->totalSize / 1024; -} - -/** - * Return reported block size of the SD/MMC card. - * (SD/MMC access block size is always 512B for R/W). - * \param pSd Pointer to SdCard instance. - */ -uint32_t SD_GetBlockSize(SdCard *pSd) -{ - assert( pSd != NULL ) ; - - if (pSd->totalSize == 0xFFFFFFFF) - return 512; - else - return (SD_TOTAL_SIZE(pSd) / SD_TOTAL_BLOCK(pSd)); -} - -/** - * Return reported number of blocks for the SD/MMC card. - * \param pSd Pointer to SdCard instance. - */ -uint32_t SD_GetNumberBlocks( SdCard *pSd ) -{ - assert( pSd != NULL ) ; - - return pSd->blockNr ; -} - -/** - * Read one or more bytes from SDIO card, using RW_DIRECT command. - * \param pSd Pointer to SdCard instance. - * \param functionNum Function number. - * \param address First register address to read from. - * \param pData Pointer to data buffer. - * \param size Buffer size, number of bytes to read. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - */ -uint8_t SDIO_ReadDirect(SdCard *pSd, - uint8_t functionNum, - uint32_t address, - uint8_t *pData, - uint32_t size) -{ - uint8_t error; - uint32_t status; - - assert( pSd != NULL ) ; - - if (pSd->cardType & CARD_TYPE_bmSDIO) { - if (size == 0) return SDMMC_ERROR_PARAM; - while(size --) { - status = 0; - error = Cmd52(pSd, 0, functionNum, 0, address ++, &status); - if (pData) *pData ++ = (uint8_t)status; - if (error) { - TRACE_ERROR("IO_RdDirect.Cmd52: %u\n\r", error); - return SDMMC_ERROR; - } - else if (status & STATUS_SDIO_R5) { - TRACE_ERROR("RD_DIRECT(%u, %u) st %x\n\r", - address, size, status); - return SDMMC_ERROR; - } - } - } - else { - return SDMMC_ERROR_NOT_SUPPORT; - } - return 0; -} - -/** - * Write one byte to SDIO card, using RW_DIRECT command. - * \param pSd Pointer to SdCard instance. - * \param functionNum Function number. - * \param address Register address to write to. - * \param dataByte Data to write. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - */ -uint8_t SDIO_WriteDirect(SdCard *pSd, - uint8_t functionNum, - uint32_t address, - uint8_t dataByte) -{ - uint8_t error; - uint32_t status; - - assert( pSd != NULL ) ; - - if (pSd->cardType & CARD_TYPE_bmSDIO) { - status = dataByte; - error = Cmd52(pSd, 1, functionNum, 0, address, &status); - if (error) { - TRACE_ERROR("SDIO_WrDirect.Cmd52: %u\n\r", error); - return SDMMC_ERROR; - } - else if (status & STATUS_SDIO_R5) { - TRACE_ERROR("WR_DIRECT(%u) st %x\n\r", - address, status); - return SDMMC_ERROR; - } - } - else { - return SDMMC_ERROR_NOT_SUPPORT; - } - return 0; -} - -/** - * Read byte by byte from SDIO card, using RW_EXTENDED command. - * \param pSd Pointer to SdCard instance. - * \param functionNum Function number. - * \param address First byte address of data in SDIO card. - * \param isFixedAddress During transfer the data address is never increased. - * \param pData Pointer to data buffer. - * \param size Size of data to read (1 ~ 512). - * \param fCallback Callback function invoked when transfer finished. - * \param pArg Pointer to callback argument. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - */ -uint8_t SDIO_ReadBytes(SdCard *pSd, - uint8_t functionNum, - uint32_t address, - uint8_t isFixedAddress, - uint8_t *pData, - uint16_t size, - SdmmcCallback fCallback, - void* pArg) -{ - uint8_t error; - uint32_t status; - - assert( pSd != NULL ) ; - - if (pSd->cardType & CARD_TYPE_bmSDIO) { - if (size == 0) return SDMMC_ERROR_PARAM; - error = Cmd53(pSd, - 0, functionNum, 0, !isFixedAddress, - address, pData, size, - &status, - fCallback, pArg); - if (error) { - TRACE_ERROR("IO_RdBytes.Cmd53: %u\n\r", error); - return SDMMC_ERROR; - } - else if (status & STATUS_SDIO_R5) { - TRACE_ERROR("RD_EXT st %x\n\r", status); - return SDMMC_ERROR; - } - } - else { - return SDMMC_ERROR_NOT_SUPPORT; - } - return 0; -} - -/** - * Write byte by byte to SDIO card, using RW_EXTENDED command. - * \param pSd Pointer to SdCard instance. - * \param functionNum Function number. - * \param address First byte address of data in SDIO card. - * \param isFixedAddress During transfer the data address is never increased. - * \param pData Pointer to data buffer. - * \param size Size of data to write (1 ~ 512). - * \param fCallback Callback function invoked when transfer finished. - * \param pArg Pointer to callback argument. - * \return 0 if successful; otherwise returns an \ref sdmmc_rc "error code". - */ -uint8_t SDIO_WriteBytes(SdCard *pSd, - uint8_t functionNum, - uint32_t address, - uint8_t isFixedAddress, - uint8_t *pData, - uint16_t size, - SdmmcCallback fCallback, - void* pArg) -{ - uint8_t error; - uint32_t status; - - assert( pSd != NULL ) ; - - if (pSd->cardType & CARD_TYPE_bmSDIO) { - if (size == 0) return SDMMC_ERROR_PARAM; - error = Cmd53(pSd, - 1, functionNum, 0, !isFixedAddress, - address, pData, size, - (uint32_t*)&status, - fCallback, pArg); - Delay(100); - if (error) { - TRACE_ERROR("IO_WrBytes.Cmd53: %u\n\r", error); - return SDMMC_ERROR; - } - else if (status & STATUS_SDIO_R5) { - TRACE_ERROR("WR_EXT st %x\n\r", status); - return SDMMC_ERROR; - } - } - else { - return SDMMC_ERROR_NOT_SUPPORT; - } - return 0; -} - -/** - * Display SDIO card informations (CIS, tuple ...) - * \param pSd Pointer to SdCard instance. - */ -void SDIO_DisplayCardInformation(SdCard * pSd) -{ - uint32_t tmp = 0, addrCIS = 0, addrManfID = 0, addrFunc0 = 0; - uint8_t *p = (uint8_t*)&tmp; - uint8_t buf[8]; - - switch(pSd->cardType) - { - case CARD_SDIO: - TRACE_INFO("** SDIO ONLY card\n\r"); - break; - case CARD_SDCOMBO: case CARD_SDHCCOMBO: - TRACE_INFO("** SDIO Combo card\n\r"); - break; - default: - TRACE_INFO("** NO SDIO\n\r"); - return; - } - /* CCCR */ - TRACE_INFO("====== CCCR ======\n\r"); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_CCCR_REG, p, 1); - TRACE_INFO(".SDIO %02X\n\r", (tmp & SDIO_SDIO) >> 4); - TRACE_INFO(".CCCR %02X\n\r", (tmp & SDIO_CCCR) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_SD_REV_REG, p, 1); - TRACE_INFO(".SD %02X\n\r", (tmp & SDIO_SD) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_IOE_REG, p, 1); - TRACE_INFO(".IOE %02X\n\r", (tmp & SDIO_IOE) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_IOR_REG, p, 1); - TRACE_INFO(".IOR %02X\n\r", (tmp & SDIO_IOR) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_IEN_REG, p, 1); - TRACE_INFO(".IEN %02X\n\r", (tmp & SDIO_IEN) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_INT_REG, p, 1); - TRACE_INFO(".INT %02X\n\r", (tmp & SDIO_INT) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_BUS_CTRL_REG, p, 1); - TRACE_INFO(".CD %x\n\r", (tmp & SDIO_CD) >> 7); - TRACE_INFO(".SCSI %x\n\r", (tmp & SDIO_SCSI) >> 6); - TRACE_INFO(".ECSI %x\n\r", (tmp & SDIO_ECSI) >> 5); - TRACE_INFO(".BUS_WIDTH %x\n\r", (tmp & SDIO_BUSWIDTH) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_CAP_REG, p, 1); - TRACE_INFO(".4BLS %x\n\r", (tmp & SDIO_4BLS) >> 7); - TRACE_INFO(".LSC %x\n\r", (tmp & SDIO_LSC) >> 6); - TRACE_INFO(".E4MI %x\n\r", (tmp & SDIO_E4MI) >> 5); - TRACE_INFO(".S4MI %x\n\r", (tmp & SDIO_S4MI) >> 4); - TRACE_INFO(".SBS %x\n\r", (tmp & SDIO_SBS) >> 3); - TRACE_INFO(".SRW %x\n\r", (tmp & SDIO_SRW) >> 2); - TRACE_INFO(".SMB %x\n\r", (tmp & SDIO_SMB) >> 1); - TRACE_INFO(".SDC %x\n\r", (tmp & SDIO_SDC) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_CIS_PTR_REG, p, 3); - TRACE_INFO(".CIS_PTR %06X\n\r", tmp); - addrCIS = tmp; tmp = 0; - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_BUS_SUSP_REG, p, 1); - TRACE_INFO(".BR %x\n\r", (tmp & SDIO_BR) >> 1); - TRACE_INFO(".BS %x\n\r", (tmp & SDIO_BS) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_FUN_SEL_REG, p, 1); - TRACE_INFO(".DF %x\n\r", (tmp & SDIO_DF) >> 7); - TRACE_INFO(".FS %x\n\r", (tmp & SDIO_FS) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_EXEC_REG, p, 1); - TRACE_INFO(".EX %x\n\r", (tmp & SDIO_EX)); - TRACE_INFO(".EXM %x\n\r", (tmp & SDIO_EXM) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_READY_REG, p, 1); - TRACE_INFO(".RF %x\n\r", (tmp & SDIO_RF)); - TRACE_INFO(".RFM %x\n\r", (tmp & SDIO_RFM) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_FN0_BLKSIZ_REG, p, 2); - TRACE_INFO(".FN0_SIZE %d(%04X)\n\r", tmp, tmp); - tmp = 0; - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_POWER_REG, p, 1); - TRACE_INFO(".EMPC %x\n\r", (tmp & SDIO_EMPC) >> 1); - TRACE_INFO(".SMPC %x\n\r", (tmp & SDIO_SMPC) >> 0); - SDIO_ReadDirect(pSd, SDIO_CIA, SDIO_HS_REG, p, 1); - TRACE_INFO(".EHS %x\n\r", (tmp & SDIO_EHS) >> 1); - TRACE_INFO(".SHS %x\n\r", (tmp & SDIO_SHS) >> 0); - /* Metaformat */ - SdioFindTuples(pSd, addrCIS, 128, &addrManfID, &addrFunc0); - if (addrManfID != 0) { - SDIO_ReadDirect(pSd, SDIO_CIA, addrManfID, buf, 6); - TRACE_INFO("==== CISTPL_MANFID ====\n\r"); - TRACE_INFO("._MANF %04X\n\r", buf[2] + (buf[3] << 8)); - TRACE_INFO("._CARD %04X\n\r", buf[4] + (buf[5] << 8)); - } - if (addrFunc0 != 0) { - SDIO_ReadDirect(pSd, SDIO_CIA, addrFunc0, buf, 6); - TRACE_INFO("== CISTPL_FUNCE Fun0 ==\n\r"); - TRACE_INFO("._FN0_BLK_SIZE %d(0x%04X)\n\r", - buf[3] + (buf[4] << 8), buf[3] + (buf[4] << 8)); - TRACE_INFO("._MAX_TRAN_SPEED %02X\n\r", buf[5]); - } -} - -/** - * Display the content of the CID register - * \param pSd Pointer to SdCard instance. - */ -void SD_DisplayRegisterCID(SdCard *pSd) -{ - TRACE_INFO("======= CID =======\n\r"); - TRACE_INFO(" .MID Manufacturer ID %02X\n\r", - SD_CID_MID(pSd)); - - TRACE_INFO(" .CBX Card/BGA %X\n\r", SD_CID_CBX(pSd)); - - TRACE_INFO(" .OID OEM/Application ID %c%c\n\r", - (char)SD_CID_OID_BYTE_1(pSd), - (char)SD_CID_OID_BYTE_0(pSd)); - - TRACE_INFO(" .PNM Product revision %c%c%c%c%c\n\r", - (char)SD_CID_PNM_BYTE_4(pSd), - (char)SD_CID_PNM_BYTE_3(pSd), - (char)SD_CID_PNM_BYTE_2(pSd), - (char)SD_CID_PNM_BYTE_1(pSd), - (char)SD_CID_PNM_BYTE_0(pSd)); - - TRACE_INFO(" .PRV Product serial number %02X%04X\n\r", - SD_CID_PRV_2(pSd), - SD_CID_PRV_1(pSd)); - - TRACE_INFO(" .MDT Manufacturing date %04d/%02d\n\r", - (uint16_t)SD_CID_MDT_YEAR(pSd), - (uint8_t)SD_CID_MDT_MONTH(pSd)); - - TRACE_INFO(" .CRC checksum %02X\n\r", - SD_CID_CRC(pSd)); -} - -/** - * Display the content of the CSD register - * \param pSd Pointer to SdCard instance. - */ -void SD_DisplayRegisterCSD(SdCard *pSd) -{ - TRACE_INFO("======== CSD ========"); - TRACE_INFO_WP("\n\r"); - TRACE_INFO(" .CSD_STRUCTURE 0x%x\r\n", SD_CSD_STRUCTURE(pSd)); - TRACE_INFO(" .SPEC_VERS 0x%x\r\n", SD_CSD_SPEC_VERS(pSd)); - TRACE_INFO(" .TAAC 0x%X\r\n", SD_CSD_TAAC(pSd) ); - TRACE_INFO(" .NSAC 0x%X\r\n", SD_CSD_NSAC(pSd) ); - TRACE_INFO(" .TRAN_SPEED 0x%X\r\n", SD_CSD_TRAN_SPEED(pSd) ); - TRACE_INFO(" .CCC 0x%X\r\n", SD_CSD_CCC(pSd) ); - TRACE_INFO(" .READ_BL_LEN 0x%X\r\n", SD_CSD_READ_BL_LEN(pSd) ); - TRACE_INFO(" .READ_BL_PARTIAL 0x%X\r\n", SD_CSD_READ_BL_PARTIAL(pSd) ); - TRACE_INFO(" .WRITE_BLK_MISALIGN 0x%X\r\n", SD_CSD_WRITE_BLK_MISALIGN(pSd)); - TRACE_INFO(" .READ_BLK_MISALIGN 0x%X\r\n", SD_CSD_READ_BLK_MISALIGN(pSd) ); - TRACE_INFO(" .DSR_IMP 0x%X\r\n", SD_CSD_DSR_IMP(pSd) ); - TRACE_INFO(" .C_SIZE 0x%X\r\n", SD_CSD_C_SIZE(pSd) ); - TRACE_INFO(" .C_SIZE_HC 0x%X\r\n", SD_CSD_C_SIZE_HC(pSd) ); - TRACE_INFO(" .VDD_R_CURR_MIN 0x%X\r\n", SD_CSD_VDD_R_CURR_MIN(pSd) ); - TRACE_INFO(" .VDD_R_CURR_MAX 0x%X\r\n", SD_CSD_VDD_R_CURR_MAX(pSd) ); - TRACE_INFO(" .VDD_W_CURR_MIN 0x%X\r\n", SD_CSD_VDD_W_CURR_MIN(pSd) ); - TRACE_INFO(" .VDD_W_CURR_MAX 0x%X\r\n", SD_CSD_VDD_W_CURR_MAX(pSd) ); - TRACE_INFO(" .C_SIZE_MULT 0x%X\r\n", SD_CSD_C_SIZE_MULT(pSd) ); - TRACE_INFO(" .ERASE_BLK_EN 0x%X\r\n", SD_CSD_ERASE_BLK_EN(pSd) ); - TRACE_INFO(" .SECTOR_SIZE 0x%X\r\n", SD_CSD_SECTOR_SIZE(pSd) ); - TRACE_INFO(" .WP_GRP_SIZE 0x%X\r\n", SD_CSD_WP_GRP_SIZE(pSd) ); - TRACE_INFO(" .WP_GRP_ENABLE 0x%X\r\n", SD_CSD_WP_GRP_ENABLE(pSd) ); - TRACE_INFO(" .R2W_FACTOR 0x%X\r\n", SD_CSD_R2W_FACTOR(pSd) ); - TRACE_INFO(" .WRITE_BL_LEN 0x%X\r\n", SD_CSD_WRITE_BL_LEN(pSd) ); - TRACE_INFO(" .WRITE_BL_PARTIAL 0x%X\r\n", SD_CSD_WRITE_BL_PARTIAL(pSd) ); - TRACE_INFO(" .FILE_FORMAT_GRP 0x%X\r\n", SD_CSD_FILE_FORMAT_GRP(pSd) ); - TRACE_INFO(" .COPY 0x%X\r\n", SD_CSD_COPY(pSd) ); - TRACE_INFO(" .PERM_WRITE_PROTECT 0x%X\r\n", SD_CSD_PERM_WRITE_PROTECT(pSd)); - TRACE_INFO(" .TMP_WRITE_PROTECT 0x%X\r\n", SD_CSD_TMP_WRITE_PROTECT(pSd) ); - TRACE_INFO(" .FILE_FORMAT 0x%X\r\n", SD_CSD_FILE_FORMAT(pSd) ); - TRACE_INFO(" .ECC 0x%X\r\n", SD_CSD_ECC(pSd) ); - TRACE_INFO(" .CRC 0x%X\r\n", SD_CSD_CRC(pSd) ); - TRACE_INFO(" .MULT 0x%X\r\n", SD_CSD_MULT(pSd) ); - TRACE_INFO(" .BLOCKNR 0x%X\r\n", SD_CSD_BLOCKNR(pSd) ); - TRACE_INFO(" .BLOCKNR_HC 0x%X\r\n", SD_CSD_BLOCKNR_HC(pSd) ); - TRACE_INFO(" .BLOCK_LEN 0x%X\r\n", SD_CSD_BLOCK_LEN(pSd) ); - TRACE_INFO(" .TOTAL_SIZE 0x%X\r\n", SD_CSD_TOTAL_SIZE(pSd) ); - TRACE_INFO(" .TOTAL_SIZE_HC 0x%X\r\n", SD_CSD_TOTAL_SIZE_HC(pSd) ); - TRACE_INFO(" -SD_TOTAL_SIZE 0x%X\r\n", SD_TOTAL_SIZE(pSd) ); - TRACE_INFO(" -SD_TOTAL_BLOCK 0x%X\r\n", SD_TOTAL_BLOCK(pSd) ); -} - -/** - * Display the content of the EXT_CSD register - * \param pSd Pointer to SdCard instance. - */ -void SD_DisplayRegisterECSD(SdCard *pSd) -{ - if ((pSd->cardType & CARD_TYPE_bmSDMMC) == CARD_MMC - && MMC_IsVer4(pSd) - && SD_CSD_STRUCTURE(pSd) >= 2) {} - else { - TRACE_INFO("** EXT_CSD NOT SUPPORTED\n\r"); - return; - } - TRACE_INFO("======= EXT_CSD ======="); - TRACE_INFO_WP("\n\r"); - TRACE_INFO(" .S_CMD_SET : 0x%X\n\r", - SD_EXTCSD_S_CMD_SET(pSd)); - TRACE_INFO(" .BOOT_INFO : 0x%X\n\r", - SD_EXTCSD_BOOT_INFO(pSd)); - TRACE_INFO(" .BOOT_SIZE_MULTI : 0x%X\n\r", - SD_EXTCSD_BOOT_SIZE_MULTI(pSd)); - TRACE_INFO(" .ACC_SIZE : 0x%X\n\r", - SD_EXTCSD_ACC_SIZE(pSd)); - TRACE_INFO(" .HC_ERASE_GRP_SIZE : 0x%X\n\r", - SD_EXTCSD_HC_ERASE_GRP_SIZE(pSd)); - TRACE_INFO(" .ERASE_TIMEOUT_MULT : 0x%X\n\r", - SD_EXTCSD_ERASE_TIMEOUT_MULT(pSd)); - TRACE_INFO(" .REL_WR_SEC_C : 0x%X\n\r", - SD_EXTCSD_REL_WR_SEC_C(pSd)); - TRACE_INFO(" .HC_WP_GRP_SIZE : 0x%X\n\r", - SD_EXTCSD_HC_WP_GRP_SIZE(pSd)); - TRACE_INFO(" .S_C_VCC : 0x%X\n\r", - SD_EXTCSD_S_C_VCC(pSd)); - TRACE_INFO(" .S_C_VCCQ : 0x%X\n\r", - SD_EXTCSD_S_C_VCCQ(pSd)); - TRACE_INFO(" .S_A_TIMEOUT : 0x%X\n\r", - SD_EXTCSD_S_A_TIMEOUT(pSd)); - TRACE_INFO(" .SEC_COUNT : 0x%X\n\r", - SD_EXTCSD_SEC_COUNT(pSd)); - TRACE_INFO(" .MIN_PERF_W_8_52 : 0x%X\n\r", - SD_EXTCSD_MIN_PERF_W_8_52(pSd)); - TRACE_INFO(" .MIN_PERF_R_8_52 : 0x%X\n\r", - SD_EXTCSD_MIN_PERF_R_8_52(pSd)); - TRACE_INFO(" .MIN_PERF_W_8_26_4_52 : 0x%X\n\r", - SD_EXTCSD_MIN_PERF_W_8_26_4_52(pSd)); - TRACE_INFO(" .MIN_PERF_R_8_26_4_52 : 0x%X\n\r", - SD_EXTCSD_MIN_PERF_R_8_26_4_52(pSd)); - TRACE_INFO(" .MIN_PERF_W_4_26 : 0x%X\n\r", - SD_EXTCSD_MIN_PERF_W_4_26(pSd)); - TRACE_INFO(" .MIN_PERF_R_4_26 : 0x%X\n\r", - SD_EXTCSD_MIN_PERF_R_4_26(pSd)); - TRACE_INFO(" .PWR_CL_26_360 : 0x%X\n\r", - SD_EXTCSD_PWR_CL_26_360(pSd)); - TRACE_INFO(" .PWR_CL_52_360 : 0x%X\n\r", - SD_EXTCSD_PWR_CL_52_360(pSd)); - TRACE_INFO(" .PWR_CL_26_195 : 0x%X\n\r", - SD_EXTCSD_PWR_CL_26_195(pSd)); - TRACE_INFO(" .PWR_CL_52_195 : 0x%X\n\r", - SD_EXTCSD_PWR_CL_52_195(pSd)); - TRACE_INFO(" .CARD_TYPE : 0x%X\n\r", - SD_EXTCSD_CARD_TYPE(pSd)); - TRACE_INFO(" .CSD_STRUCTURE : 0x%X\n\r", - SD_EXTCSD_CSD_STRUCTURE(pSd)); - TRACE_INFO(" .EXT_CSD_REV : 0x%X\n\r", - SD_EXTCSD_EXT_CSD_REV(pSd)); - TRACE_INFO(" .CMD_SET : 0x%X\n\r", - SD_EXTCSD_CMD_SET(pSd)); - TRACE_INFO(" .CMD_SET_REV : 0x%X\n\r", - SD_EXTCSD_CMD_SET_REV(pSd)); - TRACE_INFO(" .POWER_CLASS : 0x%X\n\r", - SD_EXTCSD_POWER_CLASS(pSd)); - TRACE_INFO(" .HS_TIMING : 0x%X\n\r", - SD_EXTCSD_HS_TIMING(pSd)); - TRACE_INFO(" .BUS_WIDTH : 0x%X\n\r", - SD_EXTCSD_BUS_WIDTH(pSd)); - TRACE_INFO(" .ERASED_MEM_CONT : 0x%X\n\r", - SD_EXTCSD_ERASED_MEM_CONT(pSd)); - TRACE_INFO(" .BOOT_CONFIG : 0x%X\n\r", - SD_EXTCSD_BOOT_CONFIG(pSd)); - TRACE_INFO(" .BOOT_BUS_WIDTH : 0x%X\n\r", - SD_EXTCSD_BOOT_BUS_WIDTH(pSd)); - TRACE_INFO(" .ERASE_GROUP_DEF : 0x%X\n\r", - SD_EXTCSD_ERASE_GROUP_DEF(pSd)); -} - -/** - * Display the content of the SCR register - * \param pSd Pointer to SdCard instance. - */ -void SD_DisplayRegisterSCR(SdCard *pSd) -{ - if (pSd->cardType >= CARD_SD && pSd->cardType <= CARD_SDHC) {} - else { - TRACE_INFO("** SCR NOT Supported!\n\r"); - return; - } - TRACE_INFO("========== SCR =========="); - TRACE_INFO_WP("\n\r"); - - TRACE_INFO(" .SCR_STRUCTURE :0x%X\n\r", - SD_SCR_SCR_STRUCTURE(pSd)); - TRACE_INFO(" .SD_SPEC :0x%X\n\r", - SD_SCR_SD_SPEC(pSd)); - TRACE_INFO(" .DATA_STAT_AFTER_ERASE :0x%X\n\r", - SD_SCR_DATA_STAT_AFTER_ERASE(pSd)); - TRACE_INFO(" .SD_SECURITY :0x%X\n\r", - SD_SCR_SD_SECURITY(pSd)); - TRACE_INFO(" .SD_BUS_WIDTHS :0x%X\n\r", - SD_SCR_SD_BUS_WIDTHS(pSd)); -} - -/** - * Display the content of the SD Status - * \param pSd Pointer to SdCard instance. - */ -void SD_DisplaySdStatus(SdCard *pSd) -{ - if ( pSd->cardType >= CARD_SD - && pSd->cardType <= CARD_SDHC - && (pSd->optCmdBitMap & SD_ACMD13_SUPPORT) ) {} - else { - TRACE_INFO("** SD Status NOT Supported!\n\r"); - return; - } - TRACE_INFO("=========== STAT ============"); - TRACE_INFO_WP("\n\r"); - - TRACE_INFO(" .DAT_BUS_WIDTH :0x%X\n\r", - SD_STAT_DAT_BUS_WIDTH(pSd)); - TRACE_INFO(" .SECURED_MODE :0x%X\n\r", - SD_STAT_SECURED_MODE(pSd)); - TRACE_INFO(" .SD_CARD_TYPE :0x%X\n\r", - SD_STAT_SD_CARD_TYPE(pSd)); - TRACE_INFO(" .SIZE_OF_PROTECTED_AREA :0x%X\n\r", - SD_STAT_SIZE_OF_PROTECTED_AREA(pSd)); - TRACE_INFO(" .SPEED_CLASS :0x%X\n\r", - SD_STAT_SPEED_CLASS(pSd)); - TRACE_INFO(" .PERFORMANCE_MOVE :0x%X\n\r", - SD_STAT_PERFORMANCE_MOVE(pSd)); - TRACE_INFO(" .AU_SIZE :0x%X\n\r", - SD_STAT_AU_SIZE(pSd)); - TRACE_INFO(" .ERASE_SIZE :0x%X\n\r", - SD_STAT_ERASE_SIZE(pSd)); - TRACE_INFO(" .ERASE_TIMEOUT :0x%X\n\r", - SD_STAT_ERASE_TIMEOUT(pSd)); - TRACE_INFO(" .ERASE_OFFSET :0x%X\n\r", - SD_STAT_ERASE_OFFSET(pSd)); -} -/**@}*/ diff --git a/src/ersky9x/libraries/memories/sdmmc.h b/src/ersky9x/libraries/memories/sdmmc.h deleted file mode 100644 index c102a1459..000000000 --- a/src/ersky9x/libraries/memories/sdmmc.h +++ /dev/null @@ -1,559 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file */ - -/** - * \page sdmmc_drv SD/MMC Driver Interface - * - * \section Purpose - * - * Implementation for sdcard sd mode physical layer driver. Supply a set of sdcard sd mode's - * interface. - * - * \section Usage - * - General Card Support - * -# SD_Init(): Run the SDcard initialization sequence - * -# SD_GetCardType() : Return SD/MMC reported card type. - * - SD/MMC Memory Card Operations - * -# SD_ReadBlock() : Read one block of data - * -# SD_WriteBlock() : Write one block of data - * -# SD_ReadBlocks() : Read blocks of data - * -# SD_WriteBlocks() : Write blocks of data - * -# SD_Read() : Read blocks of data with multi-access command - * (Optimized read, see \ref sdmmc_read_op). - * -# SD_Write() : Read blocks of data with multi-access command - * (Optimized write, see \ref sdmmc_write_op). - * -# SD_GetNumberBlocks() : Return SD/MMC card reported number of blocks. - * -# SD_GetBlockSize() : Return SD/MMC card reported block size. - * -# SD_GetTotalSizeKB() : Return size of SD/MMC card in KBytes. - * - SDIO Card Operations - * -# SDIO_ReadDirect() : Read bytes from registers. - * -# SDIO_WriteDirect() : Write one byte to register. - * -# SDIO_ReadBytes() : Read 1 ~ 512 bytes from card. - * -# SDIO_WriteBytes() : Write 1 ~ 512 bytes to card. - */ - -#ifndef SDMMC_H -#define SDMMC_H -/** \addtogroup sdmmc_lib Working with SD/MMC - Please refer to \ref sdmmc_lib. - * @{ - * \addtogroup sdmmc_api SD/MMC Driver API - * \addtogroup sdmmc_hal SD/MMC Low Level Driver - */ -/**@}*/ - -/** \addtogroup sdmmc_api - * @{ - * \addtogroup sdmmc_mem_api SD/MMC Memroy API - * @{ - */ - -#ifdef __cplusplus -extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Header - *----------------------------------------------------------------------------*/ - -#include "sdio.h" -#include "sdmmc_cmd.h" - -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** CID register access macros (128 bits, 4 * 32 bits). */ -#define SD_CID(pSd, bitfield, bits) ( (pSd->cid[3-(bitfield)/32] >> ((bitfield)%32)) & ((1 << (bits)) - 1)) -#define SD_CID_MID(pSd) SD_CID(pSd, 120, 8) ///< Manufacturer ID -#define SD_CID_BGA(pSd) SD_CID(pSd, 112, 2) ///< Card/BGA(eMMC) -#define SD_CID_CBX(pSd) SD_CID(pSd, 112, 2) ///< Card/BGA(eMMC) -#define SD_CID_OID_BYTE_1(pSd) SD_CID(pSd, 112, 8) ///< OEM/Application ID byte 1 -#define SD_CID_OID_BYTE_0(pSd) SD_CID(pSd, 104, 8) ///< OEM/Application ID byte 0 -#define SD_CID_PNM_BYTE_4(pSd) SD_CID(pSd, 96, 8) ///< Product revision byte 4 -#define SD_CID_PNM_BYTE_3(pSd) SD_CID(pSd, 88, 8) ///< Product revision byte 3 -#define SD_CID_PNM_BYTE_2(pSd) SD_CID(pSd, 80, 8) ///< Product revision byte 2 -#define SD_CID_PNM_BYTE_1(pSd) SD_CID(pSd, 72, 8) ///< Product revision byte 1 -#define SD_CID_PNM_BYTE_0(pSd) SD_CID(pSd, 64, 8) ///< Product revision byte 0 -#define SD_CID_PRV_1(pSd) SD_CID(pSd, 24, 8) ///< Product serial number 1 -#define SD_CID_PRV_2(pSd) SD_CID(pSd, 32,24) ///< Product serial number 2 -#define SD_CID_MDT_YEAR(pSd) (SD_CID(pSd, 12, 8))+2000///< Manufacturing date year -#define SD_CID_MDT_MONTH(pSd) SD_CID(pSd, 8, 4) ///< Manufacturing date month -#define SD_CID_CRC(pSd) SD_CID(pSd, 1, 7) ///< CRC7 checksum - -/** CSD register access macros (128 bits, 4 * 32 bits). */ -#define SD_CSD(pSd, bitfield, bits) ((((pSd)->csd)[3-(bitfield)/32] >> ((bitfield)%32)) & ((1 << (bits)) - 1)) -#define SD_CSD_STRUCTURE(pSd) SD_CSD(pSd, 126, 2) ///< CSD structure 00b Version 1.0 01b version 2.0 High Cap -#define SD_CSD_SPEC_VERS(pSd) SD_CSD(pSd, 122, 4) ///< System Specification Version Number -#define SD_CSD_TAAC(pSd) SD_CSD(pSd, 112, 8) ///< Data read-access-time-1 -#define SD_CSD_NSAC(pSd) SD_CSD(pSd, 104, 8) ///< Data read access-time-2 in CLK cycles -#define SD_CSD_TRAN_SPEED(pSd) SD_CSD(pSd, 96, 8) ///< Max. data transfer rate -#define SD_CSD_CCC(pSd) SD_CSD(pSd, 84, 12) ///< Card command class -#define SD_CSD_READ_BL_LEN(pSd) SD_CSD(pSd, 80, 4) ///< Max. read data block length -#define SD_CSD_READ_BL_PARTIAL(pSd) SD_CSD(pSd, 79, 1) ///< Bartial blocks for read allowed -#define SD_CSD_WRITE_BLK_MISALIGN(pSd) SD_CSD(pSd, 78, 1) ///< Write block misalignment -#define SD_CSD_READ_BLK_MISALIGN(pSd) SD_CSD(pSd, 77, 1) ///< Read block misalignment -#define SD_CSD_DSR_IMP(pSd) SD_CSD(pSd, 76, 1) ///< DSP implemented -#define SD_CSD_C_SIZE(pSd) ((SD_CSD(pSd, 72, 2) << 10) + \ - (SD_CSD(pSd, 64, 8) << 2) + \ - SD_CSD(pSd, 62, 2)) ///< Device size -#define SD_CSD_C_SIZE_HC(pSd) ((SD_CSD(pSd, 64, 6) << 16) + \ - (SD_CSD(pSd, 56, 8) << 8) + \ - SD_CSD(pSd, 48, 8)) ///< Device size v2.0 High Capacity -#define SD_CSD_VDD_R_CURR_MIN(pSd) SD_CSD(pSd, 59, 3) ///< Max. read current VDD min -#define SD_CSD_VDD_R_CURR_MAX(pSd) SD_CSD(pSd, 56, 3) ///< Max. read current VDD max -#define SD_CSD_VDD_W_CURR_MIN(pSd) SD_CSD(pSd, 53, 3) ///< Max. write current VDD min -#define SD_CSD_VDD_W_CURR_MAX(pSd) SD_CSD(pSd, 50, 3) ///< Max. write current VDD max -#define SD_CSD_C_SIZE_MULT(pSd) SD_CSD(pSd, 47, 3) ///< Device size multiplier -#define SD_CSD_ERASE_BLK_EN(pSd) SD_CSD(pSd, 46, 1) ///< Erase single block enable -#define MMC_CSD_ERASE_BLK_EN(pSd) SD_CSD(pSd, 46, 1) ///< Erase single block enable -#define MMC_CSD_ERASE_GRP_SIZE(pSd) SD_CSD(pSd, 42, 4) ///< Erase group size -#define SD_CSD_ERASE_GRP_MULT(pSd) SD_CSD(pSd, 37, 4) ///< Erase group size multiplier -#define SD_CSD_SECTOR_SIZE(pSd) ((SD_CSD(pSd, 40, 6) << 1) + SD_CSD(pSd, 39, 1)) ///< Erase sector size -#define SD_CSD_WP_GRP_SIZE(pSd) SD_CSD(pSd, 32, 7) ///< Write protect group size -#define SD_CSD_WP_GRP_ENABLE(pSd) SD_CSD(pSd, 31, 1) ///< write protect group enable -#define SD_CSD_R2W_FACTOR(pSd) SD_CSD(pSd, 26, 3) ///< Write speed factor -#define SD_CSD_WRITE_BL_LEN(pSd) ((SD_CSD(pSd, 24, 2) << 2) + SD_CSD(pSd, 22, 2)) ///< Max write block length -#define SD_CSD_WRITE_BL_PARTIAL(pSd) SD_CSD(pSd, 21, 1) ///< Partial blocks for write allowed -#define SD_CSD_CONTENT_PROT_APP(pSd) SD_CSD(pSd, 16, 1) ///< File format group -#define SD_CSD_FILE_FORMAT_GRP(pSd) SD_CSD(pSd, 15, 1) ///< File format group -#define SD_CSD_COPY(pSd) SD_CSD(pSd, 14, 1) ///< Copy flag (OTP) -#define SD_CSD_PERM_WRITE_PROTECT(pSd) SD_CSD(pSd, 13, 1) ///< Permanent write protect -#define SD_CSD_TMP_WRITE_PROTECT(pSd) SD_CSD(pSd, 12, 1) ///< Temporary write protection -#define SD_CSD_FILE_FORMAT(pSd) SD_CSD(pSd, 10, 2) ///< File format -#define SD_CSD_ECC(pSd) SD_CSD(pSd, 8, 2) ///< CRC -#define SD_CSD_CRC(pSd) SD_CSD(pSd, 1, 7) ///< CRC -#define SD_CSD_MULT(pSd) (1 << (SD_CSD_C_SIZE_MULT(pSd) + 2)) -#define SD_CSD_BLOCKNR(pSd) ((SD_CSD_C_SIZE(pSd) + 1) * SD_CSD_MULT(pSd)) -#define SD_CSD_BLOCKNR_HC(pSd) ((SD_CSD_C_SIZE_HC(pSd) + 1) * 1024) -#define SD_CSD_BLOCK_LEN(pSd) (1 << SD_CSD_READ_BL_LEN(pSd)) -#define SD_CSD_TOTAL_SIZE(pSd) (SD_CSD_BLOCKNR(pSd) * SD_CSD_BLOCK_LEN(pSd)) -#define SD_CSD_TOTAL_SIZE_HC(pSd) ((SD_CSD_C_SIZE_HC(pSd) + 1) * 512* 1024) -#define SD_TOTAL_SIZE(pSd) ((pSd)->totalSize) -#define SD_TOTAL_BLOCK(pSd) ((pSd)->blockNr) - -/** SCR register access macros (64 bits, 2 * 32 bits, 8 * 8 bits). */ -#define SD_EXT_OFFSET_SD_SCR 0 // DW -#define SD_SCR(pSd, bitfield, bits) \ - ( ((char*)(pSd)->extData)[7 - ((bitfield)/8)] >> ((bitfield)%8) \ - & ((1 << (bits)) - 1) \ - ) -#define SD_SCR_SCR_STRUCTURE(pSd) SD_SCR(pSd, 60, 4) -#define SD_SCR_SCR_STRUCTURE_1_0 0 -#define SD_SCR_SD_SPEC(pSd) SD_SCR(pSd, 56, 4) -#define SD_SCR_SD_SPEC_1_0_01 0 -#define SD_SCR_SD_SPEC_1_10 1 -#define SD_SCR_SD_SPEC_2_00 2 -#define SD_SCR_DATA_STAT_AFTER_ERASE(pSd) SD_SCR(pSd, 55, 1) -#define SD_SCR_SD_SECURITY(pSd) SD_SCR(pSd, 52, 3) -#define SD_SCR_SD_SECURITY_NO 0 -#define SD_SCR_SD_SECURITY_NOTUSED 1 -#define SD_SCR_SD_SECURITY_1_01 2 -#define SD_SCR_SD_SECURITY_2_00 3 -#define SD_SCR_SD_BUS_WIDTHS(pSd) SD_SCR(pSd, 48, 4) -#define SD_SCR_SD_BUS_WIDTH_1BITS (1 << 0) -#define SD_SCR_SD_BUS_WIDTH_4BITS (1 << 2) - -/** SD Status access macros (512 bits, 16 * 32 bits, 64 * 8 bits). */ -#define SD_EXT_OFFSET_SD_STAT 2 // DW -#define SD_STAT(pSd, bitfield, bits) \ - ( ((char*)&(pSd)->extData[2])[63 - ((bitfield)/8)] >> ((bitfield)%8) \ - & ((1 << (bits)) - 1) \ - ) -/** Bus width, 00: default, 10:4-bit */ -#define SD_STAT_DAT_BUS_WIDTH(pSd) SD_STAT(pSd, 510, 2) -#define SD_STAT_DATA_BUS_WIDTH_1BIT 0x0 -#define SD_STAT_DATA_BUS_WIDTH_4BIT 0x2 -/// Secured Mode -#define SD_STAT_SECURED_MODE(pSd) SD_STAT(pSd, 509, 1) -/// SD Memory Cards as defined in 1.01~2.00 -#define SD_STAT_SD_CARD_TYPE(pSd) (SD_STAT(pSd, 480, 8) \ - + (SD_STAT(pSd, 488, 8) << 8) ) -/// STD: ThisSize*Multi*BlockLen, HC: Size in bytes -#define SD_STAT_SIZE_OF_PROTECTED_AREA(pSd) (SD_STAT(pSd, 448, 8) \ - + (SD_STAT(pSd, 456, 8) << 8) \ - + (SD_STAT(pSd, 464, 8) << 16) \ - + (SD_STAT(pSd, 472, 8) << 24) ) -/// Speed Class, value can be calculated by Pw/2 -#define SD_STAT_SPEED_CLASS(pSd) SD_STAT(pSd, 440, 8) -#define SD_STAT_SPEED_CLASS_0 0 -#define SD_STAT_SPEED_CLASS_2 1 // >= 2MB/s -#define SD_STAT_SPEED_CLASS_4 2 // >= 4MB/s -#define SD_STAT_SPEED_CLASS_6 3 // >= 6MB/s -/// 8-bit, by 1MB/s step. -#define SD_STAT_PERFORMANCE_MOVE(pSd) SD_STAT(pSd, 432, 8) -/// AU Size, in power of 2 from 16KB -#define SD_STAT_AU_SIZE(pSd) SD_STAT(pSd, 428, 4) -#define SD_STAT_AU_SIZE_16K 1 -#define SD_STAT_AU_SIZE_32K 2 -#define SD_STAT_AU_SIZE_64K 3 -#define SD_STAT_AU_SIZE_128K 4 -#define SD_STAT_AU_SIZE_256K 5 -#define SD_STAT_AU_SIZE_512K 6 -#define SD_STAT_AU_SIZE_1M 7 -#define SD_STAT_AU_SIZE_2M 8 -#define SD_STAT_AU_SIZE_4M 9 -/// 16-bit, number of AUs erased. -#define SD_STAT_ERASE_SIZE(pSd) (SD_STAT(pSd, 408, 8) \ - + (SD_STAT(pSd, 416, 8) << 8) ) -#define SD_STAT_ERASE_TIMEOUT(pSd) SD_STAT(pSd, 402, 6) -#define SD_STAT_ERASE_OFFSET(pSd) SD_STAT(pSd, 400, 2) - -// SD Switch Status access macros (512 bits, 16 * 32 bits, 64 * 8 bits). -#define SD_SW_STAT(p, bitfield, bits) \ - ( ((char*)(p))[63 - ((bitfield)/8)] >> ((bitfield)%8) \ - & ((1 << (bits)) - 1) \ - ) -#define SD_SW_STAT_MAX_CURRENT_CONSUMPTION(p) ( SD_SW_STAT(p, 496, 8) \ - + (SD_SW_STAT(p, 504, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP6_INFO(p) ( SD_SW_STAT(p, 480, 8) \ - + (SD_SW_STAT(p, 488, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP5_INFO(p) ( SD_SW_STAT(p, 464, 8) \ - + (SD_SW_STAT(p, 472, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP4_INFO(p) ( SD_SW_STAT(p, 448, 8) \ - + (SD_SW_STAT(p, 456, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP3_INFO(p) ( SD_SW_STAT(p, 432, 8) \ - + (SD_SW_STAT(p, 440, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP2_INFO(p) ( SD_SW_STAT(p, 416, 8) \ - + (SD_SW_STAT(p, 424, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP1_INFO(p) ( SD_SW_STAT(p, 400, 8) \ - + (SD_SW_STAT(p, 408, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP6_RC(p) SD_SW_STAT(p, 396, 4) -#define SD_SW_STAT_FUN_GRP5_RC(p) SD_SW_STAT(p, 392, 4) -#define SD_SW_STAT_FUN_GRP4_RC(p) SD_SW_STAT(p, 388, 4) -#define SD_SW_STAT_FUN_GRP3_RC(p) SD_SW_STAT(p, 384, 4) -#define SD_SW_STAT_FUN_GRP2_RC(p) SD_SW_STAT(p, 380, 4) -#define SD_SW_STAT_FUN_GRP1_RC(p) SD_SW_STAT(p, 376, 4) -#define SD_SW_STAT_FUN_GRP_RC_ERROR 0xF -#define SD_SW_STAT_DATA_STRUCT_VER(p) SD_SW_STAT(p, 368, 8) -#define SD_SW_STAT_FUN_GRP6_BUSY(p) ( SD_SW_STAT(p, 352, 8) \ - + (SD_SW_STAT(p, 360, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP5_BUSY(p) ( SD_SW_STAT(p, 336, 8) \ - + (SD_SW_STAT(p, 344, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP4_BUSY(p) ( SD_SW_STAT(p, 320, 8) \ - + (SD_SW_STAT(p, 328, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP3_BUSY(p) ( SD_SW_STAT(p, 304, 8) \ - + (SD_SW_STAT(p, 312, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP2_BUSY(p) ( SD_SW_STAT(p, 288, 8) \ - + (SD_SW_STAT(p, 296, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP1_BUSY(p) ( SD_SW_STAT(p, 272, 8) \ - + (SD_SW_STAT(p, 280, 8) << 8) ) -#define SD_SW_STAT_FUN_GRP_FUN_BUSY(funNdx) (1 << (funNdx)) - -// EXT_CSD register definition. -#define SD_EXTCSD_S_CMD_SET_INDEX 504 // Below belongs to Properties Segment -#define SD_EXTCSD_BOOT_INFO_INDEX 228 -#define SD_EXTCSD_BOOT_SIZE_MULTI_INDEX 226 -#define SD_EXTCSD_ACC_SIZE_INDEX 225 -#define SD_EXTCSD_HC_ERASE_GRP_SIZE_INDEX 224 -#define SD_EXTCSD_ERASE_TIMEOUT_MULT_INDEX 223 -#define SD_EXTCSD_REL_WR_SEC_C_INDEX 222 -#define SD_EXTCSD_HC_WP_GRP_SIZE_INDEX 221 -#define SD_EXTCSD_S_C_VCC_INDEX 220 -#define SD_EXTCSD_S_C_VCCQ_INDEX 219 -#define SD_EXTCSD_S_A_TIMEOUT_INDEX 217 -#define SD_EXTCSD_SEC_COUNT_INDEX 212 -#define SD_EXTCSD_MIN_PERF_W_8_52_INDEX 210 -#define SD_EXTCSD_MIN_PERF_R_8_52_INDEX 209 -#define SD_EXTCSD_MIN_PERF_W_8_26_4_52_INDEX 208 -#define SD_EXTCSD_MIN_PERF_R_8_26_4_52_INDEX 207 -#define SD_EXTCSD_MIN_PERF_W_4_26_INDEX 206 -#define SD_EXTCSD_MIN_PERF_R_4_26_INDEX 205 -#define SD_EXTCSD_PWR_CL_26_360_INDEX 203 -#define SD_EXTCSD_PWR_CL_52_360_INDEX 202 -#define SD_EXTCSD_PWR_CL_26_195_INDEX 201 -#define SD_EXTCSD_PWR_CL_52_195_INDEX 200 -#define SD_EXTCSD_CARD_TYPE_INDEX 196 -#define SD_EXTCSD_CSD_STRUCTURE_INDEX 194 -#define SD_EXTCSD_EXT_CSD_REV_INDEX 192 - -#define SD_EXTCSD_CMD_SET_INDEX 191 //Below belongs to Mode Segment -#define SD_EXTCSD_CMD_SET_REV_INDEX 189 -#define SD_EXTCSD_POWER_CLASS_INDEX 187 -#define SD_EXTCSD_HS_TIMING_INDEX 185 -#define SD_EXTCSD_BUS_WIDTH_INDEX 183 -#define SD_EXTCSD_ERASED_MEM_CONT_INDEX 181 -#define SD_EXTCSD_BOOT_CONFIG_INDEX 179 -#define SD_EXTCSD_BOOT_BUS_WIDTH_INDEX 177 -#define SD_EXTCSD_ERASE_GROUP_DEF_INDEX 175 - -// Ext_CSD register access marco -#define MMC_EXTCSD_U8(pSd, bytefield) \ - ( ((uint8_t*)((pSd)->extData))[(bytefield)] ) -#define MMC_EXTCSD_U16(pSd, bytefield) \ - ( (((uint8_t*)((pSd)->extData))[(bytefield) ] << 0) + \ - (((uint8_t*)((pSd)->extData))[(bytefield) + 1] << 8) ) -#define MMC_EXTCSD_U32(pSd, bytefield) \ - ( (((uint8_t*)((pSd)->extData))[(bytefield) ] << 0) + \ - (((uint8_t*)((pSd)->extData))[(bytefield) + 1] << 8) + \ - (((uint8_t*)((pSd)->extData))[(bytefield) + 2] << 16) + \ - (((uint8_t*)((pSd)->extData))[(bytefield) + 24] << 24) ) -#define MMC_EXTCSD(pSd) ((uint8_t*)((pSd)->extData)) -#define SD_EXTCSD_S_CMD_SET(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_S_CMD_SET_INDEX]) // Supported Command Sets -#define SD_EXTCSD_BOOT_INFO(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_BOOT_INFO_INDEX]) // Boot information -#define SD_EXTCSD_BOOT_SIZE_MULTI(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_BOOT_SIZE_MULTI_INDEX]) // Boot partition size -#define SD_EXTCSD_ACC_SIZE(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_ACC_SIZE_INDEX]) // Access size -#define SD_EXTCSD_HC_ERASE_GRP_SIZE(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_HC_ERASE_GRP_SIZE_INDEX]) // High-capacity erase unit size -#define SD_EXTCSD_ERASE_TIMEOUT_MULT(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_ERASE_TIMEOUT_MULT_INDEX]) // High-capacity erase timeout -#define SD_EXTCSD_REL_WR_SEC_C(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_REL_WR_SEC_C_INDEX]) // Reliable write sector count -#define SD_EXTCSD_HC_WP_GRP_SIZE(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_HC_WP_GRP_SIZE_INDEX]) // High-capacity write protect group size -#define SD_EXTCSD_S_C_VCC(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_S_C_VCC_INDEX]) // Sleep current(VCC) -#define SD_EXTCSD_S_C_VCCQ(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_S_C_VCCQ_INDEX]) // Sleep current(VCCQ) -#define SD_EXTCSD_S_A_TIMEOUT(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_S_A_TIMEOUT_INDEX]) // Sleep/awake timeout -#define SD_EXTCSD_SEC_COUNT(pSd) ((MMC_EXTCSD(pSd)[SD_EXTCSD_SEC_COUNT_INDEX]) + \ - (MMC_EXTCSD(pSd)[SD_EXTCSD_SEC_COUNT_INDEX+1] << 8 ) + \ - (MMC_EXTCSD(pSd)[SD_EXTCSD_SEC_COUNT_INDEX+2] << 16 ) + \ - (MMC_EXTCSD(pSd)[SD_EXTCSD_SEC_COUNT_INDEX+3] << 24 )) //Sector Count -#define SD_EXTCSD_MIN_PERF_W_8_52(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_MIN_PERF_W_8_52_INDEX]) // Minimum Write Performance for 8bit at 52MHz -#define SD_EXTCSD_MIN_PERF_R_8_52(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_MIN_PERF_R_8_52_INDEX]) // Minimum Read Performance for 8bit at 52MHz -#define SD_EXTCSD_MIN_PERF_W_8_26_4_52(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_MIN_PERF_W_8_26_4_52_INDEX]) // Minimum Write Performance for 8bit at 26MHz, for 4bit at 52MHz -#define SD_EXTCSD_MIN_PERF_R_8_26_4_52(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_MIN_PERF_R_8_26_4_52_INDEX]) // Minimum Read Performance for 8bit at 26MHz, for 4bit at 52MHz -#define SD_EXTCSD_MIN_PERF_W_4_26(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_MIN_PERF_W_4_26_INDEX]) // Minimum Write Performance for 4bit at 26MHz -#define SD_EXTCSD_MIN_PERF_R_4_26(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_MIN_PERF_R_4_26_INDEX]) // Minimum Read Performance for 4bit at 26MHz -#define SD_EXTCSD_PWR_CL_26_360(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_PWR_CL_26_360_INDEX]) // Power class for 26MHz at 3.6v -#define SD_EXTCSD_PWR_CL_52_360(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_PWR_CL_52_360_INDEX]) // Power class for 52MHz at 3.6v -#define SD_EXTCSD_PWR_CL_26_195(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_PWR_CL_26_195_INDEX]) // Power class for 26MHz at 1.95v -#define SD_EXTCSD_PWR_CL_52_195(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_PWR_CL_52_195_INDEX]) // Power class for 52MHz at 1.95v -#define SD_EXTCSD_CARD_TYPE(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_CARD_TYPE_INDEX]) // Card type -#define SD_EXTCSD_CSD_STRUCTURE(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_CSD_STRUCTURE_INDEX]) // CSD structure version -#define SD_EXTCSD_EXT_CSD_REV(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_EXT_CSD_REV_INDEX]) // Extended CSD structure version -#define SD_EXTCSD_CMD_SET(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_CMD_SET_INDEX]) // Command set -#define SD_EXTCSD_CMD_SET_REV(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_CMD_SET_REV_INDEX]) // Command set revision -#define SD_EXTCSD_POWER_CLASS(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_POWER_CLASS_INDEX]) // Power class -#define SD_EXTCSD_HS_TIMING(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_HS_TIMING_INDEX]) // High-speed interface timing -#define SD_EXTCSD_BUS_WIDTH(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_BUS_WIDTH_INDEX]) // Bus width mode -#define SD_EXTCSD_ERASED_MEM_CONT(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_ERASED_MEM_CONT_INDEX]) // Erased memory content -#define SD_EXTCSD_BOOT_CONFIG(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_BOOT_CONFIG_INDEX]) // Boot configuration -#define SD_EXTCSD_BOOT_BUS_WIDTH(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_BOOT_BUS_WIDTH_INDEX]) // Boot bus width -#define SD_EXTCSD_ERASE_GROUP_DEF(pSd) (MMC_EXTCSD(pSd)[SD_EXTCSD_ERASE_GROUP_DEF_INDEX]) // High-density erase group definition - -// EXTCSD total size and block number -#define SD_EXTCSD_TOTAL_SIZE(pSd) (SD_EXTCSD_SEC_COUNT(pSd)*512) -#define SD_EXTCSD_BLOCKNR(pSd) (SD_EXTCSD_SEC_COUNT(pSd)) - -// Bus width Byte -#define SD_EXTCSD_BUS_WIDTH_1BIT (0x0UL) -#define SD_EXTCSD_BUS_WIDTH_4BIT (0x1UL) -#define SD_EXTCSD_BUS_WIDTH_8BIT (0x2UL) - -// High speed mode -#define SD_EXTCSD_HS_TIMING_ENABLE (0x1UL) -#define SD_EXTCSD_HS_TIMING_DISABLE (0x0UL) - -// Boot config -#define SD_EXTCSD_BOOT_PARTITION_ACCESS (0x7UL) // boot partition access -#define SD_EXTCSD_BOOT_PART_NO_ACCESS (0x0UL) -#define SD_EXTCSD_BOOT_PART_RW_PART1 (0x1UL) -#define SD_EXTCSD_BOOT_PART_RW_PART2 (0x2UL) -#define SD_EXTCSD_BOOT_PARTITION_ENABLE (0x7UL << 3) // boot partition enable -#define SD_EXTCSD_BOOT_PART_DISABLE (0x0UL << 3) -#define SD_EXTCSD_BOOT_PART_ENABLE_PART1 (0x1UL << 3) -#define SD_EXTCSD_BOOT_PART_ENABLE_PART2 (0x2UL << 3) -#define SD_EXTCSD_BOOT_PART_ENABLE_USER (0x7UL << 3) -#define SD_EXTCSD_BOOT_PARTITION_ACK (0x1UL << 7) // boot acknowledge -#define SD_EXTCSD_BOOT_PART_NOACK (0x0UL << 7) -#define SD_EXTCSD_BOOT_PART_ACK (0x1UL << 7) - -// Boot bus width -#define SD_EXTCSD_BOOT_BUS_WIDTH_BIT (0x3UL) // boot bus width -#define SD_EXTCSD_BOOT_BUS_1BIT (0x0UL) -#define SD_EXTCSD_BOOT_BUS_4BIT (0x1UL) -#define SD_EXTCSD_BOOT_BUS_8BIT (0x2UL) -#define SD_EXTCSD_RESET_BOOT_BUS_WIDTH_BIT (0x1UL << 2) // boot bus width -#define SD_EXTCSD_RESET_BOOT_BUS (0x0UL << 2) -#define SD_EXTCSD_RETAIN_BOOT_BUS (0x1UL << 2) - -// Mode Switch Arguments for CMD6 -#define MMC_CMD6_ARG_ACCESS -#define MMC_CMD6_ARG_INDEX -#define MMC_CMD6_ARG_VALUE -#define MMC_CMD6_ARG_CMDSET - -/* Response Status Code Bits */ -#define SDMMC_SC_OUT_OF_RANGE (1UL << 31) /**< address out of the allowed range */ -#define SDMMC_SC_ADDR_ERROR (1UL << 30) /**< address misaligned to the card physical blocks */ -#define SDMMC_SC_BLOCK_LEN_ERROR (1UL << 29) /**< argument of SET_BLOCKLEN or defined block length illegal */ -#define SDMMC_SC_ERASE_SEQ_ERROR (1UL << 28) /**< error in the sequence of erase commands */ -#define SDMMC_SC_ERASE_PARAM (1UL << 27) /**< invalid selection of erase groups */ -#define SDMMC_SC_WP_VIOLATION (1UL << 26) /**< program a write protected block */ -#define SDMMC_SC_CARD_IS_LOCKED (1UL << 25) /**< card is locked by host */ -#define SDMMC_SC_LOCK_UNLOCK_FAILED (1UL << 24) /**< sequence or password error in lock/unlock command */ -#define SDMMC_SC_COM_CRC_ERROR (1UL << 23) /**< Command CRC error */ -#define SDMMC_SC_ILLEGAL_COMMAND (1UL << 22) /**< Not legal for the card state */ -#define SDMMC_SC_ECC_FAILED (1UL << 21) /**< Card internal ECC failed */ -#define SDMMC_SC_CC_ERROR (1UL << 20) /**< Internal card controller error */ -#define SDMMC_SC_ERROR (1UL << 19) /**< General error */ -#define SDMMC_SC_UNDERRUN (1UL << 18) /**< Could not sustain data transfer in stream read mode */ -#define SDMMC_SC_OVERRUN (1UL << 17) /**< Could not sustain data programming in stream write mode */ -#define SDMMC_SC_CIDCSD_OVERWRITE (1UL << 16) /**< CID, RO section of CSD can not be overwritten */ -#define SDMMC_SC_WP_ERASE_SKIP (1UL << 15) /**< Only partial address erased due to write protection */ -#define SDMMC_SC_ECC_DISABLED (1UL << 14) /**< Command executed without internal ECC */ -#define SDMMC_SC_ERASE_RESET (1UL << 13) /**< An erase sequence was cleared before executing */ -#define SDMMC_SC_CURRENT_STATE (0xFUL << 9)/**< Card state */ -#define SDMMC_SC_IDLE 0UL -#define SDMMC_SC_STATE_IDLE (0UL << 9) -#define SDMMC_SC_READY 1UL -#define SDMMC_SC_STATE_READY (1UL << 9) -#define SDMMC_SC_IDENT 2UL -#define SDMMC_SC_STATE_IDENT (2UL << 9) -#define SDMMC_SC_STBY 3UL -#define SDMMC_SC_STATE_STBY (3UL << 9) -#define SDMMC_SC_TRAN 4UL -#define SDMMC_SC_STATE_TRAN (4UL << 9) -#define SDMMC_SC_DATA 5UL -#define SDMMC_SC_STATE_DATA (5UL << 9) -#define SDMMC_SC_RCV 6UL -#define SDMMC_SC_STATE_RCV (6UL << 9) -#define SDMMC_SC_PRG 7UL -#define SDMMC_SC_STATE_PRG (7UL << 9) -#define SDMMC_SC_DIS 8UL -#define SDMMC_SC_STATE_DIS (8UL << 9) -#define SDMMC_SC_BTST 9 -#define SDMMC_SC_STATE_BTST (9UL << 9) -#define SDMMC_SC_SLP 10 -#define SDMMC_SC_STATE_SLP (10UL << 9) -#define SDMMC_SC_READY_FOR_DATA (1UL << 8) /**< buffer empty signalling */ -#define SDMMC_SC_SWITCH_ERROR (1UL << 7) /**< did not switch to expected mode */ -#define SDMMC_SC_APP_CMD (1UL << 5) /**< Expect ACMD or command is interpreted as ACMD */ -#define SDMMC_SC_AKE_SEQ_ERROR (1UL << 3) /**< Error in the sequence of the authentication process */ - -//------------------------------------------------------------------------------ -// Types -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -extern uint8_t SD_Init(SdCard *pSd, - void *pSdDriver); - -extern uint8_t SD_GetCardType(SdCard * pSd); - -extern uint32_t SD_GetNumberBlocks(SdCard * pSd); - -extern uint32_t SD_GetBlockSize(SdCard * pSd); - -extern uint32_t SD_GetTotalSizeKB(SdCard * pSd); - -extern uint8_t SD_Read(SdCard *pSd, - uint32_t address, - void *pData, - uint16_t length, - SdmmcCallback pCallback, - void *pArgs); - -extern uint8_t SD_Write(SdCard *pSd, - uint32_t address, - void *pData, - uint16_t length, - SdmmcCallback pCallback, - void *pArgs); - -extern uint8_t SD_ReadBlock( - SdCard *pSd, - uint32_t address, - uint8_t *pData); - -extern uint8_t SD_WriteBlock( - SdCard *pSd, - uint32_t address, - uint8_t *pData); - -extern uint8_t SD_ReadBlocks( - SdCard *pSd, - uint32_t address, - uint16_t nbBlocks, - uint8_t *pData); - -extern uint8_t SD_WriteBlocks( - SdCard *pSd, - uint32_t address, - uint16_t nbBlocks, - uint8_t *pData); - -extern uint8_t SDIO_ReadDirect( - SdCard * pSd, - uint8_t functionNum, - uint32_t address, - uint8_t * pData, - uint32_t size); - -extern uint8_t SDIO_WriteDirect( - SdCard * pSd, - uint8_t functionNum, - uint32_t address, - uint8_t dataByte); - -extern uint8_t SDIO_ReadBytes( - SdCard * pSd, - uint8_t functionNum, - uint32_t address, - uint8_t isFixedAddress, - uint8_t * pData, - uint16_t size, - SdmmcCallback fCallback, - void * pArg); - -extern uint8_t SDIO_WriteBytes( - SdCard * pSd, - uint8_t functionNum, - uint32_t address, - uint8_t isFixedAddress, - uint8_t * pData, - uint16_t size, - SdmmcCallback fCallback, - void * pArg); - -extern void SDIO_DisplayCardInformation(SdCard *pSd); - -extern void SD_DisplayRegisterCID(SdCard *pSd); - -extern void SD_DisplayRegisterCSD(SdCard *pSd); - -extern void SD_DisplayRegisterECSD(SdCard * pSd); - -extern void SD_DisplayRegisterSCR(SdCard * pSd); - -extern void SD_DisplaySdStatus(SdCard * pSd); - -#ifdef __cplusplus -} -#endif - -/** @}*/ -/** @}*/ -#endif //#ifndef SDMMC_H - diff --git a/src/ersky9x/libraries/memories/sdmmc_cmd.h b/src/ersky9x/libraries/memories/sdmmc_cmd.h deleted file mode 100644 index 4c812af07..000000000 --- a/src/ersky9x/libraries/memories/sdmmc_cmd.h +++ /dev/null @@ -1,686 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file */ - -/** - * \page sdmmc_cmd SD/MMC Low Level Commands - * - * \section Purpose - * - * Implementation for SD/MMC low level driver. Supply a set of SD/MMC mode's - * interface. - * - * \section sdmmc_prop_setup SD/MMC HW property and setup functions - * - * - SdmmcGetProperty() - * - SdmmcSetBusWidth() - * - SdmmcEnableHsMode() - * - SdmmcSetSpeed() - * - * \section sdmmc_cmd_fun SD/MMC command functions - * - * - Functions for both SD/MMC - * - SdmmcPowerOn() : Perform SD/MMC power on initialization sequence. - * - SdmmcCmd0() : Resets all cards to idle state - * - SdmmcCmd2() : Asks any card to send the CID numbers on the CMD line - * - SdmmcCmd7() : Command toggles a card between the stand-by and transfer - * states or between - * - SdmmcCmd9() : Addressed card sends its card-specific data (CSD) on the CMD - * line - * - SdmmcCmd12() : Forces the card to stop transmission - * - SdmmcCmd13() : Addressed card sends its status register - * - SdmmcCmd16() : Set block length - * - SdmmcCmd17() : Read single block - * - SdmmcCmd18() : Read multiple blocks - * - SdmmcCmd24() : Write single block - * - SdmmcCmd25() : Write multiple blocks - * - SdmmcCmd55() : App command, should be sent before application specific - * command - * - SdmmcRead() : Write data without any command - * (usually follow SdmmcCmd18()). - * - SdmmcWrite() : Write data without any command - * (usually follow SdmmcCmd25()). - * - Functions for SD card. - * - SdCmd3() : Ask the card to publish a new relative address - * - SdCmd6() : SD Switch command. - * - SdCmd8() : Sends SD Memory Card interface condition, which includes host supply voltage - * information and asks the card whether card supports voltage - * - SdAcmd6() : Defines the data bus width - * - SdAcmd41() : Asks to all cards to send their operations conditions. - * - SdAcmd51() : Sends SD Card Configuration Register (SCR). - * - Functions for MMC card - * - MmcCmd1() : MMC send operation condition command. - * - MmcCmd3() : Set a new relative address to MMC card. - * - MmcCmd6() : MMC Switch. - * - MmcCmd8() : Sends MMC EXT_CSD. - */ - -#ifndef SDMMC_CMD_H -#define SDMMC_CMD_H - -#include "hsmci/hsmci.h" - -/** \addtogroup sdmmc_hal - *@{ - */ - -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/** \addtogroup sdmmc_cardtype SD/MMC Card Types - * Here lists the SD/MMC card types. - * - Card Type Category Bitmap - * - \ref CARD_TYPE_bmHC - * - \ref CARD_TYPE_bmSDMMC - * - \ref CARD_TYPE_bmUNKNOWN - * - \ref CARD_TYPE_bmSD - * - \ref CARD_TYPE_bmMMC - * - \ref CARD_TYPE_bmSDIO - * - Card Types - * - \ref CARD_UNKNOWN - * - \ref CARD_SD - * - \ref CARD_SDHC - * - \ref CARD_MMC - * - \ref CARD_MMCHD - * - \ref CARD_SDIO - * - \ref CARD_SDCOMBO - * - \ref CARD_SDHCCOMBO - * @{*/ -#define CARD_TYPE_bmHC (1 << 0) /**< Bit for High-Capacity(Density) */ -#define CARD_TYPE_bmSDMMC (0x3 << 1) /**< Bits mask for SD/MMC */ -#define CARD_TYPE_bmUNKNOWN (0x0 << 1) /**< Bits for Unknown card */ -#define CARD_TYPE_bmSD (0x1 << 1) /**< Bits for SD */ -#define CARD_TYPE_bmMMC (0x2 << 1) /**< Bits for MMC */ -#define CARD_TYPE_bmSDIO (1 << 3) /**< Bit for SDIO */ -/** Card can not be identified */ -#define CARD_UNKNOWN (0) -/** SD Card (0x2) */ -#define CARD_SD (CARD_TYPE_bmSD) -/** SD High Capacity Card (0x3) */ -#define CARD_SDHC (CARD_TYPE_bmSD|CARD_TYPE_bmHC) -/** MMC Card (0x4) */ -#define CARD_MMC (CARD_TYPE_bmMMC) -/** MMC High-Density Card (0x5) */ -#define CARD_MMCHD (CARD_TYPE_bmMMC|CARD_TYPE_bmHC) -/** SDIO only card (0x8) */ -#define CARD_SDIO (CARD_TYPE_bmSDIO) -/** SDIO Combo, with SD embedded (0xA) */ -#define CARD_SDCOMBO (CARD_TYPE_bmSDIO|CARD_SD) -/** SDIO Combo, with SDHC embedded (0xB) */ -#define CARD_SDHCCOMBO (CARD_TYPE_bmSDIO|CARD_SDHC) -/** @}*/ - -/** \addtogroup sdmmc_rc SD/MMC Return Codes - * Here lists the SD/MMC driver return codes. - * - \ref SDMMC_ERROR - * - \ref SDMMC_ERROR_NORESPONSE - * - \ref SDMMC_ERROR_NOT_INITIALIZED - * - \ref SDMMC_ERROR_BUSY - * - \ref SDMMC_ERROR_PARAM - * - \ref SDMMC_ERROR_NOT_SUPPORT - * - \ref SDMMC_OK - * - \ref SDMMC_ERROR_LOCKED - * @{*/ -/** No error */ -#define SDMMC_OK 0 -/** The driver is locked. */ -#define SDMMC_ERROR_LOCKED 1 -/** There was an error with the SD driver. */ -#define SDMMC_ERROR 2 -/** The SD card did not answer the command. */ -#define SDMMC_ERROR_NORESPONSE 3 -/** The SD card is not initialized. */ -#define SDMMC_ERROR_NOT_INITIALIZED 4 -/** The SD card is busy. */ -#define SDMMC_ERROR_BUSY 5 -/** The input parameter error */ -#define SDMMC_ERROR_PARAM 6 -/** The operation is not supported. */ -#define SDMMC_ERROR_NOT_SUPPORT 0xFE -/** @}*/ - -/** \addtogroup sdmmc_busmode SD/MMC Bus Modes - * Here lists the SD/MMC driver bus modes. - * - \ref SDMMC_BUS_1_BIT - * - \ref SDMMC_BUS_4_BIT - * - \ref SDMMC_BUS_8_BIT - * @{*/ -/** Support 1-bit bus mode */ -#define SDMMC_BUS_1_BIT 0x0UL -/** Support 4-bit bus mode */ -#define SDMMC_BUS_4_BIT 0x1UL -/** Support 8-bit bus mode */ -#define SDMMC_BUS_8_BIT 0x2UL -/** @}*/ - -/** SD/MMC card block size in bytes. */ -#define SDMMC_BLOCK_SIZE 512 -/** SD/MMC card block size binary shift value. */ -#define SDMMC_BLOCK_SIZE_SHIFT 9 - -/** SD/MMC command status: ready */ -#define SDMMC_CMD_READY 0 -/** SD/MMC command status: waiting command end */ -#define SDMMC_CMD_PENDING 1 -/** SD/MMC command status: error */ -#define SDMMC_CMD_ERROR 2 - -/** \addtogroup sdmmc_properties SD/MMC Property Codes - * Here lists the property codes for SD/MMC low level driver to report to lib. - * - \ref SDMMC_PROP_BUS_MODE - * - \ref SDMMC_PROP_HS_MODE - * - \ref SDMMC_PROP_BOOT_MODE - * @{*/ -/** SD/MMC Low Level Property: Bus mode */ -#define SDMMC_PROP_BUS_MODE 0 -/** SD/MMC Low Level Property: High-speed mode */ -#define SDMMC_PROP_HS_MODE 1 -/** SD/MMC Low Level Property: Boot mode */ -#define SDMMC_PROP_BOOT_MODE 2 -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** SD/MMC end-of-transfer callback function. */ -typedef void (*SdmmcCallback)(uint8_t status, void *pArg); - -/** - * SD/MMC enumeration data buffers. - */ -typedef struct _SdEnumData { - uint32_t cid[4]; /**< Card IDentification register */ - uint32_t csd[4]; /**< Card-Specific Data register */ - /** SD SCR (64 bit) + status (512 bit) or - MMC EXT_CSD(512 bytes) register */ - uint32_t extData[512 / 4]; -} SdEnumData; - -/** - * SD SPI mode extended functions. - */ -typedef struct _SdSpiFunctions { - void *fCmd58; /**< SD SPI Read OCR */ - void *fCmd59; /**< SD SPI CRC on/off control */ - void *fStopToken; /**< SD SPI Stop token */ - void *fDecodeResp; /**< SD SPI response decoding */ -} SdSpiFunctions; - -/** - * Sdmmc command operation settings. - */ -typedef union _SdmmcCmdOperation { - uint8_t bVal; - struct { - uint8_t powerON:1, /**< Do power on initialize */ - sendCmd:1, /**< Send SD/MMC command */ - xfrData:2, /**< Send/Stop data transfer */ - respType:3,/**< Response type */ - crcON:1; /**< CRC is used (SPI only) */ - } bmBits; -} SdmmcCmdOp; -#define SDMMC_CMD_bmPOWERON (0x1 ) -#define SDMMC_CMD_bmCOMMAND (0x1 << 1) -#define SDMMC_CMD_bmDATAMASK (0x3 << 2) -#define SDMMC_CMD_bmNODATA (0x0 << 2) -#define SDMMC_CMD_RX 0x1 -#define SDMMC_CMD_bmDATARX (0x1 << 2) -#define SDMMC_CMD_TX 0x2 -#define SDMMC_CMD_bmDATATX (0x2 << 2) -#define SDMMC_CMD_bmSTOPXFR (0x2 << 2) -#define SDMMC_CMD_bmRESPMASK (0x7 << 4) -#define SDMMC_CMD_bmCRC (0x1 << 7) -/* Do power on initialize */ -#define SDMMC_CMD_POWERONINIT (SDMMC_CMD_bmPOWERON) -/* Data only, read */ -#define SDMMC_CMD_DATARX (SDMMC_CMD_bmDATARX) -/* Data only, write */ -#define SDMMC_CMD_DATATX (SDMMC_CMD_bmDATATX) -/* Command without data */ -#define SDMMC_CMD_CNODATA(R) ( SDMMC_CMD_bmCOMMAND \ - |(((R)&0x7)<<4)) -/* Command with data, read */ -#define SDMMC_CMD_CDATARX(R) ( SDMMC_CMD_bmCOMMAND \ - | SDMMC_CMD_bmDATARX \ - | (((R)&0x7)<<4)) -/* Command with data, write */ -#define SDMMC_CMD_CDATATX(R) ( SDMMC_CMD_bmCOMMAND \ - | SDMMC_CMD_bmDATATX \ - | (((R)&0x7)<<4)) -/* Send Stop token for SPI */ -#define SDMMC_CMD_STOPTOKEN (SDMMC_CMD_bmSTOPXFR) - -/** - * Sdmmc command. - */ -typedef struct _SdmmcCommand { - /** Optional user-provided callback function. */ - SdmmcCallback callback; - /** Optional argument to the callback function. */ - void *pArg; - /** Data buffer, with MCI_DMA_ENABLE defined 1, the buffer can be - * 1, 2 or 4 bytes aligned. It has to be 4 byte aligned if no DMA. - */ - uint8_t *pData; - /** Size of data block in bytes. */ - uint16_t blockSize; - /** Number of blocks to be transfered */ - uint16_t nbBlock; - /** Response buffer. */ - uint32_t *pResp; - /** Command argument. */ - uint32_t arg; - /**< Command index */ - uint8_t cmd; - /**< Command operation settings */ - SdmmcCmdOp cmdOp; - /**< Command return status */ - uint8_t status; - /**< Command state */ - volatile uint8_t state; -} SdmmcCommand; - -/** - * \typedef SdCard - * Sdcard driver structure. It holds the current command being processed and - * the SD card address. - */ -typedef struct _SdCard -{ - /** Pointer to the underlying HW driver. */ - void *pSdDriver; - /** Pointer to the extension data for SPI mode */ - void *pSpiExt; - - /** Card IDentification (CID register) */ - uint32_t cid[4]; - /** Card-specific data (CSD register) */ - uint32_t csd[4]; - /** SD SCR(64 bit), Status(512 bit) or - MMC EXT_CSD(512 bytes) register */ - uint32_t extData[512 / 4]; - - /** Card TRANS_SPEED: Max supported transfer speed */ - uint32_t transSpeed; - - /** Card total size */ - uint32_t totalSize; - /** Card total number of blocks */ - uint32_t blockNr; - - /** Card option command support list */ - uint32_t optCmdBitMap; - /** Previous access block number for memory. */ - uint32_t preBlock; - /** Previous access block number for SDIO. */ - uint32_t preSdioBlock; - - /** SD card current access speed. */ - uint32_t accSpeed; - /** SD card current access address. */ - uint16_t cardAddress; - /** Card type */ - uint8_t cardType; - /** Card access bus mode */ - uint8_t busMode; - /** Card access slot */ - uint8_t cardSlot; - /** Card State */ - uint8_t state; -} SdCard; - - -/** \addtogroup sdmmc_struct_cmdarg SD/MMC command arguments - * Here lists the command arguments for SD/MMC. - * - CMD6 Argument - * - \ref _MmcCmd6Arg "MMC CMD6" - * - \ref _SdCmd6Arg "SD CMD6" - * - \ref _SdioCmd52Arg CMD52 - * - \ref _SdioCmd53Arg CMD53 - * @{*/ -/** - * \typedef MmcCmd6Arg - * Argument for MMC CMD6 - */ -typedef struct _MmcCmd6Arg -{ - uint8_t access; - uint8_t index; - uint8_t value; - uint8_t cmdSet; -} MmcCmd6Arg, MmcSwitchArg; - -/** - * \typedef SdCmd6Arg - * Argument for SD CMD6 - */ -typedef struct _SdCmd6Arg -{ - uint32_t accessMode:4, /**< [ 3: 0] function group 1, access mode */ - command:4, /**< [ 7: 4] function group 2, command system */ - reserveFG3:4, /**< [11: 8] function group 3, 0xF or 0x0 */ - reserveFG4:4, /**< [15:12] function group 4, 0xF or 0x0 */ - reserveFG5:4, /**< [19:16] function group 5, 0xF or 0x0 */ - reserveFG6:4, /**< [23:20] function group 6, 0xF or 0x0 */ - reserved:7, /**< [30:24] reserved 0 */ - mode:1; /**< [31 ] Mode, 0: Check, 1: Switch */ -} SdCmd6Arg, SdSwitchArg; - -/** - * \typedef SdioCmd52Arg - * Argument for SDIO CMD52 - */ -typedef struct _SdioCmd52Arg -{ - uint32_t data:8, /**< [ 7: 0] data for writing */ - stuff0:1, /**< [ 8] reserved */ - regAddress:17, /**< [25: 9] register address */ - stuff1:1, /**< [ 26] reserved */ - rawFlag:1, /**< [ 27] Read after Write flag */ - functionNum:3, /**< [30:28] Number of the function */ - rwFlag:1; /**< [ 31] Direction, 1:write, 0:read. */ -} SdioCmd52Arg, SdioRwDirectArg; -/** - * \typedef SdioCmd53Arg - * Argument for SDIO CMD53 - */ -typedef struct _SdioCmd53Arg { - uint32_t count:9, /**< [ 8: 0] Byte mode: number of bytes to transfer, - 0 cause 512 bytes transfer. - Block mode: number of blocks to transfer, - 0 set count to infinite. */ - regAddress:17, /**< [25: 9] Start Address I/O register */ - opCode:1, /**< [ 26] 1:Incrementing address, 0: fixed */ - blockMode:1, /**< [ 27] (Optional) 1:block mode */ - functionNum:3, /**< [30:28] Number of the function */ - rwFlag:1; /**< [ 31] Direction, 1:WR, 0:RD */ -} SdioCmd53Arg, SdioRwExtArg; -/** @}*/ - - -/** \addtogroup sdmmc_resp_struct SD/MMC Responses Structs - * Here lists the command responses for SD/MMC. - * - \ref _SdmmcR1 "R1" - * - \ref _SdmmcR3 "R3" - * - \ref _MmcR4 "MMC R4", \ref _SdioR4 "SDIO R4" - * - \ref _SdmmcR5 "R5" - * - \ref _SdR6 "R6" - * - \ref _SdR7 "R7" - * @{*/ -/** - * Response R1 (normal response command) - */ -typedef struct _SdmmcR1 -{ - uint32_t cardStatus; /**< [32: 0] Response card status flags */ -} SdmmcR1, SdmmcR1b; - -/** - * Response R3 (OCR) - */ -typedef struct _SdmmcR3 -{ - uint32_t OCR; /**< [32: 0] OCR register */ -} SdmmcR3; - -/** - * Response R4 (MMC Fast I/O CMD39) - */ -typedef struct _MmcR4 -{ - uint32_t regData:8, /**< [ 7: 0] Read register contents */ - regAddr:7, /**< [14: 8] Register address */ - status:1, /**< [ 15] Status */ - RCA:16; /**< [31:16] RCA */ -} MmcR4; - -/** - * Response R4 (SDIO), no CRC. - */ -typedef struct _SdioR4 -{ - uint32_t OCR:24, /**< [23: 0] Operation Conditions Register */ - reserved:3, /**< [26:24] Reserved */ - memoryPresent:1, /**< [ 27] MP Set to 1 if contains - SD memory */ - nbIoFunction:3, /**< [30:28] NF Total number of I/O functions - supported */ - C:1; /**< [ 31] IORDY Set to 1 if card is ready */ -} SdioR4; - -/** - * Response R5 (MMC Interrupt request CMD40 / SDIO CMD52) - */ -typedef struct _SdmmcR5 -{ - uint32_t data:8, /**< [ 7: 0] Response data */ - response:8, /**< [15: 8] Response status flags */ - RCA:16; /**< [31:16] (MMC) Winning card RCA */ -} SdmmcR5; - -/** - * Response R6 (SD RCA) - */ -typedef struct _SdR6 -{ - uint32_t status:16, /**< [15: 0] Response status */ - RCA:16; /**< [31:16] New published RCA */ -} SdR6; -/** - * Response R7 (Card interface condition) - */ -typedef struct _SdR7 { - uint32_t checkPatten:8, /**< [ 7: 0] Echo-back of check pattern */ - voltage:4, /**< [11: 8] Voltage accepted */ - reserved:20; /**< [31:12] reserved bits */ -} SdR7; - -/** @}*/ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern uint8_t MmcCmd1(SdCard * pSd,uint32_t * pOCR,SdmmcCallback fCallback); -extern uint8_t MmcCmd3(SdCard * pSd, uint16_t cardAddr,SdmmcCallback fCallback); -extern uint8_t MmcCmd6(SdCard * pSd, const void * pSwitchArg, uint32_t * pResp,SdmmcCallback fCallback); -extern uint8_t MmcCmd8(SdCard * pSd,uint8_t * pEXT,SdmmcCallback fCallback); -extern uint8_t SdAcmd13(SdCard * pSd,uint32_t * pSdSTAT,SdmmcCallback fCallback); -extern uint8_t SdAcmd41(SdCard * pSd,uint32_t * pIo,SdmmcCallback fCallback); -extern uint8_t SdAcmd51(SdCard * pSd,uint32_t * pSCR,SdmmcCallback fCallback); -extern uint8_t SdAcmd6(SdCard * pSd, uint32_t arg, uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdCmd3(SdCard * pSd,uint32_t * pRsp, SdmmcCallback fCallback); -extern uint8_t SdCmd6(SdCard * pSd, const void * pSwitchArg,uint32_t * pStatus,uint32_t * pResp, SdmmcCallback fCallback); -extern uint8_t SdCmd8(SdCard * pSd,uint8_t supplyVoltage,SdmmcCallback fCallback); -extern uint8_t SdioCmd5(SdCard * pSd, uint32_t * pIoData,SdmmcCallback fCallback); -extern uint8_t SdioCmd52(SdCard * pSd, uint32_t * pIoData,SdmmcCallback fCallback); -extern uint8_t SdioCmd53(SdCard * pSd, uint32_t * pArgResp,uint8_t * pData,uint32_t size, SdmmcCallback fCallback,void * pArg); -extern void Sdmmc_Handler(Mcid*pMci); -extern uint8_t Sdmmc_IsCommandComplete( Mcid *pMci ); -extern uint8_t Sdmmc_SendCommand(Mcid*pMci, MciCmd *pCommand); -extern uint8_t SdmmcCmd0(SdCard * pSd, uint32_t arg, SdmmcCallback fCallback); -extern uint8_t SdmmcCmd12(SdCard * pSd, uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd13(SdCard * pSd, uint16_t cardAddr, uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd16(SdCard * pSd, uint16_t blockLength,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd17(SdCard * pSd, uint16_t blockSize, uint8_t * pData, uint32_t address, - uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd18( SdCard * pSd, uint16_t blockSize,uint16_t nbBlocks,uint8_t * pData,uint32_t address, - uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd2(SdCard * pSd, uint32_t * pCID, SdmmcCallback fCallback); -extern uint8_t SdmmcCmd24(SdCard * pSd, uint16_t blockSize, uint8_t * pData, uint32_t address, - uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd25(SdCard * pSd, uint16_t blockSize,uint16_t nbBlock,uint8_t * pData,uint32_t address, - uint32_t * pStatus,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd55(SdCard * pSd, uint16_t cardAddr,SdmmcCallback fCallback); -extern uint8_t SdmmcCmd7(SdCard * pSd, uint16_t cardAddr, SdmmcCallback fCallback); -extern uint8_t SdmmcCmd9(SdCard * pSd, uint16_t cardAddr, uint32_t * pCSD,SdmmcCallback fCallback); -extern uint8_t SdmmcEnableHsMode(SdCard *pSd, uint8_t enable); -extern uint32_t SdmmcGetProperty(SdCard *pSd, uint32_t property, void * pExtData); -extern uint8_t SdmmcPowerOn(SdCard * pSd,SdmmcCallback fCallback); -extern uint8_t SdmmcRead(SdCard * pSd, uint16_t blockSize, uint16_t nbBlock, uint8_t * pData, SdmmcCallback fCallback,void * pArg); -extern uint32_t SdmmcSetBusWidth(SdCard * pSd, uint32_t busWidth); -extern uint8_t SdmmcSetSlot(SdCard * pSd, uint8_t slot); -extern uint32_t SdmmcSetSpeed(SdCard *pSd, uint32_t clock); -extern uint8_t SdmmcWrite(SdCard * pSd, uint16_t blockSize, uint16_t nbBlock, const uint8_t * pData, SdmmcCallback fCallback,void * pArg); - -// BSS added!!!! - - -//------------------------------------------------------------------------------ -// Constants -//------------------------------------------------------------------------------ - - -/// There was an error with the SD driver. -#define SD_ERROR_DRIVER 1 -/// The SD card did not answer the command. -#define SD_ERROR_NORESPONSE 2 -/// The SD card did not answer the command. -#define SD_ERROR_NOT_INITIALIZED 3 -/// The SD card is busy -#define SD_ERROR_BUSY 4 -/// The operation is not supported -#define SD_ERROR_NOT_SUPPORT 5 - -/// SD card block size in bytes. -#define SD_BLOCK_SIZE 512 -/// SD card block size binary shift value -#define SD_BLOCK_SIZE_BIT 9 - -//- MMC Card Command Types -/// Broadcast commands (bc), no response -#define MMC_CCT_BC 0 -/// Broadcase commands with response (bcr) -#define MMC_CCT_BCR 1 -/// Addressed commands (ac), no data transfer on DAT lines -#define MMC_CCT_AC 2 -/// Addressed data transfer commands (adtc), data transfer on DAT lines -#define MMC_CCT_ADTC 3 - -//- MMC Card Command Classes (CCC) -/// Class 0: basic -#define MMC_CCC_BASIC 0 -/// Class 1: stream read -#define MMC_CCC_STREAM_READ 1 -/// Class 2: block read -#define MMC_CCC_BLOCK_READ 2 -/// Class 3: stream write -#define MMC_CCC_STREAM_WRITE 3 -/// Class 4: block write -#define MMC_CCC_BLOCK_WRITE 4 -/// Class 5: erase -#define MMC_CCC_ERASE 5 -/// Class 6: write protection -#define MMC_CCC_WRITE_PROTECTION 6 -/// Class 7: lock card -#define MMC_CCC_LOCK_CARD 7 -/// Class 8: application specific -#define MMC_CCC_APP_SPEC 8 -/// Class 9: I/O mode -#define MMC_CCC_IO_MODE 9 - -//- MMC/SD Card Command Response Type -/// R1 (normal response command), 48bits -#define MMC_RESP_R1 1 -#define SD_RESP_R1 MMC_RESP_R1 -/// R1b: busy signal transmitted on the data line DAT0 -#define MMC_RESP_R1b 1 -#define SD_RESP_R1b MMC_RESP_R1b -/// R2: 136bits, CID, CSD register -#define MMC_RESP_R2 2 -#define SD_RESP_R2 MMC_RESP_R2 -/// R3: 48bits, OCR -#define MMC_RESP_R3 3 -#define SD_RESP_R3 MMC_RESP_R3 -/// R4 (Fast I/O), 48bits -#define MMC_RESP_R4 4 -/// R5 (Interrupt request), 48bits -#define MMC_RESP_R5 5 -/// R6 (Published RCA response), 48bits -#define SD_RESP_R6 6 -/// R7 (Card interface condition), 48bits -#define SD_RESP_R7 7 - -//- MMC Card CMD6 access mode -#define MMC_SWITCH_CMDSET 0 -#define MMC_SWITCH_SETBITS 1 -#define MMC_SWITCH_CLRBITS 2 -#define MMC_SWITCH_WRITE 3 - -//-MMC Boot partition enable -/// Boot partition 1 enabled for boot -#define MMC_BOOT_PART_1 1 -/// Boot partition 2 enabled for boot -#define MMC_BOOT_PART_2 2 -/// User area enabled for boot -#define MMC_BOOT_PART_USER 7 - -//-MMC Boot partition access -/// R/W boot partition 1 -#define MMC_BOOT_ACC_PART1 1 -/// R/W boot partition 2 -#define MMC_BOOT_ACC_PART2 2 - - -typedef void (*SdCallback)(unsigned char status, void *pCommand); - -typedef struct _SdCmd { - - /// Command status. - volatile char status; - /// Command code. - unsigned int cmd; - /// Command argument. - unsigned int arg; - /// Data buffer. - unsigned char *pData; - /// Size of data buffer in bytes. - unsigned short blockSize; - /// Number of blocks to be transfered - unsigned short nbBlock; - /// Indicate if continue to transfer data - unsigned char tranType; - /// Indicates if the command is a read operation. - unsigned char isRead; - /// Response buffer. - unsigned int *pResp; - /// SD card response type. - unsigned char resType; - /// Optional user-provided callback function. - SdCallback callback; - /// Optional argument to the callback function. - void *pArg; - -} SdCmd; - -/**@}*/ -#endif //#ifndef SDMMC_CMD_H - diff --git a/src/ersky9x/libraries/usb/device/core/USBD.h b/src/ersky9x/libraries/usb/device/core/USBD.h index 9410334a6..32e83d0c5 100644 --- a/src/ersky9x/libraries/usb/device/core/USBD.h +++ b/src/ersky9x/libraries/usb/device/core/USBD.h @@ -211,7 +211,7 @@ typedef void (*MblTransferCallback)(void *pArg, // Exported functions //------------------------------------------------------------------------------ -extern void USBD_IRQHandler(void); +extern void USBD_IrqHandler(void); extern void USBD_Init(void); diff --git a/src/ersky9x/libraries/usb/device/core/USBD_OTGHS.c b/src/ersky9x/libraries/usb/device/core/USBD_OTGHS.c index 1d965ea19..3a8a02e67 100644 --- a/src/ersky9x/libraries/usb/device/core/USBD_OTGHS.c +++ b/src/ersky9x/libraries/usb/device/core/USBD_OTGHS.c @@ -661,7 +661,7 @@ static void OTGHS_DmaHandler( unsigned char bEndpoint ) /// Manages device resume, suspend, end of bus reset. /// Forwards endpoint interrupts to the appropriate handler. //------------------------------------------------------------------------------ -void USBD_IRQHandler(void) +void USBD_IrqHandler(void) { unsigned int status; unsigned char numIT; diff --git a/src/ersky9x/libraries/usb/device/core/USBD_UDP.c b/src/ersky9x/libraries/usb/device/core/USBD_UDP.c index c3c97e10e..3506db29b 100644 --- a/src/ersky9x/libraries/usb/device/core/USBD_UDP.c +++ b/src/ersky9x/libraries/usb/device/core/USBD_UDP.c @@ -890,7 +890,7 @@ static void UDP_EndpointHandler(unsigned char bEndpoint) /// Manages device resume, suspend, end of bus reset. /// Forwards endpoint interrupts to the appropriate handler. //------------------------------------------------------------------------------ -void USBD_IRQHandler(void) +void USBD_IrqHandler(void) { unsigned int status; int eptnum = 0; diff --git a/src/ersky9x/libraries/usb/device/core/USBD_UDPHS.c b/src/ersky9x/libraries/usb/device/core/USBD_UDPHS.c index aeec7767c..dba705856 100644 --- a/src/ersky9x/libraries/usb/device/core/USBD_UDPHS.c +++ b/src/ersky9x/libraries/usb/device/core/USBD_UDPHS.c @@ -1019,7 +1019,7 @@ static void UDPHS_DmaHandler( unsigned char bEndpoint ) /// Manages device resume, suspend, end of bus reset. /// Forwards endpoint interrupts to the appropriate handler. //------------------------------------------------------------------------------ -void USBD_IRQHandler(void) +void USBD_IrqHandler(void) { unsigned int status; unsigned char numIT; diff --git a/src/ersky9x/sdcard.cpp b/src/ersky9x/sdcard.cpp deleted file mode 100644 index 22428db2e..000000000 --- a/src/ersky9x/sdcard.cpp +++ /dev/null @@ -1,211 +0,0 @@ -/* - * Authors (alphabetical order) - * - Bertrand Songis - * - Bryan J. Rentoul (Gruvin) - * - Cameron Weeks - * - Erez Raviv - * - Jean-Pierre Parisy - * - Karl Szmutny - * - Michael Blandford - * - Michal Hlavinka - * - Pat Mackenzie - * - Philip Moss - * - Rob Thomson - * - Romolo Manfredini - * - Thomas Husterer - * - * open9x is based on code named - * gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/, - * er9x by Erez Raviv: http://code.google.com/p/er9x/, - * and the original (and ongoing) project by - * Thomas Husterer, th9x: http://code.google.com/p/th9x/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include "../open9x.h" - -volatile int8_t sdState = SD_STATE_STARTUP; - -#if !defined(SIMU) - -extern "C" { - -/* Include USB definitions */ -#include - -/** MCI driver instance. */ -static Mcid mciDrv; - -/** SDCard driver instance. */ -static SdCard sdDrv; - -/** - * MCI0 interrupt handler. Forwards the event to the MCI driver handler. - */ -void MCI_IRQHandler(void) -{ - Sdmmc_Handler(&mciDrv); -} - -void MEDSdcard_Initialize(Media * /*media*/, SdCard * /*sdDrv*/, uint8_t /*protected*/); - -} // extern "C" - -#define MCI_INITIAL_SPEED 400000 - -FATFS g_FATFS_Obj; - -void sdInit() -{ - configure_pins( 0xFC000000, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_C | PIN_PORTA | PIN_NO_PULLUP ) ; - configure_pins( PIO_PB7, PIN_INPUT | PIN_PORTB | PIN_NO_PULLUP | PIN_NO_PULLDOWN ) ; - - unsigned short clkDiv; - Hsmci *pMciHw = HSMCI ; - - /* Enable the MCI peripheral */ - PMC->PMC_PCER0 |= 1 << ID_HSMCI ; // Enable peripheral clock to HSMCI - pMciHw->HSMCI_CR = HSMCI_CR_SWRST; /* Reset the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; /* Disable the MCI */ - pMciHw->HSMCI_IDR = 0xFFFFFFFF; /* Disable all the interrupts */ - pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ; /* Set the Data Timeout Register */ - pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ; /* CSTOR ? */ - /* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */ - clkDiv = (Master_frequency / (MCI_INITIAL_SPEED * 2)) - 1; - pMciHw->HSMCI_MR = clkDiv | (7 << 8) ; - - /* Set the SDCard Register 1-bit, slot A */ - pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ; - /* Enable the MCI and the Power Saving */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN | HSMCI_CR_PWSEN ; // TODO HSMCI_CR_PWSEN ? - /* Configure MCI */ - pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE | ((1 << 4) & HSMCI_CFG_FERRCTRL); - - if (CardIsConnected()) { - sdLoad(); - } -} - -void sdLoad() -{ - /* Initialize the MCI driver */ - MCI_Init(&mciDrv, HSMCI, ID_HSMCI, BOARD_MCK); - - /* Enable the interrupts */ - NVIC_EnableIRQ( HSMCI_IRQn ) ; - - /* Initialize the SD card driver */ - SD_Init(&sdDrv, &mciDrv); - - MEDSdcard_Initialize(&(medias[DRV_SDMMC]), &sdDrv, 0); - - sdState = SD_STATE_CONNECTED; -} - -/** Size of one block in bytes. */ -#define BLOCK_SIZE 512 - -/** Size of the MSD IO buffer in bytes (6K, more the better). */ -#define MSD_BUFFER_SIZE (12*BLOCK_SIZE) - -/** LUN read/write buffer. */ -unsigned char msdBuffer[MSD_BUFFER_SIZE]; - -static void ConfigureUsbClock(void) -{ - /* Enable PLLB for USB */ - PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(1) - | CKGR_PLLBR_MULB(7) - | CKGR_PLLBR_PLLBCOUNT_Msk; - while((PMC->PMC_SR & PMC_SR_LOCKB) == 0); // TODO && (timeout++ < CLOCK_TIMEOUT)); - /* USB Clock uses PLLB */ - PMC->PMC_USB = PMC_USB_USBDIV(1) /* /2 */ - | PMC_USB_USBS; /* PLLB */ -} - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Device LUNs. */ -MSDLun luns[MAX_MEDS]; - -char *bytes2Str(char *str, uint32_t bytes) -{ - if (bytes < 1024*100) - sprintf(str, "%lu.%luK", bytes / 1024, (bytes % 1024) / 103); - else if (bytes < 1024*1024) - sprintf(str, "%luK", bytes / 1024); - else if (bytes < 1024*1024*100) - sprintf(str, "%lu.%luM", bytes / (1024*1024), (bytes % (1024*1024)) / 104858); - else - sprintf(str, "%luM", bytes / (1024*1024)); - return str; -} - -unsigned int msdReadTotal=0, msdWriteTotal=0; - -static void MSDCallbacks_Data( unsigned char flowDirection, unsigned int dataLength, - unsigned int fifoNullCount, unsigned int fifoFullCount ) -{ - if (flowDirection) - msdReadTotal += dataLength; - else - msdWriteTotal += dataLength; - - char rdStr[10]; - char wrStr[10]; - - sprintf(statusLineMsg, "USB Rd:%s Wr:%s", bytes2Str(rdStr, msdReadTotal), bytes2Str(wrStr, msdWriteTotal)); - showStatusLine(); -} - -void usbMassStorage() -{ - static bool initialized = false; - - if (usbPlugged()) { - if (!initialized) { - initialized = true; - - ConfigureUsbClock(); - - /* Initialize LUN */ - LUN_Init(&(luns[DRV_SDMMC]), &(medias[DRV_SDMMC]), - msdBuffer, MSD_BUFFER_SIZE, - 0, 0, 0, 0, - MSDCallbacks_Data); - - /* BOT driver initialization */ - MSDDriver_Initialize(luns, 1); - - // VBus_Configure(); - USBD_Connect(); - } - - /* Mass storage state machine */ - for (uint8_t i=0; i<50; i++) { - MSDDriver_StateMachine(); - } - } - else { - msdReadTotal = 0; - msdWriteTotal = 0; - } -} - -bool sdIsHC() -{ - return (sdDrv.cardType == CARD_SDHC); -} - -#endif diff --git a/src/ersky9x/sdcard_driver.cpp b/src/ersky9x/sdcard_driver.cpp new file mode 100644 index 000000000..540824540 --- /dev/null +++ b/src/ersky9x/sdcard_driver.cpp @@ -0,0 +1,63 @@ +/* + * Authors (alphabetical order) + * - Bertrand Songis + * - Bryan J. Rentoul (Gruvin) + * - Cameron Weeks + * - Erez Raviv + * - Jean-Pierre Parisy + * - Karl Szmutny + * - Michael Blandford + * - Michal Hlavinka + * - Pat Mackenzie + * - Philip Moss + * - Rob Thomson + * - Romolo Manfredini + * - Thomas Husterer + * + * open9x is based on code named + * gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/, + * er9x by Erez Raviv: http://code.google.com/p/er9x/, + * and the original (and ongoing) project by + * Thomas Husterer, th9x: http://code.google.com/p/th9x/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define MCI_INITIAL_SPEED 400000 + +void init_SDcard() +{ +#ifndef SIMU + configure_pins( 0xFC000000, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_C | PIN_PORTA | PIN_NO_PULLUP ) ; + configure_pins( PIO_PB7, PIN_INPUT | PIN_PORTB | PIN_NO_PULLUP | PIN_NO_PULLDOWN ) ; + + unsigned short clkDiv; + Hsmci *pMciHw = HSMCI ; + + /* Enable the MCI peripheral */ + PMC->PMC_PCER0 |= 1 << ID_HSMCI ; // Enable peripheral clock to HSMCI + pMciHw->HSMCI_CR = HSMCI_CR_SWRST; /* Reset the MCI */ + pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; /* Disable the MCI */ + pMciHw->HSMCI_IDR = 0xFFFFFFFF; /* Disable all the interrupts */ + pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ; /* Set the Data Timeout Register */ + pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ; /* CSTOR ? */ + /* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */ + clkDiv = (Master_frequency / (MCI_INITIAL_SPEED * 2)) - 1; + pMciHw->HSMCI_MR = clkDiv | (7 << 8) ; + + /* Set the SDCard Register 1-bit, slot A */ + pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ; + /* Enable the MCI and the Power Saving */ + pMciHw->HSMCI_CR = HSMCI_CR_MCIEN | HSMCI_CR_PWSEN ; + /* Configure MCI */ + pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE | ((1 << 4) & HSMCI_CFG_FERRCTRL); +#endif +} diff --git a/src/ersky9x/sound_driver.h b/src/ersky9x/sound_driver.h index 292eabd5f..22cb65462 100644 --- a/src/ersky9x/sound_driver.h +++ b/src/ersky9x/sound_driver.h @@ -64,5 +64,6 @@ extern volatile uint8_t Buzzer_count ; extern void init_twi( void ) ; extern void setVolume( register uint8_t volume ) ; +extern "C" void TWI0_IRQHandler (void) ; #endif diff --git a/src/ersky9x/vectors_sam3s.c b/src/ersky9x/vectors_sam3s.c index aa7c78fab..47492d462 100644 --- a/src/ersky9x/vectors_sam3s.c +++ b/src/ersky9x/vectors_sam3s.c @@ -86,7 +86,7 @@ void DAC_IRQHandler (void) __attribute__((weak)); void PWM_IRQHandler (void) __attribute__((weak)); void CRCCU_IRQHandler (void) __attribute__((weak)); void ACC_IRQHandler (void) __attribute__((weak)); -void USBD_IRQHandler (void) __attribute__((weak)); +void USBD_IrqHandler (void) __attribute__((weak)); /*=========================================================================*/ /* DEFINE: All code exported */ @@ -145,7 +145,7 @@ void (* const gVectors[])(void) = PWM_IRQHandler, /* 31 PWM */ CRCCU_IRQHandler, /* 32 CRC Calculation Unit */ ACC_IRQHandler, /* 33 Analog Comparator */ - USBD_IRQHandler, /* 34 USB Device Port */ + USBD_IrqHandler, /* 34 USB Device Port */ 0 /* 35 not used */ }; /* gVectors */ @@ -173,7 +173,7 @@ void PIOB_IRQHandler (void) { while(1); } void PIOC_IRQHandler (void) { while(1); } void USART0_IRQHandler (void) { while(1); } void USART1_IRQHandler (void) { while(1); } -// void MCI_IRQHandler (void) { while(1); } +void MCI_IRQHandler (void) { while(1); } void TWI1_IRQHandler (void) { while(1); } void SSC_IRQHandler (void) { while(1); } void TC0_IRQHandler (void) { while(1); } diff --git a/src/general_menus.cpp b/src/general_menus.cpp index 44f8aa929..b44dbb43d 100644 --- a/src/general_menus.cpp +++ b/src/general_menus.cpp @@ -564,7 +564,7 @@ void menuProcSd(uint8_t event) event = 0; } - SIMPLE_MENU(sdIsHC() ? STR_SDHC_CARD : STR_SD_CARD, menuTabDiag, e_Sd, 1+reusableBuffer.sd.count); + SIMPLE_MENU(Cmd_A41_resp & OCR_SD_CCS ? STR_SDHC_CARD : STR_SD_CARD, menuTabDiag, e_Sd, 1+reusableBuffer.sd.count); if (s_editMode > 0) s_editMode = 0; diff --git a/src/lcd.cpp b/src/lcd.cpp index bb697edbd..949549b26 100644 --- a/src/lcd.cpp +++ b/src/lcd.cpp @@ -291,7 +291,8 @@ void lcd_outdezNAtt(uint8_t x, uint8_t y, int16_t val, LcdFlags flags, uint8_t l x -= fw + 1; for (uint8_t i=1; i<=len; i++) { - char c = ((uint16_t)val % 10) + '0'; + div_t qr = div(val, 10); + char c = qr.rem + '0'; uint8_t f = flags; if (dblsize) { if (c=='1' && i==len && xn>x+10) { x+=2; f|=CONDENSED; } @@ -303,7 +304,7 @@ void lcd_outdezNAtt(uint8_t x, uint8_t y, int16_t val, LcdFlags flags, uint8_t l if (dblsize) { xn = x; if(c>='1' && c<='3') ln++; - uint8_t tn = ((uint16_t)val/10) % 10; + uint8_t tn = (qr.quot) % 10; if (tn==2 || tn==4) { if (c=='4') { xn++; } else { xn--; ln++; } @@ -318,7 +319,7 @@ void lcd_outdezNAtt(uint8_t x, uint8_t y, int16_t val, LcdFlags flags, uint8_t l } } if (dblsize && val >= 1000 && val < 10000) x-=2; - val = ((uint16_t)val) / 10; + val = qr.quot; x-=fw; } diff --git a/src/logs.cpp b/src/logs.cpp index d36d80b59..2e74f4fcb 100644 --- a/src/logs.cpp +++ b/src/logs.cpp @@ -133,7 +133,7 @@ void writeLogs() lastLogTime = tmr10ms; if (!g_oLogFile.fs) { - if (!CardIsMounted() || openLogs()) + if (!sd_card_mounted() || openLogs()) return; } diff --git a/src/open9x.cpp b/src/open9x.cpp index a93d80f84..b297e720a 100644 --- a/src/open9x.cpp +++ b/src/open9x.cpp @@ -33,6 +33,39 @@ #include "open9x.h" +#if defined(PCBARM) +#define MIXER_STACK_SIZE 500 +#define MENUS_STACK_SIZE 2000 +#define AUDIO_STACK_SIZE 500 +#define BT_STACK_SIZE 500 +#define DEBUG_STACK_SIZE 500 + +OS_TID mixerTaskId; +OS_STK mixerStack[MIXER_STACK_SIZE]; + +OS_TID menusTaskId; +OS_STK menusStack[MENUS_STACK_SIZE]; + +OS_TID audioTaskId; +OS_STK audioStack[AUDIO_STACK_SIZE]; + +#if defined(BLUETOOTH) +OS_TID btTaskId; +OS_STK btStack[BT_STACK_SIZE]; +#endif + +#if defined(DEBUG) +OS_TID debugTaskId; +OS_STK debugStack[DEBUG_STACK_SIZE]; +#endif + +OS_TCID audioTimer; +OS_FlagID audioFlag; + +OS_MutexID audioMutex; +OS_MutexID mixerMutex; +#endif + #if defined(SPLASH) const pm_uchar splashdata[] PROGMEM = { 'S','P','S',0, #include "s9xsplash.lbm" @@ -2601,7 +2634,7 @@ void perMain() } #if defined(SDCARD) && !defined(SIMU) - // sdPoll10mS(); + sdPoll10mS(); #endif } #else @@ -3193,8 +3226,8 @@ inline void open9xInit(OPEN9X_INIT_ARGS) doSplash(); #if defined(PCBARM) && defined(SDCARD) - for (int i=0; i<500 && sdState==SD_STATE_CONNECTED; i++) { - CoTickDelay(1); // 2ms + for (int i=0; i<500 && !Card_initialized; i++) { + CoTickDelay(1); // 2ms } #endif @@ -3263,6 +3296,123 @@ void mixerTask(void * pdata) } } +// TODO move this code elsewhere +extern "C" { +/* Include AT91SAM3S-EK definitions and initialization API */ +#include +#include +#include + +/* Include USB definitions */ +#include + +/** Size of one block in bytes. */ +#define BLOCK_SIZE 512 + +/** Size of the MSD IO buffer in bytes (6K, more the better). */ +#define MSD_BUFFER_SIZE (12*BLOCK_SIZE) + +/** LUN read/write buffer. */ +unsigned char msdBuffer[MSD_BUFFER_SIZE]; + +static void ConfigureUsbClock(void) +{ + /* Enable PLLB for USB */ + PMC->CKGR_PLLBR = CKGR_PLLBR_DIVB(1) + | CKGR_PLLBR_MULB(7) + | CKGR_PLLBR_PLLBCOUNT_Msk; + while((PMC->PMC_SR & PMC_SR_LOCKB) == 0); // TODO && (timeout++ < CLOCK_TIMEOUT)); + /* USB Clock uses PLLB */ + PMC->PMC_USB = PMC_USB_USBDIV(1) /* /2 */ + | PMC_USB_USBS; /* PLLB */ +} + +/** Maximum number of LUNs which can be defined. */ +#define MAX_LUNS 1 + +/** Media index for different disks */ +#define DRV_SDMMC 0 /** SD card */ + +Media medias[MAX_LUNS]; + +/*---------------------------------------------------------------------------- + * Local variables + *----------------------------------------------------------------------------*/ + +/** Device LUNs. */ +MSDLun luns[MAX_LUNS]; + +char *bytes2Str(char *str, uint32_t bytes) +{ + if (bytes < 1024*100) + sprintf(str, "%lu.%luK", bytes / 1024, (bytes % 1024) / 103); + else if (bytes < 1024*1024) + sprintf(str, "%luK", bytes / 1024); + else if (bytes < 1024*1024*100) + sprintf(str, "%lu.%luM", bytes / (1024*1024), (bytes % (1024*1024)) / 104858); + else + sprintf(str, "%luM", bytes / (1024*1024)); + return str; +} + +unsigned int msdReadTotal=0, msdWriteTotal=0; + +static void MSDCallbacks_Data( unsigned char flowDirection, unsigned int dataLength, + unsigned int fifoNullCount, unsigned int fifoFullCount ) +{ + if (flowDirection) + msdReadTotal += dataLength; + else + msdWriteTotal += dataLength; + + char rdStr[10]; + char wrStr[10]; + + sprintf(statusLineMsg, "USB Rd:%s Wr:%s", bytes2Str(rdStr, msdReadTotal), bytes2Str(wrStr, msdWriteTotal)); + showStatusLine(); +} + +unsigned char MEDSdcard_Initialize(Media *media, unsigned char mciID); + +void usbMassStorage() +{ + static bool initialized = false; + + if (usbPlugged()) { + TRACE_DEBUG("usbMassStorage\n\r"); + + if (!initialized) { + + ConfigureUsbClock(); + + /* Initialize LUN */ + MEDSdcard_Initialize(&(medias[DRV_SDMMC]), 0); + + LUN_Init(&(luns[DRV_SDMMC]), &(medias[DRV_SDMMC]), + msdBuffer, MSD_BUFFER_SIZE, + 0, 0, 0, 0, + MSDCallbacks_Data); + + /* BOT driver initialization */ + MSDDriver_Initialize(luns, 1); + + // VBus_Configure(); + USBD_Connect(); + + initialized = true; + } + + /* Mass storage state machine */ + for (uint8_t i=0; i<50; i++) + MSDDriver_StateMachine(); + } + else { + msdReadTotal = 0; + msdWriteTotal = 0; + } +} +} // extern "C" + void menusTask(void * pdata) { open9xInit(); @@ -3411,24 +3561,22 @@ int main(void) usb_mode(); } - sdInit(); - CoInitOS(); #if defined(DEBUG) - debugTaskId = CoCreateTaskEx(debugTask, NULL, DEBUG_PRIO, &debugStack[DEBUG_STACK_SIZE-1], DEBUG_STACK_SIZE, 1, false); + debugTaskId = CoCreateTaskEx(debugTask, NULL, 10, &debugStack[DEBUG_STACK_SIZE-1], DEBUG_STACK_SIZE, 1, false); #endif #if defined(BLUETOOTH) - btTaskId = CoCreateTask(btTask, NULL, BT_PRIO, &btStack[BT_STACK_SIZE-1], BT_STACK_SIZE); + btTaskId = CoCreateTask(btTask, NULL, 15, &btStack[BT_STACK_SIZE-1], BT_STACK_SIZE); #endif - mixerTaskId = CoCreateTask(mixerTask, NULL, MIXER_PRIO, &mixerStack[MIXER_STACK_SIZE-1], MIXER_STACK_SIZE); - menusTaskId = CoCreateTask(menusTask, NULL, MENUS_PRIO, &menusStack[MENUS_STACK_SIZE-1], MENUS_STACK_SIZE); + mixerTaskId = CoCreateTask(mixerTask, NULL, 5, &mixerStack[MIXER_STACK_SIZE-1], MIXER_STACK_SIZE); + menusTaskId = CoCreateTask(menusTask, NULL, 10, &menusStack[MENUS_STACK_SIZE-1], MENUS_STACK_SIZE); audioFlag = CoCreateFlag(true, false); // Auto-reset, start FALSE audioTimer = CoCreateTmr(TMR_TYPE_ONE_SHOT, 1000/(1000/CFG_SYSTICK_FREQ), 1000/(1000/CFG_SYSTICK_FREQ), audioTimerHandle); - audioTaskId = CoCreateTask(audioTask, NULL, AUDIO_PRIO, &audioStack[AUDIO_STACK_SIZE-1], AUDIO_STACK_SIZE); + audioTaskId = CoCreateTask(audioTask, NULL, 7, &audioStack[AUDIO_STACK_SIZE-1], AUDIO_STACK_SIZE); audioMutex = CoCreateMutex(); mixerMutex = CoCreateMutex(); diff --git a/src/open9x.h b/src/open9x.h index ca5fdf109..56ce4d59d 100644 --- a/src/open9x.h +++ b/src/open9x.h @@ -751,6 +751,13 @@ uint16_t isqrt32(uint32_t n); #endif #if defined(PCBARM) +#if !defined(SIMU) +extern "C" { +#include +} +#endif + +extern OS_MutexID mixerMutex; inline void pauseMixerCalculations() { CoEnterMutexSection(mixerMutex); diff --git a/src/sdcard.h b/src/sdcard.h index 6049aad0d..5c6e7ea83 100644 --- a/src/sdcard.h +++ b/src/sdcard.h @@ -68,21 +68,19 @@ inline const pm_char *SDCARD_ERROR(FRESULT result) return STR_SDCARD_ERROR; } -#if defined(PCBARM) -void sdInit(); -void sdLoad(); -void usbMassStorage(); +// TODO move the ARM function definition here (when cpp) +extern void sdPoll10mS(); + +#if defined(PCBARM) && !(defined(SIMU)) +extern "C" { +extern uint32_t sd_card_ready(); +extern uint32_t sd_card_mounted(); +} #else -void sdPoll10mS(); -#define sdIsHC() 0 -#define CardIsMounted() (true) +#define sd_card_ready() (true) +#define sd_card_mounted() (true) #endif -#if defined(PCBARM) && !defined(SIMU) -bool sdIsHC(); -#else -#define sdIsHC() 0 -#endif #endif diff --git a/src/simpgmspace.cpp b/src/simpgmspace.cpp index efb24c2ac..70ad2af3a 100644 --- a/src/simpgmspace.cpp +++ b/src/simpgmspace.cpp @@ -385,4 +385,5 @@ FRESULT f_getcwd (TCHAR *path, UINT sz_path) return FR_OK; } +int32_t Card_state = SD_ST_MOUNTED; #endif diff --git a/src/simpgmspace.h b/src/simpgmspace.h index 5722abb73..19b307fb8 100644 --- a/src/simpgmspace.h +++ b/src/simpgmspace.h @@ -295,8 +295,25 @@ void eeprom_read_block (void *pointer_ram, #define wdt_reset() sleep(1/*ms*/) #define board_init() +#define OS_MutexID int +#define OS_FlagID int +#define OS_TID int +#define OS_TCID int +#define OS_STK char + #define E_OK 0 +#define CoSetFlag(...) +#define CoClearFlag(...) +#define CoSetTmrCnt(...) +#define CoEnterISR(...) +#define CoExitISR(...) +#define CoStartTmr(...) +#define CoWaitForSingleFlag(...) 0 +#define CoEnterMutexSection(...) +#define CoLeaveMutexSection(...) +#define CoTickDelay(...) +#define CoCreateFlag(...) 0 #define UART3_Configure(...) #define UART_Stop(...) #define UART3_Stop(...) diff --git a/src/stock/voice.cpp b/src/stock/voice.cpp index e53b258d8..f503d67ac 100644 --- a/src/stock/voice.cpp +++ b/src/stock/voice.cpp @@ -78,9 +78,6 @@ void t_voice::voice_process(void) if (VoiceState == V_IDLE) { PORTB |= (1 << OUT_B_LIGHT); // Latch clock high if (VoiceQueueCount) { - VoiceLatch &= ~VOICE_CLOCK_BIT; - PORTA_LCD_DAT = VoiceLatch; // Latch data set - PORTB &= ~(1 << OUT_B_LIGHT); // Latch clock low VoiceSerial = VoiceQueue[VoiceQueueOutIndex++]; VoiceQueueOutIndex &= (VOICE_Q_LENGTH - 1); VoiceQueueCount -= 1; @@ -97,6 +94,12 @@ void t_voice::voice_process(void) VoiceSerial |= 0xFF00; VoiceTimer = 40; } + VoiceLatch &= ~VOICE_CLOCK_BIT & ~VOICE_DATA_BIT ; + if (VoiceSerial & 0x8000) { + VoiceLatch |= VOICE_DATA_BIT; + } + PORTA_LCD_DAT = VoiceLatch ; // Latch data set + PORTB &= ~(1<VoiceCounter & 1 ) \ + if ((vptr->VoiceCounter & 1) == 0) \ { \ vptr->VoiceLatch &= ~VOICE_DATA_BIT; \ - if ( vptr->VoiceSerial & 0x8000 ) \ + if ( vptr->VoiceSerial & 0x4000 ) \ { \ vptr->VoiceLatch |= VOICE_DATA_BIT; \ } \
+layer +

FatFs is a generic FAT file system module for small embedded systems. The FatFs is written in compliance with ANSI C and completely separated from the disk I/O layer. Therefore it is independent of hardware architecture. It can be incorporated into cheap microcontrollers, such as 8051, PIC, AVR, SH, Z80, H8, ARM and etc..., without any change. Petit FatFs module is also available here.

+ +

Features

+
    +
  • FAT12, FAT16 and FAT32.
    • +
  • Multiple volumes (physical drives and partitions).
    • +
  • Two partitioning rules: FDISK and Super-floppy.
    • +
  • Various configuration options: +
      +
    • Long file name (LFN) support.
      • +
    • Selectable code pages including DBCS.
      • +
    • Multitask support.
      • +
    • Multiple sector size support.
      • +
    • Read-only, minimized API, buffer configuration and etc...
      • +
    +
    • +
+