From 434c071bda680cc19a52324faaa2848cec3d4635 Mon Sep 17 00:00:00 2001 From: "gruvin@gmail.com" Date: Sun, 11 Nov 2012 03:31:45 +0000 Subject: [PATCH] [avr boards] Minor fix to legacy problem with the very first PPM output frame, where correct pulse polarity was not always set until the second call to setupPulses, from within the PPM mode pulse train interrupt handler. I tested proper function in PPM mode on the logic analyser before committing. --- src/pulses_avr.cpp | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/src/pulses_avr.cpp b/src/pulses_avr.cpp index 7b2f5690e..b57f83baf 100644 --- a/src/pulses_avr.cpp +++ b/src/pulses_avr.cpp @@ -67,7 +67,7 @@ void startPulses() #endif { // TODO g: There has to be a better place for this bug fix - OCR1B = 0xffff; /* Prevent any PPM_PUT pin toggle before the TCNT1 interrupt + OCR1B = 0xffff; /* Prevent any PPM_OUT pin toggle before the TCNT1 interrupt fires for the first time and sets up the pulse period. *** Prevents WDT reset loop. */ } @@ -96,12 +96,9 @@ uint8_t *pulses2MHzWPtr = pulses2MHz; #ifndef SIMU +uint8_t g_ppmPulsePolarity = 0; ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR) { - static uint8_t pulsePol = 0; /* The very first call to this handler will toggle PPM_out high, then - call setupPulses() and initialise pulsePol. This is allowed in favour - of minimal ongoing PPM toggle latency. */ - uint8_t dt = TCNT1L; // record Timer1 latency for DEBUG stats display #ifdef DSM2_SERIAL @@ -118,13 +115,13 @@ ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR) #if !defined(PCBGRUVIN9X) // Original bitbang for PPM if (s_current_protocol != PROTO_NONE) { - if (pulsePol) { + if (g_ppmPulsePolarity) { PORTB |= (1<