From 641b6a321acf9a2973c1adbff0fe033ed2d51639 Mon Sep 17 00:00:00 2001 From: Bertrand Songis Date: Fri, 22 Jan 2016 22:37:06 +0100 Subject: [PATCH] [Horus] Internal module and Telemetry now OK. Trainer modes (as Taranis) added --- radio/src/CMakeLists.txt | 2 +- radio/src/Makefile | 2 +- radio/src/gui/horus/menu_model_setup.cpp | 2 +- radio/src/myeeprom.h | 35 +- radio/src/targets/horus/board_horus.cpp | 28 +- radio/src/targets/horus/board_horus.h | 23 +- radio/src/targets/horus/hal.h | 71 ++- radio/src/targets/horus/pulses_driver.cpp | 608 ++++++++++++++----- radio/src/targets/horus/pwr_driver.cpp | 21 +- radio/src/targets/horus/telemetry_driver.cpp | 57 +- radio/src/targets/horus/trainer_driver.cpp | 193 ++++-- 11 files changed, 765 insertions(+), 277 deletions(-) diff --git a/radio/src/CMakeLists.txt b/radio/src/CMakeLists.txt index 80241ea5d..947d0ca12 100644 --- a/radio/src/CMakeLists.txt +++ b/radio/src/CMakeLists.txt @@ -60,7 +60,7 @@ if(PCB STREQUAL HORUS) set(FIRMWARE_DEPENDENCIES ${FIRMWARE_DEPENDENCIES} horus_bitmaps) set(LUA_EXPORT lua_export_horus) set(FLAVOUR horus) - add_definitions(-DPCBHORUS -DCOLORLCD -DSTM32F429_439xx) + add_definitions(-DPCBHORUS -DCOLORLCD -DSTM32F429_439xx -DPPM_PIN_HW_SERIAL) add_definitions(-DEEPROM_VARIANT=0 -DAUDIO -DVOICE -DRTCLOCK) add_definitions(-DVIRTUALINPUTS -DLUAINPUTS -DXCURVES -DVARIO) include_directories(${RADIO_SRC_DIRECTORY}/fonts/horus) diff --git a/radio/src/Makefile b/radio/src/Makefile index 698ad45fe..939fc69d8 100644 --- a/radio/src/Makefile +++ b/radio/src/Makefile @@ -1231,7 +1231,7 @@ ifeq ($(PCB), HORUS) TRGT = arm-none-eabi- MCU = cortex-m4 OPT = 2 - CPPDEFS += -DHSE_VALUE=12000000 -DCOLORLCD -DSTM32F429_439xx + CPPDEFS += -DHSE_VALUE=12000000 -DCOLORLCD -DSTM32F429_439xx -DPPM_PIN_HW_SERIAL BITMAPS += $(patsubst %.png,%.lbm,$(wildcard bitmaps/horus/*.png)) FONTS = fonts/horus/font_stdsize.lbm fonts/horus/font_tinsize.lbm fonts/horus/font_smlsize.lbm fonts/horus/font_midsize.lbm fonts/horus/font_dblsize.lbm fonts/horus/font_xxlsize.lbm SDCARD = YES diff --git a/radio/src/gui/horus/menu_model_setup.cpp b/radio/src/gui/horus/menu_model_setup.cpp index 9f7de484c..24c7f6989 100644 --- a/radio/src/gui/horus/menu_model_setup.cpp +++ b/radio/src/gui/horus/menu_model_setup.cpp @@ -531,7 +531,7 @@ bool menuModelSetup(evt_t event) case ITEM_MODEL_TRAINER_MODE: lcdDrawText(MENUS_MARGIN_LEFT, y, STR_MODE); - g_model.trainerMode = selectMenuItem(MODEL_SETUP_2ND_COLUMN, y, STR_VTRAINERMODES, g_model.trainerMode, TRAINER_MODE_MASTER, TRAINER_MODE_SLAVE, attr, event); + g_model.trainerMode = selectMenuItem(MODEL_SETUP_2ND_COLUMN, y, STR_VTRAINERMODES, g_model.trainerMode, 0, HAS_WIRELESS_TRAINER_HARDWARE() ? TRAINER_MODE_MASTER_BATTERY_COMPARTMENT : TRAINER_MODE_MASTER_CPPM_EXTERNAL_MODULE, attr, event); break; case ITEM_MODEL_EXTERNAL_MODULE_LABEL: diff --git a/radio/src/myeeprom.h b/radio/src/myeeprom.h index ac975eac6..7a023838d 100644 --- a/radio/src/myeeprom.h +++ b/radio/src/myeeprom.h @@ -453,8 +453,6 @@ enum UartModes { #define LEN_SWITCH_NAME 3 #define LEN_ANA_NAME 3 #define LEN_BLUETOOTH_NAME 10 - #define HAS_WIRELESS_TRAINER_HARDWARE() (g_eeGeneral.serial2Mode==UART_MODE_SBUS_TRAINER/* || g_eeGeneral.serial2Mode==UART_MODE_CPPM_TRAINER*/) - #if defined(REV9E) #define BLUETOOTH_FIELDS \ uint8_t bluetoothEnable; \ @@ -519,19 +517,7 @@ enum PotsWarnMode { POTS_WARN_AUTO }; -#if defined(PCBHORUS) - enum ModuleIndex { - INTERNAL_MODULE, - EXTERNAL_MODULE, - TRAINER_MODULE, - }; - enum TrainerMode { - TRAINER_MODE_MASTER, - TRAINER_MODE_SLAVE - }; - #define MODELDATA_BITMAP char bitmap[LEN_BITMAP_NAME]; - #define MODELDATA_EXTRA uint8_t spare:3; uint8_t trainerMode:3; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; ScriptData scriptsData[MAX_SCRIPTS]; char inputNames[MAX_INPUTS][LEN_INPUT_NAME]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; -#elif defined(PCBFLAMENCO) +#if defined(PCBFLAMENCO) enum ModuleIndex { EXTERNAL_MODULE, TRAINER_MODULE, @@ -540,9 +526,7 @@ enum PotsWarnMode { TRAINER_MODE_MASTER, TRAINER_MODE_SLAVE }; - #define MODELDATA_BITMAP uint8_t bitmap; - #define MODELDATA_EXTRA uint8_t spare:3; uint8_t trainerMode:3; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; ScriptData scriptsData[MAX_SCRIPTS]; char inputNames[MAX_INPUTS][LEN_INPUT_NAME]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; -#elif defined(PCBTARANIS) +#elif defined(PCBTARANIS) || defined(PCBHORUS) enum ModuleIndex { INTERNAL_MODULE, EXTERNAL_MODULE, @@ -556,14 +540,25 @@ enum PotsWarnMode { TRAINER_MODE_MASTER_BATTERY_COMPARTMENT, }; #define IS_TRAINER_EXTERNAL_MODULE() (g_model.trainerMode == TRAINER_MODE_MASTER_SBUS_EXTERNAL_MODULE || g_model.trainerMode == TRAINER_MODE_MASTER_CPPM_EXTERNAL_MODULE) - #define MODELDATA_BITMAP char bitmap[LEN_BITMAP_NAME]; - #define MODELDATA_EXTRA uint8_t spare:3; uint8_t trainerMode:3; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; ScriptData scriptsData[MAX_SCRIPTS]; char inputNames[MAX_INPUTS][LEN_INPUT_NAME]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; + #define HAS_WIRELESS_TRAINER_HARDWARE() (g_eeGeneral.serial2Mode==UART_MODE_SBUS_TRAINER/* || g_eeGeneral.serial2Mode==UART_MODE_CPPM_TRAINER*/) #elif defined(PCBSKY9X) enum ModuleIndex { EXTERNAL_MODULE, EXTRA_MODULE, TRAINER_MODULE }; +#endif + +#if defined(PCBHORUS) + #define MODELDATA_BITMAP char bitmap[LEN_BITMAP_NAME]; + #define MODELDATA_EXTRA uint8_t spare:3; uint8_t trainerMode:3; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; ScriptData scriptsData[MAX_SCRIPTS]; char inputNames[MAX_INPUTS][LEN_INPUT_NAME]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; +#elif defined(PCBFLAMENCO) + #define MODELDATA_BITMAP uint8_t bitmap; + #define MODELDATA_EXTRA uint8_t spare:3; uint8_t trainerMode:3; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; ScriptData scriptsData[MAX_SCRIPTS]; char inputNames[MAX_INPUTS][LEN_INPUT_NAME]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; +#elif defined(PCBTARANIS) + #define MODELDATA_BITMAP char bitmap[LEN_BITMAP_NAME]; + #define MODELDATA_EXTRA uint8_t spare:3; uint8_t trainerMode:3; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; ScriptData scriptsData[MAX_SCRIPTS]; char inputNames[MAX_INPUTS][LEN_INPUT_NAME]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; +#elif defined(PCBSKY9X) #define MODELDATA_BITMAP #define MODELDATA_EXTRA uint8_t spare:6; uint8_t potsWarnMode:2; ModuleData moduleData[NUM_MODULES+1]; uint8_t potsWarnEnabled; int8_t potsWarnPosition[NUM_POTS]; uint8_t rxBattAlarms[2]; #else diff --git a/radio/src/targets/horus/board_horus.cpp b/radio/src/targets/horus/board_horus.cpp index 61c4171ba..ea3aacec4 100644 --- a/radio/src/targets/horus/board_horus.cpp +++ b/radio/src/targets/horus/board_horus.cpp @@ -124,9 +124,9 @@ void pinCheck(GPIO_TypeDef * gpio, uint32_t pin, uint32_t RCC_AHB1Periph) void boardInit() { - RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | LCD_RCC_AHB1Periph | AUDIO_RCC_AHB1Periph | KEYS_RCC_AHB1Periph_GPIO | ADC_RCC_AHB1Periph | SERIAL_RCC_AHB1Periph | TELEMETRY_RCC_AHB1Periph | AUDIO_RCC_AHB1Periph | HAPTIC_RCC_AHB1Periph, ENABLE); + RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | LCD_RCC_AHB1Periph | AUDIO_RCC_AHB1Periph | KEYS_RCC_AHB1Periph_GPIO | ADC_RCC_AHB1Periph | SERIAL_RCC_AHB1Periph | TELEMETRY_RCC_AHB1Periph | AUDIO_RCC_AHB1Periph | HAPTIC_RCC_AHB1Periph | INTMODULE_RCC_AHB1Periph | EXTMODULE_RCC_AHB1Periph, ENABLE); RCC_APB1PeriphClockCmd(INTERRUPT_5MS_APB1Periph | TIMER_2MHz_APB1Periph | AUDIO_RCC_APB1Periph | SERIAL_RCC_APB1Periph | TELEMETRY_RCC_APB1Periph | AUDIO_RCC_APB1Periph, ENABLE); - RCC_APB2PeriphClockCmd(LCD_RCC_APB2Periph | ADC_RCC_APB2Periph | HAPTIC_RCC_APB2Periph, ENABLE); + RCC_APB2PeriphClockCmd(LCD_RCC_APB2Periph | ADC_RCC_APB2Periph | HAPTIC_RCC_APB2Periph | INTMODULE_RCC_APB2Periph | EXTMODULE_RCC_APB2Periph, ENABLE); pwrInit(); ledInit(); @@ -211,12 +211,20 @@ void checkTrainerSettings() uint8_t requiredTrainerMode = g_model.trainerMode; if (requiredTrainerMode != currentTrainerMode) { switch (currentTrainerMode) { - case TRAINER_MODE_MASTER: + case TRAINER_MODE_MASTER_TRAINER_JACK: stop_trainer_capture(); break; case TRAINER_MODE_SLAVE: stop_trainer_ppm(); break; + case TRAINER_MODE_MASTER_CPPM_EXTERNAL_MODULE: + stop_cppm_on_heartbeat_capture() ; + break; + case TRAINER_MODE_MASTER_SBUS_EXTERNAL_MODULE: + stop_sbus_on_heartbeat_capture() ; + break; + case TRAINER_MODE_MASTER_BATTERY_COMPARTMENT: + serial2Stop(); } currentTrainerMode = requiredTrainerMode; @@ -224,10 +232,22 @@ void checkTrainerSettings() case TRAINER_MODE_SLAVE: init_trainer_ppm(); break; + case TRAINER_MODE_MASTER_CPPM_EXTERNAL_MODULE: + init_cppm_on_heartbeat_capture() ; + break; + case TRAINER_MODE_MASTER_SBUS_EXTERNAL_MODULE: + init_sbus_on_heartbeat_capture() ; + break; + case TRAINER_MODE_MASTER_BATTERY_COMPARTMENT: + if (g_eeGeneral.serial2Mode == UART_MODE_SBUS_TRAINER) { + serial2SbusInit(); + break; + } + // no break default: // master is default init_trainer_capture(); break; } } -} +} \ No newline at end of file diff --git a/radio/src/targets/horus/board_horus.h b/radio/src/targets/horus/board_horus.h index 80d33ec40..7d829ffc0 100644 --- a/radio/src/targets/horus/board_horus.h +++ b/radio/src/targets/horus/board_horus.h @@ -103,7 +103,8 @@ void configure_pins( uint32_t pins, uint16_t config ); extern uint16_t sessionTimer; -#define SLAVE_MODE() (g_model.trainerMode == TRAINER_MODE_SLAVE) +#define SLAVE_MODE() (g_model.trainerMode == TRAINER_MODE_SLAVE) +#define TRAINER_CONNECTED() (GPIO_ReadInputDataBit(TRAINER_GPIO_DETECT, TRAINER_GPIO_PIN_DETECT) == Bit_RESET) #ifdef __cplusplus extern "C" { @@ -119,9 +120,9 @@ void delay_ms(uint16_t nb); #if !defined(SIMU) || defined(SIMU_DISKIO) uint32_t sdIsHC(void); uint32_t sdGetSpeed(void); - #define SD_IS_HC() (sdIsHC()) - #define SD_GET_SPEED() (sdGetSpeed()) - #define SD_GET_FREE_BLOCKNR() (sdGetFreeSectors()) + #define SD_IS_HC() (sdIsHC()) + #define SD_GET_SPEED() (sdGetSpeed()) + #define SD_GET_FREE_BLOCKNR() (sdGetFreeSectors()) #else #define SD_IS_HC() (0) #define SD_GET_SPEED() (0) @@ -136,7 +137,7 @@ void delay_ms(uint16_t nb); #define sdPoll10ms() #define sdMountPoll() uint32_t sdMounted(void); - #define SD_CARD_PRESENT() (~SD_PRESENT_GPIO->IDR & SD_PRESENT_GPIO_PIN) + #define SD_CARD_PRESENT() (~SD_PRESENT_GPIO->IDR & SD_PRESENT_GPIO_PIN) #endif // Flash Write driver @@ -154,8 +155,12 @@ void SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBu void SDRAM_ReadBuffer(uint32_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBufferSize); // Pulses driver -#define EXTERNAL_MODULE_ON() GPIO_SetBits(EXTMODULE_PWR_GPIO, EXTMODULE_PWR_GPIO_PIN) -#define EXTERNAL_MODULE_OFF() GPIO_ResetBits(EXTMODULE_PWR_GPIO, EXTMODULE_PWR_GPIO_PIN) +#define INTERNAL_MODULE_ON() GPIO_SetBits(INTMODULE_PWR_GPIO, INTMODULE_PWR_GPIO_PIN) +#define INTERNAL_MODULE_OFF() GPIO_ResetBits(INTMODULE_PWR_GPIO, INTMODULE_PWR_GPIO_PIN) +#define EXTERNAL_MODULE_ON() GPIO_SetBits(EXTMODULE_PWR_GPIO, EXTMODULE_PWR_GPIO_PIN) +#define EXTERNAL_MODULE_OFF() GPIO_ResetBits(EXTMODULE_PWR_GPIO, EXTMODULE_PWR_GPIO_PIN) +#define IS_INTERNAL_MODULE_ON() (GPIO_ReadInputDataBit(INTMODULE_PWR_GPIO, INTMODULE_PWR_GPIO_PIN) == Bit_SET) +#define IS_EXTERNAL_MODULE_ON() (GPIO_ReadInputDataBit(EXTMODULE_PWR_GPIO, EXTMODULE_PWR_GPIO_PIN) == Bit_SET) void init_no_pulses(uint32_t port); void disable_no_pulses(uint32_t port); void init_ppm( uint32_t module_index ); @@ -287,7 +292,8 @@ int32_t getVolume(void); // Telemetry driver void telemetryPortInit(uint32_t baudrate); -void sportSendBuffer(uint8_t *buffer, uint32_t count); +void telemetryPortSetDirectionOutput(void); +void sportSendBuffer(uint8_t * buffer, uint32_t count); // Haptic driver void hapticInit(void); @@ -309,6 +315,7 @@ void serial2Stop(void); void usbJoystickUpdate(void); #endif +extern uint8_t currentTrainerMode; void checkTrainerSettings(void); #endif // _BOARD_HORUS_H_ diff --git a/radio/src/targets/horus/hal.h b/radio/src/targets/horus/hal.h index c1bd3bde9..df1af88dd 100644 --- a/radio/src/targets/horus/hal.h +++ b/radio/src/targets/horus/hal.h @@ -130,8 +130,8 @@ // Power #define PWR_RCC_AHB1Periph RCC_AHB1Periph_GPIOJ #define PWR_GPIO GPIOJ -#define PWR_GPIO_PIN_ON GPIO_Pin_1 // PJ.01 -#define PWR_GPIO_PIN_SWITCH GPIO_Pin_0 // PJ.00 +#define PWR_ON_GPIO_PIN GPIO_Pin_1 // PJ.01 +#define PWR_SWITCH_GPIO_PIN GPIO_Pin_0 // PJ.00 // Led #define LED_RCC_AHB1Periph RCC_AHB1Periph_GPIOI @@ -155,10 +155,10 @@ #define TELEMETRY_RCC_AHB1Periph RCC_AHB1Periph_GPIOD #define TELEMETRY_RCC_APB1Periph RCC_APB1Periph_USART2 #define TELEMETRY_GPIO_DIR GPIOD -#define TELEMETRY_GPIO_PIN_DIR GPIO_Pin_4 // PD.04 +#define TELEMETRY_DIR_GPIO_PIN GPIO_Pin_4 // PD.04 #define TELEMETRY_GPIO GPIOD -#define TELEMETRY_GPIO_PIN_TX GPIO_Pin_5 // PD.05 -#define TELEMETRY_GPIO_PIN_RX GPIO_Pin_6 // PD.06 +#define TELEMETRY_TX_GPIO_PIN GPIO_Pin_5 // PD.05 +#define TELEMETRY_RX_GPIO_PIN GPIO_Pin_6 // PD.06 #define TELEMETRY_GPIO_PinSource_TX GPIO_PinSource5 #define TELEMETRY_GPIO_PinSource_RX GPIO_PinSource6 #define TELEMETRY_GPIO_AF GPIO_AF_USART2 @@ -166,6 +166,16 @@ #define TELEMETRY_USART_IRQHandler USART2_IRQHandler #define TELEMETRY_USART_IRQn USART2_IRQn +// Heartbeat +#define HEARTBEAT_RCC_AHB1Periph RCC_AHB1Periph_GPIOD +// #define HEARTBEAT_RCC_APB2Periph RCC_APB2Periph_USART3 +#define HEARTBEAT_GPIO_PIN GPIO_Pin_12 // PD.12 +// #define HEARTBEAT_GPIO_PinSource GPIO_PinSource12 +// #define HEARTBEAT_GPIO_AF GPIO_AF_USART3 +// #define HEARTBEAT_USART USART3 +// #define HEARTBEAT_USART_IRQHandler USART3_IRQHandler +// #define HEARTBEAT_USART_IRQn USART3_IRQn + // USB #define USB_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOA #define USB_GPIO GPIOA @@ -253,20 +263,38 @@ #define HAPTIC_GPIO_PinSource GPIO_PinSource2 // Internal Module -#define INTMODULE_RCC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB) -#define INTMODULE_GPIO_PWR GPIOA -#define INTMODULE_GPIO_PIN_PWR GPIO_Pin_8 // PA.08 -#define INTMODULE_GPIO GPIOB -#define INTMODULE_GPIO_PIN GPIO_Pin_6 // PB.06 -#define INTMODULE_GPIO_PinSource GPIO_PinSource6 +#define INTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB) +#define INTMODULE_RCC_APB2Periph (RCC_APB2Periph_TIM1 | RCC_APB2Periph_USART1) +#define INTMODULE_PWR_GPIO GPIOA +#define INTMODULE_PWR_GPIO_PIN GPIO_Pin_8 // PA.08 +#define INTMODULE_TX_GPIO GPIOB +#define INTMODULE_TX_GPIO_PIN GPIO_Pin_6 // PB.06 +#define INTMODULE_RX_GPIO GPIOB +#define INTMODULE_RX_GPIO_PIN GPIO_Pin_7 // PB.07 +#define INTMODULE_TX_GPIO_PinSource GPIO_PinSource6 +#define INTMODULE_RX_GPIO_PinSource GPIO_PinSource7 +#define INTMODULE_USART USART1 +#define INTMODULE_GPIO_AF GPIO_AF_USART1 +#define INTMODULE_USART_IRQn USART1_IRQn +#define INTMODULE_DMA_STREAM DMA2_Stream7 +#define INTMODULE_DMA_STREAM_IRQ DMA2_Stream7_IRQn +#define INTMODULE_DMA_CHANNEL DMA_Channel_4 +#define INTMODULE_TIMER TIM1 +#define INTMODULE_TIMER_IRQn TIM1_CC_IRQn // External Module #define EXTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB) +#define EXTMODULE_RCC_APB1Periph RCC_APB1Periph_TIM2 +#define EXTMODULE_RCC_APB2Periph 0 #define EXTMODULE_PWR_GPIO GPIOB -#define EXTMODULE_PWR_GPIO_PIN GPIO_Pin_3 // PB.03 +#define EXTMODULE_PWR_GPIO_PIN GPIO_Pin_3 // PB.03 #define EXTMODULE_PPM_GPIO GPIOA -#define EXTMODULE_PPM_GPIO_PIN GPIO_Pin_15 // PA.15 +#define EXTMODULE_PPM_GPIO_PIN GPIO_Pin_15 // PA.15 #define EXTMODULE_PPM_GPIO_PinSource GPIO_PinSource15 +#define EXTMODULE_TIMER TIM2 +#define EXTMODULE_PPM_GPIO_AF GPIO_AF_TIM2 +#define EXTMODULE_PPM_GPIO_PinSource GPIO_PinSource15 +// #define EXTMODULE_TIMER_IRQn TIM2_CC_IRQn // Trainer Port #define TRAINER_RCC_AHB1Periph (RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC) @@ -291,4 +319,21 @@ #define TIMER_2MHz_APB1Periph RCC_APB1Periph_TIM7 #define TIMER_2MHz_TIMER TIM7 +// Bluetooth +#define BT_USART USART6 +#define BT_GPIO_AF GPIO_AF_USART6 +#define BT_USART_IRQn USART6_IRQn +#define BT_RCC_AHB1Periph (RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOG) +#define BT_GPIO_TXRX GPIOG +#define BT_GPIO_PIN_TX GPIO_Pin_14 // PG.14 +#define BT_GPIO_PIN_RX GPIO_Pin_9 // PG.09 +#define BT_GPIO_EN GPIOB +#define BT_GPIO_PIN_EN GPIO_Pin_10 // PB.10 +#define BT_GPIO_BRTS GPIOG +#define BT_GPIO_PIN_BRTS GPIO_Pin_10 // PG.10 +#define BT_GPIO_BCTS GPIOG +#define BT_GPIO_PIN_BCTS GPIO_Pin_11 // PG.11 +#define BT_GPIO_PinSource_TX GPIO_PinSource14 +#define BT_GPIO_PinSource_RX GPIO_PinSource9 + #endif // _HAL_H_ diff --git a/radio/src/targets/horus/pulses_driver.cpp b/radio/src/targets/horus/pulses_driver.cpp index 31c29d8d5..41455012c 100644 --- a/radio/src/targets/horus/pulses_driver.cpp +++ b/radio/src/targets/horus/pulses_driver.cpp @@ -24,77 +24,385 @@ void setupPulses(unsigned int port); void setupPulsesPPM(unsigned int port); void setupPulsesPXX(unsigned int port); +static void intmodulePxxStart( void ) ; +static void intmodulePxxStop( void ) ; +static void extmodulePxxStart( void ) ; +static void extmodulePxxStop( void ) ; +#if defined(DSM2) +static void extmoduleDsm2Start( void ) ; +static void extmoduleDsm2Stop( void ) ; +#endif +static void extmodulePpmStart( void ) ; +static void extmodulePpmStop( void ) ; +static void intmoduleNoneStart( void ) ; +static void intmoduleNoneStop( void ) ; +static void extmoduleNoneStart( void ) ; +static void extmoduleNoneStop( void ) ; +static void extmoduleCrossfireStart( void ) ; +static void extmoduleCrossfireStop( void ) ; + +void init_pxx(uint32_t port) +{ + if (port == INTERNAL_MODULE) + intmodulePxxStart() ; + else + extmodulePxxStart() ; +} + +void disable_pxx(uint32_t port) +{ + if (port == INTERNAL_MODULE) + intmodulePxxStop() ; + else + extmodulePxxStop() ; +} + +#if defined(DSM2) +void init_dsm2(uint32_t port) +{ + if (port == EXTERNAL_MODULE) { + extmoduleDsm2Start(); + } +} + +void disable_dsm2(uint32_t port) +{ + if (port == EXTERNAL_MODULE) { + extmoduleDsm2Stop(); + } +} +#endif + +void init_ppm(uint32_t port) +{ + if (port == EXTERNAL_MODULE) { + extmodulePpmStart(); + } +} + +void disable_ppm(uint32_t port) +{ + if (port == EXTERNAL_MODULE) { + extmodulePpmStop(); + } +} + void set_external_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive) { - TIM1->CCR2 = idleTime; - TIM1->CCR1 = delay; + #if 0 + EXTMODULE_TIMER->CCR2 = idleTime; + EXTMODULE_TIMER->CCR1 = delay; // we are using complementary output so logic has to be reversed here - TIM1->CCER = TIM_CCER_CC1NE | (positive ? 0 : TIM_CCER_CC1NP); + EXTMODULE_TIMER->CCER = TIM_CCER_CC1NE | (positive ? 0 : TIM_CCER_CC1NP); + #endif } void init_no_pulses(uint32_t port) { - EXTERNAL_MODULE_OFF(); + if (port == INTERNAL_MODULE) + intmoduleNoneStart(); + else + extmoduleNoneStart(); +} - // Timer1, channel 1 +void disable_no_pulses(uint32_t port) +{ + if (port == INTERNAL_MODULE) + intmoduleNoneStop(); + else + extmoduleNoneStop(); +} + +void init_crossfire(uint32_t port) +{ + if (port == EXTERNAL_MODULE) { + extmoduleCrossfireStart(); + } +} + +void disable_crossfire(uint32_t port) +{ + if (port == EXTERNAL_MODULE) + extmoduleCrossfireStop(); +} + +static void intmoduleNoneStart() +{ + INTERNAL_MODULE_OFF(); + + // Timer1, channel 3 GPIO_InitTypeDef GPIO_InitStructure; - RCC_AHB1PeriphClockCmd(EXTMODULE_RCC_AHB1Periph, ENABLE); + GPIO_InitStructure.GPIO_Pin = INTMODULE_TX_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT ; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(INTMODULE_TX_GPIO, &GPIO_InitStructure); + GPIO_SetBits(INTMODULE_TX_GPIO, INTMODULE_TX_GPIO_PIN) ; // Set high + INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + INTMODULE_TIMER->ARR = 36000 ; // 18mS + INTMODULE_TIMER->CCR2 = 32000 ; // Update time + INTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + + INTMODULE_TIMER->CCER = TIM_CCER_CC3E ; + + INTMODULE_TIMER->CCMR2 = 0 ; + INTMODULE_TIMER->EGR = 1 ; // Restart + + INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p + INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + INTMODULE_TIMER->CR1 |= TIM_CR1_CEN ; + NVIC_EnableIRQ(INTMODULE_TIMER_IRQn) ; + NVIC_SetPriority(INTMODULE_TIMER_IRQn, 7); +} + +static void intmoduleNoneStop() +{ + NVIC_DisableIRQ(INTMODULE_TIMER_IRQn) ; + INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; + INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; +} + +#if !defined(SIMU) +extern "C" void DMA2_Stream7_IRQHandler(void) +{ + if(DMA_GetITStatus(INTMODULE_DMA_STREAM, DMA_IT_TCIF7)) { + // TODO we could send the 8 next channels here (when needed) + DMA_ClearITPendingBit(INTMODULE_DMA_STREAM, DMA_IT_TCIF7); + } +} + +extern "C" void TIM1_CC_IRQHandler() +{ + INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // stop this interrupt + INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // clear flag + + setupPulses(INTERNAL_MODULE); + + if (s_current_protocol[INTERNAL_MODULE] == PROTO_PXX) { + DMA_InitTypeDef DMA_InitStructure; + DMA_DeInit(INTMODULE_DMA_STREAM); + DMA_InitStructure.DMA_Channel = INTMODULE_DMA_CHANNEL; + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&INTMODULE_USART->DR); + DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; + DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)modulePulsesData[INTERNAL_MODULE].pxx.pulses; + DMA_InitStructure.DMA_BufferSize = (uint8_t *)modulePulsesData[INTERNAL_MODULE].pxx.ptr - (uint8_t *)modulePulsesData[INTERNAL_MODULE].pxx.pulses; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_MemoryDataSize_Byte; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; + DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; + DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; + DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; + DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; + DMA_Init(INTMODULE_DMA_STREAM, &DMA_InitStructure); + + DMA_Cmd(INTMODULE_DMA_STREAM, ENABLE); + USART_DMACmd(INTMODULE_USART, USART_DMAReq_Tx, ENABLE); + // DMA_ITConfig(INTMODULE_DMA_STREAM, DMA_IT_TC, ENABLE); + } + + INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; +} +#endif + +static void extmoduleNoneStart() +{ + #if 0 + if (!IS_TRAINER_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } + + GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Pin = EXTMODULE_PPM_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(EXTMODULE_PPM_GPIO, &GPIO_InitStructure); - GPIO_SetBits(EXTMODULE_PPM_GPIO, EXTMODULE_PPM_GPIO_PIN) ; // Set high - - RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock - TIM1->CR1 &= ~TIM_CR1_CEN ; - TIM1->ARR = 36000 ; // 18mS - TIM1->CCR2 = 32000 ; // Update time - TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + EXTMODULE_TIMER->ARR = 36000 ; // 18mS + EXTMODULE_TIMER->CCR2 = 32000 ; // Update time + EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz - TIM1->CCER = TIM_CCER_CC3E ; + EXTMODULE_TIMER->CCMR2 = 0 ; + EXTMODULE_TIMER->EGR = 1 ; // Restart - TIM1->CCMR2 = 0 ; - TIM1->EGR = 1 ; // Restart - - TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p - TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt - TIM1->CR1 |= TIM_CR1_CEN ; - NVIC_EnableIRQ(TIM1_CC_IRQn) ; - NVIC_SetPriority(TIM1_CC_IRQn, 7); + EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ; + NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ; + NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7); + #endif } -void disable_no_pulses(uint32_t port) +static void extmoduleNoneStop() { - NVIC_DisableIRQ(TIM1_CC_IRQn) ; - TIM1->DIER &= ~TIM_DIER_CC2IE ; - TIM1->CR1 &= ~TIM_CR1_CEN ; + #if 0 + NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ; + EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + #endif } -void init_crossfire(uint32_t port) -{ -} - -void disable_crossfire(uint32_t port) -{ -} - -void init_pxx(uint32_t port) +static void extmoduleCrossfireStart() { +#if 0 + EXTERNAL_MODULE_ON(); + + GPIO_InitTypeDef GPIO_InitStructure; + GPIO_InitStructure.GPIO_Pin = EXTMODULE_PPM_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT ; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(EXTMODULE_PPM_GPIO, &GPIO_InitStructure); + GPIO_SetBits(EXTMODULE_PPM_GPIO, EXTMODULE_PPM_GPIO_PIN); // Set high + + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + EXTMODULE_TIMER->ARR = 5000 ; // 2.5mS + EXTMODULE_TIMER->CCR2 = 32000 ; // Update time + EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + + EXTMODULE_TIMER->CCMR2 = 0 ; + EXTMODULE_TIMER->EGR = 1 ; // Restart + + EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ; + NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ; + NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7); +#endif +} + +static void extmoduleCrossfireStop() +{ + #if 0 + NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ; + EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + + if (!IS_TRAINER_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } + #endif +} + +void intmodulePxxStart() +{ + NVIC_InitTypeDef NVIC_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + + INTERNAL_MODULE_ON(); + + setupPulsesPXX(INTERNAL_MODULE) ; // TODO not here! + + NVIC_InitStructure.NVIC_IRQChannel = INTMODULE_DMA_STREAM_IRQ; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; /* Not used as 4 bits are used for the pre-emption priority. */; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + +#if 0 + NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = TIM_RF_PRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; /* Not used as 4 bits are used for the pre-emption priority. */; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init( &NVIC_InitStructure ); + + // open heartbit --------------------- + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /* Connect EXTI Line12 to PD12 pin */ + EXTI_InitTypeDef EXTI_InitStructure; + SYSCFG_EXTILineConfig(EXTI_PortSourceGPIOD, EXTI_PinSource12); + EXTI_InitStructure.EXTI_Line = EXTI_Line12; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;/////// + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); + + EXTI15_10_Interrupt_Handler = EXTI15_10_IRQHandler_pxx; +#endif + + // TX Pin + GPIO_PinAFConfig(INTMODULE_TX_GPIO, INTMODULE_TX_GPIO_PinSource, INTMODULE_GPIO_AF); + GPIO_InitStructure.GPIO_Pin = INTMODULE_TX_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(INTMODULE_TX_GPIO, &GPIO_InitStructure); + + // RX Pin + GPIO_PinAFConfig(INTMODULE_RX_GPIO, INTMODULE_RX_GPIO_PinSource, INTMODULE_GPIO_AF); + GPIO_InitStructure.GPIO_Pin = INTMODULE_RX_GPIO_PIN; + GPIO_Init(INTMODULE_RX_GPIO, &GPIO_InitStructure); + + // UART config + USART_DeInit(INTMODULE_USART); + USART_InitTypeDef USART_InitStructure; + USART_InitStructure.USART_BaudRate = 115200; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(INTMODULE_USART, &USART_InitStructure); + USART_Cmd(INTMODULE_USART, ENABLE); + + // open DMA------------------------------ + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); // Enable DMA1 clock + + // Timer + INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + INTMODULE_TIMER->ARR = 18000 ; // 9mS + INTMODULE_TIMER->CCR2 = 15000 ; // Update time + INTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + INTMODULE_TIMER->CCER = TIM_CCER_CC3E ; + INTMODULE_TIMER->CCER = TIM_CCER_CC3E ; + + INTMODULE_TIMER->CCMR2 = 0 ; + INTMODULE_TIMER->EGR = 1 ; // Restart + + INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p + INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + INTMODULE_TIMER->CR1 |= TIM_CR1_CEN ; + NVIC_EnableIRQ(INTMODULE_TIMER_IRQn) ; + NVIC_SetPriority(INTMODULE_TIMER_IRQn, 7); +} + +static void intmodulePxxStop() +{ + + INTERNAL_MODULE_OFF(); +} + +void extmodulePxxStart() +{ + #if 0 EXTERNAL_MODULE_ON(); - // Timer1, channel1 setupPulsesPXX(EXTERNAL_MODULE); - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock GPIO_InitTypeDef GPIO_InitStructure; - RCC_AHB1PeriphClockCmd(EXTMODULE_RCC_AHB1Periph, ENABLE); - GPIO_PinAFConfig(EXTMODULE_PPM_GPIO, EXTMODULE_PPM_GPIO_PinSource, GPIO_AF_TIM1); + GPIO_PinAFConfig(EXTMODULE_PPM_GPIO, EXTMODULE_PPM_GPIO_PinSource, EXTMODULE_PPM_GPIO_AF); GPIO_InitStructure.GPIO_Pin = EXTMODULE_PPM_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; @@ -102,172 +410,173 @@ void init_pxx(uint32_t port) GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(EXTMODULE_PPM_GPIO, &GPIO_InitStructure); - RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock - RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + EXTMODULE_TIMER->ARR = 18000 ; // 9mS + EXTMODULE_TIMER->CCR2 = 15000 ; // Update time + EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + EXTMODULE_TIMER->CCER = TIM_CCER_CC1NE ; + EXTMODULE_TIMER->CR2 = TIM_CR2_OIS1 ; // O/P idle high + EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE ; // Enable outputs + EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0]; + EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high + EXTMODULE_TIMER->EGR = 1 ; // Restart - TIM1->CR1 &= ~TIM_CR1_CEN ; - TIM1->ARR = 18000 ; // 9mS - TIM1->CCR2 = 15000 ; // Update time - TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz - TIM1->CCER = TIM_CCER_CC1E ; - TIM1->CR2 = TIM_CR2_OIS1 ; // O/P idle high - TIM1->BDTR = TIM_BDTR_MOE ; // Enable outputs - TIM1->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0]; - TIM1->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high - TIM1->EGR = 1 ; // Restart - TIM1->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC3 match - TIM1->DCR = 15 ; // TODO check // DMA to CC1 + EXTMODULE_TIMER->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match + EXTMODULE_TIMER->DCR = 13; // Enable the DMA channel here, DMA2 stream 2, channel 7 DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ; - DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM1->DMAR); + DMA2_Stream2->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->DMAR); DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].pxx.pulses[1]); // DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ; // DMA2_Stream2->NDTR = 100 ; DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA - TIM1->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p - TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt - TIM1->CR1 |= TIM_CR1_CEN ; - NVIC_EnableIRQ(TIM1_CC_IRQn); - NVIC_SetPriority(TIM1_CC_IRQn, 7); + EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ; + NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn); + NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7); + #endif } -void disable_pxx(uint32_t port) +static void extmodulePxxStop() { + #if 0 DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA - NVIC_DisableIRQ(TIM1_CC_IRQn) ; - TIM1->DIER &= ~TIM_DIER_CC2IE ; - TIM1->CR1 &= ~TIM_CR1_CEN ; - EXTERNAL_MODULE_OFF(); + NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ; + EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + if (!IS_TRAINER_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } + #endif } #if defined(DSM2) -void init_dsm2(uint32_t port) +static void extmoduleDsm2Start() { + #if 0 + EXTERNAL_MODULE_ON(); - // Timer8 setupPulsesDSM2(EXTERNAL_MODULE); - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock GPIO_InitTypeDef GPIO_InitStructure; - RCC_AHB1PeriphClockCmd(EXTMODULE_RCC_AHB1Periph, ENABLE); - GPIO_PinAFConfig(EXTMODULE_PPM_GPIO, EXTMODULE_PPM_GPIO_PinSource, GPIO_AF_TIM1); + GPIO_PinAFConfig(EXTMODULE_PPM_GPIO, EXTMODULE_PPM_GPIO_PinSource, EXTMODULE_PPM_GPIO_AF); GPIO_InitStructure.GPIO_Pin = EXTMODULE_PPM_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(EXTMODULE_PPM_GPIO, &GPIO_InitStructure); - RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock - RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock - TIM1->CR1 &= ~TIM_CR1_CEN ; - TIM1->ARR = 44000 ; // 22mS - TIM1->CCR2 = 40000 ; // Update time - TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz - TIM1->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ; - TIM1->CR2 = TIM_CR2_OIS1 ; // O/P idle high - TIM1->BDTR = TIM_BDTR_MOE ; // Enable outputs - TIM1->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0]; - TIM1->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high - TIM1->EGR = 1 ; // Restart + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + EXTMODULE_TIMER->ARR = 44000 ; // 22mS + EXTMODULE_TIMER->CCR2 = 40000 ; // Update time + EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + EXTMODULE_TIMER->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ; + EXTMODULE_TIMER->CR2 = TIM_CR2_OIS1 ; // O/P idle high + EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE ; // Enable outputs + EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0]; + EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high + EXTMODULE_TIMER->EGR = 1 ; // Restart -// TIM1->SR &= ~TIM_SR_UIF ; // Clear flag -// TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag - TIM1->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match - TIM1->DCR = 13 ; // DMA to CC1 + EXTMODULE_TIMER->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match + EXTMODULE_TIMER->DCR = 13 ; // DMA to CC1 -// TIM1->CR1 = TIM_CR1_OPM ; // Just run once // Enable the DMA channel here, DMA2 stream 2, channel 7 DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ; - DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM1->DMAR); + DMA2_Stream2->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->DMAR); DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[1]); // DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ; // DMA2_Stream2->NDTR = 100 ; DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA - TIM1->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p - TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt - TIM1->CR1 |= TIM_CR1_CEN ; - NVIC_EnableIRQ(TIM1_CC_IRQn) ; - NVIC_SetPriority(TIM1_CC_IRQn, 7); + EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ; + NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ; + NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7); + #endif } -void disable_dsm2(uint32_t port) +static void extmoduleDsm2Stop() { + #if 0 DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA - NVIC_DisableIRQ(TIM1_CC_IRQn) ; - TIM1->DIER &= ~TIM_DIER_CC2IE ; - TIM1->CR1 &= ~TIM_CR1_CEN ; - EXTERNAL_MODULE_OFF(); + NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ; + EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + if (!IS_TRAINER_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } + #endif } #endif -// PPM output -// Timer 1, channel 1 on PA8 for prototype -// Pin is AF1 function for timer 1 -void init_ppm(uint32_t port) +static void extmodulePpmStart() { + #if 0 EXTERNAL_MODULE_ON(); + configure_pins( EXTMODULE_PPM_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25 | PIN_PUSHPULL ) ; + // Timer1 modulePulsesData[EXTERNAL_MODULE].ppm.ptr = modulePulsesData[EXTERNAL_MODULE].ppm.pulses; - - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock - configure_pins( EXTMODULE_PPM_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25 | PIN_PUSHPULL ) ; - RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock - TIM1->CR1 &= ~TIM_CR1_CEN ; + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; // setupPulsesPPM() is also configuring registers, // so it has to be called after the peripheral is enabled setupPulsesPPM(EXTERNAL_MODULE) ; - TIM1->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ; - TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz + EXTMODULE_TIMER->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ; + EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz - TIM1->CCER = TIM_CCER_CC3E ; + EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1 + EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE ; + EXTMODULE_TIMER->EGR = 1 ; + EXTMODULE_TIMER->DIER = TIM_DIER_UDE ; - TIM1->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1 - TIM1->BDTR = TIM_BDTR_MOE ; - TIM1->EGR = 1 ; - TIM1->DIER = TIM_DIER_UDE ; + EXTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; + EXTMODULE_TIMER->DIER |= TIM_DIER_UIE ; - TIM1->SR &= ~TIM_SR_UIF ; // Clear flag - TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag - TIM1->DIER |= TIM_DIER_CC2IE ; - TIM1->DIER |= TIM_DIER_UIE ; - - TIM1->CR1 = TIM_CR1_CEN ; - NVIC_EnableIRQ(TIM1_CC_IRQn) ; - NVIC_SetPriority(TIM1_CC_IRQn, 7); - NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn) ; - NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 7); + EXTMODULE_TIMER->CR1 = TIM_CR1_CEN ; + NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ; + NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7); + NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn) ; + NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 7); + #endif } -void disable_ppm(uint32_t port) +static void extmodulePpmStop() { - NVIC_DisableIRQ(TIM1_CC_IRQn) ; - NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn) ; - TIM1->DIER &= ~TIM_DIER_CC2IE & ~TIM_DIER_UIE ; - TIM1->CR1 &= ~TIM_CR1_CEN ; - EXTERNAL_MODULE_OFF(); + #if 0 + NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ; + NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn) ; + EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE & ~TIM_DIER_UIE ; + EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ; + if (!IS_TRAINER_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } + #endif } -#if !defined(SIMU) -extern "C" void TIM1_CC_IRQHandler() +#if 0 +extern "C" void TIM8_CC_IRQHandler() { - TIM1->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt - TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag + EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag setupPulses(EXTERNAL_MODULE) ; @@ -276,8 +585,8 @@ extern "C" void TIM1_CC_IRQHandler() DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].pxx.pulses[1]); DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA - TIM1->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0]; - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0]; + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt } #if defined(DSM2) else if (s_current_protocol[EXTERNAL_MODULE] >= PROTO_DSM2_LP45 && s_current_protocol[EXTERNAL_MODULE] <= PROTO_DSM2_DSMX) { @@ -285,29 +594,28 @@ extern "C" void TIM1_CC_IRQHandler() DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[1]); DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA - TIM1->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0]; - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0]; + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt } #endif else if (s_current_protocol[EXTERNAL_MODULE] == PROTO_PPM) { - modulePulsesData[EXTERNAL_MODULE].ppm.ptr = modulePulsesData[EXTERNAL_MODULE].ppm.pulses; - TIM1->DIER |= TIM_DIER_UDE ; - TIM1->SR &= ~TIM_SR_UIF ; // Clear this flag - TIM1->DIER |= TIM_DIER_UIE ; // Enable this interrupt + EXTMODULE_TIMER->DIER |= TIM_DIER_UDE ; + EXTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear this flag + EXTMODULE_TIMER->DIER |= TIM_DIER_UIE ; // Enable this interrupt } else { - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt } } -extern "C" void TIM1_UP_TIM10_IRQHandler() +extern "C" void TIM8_UP_TIM13_IRQHandler() { - TIM1->SR &= ~TIM_SR_UIF ; // Clear flag + EXTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag - TIM1->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ; + EXTMODULE_TIMER->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ; if (*modulePulsesData[EXTERNAL_MODULE].ppm.ptr == 0) { - TIM1->SR &= ~TIM_SR_CC2IF ; // Clear this flag - TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt + EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear this flag + EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt } } #endif diff --git a/radio/src/targets/horus/pwr_driver.cpp b/radio/src/targets/horus/pwr_driver.cpp index e04fc8dec..ab83fec2f 100644 --- a/radio/src/targets/horus/pwr_driver.cpp +++ b/radio/src/targets/horus/pwr_driver.cpp @@ -24,14 +24,14 @@ void pwrInit() { GPIO_InitTypeDef GPIO_InitStructure; - GPIO_InitStructure.GPIO_Pin = PWR_GPIO_PIN_ON; + GPIO_InitStructure.GPIO_Pin = PWR_ON_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_Init(PWR_GPIO, &GPIO_InitStructure); - GPIO_InitStructure.GPIO_Pin = PWR_GPIO_PIN_SWITCH; + GPIO_InitStructure.GPIO_Pin = PWR_SWITCH_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; GPIO_Init(PWR_GPIO, &GPIO_InitStructure); @@ -44,12 +44,23 @@ void pwrInit() GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_Init(EXTMODULE_PWR_GPIO, &GPIO_InitStructure); + // TODO not here + GPIO_ResetBits(INTMODULE_PWR_GPIO, INTMODULE_PWR_GPIO_PIN); + GPIO_InitStructure.GPIO_Pin = INTMODULE_PWR_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(INTMODULE_PWR_GPIO, &GPIO_InitStructure); + + GPIO_ResetBits(EXTMODULE_PWR_GPIO, EXTMODULE_PWR_GPIO_PIN); + GPIO_InitStructure.GPIO_Pin = EXTMODULE_PWR_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_Init(EXTMODULE_PWR_GPIO, &GPIO_InitStructure); + pwrOn(); } void pwrOn() { - GPIO_SetBits(PWR_GPIO, PWR_GPIO_PIN_ON); + GPIO_SetBits(PWR_GPIO, PWR_ON_GPIO_PIN); } void pwrOff() @@ -67,10 +78,10 @@ void pwrOff() // Shutdown the Haptic hapticDone(); - GPIO_ResetBits(PWR_GPIO, PWR_GPIO_PIN_ON); + GPIO_ResetBits(PWR_GPIO, PWR_ON_GPIO_PIN); } uint32_t pwrPressed() { - return GPIO_ReadInputDataBit(PWR_GPIO, PWR_GPIO_PIN_SWITCH) == Bit_RESET; + return GPIO_ReadInputDataBit(PWR_GPIO, PWR_SWITCH_GPIO_PIN) == Bit_RESET; } diff --git a/radio/src/targets/horus/telemetry_driver.cpp b/radio/src/targets/horus/telemetry_driver.cpp index 628d35d25..57cf1f861 100644 --- a/radio/src/targets/horus/telemetry_driver.cpp +++ b/radio/src/targets/horus/telemetry_driver.cpp @@ -1,25 +1,27 @@ -/* - * Copyright (C) OpenTX - * - * Based on code named - * th9x - http://code.google.com/p/th9x - * er9x - http://code.google.com/p/er9x - * gruvin9x - http://code.google.com/p/gruvin9x - * - * License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - +/* + * Copyright (C) OpenTX + * + * Based on code named + * th9x - http://code.google.com/p/th9x + * er9x - http://code.google.com/p/er9x + * gruvin9x - http://code.google.com/p/gruvin9x + * + * License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + #include "../../opentx.h" +extern Fifo<512> telemetryFifo; + void telemetryPortInit(uint32_t baudrate) { if (baudrate == 0) { @@ -33,18 +35,18 @@ void telemetryPortInit(uint32_t baudrate) GPIO_PinAFConfig(TELEMETRY_GPIO, TELEMETRY_GPIO_PinSource_RX, TELEMETRY_GPIO_AF); GPIO_PinAFConfig(TELEMETRY_GPIO, TELEMETRY_GPIO_PinSource_TX, TELEMETRY_GPIO_AF); - GPIO_InitStructure.GPIO_Pin = TELEMETRY_GPIO_PIN_TX | TELEMETRY_GPIO_PIN_RX; + GPIO_InitStructure.GPIO_Pin = TELEMETRY_TX_GPIO_PIN | TELEMETRY_RX_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(TELEMETRY_GPIO, &GPIO_InitStructure); - GPIO_InitStructure.GPIO_Pin = TELEMETRY_GPIO_PIN_DIR; + GPIO_InitStructure.GPIO_Pin = TELEMETRY_DIR_GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(TELEMETRY_GPIO_DIR, &GPIO_InitStructure); - GPIO_ResetBits(TELEMETRY_GPIO_DIR, TELEMETRY_GPIO_PIN_DIR); + GPIO_ResetBits(TELEMETRY_GPIO_DIR, TELEMETRY_DIR_GPIO_PIN); USART_InitStructure.USART_BaudRate = baudrate; USART_InitStructure.USART_WordLength = USART_WordLength_8b; @@ -67,11 +69,17 @@ struct SportTxBuffer uint32_t count; } sportTxBuffer; +void telemetryPortSetDirectionOutput() +{ + TELEMETRY_GPIO_DIR->BSRRL = TELEMETRY_DIR_GPIO_PIN; // output enable + TELEMETRY_USART->CR1 &= ~USART_CR1_RE; // turn off receiver +} + void sportSendBuffer(uint8_t *buffer, uint32_t count) { sportTxBuffer.ptr = buffer ; sportTxBuffer.count = count ; - TELEMETRY_USART->CR1 &= ~USART_CR1_RE ; // turn off receiver + telemetryPortSetDirectionOutput(); TELEMETRY_USART->CR1 |= USART_CR1_TXEIE ; } @@ -97,6 +105,7 @@ extern "C" void TELEMETRY_USART_IRQHandler() if ((status & USART_SR_TC) && (TELEMETRY_USART->CR1 & USART_CR1_TCIE)) { TELEMETRY_USART->CR1 &= ~USART_CR1_TCIE ; // stop Complete interrupt + TELEMETRY_GPIO_DIR->BSRRH = TELEMETRY_DIR_GPIO_PIN ; // output disable TELEMETRY_USART->CR1 |= USART_CR1_RE ; while (status & (USART_FLAG_RXNE)) { status = TELEMETRY_USART->DR; diff --git a/radio/src/targets/horus/trainer_driver.cpp b/radio/src/targets/horus/trainer_driver.cpp index acf91feb0..858d72b48 100644 --- a/radio/src/targets/horus/trainer_driver.cpp +++ b/radio/src/targets/horus/trainer_driver.cpp @@ -24,44 +24,41 @@ extern Fifo<32> sbusFifo; #define setupTrainerPulses() setupPulsesPPM(TRAINER_MODULE) -// Trainer PPM output PB4, Timer 3 channel 1 void init_trainer_ppm() { trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses; - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN; - configure_pins( TRAINER_GPIO_PIN_OUT, PIN_PERIPHERAL | PIN_PORTB | PIN_PER_2 | PIN_OS25 | PIN_PUSHPULL ) ; - configure_pins( TRAINER_GPIO_PIN_IN, PIN_PORTC | PIN_INPUT ) ; - RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; - TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; + configure_pins(TRAINER_GPIO_PIN_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25); + + TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN; // setupTrainerPulses() is also configuring registers, // so it has to be called after the peripheral is enabled - setupTrainerPulses() ; + setupTrainerPulses(); - TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++ ; - TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS - TRAINER_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1 - TRAINER_TIMER->BDTR = TIM_BDTR_MOE ; - TRAINER_TIMER->EGR = 1 ; + TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++; + TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1; // 0.5uS + TRAINER_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE; // PWM mode 1 + TRAINER_TIMER->BDTR = TIM_BDTR_MOE; + TRAINER_TIMER->EGR = 1; - TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag - TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear flag - TRAINER_TIMER->DIER |= TIM_DIER_CC1IE ; - TRAINER_TIMER->DIER |= TIM_DIER_UIE ; + TRAINER_TIMER->SR &= ~TIM_SR_UIF; // Clear flag + TRAINER_TIMER->SR &= ~TIM_SR_CC1IF; // Clear flag + TRAINER_TIMER->DIER |= TIM_DIER_CC1IE; + TRAINER_TIMER->DIER |= TIM_DIER_UIE; - TRAINER_TIMER->CR1 = TIM_CR1_CEN ; - NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ; + TRAINER_TIMER->CR1 = TIM_CR1_CEN; + NVIC_EnableIRQ(TRAINER_TIMER_IRQn); NVIC_SetPriority(TRAINER_TIMER_IRQn, 7); } // TODO - testing void stop_trainer_ppm() { - configure_pins( TRAINER_GPIO_PIN_OUT, PIN_INPUT | PIN_PORTB ) ; // Pin as input - TRAINER_TIMER->DIER = 0 ; // Stop Interrupt - TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter - NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt + configure_pins( TRAINER_GPIO_PIN_OUT, PIN_INPUT | PIN_PORTC ); // Pin as input + TRAINER_TIMER->DIER = 0; // Stop Interrupt + TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop counter + NVIC_DisableIRQ(TRAINER_TIMER_IRQn); // Stop Interrupt } void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive) @@ -76,7 +73,6 @@ void init_trainer_capture() { GPIO_InitTypeDef GPIO_InitStructure; - RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); GPIO_InitStructure.GPIO_Pin = TRAINER_GPIO_PIN_IN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; @@ -85,43 +81,46 @@ void init_trainer_capture() GPIO_Init(TRAINER_GPIO, &GPIO_InitStructure); GPIO_PinAFConfig(TRAINER_GPIO, TRAINER_GPIO_PinSource_IN, TRAINER_GPIO_AF); - RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; - TRAINER_TIMER->ARR = 0xFFFF ; - TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS - TRAINER_TIMER->CR2 = 0 ; - TRAINER_TIMER->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ; - TRAINER_TIMER->CCER = TIM_CCER_CC3E ; - TRAINER_TIMER->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags - TRAINER_TIMER->DIER |= TIM_DIER_CC3IE ; - TRAINER_TIMER->CR1 = TIM_CR1_CEN ; - NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ; + TRAINER_TIMER->ARR = 0xFFFF; + TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1; // 0.5uS + TRAINER_TIMER->CR2 = 0; + TRAINER_TIMER->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0; + TRAINER_TIMER->CCER = TIM_CCER_CC3E; + TRAINER_TIMER->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF; // Clear flags + TRAINER_TIMER->DIER |= TIM_DIER_CC3IE; + TRAINER_TIMER->CR1 = TIM_CR1_CEN; + NVIC_EnableIRQ(TRAINER_TIMER_IRQn); NVIC_SetPriority(TRAINER_TIMER_IRQn, 7); } void stop_trainer_capture() { - TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter + TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop counter TRAINER_TIMER->DIER = 0; // Stop Interrupt - NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt + NVIC_DisableIRQ(TRAINER_TIMER_IRQn); // Stop Interrupt } #if !defined(SIMU) extern "C" void TIM3_IRQHandler() { uint16_t capture = 0; - bool doCapture = false ; + bool doCapture = false; // What mode? in or out? if ( (TRAINER_TIMER->DIER & TIM_DIER_CC3IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC3IF ) ) { // capture mode on trainer jack - capture = TRAINER_TIMER->CCR3 ; - doCapture = true; + capture = TRAINER_TIMER->CCR3; + if (TRAINER_CONNECTED() && currentTrainerMode == TRAINER_MODE_MASTER_TRAINER_JACK) { + doCapture = true; + } } if ( ( TRAINER_TIMER->DIER & TIM_DIER_CC2IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC2IF ) ) { // capture mode on heartbeat pin (external module) - capture = TRAINER_TIMER->CCR2 ; - doCapture = true ; + capture = TRAINER_TIMER->CCR2; + if (currentTrainerMode == TRAINER_MODE_MASTER_CPPM_EXTERNAL_MODULE) { + doCapture = true; + } } if (doCapture) { @@ -131,25 +130,119 @@ extern "C" void TIM3_IRQHandler() // PPM out compare interrupt if ( ( TRAINER_TIMER->DIER & TIM_DIER_CC1IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC1IF ) ) { // compare interrupt - TRAINER_TIMER->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt - TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear flag + TRAINER_TIMER->DIER &= ~TIM_DIER_CC1IE; // stop this interrupt + TRAINER_TIMER->SR &= ~TIM_SR_CC1IF; // Clear flag - setupTrainerPulses() ; + setupTrainerPulses(); trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses; - TRAINER_TIMER->DIER |= TIM_DIER_UDE ; - TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear this flag - TRAINER_TIMER->DIER |= TIM_DIER_UIE ; // Enable this interrupt + TRAINER_TIMER->DIER |= TIM_DIER_UDE; + TRAINER_TIMER->SR &= ~TIM_SR_UIF; // Clear this flag + TRAINER_TIMER->DIER |= TIM_DIER_UIE; // Enable this interrupt } // PPM out update interrupt if ( (TRAINER_TIMER->DIER & TIM_DIER_UIE) && ( TRAINER_TIMER->SR & TIM_SR_UIF ) ) { - TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag - TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++ ; + TRAINER_TIMER->SR &= ~TIM_SR_UIF; // Clear flag + TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++; if ( *trainerPulsesData.ppm.ptr == 0 ) { - TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear this flag - TRAINER_TIMER->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt + TRAINER_TIMER->SR &= ~TIM_SR_CC1IF; // Clear this flag + TRAINER_TIMER->DIER |= TIM_DIER_CC1IE; // Enable this interrupt } } } #endif + +void init_cppm_on_heartbeat_capture(void) +{ + EXTERNAL_MODULE_ON(); + + configure_pins(HEARTBEAT_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2); + + TRAINER_TIMER->ARR = 0xFFFF; + TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1; // 0.5uS + TRAINER_TIMER->CR2 = 0; + TRAINER_TIMER->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0; + TRAINER_TIMER->CCER = TIM_CCER_CC2E; + TRAINER_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag + TRAINER_TIMER->DIER |= TIM_DIER_CC2IE; + TRAINER_TIMER->CR1 = TIM_CR1_CEN; + NVIC_SetPriority(TRAINER_TIMER_IRQn, 7); + NVIC_EnableIRQ(TRAINER_TIMER_IRQn); +} + +void stop_cppm_on_heartbeat_capture(void) +{ + TRAINER_TIMER->DIER = 0; + TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop counter + NVIC_DisableIRQ(TRAINER_TIMER_IRQn); // Stop Interrupt + + if (!IS_PULSES_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } +} + +void init_sbus_on_heartbeat_capture() +{ + EXTERNAL_MODULE_ON(); + + #if 0 + USART_InitTypeDef USART_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + + GPIO_PinAFConfig(GPIOC, HEARTBEAT_GPIO_PinSource, HEARTBEAT_GPIO_AF); + + GPIO_InitStructure.GPIO_Pin = HEARTBEAT_GPIO_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + USART_InitStructure.USART_BaudRate = 100000; + USART_InitStructure.USART_WordLength = USART_WordLength_9b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_Even; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx; + + USART_Init(HEARTBEAT_USART, &USART_InitStructure); + USART_Cmd(HEARTBEAT_USART, ENABLE); + USART_ITConfig(HEARTBEAT_USART, USART_IT_RXNE, ENABLE); + + NVIC_SetPriority(HEARTBEAT_USART_IRQn, 6); + NVIC_EnableIRQ(HEARTBEAT_USART_IRQn); + #endif +} + +void stop_sbus_on_heartbeat_capture(void) +{ + #if 0 + configure_pins(HEARTBEAT_GPIO_PIN, PIN_INPUT | PIN_PORTC); + NVIC_DisableIRQ(HEARTBEAT_USART_IRQn); + #endif + if (!IS_PULSES_EXTERNAL_MODULE()) { + EXTERNAL_MODULE_OFF(); + } +} + +#if 0 // !defined(SIMU) && !defined(REV9E) +extern "C" void HEARTBEAT_USART_IRQHandler() +{ + uint32_t status; + uint8_t data; + + status = HEARTBEAT_USART->SR; + + while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) { + data = HEARTBEAT_USART->DR; + + if (!(status & USART_FLAG_ERRORS)) { + if (currentTrainerMode == TRAINER_MODE_MASTER_SBUS_EXTERNAL_MODULE) + sbusFifo.push(data); + } + + status = HEARTBEAT_USART->SR; + } +} +#endif