Applets pulled from ersky9x
This commit is contained in:
bsongis
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/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2011, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
|
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* this list of conditions and the disclaimer below.
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||||
*
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||||
* Atmel's name may not be used to endorse or promote products derived from
|
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* this software without specific prior written permission.
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*
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||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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/**
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* \page sam3s_ek_board_desc SAM3S-EK - Board Description
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*
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* \section Purpose
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*
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* A file is dedicated to descibe the AT91SAM3S-EK board.
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*
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* \section Contents
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*
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* - For AT91SAM3S-EK information, see \subpage sam3s_ek_board_info.
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* - For operating frequency information, see \subpage sam3s_ek_opfreq.
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* - For using portable PIO definitions, see \subpage sam3s_ek_piodef.
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* - For on-board memories, see \subpage sam3s_ek_mem.
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* - Several USB definitions are included here, see \subpage sam3s_ek_usb.
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* - For External components, see \subpage sam3s_ek_extcomp.
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* - For Individual chip definition, see \subpage sam3s_ek_chipdef.
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*
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* To get more software details and the full list of parameters related to the
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* SAM3S-EK board configuration, please have a look at the source file:
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* \ref board.h\n
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*
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* \section Usage
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*
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* - The code for booting the board is provided by board_cstartup_xxx.c and
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* board_lowlevel.c.
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* - For using board PIOs, board characteristics (clock, etc.) and external
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* components, see board.h.
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* - For manipulating memories, see board_memories.h.
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*
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* This file can be used as a template and modified to fit a custom board, with
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* specific PIOs usage or memory connections.
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*/
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/**
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* \file board.h
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*
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* Definition of AT91SAM3S-EK characteristics, AT91SAM3S-dependant PIOs and
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* external components interfacing.
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*/
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#ifndef _BOARD_
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#define _BOARD_
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/*----------------------------------------------------------------------------
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* Headers
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*----------------------------------------------------------------------------*/
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#include <chip.h>
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//#include <include/at45d.h>
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//#include <include/at45_spi.h>
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#include <include/board_lowlevel.h>
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//#include <include/board_memories.h>
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//#include <include/hamming.h>
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//#include <include/math.h>
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//#include <include/uart_console.h>
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/*----------------------------------------------------------------------------
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* Definitions
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*----------------------------------------------------------------------------*/
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/*----------------------------------------------------------------------------*/
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/**
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* \page sam3s_ek_board_info "SAM3S-EK - Board informations"
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* This page lists several definition related to the board description.
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*
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* \section Definitions
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* - \ref BOARD_NAME
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*/
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/** Name of the board */
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#define BOARD_NAME "ATSAM3S-EK"
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/** Board definition */
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#define atsam3sek
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/** Family definition (already defined) */
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#define atsam3s
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/** Core definition */
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#define cortexm3
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/*
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#define BOARD_REV_A
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*/
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#define BOARD_REV_B
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/*----------------------------------------------------------------------------*/
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/**
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* \page sam3s_ek_opfreq "SAM3S-EK - Operating frequencies"
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* This page lists several definition related to the board operating frequency
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* (when using the initialization done by board_lowlevel.c).
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*
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* \section Definitions
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* - \ref BOARD_MAINOSC
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* - \ref BOARD_MCK
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*/
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/** Frequency of the board main oscillator */
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#define BOARD_MAINOSC 12000000
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/** Master clock frequency (when using board_lowlevel.c) */
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#define BOARD_MCK 64000000
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/*----------------------------------------------------------------------------*/
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/**
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* \page sam3s_ek_piodef "SAM3S-EK - PIO definitions"
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* This pages lists all the pio definitions contained in board.h. The constants
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* are named using the following convention: PIN_* for a constant which defines
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* a single Pin instance (but may include several PIOs sharing the same
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* controller), and PINS_* for a list of Pin instances.
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*
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* ADC
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* - \ref PIN_ADC0_AD0
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* - \ref PIN_ADC0_AD1
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* - \ref PIN_ADC0_AD2
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* - \ref PIN_ADC0_AD3
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* - \ref PIN_ADC0_AD4
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* - \ref PIN_ADC0_AD5
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* - \ref PIN_ADC0_AD6
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* - \ref PIN_ADC0_AD7
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* - \ref PINS_ADC
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*
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* UART
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* - \ref PINS_UART
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*
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* EBI
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* - \ref PIN_EBI_DATA_BUS
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* - \ref PIN_EBI_NRD
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* - \ref PIN_EBI_NWE
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* - \ref PIN_EBI_NCS0
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* - \ref PIN_EBI_PSRAM_ADDR_BUS
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* - \ref PIN_EBI_PSRAM_NBS
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* - \ref PIN_EBI_A1
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* - \ref PIN_EBI_NCS1
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* - \ref PIN_EBI_LCD_RS
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*
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* LEDs
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* - \ref PIN_LED_0
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* - \ref PIN_LED_1
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* - \ref PIN_LED_2
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* - \ref PINS_LEDS
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*
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* MCI
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* - \ref PINS_MCI
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*
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* Push buttons
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* - \ref PIN_PUSHBUTTON_1
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* - \ref PIN_PUSHBUTTON_2
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* - \ref PINS_PUSHBUTTONS
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* - \ref PUSHBUTTON_BP1
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* - \ref PUSHBUTTON_BP2
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*
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* PWMC
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* - \ref PIN_PWMC_PWMH0
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* - \ref PIN_PWMC_PWML0
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* - \ref PIN_PWMC_PWMH1
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* - \ref PIN_PWMC_PWML1
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* - \ref PIN_PWMC_PWMH2
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* - \ref PIN_PWMC_PWML2
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* - \ref PIN_PWMC_PWMH3
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* - \ref PIN_PWMC_PWML3
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* - \ref PIN_PWM_LED0
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* - \ref PIN_PWM_LED1
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* - \ref PIN_PWM_LED2
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* - \ref CHANNEL_PWM_LED0
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* - \ref CHANNEL_PWM_LED1
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* - \ref CHANNEL_PWM_LED2
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*
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* SPI
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* - \ref PIN_SPI_MISO
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* - \ref PIN_SPI_MOSI
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* - \ref PIN_SPI_SPCK
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* - \ref PINS_SPI
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* - \ref PIN_SPI_NPCS0_PA11
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*
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* SSC
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* - \ref PIN_SSC_TD
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* - \ref PIN_SSC_TK
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* - \ref PIN_SSC_TF
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* - \ref PINS_SSC_CODEC
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*
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* PCK0
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* - \ref PIN_PCK0
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*
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* PIO PARALLEL CAPTURE
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* - \ref PIN_PIODCEN1
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* - \ref PIN_PIODCEN2
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*
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* TWI
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* - \ref TWI_V3XX
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* - \ref PIN_TWI_TWD0
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* - \ref PIN_TWI_TWCK0
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* - \ref PINS_TWI0
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* - \ref PIN_TWI_TWD1
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* - \ref PIN_TWI_TWCK1
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* - \ref PINS_TWI1
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*
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* USART0
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* - \ref PIN_USART0_RXD
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* - \ref PIN_USART0_TXD
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* - \ref PIN_USART0_CTS
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* - \ref PIN_USART0_RTS
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* - \ref PIN_USART0_SCK
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*
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* USB
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* - \ref PIN_USB_VBUS
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*
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* NandFlash
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* - \ref PIN_EBI_NANDOE
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* - \ref PIN_EBI_NANDWE
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* - \ref PIN_EBI_NANDCLE
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* - \ref PIN_EBI_NANDALE
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* - \ref PIN_EBI_NANDIO
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* - \ref BOARD_NF_CE_PIN
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* - \ref BOARD_NF_RB_PIN
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* - \ref PINS_NANDFLASH
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*
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* QTouch
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* PIO definitions for Slider
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* \ref SLIDER_IOMASK_SNS
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* \ref SLIDER_IOMASK_SNSK
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* \ref PINS_SLIDER_SNS
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* \ref PINS_SLIDER_SNSK
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*
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* PIO definitions for keys
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* \ref KEY_IOMASK_SNS
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* \ref KEY_IOMASK_SNSK
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* \ref PINS_KEY_SNS
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* \ref PINS_KEY_SNSK
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*
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* PIOS for QTouch
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* \ref PINS_QTOUCH
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*/
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/** ADC_AD0 pin definition. */
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#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD1 pin definition. */
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#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD2 pin definition. */
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#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD3 pin definition. */
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#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD4 pin definition. */
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#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD5 pin definition. */
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#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD6 pin definition. */
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#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/** ADC_AD7 pin definition. */
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#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
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/** Pins ADC */
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#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
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/** Startup time max, return from Idle mode (in µs) */
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#define ADC_STARTUP_TIME_MAX 15
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/** Track and hold Acquisition Time min (in ns) */
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#define ADC_TRACK_HOLD_TIME_MIN 1200
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/** ADC clock frequence */
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#define BOARD_ADC_FREQ (6000000)
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/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
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#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/** EBI Data Bus pins */
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#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI NRD pin */
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#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI NWE pin */
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#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI NCS0 pin */
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#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI pins for PSRAM address bus */
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#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI pins for PSRAM NBS pins */
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#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
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{1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI A1 pin */
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#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
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/** EBI NCS1 pin */
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#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */
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/** EBI pin for LCD RS */
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#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */
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#define LED_BLUE 0
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#define LED_GREEN 1
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#define LED_RED 2
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#ifdef BOARD_REV_A
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||||
/** LED #0 pin definition (BLUE). */
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||||
#define PIN_LED_0 {PIO_PC20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
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||||
/** LED #1 pin definition (GREEN). */
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#define PIN_LED_1 {PIO_PC21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
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||||
/** LED #2 pin definition (RED). */
|
||||
#define PIN_LED_2 {PIO_PC22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
#endif
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||||
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#ifdef BOARD_REV_B
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||||
/** LED #0 pin definition (BLUE). */
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#define PIN_LED_0 {PIO_PA19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #1 pin definition (GREEN). */
|
||||
#define PIN_LED_1 {PIO_PA20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #2 pin definition (RED). */
|
||||
#define PIN_LED_2 {PIO_PC20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
|
||||
#endif
|
||||
|
||||
/** List of all LEDs definitions. */
|
||||
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
|
||||
|
||||
/** MCI pins definition. */
|
||||
#define PINS_MCI {0x3fUL << 26, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_PULLUP}
|
||||
/** MCI pin Card Detect. */
|
||||
#ifdef BOARD_REV_A
|
||||
#define PIN_MCI_CD {PIO_PA15, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
#ifdef BOARD_REV_B
|
||||
#define PIN_MCI_CD {PIO_PA6, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */
|
||||
#define PIN_PUSHBUTTON_1 {PIO_PB3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_RISE_EDGE}
|
||||
/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */
|
||||
#define PIN_PUSHBUTTON_2 {PIO_PC12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_FALL_EDGE}
|
||||
/** List of all push button definitions. */
|
||||
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
|
||||
|
||||
/** Push button #1 index. */
|
||||
#define PUSHBUTTON_BP1 0
|
||||
/** Push button #2 index. */
|
||||
#define PUSHBUTTON_BP2 1
|
||||
|
||||
/** Simulated joystick LEFT index. */
|
||||
#define JOYSTICK_LEFT 0
|
||||
/** Simulated joystick RIGHT index. */
|
||||
#define JOYSTICK_RIGHT 1
|
||||
|
||||
/** PWMC PWM0 pin definition: Output High. */
|
||||
#define PIN_PWMC_PWMH0 {PIO_PC18B_PWMH0, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM0 pin definition: Output Low. */
|
||||
#define PIN_PWMC_PWML0 {PIO_PA19B_PWML0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM1 pin definition: Output High. */
|
||||
#define PIN_PWMC_PWMH1 {PIO_PC19B_PWMH1, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM1 pin definition: Output Low. */
|
||||
#define PIN_PWMC_PWML1 {PIO_PA20B_PWML1, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM2 pin definition: Output High. */
|
||||
#define PIN_PWMC_PWMH2 {PIO_PC20B_PWMH2, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM2 pin definition: Output Low. */
|
||||
#define PIN_PWMC_PWML2 {PIO_PA16C_PWML2, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||
/** PWMC PWM3 pin definition: Output High. */
|
||||
#define PIN_PWMC_PWMH3 {PIO_PC21B_PWMH3, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM3 pin definition: Output Low. */
|
||||
#define PIN_PWMC_PWML3 {PIO_PA15C_PWML3, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||
/** PWM pins definition for LED0 */
|
||||
#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0
|
||||
/** PWM pins definition for LED1 */
|
||||
#define PIN_PWM_LED1 PIN_PWMC_PWMH1, PIN_PWMC_PWML1
|
||||
/** PWM pins definition for LED2 */
|
||||
#define PIN_PWM_LED2 PIN_PWMC_PWMH2, PIN_PWMC_PWML2
|
||||
/** PWM channel for LED0 */
|
||||
#define CHANNEL_PWM_LED0 0
|
||||
/** PWM channel for LED1 */
|
||||
#define CHANNEL_PWM_LED1 1
|
||||
/** PWM channel for LED2 */
|
||||
#define CHANNEL_PWM_LED2 2
|
||||
|
||||
/** SPI MISO pin definition. */
|
||||
#define PIN_SPI_MISO {PIO_PA12A_MISO, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI MOSI pin definition. */
|
||||
#define PIN_SPI_MOSI {PIO_PA13A_MOSI, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI SPCK pin definition. */
|
||||
#define PIN_SPI_SPCK {PIO_PA14A_SPCK, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI chip select pin definition. */
|
||||
#define PIN_SPI_NPCS0_PA11 {PIO_PA11A_NPCS0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
|
||||
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
|
||||
|
||||
/** SSC pin Transmitter Data (TD) */
|
||||
#define PIN_SSC_TD {PIO_PA17A_TD, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SSC pin Transmitter Clock (TK) */
|
||||
#define PIN_SSC_TK {PIO_PA16A_TK, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SSC pin Transmitter FrameSync (TF) */
|
||||
#define PIN_SSC_TF {PIO_PA15A_TF, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SSC pins definition for codec. */
|
||||
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
|
||||
|
||||
/** PCK0 */
|
||||
#define PIN_PCK0 {PIO_PA6B_PCK0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PCK1 {PIO_PA17B_PCK1,PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
|
||||
/** PIO PARALLEL CAPTURE */
|
||||
/** Parallel Capture Mode Data Enable1 */
|
||||
#define PIN_PIODCEN1 PIO_PA15
|
||||
/** Parallel Capture Mode Data Enable2 */
|
||||
#define PIN_PIODCEN2 PIO_PA16
|
||||
|
||||
/** TWI ver 3.xx */
|
||||
#define TWI_V3XX
|
||||
/** TWI0 data pin */
|
||||
#define PIN_TWI_TWD0 {PIO_PA3A_TWD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** TWI0 clock pin */
|
||||
#define PIN_TWI_TWCK0 {PIO_PA4A_TWCK0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** TWI0 pins */
|
||||
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
|
||||
/** TWI1 data pin */
|
||||
#define PIN_TWI_TWD1 {PIO_PB4A_TWD1, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** TWI1 clock pin */
|
||||
#define PIN_TWI_TWCK1 {PIO_PB5A_TWCK1, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** TWI1 pins */
|
||||
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
|
||||
|
||||
/** USART0 pin RX */
|
||||
#define PIN_USART0_RXD {PIO_PA5A_RXD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART0 pin TX */
|
||||
#define PIN_USART0_TXD {PIO_PA6A_TXD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART0 pin CTS */
|
||||
#define PIN_USART0_CTS {PIO_PA8A_CTS0, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART0 pin RTS */
|
||||
#define PIN_USART0_RTS {PIO_PA7A_RTS0, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART0 pin SCK */
|
||||
#define PIN_USART0_SCK {PIO_PA2B_SCK0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/** USART1 pin RX */
|
||||
#define PIN_USART1_RXD {PIO_PA21A_RXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART1 pin TX */
|
||||
#define PIN_USART1_TXD {PIO_PA22A_TXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART1 pin CTS */
|
||||
#define PIN_USART1_CTS {PIO_PA25A_CTS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART1 pin RTS */
|
||||
#define PIN_USART1_RTS {PIO_PA24A_RTS1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** USART1 pin ENABLE */
|
||||
#define PIN_USART1_EN {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/** USART1 pin SCK */
|
||||
#define PIN_USART1_SCK {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/** USB VBus monitoring pin definition. */
|
||||
#ifdef BOARD_REV_A
|
||||
#define PIN_USB_VBUS {PIO_PC23, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
#ifdef BOARD_REV_B
|
||||
#define PIN_USB_VBUS {PIO_PC21, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
/** NandFlash pins definition: OE. */
|
||||
#define PIN_EBI_NANDOE {PIO_PC9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
/** NandFlash pins definition: WE. */
|
||||
#define PIN_EBI_NANDWE {PIO_PC10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
/** NandFlash pins definition: CLE. */
|
||||
#define PIN_EBI_NANDCLE {PIO_PC17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
/** NandFlash pins definition: ALE. */
|
||||
#define PIN_EBI_NANDALE {PIO_PC16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
/** NandFlash pins definition: DATA. */
|
||||
#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
/** Nandflash chip enable pin definition. */
|
||||
#define BOARD_NF_CE_PIN {PIO_PC14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
|
||||
/** Nandflash controller peripheral pins definition. */
|
||||
#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, PIN_EBI_NANDOE, \
|
||||
PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE
|
||||
|
||||
/* PIO definitions for Slider */
|
||||
#define SLIDER_IOMASK_SNS (uint32_t)(PIO_PA0 | PIO_PA2 | PIO_PA4)
|
||||
#define SLIDER_IOMASK_SNSK (uint32_t)(PIO_PA1 | PIO_PA3 | PIO_PA5)
|
||||
#define PINS_SLIDER_SNS {SLIDER_IOMASK_SNS, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
#define PINS_SLIDER_SNSK {SLIDER_IOMASK_SNSK, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
|
||||
/* PIO definitions for keys */
|
||||
#define KEY_IOMASK_SNS (uint32_t)(PIO_PC22 | PIO_PC24 | PIO_PC26 | PIO_PC28 | PIO_PC30)
|
||||
#define KEY_IOMASK_SNSK (uint32_t)(PIO_PC23 | PIO_PC25 | PIO_PC27 | PIO_PC29 | PIO_PC31)
|
||||
#define PINS_KEY_SNS {KEY_IOMASK_SNS, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
#define PINS_KEY_SNSK {KEY_IOMASK_SNSK, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
|
||||
/* PIOS for QTouch */
|
||||
#define PINS_QTOUCH PINS_SLIDER_SNS, PINS_SLIDER_SNSK, PINS_KEY_SNS, PINS_KEY_SNSK
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \page sam3s_ek_usb "SAM3S-EK - USB device"
|
||||
*
|
||||
* \section Definitions
|
||||
* - \ref BOARD_USB_BMATTRIBUTES
|
||||
* - \ref CHIP_USB_UDP
|
||||
* - \ref CHIP_USB_PULLUP_INTERNAL
|
||||
* - \ref CHIP_USB_NUMENDPOINTS
|
||||
* - \ref CHIP_USB_ENDPOINTS_MAXPACKETSIZE
|
||||
* - \ref CHIP_USB_ENDPOINTS_BANKS
|
||||
*/
|
||||
|
||||
/** USB attributes configuration descriptor (bus or self powered, remote wakeup) */
|
||||
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
|
||||
|
||||
/** Indicates chip has an UDP Full Speed. */
|
||||
#define CHIP_USB_UDP
|
||||
|
||||
/** Indicates chip has an internal pull-up. */
|
||||
#define CHIP_USB_PULLUP_INTERNAL
|
||||
|
||||
/** Number of USB endpoints */
|
||||
#define CHIP_USB_NUMENDPOINTS 8
|
||||
|
||||
/** Endpoints max paxcket size */
|
||||
#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \
|
||||
((i == 0) ? 64 : \
|
||||
((i == 1) ? 64 : \
|
||||
((i == 2) ? 64 : \
|
||||
((i == 3) ? 64 : \
|
||||
((i == 4) ? 512 : \
|
||||
((i == 5) ? 512 : \
|
||||
((i == 6) ? 64 : \
|
||||
((i == 7) ? 64 : 0 ))))))))
|
||||
|
||||
/** Endpoints Number of Bank */
|
||||
#define CHIP_USB_ENDPOINTS_BANKS(i) \
|
||||
((i == 0) ? 1 : \
|
||||
((i == 1) ? 2 : \
|
||||
((i == 2) ? 2 : \
|
||||
((i == 3) ? 1 : \
|
||||
((i == 4) ? 2 : \
|
||||
((i == 5) ? 2 : \
|
||||
((i == 6) ? 2 : \
|
||||
((i == 7) ? 2 : 0 ))))))))
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \page sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||
* This page lists the definitions related to external on-board components
|
||||
* located in the board.h file for the AT91SAM3S-EK.
|
||||
*
|
||||
* SD Card
|
||||
* - \ref BOARD_SD_PINS
|
||||
* - \ref BOARD_SD_PIN_CD
|
||||
*
|
||||
* LCD
|
||||
* - \ref BOARD_LCD_ILI9325
|
||||
* - \ref BOARD_LCD_PINS
|
||||
* - \ref BOARD_BACKLIGHT_PIN
|
||||
* - \ref BOARD_LCD_BASE
|
||||
* - \ref BOARD_LCD_RS
|
||||
* - \ref BOARD_LCD_WIDTH
|
||||
* - \ref BOARD_LCD_HEIGHT
|
||||
*
|
||||
* TouchScreen
|
||||
* - \ref BOARD_TSC_ADS7843
|
||||
* - \ref PIN_TCS_IRQ
|
||||
* - \ref PIN_TCS_BUSY
|
||||
* - \ref BOARD_TSC_SPI_BASE
|
||||
* - \ref BOARD_TSC_SPI_ID
|
||||
* - \ref BOARD_TSC_SPI_PINS
|
||||
* - \ref BOARD_TSC_NPCS
|
||||
* - \ref BOARD_TSC_NPCS_PIN
|
||||
*
|
||||
* SmartCard
|
||||
* - \ref SMARTCARD_CONNECT_PIN
|
||||
* - \ref PIN_ISO7816_RSTMC
|
||||
* - \ref PINS_ISO7816
|
||||
*/
|
||||
|
||||
/** MCI pins that shall be configured to access the SD card. */
|
||||
#define BOARD_SD_PINS PINS_MCI
|
||||
/** MCI Card Detect pin. */
|
||||
#define BOARD_SD_PIN_CD PIN_MCI_CD
|
||||
|
||||
/** Indicates board has an ILI9325 external component to manage LCD. */
|
||||
#define BOARD_LCD_ILI9325
|
||||
|
||||
/** LCD pins definition. */
|
||||
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, PIN_EBI_NCS1, PIN_EBI_LCD_RS
|
||||
/** Backlight pin definition. */
|
||||
#define BOARD_BACKLIGHT_PIN {PIO_PC13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/** Define ILI9325 base address. */
|
||||
#define BOARD_LCD_BASE 0x61000000
|
||||
/** Define ILI9325 register select signal. */
|
||||
#define BOARD_LCD_RS (1 << 1)
|
||||
/** Display width in pixels. */
|
||||
#define BOARD_LCD_WIDTH 240
|
||||
/** Display height in pixels. */
|
||||
#define BOARD_LCD_HEIGHT 320
|
||||
|
||||
/** Indicates board has an ADS7843 external component to manage Touch Screen */
|
||||
#define BOARD_TSC_ADS7843
|
||||
|
||||
/** Touchscreen controller IRQ pin definition. */
|
||||
#ifdef BOARD_REV_A
|
||||
#define PIN_TSC_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#define PIN_TSC_IRQ_WUP_ID (1 << 3)
|
||||
/** Touchscreen controller Busy pin definition. */
|
||||
#define PIN_TSC_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
#ifdef BOARD_REV_B
|
||||
#define PIN_TSC_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#define PIN_TSC_IRQ_WUP_ID (1 << 15)
|
||||
/** Touchscreen controller Busy pin definition. */
|
||||
#define PIN_TSC_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
/** Base address of SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_BASE SPI
|
||||
/** Identifier of SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_ID ID_SPI
|
||||
/** Pins of the SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_PINS PINS_SPI
|
||||
/** Chip select connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_NPCS 0
|
||||
/** Chip select pin connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11
|
||||
|
||||
/// Smartcard detection pin
|
||||
//#define SMARTCARD_CONNECT_PIN {1 << 13, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
|
||||
/// PIN used for reset the smartcard
|
||||
#define PIN_ISO7816_RSTMC {1 << 11, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/// Pins used for connect the smartcard
|
||||
#define PINS_ISO7816 PIN_USART1_TXD, PIN_USART1_SCK, PIN_ISO7816_RSTMC
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \page sam3s_ek_mem "SAM3S-EK - Memories"
|
||||
* This page lists definitions related to internal & external on-board memories.
|
||||
*
|
||||
* \section SRAM
|
||||
* - \ref AT91C_ISRAM
|
||||
* - \ref AT91C_ISRAM_SIZE
|
||||
*
|
||||
* \section Flash
|
||||
* - \ref AT91C_IFLASH_SIZE
|
||||
* - \ref AT91C_IFLASH_PAGE_SIZE
|
||||
* - \ref AT91C_IFLASH_NB_OF_PAGES
|
||||
* - \ref AT91C_IFLASH_LOCK_REGION_SIZE
|
||||
* - \ref AT91C_IFLASH_NB_OF_LOCK_BITS
|
||||
*
|
||||
* \section NandFlash
|
||||
* - \ref BOARD_NF_COMMAND_ADDR
|
||||
* - \ref BOARD_NF_ADDRESS_ADDR
|
||||
* - \ref BOARD_NF_DATA_ADDR
|
||||
*
|
||||
* \section NorFlash
|
||||
* - \ref BOARD_NORFLASH_ADDR
|
||||
* - \ref BOARD_NORFLASH_DFT_BUS_SIZE
|
||||
*/
|
||||
|
||||
/** Address for transferring command bytes to the nandflash. */
|
||||
#define BOARD_NF_COMMAND_ADDR 0x60400000
|
||||
/** Address for transferring address bytes to the nandflash. */
|
||||
#define BOARD_NF_ADDRESS_ADDR 0x60200000
|
||||
/** Address for transferring data bytes to the nandflash. */
|
||||
#define BOARD_NF_DATA_ADDR 0x60000000
|
||||
|
||||
/** Address for transferring command bytes to the norflash. */
|
||||
#define BOARD_NORFLASH_ADDR 0x63000000
|
||||
/** Default NOR bus size after power up reset */
|
||||
#define BOARD_NORFLASH_DFT_BUS_SIZE 8
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/**
|
||||
* \page sam3s_ek_chipdef "SAM3S-EK - Individual chip definition"
|
||||
* This page lists the definitions related to different chip's definition
|
||||
* located in the board.h file for the SAM3S-EK.
|
||||
*
|
||||
* \section USART
|
||||
* - \ref BOARD_PIN_USART_RXD
|
||||
* - \ref BOARD_PIN_USART_TXD
|
||||
* - \ref BOARD_PIN_USART_CTS
|
||||
* - \ref BOARD_PIN_USART_RTS
|
||||
* - \ref BOARD_PIN_USART_EN
|
||||
* - \ref BOARD_USART_BASE
|
||||
* - \ref BOARD_ID_USART
|
||||
*/
|
||||
|
||||
/** Rtc */
|
||||
#define BOARD_RTC_ID ID_RTC
|
||||
|
||||
/** TWI ID for EEPROM application to use */
|
||||
#define BOARD_ID_TWI_EEPROM ID_TWI1
|
||||
/** TWI ID for SLAVE application to use */
|
||||
#define BOARD_ID_TWI_SLAVE ID_TWI1
|
||||
/** TWI Base for TWI EEPROM application to use */
|
||||
#define BOARD_BASE_TWI_EEPROM TWI1
|
||||
/** TWI Base for TWI SLAVE application to use */
|
||||
#define BOARD_BASE_TWI_SLAVE TWI1
|
||||
/** TWI pins for EEPROM application to use */
|
||||
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
|
||||
/** TWI pins for TWI SLAVE application to use */
|
||||
#define BOARD_PINS_TWI_SLAVE PINS_TWI1
|
||||
|
||||
/** USART RX pin for application */
|
||||
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
|
||||
/** USART TX pin for application */
|
||||
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
|
||||
/** USART CTS pin for application */
|
||||
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
|
||||
/** USART RTS pin for application */
|
||||
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
|
||||
/** USART ENABLE pin for application */
|
||||
#define BOARD_PIN_USART_EN PIN_USART1_EN
|
||||
/** USART Base for application */
|
||||
#define BOARD_USART_BASE USART1
|
||||
/** USART ID for application */
|
||||
#define BOARD_ID_USART ID_USART1
|
||||
|
||||
#endif /* #ifndef _BOARD_ */
|
||||
|
||||
@@ -0,0 +1,46 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/**
|
||||
* \file
|
||||
*
|
||||
* Interface for the low-level initialization function.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef BOARD_LOWLEVEL_H
|
||||
#define BOARD_LOWLEVEL_H
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Exported functions
|
||||
*----------------------------------------------------------------------------*/
|
||||
extern void LowLevelInit( void ) ;
|
||||
|
||||
#endif /* BOARD_LOWLEVEL_H */
|
||||
|
||||
@@ -0,0 +1,81 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Linker script for running in internal SRAM on the AT91SAM3S1
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(ResetException)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x00004000 /* sram, 16K */
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.fixed :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sfixed = .;
|
||||
KEEP(*(.vectors))
|
||||
*(.text*)
|
||||
*(.ramfunc)
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
. = ALIGN(4);
|
||||
_efixed = .; /* End of text section */
|
||||
} > sram
|
||||
|
||||
.relocate : AT (_efixed)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_srelocate = .;
|
||||
*(.data)
|
||||
. = ALIGN(4);
|
||||
_erelocate = .;
|
||||
} >sram
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
. = ALIGN(4);
|
||||
_szero = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
_ezero = .;
|
||||
} >sram
|
||||
|
||||
/* Stack in the end of SRAM */
|
||||
_estack = 0x20003FFC;
|
||||
|
||||
}
|
||||
end = .;
|
||||
@@ -0,0 +1,91 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Linker script for running in internal SRAM on the AT91SAM3S1
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(entry)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0800
|
||||
sram (W!RX) : ORIGIN = 0x20000800, LENGTH = 0x00003800 /* sram, 16K - sizeof(romcodesram) */
|
||||
}
|
||||
|
||||
/* Entry point */
|
||||
/*ENTRY (ResetException)*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* startup code in the .isr_vector */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
*(.mailbox)
|
||||
*(.text .text.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gcc_except_table)
|
||||
*(.rodata .rodata*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} > sram
|
||||
|
||||
/* data */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sidata = .;
|
||||
_sdata = .;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} > sram
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
_szero = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
_ezero = .;
|
||||
} >sram
|
||||
|
||||
/* Stack in SRAM */
|
||||
_sstack = 0x20003FFC;
|
||||
}
|
||||
end = .;
|
||||
@@ -0,0 +1,81 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Linker script for running in internal SRAM on the AT91SAM3S2
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(ResetException)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x00008000 /* sram, 32K */
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.fixed :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sfixed = .;
|
||||
KEEP(*(.vectors))
|
||||
*(.text*)
|
||||
*(.ramfunc)
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
. = ALIGN(4);
|
||||
_efixed = .; /* End of text section */
|
||||
} > sram
|
||||
|
||||
.relocate : AT (_efixed)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_srelocate = .;
|
||||
*(.data)
|
||||
. = ALIGN(4);
|
||||
_erelocate = .;
|
||||
} >sram
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
. = ALIGN(4);
|
||||
_szero = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
_ezero = .;
|
||||
} >sram
|
||||
|
||||
/* Stack in the end of SRAM */
|
||||
_estack = 0x20007FFC;
|
||||
|
||||
}
|
||||
end = .;
|
||||
@@ -0,0 +1,91 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Linker script for running in internal SRAM on the AT91SAM3S2
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(entry)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0800
|
||||
sram (W!RX) : ORIGIN = 0x20000800, LENGTH = 0x00007800 /* sram, 32K - sizeof(romcodesram) */
|
||||
}
|
||||
|
||||
/* Entry point */
|
||||
/*ENTRY (ResetException)*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* startup code in the .isr_vector */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
*(.mailbox)
|
||||
*(.text .text.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gcc_except_table)
|
||||
*(.rodata .rodata*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} > sram
|
||||
|
||||
/* data */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sidata = .;
|
||||
_sdata = .;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} > sram
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
_szero = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
_ezero = .;
|
||||
} >sram
|
||||
|
||||
/* Stack in SRAM */
|
||||
_sstack = 0x20007FFC;
|
||||
}
|
||||
end = .;
|
||||
@@ -0,0 +1,215 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Linker script for running in internal SRAM on the AT91SAM3S4
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
ENTRY(_start)
|
||||
SEARCH_DIR(.)
|
||||
GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
sram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x0000C000 /* sram, 48K */
|
||||
}
|
||||
|
||||
/* These force the linker to search for particular symbols from
|
||||
* the start of the link process and thus ensure the user's
|
||||
* overrides are picked up
|
||||
*/
|
||||
EXTERN(__cs3_reset_generic_m)
|
||||
INCLUDE atsam3s.inc
|
||||
EXTERN(__cs3_interrupt_vector_micro)
|
||||
EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
|
||||
|
||||
PROVIDE(__cs3_heap_start = _end);
|
||||
PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
|
||||
PROVIDE(__cs3_region_num = (__cs3_regions_end - __cs3_regions) / 20);
|
||||
PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
.text :
|
||||
{
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
__cs3_region_start_ram = .;
|
||||
*(.cs3.region-head.ram)
|
||||
ASSERT (. == __cs3_region_start_ram, ".cs3.region-head.ram not permitted");
|
||||
__cs3_interrupt_vector = __cs3_interrupt_vector_micro;
|
||||
*(.cs3.interrupt_vector)
|
||||
/* Make sure we pulled in an interrupt vector. */
|
||||
ASSERT (. != __cs3_interrupt_vector_micro, "No interrupt vector");
|
||||
|
||||
_start = __cs3_reset_generic_m;
|
||||
__cs3_reset = __cs3_reset_generic_m;
|
||||
*(.cs3.reset)
|
||||
/* Make sure we pulled in some reset code. */
|
||||
ASSERT (. != __cs3_reset, "No reset code");
|
||||
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.plt)
|
||||
*(.gnu.warning)
|
||||
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
|
||||
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
*(.gcc_except_table)
|
||||
} >ram
|
||||
.eh_frame_hdr : ALIGN (4)
|
||||
{
|
||||
KEEP (*(.eh_frame_hdr))
|
||||
} >ram
|
||||
.eh_frame : ALIGN (4)
|
||||
{
|
||||
KEEP (*(.eh_frame))
|
||||
} >ram
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} >ram
|
||||
__exidx_end = .;
|
||||
.rodata : ALIGN (4)
|
||||
{
|
||||
*(.rodata .rodata.* .gnu.linkonce.r.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*crtend.o(.ctors))
|
||||
|
||||
. = ALIGN(0x4);
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*crtend.o(.dtors))
|
||||
|
||||
. = ALIGN(4);
|
||||
__cs3_regions = .;
|
||||
LONG (0)
|
||||
LONG (__cs3_region_init_ram)
|
||||
LONG (__cs3_region_start_ram)
|
||||
LONG (__cs3_region_init_size_ram)
|
||||
LONG (__cs3_region_zero_size_ram)
|
||||
__cs3_regions_end = .;
|
||||
|
||||
. = ALIGN (8);
|
||||
_etext = .;
|
||||
} >ram
|
||||
|
||||
.data : ALIGN (8)
|
||||
{
|
||||
|
||||
KEEP(*(.jcr))
|
||||
*(.got.plt) *(.got)
|
||||
*(.shdata)
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
. = ALIGN (8);
|
||||
*(.ram)
|
||||
_edata = .;
|
||||
} >ram
|
||||
.bss :
|
||||
{
|
||||
*(.shbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
*(.ram.b)
|
||||
_end = .;
|
||||
__end = .;
|
||||
} >ram
|
||||
__cs3_region_init_ram = __cs3_region_start_ram;
|
||||
__cs3_region_init_size_ram = _edata - __cs3_region_start_ram;
|
||||
__cs3_region_zero_size_ram = _end - _edata;
|
||||
/* Default to 1M of heap */
|
||||
__cs3_region_size_ram = ALIGN (1024) - __cs3_region_start_ram + 1M;
|
||||
|
||||
.stab 0 (NOLOAD) : { *(.stab) }
|
||||
.stabstr 0 (NOLOAD) : { *(.stabstr) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* DWARF 2.1 */
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
/* checksum: 576d003e2604ff7a1b02791267 */
|
||||
@@ -0,0 +1,91 @@
|
||||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
* Linker script for running in internal SRAM on the AT91SAM3S4
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(entry)
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
romcodesram (W!RX) : ORIGIN = 0x20000000, LENGTH = 0x01000
|
||||
sram (W!RX) : ORIGIN = 0x20001000, LENGTH = 0x0000B000 /* sram, 48K - sizeof(romcodesram) */
|
||||
}
|
||||
|
||||
/* Entry point */
|
||||
/*ENTRY (ResetException)*/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* startup code in the .isr_vector */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_stext = .;
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
*(.mailbox)
|
||||
*(.text .text.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gcc_except_table)
|
||||
*(.rodata .rodata*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} > sram
|
||||
|
||||
/* data */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sidata = .;
|
||||
_sdata = .;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} > sram
|
||||
|
||||
.bss (NOLOAD) : {
|
||||
_szero = .;
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
_ezero = .;
|
||||
} >sram
|
||||
|
||||
/* Stack in SRAM */
|
||||
_sstack = 0x2000BFFC;
|
||||
}
|
||||
end = .;
|
||||
@@ -0,0 +1,63 @@
|
||||
#ifndef _LIB_ATSAM3S_
|
||||
#define _LIB_ATSAM3S_
|
||||
|
||||
/*
|
||||
* Peripherals registers definitions
|
||||
*/
|
||||
#if defined atsam3s4
|
||||
#include <include/ATSAM3S4.h>
|
||||
#elif defined atsam3s2
|
||||
#include <include/ATSAM3S2.h>
|
||||
#elif defined atsam3s1
|
||||
#include <include/ATSAM3S1.h>
|
||||
#else
|
||||
#warning Library does not support the specified chip, specifying atsam3s4.
|
||||
#define atsam3s4
|
||||
#include <include/ATSAM3S4.h>
|
||||
#endif
|
||||
|
||||
|
||||
/* Define attribute */
|
||||
#if defined ( __CC_ARM ) /* Keil µVision 4 */
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#elif defined ( __ICCARM__ ) /* IAR Ewarm 5.41+ */
|
||||
#define WEAK __weak
|
||||
#elif defined ( __GNUC__ ) /* GCC CS3 2009q3-68 */
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#endif
|
||||
|
||||
/* Define NO_INIT attribute */
|
||||
#if defined ( __CC_ARM )
|
||||
#define NO_INIT
|
||||
#elif defined ( __ICCARM__ )
|
||||
#define NO_INIT __no_init
|
||||
#elif defined ( __GNUC__ )
|
||||
#define NO_INIT
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Core
|
||||
*/
|
||||
|
||||
/*
|
||||
* Peripherals
|
||||
*/
|
||||
//#include <include/async.h>
|
||||
//#include <include/efc.h>
|
||||
//#include <include/flashd.h>
|
||||
//#include <include/pio.h>
|
||||
//#include <include/pmc.h>
|
||||
//#include <include/spi.h>
|
||||
//#include <include/spi_pdc.h>
|
||||
//#include <include/twi.h>
|
||||
//#include <include/twid.h>
|
||||
//#include <include/usart.h>
|
||||
|
||||
/*
|
||||
#include <USBD_Config.h>
|
||||
*/
|
||||
|
||||
//#include <include/trace.h>
|
||||
//#include <include/wdt.h>
|
||||
|
||||
#endif /* _LIB_ATSAM3S_ */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user