diff --git a/radio/src/storage/eeprom_raw.cpp b/radio/src/storage/eeprom_raw.cpp
index 0fcfa034f..d97a95038 100644
--- a/radio/src/storage/eeprom_raw.cpp
+++ b/radio/src/storage/eeprom_raw.cpp
@@ -24,8 +24,6 @@
 #include "opentx.h"
 #include "timers.h"
 
-#define EEPROM_SIZE           (4*1024*1024/8)
-#define EEPROM_BLOCK_SIZE     (4*1024)
 #define EEPROM_MARK           0x84697771 /* thanks ;) */
 #define EEPROM_ZONE_SIZE      (8*1024)
 #define EEPROM_BUFFER_SIZE    256
@@ -63,14 +61,6 @@ uint32_t eepromWriteDestinationAddr;
 uint16_t eepromFatAddr = 0;
 uint8_t eepromWriteBuffer[EEPROM_BUFFER_SIZE] __DMA;
 
-void eepromWaitSpiComplete()
-{
-  while (!Spi_complete) {
-    SIMU_SLEEP(5/*ms*/);
-  }
-  Spi_complete = false;
-}
-
 void eepromWaitReadStatus()
 {
   while ((eepromReadStatus() & 1) != 0) {
@@ -81,20 +71,9 @@ void eepromWaitReadStatus()
 void eepromEraseBlock(uint32_t address, bool blocking=true)
 {
   // TRACE("eepromEraseBlock(%d)", address);
-
-#if defined(SIMU)
-  static uint8_t erasedBlock[EEPROM_BLOCK_SIZE]; // can't be on the stack!
-  memset(erasedBlock, 0xff, sizeof(erasedBlock));
-  eeprom_pointer = address;
-  eeprom_buffer_data = erasedBlock;
-  eeprom_buffer_size = EEPROM_BLOCK_SIZE;
-  eeprom_read_operation = false;
-  Spi_complete = false;
-  sem_post(eeprom_write_sem);
-#else
+  
   eepromWriteEnable();
   eepromBlockErase(address);
-#endif
 
   if (blocking) {
     eepromWaitSpiComplete();
@@ -106,18 +85,7 @@ void eepromRead(uint32_t address, uint8_t * buffer, uint32_t size, bool blocking
 {
   // TRACE("eepromRead(%d, %p, %d)", address, buffer, size);
 
-#if defined(SIMU)
-  assert(size);
-  eeprom_pointer = address;
-  eeprom_buffer_data = buffer;
-  eeprom_buffer_size = size;
-  eeprom_read_operation = true;
-  Spi_complete = false;
-  sem_post(eeprom_write_sem);
-#else
   eepromReadArray(address, buffer, size);
-#endif
-
   if (blocking) {
     eepromWaitSpiComplete();
   }
@@ -127,18 +95,8 @@ void eepromWrite(uint32_t address, uint8_t * buffer, uint32_t size, bool blockin
 {
   // TRACE("eepromWrite(%d, %p, %d)", address, buffer, size);
 
-#if defined(SIMU)
-  assert(size);
-  eeprom_pointer = address;
-  eeprom_buffer_data = buffer;
-  eeprom_buffer_size = size+1;
-  eeprom_read_operation = false;
-  Spi_complete = false;
-  sem_post(eeprom_write_sem);
-#else
   eepromWriteEnable();
   eepromByteProgram(address, buffer, size);
-#endif
 
   if (blocking) {
     eepromWaitSpiComplete();
@@ -388,7 +346,7 @@ void eepromWriteProcess()
     case EEPROM_WRITING_BUFFER:
     case EEPROM_ERASING_FAT_BLOCK:
     case EEPROM_WRITING_NEW_FAT:
-      if (Spi_complete) {
+      if (eepromIsSpiComplete()) {
         eepromWriteState = EepromWriteState(eepromWriteState + 1);
       }
       break;
diff --git a/radio/src/targets/simu/simpgmspace.cpp b/radio/src/targets/simu/simpgmspace.cpp
index 101294b18..e4eaa8c6e 100644
--- a/radio/src/targets/simu/simpgmspace.cpp
+++ b/radio/src/targets/simu/simpgmspace.cpp
@@ -311,20 +311,50 @@ void simuSetSwitch(uint8_t swtch, int8_t state)
   }
 }
 
-#if !defined(PCBTARANIS) && !defined(PCBHORUS)
+#if defined(EEPROM_RAW)
+uint8_t Spi_complete = 1;
+void * eeprom_write_function(void *)
+{
+  while (!sem_wait(eeprom_write_sem)) {
+    if (!eeprom_thread_running)
+      return NULL;
+    if (eeprom_read_operation) {
+      assert(eeprom_buffer_size);
+      eepromReadBlock(eeprom_buffer_data, eeprom_pointer, eeprom_buffer_size);
+    }
+    else {
+      if (fp) {
+        if (fseek(fp, eeprom_pointer, SEEK_SET) == -1)
+          perror("error in fseek");
+      }
+      while (--eeprom_buffer_size) {
+        assert(eeprom_buffer_size > 0);
+        if (fp) {
+          if (fwrite(eeprom_buffer_data, 1, 1, fp) != 1)
+            perror("error in fwrite");
+        }
+        else {
+          memcpy(&eeprom[eeprom_pointer], eeprom_buffer_data, 1);
+        }
+        eeprom_pointer++;
+        eeprom_buffer_data++;
+  
+        if (fp && eeprom_buffer_size == 1) {
+          fflush(fp);
+        }
+      }
+    }
+    Spi_complete = 1;
+  }
+  return 0;
+}
+#elif !defined(PCBTARANIS) && !defined(PCBHORUS)
 bool eeprom_thread_running = true;
 void * eeprom_write_function(void *)
 {
   while (!sem_wait(eeprom_write_sem)) {
     if (!eeprom_thread_running)
       return NULL;
-#if defined(CPUARM)
-    if (eeprom_read_operation) {
-      assert(eeprom_buffer_size);
-      eepromReadBlock(eeprom_buffer_data, eeprom_pointer, eeprom_buffer_size);
-    }
-    else {
-#endif
     if (fp) {
       if (fseek(fp, eeprom_pointer, SEEK_SET) == -1)
         perror("error in fseek");
@@ -334,9 +364,7 @@ void * eeprom_write_function(void *)
       if (fp) {
         if (fwrite(eeprom_buffer_data, 1, 1, fp) != 1)
           perror("error in fwrite");
-#if !defined(CPUARM)
         sleep(5/*ms*/);
-#endif
       }
       else {
         memcpy(&eeprom[eeprom_pointer], eeprom_buffer_data, 1);
@@ -348,10 +376,6 @@ void * eeprom_write_function(void *)
         fflush(fp);
       }
     }
-#if defined(CPUARM)
-    }
-    Spi_complete = 1;
-#endif
   }
   return 0;
 }
@@ -1414,3 +1438,39 @@ OS_TID CoCreateTask(FUNCPtr task, void *argv, uint32_t parameter, void * stk, ui
   pthread_create(&tid, NULL, start_routine, (void *)task);
   return tid;
 }
+
+#if defined(EEPROM_RAW)
+void eepromBlockErase(uint32_t address)
+{
+  static uint8_t erasedBlock[EEPROM_BLOCK_SIZE]; // can't be on the stack!
+  memset(erasedBlock, 0xff, sizeof(erasedBlock));
+  eeprom_pointer = address;
+  eeprom_buffer_data = erasedBlock;
+  eeprom_buffer_size = EEPROM_BLOCK_SIZE;
+  eeprom_read_operation = false;
+  Spi_complete = false;
+  sem_post(eeprom_write_sem);
+}
+
+void eepromReadArray(uint32_t address, uint8_t * buffer, uint32_t size)
+{
+  assert(size);
+  eeprom_pointer = address;
+  eeprom_buffer_data = buffer;
+  eeprom_buffer_size = size;
+  eeprom_read_operation = true;
+  Spi_complete = false;
+  sem_post(eeprom_write_sem);
+}
+
+void eepromByteProgram(uint32_t address, uint8_t * buffer, uint32_t size)
+{
+  assert(size);
+  eeprom_pointer = address;
+  eeprom_buffer_data = buffer;
+  eeprom_buffer_size = size + 1;
+  eeprom_read_operation = false;
+  Spi_complete = false;
+  sem_post(eeprom_write_sem);
+}
+#endif
diff --git a/radio/src/targets/simu/simpgmspace.h b/radio/src/targets/simu/simpgmspace.h
index 0a854b60c..fd8b388d8 100644
--- a/radio/src/targets/simu/simpgmspace.h
+++ b/radio/src/targets/simu/simpgmspace.h
@@ -206,7 +206,6 @@ extern uint32_t eeprom_pointer;
 extern uint8_t * eeprom_buffer_data;
 extern volatile int32_t eeprom_buffer_size;
 extern bool eeprom_read_operation;
-extern volatile uint32_t Spi_complete;
 #endif
 
 #if defined(CPUARM)
@@ -491,4 +490,8 @@ extern char simuSdDirectory[1024];
   #define sdMounted()      (true)
 #endif
 
+void eepromBlockErase(uint32_t address);
+void eepromReadArray(uint32_t address, uint8_t * buffer, uint32_t size);
+void eepromByteProgram(uint32_t address, uint8_t * buffer, uint32_t size);
+
 #endif // _SIMPGMSPACE_H_
diff --git a/radio/src/targets/sky9x/board.h b/radio/src/targets/sky9x/board.h
index 145032738..f0b4326c9 100644
--- a/radio/src/targets/sky9x/board.h
+++ b/radio/src/targets/sky9x/board.h
@@ -350,9 +350,12 @@ uint32_t pwroffPressed();
 #define UNEXPECTED_SHUTDOWN()          (g_eeGeneral.unexpectedShutdown)
 
 // EEPROM driver
+#define EEPROM_SIZE           (4*1024*1024/8)
+#define EEPROM_BLOCK_SIZE     (4*1024)
 void eepromInit();
 uint32_t eepromReadStatus();
-extern volatile uint32_t Spi_complete;
+uint8_t eepromIsSpiComplete(void);
+void eepromWaitSpiComplete(void);
 void eepromWriteEnable();
 void eepromBlockErase(uint32_t address);
 void eepromReadArray(uint32_t address, uint8_t * buffer, uint32_t size);
diff --git a/radio/src/targets/sky9x/eeprom_driver.cpp b/radio/src/targets/sky9x/eeprom_driver.cpp
index 1a14ae591..bc8b17250 100644
--- a/radio/src/targets/sky9x/eeprom_driver.cpp
+++ b/radio/src/targets/sky9x/eeprom_driver.cpp
@@ -20,65 +20,73 @@
 
 #include "opentx.h"
 
-volatile uint32_t Spi_complete;
-uint8_t Spi_tx_buf[24] ;
+volatile uint8_t Spi_complete;
+uint8_t Spi_tx_buf[24];
 
-uint32_t eepromTransmitData(register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count )
+uint8_t eepromIsSpiComplete()
+{
+  return Spi_complete;
+}
+
+void eepromWaitSpiComplete()
+{
+  while (!Spi_complete) {
+    SIMU_SLEEP(5/*ms*/);
+  }
+  Spi_complete = false;
+}
+
+uint32_t eepromTransmitData(register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count)
 {
 #ifndef SIMU
 
-  register Spi *spiptr ;
-  register uint32_t condition ;
-  static uint8_t discard_rx_command[4] ;
+  register Spi *spiptr;
+  register uint32_t condition;
+  static uint8_t discard_rx_command[4];
 
-//  PMC->PMC_PCER0 |= 0x00200000L ;             // Enable peripheral clock to SPI
+//  PMC->PMC_PCER0 |= 0x00200000L; // Enable peripheral clock to SPI
 
-  Spi_complete = 0 ;
-  if ( comlen > 4 )
-  {
-    Spi_complete = 1 ;
-    return 0x4FFFF ;
+  Spi_complete = 0;
+  if (comlen > 4) {
+    Spi_complete = 1;
+    return 0x4FFFF;
   }
-  condition = SPI_SR_TXEMPTY ;
-  spiptr = SPI ;
-  spiptr->SPI_CR = 1 ;                    // Enable
-  (void) spiptr->SPI_RDR ;                // Dump any rx data
-  (void) spiptr->SPI_SR ;                 // Clear error flags
-  spiptr->SPI_RPR = (uint32_t)discard_rx_command ;
-  spiptr->SPI_RCR = comlen ;
-  if ( rx )
-  {
-    spiptr->SPI_RNPR = (uint32_t)rx ;
-    spiptr->SPI_RNCR = count ;
-    condition = SPI_SR_RXBUFF ;
+  condition = SPI_SR_TXEMPTY;
+  spiptr = SPI;
+  spiptr->SPI_CR = 1; // Enable
+  (void) spiptr->SPI_RDR; // Dump any rx data
+  (void) spiptr->SPI_SR; // Clear error flags
+  spiptr->SPI_RPR = (uint32_t)discard_rx_command;
+  spiptr->SPI_RCR = comlen;
+  if (rx) {
+    spiptr->SPI_RNPR = (uint32_t)rx;
+    spiptr->SPI_RNCR = count;
+    condition = SPI_SR_RXBUFF;
   }
-  spiptr->SPI_TPR = (uint32_t)command ;
-  spiptr->SPI_TCR = comlen ;
-  if ( tx )
-  {
-    spiptr->SPI_TNPR = (uint32_t)tx ;
+  spiptr->SPI_TPR = (uint32_t)command;
+  spiptr->SPI_TCR = comlen;
+  if (tx) {
+    spiptr->SPI_TNPR = (uint32_t)tx;
   }
-  else
-  {
-    spiptr->SPI_TNPR = (uint32_t)rx ;
+  else {
+    spiptr->SPI_TNPR = (uint32_t)rx;
   }
-  spiptr->SPI_TNCR = count ;
+  spiptr->SPI_TNCR = count;
 
-  spiptr->SPI_PTCR = SPI_PTCR_RXTEN | SPI_PTCR_TXTEN ;    // Start transfers
+  spiptr->SPI_PTCR = SPI_PTCR_RXTEN | SPI_PTCR_TXTEN; // Start transfers
 
   // Wait for things to get started, avoids early interrupt
-  for ( count = 0 ; count < 1000 ; count += 1 )
-  {
-    if ( ( spiptr->SPI_SR & SPI_SR_TXEMPTY ) == 0 )
+  for (count = 0; count < 1000; count += 1) {
+    if ((spiptr->SPI_SR & SPI_SR_TXEMPTY) == 0)
     {
-      break ;
+      break;
     }
   }
-  spiptr->SPI_IER = condition ;
+  spiptr->SPI_IER = condition;
 
 #endif
 
-  return 0 ;
+  return 0;
 }
 
 uint8_t eepromTransmitByte(uint8_t out, bool skipFirst)
@@ -117,7 +125,7 @@ uint8_t eepromTransmitByte(uint8_t out, bool skipFirst)
   }
   
   spiptr->SPI_CR = 2; // Disable
-  return spiptr->SPI_RDR ;
+  return spiptr->SPI_RDR;
 }
 
 enum EepromCommand {
@@ -181,18 +189,18 @@ void eepromBlockErase(uint32_t address)
 // Set clock to 3 MHz, AT25 device is rated to 70MHz, 18MHz would be better
 void eepromInit()
 {
-  register Spi *spiptr ;
-  register uint32_t timer ;
+  register Spi *spiptr;
+  register uint32_t timer;
 
-  PMC->PMC_PCER0 |= 0x00200000L ;               // Enable peripheral clock to SPI
+  PMC->PMC_PCER0 |= 0x00200000L; // Enable peripheral clock to SPI
   /* Configure PIO */
-  configure_pins( 0x00007800, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP ) ;
+  configure_pins(0x00007800, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP);
 
-  spiptr = SPI ;
-  timer = ( Master_frequency / 3000000 ) << 8 ;           // Baud rate 3Mb/s
-  spiptr->SPI_MR = 0x14000011 ;                           // 0001 0100 0000 0000 0000 0000 0001 0001 Master
-  spiptr->SPI_CSR[0] = 0x01180009 | timer ;               // 0000 0001 0001 1000 xxxx xxxx 0000 1001
-  NVIC_EnableIRQ(SPI_IRQn) ;
+  spiptr = SPI;
+  timer = (Master_frequency / 3000000) << 8; // Baud rate 3Mb/s
+  spiptr->SPI_MR = 0x14000011; // 0001 0100 0000 0000 0000 0000 0001 0001 Master
+  spiptr->SPI_CSR[0] = 0x01180009 | timer; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
+  NVIC_EnableIRQ(SPI_IRQn);
 
   eepromWriteEnable();
   eepromWriteStatusRegister();
@@ -201,17 +209,17 @@ void eepromInit()
 #ifndef SIMU
 extern "C" void SPI_IRQHandler()
 {
-  register Spi *spiptr ;
+  register Spi *spiptr;
 
-  spiptr = SPI ;
-  SPI->SPI_IDR = 0x07FF ;                 // All interrupts off
-  spiptr->SPI_CR = 2 ;                    // Disable
-  (void) spiptr->SPI_RDR ;                // Dump any rx data
-  (void) spiptr->SPI_SR ;                 // Clear error flags
-  spiptr->SPI_PTCR = SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS ;  // Stop tramsfers
-  Spi_complete = 1 ;                                      // Indicate completion
+  spiptr = SPI;
+  SPI->SPI_IDR = 0x07FF; // All interrupts off
+  spiptr->SPI_CR = 2; // Disable
+  (void) spiptr->SPI_RDR; // Dump any rx data
+  (void) spiptr->SPI_SR; // Clear error flags
+  spiptr->SPI_PTCR = SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS; // Stop tramsfers
+  Spi_complete = 1; // Indicate completion
 
 // Power save
-//  PMC->PMC_PCER0 &= ~0x00200000L ;      // Disable peripheral clock to SPI
+//  PMC->PMC_PCER0 &= ~0x00200000L; // Disable peripheral clock to SPI
 }
 #endif