Directory transmitter renamed to radio
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/*
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* Authors (alphabetical order)
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* - Andre Bernet <bernet.andre@gmail.com>
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* - Andreas Weitl
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* - Bertrand Songis <bsongis@gmail.com>
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* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
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* - Cameron Weeks <th9xer@gmail.com>
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* - Erez Raviv
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* - Gabriel Birkus
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* - Jean-Pierre Parisy
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* - Karl Szmutny
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* - Michael Blandford
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* - Michal Hlavinka
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* - Pat Mackenzie
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* - Philip Moss
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* - Rob Thomson
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* - Romolo Manfredini <romolo.manfredini@gmail.com>
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* - Thomas Husterer
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*
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* opentx is based on code named
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* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
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* er9x by Erez Raviv: http://code.google.com/p/er9x/,
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* and the original (and ongoing) project by
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* Thomas Husterer, th9x: http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "../../opentx.h"
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uint8_t currentTrainerMode;
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uint16_t * TrainerPulsePtr;
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extern uint16_t ppmStream[NUM_MODULES+1][20];
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#define setupTrainerPulses() setupPulsesPPM(TRAINER_MODULE)
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// Trainer PPM oputput PC9, Timer 3 channel 4, (Alternate Function 2)
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void init_trainer_ppm()
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{
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setupTrainerPulses() ;
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TrainerPulsePtr = ppmStream[TRAINER_MODULE];
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
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configure_pins( PIN_TR_PPM_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25 | PIN_PUSHPULL ) ;
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configure_pins( PIN_TR_PPM_IN, PIN_PORTA | PIN_INPUT ) ;
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
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TIM3->ARR = *TrainerPulsePtr++ ;
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TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
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TIM3->CCER = TIM_CCER_CC4E ;
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if(!g_model.moduleData[TRAINER_MODULE].ppmPulsePol)
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TIM3->CCER |= TIM_CCER_CC4P;
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TIM3->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
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TIM3->CCR4 = (g_model.moduleData[TRAINER_MODULE].ppmDelay*50+300)*2;
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TIM3->BDTR = TIM_BDTR_MOE ;
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TIM3->EGR = 1 ;
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// TIM3->DIER = TIM_DIER_UDE ;
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TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM3->DIER |= TIM_DIER_CC2IE ;
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TIM3->DIER |= TIM_DIER_UIE ;
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TIM3->CR1 = TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM3_IRQn) ;
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}
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// TODO - testing
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void stop_trainer_ppm()
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{
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configure_pins( PIN_TR_PPM_OUT, PIN_INPUT | PIN_PORTC ) ; // Pin as input
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TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
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TIM3->DIER &= ~TIM_DIER_CC2IE ; // Stop Interrupt
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TIM3->DIER &= ~TIM_DIER_UIE ; // Stop Interrupt
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NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
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}
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// Trainer capture, PC8, Timer 3 channel 3
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void init_trainer_capture()
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{
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
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configure_pins (PIN_TR_PPM_IN, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2) ;
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
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TIM3->ARR = 0xFFFF ;
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TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
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TIM3->CR2 = 0 ;
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TIM3->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ;
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TIM3->CCER = TIM_CCER_CC3E ;
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TIM3->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
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TIM3->DIER |= TIM_DIER_CC3IE ;
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TIM3->CR1 = TIM_CR1_CEN ;
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NVIC_EnableIRQ(TIM3_IRQn) ;
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}
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void stop_trainer_capture()
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{
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TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
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TIM3->DIER &= ~TIM_DIER_CC3IE ; // Stop Interrupt
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NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
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}
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extern "C" void TIM3_IRQHandler()
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{
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uint16_t capture ;
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static uint16_t lastCapt ;
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uint16_t val ;
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// What mode? in or out?
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if ( (TIM3->DIER & TIM_DIER_CC3IE ) && ( TIM3->SR & TIM_SR_CC3IF ) ) {
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// capture mode
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capture = TIM3->CCR3 ;
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val = (uint16_t)(capture - lastCapt) / 2 ;
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lastCapt = capture;
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// We prcoess g_ppmInsright here to make servo movement as smooth as possible
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// while under trainee control
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if ((val>4000) && (val < 19000)) { // G: Prioritize reset pulse. (Needed when less than 8 incoming pulses)
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ppmInState = 1; // triggered
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}
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else {
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if (ppmInState && (ppmInState<=8)) {
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if ((val>800) && (val<2200)) {
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g_ppmIns[ppmInState++ - 1] = (int16_t)(val - 1500)*(g_eeGeneral.PPM_Multiplier+10)/10; //+-500 != 512, but close enough.
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}
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else {
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ppmInState = 0; // not triggered
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}
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}
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}
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}
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// PPM out compare interrupt
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if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
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// compare interrupt
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM3->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
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setupTrainerPulses() ;
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TrainerPulsePtr = ppmStream[TRAINER_MODULE];
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TIM3->DIER |= TIM_DIER_UDE ;
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TIM3->SR &= ~TIM_SR_UIF ; // Clear this flag
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TIM3->DIER |= TIM_DIER_UIE ; // Enable this interrupt
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}
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// PPM out update interrupt
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if ( (TIM3->DIER & TIM_DIER_UIE) && ( TIM3->SR & TIM_SR_UIF ) ) {
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TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
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TIM3->ARR = *TrainerPulsePtr++ ;
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if ( *TrainerPulsePtr == 0 ) {
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear this flag
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TIM3->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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}
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}
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}
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