diff --git a/radio/bootloader/makefile b/radio/bootloader/Makefile
similarity index 85%
rename from radio/bootloader/makefile
rename to radio/bootloader/Makefile
index c046f1c2e..9e61997ab 100644
--- a/radio/bootloader/makefile
+++ b/radio/bootloader/Makefile
@@ -123,24 +123,24 @@ endif
UADEFS =
ifeq ($(PCB), TARANIS)
-SRC = system_stm32f2xx.c \
- stm32f2xx_rcc.c \
- stm32f2xx_gpio.c \
- stm32f2xx_spi.c \
- misc.c \
- ccsbcs.c \
- usb/usb_core.c \
- usb/usb_dcd.c \
- usb/usb_dcd_int.c \
- usb/usbd_core.c \
- usb/usbd_ioreq.c \
- usb/usbd_req.c \
- usb/usbd_msc_data.c \
- usb/usbd_msc_scsi.c \
- usb/usbd_msc_bot.c \
- usb/usbd_msc_core.c \
- usb/usbd_desc.c \
- usb/usb_bsp.c
+SRC = system_stm32f2xx.c \
+ stm32f2xx_rcc.c \
+ stm32f2xx_gpio.c \
+ stm32f2xx_spi.c \
+ misc.c \
+ ccsbcs.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_OTG_Driver/src/usb_core.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_OTG_Driver/src/usb_dcd.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_OTG_Driver/src/usb_dcd_int.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_core.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_ioreq.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Core/src/usbd_req.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/msc/src/usbd_msc_data.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/msc/src/usbd_msc_scsi.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/msc/src/usbd_msc_bot.c \
+ ../src/targets/taranis/STM32_USB-Host-Device_Lib_V2.1.0/Libraries/STM32_USB_Device_Library/Class/msc/src/usbd_msc_core.c \
+ ../src/targets/taranis/usbd_desc.c \
+ ../src/targets/taranis/usb_bsp.c
CPPSRC = aspi.cpp \
lcd_driver.cpp \
diff --git a/radio/bootloader/boot.cpp b/radio/bootloader/boot.cpp
index 01a1dbdca..ae8627f11 100644
--- a/radio/bootloader/boot.cpp
+++ b/radio/bootloader/boot.cpp
@@ -68,7 +68,7 @@
extern "C" {
#include "usb_dcd_int.h"
#include "usb_bsp.h"
-#include "usbd_desc.h"
+#include "../src/targets/taranis/usbd_desc.h"
#include "usbd_msc_core.h"
#include "usbd_usr.h"
}
diff --git a/radio/bootloader/include/usbd_desc.h b/radio/bootloader/include/usbd_desc.h
deleted file mode 100644
index 75b694e76..000000000
--- a/radio/bootloader/include/usbd_desc.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_desc.h
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief header file for the usbd_desc.c file
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-
-#ifndef __USB_DESC_H
-#define __USB_DESC_H
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_def.h"
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-/** @defgroup USB_DESC
- * @brief general defines for the usb device library file
- * @{
- */
-
-/** @defgroup USB_DESC_Exported_Defines
- * @{
- */
-#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
-#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
-#define USB_STRING_DESCRIPTOR_TYPE 0x03
-#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
-#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
-#define USB_SIZ_DEVICE_DESC 18
-#define USB_SIZ_STRING_LANGID 4
-
-/**
- * @}
- */
-
-
-/** @defgroup USBD_DESC_Exported_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-
-/** @defgroup USBD_DESC_Exported_Macros
- * @{
- */
-/**
- * @}
- */
-
-/** @defgroup USBD_DESC_Exported_Variables
- * @{
- */
-extern uint8_t USBD_DeviceDesc [USB_SIZ_DEVICE_DESC];
-extern uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ];
-extern uint8_t USBD_OtherSpeedCfgDesc[USB_LEN_CFG_DESC];
-extern uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC];
-extern uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID];
-extern USBD_DEVICE USR_desc;
-/**
- * @}
- */
-
-/** @defgroup USBD_DESC_Exported_FunctionsPrototype
- * @{
- */
-
-
-uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length);
-uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length);
-uint8_t * USBD_USR_ManufacturerStrDescriptor ( uint8_t speed , uint16_t *length);
-uint8_t * USBD_USR_ProductStrDescriptor ( uint8_t speed , uint16_t *length);
-uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length);
-uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length);
-uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length);
-
-#ifdef USB_SUPPORT_USER_STRING_DESC
-uint8_t * USBD_USR_USRStringDesc (uint8_t speed, uint8_t idx , uint16_t *length);
-#endif /* USB_SUPPORT_USER_STRING_DESC */
-
-/**
- * @}
- */
-
-#endif /* __USBD_DESC_H */
-
-/**
- * @}
- */
-
-/**
-* @}
-*/
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usb_bsp.c b/radio/bootloader/usb/usb_bsp.c
deleted file mode 100644
index bd43c8a0f..000000000
--- a/radio/bootloader/usb/usb_bsp.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/**
- ******************************************************************************
- * @file usb_bsp.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file is responsible to offer board support package and is
- * configurable by user.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f2xx_rcc.h"
-#include "stm32f2xx_gpio.h"
-#include "misc.h"
-#include "usb_bsp.h"
-#include "usbd_conf.h"
-
-extern uint32_t SystemCoreClock;
-
-/**
-* @brief USB_OTG_BSP_Init
-* Initilizes BSP configurations
-* @param None
-* @retval None
-*/
-
-void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
-{
- GPIO_InitTypeDef GPIO_InitStructure;
-
- RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA , ENABLE);
-
- /* Configure SOF ID DM DP Pins */
- GPIO_InitStructure.GPIO_Pin = // GPIO_Pin_8 |
- GPIO_Pin_11 |
- GPIO_Pin_12;
-
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
-
- //GPIO_PinAFConfig(GPIOA,GPIO_PinSource8,GPIO_AF_OTG1_FS) ;
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource11,GPIO_AF_OTG1_FS) ;
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource12,GPIO_AF_OTG1_FS) ;
-
- /* Configure VBUS Pin */
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
-
-/* // Configure ID pin
- GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
- GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
- GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
- GPIO_Init(GPIOA, &GPIO_InitStructure);
- GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_OTG1_FS) ;
-*/
- RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
- RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE) ;
-}
-/**
-* @brief USB_OTG_BSP_EnableInterrupt
-* Enabele USB Global interrupt
-* @param None
-* @retval None
-*/
-void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
-{
- NVIC_InitTypeDef NVIC_InitStructure;
-
- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
- NVIC_InitStructure.NVIC_IRQChannel = OTG_FS_IRQn;
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
- NVIC_Init(&NVIC_InitStructure);
-}
-/**
-* @brief USB_OTG_BSP_uDelay
-* This function provides delay time in micro sec
-* @param usec : Value of delay required in micro sec
-* @retval None
-*/
-void USB_OTG_BSP_uDelay (const uint32_t usec)
-{
- uint32_t count = 0;
- const uint32_t utime = ((SystemCoreClock/1000000) * usec);
- do
- {
- if ( ++count > utime )
- {
- return ;
- }
- }
- while (1);
-}
-
-
-/**
-* @brief USB_OTG_BSP_mDelay
-* This function provides delay time in milli sec
-* @param msec : Value of delay required in milli sec
-* @retval None
-*/
-void USB_OTG_BSP_mDelay (const uint32_t msec)
-{
- USB_OTG_BSP_uDelay(msec * 1000);
-}
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usb_core.c b/radio/bootloader/usb/usb_core.c
deleted file mode 100644
index 12a207d81..000000000
--- a/radio/bootloader/usb/usb_core.c
+++ /dev/null
@@ -1,2162 +0,0 @@
-/**
- ******************************************************************************
- * @file usb_core.c
- * @author MCD Application Team
- * @version V2.1.0
- * @date 19-March-2012
- * @brief USB-OTG Core Layer
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usb_core.h"
-#include "usb_bsp.h"
-
-
-/** @addtogroup USB_OTG_DRIVER
-* @{
-*/
-
-/** @defgroup USB_CORE
-* @brief This file includes the USB-OTG Core Layer
-* @{
-*/
-
-
-/** @defgroup USB_CORE_Private_Defines
-* @{
-*/
-
-/**
-* @}
-*/
-
-
-/** @defgroup USB_CORE_Private_TypesDefinitions
-* @{
-*/
-/**
-* @}
-*/
-
-
-
-/** @defgroup USB_CORE_Private_Macros
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_CORE_Private_Variables
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_CORE_Private_FunctionPrototypes
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_CORE_Private_Functions
-* @{
-*/
-
-/**
-* @brief USB_OTG_EnableCommonInt
-* Initializes the commmon interrupts, used in both device and modes
-* @param pdev : Selected device
-* @retval None
-*/
-static void USB_OTG_EnableCommonInt(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTMSK_TypeDef int_mask;
-
- int_mask.d32 = 0;
- /* Clear any pending USB_OTG Interrupts */
-#ifndef USE_OTG_MODE
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GOTGINT, 0xFFFFFFFF);
-#endif
- /* Clear any pending interrupts */
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, 0xBFFFFFFF);
- /* Enable the interrupts in the INTMSK */
- int_mask.b.wkupintr = 1;
- int_mask.b.usbsuspend = 1;
-
-#ifdef USE_OTG_MODE
- int_mask.b.otgintr = 1;
- int_mask.b.sessreqintr = 1;
- int_mask.b.conidstschng = 1;
-#endif
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTMSK, int_mask.d32);
-}
-
-/**
-* @brief USB_OTG_CoreReset : Soft reset of the core
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-static USB_OTG_STS USB_OTG_CoreReset(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- __IO USB_OTG_GRSTCTL_TypeDef greset;
- uint32_t count = 0;
-
- greset.d32 = 0;
- /* Wait for AHB master IDLE state. */
- do
- {
- USB_OTG_BSP_uDelay(3);
- greset.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GRSTCTL);
- if (++count > 200000)
- {
- return USB_OTG_OK;
- }
- }
- while (greset.b.ahbidle == 0);
- /* Core Soft Reset */
- count = 0;
- greset.b.csftrst = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GRSTCTL, greset.d32 );
- do
- {
- greset.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GRSTCTL);
- if (++count > 200000)
- {
- break;
- }
- }
- while (greset.b.csftrst == 1);
- /* Wait for 3 PHY Clocks*/
- USB_OTG_BSP_uDelay(3);
- return status;
-}
-
-/**
-* @brief USB_OTG_WritePacket : Writes a packet into the Tx FIFO associated
-* with the EP
-* @param pdev : Selected device
-* @param src : source pointer
-* @param ch_ep_num : end point number
-* @param bytes : No. of bytes
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_WritePacket(USB_OTG_CORE_HANDLE *pdev,
- uint8_t *src,
- uint8_t ch_ep_num,
- uint16_t len)
-{
- USB_OTG_STS status = USB_OTG_OK;
- if (pdev->cfg.dma_enable == 0)
- {
- uint32_t count32b= 0 , i= 0;
- __IO uint32_t *fifo;
-
- count32b = (len + 3) / 4;
- fifo = pdev->regs.DFIFO[ch_ep_num];
- for (i = 0; i < count32b; i++, src+=4)
- {
- USB_OTG_WRITE_REG32( fifo, *((__packed uint32_t *)src) );
- }
- }
- return status;
-}
-
-
-/**
-* @brief USB_OTG_ReadPacket : Reads a packet from the Rx FIFO
-* @param pdev : Selected device
-* @param dest : Destination Pointer
-* @param bytes : No. of bytes
-* @retval None
-*/
-void *USB_OTG_ReadPacket(USB_OTG_CORE_HANDLE *pdev,
- uint8_t *dest,
- uint16_t len)
-{
- uint32_t i=0;
- uint32_t count32b = (len + 3) / 4;
-
- __IO uint32_t *fifo = pdev->regs.DFIFO[0];
-
- for ( i = 0; i < count32b; i++, dest += 4 )
- {
- *(__packed uint32_t *)dest = USB_OTG_READ_REG32(fifo);
-
- }
- return ((void *)dest);
-}
-
-/**
-* @brief USB_OTG_SelectCore
-* Initialize core registers address.
-* @param pdev : Selected device
-* @param coreID : USB OTG Core ID
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_SelectCore(USB_OTG_CORE_HANDLE *pdev,
- USB_OTG_CORE_ID_TypeDef coreID)
-{
- uint32_t i , baseAddress = 0;
- USB_OTG_STS status = USB_OTG_OK;
-
- pdev->cfg.dma_enable = 0;
-
- /* at startup the core is in FS mode */
- pdev->cfg.speed = USB_OTG_SPEED_FULL;
- pdev->cfg.mps = USB_OTG_FS_MAX_PACKET_SIZE ;
-
- /* initialize device cfg following its address */
- if (coreID == USB_OTG_FS_CORE_ID)
- {
- baseAddress = USB_OTG_FS_BASE_ADDR;
- pdev->cfg.coreID = USB_OTG_FS_CORE_ID;
- pdev->cfg.host_channels = 8 ;
- pdev->cfg.dev_endpoints = 4 ;
- pdev->cfg.TotalFifoSize = 320; /* in 32-bits */
- pdev->cfg.phy_itface = USB_OTG_EMBEDDED_PHY;
-
-#ifdef USB_OTG_FS_SOF_OUTPUT_ENABLED
- pdev->cfg.Sof_output = 1;
-#endif
-
-#ifdef USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
- pdev->cfg.low_power = 1;
-#endif
- }
- else if (coreID == USB_OTG_HS_CORE_ID)
- {
- baseAddress = USB_OTG_HS_BASE_ADDR;
- pdev->cfg.coreID = USB_OTG_HS_CORE_ID;
- pdev->cfg.host_channels = 12 ;
- pdev->cfg.dev_endpoints = 6 ;
- pdev->cfg.TotalFifoSize = 1280;/* in 32-bits */
-
-#ifdef USB_OTG_ULPI_PHY_ENABLED
- pdev->cfg.phy_itface = USB_OTG_ULPI_PHY;
-#else
-#ifdef USB_OTG_EMBEDDED_PHY_ENABLED
- pdev->cfg.phy_itface = USB_OTG_EMBEDDED_PHY;
-#endif
-#endif
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- pdev->cfg.dma_enable = 1;
-#endif
-
-#ifdef USB_OTG_HS_SOF_OUTPUT_ENABLED
- pdev->cfg.Sof_output = 1;
-#endif
-
-#ifdef USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
- pdev->cfg.low_power = 1;
-#endif
-
- }
-
- pdev->regs.GREGS = (USB_OTG_GREGS *)(baseAddress + \
- USB_OTG_CORE_GLOBAL_REGS_OFFSET);
- pdev->regs.DREGS = (USB_OTG_DREGS *) (baseAddress + \
- USB_OTG_DEV_GLOBAL_REG_OFFSET);
-
- for (i = 0; i < pdev->cfg.dev_endpoints; i++)
- {
- pdev->regs.INEP_REGS[i] = (USB_OTG_INEPREGS *) \
- (baseAddress + USB_OTG_DEV_IN_EP_REG_OFFSET + \
- (i * USB_OTG_EP_REG_OFFSET));
- pdev->regs.OUTEP_REGS[i] = (USB_OTG_OUTEPREGS *) \
- (baseAddress + USB_OTG_DEV_OUT_EP_REG_OFFSET + \
- (i * USB_OTG_EP_REG_OFFSET));
- }
- pdev->regs.HREGS = (USB_OTG_HREGS *)(baseAddress + \
- USB_OTG_HOST_GLOBAL_REG_OFFSET);
- pdev->regs.HPRT0 = (uint32_t *)(baseAddress + USB_OTG_HOST_PORT_REGS_OFFSET);
-
- for (i = 0; i < pdev->cfg.host_channels; i++)
- {
- pdev->regs.HC_REGS[i] = (USB_OTG_HC_REGS *)(baseAddress + \
- USB_OTG_HOST_CHAN_REGS_OFFSET + \
- (i * USB_OTG_CHAN_REGS_OFFSET));
- }
- for (i = 0; i < pdev->cfg.host_channels; i++)
- {
- pdev->regs.DFIFO[i] = (uint32_t *)(baseAddress + USB_OTG_DATA_FIFO_OFFSET +\
- (i * USB_OTG_DATA_FIFO_SIZE));
- }
- pdev->regs.PCGCCTL = (uint32_t *)(baseAddress + USB_OTG_PCGCCTL_OFFSET);
-
- return status;
-}
-
-
-/**
-* @brief USB_OTG_CoreInit
-* Initializes the USB_OTG controller registers and prepares the core
-* device mode or host mode operation.
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_GUSBCFG_TypeDef usbcfg;
- USB_OTG_GCCFG_TypeDef gccfg;
- USB_OTG_GAHBCFG_TypeDef ahbcfg;
-
- usbcfg.d32 = 0;
- gccfg.d32 = 0;
- ahbcfg.d32 = 0;
-
-
-
- if (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY)
- {
- gccfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GCCFG);
- gccfg.b.pwdn = 0;
-
- if (pdev->cfg.Sof_output)
- {
- gccfg.b.sofouten = 1;
- }
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GCCFG, gccfg.d32);
-
- /* Init The ULPI Interface */
- usbcfg.d32 = 0;
- usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
-
- usbcfg.b.physel = 0; /* HS Interface */
-#ifdef USB_OTG_INTERNAL_VBUS_ENABLED
- usbcfg.b.ulpi_ext_vbus_drv = 0; /* Use internal VBUS */
-#else
-#ifdef USB_OTG_EXTERNAL_VBUS_ENABLED
- usbcfg.b.ulpi_ext_vbus_drv = 1; /* Use external VBUS */
-#endif
-#endif
- usbcfg.b.term_sel_dl_pulse = 0; /* Data line pulsing using utmi_txvalid */
-
- usbcfg.b.ulpi_fsls = 0;
- usbcfg.b.ulpi_clk_sus_m = 0;
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
-
- /* Reset after a PHY select */
- USB_OTG_CoreReset(pdev);
-
- if(pdev->cfg.dma_enable == 1)
- {
-
- ahbcfg.b.hburstlen = 5; /* 64 x 32-bits*/
- ahbcfg.b.dmaenable = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);
-
- }
- }
- else /* FS interface (embedded Phy) */
- {
-
- usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);;
- usbcfg.b.physel = 1; /* FS Interface */
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
- /* Reset after a PHY select and set Host mode */
- USB_OTG_CoreReset(pdev);
- /* Deactivate the power down*/
- gccfg.d32 = 0;
- gccfg.b.pwdn = 1;
-
- gccfg.b.vbussensingA = 1 ;
- gccfg.b.vbussensingB = 1 ;
-#ifndef VBUS_SENSING_ENABLED
- gccfg.b.disablevbussensing = 1;
-#endif
-
- if(pdev->cfg.Sof_output)
- {
- gccfg.b.sofouten = 1;
- }
-
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GCCFG, gccfg.d32);
- USB_OTG_BSP_mDelay(20);
- }
- /* case the HS core is working in FS mode */
- if(pdev->cfg.dma_enable == 1)
- {
-
- ahbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GAHBCFG);
- ahbcfg.b.hburstlen = 5; /* 64 x 32-bits*/
- ahbcfg.b.dmaenable = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);
-
- }
- /* initialize OTG features */
-#ifdef USE_OTG_MODE
- usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
- usbcfg.b.hnpcap = 1;
- usbcfg.b.srpcap = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
- USB_OTG_EnableCommonInt(pdev);
-#endif
- return status;
-}
-/**
-* @brief USB_OTG_EnableGlobalInt
-* Enables the controller's Global Int in the AHB Config reg
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EnableGlobalInt(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_GAHBCFG_TypeDef ahbcfg;
-
- ahbcfg.d32 = 0;
- ahbcfg.b.glblintrmsk = 1; /* Enable interrupts */
- USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GAHBCFG, 0, ahbcfg.d32);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_DisableGlobalInt
-* Enables the controller's Global Int in the AHB Config reg
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_DisableGlobalInt(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_GAHBCFG_TypeDef ahbcfg;
- ahbcfg.d32 = 0;
- ahbcfg.b.glblintrmsk = 1; /* Enable interrupts */
- USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32, 0);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
-* @param pdev : Selected device
-* @param num : FO num
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_FlushTxFifo (USB_OTG_CORE_HANDLE *pdev , uint32_t num )
-{
- USB_OTG_STS status = USB_OTG_OK;
- __IO USB_OTG_GRSTCTL_TypeDef greset;
-
- uint32_t count = 0;
- greset.d32 = 0;
- greset.b.txfflsh = 1;
- greset.b.txfnum = num;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GRSTCTL, greset.d32 );
- do
- {
- greset.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GRSTCTL);
- if (++count > 200000)
- {
- break;
- }
- }
- while (greset.b.txfflsh == 1);
- /* Wait for 3 PHY Clocks*/
- USB_OTG_BSP_uDelay(3);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_FlushRxFifo : Flush a Rx FIFO
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_FlushRxFifo( USB_OTG_CORE_HANDLE *pdev )
-{
- USB_OTG_STS status = USB_OTG_OK;
- __IO USB_OTG_GRSTCTL_TypeDef greset;
- uint32_t count = 0;
-
- greset.d32 = 0;
- greset.b.rxfflsh = 1;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GRSTCTL, greset.d32 );
- do
- {
- greset.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GRSTCTL);
- if (++count > 200000)
- {
- break;
- }
- }
- while (greset.b.rxfflsh == 1);
- /* Wait for 3 PHY Clocks*/
- USB_OTG_BSP_uDelay(3);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_SetCurrentMode : Set ID line
-* @param pdev : Selected device
-* @param mode : (Host/device)
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_SetCurrentMode(USB_OTG_CORE_HANDLE *pdev , uint8_t mode)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_GUSBCFG_TypeDef usbcfg;
-
- usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
-
- usbcfg.b.force_host = 0;
- usbcfg.b.force_dev = 0;
-
- if ( mode == HOST_MODE)
- {
- usbcfg.b.force_host = 1;
- }
- else if ( mode == DEVICE_MODE)
- {
- usbcfg.b.force_dev = 1;
- }
-
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
- USB_OTG_BSP_mDelay(50);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_GetMode : Get current mode
-* @param pdev : Selected device
-* @retval current mode
-*/
-uint32_t USB_OTG_GetMode(USB_OTG_CORE_HANDLE *pdev)
-{
- return (USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTSTS ) & 0x1);
-}
-
-
-/**
-* @brief USB_OTG_IsDeviceMode : Check if it is device mode
-* @param pdev : Selected device
-* @retval num_in_ep
-*/
-uint8_t USB_OTG_IsDeviceMode(USB_OTG_CORE_HANDLE *pdev)
-{
- return (USB_OTG_GetMode(pdev) != HOST_MODE);
-}
-
-
-/**
-* @brief USB_OTG_IsHostMode : Check if it is host mode
-* @param pdev : Selected device
-* @retval num_in_ep
-*/
-uint8_t USB_OTG_IsHostMode(USB_OTG_CORE_HANDLE *pdev)
-{
- return (USB_OTG_GetMode(pdev) == HOST_MODE);
-}
-
-
-/**
-* @brief USB_OTG_ReadCoreItr : returns the Core Interrupt register
-* @param pdev : Selected device
-* @retval Status
-*/
-uint32_t USB_OTG_ReadCoreItr(USB_OTG_CORE_HANDLE *pdev)
-{
- uint32_t v = 0;
- v = USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTSTS);
- v &= USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTMSK);
- return v;
-}
-
-
-/**
-* @brief USB_OTG_ReadOtgItr : returns the USB_OTG Interrupt register
-* @param pdev : Selected device
-* @retval Status
-*/
-uint32_t USB_OTG_ReadOtgItr (USB_OTG_CORE_HANDLE *pdev)
-{
- return (USB_OTG_READ_REG32 (&pdev->regs.GREGS->GOTGINT));
-}
-
-#ifdef USE_HOST_MODE
-/**
-* @brief USB_OTG_CoreInitHost : Initializes USB_OTG controller for host mode
-* @param pdev : Selected device
-* @retval status
-*/
-USB_OTG_STS USB_OTG_CoreInitHost(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_FSIZ_TypeDef nptxfifosize;
- USB_OTG_FSIZ_TypeDef ptxfifosize;
- USB_OTG_HCFG_TypeDef hcfg;
-
-#ifdef USE_OTG_MODE
- USB_OTG_OTGCTL_TypeDef gotgctl;
-#endif
-
- uint32_t i = 0;
-
- nptxfifosize.d32 = 0;
- ptxfifosize.d32 = 0;
-#ifdef USE_OTG_MODE
- gotgctl.d32 = 0;
-#endif
- hcfg.d32 = 0;
-
-
- /* configure charge pump IO */
- USB_OTG_BSP_ConfigVBUS(pdev);
-
- /* Restart the Phy Clock */
- USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, 0);
-
- /* Initialize Host Configuration Register */
- if (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY)
- {
- USB_OTG_InitFSLSPClkSel(pdev , HCFG_30_60_MHZ);
- }
- else
- {
- USB_OTG_InitFSLSPClkSel(pdev , HCFG_48_MHZ);
- }
- USB_OTG_ResetPort(pdev);
-
- hcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HCFG);
- hcfg.b.fslssupp = 0;
- USB_OTG_WRITE_REG32(&pdev->regs.HREGS->HCFG, hcfg.d32);
-
- /* Configure data FIFO sizes */
- /* Rx FIFO */
-#ifdef USB_OTG_FS_CORE
- if(pdev->cfg.coreID == USB_OTG_FS_CORE_ID)
- {
- /* set Rx FIFO size */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GRXFSIZ, RX_FIFO_FS_SIZE);
- nptxfifosize.b.startaddr = RX_FIFO_FS_SIZE;
- nptxfifosize.b.depth = TXH_NP_FS_FIFOSIZ;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->DIEPTXF0_HNPTXFSIZ, nptxfifosize.d32);
-
- ptxfifosize.b.startaddr = RX_FIFO_FS_SIZE + TXH_NP_FS_FIFOSIZ;
- ptxfifosize.b.depth = TXH_P_FS_FIFOSIZ;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->HPTXFSIZ, ptxfifosize.d32);
- }
-#endif
-#ifdef USB_OTG_HS_CORE
- if (pdev->cfg.coreID == USB_OTG_HS_CORE_ID)
- {
- /* set Rx FIFO size */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GRXFSIZ, RX_FIFO_HS_SIZE);
- nptxfifosize.b.startaddr = RX_FIFO_HS_SIZE;
- nptxfifosize.b.depth = TXH_NP_HS_FIFOSIZ;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->DIEPTXF0_HNPTXFSIZ, nptxfifosize.d32);
-
- ptxfifosize.b.startaddr = RX_FIFO_HS_SIZE + TXH_NP_HS_FIFOSIZ;
- ptxfifosize.b.depth = TXH_P_HS_FIFOSIZ;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->HPTXFSIZ, ptxfifosize.d32);
- }
-#endif
-
-#ifdef USE_OTG_MODE
- /* Clear Host Set HNP Enable in the USB_OTG Control Register */
- gotgctl.b.hstsethnpen = 1;
- USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GOTGCTL, gotgctl.d32, 0);
-#endif
-
- /* Make sure the FIFOs are flushed. */
- USB_OTG_FlushTxFifo(pdev, 0x10 ); /* all Tx FIFOs */
- USB_OTG_FlushRxFifo(pdev);
-
-
- /* Clear all pending HC Interrupts */
- for (i = 0; i < pdev->cfg.host_channels; i++)
- {
- USB_OTG_WRITE_REG32( &pdev->regs.HC_REGS[i]->HCINT, 0xFFFFFFFF );
- USB_OTG_WRITE_REG32( &pdev->regs.HC_REGS[i]->HCINTMSK, 0 );
- }
-#ifndef USE_OTG_MODE
- USB_OTG_DriveVbus(pdev, 1);
-#endif
-
- USB_OTG_EnableHostInt(pdev);
- return status;
-}
-
-/**
-* @brief USB_OTG_IsEvenFrame
-* This function returns the frame number for sof packet
-* @param pdev : Selected device
-* @retval Frame number
-*/
-uint8_t USB_OTG_IsEvenFrame (USB_OTG_CORE_HANDLE *pdev)
-{
- return !(USB_OTG_READ_REG32(&pdev->regs.HREGS->HFNUM) & 0x1);
-}
-
-/**
-* @brief USB_OTG_DriveVbus : set/reset vbus
-* @param pdev : Selected device
-* @param state : VBUS state
-* @retval None
-*/
-void USB_OTG_DriveVbus (USB_OTG_CORE_HANDLE *pdev, uint8_t state)
-{
- USB_OTG_HPRT0_TypeDef hprt0;
-
- hprt0.d32 = 0;
-
- /* enable disable the external charge pump */
- USB_OTG_BSP_DriveVBUS(pdev, state);
-
- /* Turn on the Host port power. */
- hprt0.d32 = USB_OTG_ReadHPRT0(pdev);
- if ((hprt0.b.prtpwr == 0 ) && (state == 1 ))
- {
- hprt0.b.prtpwr = 1;
- USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
- }
- if ((hprt0.b.prtpwr == 1 ) && (state == 0 ))
- {
- hprt0.b.prtpwr = 0;
- USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
- }
-
- USB_OTG_BSP_mDelay(200);
-}
-/**
-* @brief USB_OTG_EnableHostInt: Enables the Host mode interrupts
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EnableHostInt(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_GINTMSK_TypeDef intmsk;
- intmsk.d32 = 0;
- /* Disable all interrupts. */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTMSK, 0);
-
- /* Clear any pending interrupts. */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, 0xFFFFFFFF);
-
- /* Enable the common interrupts */
- USB_OTG_EnableCommonInt(pdev);
-
- if (pdev->cfg.dma_enable == 0)
- {
- intmsk.b.rxstsqlvl = 1;
- }
- intmsk.b.portintr = 1;
- intmsk.b.hcintr = 1;
- intmsk.b.disconnect = 1;
- intmsk.b.sofintr = 1;
- intmsk.b.incomplisoout = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GINTMSK, intmsk.d32, intmsk.d32);
- return status;
-}
-
-/**
-* @brief USB_OTG_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
-* HCFG register on the PHY type
-* @param pdev : Selected device
-* @param freq : clock frequency
-* @retval None
-*/
-void USB_OTG_InitFSLSPClkSel(USB_OTG_CORE_HANDLE *pdev , uint8_t freq)
-{
- USB_OTG_HCFG_TypeDef hcfg;
-
- hcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HCFG);
- hcfg.b.fslspclksel = freq;
- USB_OTG_WRITE_REG32(&pdev->regs.HREGS->HCFG, hcfg.d32);
-}
-
-
-/**
-* @brief USB_OTG_ReadHPRT0 : Reads HPRT0 to modify later
-* @param pdev : Selected device
-* @retval HPRT0 value
-*/
-uint32_t USB_OTG_ReadHPRT0(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_HPRT0_TypeDef hprt0;
-
- hprt0.d32 = USB_OTG_READ_REG32(pdev->regs.HPRT0);
- hprt0.b.prtena = 0;
- hprt0.b.prtconndet = 0;
- hprt0.b.prtenchng = 0;
- hprt0.b.prtovrcurrchng = 0;
- return hprt0.d32;
-}
-
-
-/**
-* @brief USB_OTG_ReadHostAllChannels_intr : Register PCD Callbacks
-* @param pdev : Selected device
-* @retval Status
-*/
-uint32_t USB_OTG_ReadHostAllChannels_intr (USB_OTG_CORE_HANDLE *pdev)
-{
- return (USB_OTG_READ_REG32 (&pdev->regs.HREGS->HAINT));
-}
-
-
-/**
-* @brief USB_OTG_ResetPort : Reset Host Port
-* @param pdev : Selected device
-* @retval status
-* @note : (1)The application must wait at least 10 ms (+ 10 ms security)
-* before clearing the reset bit.
-*/
-uint32_t USB_OTG_ResetPort(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_HPRT0_TypeDef hprt0;
-
- hprt0.d32 = USB_OTG_ReadHPRT0(pdev);
- hprt0.b.prtrst = 1;
- USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
- USB_OTG_BSP_mDelay (10); /* See Note #1 */
- hprt0.b.prtrst = 0;
- USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
- USB_OTG_BSP_mDelay (20);
- return 1;
-}
-
-
-/**
-* @brief USB_OTG_HC_Init : Prepares a host channel for transferring packets
-* @param pdev : Selected device
-* @param hc_num : channel number
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_HC_Init(USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
-{
- USB_OTG_STS status = USB_OTG_OK;
- uint32_t intr_enable = 0;
- USB_OTG_HCINTMSK_TypeDef hcintmsk;
- USB_OTG_GINTMSK_TypeDef gintmsk;
- USB_OTG_HCCHAR_TypeDef hcchar;
- USB_OTG_HCINTn_TypeDef hcint;
-
-
- gintmsk.d32 = 0;
- hcintmsk.d32 = 0;
- hcchar.d32 = 0;
-
- /* Clear old interrupt conditions for this host channel. */
- hcint.d32 = 0xFFFFFFFF;
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINT, hcint.d32);
-
- /* Enable channel interrupts required for this transfer. */
- hcintmsk.d32 = 0;
-
- if (pdev->cfg.dma_enable == 1)
- {
- hcintmsk.b.ahberr = 1;
- }
-
- switch (pdev->host.hc[hc_num].ep_type)
- {
- case EP_TYPE_CTRL:
- case EP_TYPE_BULK:
- hcintmsk.b.xfercompl = 1;
- hcintmsk.b.stall = 1;
- hcintmsk.b.xacterr = 1;
- hcintmsk.b.datatglerr = 1;
- hcintmsk.b.nak = 1;
- if (pdev->host.hc[hc_num].ep_is_in)
- {
- hcintmsk.b.bblerr = 1;
- }
- else
- {
- hcintmsk.b.nyet = 1;
- if (pdev->host.hc[hc_num].do_ping)
- {
- hcintmsk.b.ack = 1;
- }
- }
- break;
- case EP_TYPE_INTR:
- hcintmsk.b.xfercompl = 1;
- hcintmsk.b.nak = 1;
- hcintmsk.b.stall = 1;
- hcintmsk.b.xacterr = 1;
- hcintmsk.b.datatglerr = 1;
- hcintmsk.b.frmovrun = 1;
-
- if (pdev->host.hc[hc_num].ep_is_in)
- {
- hcintmsk.b.bblerr = 1;
- }
-
- break;
- case EP_TYPE_ISOC:
- hcintmsk.b.xfercompl = 1;
- hcintmsk.b.frmovrun = 1;
- hcintmsk.b.ack = 1;
-
- if (pdev->host.hc[hc_num].ep_is_in)
- {
- hcintmsk.b.xacterr = 1;
- hcintmsk.b.bblerr = 1;
- }
- break;
- }
-
-
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, hcintmsk.d32);
-
-
- /* Enable the top level host channel interrupt. */
- intr_enable = (1 << hc_num);
- USB_OTG_MODIFY_REG32(&pdev->regs.HREGS->HAINTMSK, 0, intr_enable);
-
- /* Make sure host channel interrupts are enabled. */
- gintmsk.b.hcintr = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GINTMSK, 0, gintmsk.d32);
-
- /* Program the HCCHAR register */
- hcchar.d32 = 0;
- hcchar.b.devaddr = pdev->host.hc[hc_num].dev_addr;
- hcchar.b.epnum = pdev->host.hc[hc_num].ep_num;
- hcchar.b.epdir = pdev->host.hc[hc_num].ep_is_in;
- hcchar.b.lspddev = (pdev->host.hc[hc_num].speed == HPRT0_PRTSPD_LOW_SPEED);
- hcchar.b.eptype = pdev->host.hc[hc_num].ep_type;
- hcchar.b.mps = pdev->host.hc[hc_num].max_packet;
- if (pdev->host.hc[hc_num].ep_type == HCCHAR_INTR)
- {
- hcchar.b.oddfrm = 1;
- }
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR, hcchar.d32);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_HC_StartXfer : Start transfer
-* @param pdev : Selected device
-* @param hc_num : channel number
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_HC_StartXfer(USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_HCCHAR_TypeDef hcchar;
- USB_OTG_HCTSIZn_TypeDef hctsiz;
- USB_OTG_HNPTXSTS_TypeDef hnptxsts;
- USB_OTG_HPTXSTS_TypeDef hptxsts;
- USB_OTG_GINTMSK_TypeDef intmsk;
- uint16_t len_words = 0;
-
- uint16_t num_packets;
- uint16_t max_hc_pkt_count;
-
- max_hc_pkt_count = 256;
- hctsiz.d32 = 0;
- hcchar.d32 = 0;
- intmsk.d32 = 0;
-
- /* Compute the expected number of packets associated to the transfer */
- if (pdev->host.hc[hc_num].xfer_len > 0)
- {
- num_packets = (pdev->host.hc[hc_num].xfer_len + \
- pdev->host.hc[hc_num].max_packet - 1) / pdev->host.hc[hc_num].max_packet;
-
- if (num_packets > max_hc_pkt_count)
- {
- num_packets = max_hc_pkt_count;
- pdev->host.hc[hc_num].xfer_len = num_packets * \
- pdev->host.hc[hc_num].max_packet;
- }
- }
- else
- {
- num_packets = 1;
- }
- if (pdev->host.hc[hc_num].ep_is_in)
- {
- pdev->host.hc[hc_num].xfer_len = num_packets * \
- pdev->host.hc[hc_num].max_packet;
- }
- /* Initialize the HCTSIZn register */
- hctsiz.b.xfersize = pdev->host.hc[hc_num].xfer_len;
- hctsiz.b.pktcnt = num_packets;
- hctsiz.b.pid = pdev->host.hc[hc_num].data_pid;
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCTSIZ, hctsiz.d32);
-
- if (pdev->cfg.dma_enable == 1)
- {
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCDMA, (unsigned int)pdev->host.hc[hc_num].xfer_buff);
- }
-
-
- hcchar.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR);
- hcchar.b.oddfrm = USB_OTG_IsEvenFrame(pdev);
-
- /* Set host channel enable */
- hcchar.b.chen = 1;
- hcchar.b.chdis = 0;
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR, hcchar.d32);
-
- if (pdev->cfg.dma_enable == 0) /* Slave mode */
- {
- if((pdev->host.hc[hc_num].ep_is_in == 0) &&
- (pdev->host.hc[hc_num].xfer_len > 0))
- {
- switch(pdev->host.hc[hc_num].ep_type)
- {
- /* Non periodic transfer */
- case EP_TYPE_CTRL:
- case EP_TYPE_BULK:
-
- hnptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->HNPTXSTS);
- len_words = (pdev->host.hc[hc_num].xfer_len + 3) / 4;
-
- /* check if there is enough space in FIFO space */
- if(len_words > hnptxsts.b.nptxfspcavail)
- {
- /* need to process data in nptxfempty interrupt */
- intmsk.b.nptxfempty = 1;
- USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, 0, intmsk.d32);
- }
-
- break;
- /* Periodic transfer */
- case EP_TYPE_INTR:
- case EP_TYPE_ISOC:
- hptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HPTXSTS);
- len_words = (pdev->host.hc[hc_num].xfer_len + 3) / 4;
- /* check if there is enough space in FIFO space */
- if(len_words > hptxsts.b.ptxfspcavail) /* split the transfer */
- {
- /* need to process data in ptxfempty interrupt */
- intmsk.b.ptxfempty = 1;
- USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, 0, intmsk.d32);
- }
- break;
-
- default:
- break;
- }
-
- /* Write packet into the Tx FIFO. */
- USB_OTG_WritePacket(pdev,
- pdev->host.hc[hc_num].xfer_buff ,
- hc_num, pdev->host.hc[hc_num].xfer_len);
- }
- }
- return status;
-}
-
-
-/**
-* @brief USB_OTG_HC_Halt : Halt channel
-* @param pdev : Selected device
-* @param hc_num : channel number
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_HC_Halt(USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_HNPTXSTS_TypeDef nptxsts;
- USB_OTG_HPTXSTS_TypeDef hptxsts;
- USB_OTG_HCCHAR_TypeDef hcchar;
-
- nptxsts.d32 = 0;
- hptxsts.d32 = 0;
- hcchar.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR);
- hcchar.b.chen = 1;
- hcchar.b.chdis = 1;
-
- /* Check for space in the request queue to issue the halt. */
- if (hcchar.b.eptype == HCCHAR_CTRL || hcchar.b.eptype == HCCHAR_BULK)
- {
- nptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->HNPTXSTS);
- if (nptxsts.b.nptxqspcavail == 0)
- {
- hcchar.b.chen = 0;
- }
- }
- else
- {
- hptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HPTXSTS);
- if (hptxsts.b.ptxqspcavail == 0)
- {
- hcchar.b.chen = 0;
- }
- }
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR, hcchar.d32);
- return status;
-}
-
-/**
-* @brief Issue a ping token
-* @param None
-* @retval : None
-*/
-USB_OTG_STS USB_OTG_HC_DoPing(USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_HCCHAR_TypeDef hcchar;
- USB_OTG_HCTSIZn_TypeDef hctsiz;
-
- hctsiz.d32 = 0;
- hctsiz.b.dopng = 1;
- hctsiz.b.pktcnt = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCTSIZ, hctsiz.d32);
-
- hcchar.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR);
- hcchar.b.chen = 1;
- hcchar.b.chdis = 0;
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCCHAR, hcchar.d32);
- return status;
-}
-
-/**
-* @brief Stop the device and clean up fifo's
-* @param None
-* @retval : None
-*/
-void USB_OTG_StopHost(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_HCCHAR_TypeDef hcchar;
- uint32_t i;
-
- USB_OTG_WRITE_REG32(&pdev->regs.HREGS->HAINTMSK , 0);
- USB_OTG_WRITE_REG32(&pdev->regs.HREGS->HAINT, 0xFFFFFFFF);
- /* Flush out any leftover queued requests. */
-
- for (i = 0; i < pdev->cfg.host_channels; i++)
- {
- hcchar.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[i]->HCCHAR);
- hcchar.b.chen = 0;
- hcchar.b.chdis = 1;
- hcchar.b.epdir = 0;
- USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[i]->HCCHAR, hcchar.d32);
- }
-
- /* Flush the FIFO */
- USB_OTG_FlushRxFifo(pdev);
- USB_OTG_FlushTxFifo(pdev , 0x10 );
-}
-#endif
-#ifdef USE_DEVICE_MODE
-/* PCD Core Layer */
-
-/**
-* @brief USB_OTG_InitDevSpeed :Initializes the DevSpd field of DCFG register
-* depending the PHY type and the enumeration speed of the device.
-* @param pdev : Selected device
-* @retval : None
-*/
-void USB_OTG_InitDevSpeed(USB_OTG_CORE_HANDLE *pdev , uint8_t speed)
-{
- USB_OTG_DCFG_TypeDef dcfg;
-
- dcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCFG);
- dcfg.b.devspd = speed;
- USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCFG, dcfg.d32);
-}
-
-
-/**
-* @brief USB_OTG_CoreInitDev : Initializes the USB_OTG controller registers
-* for device mode
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_CoreInitDev (USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- uint32_t i;
- USB_OTG_DCFG_TypeDef dcfg;
- USB_OTG_FSIZ_TypeDef nptxfifosize;
- USB_OTG_FSIZ_TypeDef txfifosize;
- USB_OTG_DIEPMSK_TypeDef msk;
- USB_OTG_DTHRCTL_TypeDef dthrctl;
-
- depctl.d32 = 0;
- dcfg.d32 = 0;
- nptxfifosize.d32 = 0;
- txfifosize.d32 = 0;
- msk.d32 = 0;
-
- /* Restart the Phy Clock */
- USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, 0);
- /* Device configuration register */
- dcfg.d32 = USB_OTG_READ_REG32( &pdev->regs.DREGS->DCFG);
- dcfg.b.perfrint = DCFG_FRAME_INTERVAL_80;
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DCFG, dcfg.d32 );
-
-#ifdef USB_OTG_FS_CORE
- if(pdev->cfg.coreID == USB_OTG_FS_CORE_ID )
- {
-
- /* Set Full speed phy */
- USB_OTG_InitDevSpeed (pdev , USB_OTG_SPEED_PARAM_FULL);
-
- /* set Rx FIFO size */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GRXFSIZ, RX_FIFO_FS_SIZE);
-
- /* EP0 TX*/
- nptxfifosize.b.depth = TX0_FIFO_FS_SIZE;
- nptxfifosize.b.startaddr = RX_FIFO_FS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF0_HNPTXFSIZ, nptxfifosize.d32 );
-
-
- /* EP1 TX*/
- txfifosize.b.startaddr = nptxfifosize.b.startaddr + nptxfifosize.b.depth;
- txfifosize.b.depth = TX1_FIFO_FS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[0], txfifosize.d32 );
-
-
- /* EP2 TX*/
- txfifosize.b.startaddr += txfifosize.b.depth;
- txfifosize.b.depth = TX2_FIFO_FS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[1], txfifosize.d32 );
-
-
- /* EP3 TX*/
- txfifosize.b.startaddr += txfifosize.b.depth;
- txfifosize.b.depth = TX3_FIFO_FS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[2], txfifosize.d32 );
- }
-#endif
-#ifdef USB_OTG_HS_CORE
- if(pdev->cfg.coreID == USB_OTG_HS_CORE_ID )
- {
-
- /* Set High speed phy */
-
- if(pdev->cfg.phy_itface == USB_OTG_ULPI_PHY)
- {
- USB_OTG_InitDevSpeed (pdev , USB_OTG_SPEED_PARAM_HIGH);
- }
- else /* set High speed phy in Full speed mode */
- {
- USB_OTG_InitDevSpeed (pdev , USB_OTG_SPEED_PARAM_HIGH_IN_FULL);
- }
-
- /* set Rx FIFO size */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GRXFSIZ, RX_FIFO_HS_SIZE);
-
- /* EP0 TX*/
- nptxfifosize.b.depth = TX0_FIFO_HS_SIZE;
- nptxfifosize.b.startaddr = RX_FIFO_HS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF0_HNPTXFSIZ, nptxfifosize.d32 );
-
-
- /* EP1 TX*/
- txfifosize.b.startaddr = nptxfifosize.b.startaddr + nptxfifosize.b.depth;
- txfifosize.b.depth = TX1_FIFO_HS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[0], txfifosize.d32 );
-
-
- /* EP2 TX*/
- txfifosize.b.startaddr += txfifosize.b.depth;
- txfifosize.b.depth = TX2_FIFO_HS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[1], txfifosize.d32 );
-
-
- /* EP3 TX*/
- txfifosize.b.startaddr += txfifosize.b.depth;
- txfifosize.b.depth = TX3_FIFO_HS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[2], txfifosize.d32 );
-
- /* EP4 TX*/
- txfifosize.b.startaddr += txfifosize.b.depth;
- txfifosize.b.depth = TX4_FIFO_HS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[3], txfifosize.d32 );
-
-
- /* EP5 TX*/
- txfifosize.b.startaddr += txfifosize.b.depth;
- txfifosize.b.depth = TX5_FIFO_HS_SIZE;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->DIEPTXF[4], txfifosize.d32 );
- }
-#endif
- /* Flush the FIFOs */
- USB_OTG_FlushTxFifo(pdev , 0x10); /* all Tx FIFOs */
- USB_OTG_FlushRxFifo(pdev);
- /* Clear all pending Device Interrupts */
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DIEPMSK, 0 );
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOEPMSK, 0 );
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINT, 0xFFFFFFFF );
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINTMSK, 0 );
-
- for (i = 0; i < pdev->cfg.dev_endpoints; i++)
- {
- depctl.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[i]->DIEPCTL);
- if (depctl.b.epena)
- {
- depctl.d32 = 0;
- depctl.b.epdis = 1;
- depctl.b.snak = 1;
- }
- else
- {
- depctl.d32 = 0;
- }
- USB_OTG_WRITE_REG32( &pdev->regs.INEP_REGS[i]->DIEPCTL, depctl.d32);
- USB_OTG_WRITE_REG32( &pdev->regs.INEP_REGS[i]->DIEPTSIZ, 0);
- USB_OTG_WRITE_REG32( &pdev->regs.INEP_REGS[i]->DIEPINT, 0xFF);
- }
- for (i = 0; i < pdev->cfg.dev_endpoints; i++)
- {
- USB_OTG_DEPCTL_TypeDef depctl;
- depctl.d32 = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[i]->DOEPCTL);
- if (depctl.b.epena)
- {
- depctl.d32 = 0;
- depctl.b.epdis = 1;
- depctl.b.snak = 1;
- }
- else
- {
- depctl.d32 = 0;
- }
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[i]->DOEPCTL, depctl.d32);
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[i]->DOEPTSIZ, 0);
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[i]->DOEPINT, 0xFF);
- }
- msk.d32 = 0;
- msk.b.txfifoundrn = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPMSK, msk.d32, msk.d32);
-
- if (pdev->cfg.dma_enable == 1)
- {
- dthrctl.d32 = 0;
- dthrctl.b.non_iso_thr_en = 1;
- dthrctl.b.iso_thr_en = 1;
- dthrctl.b.tx_thr_len = 64;
- dthrctl.b.rx_thr_en = 1;
- dthrctl.b.rx_thr_len = 64;
- USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DTHRCTL, dthrctl.d32);
- }
- USB_OTG_EnableDevInt(pdev);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_EnableDevInt : Enables the Device mode interrupts
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EnableDevInt(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_GINTMSK_TypeDef intmsk;
-
- intmsk.d32 = 0;
-
- /* Disable all interrupts. */
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTMSK, 0);
- /* Clear any pending interrupts */
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, 0xBFFFFFFF);
- /* Enable the common interrupts */
- USB_OTG_EnableCommonInt(pdev);
-
- if (pdev->cfg.dma_enable == 0)
- {
- intmsk.b.rxstsqlvl = 1;
- }
-
- /* Enable interrupts matching to the Device mode ONLY */
- intmsk.b.usbsuspend = 1;
- intmsk.b.usbreset = 1;
- intmsk.b.enumdone = 1;
- intmsk.b.inepintr = 1;
- intmsk.b.outepintr = 1;
- intmsk.b.sofintr = 1;
-
- intmsk.b.incomplisoin = 1;
- intmsk.b.incomplisoout = 1;
-#ifdef VBUS_SENSING_ENABLED
- intmsk.b.sessreqintr = 1;
- intmsk.b.otgintr = 1;
-#endif
- USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, intmsk.d32, intmsk.d32);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_GetDeviceSpeed
-* Get the device speed from the device status register
-* @param None
-* @retval status
-*/
-enum USB_OTG_SPEED USB_OTG_GetDeviceSpeed (USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_DSTS_TypeDef dsts;
- enum USB_OTG_SPEED speed = USB_SPEED_UNKNOWN;
-
-
- dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
-
- switch (dsts.b.enumspd)
- {
- case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
- speed = USB_SPEED_HIGH;
- break;
- case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
- case DSTS_ENUMSPD_FS_PHY_48MHZ:
- speed = USB_SPEED_FULL;
- break;
-
- case DSTS_ENUMSPD_LS_PHY_6MHZ:
- speed = USB_SPEED_LOW;
- break;
- }
-
- return speed;
-}
-/**
-* @brief enables EP0 OUT to receive SETUP packets and configures EP0
-* for transmitting packets
-* @param None
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EP0Activate(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DSTS_TypeDef dsts;
- USB_OTG_DEPCTL_TypeDef diepctl;
- USB_OTG_DCTL_TypeDef dctl;
-
- dctl.d32 = 0;
- /* Read the Device Status and Endpoint 0 Control registers */
- dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
- diepctl.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[0]->DIEPCTL);
- /* Set the MPS of the IN EP based on the enumeration speed */
- switch (dsts.b.enumspd)
- {
- case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
- case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
- case DSTS_ENUMSPD_FS_PHY_48MHZ:
- diepctl.b.mps = DEP0CTL_MPS_64;
- break;
- case DSTS_ENUMSPD_LS_PHY_6MHZ:
- diepctl.b.mps = DEP0CTL_MPS_8;
- break;
- }
- USB_OTG_WRITE_REG32(&pdev->regs.INEP_REGS[0]->DIEPCTL, diepctl.d32);
- dctl.b.cgnpinnak = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, dctl.d32, dctl.d32);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_EPActivate : Activates an EP
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EPActivate(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- USB_OTG_DAINT_TypeDef daintmsk;
- __IO uint32_t *addr;
-
-
- depctl.d32 = 0;
- daintmsk.d32 = 0;
- /* Read DEPCTLn register */
- if (ep->is_in == 1)
- {
- addr = &pdev->regs.INEP_REGS[ep->num]->DIEPCTL;
- daintmsk.ep.in = 1 << ep->num;
- }
- else
- {
- addr = &pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL;
- daintmsk.ep.out = 1 << ep->num;
- }
- /* If the EP is already active don't change the EP Control
- * register. */
- depctl.d32 = USB_OTG_READ_REG32(addr);
- if (!depctl.b.usbactep)
- {
- depctl.b.mps = ep->maxpacket;
- depctl.b.eptype = ep->type;
- depctl.b.txfnum = ep->tx_fifo_num;
- depctl.b.setd0pid = 1;
- depctl.b.usbactep = 1;
- USB_OTG_WRITE_REG32(addr, depctl.d32);
- }
- /* Enable the Interrupt for this EP */
-#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
- if((ep->num == 1)&&(pdev->cfg.coreID == USB_OTG_HS_CORE_ID))
- {
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DEACHMSK, 0, daintmsk.d32);
- }
- else
-#endif
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DAINTMSK, 0, daintmsk.d32);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_EPDeactivate : Deactivates an EP
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EPDeactivate(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- USB_OTG_DAINT_TypeDef daintmsk;
- __IO uint32_t *addr;
-
- depctl.d32 = 0;
- daintmsk.d32 = 0;
- /* Read DEPCTLn register */
- if (ep->is_in == 1)
- {
- addr = &pdev->regs.INEP_REGS[ep->num]->DIEPCTL;
- daintmsk.ep.in = 1 << ep->num;
- }
- else
- {
- addr = &pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL;
- daintmsk.ep.out = 1 << ep->num;
- }
- depctl.b.usbactep = 0;
- USB_OTG_WRITE_REG32(addr, depctl.d32);
- /* Disable the Interrupt for this EP */
-
-#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
- if((ep->num == 1)&&(pdev->cfg.coreID == USB_OTG_HS_CORE_ID))
- {
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DEACHMSK, daintmsk.d32, 0);
- }
- else
-#endif
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DAINTMSK, daintmsk.d32, 0);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_EPStartXfer : Handle the setup for data xfer for an EP and
-* starts the xfer
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EPStartXfer(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
- USB_OTG_DSTS_TypeDef dsts;
- uint32_t fifoemptymsk = 0;
-
- depctl.d32 = 0;
- deptsiz.d32 = 0;
- /* IN endpoint */
- if (ep->is_in == 1)
- {
- depctl.d32 = USB_OTG_READ_REG32(&(pdev->regs.INEP_REGS[ep->num]->DIEPCTL));
- deptsiz.d32 = USB_OTG_READ_REG32(&(pdev->regs.INEP_REGS[ep->num]->DIEPTSIZ));
- /* Zero Length Packet? */
- if (ep->xfer_len == 0)
- {
- deptsiz.b.xfersize = 0;
- deptsiz.b.pktcnt = 1;
- }
- else
- {
- /* Program the transfer size and packet count
- * as follows: xfersize = N * maxpacket +
- * short_packet pktcnt = N + (short_packet
- * exist ? 1 : 0)
- */
- deptsiz.b.xfersize = ep->xfer_len;
- deptsiz.b.pktcnt = (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket;
-
- if (ep->type == EP_TYPE_ISOC)
- {
- deptsiz.b.mc = 1;
- }
- }
- USB_OTG_WRITE_REG32(&pdev->regs.INEP_REGS[ep->num]->DIEPTSIZ, deptsiz.d32);
-
- if (pdev->cfg.dma_enable == 1)
- {
- USB_OTG_WRITE_REG32(&pdev->regs.INEP_REGS[ep->num]->DIEPDMA, ep->dma_addr);
- }
- else
- {
- if (ep->type != EP_TYPE_ISOC)
- {
- /* Enable the Tx FIFO Empty Interrupt for this EP */
- if (ep->xfer_len > 0)
- {
- fifoemptymsk = 1 << ep->num;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, 0, fifoemptymsk);
- }
- }
- }
-
-
- if (ep->type == EP_TYPE_ISOC)
- {
- dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
-
- if (((dsts.b.soffn)&0x1) == 0)
- {
- depctl.b.setd1pid = 1;
- }
- else
- {
- depctl.b.setd0pid = 1;
- }
- }
-
- /* EP enable, IN data in FIFO */
- depctl.b.cnak = 1;
- depctl.b.epena = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.INEP_REGS[ep->num]->DIEPCTL, depctl.d32);
-
- if (ep->type == EP_TYPE_ISOC)
- {
- USB_OTG_WritePacket(pdev, ep->xfer_buff, ep->num, ep->xfer_len);
- }
- }
- else
- {
- /* OUT endpoint */
- depctl.d32 = USB_OTG_READ_REG32(&(pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL));
- deptsiz.d32 = USB_OTG_READ_REG32(&(pdev->regs.OUTEP_REGS[ep->num]->DOEPTSIZ));
- /* Program the transfer size and packet count as follows:
- * pktcnt = N
- * xfersize = N * maxpacket
- */
- if (ep->xfer_len == 0)
- {
- deptsiz.b.xfersize = ep->maxpacket;
- deptsiz.b.pktcnt = 1;
- }
- else
- {
- deptsiz.b.pktcnt = (ep->xfer_len + (ep->maxpacket - 1)) / ep->maxpacket;
- deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket;
- }
- USB_OTG_WRITE_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPTSIZ, deptsiz.d32);
-
- if (pdev->cfg.dma_enable == 1)
- {
- USB_OTG_WRITE_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPDMA, ep->dma_addr);
- }
-
- if (ep->type == EP_TYPE_ISOC)
- {
- if (ep->even_odd_frame)
- {
- depctl.b.setd1pid = 1;
- }
- else
- {
- depctl.b.setd0pid = 1;
- }
- }
- /* EP enable */
- depctl.b.cnak = 1;
- depctl.b.epena = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL, depctl.d32);
- }
- return status;
-}
-
-
-/**
-* @brief USB_OTG_EP0StartXfer : Handle the setup for a data xfer for EP0 and
-* starts the xfer
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EP0StartXfer(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- USB_OTG_DEP0XFRSIZ_TypeDef deptsiz;
- USB_OTG_INEPREGS *in_regs;
- uint32_t fifoemptymsk = 0;
-
- depctl.d32 = 0;
- deptsiz.d32 = 0;
- /* IN endpoint */
- if (ep->is_in == 1)
- {
- in_regs = pdev->regs.INEP_REGS[0];
- depctl.d32 = USB_OTG_READ_REG32(&in_regs->DIEPCTL);
- deptsiz.d32 = USB_OTG_READ_REG32(&in_regs->DIEPTSIZ);
- /* Zero Length Packet? */
- if (ep->xfer_len == 0)
- {
- deptsiz.b.xfersize = 0;
- deptsiz.b.pktcnt = 1;
-
- }
- else
- {
- if (ep->xfer_len > ep->maxpacket)
- {
- ep->xfer_len = ep->maxpacket;
- deptsiz.b.xfersize = ep->maxpacket;
- }
- else
- {
- deptsiz.b.xfersize = ep->xfer_len;
- }
- deptsiz.b.pktcnt = 1;
- }
- USB_OTG_WRITE_REG32(&in_regs->DIEPTSIZ, deptsiz.d32);
-
- if (pdev->cfg.dma_enable == 1)
- {
- USB_OTG_WRITE_REG32(&pdev->regs.INEP_REGS[ep->num]->DIEPDMA, ep->dma_addr);
- }
-
- /* EP enable, IN data in FIFO */
- depctl.b.cnak = 1;
- depctl.b.epena = 1;
- USB_OTG_WRITE_REG32(&in_regs->DIEPCTL, depctl.d32);
-
-
-
- if (pdev->cfg.dma_enable == 0)
- {
- /* Enable the Tx FIFO Empty Interrupt for this EP */
- if (ep->xfer_len > 0)
- {
- {
- fifoemptymsk |= 1 << ep->num;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, 0, fifoemptymsk);
- }
- }
- }
- }
- else
- {
- /* OUT endpoint */
- depctl.d32 = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL);
- deptsiz.d32 = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPTSIZ);
- /* Program the transfer size and packet count as follows:
- * xfersize = N * (maxpacket + 4 - (maxpacket % 4))
- * pktcnt = N */
- if (ep->xfer_len == 0)
- {
- deptsiz.b.xfersize = ep->maxpacket;
- deptsiz.b.pktcnt = 1;
- }
- else
- {
- ep->xfer_len = ep->maxpacket;
- deptsiz.b.xfersize = ep->maxpacket;
- deptsiz.b.pktcnt = 1;
- }
- USB_OTG_WRITE_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPTSIZ, deptsiz.d32);
- if (pdev->cfg.dma_enable == 1)
- {
- USB_OTG_WRITE_REG32(&pdev->regs.OUTEP_REGS[ep->num]->DOEPDMA, ep->dma_addr);
- }
- /* EP enable */
- depctl.b.cnak = 1;
- depctl.b.epena = 1;
- USB_OTG_WRITE_REG32 (&(pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL), depctl.d32);
-
- }
- return status;
-}
-
-
-/**
-* @brief USB_OTG_EPSetStall : Set the EP STALL
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EPSetStall(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- __IO uint32_t *depctl_addr;
-
- depctl.d32 = 0;
- if (ep->is_in == 1)
- {
- depctl_addr = &(pdev->regs.INEP_REGS[ep->num]->DIEPCTL);
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
- /* set the disable and stall bits */
- if (depctl.b.epena)
- {
- depctl.b.epdis = 1;
- }
- depctl.b.stall = 1;
- USB_OTG_WRITE_REG32(depctl_addr, depctl.d32);
- }
- else
- {
- depctl_addr = &(pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL);
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
- /* set the stall bit */
- depctl.b.stall = 1;
- USB_OTG_WRITE_REG32(depctl_addr, depctl.d32);
- }
- return status;
-}
-
-
-/**
-* @brief Clear the EP STALL
-* @param pdev : Selected device
-* @retval USB_OTG_STS : status
-*/
-USB_OTG_STS USB_OTG_EPClearStall(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
-{
- USB_OTG_STS status = USB_OTG_OK;
- USB_OTG_DEPCTL_TypeDef depctl;
- __IO uint32_t *depctl_addr;
-
- depctl.d32 = 0;
-
- if (ep->is_in == 1)
- {
- depctl_addr = &(pdev->regs.INEP_REGS[ep->num]->DIEPCTL);
- }
- else
- {
- depctl_addr = &(pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL);
- }
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
- /* clear the stall bits */
- depctl.b.stall = 0;
- if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
- {
- depctl.b.setd0pid = 1; /* DATA0 */
- }
- USB_OTG_WRITE_REG32(depctl_addr, depctl.d32);
- return status;
-}
-
-
-/**
-* @brief USB_OTG_ReadDevAllOutEp_itr : returns OUT endpoint interrupt bits
-* @param pdev : Selected device
-* @retval OUT endpoint interrupt bits
-*/
-uint32_t USB_OTG_ReadDevAllOutEp_itr(USB_OTG_CORE_HANDLE *pdev)
-{
- uint32_t v;
- v = USB_OTG_READ_REG32(&pdev->regs.DREGS->DAINT);
- v &= USB_OTG_READ_REG32(&pdev->regs.DREGS->DAINTMSK);
- return ((v & 0xffff0000) >> 16);
-}
-
-
-/**
-* @brief USB_OTG_ReadDevOutEP_itr : returns Device OUT EP Interrupt register
-* @param pdev : Selected device
-* @param ep : end point number
-* @retval Device OUT EP Interrupt register
-*/
-uint32_t USB_OTG_ReadDevOutEP_itr(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
-{
- uint32_t v;
- v = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[epnum]->DOEPINT);
- v &= USB_OTG_READ_REG32(&pdev->regs.DREGS->DOEPMSK);
- return v;
-}
-
-
-/**
-* @brief USB_OTG_ReadDevAllInEPItr : Get int status register
-* @param pdev : Selected device
-* @retval int status register
-*/
-uint32_t USB_OTG_ReadDevAllInEPItr(USB_OTG_CORE_HANDLE *pdev)
-{
- uint32_t v;
- v = USB_OTG_READ_REG32(&pdev->regs.DREGS->DAINT);
- v &= USB_OTG_READ_REG32(&pdev->regs.DREGS->DAINTMSK);
- return (v & 0xffff);
-}
-
-/**
-* @brief configures EPO to receive SETUP packets
-* @param None
-* @retval : None
-*/
-void USB_OTG_EP0_OutStart(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_DEP0XFRSIZ_TypeDef doeptsize0;
- doeptsize0.d32 = 0;
- doeptsize0.b.supcnt = 3;
- doeptsize0.b.pktcnt = 1;
- doeptsize0.b.xfersize = 8 * 3;
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[0]->DOEPTSIZ, doeptsize0.d32 );
-
- if (pdev->cfg.dma_enable == 1)
- {
- USB_OTG_DEPCTL_TypeDef doepctl;
- doepctl.d32 = 0;
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[0]->DOEPDMA,
- (uint32_t)&pdev->dev.setup_packet);
-
- /* EP enable */
- doepctl.d32 = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[0]->DOEPCTL);
- doepctl.b.epena = 1;
- doepctl.d32 = 0x80008000;
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[0]->DOEPCTL, doepctl.d32);
- }
-}
-
-/**
-* @brief USB_OTG_RemoteWakeup : active remote wakeup signalling
-* @param None
-* @retval : None
-*/
-void USB_OTG_ActiveRemoteWakeup(USB_OTG_CORE_HANDLE *pdev)
-{
-
- USB_OTG_DCTL_TypeDef dctl;
- USB_OTG_DSTS_TypeDef dsts;
- USB_OTG_PCGCCTL_TypeDef power;
-
- if (pdev->dev.DevRemoteWakeup)
- {
- dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
- if(dsts.b.suspsts == 1)
- {
- if(pdev->cfg.low_power)
- {
- /* un-gate USB Core clock */
- power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
- power.b.gatehclk = 0;
- power.b.stoppclk = 0;
- USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);
- }
- /* active Remote wakeup signaling */
- dctl.d32 = 0;
- dctl.b.rmtwkupsig = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, 0, dctl.d32);
- USB_OTG_BSP_mDelay(5);
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, dctl.d32, 0 );
- }
- }
-}
-
-
-/**
-* @brief USB_OTG_UngateClock : active USB Core clock
-* @param None
-* @retval : None
-*/
-void USB_OTG_UngateClock(USB_OTG_CORE_HANDLE *pdev)
-{
- if(pdev->cfg.low_power)
- {
-
- USB_OTG_DSTS_TypeDef dsts;
- USB_OTG_PCGCCTL_TypeDef power;
-
- dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
-
- if(dsts.b.suspsts == 1)
- {
- /* un-gate USB Core clock */
- power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
- power.b.gatehclk = 0;
- power.b.stoppclk = 0;
- USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);
-
- }
- }
-}
-
-/**
-* @brief Stop the device and clean up fifo's
-* @param None
-* @retval : None
-*/
-void USB_OTG_StopDevice(USB_OTG_CORE_HANDLE *pdev)
-{
- uint32_t i;
-
- pdev->dev.device_status = 1;
-
- for (i = 0; i < pdev->cfg.dev_endpoints ; i++)
- {
- USB_OTG_WRITE_REG32( &pdev->regs.INEP_REGS[i]->DIEPINT, 0xFF);
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[i]->DOEPINT, 0xFF);
- }
-
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DIEPMSK, 0 );
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOEPMSK, 0 );
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINTMSK, 0 );
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINT, 0xFFFFFFFF );
-
- /* Flush the FIFO */
- USB_OTG_FlushRxFifo(pdev);
- USB_OTG_FlushTxFifo(pdev , 0x10 );
-}
-
-/**
-* @brief returns the EP Status
-* @param pdev : Selected device
-* ep : endpoint structure
-* @retval : EP status
-*/
-
-uint32_t USB_OTG_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,USB_OTG_EP *ep)
-{
- USB_OTG_DEPCTL_TypeDef depctl;
- __IO uint32_t *depctl_addr;
- uint32_t Status = 0;
-
- depctl.d32 = 0;
- if (ep->is_in == 1)
- {
- depctl_addr = &(pdev->regs.INEP_REGS[ep->num]->DIEPCTL);
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
-
- if (depctl.b.stall == 1)
- Status = USB_OTG_EP_TX_STALL;
- else if (depctl.b.naksts == 1)
- Status = USB_OTG_EP_TX_NAK;
- else
- Status = USB_OTG_EP_TX_VALID;
-
- }
- else
- {
- depctl_addr = &(pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL);
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
- if (depctl.b.stall == 1)
- Status = USB_OTG_EP_RX_STALL;
- else if (depctl.b.naksts == 1)
- Status = USB_OTG_EP_RX_NAK;
- else
- Status = USB_OTG_EP_RX_VALID;
- }
-
- /* Return the current status */
- return Status;
-}
-
-/**
-* @brief Set the EP Status
-* @param pdev : Selected device
-* Status : new Status
-* ep : EP structure
-* @retval : None
-*/
-void USB_OTG_SetEPStatus (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep , uint32_t Status)
-{
- USB_OTG_DEPCTL_TypeDef depctl;
- __IO uint32_t *depctl_addr;
-
- depctl.d32 = 0;
-
- /* Process for IN endpoint */
- if (ep->is_in == 1)
- {
- depctl_addr = &(pdev->regs.INEP_REGS[ep->num]->DIEPCTL);
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
-
- if (Status == USB_OTG_EP_TX_STALL)
- {
- USB_OTG_EPSetStall(pdev, ep); return;
- }
- else if (Status == USB_OTG_EP_TX_NAK)
- depctl.b.snak = 1;
- else if (Status == USB_OTG_EP_TX_VALID)
- {
- if (depctl.b.stall == 1)
- {
- ep->even_odd_frame = 0;
- USB_OTG_EPClearStall(pdev, ep);
- return;
- }
- depctl.b.cnak = 1;
- depctl.b.usbactep = 1;
- depctl.b.epena = 1;
- }
- else if (Status == USB_OTG_EP_TX_DIS)
- depctl.b.usbactep = 0;
- }
- else /* Process for OUT endpoint */
- {
- depctl_addr = &(pdev->regs.OUTEP_REGS[ep->num]->DOEPCTL);
- depctl.d32 = USB_OTG_READ_REG32(depctl_addr);
-
- if (Status == USB_OTG_EP_RX_STALL) {
- depctl.b.stall = 1;
- }
- else if (Status == USB_OTG_EP_RX_NAK)
- depctl.b.snak = 1;
- else if (Status == USB_OTG_EP_RX_VALID)
- {
- if (depctl.b.stall == 1)
- {
- ep->even_odd_frame = 0;
- USB_OTG_EPClearStall(pdev, ep);
- return;
- }
- depctl.b.cnak = 1;
- depctl.b.usbactep = 1;
- depctl.b.epena = 1;
- }
- else if (Status == USB_OTG_EP_RX_DIS)
- {
- depctl.b.usbactep = 0;
- }
- }
-
- USB_OTG_WRITE_REG32(depctl_addr, depctl.d32);
-}
-
-#endif
-/**
-* @}
-*/
-
-/**
-* @}
-*/
-
-/**
-* @}
-*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usb_dcd.c b/radio/bootloader/usb/usb_dcd.c
deleted file mode 100644
index 36428e2a0..000000000
--- a/radio/bootloader/usb/usb_dcd.c
+++ /dev/null
@@ -1,478 +0,0 @@
-/**
- ******************************************************************************
- * @file usb_dcd.c
- * @author MCD Application Team
- * @version V2.1.0
- * @date 19-March-2012
- * @brief Peripheral Device Interface Layer
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usb_dcd.h"
-#include "usb_bsp.h"
-
-
-/** @addtogroup USB_OTG_DRIVER
-* @{
-*/
-
-/** @defgroup USB_DCD
-* @brief This file is the interface between EFSL ans Host mass-storage class
-* @{
-*/
-
-
-/** @defgroup USB_DCD_Private_Defines
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_Private_TypesDefinitions
-* @{
-*/
-/**
-* @}
-*/
-
-
-
-/** @defgroup USB_DCD_Private_Macros
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_Private_Variables
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_Private_FunctionPrototypes
-* @{
-*/
-
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_Private_Functions
-* @{
-*/
-
-
-
-void DCD_Init(USB_OTG_CORE_HANDLE *pdev ,
- USB_OTG_CORE_ID_TypeDef coreID)
-{
- uint32_t i;
- USB_OTG_EP *ep;
-
- USB_OTG_SelectCore (pdev , coreID);
-
- pdev->dev.device_status = USB_OTG_DEFAULT;
- pdev->dev.device_address = 0;
-
- /* Init ep structure */
- for (i = 0; i < pdev->cfg.dev_endpoints ; i++)
- {
- ep = &pdev->dev.in_ep[i];
- /* Init ep structure */
- ep->is_in = 1;
- ep->num = i;
- ep->tx_fifo_num = i;
- /* Control until ep is actvated */
- ep->type = EP_TYPE_CTRL;
- ep->maxpacket = USB_OTG_MAX_EP0_SIZE;
- ep->xfer_buff = 0;
- ep->xfer_len = 0;
- }
-
- for (i = 0; i < pdev->cfg.dev_endpoints; i++)
- {
- ep = &pdev->dev.out_ep[i];
- /* Init ep structure */
- ep->is_in = 0;
- ep->num = i;
- ep->tx_fifo_num = i;
- /* Control until ep is activated */
- ep->type = EP_TYPE_CTRL;
- ep->maxpacket = USB_OTG_MAX_EP0_SIZE;
- ep->xfer_buff = 0;
- ep->xfer_len = 0;
- }
-
- USB_OTG_DisableGlobalInt(pdev);
-
- /*Init the Core (common init.) */
- USB_OTG_CoreInit(pdev);
-
-
- /* Force Device Mode*/
- USB_OTG_SetCurrentMode(pdev, DEVICE_MODE);
-
- /* Init Device */
- USB_OTG_CoreInitDev(pdev);
-
-
- /* Enable USB Global interrupt */
- USB_OTG_EnableGlobalInt(pdev);
-}
-
-
-/**
-* @brief Configure an EP
-* @param pdev : Device instance
-* @param epdesc : Endpoint Descriptor
-* @retval : status
-*/
-uint32_t DCD_EP_Open(USB_OTG_CORE_HANDLE *pdev ,
- uint8_t ep_addr,
- uint16_t ep_mps,
- uint8_t ep_type)
-{
- USB_OTG_EP *ep;
-
- if ((ep_addr & 0x80) == 0x80)
- {
- ep = &pdev->dev.in_ep[ep_addr & 0x7F];
- }
- else
- {
- ep = &pdev->dev.out_ep[ep_addr & 0x7F];
- }
- ep->num = ep_addr & 0x7F;
-
- ep->is_in = (0x80 & ep_addr) != 0;
- ep->maxpacket = ep_mps;
- ep->type = ep_type;
- if (ep->is_in)
- {
- /* Assign a Tx FIFO */
- ep->tx_fifo_num = ep->num;
- }
- /* Set initial data PID. */
- if (ep_type == USB_OTG_EP_BULK )
- {
- ep->data_pid_start = 0;
- }
- USB_OTG_EPActivate(pdev , ep );
- return 0;
-}
-/**
-* @brief called when an EP is disabled
-* @param pdev: device instance
-* @param ep_addr: endpoint address
-* @retval : status
-*/
-uint32_t DCD_EP_Close(USB_OTG_CORE_HANDLE *pdev , uint8_t ep_addr)
-{
- USB_OTG_EP *ep;
-
- if ((ep_addr&0x80) == 0x80)
- {
- ep = &pdev->dev.in_ep[ep_addr & 0x7F];
- }
- else
- {
- ep = &pdev->dev.out_ep[ep_addr & 0x7F];
- }
- ep->num = ep_addr & 0x7F;
- ep->is_in = (0x80 & ep_addr) != 0;
- USB_OTG_EPDeactivate(pdev , ep );
- return 0;
-}
-
-
-/**
-* @brief DCD_EP_PrepareRx
-* @param pdev: device instance
-* @param ep_addr: endpoint address
-* @param pbuf: pointer to Rx buffer
-* @param buf_len: data length
-* @retval : status
-*/
-uint32_t DCD_EP_PrepareRx( USB_OTG_CORE_HANDLE *pdev,
- uint8_t ep_addr,
- uint8_t *pbuf,
- uint16_t buf_len)
-{
- USB_OTG_EP *ep;
-
- ep = &pdev->dev.out_ep[ep_addr & 0x7F];
-
- /*setup and start the Xfer */
- ep->xfer_buff = pbuf;
- ep->xfer_len = buf_len;
- ep->xfer_count = 0;
- ep->is_in = 0;
- ep->num = ep_addr & 0x7F;
-
- if (pdev->cfg.dma_enable == 1)
- {
- ep->dma_addr = (uint32_t)pbuf;
- }
-
- if ( ep->num == 0 )
- {
- USB_OTG_EP0StartXfer(pdev , ep);
- }
- else
- {
- USB_OTG_EPStartXfer(pdev, ep );
- }
- return 0;
-}
-
-/**
-* @brief Transmit data over USB
-* @param pdev: device instance
-* @param ep_addr: endpoint address
-* @param pbuf: pointer to Tx buffer
-* @param buf_len: data length
-* @retval : status
-*/
-uint32_t DCD_EP_Tx ( USB_OTG_CORE_HANDLE *pdev,
- uint8_t ep_addr,
- uint8_t *pbuf,
- uint32_t buf_len)
-{
- USB_OTG_EP *ep;
-
- ep = &pdev->dev.in_ep[ep_addr & 0x7F];
-
- /* Setup and start the Transfer */
- ep->is_in = 1;
- ep->num = ep_addr & 0x7F;
- ep->xfer_buff = pbuf;
- ep->dma_addr = (uint32_t)pbuf;
- ep->xfer_count = 0;
- ep->xfer_len = buf_len;
-
- if ( ep->num == 0 )
- {
- USB_OTG_EP0StartXfer(pdev , ep);
- }
- else
- {
- USB_OTG_EPStartXfer(pdev, ep );
- }
- return 0;
-}
-
-
-/**
-* @brief Stall an endpoint.
-* @param pdev: device instance
-* @param epnum: endpoint address
-* @retval : status
-*/
-uint32_t DCD_EP_Stall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
-{
- USB_OTG_EP *ep;
- if ((0x80 & epnum) == 0x80)
- {
- ep = &pdev->dev.in_ep[epnum & 0x7F];
- }
- else
- {
- ep = &pdev->dev.out_ep[epnum];
- }
-
- ep->is_stall = 1;
- ep->num = epnum & 0x7F;
- ep->is_in = ((epnum & 0x80) == 0x80);
-
- USB_OTG_EPSetStall(pdev , ep);
- return (0);
-}
-
-
-/**
-* @brief Clear stall condition on endpoints.
-* @param pdev: device instance
-* @param epnum: endpoint address
-* @retval : status
-*/
-uint32_t DCD_EP_ClrStall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
-{
- USB_OTG_EP *ep;
- if ((0x80 & epnum) == 0x80)
- {
- ep = &pdev->dev.in_ep[epnum & 0x7F];
- }
- else
- {
- ep = &pdev->dev.out_ep[epnum];
- }
-
- ep->is_stall = 0;
- ep->num = epnum & 0x7F;
- ep->is_in = ((epnum & 0x80) == 0x80);
-
- USB_OTG_EPClearStall(pdev , ep);
- return (0);
-}
-
-
-/**
-* @brief This Function flushes the FIFOs.
-* @param pdev: device instance
-* @param epnum: endpoint address
-* @retval : status
-*/
-uint32_t DCD_EP_Flush (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
-{
-
- if ((epnum & 0x80) == 0x80)
- {
- USB_OTG_FlushTxFifo(pdev, epnum & 0x7F);
- }
- else
- {
- USB_OTG_FlushRxFifo(pdev);
- }
-
- return (0);
-}
-
-
-/**
-* @brief This Function set USB device address
-* @param pdev: device instance
-* @param address: new device address
-* @retval : status
-*/
-void DCD_EP_SetAddress (USB_OTG_CORE_HANDLE *pdev, uint8_t address)
-{
- USB_OTG_DCFG_TypeDef dcfg;
- dcfg.d32 = 0;
- dcfg.b.devaddr = address;
- USB_OTG_MODIFY_REG32( &pdev->regs.DREGS->DCFG, 0, dcfg.d32);
-}
-
-/**
-* @brief Connect device (enable internal pull-up)
-* @param pdev: device instance
-* @retval : None
-*/
-void DCD_DevConnect (USB_OTG_CORE_HANDLE *pdev)
-{
-#ifndef USE_OTG_MODE
- USB_OTG_DCTL_TypeDef dctl;
- dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
- /* Connect device */
- dctl.b.sftdiscon = 0;
- USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, dctl.d32);
- USB_OTG_BSP_mDelay(3);
-#endif
-}
-
-
-/**
-* @brief Disconnect device (disable internal pull-up)
-* @param pdev: device instance
-* @retval : None
-*/
-void DCD_DevDisconnect (USB_OTG_CORE_HANDLE *pdev)
-{
-#ifndef USE_OTG_MODE
- USB_OTG_DCTL_TypeDef dctl;
- dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
- /* Disconnect device for 3ms */
- dctl.b.sftdiscon = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, dctl.d32);
- USB_OTG_BSP_mDelay(3);
-#endif
-}
-
-
-/**
-* @brief returns the EP Status
-* @param pdev : Selected device
-* epnum : endpoint address
-* @retval : EP status
-*/
-
-uint32_t DCD_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,uint8_t epnum)
-{
- USB_OTG_EP *ep;
- uint32_t Status = 0;
-
- if ((0x80 & epnum) == 0x80)
- {
- ep = &pdev->dev.in_ep[epnum & 0x7F];
- }
- else
- {
- ep = &pdev->dev.out_ep[epnum];
- }
-
- Status = USB_OTG_GetEPStatus(pdev ,ep);
-
- /* Return the current status */
- return Status;
-}
-
-/**
-* @brief Set the EP Status
-* @param pdev : Selected device
-* Status : new Status
-* epnum : EP address
-* @retval : None
-*/
-void DCD_SetEPStatus (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum , uint32_t Status)
-{
- USB_OTG_EP *ep;
-
- if ((0x80 & epnum) == 0x80)
- {
- ep = &pdev->dev.in_ep[epnum & 0x7F];
- }
- else
- {
- ep = &pdev->dev.out_ep[epnum];
- }
-
- USB_OTG_SetEPStatus(pdev ,ep , Status);
-}
-
-/**
-* @}
-*/
-
-/**
-* @}
-*/
-
-/**
-* @}
-*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usb_dcd_int.c b/radio/bootloader/usb/usb_dcd_int.c
deleted file mode 100644
index 359d56997..000000000
--- a/radio/bootloader/usb/usb_dcd_int.c
+++ /dev/null
@@ -1,869 +0,0 @@
-/**
- ******************************************************************************
- * @file usb_dcd_int.c
- * @author MCD Application Team
- * @version V2.1.0
- * @date 19-March-2012
- * @brief Peripheral Device interrupt subroutines
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usb_dcd_int.h"
-/** @addtogroup USB_OTG_DRIVER
-* @{
-*/
-
-/** @defgroup USB_DCD_INT
-* @brief This file contains the interrupt subroutines for the Device mode.
-* @{
-*/
-
-
-/** @defgroup USB_DCD_INT_Private_Defines
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_INT_Private_TypesDefinitions
-* @{
-*/
-/**
-* @}
-*/
-
-
-
-/** @defgroup USB_DCD_INT_Private_Macros
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_INT_Private_Variables
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_INT_Private_FunctionPrototypes
-* @{
-*/
-/* static functions */
-static uint32_t DCD_ReadDevInEP (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum);
-
-/* Interrupt Handlers */
-static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_HandleSof_ISR(USB_OTG_CORE_HANDLE *pdev);
-
-static uint32_t DCD_HandleRxStatusQueueLevel_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev , uint32_t epnum);
-
-static uint32_t DCD_HandleUsbReset_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_HandleEnumDone_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_HandleResume_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_HandleUSBSuspend_ISR(USB_OTG_CORE_HANDLE *pdev);
-
-static uint32_t DCD_IsoINIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_IsoOUTIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev);
-#ifdef VBUS_SENSING_ENABLED
-static uint32_t DCD_SessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev);
-static uint32_t DCD_OTG_ISR(USB_OTG_CORE_HANDLE *pdev);
-#endif
-
-/**
-* @}
-*/
-
-
-/** @defgroup USB_DCD_INT_Private_Functions
-* @{
-*/
-
-
-#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
-/**
-* @brief USBD_OTG_EP1OUT_ISR_Handler
-* handles all USB Interrupts
-* @param pdev: device instance
-* @retval status
-*/
-uint32_t USBD_OTG_EP1OUT_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
-{
-
- USB_OTG_DOEPINTn_TypeDef doepint;
- USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
-
- doepint.d32 = USB_OTG_READ_REG32(&pdev->regs.OUTEP_REGS[1]->DOEPINT);
- doepint.d32&= USB_OTG_READ_REG32(&pdev->regs.DREGS->DOUTEP1MSK);
-
- /* Transfer complete */
- if ( doepint.b.xfercompl )
- {
- /* Clear the bit in DOEPINTn for this interrupt */
- CLEAR_OUT_EP_INTR(1, xfercompl);
- if (pdev->cfg.dma_enable == 1)
- {
- deptsiz.d32 = USB_OTG_READ_REG32(&(pdev->regs.OUTEP_REGS[1]->DOEPTSIZ));
- /*ToDo : handle more than one single MPS size packet */
- pdev->dev.out_ep[1].xfer_count = pdev->dev.out_ep[1].maxpacket - \
- deptsiz.b.xfersize;
- }
- /* Inform upper layer: data ready */
- /* RX COMPLETE */
- USBD_DCD_INT_fops->DataOutStage(pdev , 1);
-
- }
-
- /* Endpoint disable */
- if ( doepint.b.epdisabled )
- {
- /* Clear the bit in DOEPINTn for this interrupt */
- CLEAR_OUT_EP_INTR(1, epdisabled);
- }
-
- return 1;
-}
-
-/**
-* @brief USBD_OTG_EP1IN_ISR_Handler
-* handles all USB Interrupts
-* @param pdev: device instance
-* @retval status
-*/
-uint32_t USBD_OTG_EP1IN_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
-{
-
- USB_OTG_DIEPINTn_TypeDef diepint;
- uint32_t fifoemptymsk, msk, emp;
-
- msk = USB_OTG_READ_REG32(&pdev->regs.DREGS->DINEP1MSK);
- emp = USB_OTG_READ_REG32(&pdev->regs.DREGS->DIEPEMPMSK);
- msk |= ((emp >> 1 ) & 0x1) << 7;
- diepint.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[1]->DIEPINT) & msk;
-
- if ( diepint.b.xfercompl )
- {
- fifoemptymsk = 0x1 << 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
- CLEAR_IN_EP_INTR(1, xfercompl);
- /* TX COMPLETE */
- USBD_DCD_INT_fops->DataInStage(pdev , 1);
- }
- if ( diepint.b.epdisabled )
- {
- CLEAR_IN_EP_INTR(1, epdisabled);
- }
- if ( diepint.b.timeout )
- {
- CLEAR_IN_EP_INTR(1, timeout);
- }
- if (diepint.b.intktxfemp)
- {
- CLEAR_IN_EP_INTR(1, intktxfemp);
- }
- if (diepint.b.inepnakeff)
- {
- CLEAR_IN_EP_INTR(1, inepnakeff);
- }
- if (diepint.b.emptyintr)
- {
- DCD_WriteEmptyTxFifo(pdev , 1);
- CLEAR_IN_EP_INTR(1, emptyintr);
- }
- return 1;
-}
-#endif
-
-/**
-* @brief STM32_USBF_OTG_ISR_Handler
-* handles all USB Interrupts
-* @param pdev: device instance
-* @retval status
-*/
-uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintr_status;
- uint32_t retval = 0;
-
- if (USB_OTG_IsDeviceMode(pdev)) /* ensure that we are in device mode */
- {
- gintr_status.d32 = USB_OTG_ReadCoreItr(pdev);
- if (!gintr_status.d32) /* avoid spurious interrupt */
- {
- return 0;
- }
-
- if (gintr_status.b.outepintr)
- {
- retval |= DCD_HandleOutEP_ISR(pdev);
- }
-
- if (gintr_status.b.inepint)
- {
- retval |= DCD_HandleInEP_ISR(pdev);
- }
-
- if (gintr_status.b.modemismatch)
- {
- USB_OTG_GINTSTS_TypeDef gintsts;
-
- /* Clear interrupt */
- gintsts.d32 = 0;
- gintsts.b.modemismatch = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
- }
-
- if (gintr_status.b.wkupintr)
- {
- retval |= DCD_HandleResume_ISR(pdev);
- }
-
- if (gintr_status.b.usbsuspend)
- {
- retval |= DCD_HandleUSBSuspend_ISR(pdev);
- }
- if (gintr_status.b.sofintr)
- {
- retval |= DCD_HandleSof_ISR(pdev);
-
- }
-
- if (gintr_status.b.rxstsqlvl)
- {
- retval |= DCD_HandleRxStatusQueueLevel_ISR(pdev);
-
- }
-
- if (gintr_status.b.usbreset)
- {
- retval |= DCD_HandleUsbReset_ISR(pdev);
-
- }
- if (gintr_status.b.enumdone)
- {
- retval |= DCD_HandleEnumDone_ISR(pdev);
- }
-
- if (gintr_status.b.incomplisoin)
- {
- retval |= DCD_IsoINIncomplete_ISR(pdev);
- }
-
- if (gintr_status.b.incomplisoout)
- {
- retval |= DCD_IsoOUTIncomplete_ISR(pdev);
- }
-#ifdef VBUS_SENSING_ENABLED
- if (gintr_status.b.sessreqintr)
- {
- retval |= DCD_SessionRequest_ISR(pdev);
- }
-
- if (gintr_status.b.otgintr)
- {
- retval |= DCD_OTG_ISR(pdev);
- }
-#endif
- }
- return retval;
-}
-
-#ifdef VBUS_SENSING_ENABLED
-/**
-* @brief DCD_SessionRequest_ISR
-* Indicates that the USB_OTG controller has detected a connection
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_SessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintsts;
- USBD_DCD_INT_fops->DevConnected (pdev);
-
- /* Clear interrupt */
- gintsts.d32 = 0;
- gintsts.b.sessreqintr = 1;
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
- return 1;
-}
-
-/**
-* @brief DCD_OTG_ISR
-* Indicates that the USB_OTG controller has detected an OTG event:
-* used to detect the end of session i.e. disconnection
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_OTG_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
-
- USB_OTG_GOTGINT_TypeDef gotgint;
-
- gotgint.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGINT);
-
- if (gotgint.b.sesenddet)
- {
- USBD_DCD_INT_fops->DevDisconnected (pdev);
- }
- /* Clear OTG interrupt */
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGINT, gotgint.d32);
- return 1;
-}
-#endif
-/**
-* @brief DCD_HandleResume_ISR
-* Indicates that the USB_OTG controller has detected a resume or
-* remote Wake-up sequence
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleResume_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintsts;
- USB_OTG_DCTL_TypeDef devctl;
- USB_OTG_PCGCCTL_TypeDef power;
-
- if(pdev->cfg.low_power)
- {
- /* un-gate USB Core clock */
- power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
- power.b.gatehclk = 0;
- power.b.stoppclk = 0;
- USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);
- }
-
- /* Clear the Remote Wake-up Signaling */
- devctl.d32 = 0;
- devctl.b.rmtwkupsig = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, devctl.d32, 0);
-
- /* Inform upper layer by the Resume Event */
- USBD_DCD_INT_fops->Resume (pdev);
-
- /* Clear interrupt */
- gintsts.d32 = 0;
- gintsts.b.wkupintr = 1;
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
- return 1;
-}
-
-/**
-* @brief USB_OTG_HandleUSBSuspend_ISR
-* Indicates that SUSPEND state has been detected on the USB
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleUSBSuspend_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintsts;
- USB_OTG_PCGCCTL_TypeDef power;
- USB_OTG_DSTS_TypeDef dsts;
- __IO uint8_t prev_status = 0;
-
- prev_status = pdev->dev.device_status;
- USBD_DCD_INT_fops->Suspend (pdev);
-
- dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
-
- /* Clear interrupt */
- gintsts.d32 = 0;
- gintsts.b.usbsuspend = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
-
- if((pdev->cfg.low_power) && (dsts.b.suspsts == 1) &&
- (pdev->dev.connection_status == 1) &&
- (prev_status == USB_OTG_CONFIGURED))
- {
- /* switch-off the clocks */
- power.d32 = 0;
- power.b.stoppclk = 1;
- USB_OTG_MODIFY_REG32(pdev->regs.PCGCCTL, 0, power.d32);
-
- power.b.gatehclk = 1;
- USB_OTG_MODIFY_REG32(pdev->regs.PCGCCTL, 0, power.d32);
-
- /* Request to enter Sleep mode after exit from current ISR */
- SCB->SCR |= (SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk);
- }
- return 1;
-}
-
-/**
-* @brief DCD_HandleInEP_ISR
-* Indicates that an IN EP has a pending Interrupt
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_DIEPINTn_TypeDef diepint;
-
- uint32_t ep_intr;
- uint32_t epnum = 0;
- uint32_t fifoemptymsk;
- diepint.d32 = 0;
- ep_intr = USB_OTG_ReadDevAllInEPItr(pdev);
-
- while ( ep_intr )
- {
- if (ep_intr&0x1) /* In ITR */
- {
- diepint.d32 = DCD_ReadDevInEP(pdev , epnum); /* Get In ITR status */
- if ( diepint.b.xfercompl )
- {
- fifoemptymsk = 0x1 << epnum;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
- CLEAR_IN_EP_INTR(epnum, xfercompl);
- /* TX COMPLETE */
- USBD_DCD_INT_fops->DataInStage(pdev , epnum);
-
- if (pdev->cfg.dma_enable == 1)
- {
- if((epnum == 0) && (pdev->dev.device_state == USB_OTG_EP0_STATUS_IN))
- {
- /* prepare to rx more setup packets */
- USB_OTG_EP0_OutStart(pdev);
- }
- }
- }
- if ( diepint.b.timeout )
- {
- CLEAR_IN_EP_INTR(epnum, timeout);
- }
- if (diepint.b.intktxfemp)
- {
- CLEAR_IN_EP_INTR(epnum, intktxfemp);
- }
- if (diepint.b.inepnakeff)
- {
- CLEAR_IN_EP_INTR(epnum, inepnakeff);
- }
- if ( diepint.b.epdisabled )
- {
- CLEAR_IN_EP_INTR(epnum, epdisabled);
- }
- if (diepint.b.emptyintr)
- {
-
- DCD_WriteEmptyTxFifo(pdev , epnum);
-
- CLEAR_IN_EP_INTR(epnum, emptyintr);
- }
- }
- epnum++;
- ep_intr >>= 1;
- }
-
- return 1;
-}
-
-/**
-* @brief DCD_HandleOutEP_ISR
-* Indicates that an OUT EP has a pending Interrupt
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- uint32_t ep_intr;
- USB_OTG_DOEPINTn_TypeDef doepint;
- USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
- uint32_t epnum = 0;
-
- doepint.d32 = 0;
-
- /* Read in the device interrupt bits */
- ep_intr = USB_OTG_ReadDevAllOutEp_itr(pdev);
-
- while ( ep_intr )
- {
- if (ep_intr&0x1)
- {
-
- doepint.d32 = USB_OTG_ReadDevOutEP_itr(pdev, epnum);
-
- /* Transfer complete */
- if ( doepint.b.xfercompl )
- {
- /* Clear the bit in DOEPINTn for this interrupt */
- CLEAR_OUT_EP_INTR(epnum, xfercompl);
- if (pdev->cfg.dma_enable == 1)
- {
- deptsiz.d32 = USB_OTG_READ_REG32(&(pdev->regs.OUTEP_REGS[epnum]->DOEPTSIZ));
- /*ToDo : handle more than one single MPS size packet */
- pdev->dev.out_ep[epnum].xfer_count = pdev->dev.out_ep[epnum].maxpacket - \
- deptsiz.b.xfersize;
- }
- /* Inform upper layer: data ready */
- /* RX COMPLETE */
- USBD_DCD_INT_fops->DataOutStage(pdev , epnum);
-
- if (pdev->cfg.dma_enable == 1)
- {
- if((epnum == 0) && (pdev->dev.device_state == USB_OTG_EP0_STATUS_OUT))
- {
- /* prepare to rx more setup packets */
- USB_OTG_EP0_OutStart(pdev);
- }
- }
- }
- /* Endpoint disable */
- if ( doepint.b.epdisabled )
- {
- /* Clear the bit in DOEPINTn for this interrupt */
- CLEAR_OUT_EP_INTR(epnum, epdisabled);
- }
- /* Setup Phase Done (control EPs) */
- if ( doepint.b.setup )
- {
-
- /* inform the upper layer that a setup packet is available */
- /* SETUP COMPLETE */
- USBD_DCD_INT_fops->SetupStage(pdev);
- CLEAR_OUT_EP_INTR(epnum, setup);
- }
- }
- epnum++;
- ep_intr >>= 1;
- }
- return 1;
-}
-
-/**
-* @brief DCD_HandleSof_ISR
-* Handles the SOF Interrupts
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleSof_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef GINTSTS;
-
-
- USBD_DCD_INT_fops->SOF(pdev);
-
- /* Clear interrupt */
- GINTSTS.d32 = 0;
- GINTSTS.b.sofintr = 1;
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, GINTSTS.d32);
-
- return 1;
-}
-
-/**
-* @brief DCD_HandleRxStatusQueueLevel_ISR
-* Handles the Rx Status Queue Level Interrupt
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleRxStatusQueueLevel_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTMSK_TypeDef int_mask;
- USB_OTG_DRXSTS_TypeDef status;
- USB_OTG_EP *ep;
-
- /* Disable the Rx Status Queue Level interrupt */
- int_mask.d32 = 0;
- int_mask.b.rxstsqlvl = 1;
- USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, int_mask.d32, 0);
-
- /* Get the Status from the top of the FIFO */
- status.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GRXSTSP );
-
- ep = &pdev->dev.out_ep[status.b.epnum];
-
- switch (status.b.pktsts)
- {
- case STS_GOUT_NAK:
- break;
- case STS_DATA_UPDT:
- if (status.b.bcnt)
- {
- USB_OTG_ReadPacket(pdev,ep->xfer_buff, status.b.bcnt);
- ep->xfer_buff += status.b.bcnt;
- ep->xfer_count += status.b.bcnt;
- }
- break;
- case STS_XFER_COMP:
- break;
- case STS_SETUP_COMP:
- break;
- case STS_SETUP_UPDT:
- /* Copy the setup packet received in FIFO into the setup buffer in RAM */
- USB_OTG_ReadPacket(pdev , pdev->dev.setup_packet, 8);
- ep->xfer_count += status.b.bcnt;
- break;
- default:
- break;
- }
-
- /* Enable the Rx Status Queue Level interrupt */
- USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, 0, int_mask.d32);
-
- return 1;
-}
-
-/**
-* @brief DCD_WriteEmptyTxFifo
-* check FIFO for the next packet to be loaded
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
-{
- USB_OTG_DTXFSTSn_TypeDef txstatus;
- USB_OTG_EP *ep;
- uint32_t len = 0;
- uint32_t len32b;
- txstatus.d32 = 0;
-
- ep = &pdev->dev.in_ep[epnum];
-
- len = ep->xfer_len - ep->xfer_count;
-
- if (len > ep->maxpacket)
- {
- len = ep->maxpacket;
- }
-
- len32b = (len + 3) / 4;
- txstatus.d32 = USB_OTG_READ_REG32( &pdev->regs.INEP_REGS[epnum]->DTXFSTS);
-
-
-
- while (txstatus.b.txfspcavail > len32b &&
- ep->xfer_count < ep->xfer_len &&
- ep->xfer_len != 0)
- {
- /* Write the FIFO */
- len = ep->xfer_len - ep->xfer_count;
-
- if (len > ep->maxpacket)
- {
- len = ep->maxpacket;
- }
- len32b = (len + 3) / 4;
-
- USB_OTG_WritePacket (pdev , ep->xfer_buff, epnum, len);
-
- ep->xfer_buff += len;
- ep->xfer_count += len;
-
- txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
- }
-
- return 1;
-}
-
-/**
-* @brief DCD_HandleUsbReset_ISR
-* This interrupt occurs when a USB Reset is detected
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleUsbReset_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_DAINT_TypeDef daintmsk;
- USB_OTG_DOEPMSK_TypeDef doepmsk;
- USB_OTG_DIEPMSK_TypeDef diepmsk;
- USB_OTG_DCFG_TypeDef dcfg;
- USB_OTG_DCTL_TypeDef dctl;
- USB_OTG_GINTSTS_TypeDef gintsts;
- uint32_t i;
-
- dctl.d32 = 0;
- daintmsk.d32 = 0;
- doepmsk.d32 = 0;
- diepmsk.d32 = 0;
- dcfg.d32 = 0;
- gintsts.d32 = 0;
-
- /* Clear the Remote Wake-up Signaling */
- dctl.b.rmtwkupsig = 1;
- USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DCTL, dctl.d32, 0 );
-
- /* Flush the Tx FIFO */
- USB_OTG_FlushTxFifo(pdev , 0 );
-
- for (i = 0; i < pdev->cfg.dev_endpoints ; i++)
- {
- USB_OTG_WRITE_REG32( &pdev->regs.INEP_REGS[i]->DIEPINT, 0xFF);
- USB_OTG_WRITE_REG32( &pdev->regs.OUTEP_REGS[i]->DOEPINT, 0xFF);
- }
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINT, 0xFFFFFFFF );
-
- daintmsk.ep.in = 1;
- daintmsk.ep.out = 1;
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DAINTMSK, daintmsk.d32 );
-
- doepmsk.b.setup = 1;
- doepmsk.b.xfercompl = 1;
- doepmsk.b.epdisabled = 1;
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOEPMSK, doepmsk.d32 );
-#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOUTEP1MSK, doepmsk.d32 );
-#endif
- diepmsk.b.xfercompl = 1;
- diepmsk.b.timeout = 1;
- diepmsk.b.epdisabled = 1;
-
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DIEPMSK, diepmsk.d32 );
-#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DINEP1MSK, diepmsk.d32 );
-#endif
- /* Reset Device Address */
- dcfg.d32 = USB_OTG_READ_REG32( &pdev->regs.DREGS->DCFG);
- dcfg.b.devaddr = 0;
- USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DCFG, dcfg.d32);
-
-
- /* setup EP0 to receive SETUP packets */
- USB_OTG_EP0_OutStart(pdev);
-
- /* Clear interrupt */
- gintsts.d32 = 0;
- gintsts.b.usbreset = 1;
- USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
-
- /*Reset internal state machine */
- USBD_DCD_INT_fops->Reset(pdev);
- return 1;
-}
-
-/**
-* @brief DCD_HandleEnumDone_ISR
-* Read the device status register and set the device speed
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_HandleEnumDone_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintsts;
- USB_OTG_GUSBCFG_TypeDef gusbcfg;
-
- USB_OTG_EP0Activate(pdev);
-
- /* Set USB turn-around time based on device speed and PHY interface. */
- gusbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
-
- /* Full or High speed */
- if ( USB_OTG_GetDeviceSpeed(pdev) == USB_SPEED_HIGH)
- {
- pdev->cfg.speed = USB_OTG_SPEED_HIGH;
- pdev->cfg.mps = USB_OTG_HS_MAX_PACKET_SIZE ;
- gusbcfg.b.usbtrdtim = 9;
- }
- else
- {
- pdev->cfg.speed = USB_OTG_SPEED_FULL;
- pdev->cfg.mps = USB_OTG_FS_MAX_PACKET_SIZE ;
- gusbcfg.b.usbtrdtim = 5;
- }
-
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, gusbcfg.d32);
-
- /* Clear interrupt */
- gintsts.d32 = 0;
- gintsts.b.enumdone = 1;
- USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, gintsts.d32 );
- return 1;
-}
-
-
-/**
-* @brief DCD_IsoINIncomplete_ISR
-* handle the ISO IN incomplete interrupt
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_IsoINIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintsts;
-
- gintsts.d32 = 0;
-
- USBD_DCD_INT_fops->IsoINIncomplete (pdev);
-
- /* Clear interrupt */
- gintsts.b.incomplisoin = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
-
- return 1;
-}
-
-/**
-* @brief DCD_IsoOUTIncomplete_ISR
-* handle the ISO OUT incomplete interrupt
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_IsoOUTIncomplete_ISR(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_GINTSTS_TypeDef gintsts;
-
- gintsts.d32 = 0;
-
- USBD_DCD_INT_fops->IsoOUTIncomplete (pdev);
-
- /* Clear interrupt */
- gintsts.b.incomplisoout = 1;
- USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
- return 1;
-}
-/**
-* @brief DCD_ReadDevInEP
-* Reads ep flags
-* @param pdev: device instance
-* @retval status
-*/
-static uint32_t DCD_ReadDevInEP (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
-{
- uint32_t v, msk, emp;
- msk = USB_OTG_READ_REG32(&pdev->regs.DREGS->DIEPMSK);
- emp = USB_OTG_READ_REG32(&pdev->regs.DREGS->DIEPEMPMSK);
- msk |= ((emp >> epnum) & 0x1) << 7;
- v = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DIEPINT) & msk;
- return v;
-}
-
-
-
-/**
-* @}
-*/
-
-/**
-* @}
-*/
-
-/**
-* @}
-*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usbd_core.c b/radio/bootloader/usb/usbd_core.c
deleted file mode 100644
index c09028eef..000000000
--- a/radio/bootloader/usb/usbd_core.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_core.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides all the USBD core functions.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_core.h"
-#include "usbd_req.h"
-#include "usbd_ioreq.h"
-#include "usb_dcd_int.h"
-#include "usb_bsp.h"
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
-* @{
-*/
-
-
-/** @defgroup USBD_CORE
-* @brief usbd core module
-* @{
-*/
-
-/** @defgroup USBD_CORE_Private_TypesDefinitions
-* @{
-*/
-/**
-* @}
-*/
-
-
-/** @defgroup USBD_CORE_Private_Defines
-* @{
-*/
-
-/**
-* @}
-*/
-
-
-/** @defgroup USBD_CORE_Private_Macros
-* @{
-*/
-/**
-* @}
-*/
-
-
-
-
-/** @defgroup USBD_CORE_Private_FunctionPrototypes
-* @{
-*/
-static uint8_t USBD_SetupStage(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_DataOutStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
-static uint8_t USBD_DataInStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
-static uint8_t USBD_SOF(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_Reset(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_Suspend(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_Resume(USB_OTG_CORE_HANDLE *pdev);
-#ifdef VBUS_SENSING_ENABLED
-static uint8_t USBD_DevConnected(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_DevDisconnected(USB_OTG_CORE_HANDLE *pdev);
-#endif
-static uint8_t USBD_IsoINIncomplete(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_IsoOUTIncomplete(USB_OTG_CORE_HANDLE *pdev);
-static uint8_t USBD_RunTestMode (USB_OTG_CORE_HANDLE *pdev) ;
-/**
-* @}
-*/
-
-/** @defgroup USBD_CORE_Private_Variables
-* @{
-*/
-
-__IO USB_OTG_DCTL_TypeDef SET_TEST_MODE;
-
-USBD_DCD_INT_cb_TypeDef USBD_DCD_INT_cb =
-{
- USBD_DataOutStage,
- USBD_DataInStage,
- USBD_SetupStage,
- USBD_SOF,
- USBD_Reset,
- USBD_Suspend,
- USBD_Resume,
- USBD_IsoINIncomplete,
- USBD_IsoOUTIncomplete,
-#ifdef VBUS_SENSING_ENABLED
-USBD_DevConnected,
-USBD_DevDisconnected,
-#endif
-};
-
-USBD_DCD_INT_cb_TypeDef *USBD_DCD_INT_fops = &USBD_DCD_INT_cb;
-/**
-* @}
-*/
-
-/** @defgroup USBD_CORE_Private_Functions
-* @{
-*/
-
-/**
-* @brief USBD_Init
-* Initailizes the device stack and load the class driver
-* @param pdev: device instance
-* @param core_address: USB OTG core ID
-* @param class_cb: Class callback structure address
-* @param usr_cb: User callback structure address
-* @retval None
-*/
-void USBD_Init(USB_OTG_CORE_HANDLE *pdev,
- USB_OTG_CORE_ID_TypeDef coreID,
- USBD_DEVICE *pDevice,
- USBD_Class_cb_TypeDef *class_cb,
- USBD_Usr_cb_TypeDef *usr_cb)
-{
- /* Hardware Init */
- USB_OTG_BSP_Init(pdev);
-
- USBD_DeInit(pdev);
-
- /*Register class and user callbacks */
- pdev->dev.class_cb = class_cb;
- pdev->dev.usr_cb = usr_cb;
- pdev->dev.usr_device = pDevice;
-
- /* set USB OTG core params */
- DCD_Init(pdev , coreID);
-
- /* Upon Init call usr callback */
- pdev->dev.usr_cb->Init();
-
- /* Enable Interrupts */
- USB_OTG_BSP_EnableInterrupt(pdev);
-}
-
-/**
-* @brief USBD_DeInit
-* Re-Initialize th device library
-* @param pdev: device instance
-* @retval status: status
-*/
-USBD_Status USBD_DeInit(USB_OTG_CORE_HANDLE *pdev)
-{
- /* Software Init */
-
- return USBD_OK;
-}
-
-/**
-* @brief USBD_SetupStage
-* Handle the setup stage
-* @param pdev: device instance
-* @retval status
-*/
-static uint8_t USBD_SetupStage(USB_OTG_CORE_HANDLE *pdev)
-{
- USB_SETUP_REQ req;
-
- USBD_ParseSetupRequest(pdev , &req);
-
- switch (req.bmRequest & 0x1F)
- {
- case USB_REQ_RECIPIENT_DEVICE:
- USBD_StdDevReq (pdev, &req);
- break;
-
- case USB_REQ_RECIPIENT_INTERFACE:
- USBD_StdItfReq(pdev, &req);
- break;
-
- case USB_REQ_RECIPIENT_ENDPOINT:
- USBD_StdEPReq(pdev, &req);
- break;
-
- default:
- DCD_EP_Stall(pdev , req.bmRequest & 0x80);
- break;
- }
- return USBD_OK;
-}
-
-/**
-* @brief USBD_DataOutStage
-* Handle data out stage
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval status
-*/
-static uint8_t USBD_DataOutStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
-{
- USB_OTG_EP *ep;
-
- if(epnum == 0)
- {
- ep = &pdev->dev.out_ep[0];
- if ( pdev->dev.device_state == USB_OTG_EP0_DATA_OUT)
- {
- if(ep->rem_data_len > ep->maxpacket)
- {
- ep->rem_data_len -= ep->maxpacket;
-
- if(pdev->cfg.dma_enable == 1)
- {
- /* in slave mode this, is handled by the RxSTSQLvl ISR */
- ep->xfer_buff += ep->maxpacket;
- }
- USBD_CtlContinueRx (pdev,
- ep->xfer_buff,
- MIN(ep->rem_data_len ,ep->maxpacket));
- }
- else
- {
- if((pdev->dev.class_cb->EP0_RxReady != NULL)&&
- (pdev->dev.device_status == USB_OTG_CONFIGURED))
- {
- pdev->dev.class_cb->EP0_RxReady(pdev);
- }
- USBD_CtlSendStatus(pdev);
- }
- }
- }
- else if((pdev->dev.class_cb->DataOut != NULL)&&
- (pdev->dev.device_status == USB_OTG_CONFIGURED))
- {
- pdev->dev.class_cb->DataOut(pdev, epnum);
- }
- return USBD_OK;
-}
-
-/**
-* @brief USBD_DataInStage
-* Handle data in stage
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval status
-*/
-static uint8_t USBD_DataInStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
-{
- USB_OTG_EP *ep;
-
- if(epnum == 0)
- {
- ep = &pdev->dev.in_ep[0];
- if ( pdev->dev.device_state == USB_OTG_EP0_DATA_IN)
- {
- if(ep->rem_data_len > ep->maxpacket)
- {
- ep->rem_data_len -= ep->maxpacket;
- if(pdev->cfg.dma_enable == 1)
- {
- /* in slave mode this, is handled by the TxFifoEmpty ISR */
- ep->xfer_buff += ep->maxpacket;
- }
- USBD_CtlContinueSendData (pdev,
- ep->xfer_buff,
- ep->rem_data_len);
- }
- else
- { /* last packet is MPS multiple, so send ZLP packet */
- if((ep->total_data_len % ep->maxpacket == 0) &&
- (ep->total_data_len >= ep->maxpacket) &&
- (ep->total_data_len < ep->ctl_data_len ))
- {
-
- USBD_CtlContinueSendData(pdev , NULL, 0);
- ep->ctl_data_len = 0;
- }
- else
- {
- if((pdev->dev.class_cb->EP0_TxSent != NULL)&&
- (pdev->dev.device_status == USB_OTG_CONFIGURED))
- {
- pdev->dev.class_cb->EP0_TxSent(pdev);
- }
- USBD_CtlReceiveStatus(pdev);
- }
- }
- }
- if (pdev->dev.test_mode == 1)
- {
- USBD_RunTestMode(pdev);
- pdev->dev.test_mode = 0;
- }
- }
- else if((pdev->dev.class_cb->DataIn != NULL)&&
- (pdev->dev.device_status == USB_OTG_CONFIGURED))
- {
- pdev->dev.class_cb->DataIn(pdev, epnum);
- }
- return USBD_OK;
-}
-
-
-
-
-/**
-* @brief USBD_RunTestMode
-* Launch test mode process
-* @param pdev: device instance
-* @retval status
-*/
-static uint8_t USBD_RunTestMode (USB_OTG_CORE_HANDLE *pdev)
-{
- USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, SET_TEST_MODE.d32);
- return USBD_OK;
-}
-
-/**
-* @brief USBD_Reset
-* Handle Reset event
-* @param pdev: device instance
-* @retval status
-*/
-
-static uint8_t USBD_Reset(USB_OTG_CORE_HANDLE *pdev)
-{
- /* Open EP0 OUT */
- DCD_EP_Open(pdev,
- 0x00,
- USB_OTG_MAX_EP0_SIZE,
- EP_TYPE_CTRL);
-
- /* Open EP0 IN */
- DCD_EP_Open(pdev,
- 0x80,
- USB_OTG_MAX_EP0_SIZE,
- EP_TYPE_CTRL);
-
- /* Upon Reset call usr call back */
- pdev->dev.device_status = USB_OTG_DEFAULT;
- pdev->dev.usr_cb->DeviceReset(pdev->cfg.speed);
-
- return USBD_OK;
-}
-
-/**
-* @brief USBD_Resume
-* Handle Resume event
-* @param pdev: device instance
-* @retval status
-*/
-
-static uint8_t USBD_Resume(USB_OTG_CORE_HANDLE *pdev)
-{
- /* Upon Resume call usr call back */
- pdev->dev.usr_cb->DeviceResumed();
- pdev->dev.device_status = pdev->dev.device_old_status;
- pdev->dev.device_status = USB_OTG_CONFIGURED;
- return USBD_OK;
-}
-
-
-/**
-* @brief USBD_Suspend
-* Handle Suspend event
-* @param pdev: device instance
-* @retval status
-*/
-
-static uint8_t USBD_Suspend(USB_OTG_CORE_HANDLE *pdev)
-{
- pdev->dev.device_old_status = pdev->dev.device_status;
- pdev->dev.device_status = USB_OTG_SUSPENDED;
- /* Upon Resume call usr call back */
- pdev->dev.usr_cb->DeviceSuspended();
- return USBD_OK;
-}
-
-
-/**
-* @brief USBD_SOF
-* Handle SOF event
-* @param pdev: device instance
-* @retval status
-*/
-
-static uint8_t USBD_SOF(USB_OTG_CORE_HANDLE *pdev)
-{
- if(pdev->dev.class_cb->SOF)
- {
- pdev->dev.class_cb->SOF(pdev);
- }
- return USBD_OK;
-}
-/**
-* @brief USBD_SetCfg
-* Configure device and start the interface
-* @param pdev: device instance
-* @param cfgidx: configuration index
-* @retval status
-*/
-
-USBD_Status USBD_SetCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx)
-{
- pdev->dev.class_cb->Init(pdev, cfgidx);
-
- /* Upon set config call usr call back */
- pdev->dev.usr_cb->DeviceConfigured();
- return USBD_OK;
-}
-
-/**
-* @brief USBD_ClrCfg
-* Clear current configuration
-* @param pdev: device instance
-* @param cfgidx: configuration index
-* @retval status: USBD_Status
-*/
-USBD_Status USBD_ClrCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx)
-{
- pdev->dev.class_cb->DeInit(pdev, cfgidx);
- return USBD_OK;
-}
-
-/**
-* @brief USBD_IsoINIncomplete
-* Handle iso in incomplete event
-* @param pdev: device instance
-* @retval status
-*/
-static uint8_t USBD_IsoINIncomplete(USB_OTG_CORE_HANDLE *pdev)
-{
- pdev->dev.class_cb->IsoINIncomplete(pdev);
- return USBD_OK;
-}
-
-/**
-* @brief USBD_IsoOUTIncomplete
-* Handle iso out incomplete event
-* @param pdev: device instance
-* @retval status
-*/
-static uint8_t USBD_IsoOUTIncomplete(USB_OTG_CORE_HANDLE *pdev)
-{
- pdev->dev.class_cb->IsoOUTIncomplete(pdev);
- return USBD_OK;
-}
-
-#ifdef VBUS_SENSING_ENABLED
-/**
-* @brief USBD_DevConnected
-* Handle device connection event
-* @param pdev: device instance
-* @retval status
-*/
-static uint8_t USBD_DevConnected(USB_OTG_CORE_HANDLE *pdev)
-{
- pdev->dev.usr_cb->DeviceConnected();
- pdev->dev.connection_status = 1;
- return USBD_OK;
-}
-
-/**
-* @brief USBD_DevDisconnected
-* Handle device disconnection event
-* @param pdev: device instance
-* @retval status
-*/
-static uint8_t USBD_DevDisconnected(USB_OTG_CORE_HANDLE *pdev)
-{
- pdev->dev.usr_cb->DeviceDisconnected();
- pdev->dev.class_cb->DeInit(pdev, 0);
- pdev->dev.connection_status = 0;
- return USBD_OK;
-}
-#endif
-/**
-* @}
-*/
-
-
-/**
-* @}
-*/
-
-
-/**
-* @}
-*/
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/radio/bootloader/usb/usbd_desc.c b/radio/bootloader/usb/usbd_desc.c
deleted file mode 100644
index 373203498..000000000
--- a/radio/bootloader/usb/usbd_desc.c
+++ /dev/null
@@ -1,223 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_desc.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides the USBD descriptors and string formating method.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_core.h"
-#include "usbd_desc.h"
-#include "usbd_req.h"
-#include "usbd_conf.h"
-#include "usb_regs.h"
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup USBD_DESC
- * @brief USBD descriptors module
- * @{
- */
-
-/** @defgroup USBD_DESC_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup USBD_DESC_Private_Defines
- * @{
- */
-
-#define USBD_VID 0x0483
-#define USBD_PID 0x5720
-
-#define USBD_LANGID_STRING 0x409
-#define USBD_MANUFACTURER_STRING "FrSky"
-
-#define USBD_PRODUCT_FS_STRING "FrSky Taranis Mass Storage"
-#define USBD_SERIALNUMBER_FS_STRING "00000000001B"
-#define USBD_CONFIGURATION_FS_STRING "MSC Config"
-#define USBD_INTERFACE_FS_STRING "MSC Interface"
-
-USBD_DEVICE USR_desc =
-{
- USBD_USR_DeviceDescriptor,
- USBD_USR_LangIDStrDescriptor,
- USBD_USR_ManufacturerStrDescriptor,
- USBD_USR_ProductStrDescriptor,
- USBD_USR_SerialStrDescriptor,
- USBD_USR_ConfigStrDescriptor,
- USBD_USR_InterfaceStrDescriptor,
-};
-
-/* USB Standard Device Descriptor */
-__ALIGN_BEGIN uint8_t USBD_DeviceDesc[USB_SIZ_DEVICE_DESC] __ALIGN_END =
- {
- 0x12, /*bLength */
- USB_DEVICE_DESCRIPTOR_TYPE, /*bDescriptorType*/
- 0x00, /*bcdUSB */
- 0x02,
- 0x00, /*bDeviceClass*/
- 0x00, /*bDeviceSubClass*/
- 0x00, /*bDeviceProtocol*/
- USB_OTG_MAX_EP0_SIZE, /*bMaxPacketSize*/
- LOBYTE(USBD_VID), /*idVendor*/
- HIBYTE(USBD_VID), /*idVendor*/
- LOBYTE(USBD_PID), /*idVendor*/
- HIBYTE(USBD_PID), /*idVendor*/
- 0x00, /*bcdDevice rel. 2.00*/
- 0x02,
- USBD_IDX_MFC_STR, /*Index of manufacturer string*/
- USBD_IDX_PRODUCT_STR, /*Index of product string*/
- USBD_IDX_SERIAL_STR, /*Index of serial number string*/
- USBD_CFG_MAX_NUM /*bNumConfigurations*/
- } ; /* USB_DeviceDescriptor */
-
-/* USB Standard Device Descriptor */
-__ALIGN_BEGIN uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END =
-{
- USB_LEN_DEV_QUALIFIER_DESC,
- USB_DESC_TYPE_DEVICE_QUALIFIER,
- 0x00,
- 0x02,
- 0x00,
- 0x00,
- 0x00,
- 0x40,
- 0x01,
- 0x00,
-};
-
-/* USB Standard Device Descriptor */
-__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID] __ALIGN_END =
-{
- USB_SIZ_STRING_LANGID,
- USB_DESC_TYPE_STRING,
- LOBYTE(USBD_LANGID_STRING),
- HIBYTE(USBD_LANGID_STRING),
-};
-
-/*
-* @brief USBD_USR_DeviceDescriptor
-* return the device descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length)
-{
- *length = sizeof(USBD_DeviceDesc);
- return USBD_DeviceDesc;
-}
-
-/**
-* @brief USBD_USR_LangIDStrDescriptor
-* return the LangID string descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length)
-{
- *length = sizeof(USBD_LangIDDesc);
- return USBD_LangIDDesc;
-}
-
-
-/**
-* @brief USBD_USR_ProductStrDescriptor
-* return the product string descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_ProductStrDescriptor( uint8_t speed , uint16_t *length)
-{
-
- USBD_GetString ((uint8_t*)USBD_PRODUCT_FS_STRING, USBD_StrDesc, length);
-
- return USBD_StrDesc;
-}
-
-/**
-* @brief USBD_USR_ManufacturerStrDescriptor
-* return the manufacturer string descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_ManufacturerStrDescriptor( uint8_t speed , uint16_t *length)
-{
- USBD_GetString ((uint8_t*)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
- return USBD_StrDesc;
-}
-
-/**
-* @brief USBD_USR_SerialStrDescriptor
-* return the serial number string descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length)
-{
- USBD_GetString ((uint8_t*)USBD_SERIALNUMBER_FS_STRING, USBD_StrDesc, length);
-
- return USBD_StrDesc;
-}
-
-/**
-* @brief USBD_USR_ConfigStrDescriptor
-* return the configuration string descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length)
-{
- USBD_GetString ((uint8_t *)USBD_CONFIGURATION_FS_STRING, USBD_StrDesc, length);
- return USBD_StrDesc;
-}
-
-
-/**
-* @brief USBD_USR_InterfaceStrDescriptor
-* return the interface string descriptor
-* @param speed : current device speed
-* @param length : pointer to data length variable
-* @retval pointer to descriptor buffer
-*/
-uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length)
-{
- USBD_GetString ((uint8_t*)USBD_INTERFACE_FS_STRING, USBD_StrDesc, length);
- return USBD_StrDesc;
-}
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/radio/bootloader/usb/usbd_ioreq.c b/radio/bootloader/usb/usbd_ioreq.c
deleted file mode 100644
index 139a86a9e..000000000
--- a/radio/bootloader/usb/usbd_ioreq.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_ioreq.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides the IO requests APIs for control endpoints.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_ioreq.h"
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup USBD_IOREQ
- * @brief control I/O requests module
- * @{
- */
-
-/** @defgroup USBD_IOREQ_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup USBD_IOREQ_Private_Defines
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @defgroup USBD_IOREQ_Private_Macros
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup USBD_IOREQ_Private_Variables
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @defgroup USBD_IOREQ_Private_FunctionPrototypes
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup USBD_IOREQ_Private_Functions
- * @{
- */
-
-/**
-* @brief USBD_CtlSendData
-* send data on the ctl pipe
-* @param pdev: device instance
-* @param buff: pointer to data buffer
-* @param len: length of data to be sent
-* @retval status
-*/
-USBD_Status USBD_CtlSendData (USB_OTG_CORE_HANDLE *pdev,
- uint8_t *pbuf,
- uint16_t len)
-{
- USBD_Status ret = USBD_OK;
-
- pdev->dev.in_ep[0].total_data_len = len;
- pdev->dev.in_ep[0].rem_data_len = len;
- pdev->dev.device_state = USB_OTG_EP0_DATA_IN;
-
- DCD_EP_Tx (pdev, 0, pbuf, len);
-
- return ret;
-}
-
-/**
-* @brief USBD_CtlContinueSendData
-* continue sending data on the ctl pipe
-* @param pdev: device instance
-* @param buff: pointer to data buffer
-* @param len: length of data to be sent
-* @retval status
-*/
-USBD_Status USBD_CtlContinueSendData (USB_OTG_CORE_HANDLE *pdev,
- uint8_t *pbuf,
- uint16_t len)
-{
- USBD_Status ret = USBD_OK;
-
- DCD_EP_Tx (pdev, 0, pbuf, len);
-
-
- return ret;
-}
-
-/**
-* @brief USBD_CtlPrepareRx
-* receive data on the ctl pipe
-* @param pdev: USB OTG device instance
-* @param buff: pointer to data buffer
-* @param len: length of data to be received
-* @retval status
-*/
-USBD_Status USBD_CtlPrepareRx (USB_OTG_CORE_HANDLE *pdev,
- uint8_t *pbuf,
- uint16_t len)
-{
- USBD_Status ret = USBD_OK;
-
- pdev->dev.out_ep[0].total_data_len = len;
- pdev->dev.out_ep[0].rem_data_len = len;
- pdev->dev.device_state = USB_OTG_EP0_DATA_OUT;
-
- DCD_EP_PrepareRx (pdev,
- 0,
- pbuf,
- len);
-
-
- return ret;
-}
-
-/**
-* @brief USBD_CtlContinueRx
-* continue receive data on the ctl pipe
-* @param pdev: USB OTG device instance
-* @param buff: pointer to data buffer
-* @param len: length of data to be received
-* @retval status
-*/
-USBD_Status USBD_CtlContinueRx (USB_OTG_CORE_HANDLE *pdev,
- uint8_t *pbuf,
- uint16_t len)
-{
- USBD_Status ret = USBD_OK;
-
- DCD_EP_PrepareRx (pdev,
- 0,
- pbuf,
- len);
- return ret;
-}
-/**
-* @brief USBD_CtlSendStatus
-* send zero lzngth packet on the ctl pipe
-* @param pdev: USB OTG device instance
-* @retval status
-*/
-USBD_Status USBD_CtlSendStatus (USB_OTG_CORE_HANDLE *pdev)
-{
- USBD_Status ret = USBD_OK;
- pdev->dev.device_state = USB_OTG_EP0_STATUS_IN;
- DCD_EP_Tx (pdev,
- 0,
- NULL,
- 0);
-
- USB_OTG_EP0_OutStart(pdev);
-
- return ret;
-}
-
-/**
-* @brief USBD_CtlReceiveStatus
-* receive zero lzngth packet on the ctl pipe
-* @param pdev: USB OTG device instance
-* @retval status
-*/
-USBD_Status USBD_CtlReceiveStatus (USB_OTG_CORE_HANDLE *pdev)
-{
- USBD_Status ret = USBD_OK;
- pdev->dev.device_state = USB_OTG_EP0_STATUS_OUT;
- DCD_EP_PrepareRx ( pdev,
- 0,
- NULL,
- 0);
-
- USB_OTG_EP0_OutStart(pdev);
-
- return ret;
-}
-
-
-/**
-* @brief USBD_GetRxCount
-* returns the received data length
-* @param pdev: USB OTG device instance
-* epnum: endpoint index
-* @retval Rx Data blength
-*/
-uint16_t USBD_GetRxCount (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
-{
- return pdev->dev.out_ep[epnum].xfer_count;
-}
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usbd_msc_bot.c b/radio/bootloader/usb/usbd_msc_bot.c
deleted file mode 100644
index 227aa6e2d..000000000
--- a/radio/bootloader/usb/usbd_msc_bot.c
+++ /dev/null
@@ -1,400 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_msc_bot.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides all the BOT protocol core functions.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_msc_bot.h"
-#include "usbd_msc_scsi.h"
-#include "usbd_ioreq.h"
-#include "usbd_msc_mem.h"
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup MSC_BOT
- * @brief BOT protocol module
- * @{
- */
-
-/** @defgroup MSC_BOT_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_BOT_Private_Defines
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @defgroup MSC_BOT_Private_Macros
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_BOT_Private_Variables
- * @{
- */
-uint16_t MSC_BOT_DataLen;
-uint8_t MSC_BOT_State;
-uint8_t MSC_BOT_Status;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN uint8_t MSC_BOT_Data[MSC_MEDIA_PACKET] __ALIGN_END ;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN MSC_BOT_CBW_TypeDef MSC_BOT_cbw __ALIGN_END ;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN MSC_BOT_CSW_TypeDef MSC_BOT_csw __ALIGN_END ;
-/**
- * @}
- */
-
-
-/** @defgroup MSC_BOT_Private_FunctionPrototypes
- * @{
- */
-static void MSC_BOT_CBW_Decode (USB_OTG_CORE_HANDLE *pdev);
-
-static void MSC_BOT_SendData (USB_OTG_CORE_HANDLE *pdev,
- uint8_t* pbuf,
- uint16_t len);
-
-static void MSC_BOT_Abort(USB_OTG_CORE_HANDLE *pdev);
-/**
- * @}
- */
-
-
-/** @defgroup MSC_BOT_Private_Functions
- * @{
- */
-
-
-
-/**
-* @brief MSC_BOT_Init
-* Initialize the BOT Process
-* @param pdev: device instance
-* @retval None
-*/
-void MSC_BOT_Init (USB_OTG_CORE_HANDLE *pdev)
-{
- MSC_BOT_State = BOT_IDLE;
- MSC_BOT_Status = BOT_STATE_NORMAL;
- USBD_STORAGE_fops->Init(0);
-
- DCD_EP_Flush(pdev, MSC_OUT_EP);
- DCD_EP_Flush(pdev, MSC_IN_EP);
- /* Prapare EP to Receive First BOT Cmd */
- DCD_EP_PrepareRx (pdev,
- MSC_OUT_EP,
- (uint8_t *)&MSC_BOT_cbw,
- BOT_CBW_LENGTH);
-}
-
-/**
-* @brief MSC_BOT_Reset
-* Reset the BOT Machine
-* @param pdev: device instance
-* @retval None
-*/
-void MSC_BOT_Reset (USB_OTG_CORE_HANDLE *pdev)
-{
- MSC_BOT_State = BOT_IDLE;
- MSC_BOT_Status = BOT_STATE_RECOVERY;
- /* Prapare EP to Receive First BOT Cmd */
- DCD_EP_PrepareRx (pdev,
- MSC_OUT_EP,
- (uint8_t *)&MSC_BOT_cbw,
- BOT_CBW_LENGTH);
-}
-
-/**
-* @brief MSC_BOT_DeInit
-* Uninitialize the BOT Machine
-* @param pdev: device instance
-* @retval None
-*/
-void MSC_BOT_DeInit (USB_OTG_CORE_HANDLE *pdev)
-{
- MSC_BOT_State = BOT_IDLE;
-}
-
-/**
-* @brief MSC_BOT_DataIn
-* Handle BOT IN data stage
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval None
-*/
-void MSC_BOT_DataIn (USB_OTG_CORE_HANDLE *pdev,
- uint8_t epnum)
-{
-
- switch (MSC_BOT_State)
- {
- case BOT_DATA_IN:
- if(SCSI_ProcessCmd(pdev,
- MSC_BOT_cbw.bLUN,
- &MSC_BOT_cbw.CB[0]) < 0)
- {
- MSC_BOT_SendCSW (pdev, CSW_CMD_FAILED);
- }
- break;
-
- case BOT_SEND_DATA:
- case BOT_LAST_DATA_IN:
- MSC_BOT_SendCSW (pdev, CSW_CMD_PASSED);
-
- break;
-
- default:
- break;
- }
-}
-/**
-* @brief MSC_BOT_DataOut
-* Proccess MSC OUT data
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval None
-*/
-void MSC_BOT_DataOut (USB_OTG_CORE_HANDLE *pdev,
- uint8_t epnum)
-{
- switch (MSC_BOT_State)
- {
- case BOT_IDLE:
- MSC_BOT_CBW_Decode(pdev);
- break;
-
- case BOT_DATA_OUT:
-
- if(SCSI_ProcessCmd(pdev,
- MSC_BOT_cbw.bLUN,
- &MSC_BOT_cbw.CB[0]) < 0)
- {
- MSC_BOT_SendCSW (pdev, CSW_CMD_FAILED);
- }
-
- break;
-
- default:
- break;
- }
-
-}
-
-/**
-* @brief MSC_BOT_CBW_Decode
-* Decode the CBW command and set the BOT state machine accordingtly
-* @param pdev: device instance
-* @retval None
-*/
-static void MSC_BOT_CBW_Decode (USB_OTG_CORE_HANDLE *pdev)
-{
-
- MSC_BOT_csw.dTag = MSC_BOT_cbw.dTag;
- MSC_BOT_csw.dDataResidue = MSC_BOT_cbw.dDataLength;
-
- if ((USBD_GetRxCount (pdev ,MSC_OUT_EP) != BOT_CBW_LENGTH) ||
- (MSC_BOT_cbw.dSignature != BOT_CBW_SIGNATURE)||
- (MSC_BOT_cbw.bLUN > 1) ||
- (MSC_BOT_cbw.bCBLength < 1) ||
- (MSC_BOT_cbw.bCBLength > 16))
- {
-
- SCSI_SenseCode(MSC_BOT_cbw.bLUN,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- MSC_BOT_Status = BOT_STATE_ERROR;
- MSC_BOT_Abort(pdev);
-
- }
- else
- {
- if(SCSI_ProcessCmd(pdev,
- MSC_BOT_cbw.bLUN,
- &MSC_BOT_cbw.CB[0]) < 0)
- {
- MSC_BOT_Abort(pdev);
- }
- /*Burst xfer handled internally*/
- else if ((MSC_BOT_State != BOT_DATA_IN) &&
- (MSC_BOT_State != BOT_DATA_OUT) &&
- (MSC_BOT_State != BOT_LAST_DATA_IN))
- {
- if (MSC_BOT_DataLen > 0)
- {
- MSC_BOT_SendData(pdev,
- MSC_BOT_Data,
- MSC_BOT_DataLen);
- }
- else if (MSC_BOT_DataLen == 0)
- {
- MSC_BOT_SendCSW (pdev,
- CSW_CMD_PASSED);
- }
- }
- }
-}
-
-/**
-* @brief MSC_BOT_SendData
-* Send the requested data
-* @param pdev: device instance
-* @param buf: pointer to data buffer
-* @param len: Data Length
-* @retval None
-*/
-static void MSC_BOT_SendData(USB_OTG_CORE_HANDLE *pdev,
- uint8_t* buf,
- uint16_t len)
-{
-
- len = MIN (MSC_BOT_cbw.dDataLength, len);
- MSC_BOT_csw.dDataResidue -= len;
- MSC_BOT_csw.bStatus = CSW_CMD_PASSED;
- MSC_BOT_State = BOT_SEND_DATA;
-
- DCD_EP_Tx (pdev, MSC_IN_EP, buf, len);
-}
-
-/**
-* @brief MSC_BOT_SendCSW
-* Send the Command Status Wrapper
-* @param pdev: device instance
-* @param status : CSW status
-* @retval None
-*/
-void MSC_BOT_SendCSW (USB_OTG_CORE_HANDLE *pdev,
- uint8_t CSW_Status)
-{
- MSC_BOT_csw.dSignature = BOT_CSW_SIGNATURE;
- MSC_BOT_csw.bStatus = CSW_Status;
- MSC_BOT_State = BOT_IDLE;
-
- DCD_EP_Tx (pdev,
- MSC_IN_EP,
- (uint8_t *)&MSC_BOT_csw,
- BOT_CSW_LENGTH);
-
- /* Prapare EP to Receive next Cmd */
- DCD_EP_PrepareRx (pdev,
- MSC_OUT_EP,
- (uint8_t *)&MSC_BOT_cbw,
- BOT_CBW_LENGTH);
-
-}
-
-/**
-* @brief MSC_BOT_Abort
-* Abort the current transfer
-* @param pdev: device instance
-* @retval status
-*/
-
-static void MSC_BOT_Abort (USB_OTG_CORE_HANDLE *pdev)
-{
-
- if ((MSC_BOT_cbw.bmFlags == 0) &&
- (MSC_BOT_cbw.dDataLength != 0) &&
- (MSC_BOT_Status == BOT_STATE_NORMAL) )
- {
- DCD_EP_Stall(pdev, MSC_OUT_EP );
- }
- DCD_EP_Stall(pdev, MSC_IN_EP);
-
- if(MSC_BOT_Status == BOT_STATE_ERROR)
- {
- DCD_EP_PrepareRx (pdev,
- MSC_OUT_EP,
- (uint8_t *)&MSC_BOT_cbw,
- BOT_CBW_LENGTH);
- }
-}
-
-/**
-* @brief MSC_BOT_CplClrFeature
-* Complete the clear feature request
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval None
-*/
-
-void MSC_BOT_CplClrFeature (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
-{
- if(MSC_BOT_Status == BOT_STATE_ERROR )/* Bad CBW Signature */
- {
- DCD_EP_Stall(pdev, MSC_IN_EP);
- MSC_BOT_Status = BOT_STATE_NORMAL;
- }
- else if(((epnum & 0x80) == 0x80) && ( MSC_BOT_Status != BOT_STATE_RECOVERY))
- {
- MSC_BOT_SendCSW (pdev, CSW_CMD_FAILED);
- }
-
-}
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usbd_msc_core.c b/radio/bootloader/usb/usbd_msc_core.c
deleted file mode 100644
index 5d8d4e815..000000000
--- a/radio/bootloader/usb/usbd_msc_core.c
+++ /dev/null
@@ -1,496 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_msc_core.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides all the MSC core functions.
- *
- * @verbatim
- *
- * ===================================================================
- * MSC Class Description
- * ===================================================================
- * This module manages the MSC class V1.0 following the "Universal
- * Serial Bus Mass Storage Class (MSC) Bulk-Only Transport (BOT) Version 1.0
- * Sep. 31, 1999".
- * This driver implements the following aspects of the specification:
- * - Bulk-Only Transport protocol
- * - Subclass : SCSI transparent command set (ref. SCSI Primary Commands - 3 (SPC-3))
- *
- * @endverbatim
- *
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_msc_mem.h"
-#include "usbd_msc_core.h"
-#include "usbd_msc_bot.h"
-#include "usbd_req.h"
-
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup MSC_CORE
- * @brief Mass storage core module
- * @{
- */
-
-/** @defgroup MSC_CORE_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_CORE_Private_Defines
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @defgroup MSC_CORE_Private_Macros
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_CORE_Private_FunctionPrototypes
- * @{
- */
-uint8_t USBD_MSC_Init (void *pdev,
- uint8_t cfgidx);
-
-uint8_t USBD_MSC_DeInit (void *pdev,
- uint8_t cfgidx);
-
-uint8_t USBD_MSC_Setup (void *pdev,
- USB_SETUP_REQ *req);
-
-uint8_t USBD_MSC_DataIn (void *pdev,
- uint8_t epnum);
-
-
-uint8_t USBD_MSC_DataOut (void *pdev,
- uint8_t epnum);
-
-uint8_t *USBD_MSC_GetCfgDesc (uint8_t speed,
- uint16_t *length);
-
-#ifdef USB_OTG_HS_CORE
-uint8_t *USBD_MSC_GetOtherCfgDesc (uint8_t speed,
- uint16_t *length);
-#endif
-
-
-uint8_t USBD_MSC_CfgDesc[USB_MSC_CONFIG_DESC_SIZ];
-
-
-
-
-/**
- * @}
- */
-
-
-/** @defgroup MSC_CORE_Private_Variables
- * @{
- */
-
-
-USBD_Class_cb_TypeDef USBD_MSC_cb =
-{
- USBD_MSC_Init,
- USBD_MSC_DeInit,
- USBD_MSC_Setup,
- NULL, /*EP0_TxSent*/
- NULL, /*EP0_RxReady*/
- USBD_MSC_DataIn,
- USBD_MSC_DataOut,
- NULL, /*SOF */
- NULL,
- NULL,
- USBD_MSC_GetCfgDesc,
-#ifdef USB_OTG_HS_CORE
- USBD_MSC_GetOtherCfgDesc,
-#endif
-};
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-/* USB Mass storage device Configuration Descriptor */
-/* All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
-__ALIGN_BEGIN uint8_t USBD_MSC_CfgDesc[USB_MSC_CONFIG_DESC_SIZ] __ALIGN_END =
-{
-
- 0x09, /* bLength: Configuation Descriptor size */
- USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */
- USB_MSC_CONFIG_DESC_SIZ,
-
- 0x00,
- 0x01, /* bNumInterfaces: 1 interface */
- 0x01, /* bConfigurationValue: */
- 0x04, /* iConfiguration: */
- 0xC0, /* bmAttributes: */
- 0x32, /* MaxPower 100 mA */
-
- /******************** Mass Storage interface ********************/
- 0x09, /* bLength: Interface Descriptor size */
- 0x04, /* bDescriptorType: */
- 0x00, /* bInterfaceNumber: Number of Interface */
- 0x00, /* bAlternateSetting: Alternate setting */
- 0x02, /* bNumEndpoints*/
- 0x08, /* bInterfaceClass: MSC Class */
- 0x06, /* bInterfaceSubClass : SCSI transparent*/
- 0x50, /* nInterfaceProtocol */
- 0x05, /* iInterface: */
- /******************** Mass Storage Endpoints ********************/
- 0x07, /*Endpoint descriptor length = 7*/
- 0x05, /*Endpoint descriptor type */
- MSC_IN_EP, /*Endpoint address (IN, address 1) */
- 0x02, /*Bulk endpoint type */
- LOBYTE(MSC_MAX_PACKET),
- HIBYTE(MSC_MAX_PACKET),
- 0x00, /*Polling interval in milliseconds */
-
- 0x07, /*Endpoint descriptor length = 7 */
- 0x05, /*Endpoint descriptor type */
- MSC_OUT_EP, /*Endpoint address (OUT, address 1) */
- 0x02, /*Bulk endpoint type */
- LOBYTE(MSC_MAX_PACKET),
- HIBYTE(MSC_MAX_PACKET),
- 0x00 /*Polling interval in milliseconds*/
-};
-#ifdef USB_OTG_HS_CORE
- #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
- #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN uint8_t USBD_MSC_OtherCfgDesc[USB_MSC_CONFIG_DESC_SIZ] __ALIGN_END =
-{
-
- 0x09, /* bLength: Configuation Descriptor size */
- USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION,
- USB_MSC_CONFIG_DESC_SIZ,
-
- 0x00,
- 0x01, /* bNumInterfaces: 1 interface */
- 0x01, /* bConfigurationValue: */
- 0x04, /* iConfiguration: */
- 0xC0, /* bmAttributes: */
- 0x32, /* MaxPower 100 mA */
-
- /******************** Mass Storage interface ********************/
- 0x09, /* bLength: Interface Descriptor size */
- 0x04, /* bDescriptorType: */
- 0x00, /* bInterfaceNumber: Number of Interface */
- 0x00, /* bAlternateSetting: Alternate setting */
- 0x02, /* bNumEndpoints*/
- 0x08, /* bInterfaceClass: MSC Class */
- 0x06, /* bInterfaceSubClass : SCSI transparent command set*/
- 0x50, /* nInterfaceProtocol */
- 0x05, /* iInterface: */
- /******************** Mass Storage Endpoints ********************/
- 0x07, /*Endpoint descriptor length = 7*/
- 0x05, /*Endpoint descriptor type */
- MSC_IN_EP, /*Endpoint address (IN, address 1) */
- 0x02, /*Bulk endpoint type */
- 0x40,
- 0x00,
- 0x00, /*Polling interval in milliseconds */
-
- 0x07, /*Endpoint descriptor length = 7 */
- 0x05, /*Endpoint descriptor type */
- MSC_OUT_EP, /*Endpoint address (OUT, address 1) */
- 0x02, /*Bulk endpoint type */
- 0x40,
- 0x00,
- 0x00 /*Polling interval in milliseconds*/
-};
-#endif
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN static uint8_t USBD_MSC_MaxLun __ALIGN_END = 0;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN static uint8_t USBD_MSC_AltSet __ALIGN_END = 0;
-
-/**
- * @}
- */
-
-
-/** @defgroup MSC_CORE_Private_Functions
- * @{
- */
-
-/**
-* @brief USBD_MSC_Init
-* Initialize the mass storage configuration
-* @param pdev: device instance
-* @param cfgidx: configuration index
-* @retval status
-*/
-uint8_t USBD_MSC_Init (void *pdev,
- uint8_t cfgidx)
-{
- USBD_MSC_DeInit(pdev , cfgidx );
-
- /* Open EP IN */
- DCD_EP_Open(pdev,
- MSC_IN_EP,
- MSC_EPIN_SIZE,
- USB_OTG_EP_BULK);
-
- /* Open EP OUT */
- DCD_EP_Open(pdev,
- MSC_OUT_EP,
- MSC_EPOUT_SIZE,
- USB_OTG_EP_BULK);
-
- /* Init the BOT layer */
- MSC_BOT_Init(pdev);
-
- return USBD_OK;
-}
-
-/**
-* @brief USBD_MSC_DeInit
-* DeInitilaize the mass storage configuration
-* @param pdev: device instance
-* @param cfgidx: configuration index
-* @retval status
-*/
-uint8_t USBD_MSC_DeInit (void *pdev,
- uint8_t cfgidx)
-{
- /* Close MSC EPs */
- DCD_EP_Close (pdev , MSC_IN_EP);
- DCD_EP_Close (pdev , MSC_OUT_EP);
-
- /* Un Init the BOT layer */
- MSC_BOT_DeInit(pdev);
- return USBD_OK;
-}
-/**
-* @brief USBD_MSC_Setup
-* Handle the MSC specific requests
-* @param pdev: device instance
-* @param req: USB request
-* @retval status
-*/
-uint8_t USBD_MSC_Setup (void *pdev, USB_SETUP_REQ *req)
-{
-
- switch (req->bmRequest & USB_REQ_TYPE_MASK)
- {
-
- /* Class request */
- case USB_REQ_TYPE_CLASS :
- switch (req->bRequest)
- {
- case BOT_GET_MAX_LUN :
-
- if((req->wValue == 0) &&
- (req->wLength == 1) &&
- ((req->bmRequest & 0x80) == 0x80))
- {
- USBD_MSC_MaxLun = USBD_STORAGE_fops->GetMaxLun();
- if(USBD_MSC_MaxLun > 0)
- {
- USBD_CtlSendData (pdev,
- &USBD_MSC_MaxLun,
- 1);
- }
- else
- {
- USBD_CtlError(pdev , req);
- return USBD_FAIL;
-
- }
- }
- else
- {
- USBD_CtlError(pdev , req);
- return USBD_FAIL;
- }
- break;
-
- case BOT_RESET :
- if((req->wValue == 0) &&
- (req->wLength == 0) &&
- ((req->bmRequest & 0x80) != 0x80))
- {
- MSC_BOT_Reset(pdev);
- }
- else
- {
- USBD_CtlError(pdev , req);
- return USBD_FAIL;
- }
- break;
-
- default:
- USBD_CtlError(pdev , req);
- return USBD_FAIL;
- }
- break;
- /* Interface & Endpoint request */
- case USB_REQ_TYPE_STANDARD:
- switch (req->bRequest)
- {
- case USB_REQ_GET_INTERFACE :
- USBD_CtlSendData (pdev,
- &USBD_MSC_AltSet,
- 1);
- break;
-
- case USB_REQ_SET_INTERFACE :
- USBD_MSC_AltSet = (uint8_t)(req->wValue);
- break;
-
- case USB_REQ_CLEAR_FEATURE:
-
- /* Flush the FIFO and Clear the stall status */
- DCD_EP_Flush(pdev, (uint8_t)req->wIndex);
-
- /* Re-activate the EP */
- DCD_EP_Close (pdev , (uint8_t)req->wIndex);
- if((((uint8_t)req->wIndex) & 0x80) == 0x80)
- {
- DCD_EP_Open(pdev,
- ((uint8_t)req->wIndex),
- MSC_EPIN_SIZE,
- USB_OTG_EP_BULK);
- }
- else
- {
- DCD_EP_Open(pdev,
- ((uint8_t)req->wIndex),
- MSC_EPOUT_SIZE,
- USB_OTG_EP_BULK);
- }
-
- /* Handle BOT error */
- MSC_BOT_CplClrFeature(pdev, (uint8_t)req->wIndex);
- break;
-
- }
- break;
-
- default:
- break;
- }
- return USBD_OK;
-}
-
-/**
-* @brief USBD_MSC_DataIn
-* handle data IN Stage
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval status
-*/
-uint8_t USBD_MSC_DataIn (void *pdev,
- uint8_t epnum)
-{
- MSC_BOT_DataIn(pdev , epnum);
- return USBD_OK;
-}
-
-/**
-* @brief USBD_MSC_DataOut
-* handle data OUT Stage
-* @param pdev: device instance
-* @param epnum: endpoint index
-* @retval status
-*/
-uint8_t USBD_MSC_DataOut (void *pdev,
- uint8_t epnum)
-{
- MSC_BOT_DataOut(pdev , epnum);
- return USBD_OK;
-}
-
-/**
-* @brief USBD_MSC_GetCfgDesc
-* return configuration descriptor
-* @param speed : current device speed
-* @param length : pointer data length
-* @retval pointer to descriptor buffer
-*/
-uint8_t *USBD_MSC_GetCfgDesc (uint8_t speed, uint16_t *length)
-{
- *length = sizeof (USBD_MSC_CfgDesc);
- return USBD_MSC_CfgDesc;
-}
-
-/**
-* @brief USBD_MSC_GetOtherCfgDesc
-* return other speed configuration descriptor
-* @param speed : current device speed
-* @param length : pointer data length
-* @retval pointer to descriptor buffer
-*/
-#ifdef USB_OTG_HS_CORE
-uint8_t *USBD_MSC_GetOtherCfgDesc (uint8_t speed,
- uint16_t *length)
-{
- *length = sizeof (USBD_MSC_OtherCfgDesc);
- return USBD_MSC_OtherCfgDesc;
-}
-#endif
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usbd_msc_data.c b/radio/bootloader/usb/usbd_msc_data.c
deleted file mode 100644
index d65f05818..000000000
--- a/radio/bootloader/usb/usbd_msc_data.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_msc_data.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides all the vital inquiry pages and sense data.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_msc_data.h"
-
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup MSC_DATA
- * @brief Mass storage info/data module
- * @{
- */
-
-/** @defgroup MSC_DATA_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_DATA_Private_Defines
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_DATA_Private_Macros
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_DATA_Private_Variables
- * @{
- */
-
-
-/* USB Mass storage Page 0 Inquiry Data */
-const uint8_t MSC_Page00_Inquiry_Data[] = {//7
- 0x00,
- 0x00,
- 0x00,
- (LENGTH_INQUIRY_PAGE00 - 4),
- 0x00,
- 0x80,
- 0x83
-};
-/* USB Mass storage sense 6 Data */
-const uint8_t MSC_Mode_Sense6_data[] = {
- 0x00,
- 0x00,
- 0x00,
- 0x00,
- 0x00,
- 0x00,
- 0x00,
- 0x00
-};
-/* USB Mass storage sense 10 Data */
-const uint8_t MSC_Mode_Sense10_data[] = {
- 0x00,
- 0x06,
- 0x00,
- 0x00,
- 0x00,
- 0x00,
- 0x00,
- 0x00
-};
-/**
- * @}
- */
-
-
-/** @defgroup MSC_DATA_Private_FunctionPrototypes
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_DATA_Private_Functions
- * @{
- */
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usbd_msc_scsi.c b/radio/bootloader/usb/usbd_msc_scsi.c
deleted file mode 100644
index 11efc4414..000000000
--- a/radio/bootloader/usb/usbd_msc_scsi.c
+++ /dev/null
@@ -1,734 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_msc_scsi.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides all the USBD SCSI layer functions.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_msc_bot.h"
-#include "usbd_msc_scsi.h"
-#include "usbd_msc_mem.h"
-#include "usbd_msc_data.h"
-
-
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup MSC_SCSI
- * @brief Mass storage SCSI layer module
- * @{
- */
-
-/** @defgroup MSC_SCSI_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_SCSI_Private_Defines
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @defgroup MSC_SCSI_Private_Macros
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup MSC_SCSI_Private_Variables
- * @{
- */
-
-SCSI_Sense_TypeDef SCSI_Sense [SENSE_LIST_DEEPTH];
-uint8_t SCSI_Sense_Head;
-uint8_t SCSI_Sense_Tail;
-
-uint32_t SCSI_blk_size;
-uint32_t SCSI_blk_nbr;
-
-uint32_t SCSI_blk_addr;
-uint32_t SCSI_blk_len;
-
-USB_OTG_CORE_HANDLE *cdev;
-/**
- * @}
- */
-
-
-/** @defgroup MSC_SCSI_Private_FunctionPrototypes
- * @{
- */
-static int8_t SCSI_TestUnitReady(uint8_t lun, uint8_t *params);
-static int8_t SCSI_Inquiry(uint8_t lun, uint8_t *params);
-static int8_t SCSI_ReadFormatCapacity(uint8_t lun, uint8_t *params);
-static int8_t SCSI_ReadCapacity10(uint8_t lun, uint8_t *params);
-static int8_t SCSI_RequestSense (uint8_t lun, uint8_t *params);
-static int8_t SCSI_StartStopUnit(uint8_t lun, uint8_t *params);
-static int8_t SCSI_ModeSense6 (uint8_t lun, uint8_t *params);
-static int8_t SCSI_ModeSense10 (uint8_t lun, uint8_t *params);
-static int8_t SCSI_Write10(uint8_t lun , uint8_t *params);
-static int8_t SCSI_Read10(uint8_t lun , uint8_t *params);
-static int8_t SCSI_Verify10(uint8_t lun, uint8_t *params);
-static int8_t SCSI_CheckAddressRange (uint8_t lun ,
- uint32_t blk_offset ,
- uint16_t blk_nbr);
-static int8_t SCSI_ProcessRead (uint8_t lun);
-
-static int8_t SCSI_ProcessWrite (uint8_t lun);
-/**
- * @}
- */
-
-
-/** @defgroup MSC_SCSI_Private_Functions
- * @{
- */
-
-
-/**
-* @brief SCSI_ProcessCmd
-* Process SCSI commands
-* @param pdev: device instance
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-int8_t SCSI_ProcessCmd(USB_OTG_CORE_HANDLE *pdev,
- uint8_t lun,
- uint8_t *params)
-{
- cdev = pdev;
-
- switch (params[0])
- {
- case SCSI_TEST_UNIT_READY:
- return SCSI_TestUnitReady(lun, params);
-
- case SCSI_REQUEST_SENSE:
- return SCSI_RequestSense (lun, params);
- case SCSI_INQUIRY:
- return SCSI_Inquiry(lun, params);
-
- case SCSI_START_STOP_UNIT:
- return SCSI_StartStopUnit(lun, params);
-
- case SCSI_ALLOW_MEDIUM_REMOVAL:
- return SCSI_StartStopUnit(lun, params);
-
- case SCSI_MODE_SENSE6:
- return SCSI_ModeSense6 (lun, params);
-
- case SCSI_MODE_SENSE10:
- return SCSI_ModeSense10 (lun, params);
-
- case SCSI_READ_FORMAT_CAPACITIES:
- return SCSI_ReadFormatCapacity(lun, params);
-
- case SCSI_READ_CAPACITY10:
- return SCSI_ReadCapacity10(lun, params);
-
- case SCSI_READ10:
- return SCSI_Read10(lun, params);
-
- case SCSI_WRITE10:
- return SCSI_Write10(lun, params);
-
- case SCSI_VERIFY10:
- return SCSI_Verify10(lun, params);
-
- default:
- SCSI_SenseCode(lun,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- return -1;
- }
-}
-
-
-/**
-* @brief SCSI_TestUnitReady
-* Process SCSI Test Unit Ready Command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_TestUnitReady(uint8_t lun, uint8_t *params)
-{
-
- /* case 9 : Hi > D0 */
- if (MSC_BOT_cbw.dDataLength != 0)
- {
- SCSI_SenseCode(MSC_BOT_cbw.bLUN,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- return -1;
- }
-
- if(USBD_STORAGE_fops->IsReady(lun) !=0 )
- {
- SCSI_SenseCode(lun,
- NOT_READY,
- MEDIUM_NOT_PRESENT);
- return -1;
- }
- MSC_BOT_DataLen = 0;
- return 0;
-}
-
-/**
-* @brief SCSI_Inquiry
-* Process Inquiry command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_Inquiry(uint8_t lun, uint8_t *params)
-{
- uint8_t* pPage;
- uint16_t len;
-
- if (params[1] & 0x01)/*Evpd is set*/
- {
- pPage = (uint8_t *)MSC_Page00_Inquiry_Data;
- len = LENGTH_INQUIRY_PAGE00;
- }
- else
- {
-
- pPage = (uint8_t *)&USBD_STORAGE_fops->pInquiry[lun * USBD_STD_INQUIRY_LENGTH];
- len = pPage[4] + 5;
-
- if (params[4] <= len)
- {
- len = params[4];
- }
- }
- MSC_BOT_DataLen = len;
-
- while (len)
- {
- len--;
- MSC_BOT_Data[len] = pPage[len];
- }
- return 0;
-}
-
-/**
-* @brief SCSI_ReadCapacity10
-* Process Read Capacity 10 command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_ReadCapacity10(uint8_t lun, uint8_t *params)
-{
-
- if(USBD_STORAGE_fops->GetCapacity(lun, &SCSI_blk_nbr, &SCSI_blk_size) != 0)
- {
- SCSI_SenseCode(lun,
- NOT_READY,
- MEDIUM_NOT_PRESENT);
- return -1;
- }
- else
- {
-
- MSC_BOT_Data[0] = (uint8_t)((SCSI_blk_nbr - 1) >> 24);
- MSC_BOT_Data[1] = (uint8_t)((SCSI_blk_nbr - 1) >> 16);
- MSC_BOT_Data[2] = (uint8_t)((SCSI_blk_nbr - 1) >> 8);
- MSC_BOT_Data[3] = (uint8_t)(SCSI_blk_nbr - 1);
-
- MSC_BOT_Data[4] = (uint8_t)(SCSI_blk_size >> 24);
- MSC_BOT_Data[5] = (uint8_t)(SCSI_blk_size >> 16);
- MSC_BOT_Data[6] = (uint8_t)(SCSI_blk_size >> 8);
- MSC_BOT_Data[7] = (uint8_t)(SCSI_blk_size);
-
- MSC_BOT_DataLen = 8;
- return 0;
- }
-}
-/**
-* @brief SCSI_ReadFormatCapacity
-* Process Read Format Capacity command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_ReadFormatCapacity(uint8_t lun, uint8_t *params)
-{
-
- uint32_t blk_size;
- uint32_t blk_nbr;
- uint16_t i;
-
- for(i=0 ; i < 12 ; i++)
- {
- MSC_BOT_Data[i] = 0;
- }
-
- if(USBD_STORAGE_fops->GetCapacity(lun, &blk_nbr, &blk_size) != 0)
- {
- SCSI_SenseCode(lun,
- NOT_READY,
- MEDIUM_NOT_PRESENT);
- return -1;
- }
- else
- {
- MSC_BOT_Data[3] = 0x08;
- MSC_BOT_Data[4] = (uint8_t)((blk_nbr - 1) >> 24);
- MSC_BOT_Data[5] = (uint8_t)((blk_nbr - 1) >> 16);
- MSC_BOT_Data[6] = (uint8_t)((blk_nbr - 1) >> 8);
- MSC_BOT_Data[7] = (uint8_t)(blk_nbr - 1);
-
- MSC_BOT_Data[8] = 0x02;
- MSC_BOT_Data[9] = (uint8_t)(blk_size >> 16);
- MSC_BOT_Data[10] = (uint8_t)(blk_size >> 8);
- MSC_BOT_Data[11] = (uint8_t)(blk_size);
-
- MSC_BOT_DataLen = 12;
- return 0;
- }
-}
-/**
-* @brief SCSI_ModeSense6
-* Process Mode Sense6 command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_ModeSense6 (uint8_t lun, uint8_t *params)
-{
-
- uint16_t len = 8 ;
- MSC_BOT_DataLen = len;
-
- while (len)
- {
- len--;
- MSC_BOT_Data[len] = MSC_Mode_Sense6_data[len];
- }
- return 0;
-}
-
-/**
-* @brief SCSI_ModeSense10
-* Process Mode Sense10 command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_ModeSense10 (uint8_t lun, uint8_t *params)
-{
- uint16_t len = 8;
-
- MSC_BOT_DataLen = len;
-
- while (len)
- {
- len--;
- MSC_BOT_Data[len] = MSC_Mode_Sense10_data[len];
- }
- return 0;
-}
-
-/**
-* @brief SCSI_RequestSense
-* Process Request Sense command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-
-static int8_t SCSI_RequestSense (uint8_t lun, uint8_t *params)
-{
- uint8_t i;
-
- for(i=0 ; i < REQUEST_SENSE_DATA_LEN ; i++)
- {
- MSC_BOT_Data[i] = 0;
- }
-
- MSC_BOT_Data[0] = 0x70;
- MSC_BOT_Data[7] = REQUEST_SENSE_DATA_LEN - 6;
-
- if((SCSI_Sense_Head != SCSI_Sense_Tail)) {
-
- MSC_BOT_Data[2] = SCSI_Sense[SCSI_Sense_Head].Skey;
- MSC_BOT_Data[12] = SCSI_Sense[SCSI_Sense_Head].w.b.ASCQ;
- MSC_BOT_Data[13] = SCSI_Sense[SCSI_Sense_Head].w.b.ASC;
- SCSI_Sense_Head++;
-
- if (SCSI_Sense_Head == SENSE_LIST_DEEPTH)
- {
- SCSI_Sense_Head = 0;
- }
- }
- MSC_BOT_DataLen = REQUEST_SENSE_DATA_LEN;
-
- if (params[4] <= REQUEST_SENSE_DATA_LEN)
- {
- MSC_BOT_DataLen = params[4];
- }
- return 0;
-}
-
-/**
-* @brief SCSI_SenseCode
-* Load the last error code in the error list
-* @param lun: Logical unit number
-* @param sKey: Sense Key
-* @param ASC: Additional Sense Key
-* @retval none
-
-*/
-void SCSI_SenseCode(uint8_t lun, uint8_t sKey, uint8_t ASC)
-{
- SCSI_Sense[SCSI_Sense_Tail].Skey = sKey;
- SCSI_Sense[SCSI_Sense_Tail].w.ASC = ASC << 8;
- SCSI_Sense_Tail++;
- if (SCSI_Sense_Tail == SENSE_LIST_DEEPTH)
- {
- SCSI_Sense_Tail = 0;
- }
-}
-/**
-* @brief SCSI_StartStopUnit
-* Process Start Stop Unit command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_StartStopUnit(uint8_t lun, uint8_t *params)
-{
- MSC_BOT_DataLen = 0;
- return 0;
-}
-
-/**
-* @brief SCSI_Read10
-* Process Read10 command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-static int8_t SCSI_Read10(uint8_t lun , uint8_t *params)
-{
- if(MSC_BOT_State == BOT_IDLE) /* Idle */
- {
-
- /* case 10 : Ho <> Di */
-
- if ((MSC_BOT_cbw.bmFlags & 0x80) != 0x80)
- {
- SCSI_SenseCode(MSC_BOT_cbw.bLUN,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- return -1;
- }
-
- if(USBD_STORAGE_fops->IsReady(lun) !=0 )
- {
- SCSI_SenseCode(lun,
- NOT_READY,
- MEDIUM_NOT_PRESENT);
- return -1;
- }
-
- SCSI_blk_addr = (params[2] << 24) | \
- (params[3] << 16) | \
- (params[4] << 8) | \
- params[5];
-
- SCSI_blk_len = (params[7] << 8) | \
- params[8];
-
-
-
- if( SCSI_CheckAddressRange(lun, SCSI_blk_addr, SCSI_blk_len) < 0)
- {
- return -1; /* error */
- }
-
- MSC_BOT_State = BOT_DATA_IN;
- SCSI_blk_addr *= SCSI_blk_size;
- SCSI_blk_len *= SCSI_blk_size;
-
- /* cases 4,5 : Hi <> Dn */
- if (MSC_BOT_cbw.dDataLength != SCSI_blk_len)
- {
- SCSI_SenseCode(MSC_BOT_cbw.bLUN,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- return -1;
- }
- }
- MSC_BOT_DataLen = MSC_MEDIA_PACKET;
-
- return SCSI_ProcessRead(lun);
-}
-
-/**
-* @brief SCSI_Write10
-* Process Write10 command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-
-static int8_t SCSI_Write10 (uint8_t lun , uint8_t *params)
-{
- if (MSC_BOT_State == BOT_IDLE) /* Idle */
- {
-
- /* case 8 : Hi <> Do */
-
- if ((MSC_BOT_cbw.bmFlags & 0x80) == 0x80)
- {
- SCSI_SenseCode(MSC_BOT_cbw.bLUN,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- return -1;
- }
-
- /* Check whether Media is ready */
- if(USBD_STORAGE_fops->IsReady(lun) !=0 )
- {
- SCSI_SenseCode(lun,
- NOT_READY,
- MEDIUM_NOT_PRESENT);
- return -1;
- }
-
- /* Check If media is write-protected */
- if(USBD_STORAGE_fops->IsWriteProtected(lun) !=0 )
- {
- SCSI_SenseCode(lun,
- NOT_READY,
- WRITE_PROTECTED);
- return -1;
- }
-
-
- SCSI_blk_addr = (params[2] << 24) | \
- (params[3] << 16) | \
- (params[4] << 8) | \
- params[5];
- SCSI_blk_len = (params[7] << 8) | \
- params[8];
-
- /* check if LBA address is in the right range */
- if(SCSI_CheckAddressRange(lun, SCSI_blk_addr, SCSI_blk_len) < 0)
- {
- return -1; /* error */
- }
-
- SCSI_blk_addr *= SCSI_blk_size;
- SCSI_blk_len *= SCSI_blk_size;
-
- /* cases 3,11,13 : Hn,Ho <> D0 */
- if (MSC_BOT_cbw.dDataLength != SCSI_blk_len)
- {
- SCSI_SenseCode(MSC_BOT_cbw.bLUN,
- ILLEGAL_REQUEST,
- INVALID_CDB);
- return -1;
- }
-
- /* Prepare EP to receive first data packet */
- MSC_BOT_State = BOT_DATA_OUT;
- DCD_EP_PrepareRx (cdev,
- MSC_OUT_EP,
- MSC_BOT_Data,
- MIN (SCSI_blk_len, MSC_MEDIA_PACKET));
- }
- else /* Write Process ongoing */
- {
- return SCSI_ProcessWrite(lun);
- }
- return 0;
-}
-
-
-/**
-* @brief SCSI_Verify10
-* Process Verify10 command
-* @param lun: Logical unit number
-* @param params: Command parameters
-* @retval status
-*/
-
-static int8_t SCSI_Verify10(uint8_t lun , uint8_t *params){
- if ((params[1]& 0x02) == 0x02)
- {
- SCSI_SenseCode (lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND);
- return -1; /* Error, Verify Mode Not supported*/
- }
-
- if(SCSI_CheckAddressRange(lun, SCSI_blk_addr, SCSI_blk_len) < 0)
- {
- return -1; /* error */
- }
- MSC_BOT_DataLen = 0;
- return 0;
-}
-
-/**
-* @brief SCSI_CheckAddressRange
-* Check address range
-* @param lun: Logical unit number
-* @param blk_offset: first block address
-* @param blk_nbr: number of block to be processed
-* @retval status
-*/
-static int8_t SCSI_CheckAddressRange (uint8_t lun , uint32_t blk_offset , uint16_t blk_nbr)
-{
- if (USBD_STORAGE_fops->GetCapacity(lun, &SCSI_blk_nbr, &SCSI_blk_size) != 0)
- {
- SCSI_SenseCode(lun, NOT_READY, MEDIUM_NOT_PRESENT);
- return -1;
- }
-
- if ((blk_offset + blk_nbr) > SCSI_blk_nbr )
- {
- SCSI_SenseCode(lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE);
- return -1;
- }
-
- return 0;
-}
-
-/**
-* @brief SCSI_ProcessRead
-* Handle Read Process
-* @param lun: Logical unit number
-* @retval status
-*/
-static int8_t SCSI_ProcessRead (uint8_t lun)
-{
- uint32_t len;
-
- len = MIN(SCSI_blk_len , MSC_MEDIA_PACKET);
-
- if( USBD_STORAGE_fops->Read(lun ,
- MSC_BOT_Data,
- SCSI_blk_addr / SCSI_blk_size,
- len / SCSI_blk_size) < 0)
- {
-
- SCSI_SenseCode(lun, HARDWARE_ERROR, UNRECOVERED_READ_ERROR);
- return -1;
- }
-
-
- DCD_EP_Tx (cdev,
- MSC_IN_EP,
- MSC_BOT_Data,
- len);
-
-
- SCSI_blk_addr += len;
- SCSI_blk_len -= len;
-
- /* case 6 : Hi = Di */
- MSC_BOT_csw.dDataResidue -= len;
-
- if (SCSI_blk_len == 0)
- {
- MSC_BOT_State = BOT_LAST_DATA_IN;
- }
- return 0;
-}
-
-/**
-* @brief SCSI_ProcessWrite
-* Handle Write Process
-* @param lun: Logical unit number
-* @retval status
-*/
-
-static int8_t SCSI_ProcessWrite (uint8_t lun)
-{
- uint32_t len;
-
- len = MIN(SCSI_blk_len , MSC_MEDIA_PACKET);
-
- if(USBD_STORAGE_fops->Write(lun ,
- MSC_BOT_Data,
- SCSI_blk_addr / SCSI_blk_size,
- len / SCSI_blk_size) < 0)
- {
- SCSI_SenseCode(lun, HARDWARE_ERROR, WRITE_FAULT);
- return -1;
- }
-
-
- SCSI_blk_addr += len;
- SCSI_blk_len -= len;
-
- /* case 12 : Ho = Do */
- MSC_BOT_csw.dDataResidue -= len;
-
- if (SCSI_blk_len == 0)
- {
- MSC_BOT_SendCSW (cdev, CSW_CMD_PASSED);
- }
- else
- {
- /* Prapare EP to Receive next packet */
- DCD_EP_PrepareRx (cdev,
- MSC_OUT_EP,
- MSC_BOT_Data,
- MIN (SCSI_blk_len, MSC_MEDIA_PACKET));
- }
-
- return 0;
-}
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/radio/bootloader/usb/usbd_req.c b/radio/bootloader/usb/usbd_req.c
deleted file mode 100644
index 63c1167d9..000000000
--- a/radio/bootloader/usb/usbd_req.c
+++ /dev/null
@@ -1,868 +0,0 @@
-/**
- ******************************************************************************
- * @file usbd_req.c
- * @author MCD Application Team
- * @version V1.1.0
- * @date 19-March-2012
- * @brief This file provides the standard USB requests following chapter 9.
- ******************************************************************************
- * @attention
- *
- * © COPYRIGHT 2012 STMicroelectronics
- *
- * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- * You may not use this file except in compliance with the License.
- * You may obtain a copy of the License at:
- *
- * http://www.st.com/software_license_agreement_liberty_v2
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ******************************************************************************
- */
-
-/* Includes ------------------------------------------------------------------*/
-#include "usbd_req.h"
-#include "usbd_ioreq.h"
-#include "usbd_desc.h"
-
-
-/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
- * @{
- */
-
-
-/** @defgroup USBD_REQ
- * @brief USB standard requests module
- * @{
- */
-
-/** @defgroup USBD_REQ_Private_TypesDefinitions
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup USBD_REQ_Private_Defines
- * @{
- */
-
-/**
- * @}
- */
-
-
-/** @defgroup USBD_REQ_Private_Macros
- * @{
- */
-/**
- * @}
- */
-
-
-/** @defgroup USBD_REQ_Private_Variables
- * @{
- */
-extern __IO USB_OTG_DCTL_TypeDef SET_TEST_MODE;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN uint32_t USBD_ep_status __ALIGN_END = 0;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN uint32_t USBD_default_cfg __ALIGN_END = 0;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN uint32_t USBD_cfg_status __ALIGN_END = 0;
-
-#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
- #if defined ( __ICCARM__ ) /*!< IAR Compiler */
- #pragma data_alignment=4
- #endif
-#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
-__ALIGN_BEGIN uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ] __ALIGN_END ;
-/**
- * @}
- */
-
-
-/** @defgroup USBD_REQ_Private_FunctionPrototypes
- * @{
- */
-static void USBD_GetDescriptor(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static void USBD_SetAddress(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static void USBD_SetConfig(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static void USBD_GetConfig(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static void USBD_GetStatus(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static void USBD_SetFeature(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static void USBD_ClrFeature(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req);
-
-static uint8_t USBD_GetLen(uint8_t *buf);
-/**
- * @}
- */
-
-
-/** @defgroup USBD_REQ_Private_Functions
- * @{
- */
-
-
-/**
-* @brief USBD_StdDevReq
-* Handle standard usb device requests
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-USBD_Status USBD_StdDevReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req)
-{
- USBD_Status ret = USBD_OK;
-
- switch (req->bRequest)
- {
- case USB_REQ_GET_DESCRIPTOR:
-
- USBD_GetDescriptor (pdev, req) ;
- break;
-
- case USB_REQ_SET_ADDRESS:
- USBD_SetAddress(pdev, req);
- break;
-
- case USB_REQ_SET_CONFIGURATION:
- USBD_SetConfig (pdev , req);
- break;
-
- case USB_REQ_GET_CONFIGURATION:
- USBD_GetConfig (pdev , req);
- break;
-
- case USB_REQ_GET_STATUS:
- USBD_GetStatus (pdev , req);
- break;
-
-
- case USB_REQ_SET_FEATURE:
- USBD_SetFeature (pdev , req);
- break;
-
- case USB_REQ_CLEAR_FEATURE:
- USBD_ClrFeature (pdev , req);
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
-
- return ret;
-}
-
-/**
-* @brief USBD_StdItfReq
-* Handle standard usb interface requests
-* @param pdev: USB OTG device instance
-* @param req: usb request
-* @retval status
-*/
-USBD_Status USBD_StdItfReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req)
-{
- USBD_Status ret = USBD_OK;
-
- switch (pdev->dev.device_status)
- {
- case USB_OTG_CONFIGURED:
-
- if (LOBYTE(req->wIndex) <= USBD_ITF_MAX_NUM)
- {
- pdev->dev.class_cb->Setup (pdev, req);
-
- if((req->wLength == 0)&& (ret == USBD_OK))
- {
- USBD_CtlSendStatus(pdev);
- }
- }
- else
- {
- USBD_CtlError(pdev , req);
- }
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
- return ret;
-}
-
-/**
-* @brief USBD_StdEPReq
-* Handle standard usb endpoint requests
-* @param pdev: USB OTG device instance
-* @param req: usb request
-* @retval status
-*/
-USBD_Status USBD_StdEPReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req)
-{
-
- uint8_t ep_addr;
- USBD_Status ret = USBD_OK;
-
- ep_addr = LOBYTE(req->wIndex);
-
- switch (req->bRequest)
- {
-
- case USB_REQ_SET_FEATURE :
-
- switch (pdev->dev.device_status)
- {
- case USB_OTG_ADDRESSED:
- if ((ep_addr != 0x00) && (ep_addr != 0x80))
- {
- DCD_EP_Stall(pdev , ep_addr);
- }
- break;
-
- case USB_OTG_CONFIGURED:
- if (req->wValue == USB_FEATURE_EP_HALT)
- {
- if ((ep_addr != 0x00) && (ep_addr != 0x80))
- {
- DCD_EP_Stall(pdev , ep_addr);
-
- }
- }
- pdev->dev.class_cb->Setup (pdev, req);
- USBD_CtlSendStatus(pdev);
-
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
- break;
-
- case USB_REQ_CLEAR_FEATURE :
-
- switch (pdev->dev.device_status)
- {
- case USB_OTG_ADDRESSED:
- if ((ep_addr != 0x00) && (ep_addr != 0x80))
- {
- DCD_EP_Stall(pdev , ep_addr);
- }
- break;
-
- case USB_OTG_CONFIGURED:
- if (req->wValue == USB_FEATURE_EP_HALT)
- {
- if ((ep_addr != 0x00) && (ep_addr != 0x80))
- {
- DCD_EP_ClrStall(pdev , ep_addr);
- pdev->dev.class_cb->Setup (pdev, req);
- }
- USBD_CtlSendStatus(pdev);
- }
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
- break;
-
- case USB_REQ_GET_STATUS:
- switch (pdev->dev.device_status)
- {
- case USB_OTG_ADDRESSED:
- if ((ep_addr != 0x00) && (ep_addr != 0x80))
- {
- DCD_EP_Stall(pdev , ep_addr);
- }
- break;
-
- case USB_OTG_CONFIGURED:
-
-
- if ((ep_addr & 0x80)== 0x80)
- {
- if(pdev->dev.in_ep[ep_addr & 0x7F].is_stall)
- {
- USBD_ep_status = 0x0001;
- }
- else
- {
- USBD_ep_status = 0x0000;
- }
- }
- else if ((ep_addr & 0x80)== 0x00)
- {
- if(pdev->dev.out_ep[ep_addr].is_stall)
- {
- USBD_ep_status = 0x0001;
- }
-
- else
- {
- USBD_ep_status = 0x0000;
- }
- }
- USBD_CtlSendData (pdev,
- (uint8_t *)&USBD_ep_status,
- 2);
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
- break;
-
- default:
- break;
- }
- return ret;
-}
-/**
-* @brief USBD_GetDescriptor
-* Handle Get Descriptor requests
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_GetDescriptor(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
- uint16_t len;
- uint8_t *pbuf;
-
-
- switch (req->wValue >> 8)
- {
- case USB_DESC_TYPE_DEVICE:
- pbuf = pdev->dev.usr_device->GetDeviceDescriptor(pdev->cfg.speed, &len);
- if ((req->wLength == 64) ||( pdev->dev.device_status == USB_OTG_DEFAULT))
- {
- len = 8;
- }
- break;
-
- case USB_DESC_TYPE_CONFIGURATION:
- pbuf = (uint8_t *)pdev->dev.class_cb->GetConfigDescriptor(pdev->cfg.speed, &len);
-#ifdef USB_OTG_HS_CORE
- if((pdev->cfg.speed == USB_OTG_SPEED_FULL )&&
- (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY))
- {
- pbuf = (uint8_t *)pdev->dev.class_cb->GetOtherConfigDescriptor(pdev->cfg.speed, &len);
- }
-#endif
- pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
- pdev->dev.pConfig_descriptor = pbuf;
- break;
-
- case USB_DESC_TYPE_STRING:
- switch ((uint8_t)(req->wValue))
- {
- case USBD_IDX_LANGID_STR:
- pbuf = pdev->dev.usr_device->GetLangIDStrDescriptor(pdev->cfg.speed, &len);
- break;
-
- case USBD_IDX_MFC_STR:
- pbuf = pdev->dev.usr_device->GetManufacturerStrDescriptor(pdev->cfg.speed, &len);
- break;
-
- case USBD_IDX_PRODUCT_STR:
- pbuf = pdev->dev.usr_device->GetProductStrDescriptor(pdev->cfg.speed, &len);
- break;
-
- case USBD_IDX_SERIAL_STR:
- pbuf = pdev->dev.usr_device->GetSerialStrDescriptor(pdev->cfg.speed, &len);
- break;
-
- case USBD_IDX_CONFIG_STR:
- pbuf = pdev->dev.usr_device->GetConfigurationStrDescriptor(pdev->cfg.speed, &len);
- break;
-
- case USBD_IDX_INTERFACE_STR:
- pbuf = pdev->dev.usr_device->GetInterfaceStrDescriptor(pdev->cfg.speed, &len);
- break;
-
- default:
-#ifdef USB_SUPPORT_USER_STRING_DESC
- pbuf = pdev->dev.class_cb->GetUsrStrDescriptor(pdev->cfg.speed, (req->wValue) , &len);
- break;
-#else
- USBD_CtlError(pdev , req);
- return;
-#endif /* USBD_CtlError(pdev , req); */
- }
- break;
- case USB_DESC_TYPE_DEVICE_QUALIFIER:
-#ifdef USB_OTG_HS_CORE
- if(pdev->cfg.speed == USB_OTG_SPEED_HIGH )
- {
-
- pbuf = (uint8_t *)pdev->dev.class_cb->GetConfigDescriptor(pdev->cfg.speed, &len);
-
- USBD_DeviceQualifierDesc[4]= pbuf[14];
- USBD_DeviceQualifierDesc[5]= pbuf[15];
- USBD_DeviceQualifierDesc[6]= pbuf[16];
-
- pbuf = USBD_DeviceQualifierDesc;
- len = USB_LEN_DEV_QUALIFIER_DESC;
- break;
- }
- else
- {
- USBD_CtlError(pdev , req);
- return;
- }
-#else
- USBD_CtlError(pdev , req);
- return;
-#endif
-
- case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
-#ifdef USB_OTG_HS_CORE
-
- if(pdev->cfg.speed == USB_OTG_SPEED_HIGH )
- {
- pbuf = (uint8_t *)pdev->dev.class_cb->GetOtherConfigDescriptor(pdev->cfg.speed, &len);
- pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
- break;
- }
- else
- {
- USBD_CtlError(pdev , req);
- return;
- }
-#else
- USBD_CtlError(pdev , req);
- return;
-#endif
-
-
- default:
- USBD_CtlError(pdev , req);
- return;
- }
-
- if((len != 0)&& (req->wLength != 0))
- {
-
- len = MIN(len , req->wLength);
-
- USBD_CtlSendData (pdev,
- pbuf,
- len);
- }
-
-}
-
-/**
-* @brief USBD_SetAddress
-* Set device address
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_SetAddress(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
- uint8_t dev_addr;
-
- if ((req->wIndex == 0) && (req->wLength == 0))
- {
- dev_addr = (uint8_t)(req->wValue) & 0x7F;
-
- if (pdev->dev.device_status == USB_OTG_CONFIGURED)
- {
- USBD_CtlError(pdev , req);
- }
- else
- {
- pdev->dev.device_address = dev_addr;
- DCD_EP_SetAddress(pdev, dev_addr);
- USBD_CtlSendStatus(pdev);
-
- if (dev_addr != 0)
- {
- pdev->dev.device_status = USB_OTG_ADDRESSED;
- }
- else
- {
- pdev->dev.device_status = USB_OTG_DEFAULT;
- }
- }
- }
- else
- {
- USBD_CtlError(pdev , req);
- }
-}
-
-/**
-* @brief USBD_SetConfig
-* Handle Set device configuration request
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_SetConfig(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
-
- static uint8_t cfgidx;
-
- cfgidx = (uint8_t)(req->wValue);
-
- if (cfgidx > USBD_CFG_MAX_NUM )
- {
- USBD_CtlError(pdev , req);
- }
- else
- {
- switch (pdev->dev.device_status)
- {
- case USB_OTG_ADDRESSED:
- if (cfgidx)
- {
- pdev->dev.device_config = cfgidx;
- pdev->dev.device_status = USB_OTG_CONFIGURED;
- USBD_SetCfg(pdev , cfgidx);
- USBD_CtlSendStatus(pdev);
- }
- else
- {
- USBD_CtlSendStatus(pdev);
- }
- break;
-
- case USB_OTG_CONFIGURED:
- if (cfgidx == 0)
- {
- pdev->dev.device_status = USB_OTG_ADDRESSED;
- pdev->dev.device_config = cfgidx;
- USBD_ClrCfg(pdev , cfgidx);
- USBD_CtlSendStatus(pdev);
-
- }
- else if (cfgidx != pdev->dev.device_config)
- {
- /* Clear old configuration */
- USBD_ClrCfg(pdev , pdev->dev.device_config);
-
- /* set new configuration */
- pdev->dev.device_config = cfgidx;
- USBD_SetCfg(pdev , cfgidx);
- USBD_CtlSendStatus(pdev);
- }
- else
- {
- USBD_CtlSendStatus(pdev);
- }
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
- }
-}
-
-/**
-* @brief USBD_GetConfig
-* Handle Get device configuration request
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_GetConfig(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
-
- if (req->wLength != 1)
- {
- USBD_CtlError(pdev , req);
- }
- else
- {
- switch (pdev->dev.device_status )
- {
- case USB_OTG_ADDRESSED:
-
- USBD_CtlSendData (pdev,
- (uint8_t *)&USBD_default_cfg,
- 1);
- break;
-
- case USB_OTG_CONFIGURED:
-
- USBD_CtlSendData (pdev,
- &pdev->dev.device_config,
- 1);
- break;
-
- default:
- USBD_CtlError(pdev , req);
- break;
- }
- }
-}
-
-/**
-* @brief USBD_GetStatus
-* Handle Get Status request
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_GetStatus(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
-
-
- switch (pdev->dev.device_status)
- {
- case USB_OTG_ADDRESSED:
- case USB_OTG_CONFIGURED:
-
-#ifdef USBD_SELF_POWERED
- USBD_cfg_status = USB_CONFIG_SELF_POWERED;
-#else
- USBD_cfg_status = 0x00;
-#endif
-
- if (pdev->dev.DevRemoteWakeup)
- {
- USBD_cfg_status |= USB_CONFIG_REMOTE_WAKEUP;
- }
-
- USBD_CtlSendData (pdev,
- (uint8_t *)&USBD_cfg_status,
- 2);
- break;
-
- default :
- USBD_CtlError(pdev , req);
- break;
- }
-}
-
-
-/**
-* @brief USBD_SetFeature
-* Handle Set device feature request
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_SetFeature(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
-
- USB_OTG_DCTL_TypeDef dctl;
- uint8_t test_mode = 0;
-
- if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
- {
- pdev->dev.DevRemoteWakeup = 1;
- pdev->dev.class_cb->Setup (pdev, req);
- USBD_CtlSendStatus(pdev);
- }
-
- else if ((req->wValue == USB_FEATURE_TEST_MODE) &&
- ((req->wIndex & 0xFF) == 0))
- {
- dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
-
- test_mode = req->wIndex >> 8;
- switch (test_mode)
- {
- case 1: // TEST_J
- dctl.b.tstctl = 1;
- break;
-
- case 2: // TEST_K
- dctl.b.tstctl = 2;
- break;
-
- case 3: // TEST_SE0_NAK
- dctl.b.tstctl = 3;
- break;
-
- case 4: // TEST_PACKET
- dctl.b.tstctl = 4;
- break;
-
- case 5: // TEST_FORCE_ENABLE
- dctl.b.tstctl = 5;
- break;
- }
- SET_TEST_MODE = dctl;
- pdev->dev.test_mode = 1;
- USBD_CtlSendStatus(pdev);
- }
-
-}
-
-
-/**
-* @brief USBD_ClrFeature
-* Handle clear device feature request
-* @param pdev: device instance
-* @param req: usb request
-* @retval status
-*/
-static void USBD_ClrFeature(USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
- switch (pdev->dev.device_status)
- {
- case USB_OTG_ADDRESSED:
- case USB_OTG_CONFIGURED:
- if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
- {
- pdev->dev.DevRemoteWakeup = 0;
- pdev->dev.class_cb->Setup (pdev, req);
- USBD_CtlSendStatus(pdev);
- }
- break;
-
- default :
- USBD_CtlError(pdev , req);
- break;
- }
-}
-
-/**
-* @brief USBD_ParseSetupRequest
-* Copy buffer into setup structure
-* @param pdev: device instance
-* @param req: usb request
-* @retval None
-*/
-
-void USBD_ParseSetupRequest( USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
- req->bmRequest = *(uint8_t *) (pdev->dev.setup_packet);
- req->bRequest = *(uint8_t *) (pdev->dev.setup_packet + 1);
- req->wValue = SWAPBYTE (pdev->dev.setup_packet + 2);
- req->wIndex = SWAPBYTE (pdev->dev.setup_packet + 4);
- req->wLength = SWAPBYTE (pdev->dev.setup_packet + 6);
-
- pdev->dev.in_ep[0].ctl_data_len = req->wLength ;
- pdev->dev.device_state = USB_OTG_EP0_SETUP;
-}
-
-/**
-* @brief USBD_CtlError
-* Handle USB low level Error
-* @param pdev: device instance
-* @param req: usb request
-* @retval None
-*/
-
-void USBD_CtlError( USB_OTG_CORE_HANDLE *pdev,
- USB_SETUP_REQ *req)
-{
-
- DCD_EP_Stall(pdev , 0x80);
- DCD_EP_Stall(pdev , 0);
- USB_OTG_EP0_OutStart(pdev);
-}
-
-
-/**
- * @brief USBD_GetString
- * Convert Ascii string into unicode one
- * @param desc : descriptor buffer
- * @param unicode : Formatted string buffer (unicode)
- * @param len : descriptor length
- * @retval None
- */
-void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
-{
- uint8_t idx = 0;
-
- if (desc != NULL)
- {
- *len = USBD_GetLen(desc) * 2 + 2;
- unicode[idx++] = *len;
- unicode[idx++] = USB_DESC_TYPE_STRING;
-
- while (*desc != NULL)
- {
- unicode[idx++] = *desc++;
- unicode[idx++] = 0x00;
- }
- }
-}
-
-/**
- * @brief USBD_GetLen
- * return the string length
- * @param buf : pointer to the ascii string buffer
- * @retval string length
- */
-static uint8_t USBD_GetLen(uint8_t *buf)
-{
- uint8_t len = 0;
-
- while (*buf != NULL)
- {
- len++;
- buf++;
- }
-
- return len;
-}
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/