Files movement.
Issue 26 fixed (JETI)
This commit is contained in:
@@ -0,0 +1,333 @@
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#include "../opentx.h"
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#define PIN_MODE_MASK 0x0003
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#define PIN_INPUT 0x0000
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#define PIN_OUTPUT 0x0001
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#define PIN_PERIPHERAL 0x0002
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#define PIN_ANALOG 0x0003
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#define PIN_PULL_MASK 0x000C
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#define PIN_PULLUP 0x0004
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#define PIN_NO_PULLUP 0x0000
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#define PIN_PULLDOWN 0x0008
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#define PIN_NO_PULLDOWN 0x0000
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#define PIN_PERI_MASK 0x00F0
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#define PIN_PUSHPULL 0x0000
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#define PIN_ODRAIN 0x8000
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#define PIN_PORT_MASK 0x0700
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#define PIN_SPEED_MASK 0x6000
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#if !defined(SIMU)
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void configure_pins( uint32_t pins, uint16_t config )
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{
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uint32_t address ;
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GPIO_TypeDef *pgpio ;
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uint32_t thispin ;
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uint32_t pos ;
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address = ( config & PIN_PORT_MASK ) >> 8 ;
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address *= (GPIOB_BASE-GPIOA_BASE) ;
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address += GPIOA_BASE ;
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pgpio = (GPIO_TypeDef* ) address ;
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/* -------------------------Configure the port pins---------------- */
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/*-- GPIO Mode Configuration --*/
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for (thispin = 0x0001, pos = 0; thispin < 0x10000; thispin <<= 1, pos +=1 )
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{
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if ( pins & thispin)
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{
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pgpio->MODER &= ~(GPIO_MODER_MODER0 << (pos * 2)) ;
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pgpio->MODER |= (config & PIN_MODE_MASK) << (pos * 2) ;
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if ( ( (config & PIN_MODE_MASK ) == PIN_OUTPUT) || ( (config & PIN_MODE_MASK) == PIN_PERIPHERAL) )
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{
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/* Speed mode configuration */
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pgpio->OSPEEDR &= ~GPIO_OSPEEDER_OSPEEDR0 << (pos * 2) ;
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pgpio->OSPEEDR |= ((config & PIN_SPEED_MASK) >> 13 ) << (pos * 2) ;
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/* Output mode configuration*/
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pgpio->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pos)) ;
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if ( config & PIN_ODRAIN )
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{
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pgpio->OTYPER |= (GPIO_OTYPER_OT_0) << pos ;
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}
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}
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/* Pull-up Pull down resistor configuration*/
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pgpio->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pos * 2));
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pgpio->PUPDR |= ((config & PIN_PULL_MASK) >> 2) << (pos * 2) ;
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pgpio->AFR[pos >> 3] &= ~(0x000F << (pos & 7)) ;
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pgpio->AFR[pos >> 3] |= ((config & PIN_PERI_MASK) >> 4) << (pos & 7) ;
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}
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}
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}
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#endif
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#ifndef SIMU
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inline void boardInit()
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{
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ADMUX=ADC_VREF_TYPE;
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ADCSRA=0x85; // ADC enabled, pre-scaler division=32 (no interrupt, no auto-triggering)
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ADCSRB=(1<<MUX5);
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/**** Set up timer/counter 0 ****/
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/** Move old 64A Timer0 functions to Timer2 and use WGM on OC0(A) (PB7) for spkear tone output **/
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// TCNT0 10ms = 16MHz/1024/156(.25) periodic timer (100ms interval)
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// cycles at 9.984ms but includes 1:4 duty cycle correction to /157 to average at 10.0ms
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TCCR2B = (0b111 << CS20); // Norm mode, clk/1024 (differs from ATmega64 chip)
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OCR2A = 156;
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TIMSK2 |= (1<<OCIE2A) | (1<<TOIE2); // Enable Output-Compare and Overflow interrrupts
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// Set up Phase correct Waveform Gen. mode, at clk/64 = 250,000 counts/second
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// (Higher speed allows for finer control of frquencies in the audio range.)
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// Used for audio tone generation
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TCCR0B = (1<<WGM02) | (0b011 << CS00);
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TCCR0A = (0b01<<WGM00);
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/***************************************************/
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/* Rotary encoder interrupt set-up */
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// All external interrupts initialise to disabled.
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EIMSK = 0; // disable ALL external interrupts.
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// encoder 1
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EICRB = (1<<ISC60) | (1<<ISC50); // 01 = interrupt on any edge
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EIFR = (3<<INTF5); // clear the int. flag in case it got set when changing modes
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// encoder 2
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EICRA = (1<<ISC30) | (1<<ISC20); // do the same for encoder 1
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EIFR = (3<<INTF2);
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#if ROTARY_ENCODERS > 2
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EIMSK = (3<<INT5); // enable the ONE rot. enc. ext. int. pairs.
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#else
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EIMSK = (3<<INT5) | (3<<INT2); // enable the two rot. enc. ext. int. pairs.
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#endif
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/***************************************************/
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#if defined (VOICE)
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/*
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* SOMO set-up (V4 board only)
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*/
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OCR4A = 0x1F4; //2ms
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TCCR4B = (1 << WGM42) | (3<<CS40); // CTC OCR1A, 16MHz / 64 (4us ticks)
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TIMSK4 |= (1<<OCIE4A); // Start the interrupt so the unit reset can occur
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#endif
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#if ROTARY_ENCODERS > 2
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//configure uart1 here
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DDRD &= ~(1 << 2);
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PORTD &= ~(1 << 2);
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#define EXTRA_ROTARY_ENCODERS_USART_BAUD 9600UL
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UBRR1 = F_CPU/(16*EXTRA_ROTARY_ENCODERS_USART_BAUD)-1;
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//9 bit mode
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UCSR1C = (1<<USBS1)|(3<<UCSZ10);
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UCSR1B = (1<<RXEN1)|(0<<TXEN1)|(1<<UCSZ12);
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UCSR1B |= 1 << RXCIE1; //enable interrupt on rx
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#endif
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}
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#if ROTARY_ENCODERS > 2
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uint8_t vpotToChange = 0;
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uint8_t vpot_mod_state = 0;
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ISR(USART1_RX_vect)
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{
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//receive data from extension board
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//bit 9 = 1 mean encoder number, following byte with bit 9 = 0 is increment value
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/* Get status and 9th bit, then data */
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/* from buffer */
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uint16_t resh = UCSR1B;
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uint16_t resl = UDR1;
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uint16_t res = 0;
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/* Filter the 9th bit, then return */
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resh = (resh >> 1) & 0x01;
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res = ((resh << 8) | resl);
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if((res == 0x180) | (res == 0x1C0)){ //button REb filter
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keys[BTN_REa].input((res & 0x1C0) == 0x1C0, BTN_REa);
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} else if((res & 0x100) == 0x100){ //rotary filter
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vpotToChange = res & 0xEF;
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vpot_mod_state = 1;
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}
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else {
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if(vpot_mod_state & (vpotToChange < NUM_ROTARY_ENCODERS))
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{
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int8_t vpot_inc = res & 0xFF;
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if(vpot_inc){
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incRotaryEncoder(vpotToChange, vpot_inc);
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}
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vpot_mod_state = 0;
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}
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}
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}
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#endif
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#endif // !SIMU
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uint8_t pwrCheck()
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{
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#if !defined(SIMU) && !defined(REV0)
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if ((PING & 0b00000010) && (~PINL & 0b01000000))
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return e_power_off;
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#endif
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return e_power_on;
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}
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void pwrOff()
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{
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#ifndef REV0
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PORTL = 0x7f;
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#endif
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}
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#if ROTARY_ENCODERS <= 2
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#define ROTENC_DOWN() ((~PIND & 0x20) || (~PIND & 0x10))
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#else
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#define ROTENC_DOWN() (0)
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#endif
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FORCEINLINE uint8_t keyDown()
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{
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return ((~PINL) & 0x3F) || ROTENC_DOWN();
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}
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bool switchState(EnumKeys enuk)
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{
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uint8_t result = 0 ;
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if (enuk < (int)DIM(keys))
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return keys[enuk].state() ? 1 : 0;
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switch(enuk){
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case SW_ELE:
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result = PINC & (1<<INP_C_ElevDR);
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break;
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case SW_AIL:
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result = PINC & (1<<INP_C_AileDR);
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break;
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case SW_RUD:
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result = PING & (1<<INP_G_RuddDR);
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break;
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// INP_G_ID1 INP_B_ID2
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// id0 0 1
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// id1 1 1
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// id2 1 0
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case SW_ID0:
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result = !(PING & (1<<INP_G_ID1));
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break;
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case SW_ID1:
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result = (PING & (1<<INP_G_ID1))&& (PINB & (1<<INP_B_ID2));
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break;
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case SW_ID2:
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result = !(PINB & (1<<INP_B_ID2));
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break;
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#if 0
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case SW_ID3:
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result = (calibratedStick[POT1+EXTRA_3POS-1] < 0);
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break;
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case SW_ID4:
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result = (calibratedStick[POT1+EXTRA_3POS-1] == 0);
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break;
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case SW_ID5:
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result = (calibratedStick[POT1+EXTRA_3POS-1] > 0);
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break;
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#endif
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case SW_GEA:
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result = PING & (1<<INP_G_Gear);
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break;
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case SW_THR:
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result = PING & (1<<INP_G_ThrCt);
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break;
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case SW_TRN:
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result = PINB & (1<<INP_B_Trainer);
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break;
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default:
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break;
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}
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return result;
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}
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FORCEINLINE void readKeysAndTrims()
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{
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uint8_t enuk = KEY_MENU;
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#if ROTARY_ENCODERS <= 2
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keys[BTN_REa].input(~PIND & 0x20, BTN_REa);
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#endif
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keys[BTN_REb].input(~PIND & 0x10, BTN_REb);
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uint8_t tin = ~PINL;
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uint8_t in;
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in = (tin & 0x0f) << 3;
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in |= (tin & 0x30) >> 3;
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for (int i=1; i<7; i++)
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{
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//INP_B_KEY_MEN 1 .. INP_B_KEY_LFT 6
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keys[enuk].input(in & (1<<i),(EnumKeys)enuk);
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++enuk;
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}
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// Trim switches ...
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static const pm_uchar crossTrim[] PROGMEM ={
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1<<INP_J_TRM_LH_DWN,
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1<<INP_J_TRM_LH_UP,
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1<<INP_J_TRM_LV_DWN,
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1<<INP_J_TRM_LV_UP,
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1<<INP_J_TRM_RV_DWN,
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1<<INP_J_TRM_RV_UP,
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1<<INP_J_TRM_RH_DWN,
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1<<INP_J_TRM_RH_UP
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};
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in = ~PINJ;
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for (int i=0; i<8; i++) {
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// INP_D_TRM_RH_UP 0 .. INP_D_TRM_LH_UP 7
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keys[enuk].input(in & pgm_read_byte(crossTrim+i),(EnumKeys)enuk);
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++enuk;
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}
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}
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#if ROTARY_ENCODERS <= 2
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ISR(INT2_vect)
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{
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uint8_t input = (PIND & 0x0C);
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if (input == 0 || input == 0x0C) incRotaryEncoder(0, -1);
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}
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ISR(INT3_vect)
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{
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uint8_t input = (PIND & 0x0C);
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if (input == 0 || input == 0x0C) incRotaryEncoder(0, +1);
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}
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#endif
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ISR(INT5_vect)
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{
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uint8_t input = (PINE & 0x60);
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if (input == 0 || input == 0x60) incRotaryEncoder(1, +1);
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}
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ISR(INT6_vect)
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{
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uint8_t input = (PINE & 0x60);
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if (input == 0 || input == 0x60) incRotaryEncoder(1, -1);
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}
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