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Fixes #2681: the PWR pin was not turned on correctly in _bootStart(). Watchdog reset now works on 9XE, the Bootloader exit also works.

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Trim switch pull up not enabled for 9XE in _bootStart().
Added watchdog test option in DEBUG screen (long press MENU key), use WATCHDOG_TEST=YES compile option to enable it.
This commit is contained in:
Damjan Adamic
2015-08-25 20:35:07 +02:00
parent f4e55f9d45
commit e83b7c3a69
7 changed files with 54 additions and 16 deletions
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radio/src/loadboot.cpp
+20 -11
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@@ -89,24 +89,33 @@ const uint8_t BootCode[] = {
__attribute__ ((section(".bootrodata"), used))
void _bootStart()
{
// turn soft power ON now
RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN; // Enable portD clock
GPIOD->BSRRL = 1;
GPIOD->MODER = (GPIOD->MODER & 0xFFFFFFFC) | 1;
#if defined(REV9E)
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable portC clock
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOGEN; // Enable portG clock
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIODEN;
#else
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // Enable portC clock
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN; // Enable portE clock
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIODEN;
#endif
// these two NOPs are needed (see STM32F errata sheet) before the peripheral
// register can be written after the peripheral clock was enabled
__ASM volatile ("nop");
__ASM volatile ("nop");
// Turn soft power ON now
GPIOD->BSRRL = 1; // set PWR_GPIO_PIN_ON pin to 1
GPIOD->MODER = (GPIOD->MODER & 0xFFFFFFFC) | 1; // General purpose output mode
// TRIMS_GPIO_PIN_LHR is on PG0 on 9XE and on PE3 on Taranis
// TRIMS_GPIO_PIN_RHL is on PC1 on all versions
// turn on pull-ups on trim keys
GPIOC->PUPDR = 0x00000004;
#if defined(REV9E)
GPIOG->PUPDR = 0x00000001;
#else
GPIOE->PUPDR = 0x00000040;
#endif
uint32_t i;
for (i = 0; i < 50000; i += 1) {
for (uint32_t i = 0; i < 50000; i += 1) {
bwdt_reset();
}