874 lines
27 KiB
C++
874 lines
27 KiB
C++
/*
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* Authors (alphabetical order)
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* - Bertrand Songis <bsongis@gmail.com>
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* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
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* - Cameron Weeks <th9xer@gmail.com>
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* - Erez Raviv
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* - Jean-Pierre Parisy
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* - Karl Szmutny <shadow@privy.de>
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* - Michael Blandford
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* - Michal Hlavinka
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* - Pat Mackenzie
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* - Philip Moss
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* - Rob Thomson
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* - Romolo Manfredini <romolo.manfredini@gmail.com>
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* - Thomas Husterer
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*
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* open9x is based on code named
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* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
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* er9x by Erez Raviv: http://code.google.com/p/er9x/,
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* and the original (and ongoing) project by
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* Thomas Husterer, th9x: http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "open9x.h"
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#include "AT91SAM3S2.h"
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#include "core_cm3.h"
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uint32_t Master_frequency ;
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/** Console baudrate 9600. */
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#define CONSOLE_BAUDRATE 9600
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/** Usart Hw interface used by the console (UART0). */
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#define CONSOLE_USART UART0
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/** Usart Hw ID used by the console (UART0). */
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#define CONSOLE_ID ID_UART0
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/** Pins description corresponding to Rxd,Txd, (UART pins) */
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#define CONSOLE_PINS {PINS_UART}
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/** Second serial baudrate 9600. */
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#define SECOND_BAUDRATE 9600
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/** Usart Hw interface used by the console (UART0). */
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#define SECOND_USART USART0
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/** Usart Hw ID used by the console (UART0). */
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#define SECOND_ID ID_USART0
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/** Pins description corresponding to Rxd,Txd, (UART pins) */
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#define SECOND_PINS {PINS_USART0}
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#define BT_USART UART1
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#define BT_ID ID_UART1
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#define CPU_INT int32_t
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#define CPU_UINT uint32_t
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#ifdef REVB
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inline void init_soft_power()
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{
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register Pio *pioptr ;
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pioptr = PIOC ;
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// Configure RF_power (PC17) but not PPM-jack-in (PC22), neither need pullups
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pioptr->PIO_PER = PIO_PC17 ; // Enable bit C17
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pioptr->PIO_ODR = PIO_PC17 ; // Set bit C17 as input
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pioptr = PIOA ;
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pioptr->PIO_PER = PIO_PA8 ; // Enable bit A8 (Soft Power)
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pioptr->PIO_ODR = PIO_PA8 ; // Set bit A8 as input
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pioptr->PIO_PUER = PIO_PA8 ; // Enable PA8 pullup
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}
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#endif
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// Prototype
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// Free pins (PA16 is stock buzzer)
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// PA23, PA24, PA25, PB7, PB13
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// PC20, PC21(labelled 17), PC22, PC24
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// REVB
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// PA25, use for stock buzzer
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// PB14, PB6
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// PC21, PC19, PC15 (PPM2 output)
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inline void config_free_pins()
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{
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register Pio *pioptr ;
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#ifdef REVB
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pioptr = PIOB ;
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pioptr->PIO_PER = 0x00004040L ; // Enable bits B14, 6
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pioptr->PIO_ODR = 0x00004040L ; // Set as input
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pioptr->PIO_PUER = 0x00004040L ; // Enable pullups
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pioptr = PIOC ;
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pioptr->PIO_PER = 0x00280000L ; // Enable bits C21, 19
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pioptr->PIO_ODR = 0x00280000L ; // Set as input
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pioptr->PIO_PUER = 0x00280000L ; // Enable pullups
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#else
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pioptr = PIOA ;
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pioptr->PIO_PER = 0x03800000L ; // Enable bits A25,24,23
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pioptr->PIO_ODR = 0x03800000L ; // Set as input
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pioptr->PIO_PUER = 0x03800000L ; // Enable pullups
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pioptr = PIOB ;
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pioptr->PIO_PER = 0x00002080L ; // Enable bits B13, 7
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pioptr->PIO_ODR = 0x00002080L ; // Set as input
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pioptr->PIO_PUER = 0x00002080L ; // Enable pullups
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pioptr = PIOC ;
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pioptr->PIO_PER = 0x01700000L ; // Enable bits C24,22,21,20
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pioptr->PIO_ODR = 0x01700000L ; // Set as input
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pioptr->PIO_PUER = 0x01700000L ; // Enable pullups
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#endif
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}
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// Assumes PMC has already enabled clocks to ports
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inline void setup_switches()
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{
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register Pio *pioptr ;
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pioptr = PIOA ;
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#ifdef REVB
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pioptr->PIO_PER = 0x01808087 ; // Enable bits
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pioptr->PIO_ODR = 0x01808087 ; // Set bits input
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pioptr->PIO_PUER = 0x01808087 ; // Set bits with pullups
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#else
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pioptr->PIO_PER = 0xF8008184 ; // Enable bits
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pioptr->PIO_ODR = 0xF8008184 ; // Set bits input
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pioptr->PIO_PUER = 0xF8008184 ; // Set bits with pullups
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#endif
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pioptr = PIOB ;
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#ifdef REVB
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pioptr->PIO_PER = 0x00000030 ; // Enable bits
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pioptr->PIO_ODR = 0x00000030 ; // Set bits input
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pioptr->PIO_PUER = 0x00000030 ; // Set bits with pullups
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#else
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pioptr->PIO_PER = 0x00000010 ; // Enable bits
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pioptr->PIO_ODR = 0x00000010 ; // Set bits input
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pioptr->PIO_PUER = 0x00000010 ; // Set bits with pullups
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#endif
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pioptr = PIOC ;
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#ifdef REVB
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pioptr->PIO_PER = 0x91114900 ; // Enable bits
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pioptr->PIO_ODR = 0x91114900 ; // Set bits input
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pioptr->PIO_PUER = 0x91114900 ; // Set bits with pullups
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#else
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pioptr->PIO_PER = 0x10014900 ; // Enable bits
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pioptr->PIO_ODR = 0x10014900 ; // Set bits input
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pioptr->PIO_PUER = 0x10014900 ; // Set bits with pullups
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#endif
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}
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/**
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* Configures a UART peripheral with the specified parameters.
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*
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* baudrate Baudrate at which the UART should operate (in Hz).
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* masterClock Frequency of the system master clock (in Hz).
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* uses PA9 and PA10, RXD2 and TXD2
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*/
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inline void UART_Configure( uint32_t baudrate, uint32_t masterClock)
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{
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// const Pin pPins[] = CONSOLE_PINS;
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register Uart *pUart = CONSOLE_USART;
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register Pio *pioptr ;
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/* Configure PIO */
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pioptr = PIOA ;
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pioptr->PIO_ABCDSR[0] &= ~0x00000600 ; // Peripheral A
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pioptr->PIO_ABCDSR[1] &= ~0x00000600 ; // Peripheral A
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pioptr->PIO_PDR = 0x00000600 ; // Assign to peripheral
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/* Configure PMC */
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PMC->PMC_PCER0 = 1 << CONSOLE_ID;
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/* Reset and disable receiver & transmitter */
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pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX
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| UART_CR_RXDIS | UART_CR_TXDIS;
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/* Configure mode */
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pUart->UART_MR = 0x800 ; // NORMAL, No Parity
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/* Configure baudrate */
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/* Asynchronous, no oversampling */
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pUart->UART_BRGR = (masterClock / baudrate) / 16;
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/* Disable PDC channel */
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pUart->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
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/* Enable receiver and transmitter */
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pUart->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
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}
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inline void UART3_Configure( uint32_t baudrate, uint32_t masterClock)
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{
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// const Pin pPins[] = CONSOLE_PINS;
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register Uart *pUart = BT_USART;
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register Pio *pioptr ;
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/* Configure PIO */
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pioptr = PIOB ;
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pioptr->PIO_ABCDSR[0] &= ~(PIO_PB2 | PIO_PB3) ; // Peripheral A
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pioptr->PIO_ABCDSR[1] &= ~(PIO_PB2 | PIO_PB3) ; // Peripheral A
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pioptr->PIO_PDR = (PIO_PB2 | PIO_PB3) ; // Assign to peripheral
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/* Configure PMC */
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PMC->PMC_PCER0 = 1 << BT_ID;
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/* Reset and disable receiver & transmitter */
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pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX
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| UART_CR_RXDIS | UART_CR_TXDIS;
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/* Configure mode */
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pUart->UART_MR = 0x800 ; // NORMAL, No Parity
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/* Configure baudrate */
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/* Asynchronous, no oversampling */
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pUart->UART_BRGR = (masterClock / baudrate) / 16;
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// baudrate = (masterClock * 8 / baudrate) / 16 ;
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// pUart->UART_BRGR = ( baudrate / 8 ) || ( ( baudrate & 7 ) << 16 ) ; // Fractional part to allow 152000 baud
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//
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/* Disable PDC channel */
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pUart->UART_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
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/* Enable receiver and transmitter */
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pUart->UART_CR = UART_CR_RXEN | UART_CR_TXEN;
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}
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// USART0 configuration
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// Work in Progress, UNTESTED
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// Uses PA5 and PA6 (RXD and TXD)
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inline void UART2_Configure( uint32_t baudrate, uint32_t masterClock)
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{
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//// const Pin pPins[] = CONSOLE_PINS;
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register Usart *pUsart = SECOND_USART;
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register Pio *pioptr ;
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/* Configure PIO */
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pioptr = PIOA ;
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pioptr->PIO_ABCDSR[0] &= ~0x00000060 ; // Peripheral A
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pioptr->PIO_ABCDSR[1] &= ~0x00000060 ; // Peripheral A
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pioptr->PIO_PDR = 0x00000060 ; // Assign to peripheral
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// /* Configure PMC */
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PMC->PMC_PCER0 = 1 << SECOND_ID;
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// /* Reset and disable receiver & transmitter */
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pUsart->US_CR = US_CR_RSTRX | US_CR_RSTTX
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| US_CR_RXDIS | US_CR_TXDIS;
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// /* Configure mode */
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pUsart->US_MR = 0x000008C0 ; // NORMAL, No Parity
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// /* Configure baudrate */
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// /* Asynchronous, no oversampling */
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pUsart->US_BRGR = (masterClock / baudrate) / 16;
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// /* Disable PDC channel */
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pUsart->US_PTCR = US_PTCR_RXTDIS | US_PTCR_TXTDIS;
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// /* Enable receiver and transmitter */
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pUsart->US_CR = US_CR_RXEN | US_CR_TXEN;
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}
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// Starts TIMER2 at 100Hz, commentd out drive of TIOA2 (A26, EXT2) out
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inline void start_timer2()
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{
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register Pio *pioptr ;
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register Tc *ptc ;
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register uint32_t timer ;
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// Enable peripheral clock TC0 = bit 23 thru TC5 = bit 28
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PMC->PMC_PCER0 |= 0x02000000L ; // Enable peripheral clock to TC2
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timer = Master_frequency / 12800 ; // MCK/128 and 100 Hz
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ptc = TC0 ; // Tc block 0 (TC0-2)
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ptc->TC_BCR = 0 ; // No sync
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ptc->TC_BMR = 0 ;
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ptc->TC_CHANNEL[2].TC_CMR = 0x00008000 ; // Waveform mode
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ptc->TC_CHANNEL[2].TC_RC = timer ; // 10 Hz
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ptc->TC_CHANNEL[2].TC_RA = timer >> 1 ;
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ptc->TC_CHANNEL[2].TC_CMR = 0x0009C003 ; // 0000 0000 0000 1001 1100 0000 0000 0011
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// MCK/128, set @ RA, Clear @ RC waveform
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pioptr = PIOC ;
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pioptr->PIO_PER = 0x00080000L ; // Enable bits C19
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pioptr->PIO_OER = 0x00080000L ; // Set as output
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ptc->TC_CHANNEL[2].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
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NVIC_EnableIRQ(TC2_IRQn) ;
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TC0->TC_CHANNEL[2].TC_IER = TC_IER0_CPCS ;
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}
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// Test, starts TIMER0 at full speed (MCK/2) for delay timing
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inline void start_timer0()
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{
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register Tc *ptc ;
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// Enable peripheral clock TC0 = bit 23 thru TC5 = bit 28
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PMC->PMC_PCER0 |= 0x00800000L ; // Enable peripheral clock to TC0
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ptc = TC0 ; // Tc block 0 (TC0-2)
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ptc->TC_BCR = 0 ; // No sync
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ptc->TC_BMR = 2 ;
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ptc->TC_CHANNEL[0].TC_CMR = 0x00008000 ; // Waveform mode
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ptc->TC_CHANNEL[0].TC_RC = 0xFFF0 ;
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ptc->TC_CHANNEL[0].TC_RA = 0 ;
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ptc->TC_CHANNEL[0].TC_CMR = 0x00008040 ; // 0000 0000 0000 0000 1000 0000 0100 0000, stop at regC
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ptc->TC_CHANNEL[0].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
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}
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// TODO where used
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volatile uint32_t Tenms ;
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extern "C" void TC2_IRQHandler()
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{
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register uint32_t dummy;
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static uint32_t pre_scale ; // Used to get 10 Hz counter
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/* Clear status bit to acknowledge interrupt */
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dummy = TC0->TC_CHANNEL[2].TC_SR;
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(void) dummy ; // Discard value - prevents compiler warning
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Tenms |= 1 ; // 10 mS has passed
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/* TODO if ( Buzzer_count )
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{
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if ( --Buzzer_count == 0 )
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{
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buzzer_off() ;
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}
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} */
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if ( ++pre_scale >= 10 )
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{
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// TODO needed? Timer2_count += 1 ;
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pre_scale = 0 ;
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}
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per10ms();
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// heartbeat |= HEART_TIMER10ms;
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}
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// Settings for mode register ADC_MR
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// USEQ off - silicon problem, doesn't work
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// TRANSFER = 1
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// TRACKTIM = 4 (5 clock periods)
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// ANACH = 0
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// SETTLING = 1 (not used if ANACH = 0)
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// STARTUP = 1 (8 clock periods)
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// PRESCAL = 3.6 MHz clock (between 1 and 20MHz)
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// FREERUN = 0
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// FWUP = 0
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// SLEEP = 0
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// LOWRES = 0
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// TRGSEL = 0
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// TRGEN = 0 (software trigger only)
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inline void init_adc()
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{
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register Adc *padc ;
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register uint32_t timer ;
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timer = ( Master_frequency / (3600000*2) ) << 8 ;
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// Enable peripheral clock ADC = bit 29
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PMC->PMC_PCER0 |= 0x20000000L ; // Enable peripheral clock to ADC
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padc = ADC ;
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padc->ADC_MR = 0x14110000 | timer ; // 0001 0100 0001 0001 xxxx xxxx 0000 0000
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#ifdef REVB
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padc->ADC_CHER = 0x0000633E ; // channels 1,2,3,4,5,8,9,13,14
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#else
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padc->ADC_CHER = 0x0000623E ; // channels 1,2,3,4,5,9,13,14
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#endif
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padc->ADC_CGR = 0 ; // Gain = 1, all channels
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padc->ADC_COR = 0 ; // Single ended, 0 offset, all channels
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}
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// PWM used for PPM generation, and LED Backlight
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// Output pin PB5 not used, PA17 used as PWMH3 peripheral C
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// PWM peripheral ID = 31 (0x80000000)
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// Ensure PB5 is three state/input, used on REVB for MENU KEY
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// Configure PWM3 as PPM drive,
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// PWM0 is LED backlight PWM on PWMH0
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// This is PC18 peripheral B, Also enable PC22 peripheral B, this is PPM-JACK (PWML3)
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//
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// REVB board:
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// PWML2, output as peripheral C on PA16, is for HAPTIC
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// For testing, just drive it out with PWM
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// PWML1 for PPM2 output as peripheral B on PC15
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// For testing, just drive it out with PWM
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void init_pwm()
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{
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register Pio *pioptr ;
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register Pwm *pwmptr ;
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register uint32_t timer ;
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PMC->PMC_PCER0 |= ( 1 << ID_PWM ) ; // Enable peripheral clock to PWM
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MATRIX->CCFG_SYSIO |= 0x00000020L ; // Disable TDO let PB5 work!
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/* Configure PIO */
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#ifndef REVB
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pioptr = PIOB ;
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pioptr->PIO_PER = 0x00000020L ; // Enable bit B5
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pioptr->PIO_ODR = 0x00000020L ; // set as input
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#endif
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#ifdef REVB
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pioptr = PIOB ;
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pioptr->PIO_ABCDSR[0] &= ~PIO_PA16 ; // Peripheral C
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pioptr->PIO_ABCDSR[1] |= PIO_PA16 ; // Peripheral C
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pioptr->PIO_PDR = PIO_PA16 ; // Disable bit A16 Assign to peripheral
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#endif
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pioptr = PIOC ;
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pioptr->PIO_ABCDSR[0] |= PIO_PC18 ; // Peripheral B
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pioptr->PIO_ABCDSR[1] &= ~PIO_PC18 ; // Peripheral B
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pioptr->PIO_PDR = PIO_PC18 ; // Disable bit C18 Assign to peripheral
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#ifdef REVB
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pioptr->PIO_ABCDSR[0] |= PIO_PC15 ; // Peripheral B
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pioptr->PIO_ABCDSR[1] &= ~PIO_PC15 ; // Peripheral B
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pioptr->PIO_PDR = PIO_PC15 ; // Disable bit C15 Assign to peripheral
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#endif
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#ifdef REVB
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pioptr->PIO_ABCDSR[0] |= PIO_PC22 ; // Peripheral B
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pioptr->PIO_ABCDSR[1] &= ~PIO_PC22 ; // Peripheral B
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pioptr->PIO_PDR = PIO_PC22 ; // Disable bit C22 Assign to peripheral
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#endif
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// Configure clock - depends on MCK frequency
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timer = Master_frequency / 2000000 ;
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timer |= ( Master_frequency / ( 32* 10000 ) ) << 16 ;
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timer &= 0x00FF00FF ;
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pwmptr = PWM ;
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pwmptr->PWM_CLK = 0x05000000 | timer ; // MCK for DIVA, DIVA = 18 gives 0.5uS clock period @35MHz // MCK/32 / timer = 10000Hz for CLKB
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// PWM0 for LED backlight
|
|
pwmptr->PWM_CH_NUM[0].PWM_CMR = 0x0000000C ; // CLKB
|
|
pwmptr->PWM_CH_NUM[0].PWM_CPDR = 100 ; // Period
|
|
pwmptr->PWM_CH_NUM[0].PWM_CPDRUPD = 100 ; // Period
|
|
pwmptr->PWM_CH_NUM[0].PWM_CDTY = 40 ; // Duty
|
|
pwmptr->PWM_CH_NUM[0].PWM_CDTYUPD = 40 ; // Duty
|
|
pwmptr->PWM_ENA = PWM_ENA_CHID0 ; // Enable channel 0
|
|
|
|
#ifdef REVB
|
|
// PWM1 for PPM2 output 100Hz test
|
|
pwmptr->PWM_CH_NUM[1].PWM_CMR = 0x0000000C ; // CLKB
|
|
pwmptr->PWM_CH_NUM[1].PWM_CPDR = 100 ; // Period
|
|
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = 100 ; // Period
|
|
pwmptr->PWM_CH_NUM[1].PWM_CDTY = 40 ; // Duty
|
|
pwmptr->PWM_CH_NUM[1].PWM_CDTYUPD = 40 ; // Duty
|
|
pwmptr->PWM_ENA = PWM_ENA_CHID1 ; // Enable channel 1
|
|
#endif
|
|
|
|
#ifdef REVB
|
|
// PWM2 for HAPTIC drive 100Hz test
|
|
pwmptr->PWM_CH_NUM[2].PWM_CMR = 0x0000000C ; // CLKB
|
|
pwmptr->PWM_CH_NUM[2].PWM_CPDR = 100 ; // Period
|
|
pwmptr->PWM_CH_NUM[2].PWM_CPDRUPD = 100 ; // Period
|
|
pwmptr->PWM_CH_NUM[2].PWM_CDTY = 40 ; // Duty
|
|
pwmptr->PWM_CH_NUM[2].PWM_CDTYUPD = 40 ; // Duty
|
|
pwmptr->PWM_ENA = PWM_ENA_CHID2 ; // Enable channel 2
|
|
#endif
|
|
}
|
|
|
|
// LCD i/o pins
|
|
// LCD_RES PC27
|
|
// LCD_CS1 PC26
|
|
// LCD_E PC12
|
|
// LCD_RnW PC13
|
|
// LCD_A0 PC15
|
|
// LCD_D0 PC0
|
|
// LCD_D1 PC7
|
|
// LCD_D2 PC6
|
|
// LCD_D3 PC5
|
|
// LCD_D4 PC4
|
|
// LCD_D5 PC3
|
|
// LCD_D6 PC2
|
|
// LCD_D7 PC1
|
|
|
|
#define LCD_DATA 0x000000FFL
|
|
#ifdef REVB
|
|
#define LCD_A0 0x00000080L
|
|
#else
|
|
#define LCD_A0 0x00008000L
|
|
#endif
|
|
#define LCD_RnW 0x00002000L
|
|
#define LCD_E 0x00001000L
|
|
#define LCD_CS1 0x04000000L
|
|
#define LCD_RES 0x08000000L
|
|
|
|
extern void start_sound(); // TODO elsewhere
|
|
|
|
void board_init()
|
|
{
|
|
// register uint32_t goto_usb ;
|
|
register Pio *pioptr ;
|
|
// Debug variable
|
|
// uint32_t both_on ;
|
|
|
|
WDT->WDT_MR = 0x3FFFAFFF ; // Disable watchdog
|
|
|
|
MATRIX->CCFG_SYSIO |= 0x000000F0L ; // Disable syspins, enable B4,5,6,7
|
|
|
|
PMC->PMC_PCER0 = (1<<ID_PIOC)|(1<<ID_PIOB)|(1<<ID_PIOA)|(1<<ID_UART0) ; // Enable clocks to PIOB and PIOA and PIOC and UART0
|
|
pioptr = PIOA ;
|
|
#ifdef REVB
|
|
init_soft_power() ;
|
|
#else
|
|
// On REVB, PA21 is used as AD8, and measures current consumption.
|
|
pioptr->PIO_PER = PIO_PA21 ; // Enable bit A21 (EXT3)
|
|
pioptr->PIO_OER = PIO_PA21 ; // Set bit A21 as output
|
|
pioptr->PIO_SODR = PIO_PA21 ; // Set bit A21 ON
|
|
#endif
|
|
|
|
// pioptr->PIO_PUER = 0x80000000 ; // Enable pullup on bit A31 (EXIT)
|
|
// pioptr->PIO_PER = 0x80000000 ; // Enable bit A31
|
|
|
|
pioptr = PIOC ;
|
|
pioptr->PIO_PER = PIO_PC25 ; // Enable bit C25 (USB-detect)
|
|
// pioptr->PIO_OER = 0x80000000L ; // Set bit C31 as output
|
|
// pioptr->PIO_SODR = 0x80000000L ; // Set bit C31
|
|
|
|
#ifndef REVB
|
|
// Configure RF_power (PC17) and PPM-jack-in (PC19), neither need pullups
|
|
pioptr->PIO_PER = 0x000A0000L ; // Enable bit C19, C17
|
|
pioptr->PIO_ODR = 0x000A0000L ; // Set bits C19 and C17 as input
|
|
#endif
|
|
|
|
config_free_pins() ;
|
|
|
|
// Next section configures the key inputs on the LCD data
|
|
#ifdef REVB
|
|
pioptr->PIO_PER = 0x0000003BL ; // Enable bits 1,3,4,5, 0
|
|
pioptr->PIO_OER = PIO_PC0 ; // Set bit 0 output
|
|
pioptr->PIO_ODR = 0x0000003AL ; // Set bits 1, 3, 4, 5 input
|
|
pioptr->PIO_PUER = 0x0000003AL ; // Set bits 1, 3, 4, 5 with pullups
|
|
#else
|
|
pioptr->PIO_PER = 0x0000003DL ; // Enable bits 2,3,4,5, 0
|
|
pioptr->PIO_OER = PIO_PC0 ; // Set bit 0 output
|
|
pioptr->PIO_ODR = 0x0000003CL ; // Set bits 2, 3, 4, 5 input
|
|
pioptr->PIO_PUER = 0x0000003CL ; // Set bits 2, 3, 4, 5 with pullups
|
|
#endif
|
|
|
|
pioptr = PIOB ;
|
|
#ifdef REVB
|
|
pioptr->PIO_PUER = PIO_PB5 ; // Enable pullup on bit B5 (MENU)
|
|
pioptr->PIO_PER = PIO_PB5 ; // Enable bit B5
|
|
#else
|
|
pioptr->PIO_PUER = PIO_PB6 ; // Enable pullup on bit B6 (MENU)
|
|
pioptr->PIO_PER = PIO_PB6 ; // Enable bit B6
|
|
#endif
|
|
|
|
setup_switches() ;
|
|
|
|
// Enable PCK2 on PB3, This is for testing of Timer 2 working
|
|
// It will be used as serial data to the Bluetooth module
|
|
pioptr->PIO_ABCDSR[0] |= PIO_PB3 ; // Peripheral B
|
|
pioptr->PIO_ABCDSR[1] &= ~PIO_PB3 ; // Peripheral B
|
|
pioptr->PIO_PDR = PIO_PB3 ; // Assign to peripheral
|
|
PMC->PMC_SCER |= 0x0400 ; // PCK2 enabled
|
|
PMC->PMC_PCK[2] = 2 ; // PCK2 is PLLA
|
|
|
|
UART_Configure( 9600, Master_frequency ) ;
|
|
UART2_Configure( 9600, Master_frequency ) ; // Testing
|
|
UART3_Configure( 9600, Master_frequency ) ; // Testing
|
|
|
|
start_timer2() ;
|
|
start_timer0() ;
|
|
init_adc() ;
|
|
init_pwm() ;
|
|
|
|
__enable_irq() ;
|
|
|
|
start_sound() ;
|
|
|
|
eeprom_init();
|
|
}
|
|
|
|
uint16_t getTmr2MHz()
|
|
{
|
|
return TC1->TC_CHANNEL[0].TC_CV ;
|
|
}
|
|
|
|
// keys:
|
|
// KEY_EXIT PA31 (PC24)
|
|
// KEY_MENU PB6 (PB5)
|
|
// KEY_DOWN LCD5 PC3 (PC5)
|
|
// KEY_UP LCD6 PC2 (PC1)
|
|
// KEY_RIGHT LCD4 PC4 (PC4)
|
|
// KEY_LEFT LCD3 PC5 (PC3)
|
|
// Reqd. bit 6 LEFT, 5 RIGHT, 4 UP, 3 DOWN 2 EXIT 1 MENU
|
|
// LCD pins 5 DOWN, 4 RIGHT, 3 LEFT, 1 UP
|
|
uint32_t read_keys()
|
|
{
|
|
register uint32_t x ;
|
|
register uint32_t y ;
|
|
|
|
x = PIOC->PIO_PDSR << 1 ; // 6 LEFT, 5 RIGHT, 4 DOWN, 3 UP ()
|
|
#ifdef REVB
|
|
y = x & 0x00000020 ; // RIGHT
|
|
if ( x & 0x00000004 )
|
|
{
|
|
y |= 0x00000010 ; // UP
|
|
}
|
|
if ( x & 0x00000010 )
|
|
{
|
|
y |= 0x00000040 ; // LEFT
|
|
}
|
|
if ( x & 0x00000040 )
|
|
{
|
|
y |= 0x00000008 ; // DOWN
|
|
}
|
|
#else
|
|
y = x & 0x00000060 ;
|
|
if ( x & 0x00000008 )
|
|
{
|
|
y |= 0x00000010 ;
|
|
}
|
|
if ( x & 0x00000010 )
|
|
{
|
|
y |= 0x00000008 ;
|
|
}
|
|
#endif
|
|
#ifdef REVB
|
|
if ( PIOC->PIO_PDSR & 0x01000000 )
|
|
#else
|
|
if ( PIOA->PIO_PDSR & 0x80000000 )
|
|
#endif
|
|
{
|
|
y |= 4 ; // EXIT
|
|
}
|
|
#ifdef REVB
|
|
if ( PIOB->PIO_PDSR & 0x000000020 )
|
|
#else
|
|
if ( PIOB->PIO_PDSR & 0x000000040 )
|
|
#endif
|
|
{
|
|
y |= 2 ; // MENU
|
|
}
|
|
return y ;
|
|
}
|
|
|
|
|
|
|
|
uint32_t read_trims()
|
|
{
|
|
uint32_t trims ;
|
|
|
|
trims = 0 ;
|
|
|
|
// TRIM_LH_DOWN PA7 (PA23)
|
|
#ifdef REVB
|
|
if ( ( PIOA->PIO_PDSR & 0x00800000 ) == 0 )
|
|
#else
|
|
if ( ( PIOA->PIO_PDSR & 0x0080 ) == 0 )
|
|
#endif
|
|
{
|
|
trims |= 1 ;
|
|
}
|
|
|
|
// TRIM_LH_UP PB4
|
|
if ( ( PIOB->PIO_PDSR & 0x10 ) == 0 )
|
|
{
|
|
trims |= 2 ;
|
|
}
|
|
|
|
// TRIM_LV_DOWN PA27 (PA24)
|
|
#ifdef REVB
|
|
if ( ( PIOA->PIO_PDSR & 0x01000000 ) == 0 )
|
|
#else
|
|
if ( ( PIOA->PIO_PDSR & 0x08000000 ) == 0 )
|
|
#endif
|
|
{
|
|
trims |= 4 ;
|
|
}
|
|
|
|
// TRIM_LV_UP PC28
|
|
if ( ( PIOC->PIO_PDSR & 0x10000000 ) == 0 )
|
|
{
|
|
trims |= 8 ;
|
|
}
|
|
|
|
// TRIM_RV_DOWN PC10
|
|
if ( ( PIOC->PIO_PDSR & 0x00000400 ) == 0 )
|
|
{
|
|
trims |= 0x10 ;
|
|
}
|
|
|
|
// TRIM_RV_UP PA30 (PA1)
|
|
#ifdef REVB
|
|
if ( ( PIOA->PIO_PDSR & 0x00000002 ) == 0 )
|
|
#else
|
|
if ( ( PIOA->PIO_PDSR & 0x40000000 ) == 0 )
|
|
#endif
|
|
{
|
|
trims |= 0x20 ;
|
|
}
|
|
|
|
// TRIM_RH_DOWN PA29 (PA0)
|
|
#ifdef REVB
|
|
if ( ( PIOA->PIO_PDSR & 0x00000001 ) == 0 )
|
|
#else
|
|
if ( ( PIOA->PIO_PDSR & 0x20000000 ) == 0 )
|
|
#endif
|
|
{
|
|
trims |= 0x40 ;
|
|
}
|
|
|
|
// TRIM_RH_UP PC9
|
|
if ( ( PIOC->PIO_PDSR & 0x00000200 ) == 0 )
|
|
{
|
|
trims |= 0x80 ;
|
|
}
|
|
|
|
return trims ;
|
|
}
|
|
|
|
|
|
uint8_t keyDown()
|
|
{
|
|
return ~read_keys() & 0x7E ;
|
|
}
|
|
|
|
extern uint32_t keyState(EnumKeys enuk)
|
|
{
|
|
CPU_UINT xxx = 0 ;
|
|
if(enuk < (int)DIM(keys)) return keys[enuk].state() ? 1 : 0;
|
|
|
|
switch((uint8_t)enuk)
|
|
{
|
|
#ifdef REVB
|
|
case SW_ElevDR : xxx = PIOC->PIO_PDSR & 0x80000000 ; // ELE_DR PC31
|
|
#else
|
|
case SW_ElevDR : xxx = PIOA->PIO_PDSR & 0x00000100 ; // ELE_DR PA8
|
|
#endif
|
|
break ;
|
|
|
|
case SW_AileDR : xxx = PIOA->PIO_PDSR & 0x00000004 ; // AIL-DR PA2
|
|
break ;
|
|
|
|
case SW_RuddDR : xxx = PIOA->PIO_PDSR & 0x00008000 ; // RUN_DR PA15
|
|
break ;
|
|
// INP_G_ID1 INP_E_ID2
|
|
// id0 0 1
|
|
// id1 1 1
|
|
// id2 1 0
|
|
case SW_ID0 : xxx = ~PIOC->PIO_PDSR & 0x00004000 ; // SW_IDL1 PC14
|
|
break ;
|
|
case SW_ID1 : xxx = (PIOC->PIO_PDSR & 0x00004000) ; if ( xxx ) xxx = (PIOC->PIO_PDSR & 0x00000800);
|
|
break ;
|
|
case SW_ID2 : xxx = ~PIOC->PIO_PDSR & 0x00000800 ; // SW_IDL2 PC11
|
|
break ;
|
|
|
|
|
|
case SW_Gear : xxx = PIOC->PIO_PDSR & 0x00010000 ; // SW_GEAR PC16
|
|
break ;
|
|
|
|
#ifdef REVB
|
|
case SW_ThrCt : xxx = PIOC->PIO_PDSR & 0x00100000 ; // SW_TCUT PC20
|
|
#else
|
|
case SW_ThrCt : xxx = PIOA->PIO_PDSR & 0x10000000 ; // SW_TCUT PA28
|
|
#endif
|
|
break ;
|
|
|
|
case SW_Trainer: xxx = PIOC->PIO_PDSR & 0x00000100 ; // SW-TRAIN PC8
|
|
break ;
|
|
default:;
|
|
}
|
|
|
|
if ( xxx )
|
|
{
|
|
return 1 ;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
uint16_t Analog_values[NUMBER_ANALOG] ;
|
|
|
|
// Read 8 (9 for REVB) ADC channels
|
|
// Documented bug, must do them 1 by 1
|
|
void read_9_adc()
|
|
{
|
|
register Adc *padc;
|
|
register uint32_t y;
|
|
register uint32_t x;
|
|
|
|
// PMC->PMC_PCER0 |= 0x20000000L ; // Enable peripheral clock to ADC
|
|
|
|
padc = ADC;
|
|
y = padc->ADC_ISR; // Clear EOC flags
|
|
for (y = NUMBER_ANALOG; --y > 0;) {
|
|
padc->ADC_CR = 2; // Start conversion
|
|
x = 0;
|
|
while ((padc->ADC_ISR & 0x01000000) == 0) {
|
|
// wait for DRDY flag
|
|
if (++x > 1000000) {
|
|
break; // Software timeout
|
|
}
|
|
}
|
|
x = padc->ADC_LCDR; // Clear DRSY flag
|
|
}
|
|
// Next bit may be done using the PDC
|
|
Analog_values[0] = ADC->ADC_CDR1;
|
|
Analog_values[1] = ADC->ADC_CDR2;
|
|
Analog_values[2] = ADC->ADC_CDR3;
|
|
Analog_values[3] = ADC->ADC_CDR4;
|
|
Analog_values[4] = ADC->ADC_CDR5;
|
|
Analog_values[5] = ADC->ADC_CDR9;
|
|
Analog_values[6] = ADC->ADC_CDR13;
|
|
Analog_values[7] = ADC->ADC_CDR14;
|
|
#ifdef REVB
|
|
Analog_values[8] = ADC->ADC_CDR8 ;
|
|
#endif
|
|
|
|
// Power save
|
|
// PMC->PMC_PCER0 &= ~0x20000000L ; // Disable peripheral clock to ADC
|
|
}
|
|
|
|
void readKeysAndTrims()
|
|
{
|
|
register uint32_t i ;
|
|
|
|
if ( PIOC->PIO_ODSR & 0x00080000 )
|
|
{
|
|
PIOC->PIO_CODR = 0x00200000L ; // Set bit C19 OFF
|
|
}
|
|
else
|
|
{
|
|
PIOC->PIO_SODR = 0x00200000L ; // Set bit C19 ON
|
|
}
|
|
|
|
uint8_t enuk = KEY_MENU;
|
|
uint8_t in = ~read_keys() ;
|
|
for( i=1; i<7; i++)
|
|
{
|
|
//INP_B_KEY_MEN 1 .. INP_B_KEY_LFT 6
|
|
keys[enuk].input(in & (1<<i),(EnumKeys)enuk);
|
|
++enuk;
|
|
}
|
|
// static const uint8_t crossTrim[]={
|
|
// 1<<INP_D_TRM_LH_DWN,
|
|
// 1<<INP_D_TRM_LH_UP,
|
|
// 1<<INP_D_TRM_LV_DWN,
|
|
// 1<<INP_D_TRM_LV_UP,
|
|
// 1<<INP_D_TRM_RV_DWN,
|
|
// 1<<INP_D_TRM_RV_UP,
|
|
// 1<<INP_D_TRM_RH_DWN,
|
|
// 1<<INP_D_TRM_RH_UP
|
|
// };
|
|
in = read_trims() ;
|
|
|
|
for( i=1; i<256; i<<=1)
|
|
{
|
|
// INP_D_TRM_RH_UP 0 .. INP_D_TRM_LH_UP 7
|
|
keys[enuk].input(in & i,(EnumKeys)enuk);
|
|
++enuk;
|
|
}
|
|
}
|
|
|
|
void end_ppm_capture()
|
|
{
|
|
TC1->TC_CHANNEL[0].TC_IDR = TC_IDR0_LDRAS ;
|
|
NVIC_DisableIRQ(TC3_IRQn) ;
|
|
}
|