174 lines
6.0 KiB
C
174 lines
6.0 KiB
C
#ifdef __USI__
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/****************************************************************************/
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static void USI_TWI_SLAVE_Init( void );
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static void USI_TWI_SLAVE_Abort(void);
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static void USI_TWI_SLAVE_ReadAndProcessPacket(void);
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static void USI_TWI_SLAVE_Process_Start_Condition(void);
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void USI_TWI_SLAVE_Process_Overflow_Condition(void);
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// void prog_buffer_set_byte(uint8_t );
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// uint8_t bootloader_exit;
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uint8_t Run_boot ;
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#define TRUE 1
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#define FALSE 0
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// TWI write states.
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#define USI_TWI_SLAVE_WRITE_ADDR_HI_BYTE (0x00)
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#define USI_TWI_SLAVE_WRITE_ADDR_LO_BYTE (0x01)
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#define USI_TWI_SLAVE_WRITE_DATA_BYTE (0x02)
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// TWI overflow states.
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#define USI_TWI_SLAVE_OVERFLOW_STATE_NONE (0x00)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_ACK_PR_RX (0x01)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_DATA_RX (0x02)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_ACK_PR_TX (0x03)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_PR_ACK_TX (0x04)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_DATA_TX (0x05)
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// newly added ..
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#define USI_TWI_SLAVE_OVERFLOW_STATE_CMD_RX (0x06)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_DATA_TX_AVERSION (0x07)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_DATA_TX_BVERSION (0x08)
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#define USI_TWI_SLAVE_OVERFLOW_STATE_DATA_TX_GETERRCONDN (0x09)
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//////////////////////////////////////////////////////////////////////
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// typedef unsigned char uint8_t;
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//////////////////////////////////////////////////////////////////
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///////////////// Driver Buffer Definitions //////////////////////
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//////////////////////////////////////////////////////////////////
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// 1,2,4,8,16,32,64,128 or 256 bytes are allowed buffer sizes
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#define TWI_RX_BUFFER_SIZE (16)
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#define TWI_RX_BUFFER_MASK ( TWI_RX_BUFFER_SIZE - 1 )
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#if ( TWI_RX_BUFFER_SIZE & TWI_RX_BUFFER_MASK )
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#error TWI RX buffer size is not a power of 2
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#endif
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// 1,2,4,8,16,32,64,128 or 256 bytes are allowed buffer sizes
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#define TWI_TX_BUFFER_SIZE (16)
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#define TWI_TX_BUFFER_MASK ( TWI_TX_BUFFER_SIZE - 1 )
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#if ( TWI_TX_BUFFER_SIZE & TWI_TX_BUFFER_MASK )
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#error TWI TX buffer size is not a power of 2
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#endif
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#define USI_SLAVE_CHECK_ADDRESS (0x00)
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#define USI_SLAVE_SEND_DATA (0x01)
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#define USI_SLAVE_REQUEST_REPLY_FROM_SEND_DATA (0x02)
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#define USI_SLAVE_CHECK_REPLY_FROM_SEND_DATA (0x03)
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#define USI_SLAVE_REQUEST_DATA (0x04)
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#define USI_SLAVE_GET_DATA_AND_SEND_ACK (0x05)
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//////////////////////////////////////////////////////////////////////////
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/*#if defined(__ATTINY2313__) | defined(__ATTINY2313A__) | \
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defined(__ATTINY4313__) | defined(__ATTINY4313A__) */
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// #define DDR_USI DDRB
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// #define PORT_USI PORTB
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// #define PIN_USI PINB
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// #define PORT_USI_SDA PORTB5
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// #define PORT_USI_SCL PORTB7
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// #define PIN_USI_SDA PINB5
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// #define PIN_USI_SCL PINB7
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// #define USI_START_COND_INT USISIF
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// #define USI_START_VECTOR USI_STRT_vect
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// #define USI_OVERFLOW_VECTOR USI_OVF_vect
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//#endif
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/*#if defined(__ATTINY25__) | defined(__ATTINY25V__) | \
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// defined(__ATTINY45__) | defined(__ATTINY45V__) | \
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// defined(__ATTINY85__) | defined(__ATTINY85V__) */
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// #define DDR_USI DDRB
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// #define PORT_USI PORTB
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// #define PIN_USI PINB
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// #define PORT_USI_SDA PORTB0
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// #define PORT_USI_SCL PORTB2
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// #define PIN_USI_SDA PINB0
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// #define PIN_USI_SCL PINB2
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// #define USI_START_COND_INT USICIF
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// #define USI_START_VECTOR USI_START_vect
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// #define USI_OVERFLOW_VECTOR USI_OVF_vect
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//#endif
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/*#if defined(__ATTINY24__) | defined(__ATTINY24A__) | \
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defined(__ATTINY44__) | defined(__ATTINY44A__) | \
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defined(__ATTINY84__) | defined(__ATTINY84V__) */
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// #define DDR_USI DDRA
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// #define PORT_USI PORTA
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// #define PIN_USI PINA
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// #define PORT_USI_SDA PORTA6
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// #define PORT_USI_SCL PORTA4
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// #define PIN_USI_SDA PINA6
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// #define PIN_USI_SCL PINA4
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// #define USI_START_COND_INT USISIF
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// #define USI_START_VECTOR USI_START_vect
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// #define USI_OVERFLOW_VECTOR USI_OVF_vect
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//#endif
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/*#if defined(__ATTINY261__) | defined(__ATTINY261A__) | \
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defined(__ATTINY461__) | defined(__ATTINY461A__) | \
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defined(__ATTINY861A__) | defined(__ATTINY861A__) */
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// #define DDR_USI DDRB
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// #define PORT_USI PORTB
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// #define PIN_USI PINB
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// #define PORT_USI_SDA PORTB0
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// #define PORT_USI_SCL PORTB2
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// #define PIN_USI_SDA PINB0
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// #define PIN_USI_SCL PINB2
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// #define USI_START_COND_INT USISIF
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// #define USI_START_VECTOR USI_START_vect
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// #define USI_OVERFLOW_VECTOR USI_OVF_vect
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//#endif
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//#if defined(__ATTINY43U__)
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// #define DDR_USI DDRB
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// #define PORT_USI PORTB
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// #define PIN_USI PINB
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// #define PORT_USI_SDA PORTB4
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// #define PORT_USI_SCL PORTB6
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// #define PIN_USI_SDA PINB4
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// #define PIN_USI_SCL PINB6
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// #define USI_START_COND_INT USISIF
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// #define USI_START_VECTOR USI_START_vect
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// #define USI_OVERFLOW_VECTOR USI_OVF_vect
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//#endif
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//#if defined(__ATTINY87__) | defined(__ATTINY167__)
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#define DDR_USI DDRB
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#define PORT_USI PORTB
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#define PIN_USI PINB
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#define PORT_USI_SDA PORTB0
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#define PORT_USI_SCL PORTB2
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#define PIN_USI_SDA PINB0
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#define PIN_USI_SCL PINB2
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#define USI_START_COND_INT USISIF
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#define USI_START_VECTOR USI_START_vect
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#define USI_OVERFLOW_VECTOR USI_OVF_vect
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//#endif
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#endif
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