277 lines
6.9 KiB
C++
277 lines
6.9 KiB
C++
/*
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* Authors (alphabetical order)
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* - Andre Bernet <bernet.andre@gmail.com>
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* - Andreas Weitl
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* - Bertrand Songis <bsongis@gmail.com>
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* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
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* - Cameron Weeks <th9xer@gmail.com>
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* - Erez Raviv
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* - Gabriel Birkus
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* - Jean-Pierre Parisy
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* - Karl Szmutny
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* - Michael Blandford
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* - Michal Hlavinka
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* - Pat Mackenzie
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* - Philip Moss
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* - Rob Thomson
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* - Romolo Manfredini <romolo.manfredini@gmail.com>
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* - Thomas Husterer
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*
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* opentx is based on code named
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* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
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* er9x by Erez Raviv: http://code.google.com/p/er9x/,
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* and the original (and ongoing) project by
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* Thomas Husterer, th9x: http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "../opentx.h"
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extern volatile uint32_t Spi_complete; // TODO in the driver ?
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uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count )
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{
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#ifndef SIMU
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register Spi *spiptr ;
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register uint32_t condition ;
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static uint8_t discard_rx_command[4] ;
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// PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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Spi_complete = 0 ;
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if ( comlen > 4 )
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{
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Spi_complete = 1 ;
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return 0x4FFFF ;
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}
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condition = SPI_SR_TXEMPTY ;
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spiptr = SPI ;
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spiptr->SPI_CR = 1 ; // Enable
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(void) spiptr->SPI_RDR ; // Dump any rx data
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(void) spiptr->SPI_SR ; // Clear error flags
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spiptr->SPI_RPR = (uint32_t)discard_rx_command ;
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spiptr->SPI_RCR = comlen ;
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if ( rx )
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{
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spiptr->SPI_RNPR = (uint32_t)rx ;
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spiptr->SPI_RNCR = count ;
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condition = SPI_SR_RXBUFF ;
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}
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spiptr->SPI_TPR = (uint32_t)command ;
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spiptr->SPI_TCR = comlen ;
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if ( tx )
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{
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spiptr->SPI_TNPR = (uint32_t)tx ;
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}
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else
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{
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spiptr->SPI_TNPR = (uint32_t)rx ;
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}
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spiptr->SPI_TNCR = count ;
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spiptr->SPI_PTCR = SPI_PTCR_RXTEN | SPI_PTCR_TXTEN ; // Start transfers
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// Wait for things to get started, avoids early interrupt
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for ( count = 0 ; count < 1000 ; count += 1 )
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{
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if ( ( spiptr->SPI_SR & SPI_SR_TXEMPTY ) == 0 )
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{
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break ;
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}
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}
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spiptr->SPI_IER = condition ;
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#endif
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return 0 ;
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}
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uint32_t spi_operation( register uint8_t *tx, register uint8_t *rx, register uint32_t count )
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{
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register Spi *spiptr;
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register uint32_t result;
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result = 0;
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spiptr = SPI;
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spiptr->SPI_CR = 1; // Enable
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(void) spiptr->SPI_RDR; // Dump any rx data
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while (count) {
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_TXEMPTY) == 0) {
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// wait
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if (++result > 10000) {
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result = 0xFFFF;
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break;
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}
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}
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if (result > 10000) {
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break;
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}
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spiptr->SPI_TDR = *tx++;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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result = 0x2FFFF;
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break;
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}
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}
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if (result > 10000) {
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break;
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}
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*rx++ = spiptr->SPI_RDR;
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count -= 1;
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}
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if (result <= 10000) {
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result = 0;
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}
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spiptr->SPI_CR = 2; // Disable
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return result ;
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}
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uint32_t eeprom_write_one(uint8_t byte, uint8_t count)
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{
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#ifndef SIMU
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register Spi *spiptr;
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register uint32_t result;
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spiptr = SPI;
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spiptr->SPI_CR = 1; // Enable
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(void) spiptr->SPI_RDR; // Dump any rx data
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spiptr->SPI_TDR = byte;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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break;
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}
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}
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if (count == 0) {
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spiptr->SPI_CR = 2; // Disable
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return spiptr->SPI_RDR;
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}
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(void) spiptr->SPI_RDR; // Dump the rx data
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spiptr->SPI_TDR = 0;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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break;
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}
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}
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spiptr->SPI_CR = 2; // Disable
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return spiptr->SPI_RDR ;
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#else
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return !Spi_complete;
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#endif
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}
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void eeprom_write_enable()
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{
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eeprom_write_one(6, 0);
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}
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uint32_t eeprom_read_status()
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{
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return eeprom_write_one(5, 1);
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}
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// SPI i/f to EEPROM (4Mb)
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// Peripheral ID 21 (0x00200000)
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// Connections:
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// SS PA11 (peripheral A)
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// MISO PA12 (peripheral A)
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// MOSI PA13 (peripheral A)
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// SCK PA14 (peripheral A)
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// Set clock to 3 MHz, AT25 device is rated to 70MHz, 18MHz would be better
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void eepromInit()
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{
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register Spi *spiptr ;
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register uint32_t timer ;
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register uint8_t *p ;
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uint8_t spi_buf[4] ;
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PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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/* Configure PIO */
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configure_pins( 0x00007800, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP ) ;
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spiptr = SPI ;
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timer = ( Master_frequency / 3000000 ) << 8 ; // Baud rate 3Mb/s
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spiptr->SPI_MR = 0x14000011 ; // 0001 0100 0000 0000 0000 0000 0001 0001 Master
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spiptr->SPI_CSR[0] = 0x01180009 | timer ; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
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NVIC_EnableIRQ(SPI_IRQn) ;
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p = spi_buf ;
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// *p = 0x39 ; // Unprotect sector command
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// *(p+1) = 0 ;
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// *(p+2) = 0 ;
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// *(p+3) = 0 ; // 3 bytes address
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// spi_operation( p, spi_buf, 4 ) ;
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eeprom_write_enable() ;
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*p = 1 ; // Write status register command
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*(p+1) = 0 ;
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spi_operation( p, spi_buf, 2 ) ;
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}
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#ifndef SIMU
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extern "C" void SPI_IRQHandler()
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{
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register Spi *spiptr ;
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spiptr = SPI ;
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SPI->SPI_IDR = 0x07FF ; // All interrupts off
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spiptr->SPI_CR = 2 ; // Disable
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(void) spiptr->SPI_RDR ; // Dump any rx data
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(void) spiptr->SPI_SR ; // Clear error flags
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spiptr->SPI_PTCR = SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS ; // Stop tramsfers
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Spi_complete = 1 ; // Indicate completion
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// Power save
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// PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI
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}
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#endif
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void end_spi()
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{
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SPI->SPI_CR = 2 ; // Disable
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SPI->SPI_IDR = 0x07FF ; // All interrupts off
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NVIC_DisableIRQ(SPI_IRQn) ;
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}
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#if 0
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uint32_t unprotect_eeprom()
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{
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register uint8_t *p;
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eeprom_write_enable();
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p = Spi_tx_buf;
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*p = 0x39; // Unprotect sector command
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*(p + 1) = 0;
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*(p + 2) = 0;
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*(p + 3) = 0; // 3 bytes address
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return spi_operation( p, Spi_rx_buf, 4 ) ;
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}
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#endif
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