159 lines
4.1 KiB
C
159 lines
4.1 KiB
C
/*
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* Copyright (C) EdgeTx
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#pragma once
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#include <stdint.h>
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#include "serial_driver.h"
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#include "timer_driver.h"
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#include "definitions.h"
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//
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// Module ports
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//
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// flags
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#define ETX_MOD_DIR_TX (1 << 0)
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#define ETX_MOD_DIR_RX (1 << 1)
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#define ETX_MOD_DIR_TX_RX (ETX_MOD_DIR_TX | ETX_MOD_DIR_RX)
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#define ETX_MOD_FULL_DUPLEX (1 << 2)
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#define ETX_MOD_TYPE_NONE 0
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#define ETX_MOD_TYPE_TIMER (1 << 0)
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#define ETX_MOD_TYPE_SERIAL (1 << 1)
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enum ModulePort : uint8_t {
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ETX_MOD_PORT_UART,
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ETX_MOD_PORT_TIMER,
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ETX_MOD_PORT_SOFT_INV,
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ETX_MOD_PORT_SPORT,
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ETX_MOD_PORT_SPORT_INV,
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ETX_MOD_PORT_MAX
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};
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//
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// A module port is a pin (single UART RX or TX; PPM pin)
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// or pin pair (UART RX/TX)
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//
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typedef struct {
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// enum ModulePort
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uint8_t port;
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// ETX_MOD_TYPE_xx
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uint8_t type;
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// flags bitfield ETX_MOD_DIR_xx
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uint8_t dir_flags;
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union {
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const etx_timer_driver_t *timer;
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const etx_serial_driver_t *serial;
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} drv;
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// this is specific to the driver above
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void* hw_def;
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// inverter support: only works on the following ports
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// - ETX_MOD_PORT_UART / ETX_MOD_PORT_SPORT
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void (*set_inverted)(uint8_t enable);
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} etx_module_port_t;
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typedef struct {
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const etx_module_port_t* const ports;
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void (*set_pwr)(uint8_t on);
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void (*set_bootcmd)(uint8_t on);
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const uint8_t n_ports;
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} etx_module_t;
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#define BEGIN_MODULES() \
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extern const etx_module_t* const _modules[]; \
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const etx_module_t* const _modules[] = {
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#define END_MODULES() }; \
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extern const uint8_t _n_modules; \
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const uint8_t _n_modules = DIM(_modules);
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typedef struct {
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const etx_module_port_t* port;
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void* ctx;
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} etx_module_driver_t;
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typedef struct {
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etx_module_driver_t tx;
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etx_module_driver_t rx;
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void* user_data;
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} etx_module_state_t;
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// Init the internal module port data
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void modulePortInit();
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#if defined(CONFIGURABLE_MODULE_PORT)
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// Configure an extra port
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void modulePortConfigExtra(const etx_module_port_t* port);
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#endif
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const etx_module_t* modulePortGetModuleDescription(uint8_t module);
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const etx_module_port_t* modulePortFind(uint8_t module, uint8_t type,
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uint8_t port, uint8_t polarity);
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void modulePortSetPower(uint8_t module, uint8_t enabled);
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bool modulePortPowered(uint8_t module);
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// Init module port with params (driver & context stored locally)
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etx_module_state_t* modulePortInitSerial(uint8_t module, uint8_t port,
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const etx_serial_init* params);
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// Init module port with params (driver & context stored locally)
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etx_module_state_t* modulePortInitTimer(uint8_t module, uint8_t port,
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const etx_timer_config_t* cfg);
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// De-init port and clear data
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void modulePortDeInit(etx_module_state_t* st);
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// Once initialized, retrieve module serial driver and context
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etx_module_state_t* modulePortGetState(uint8_t module);
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uint8_t modulePortGetModule(etx_module_state_t* st);
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inline uint8_t modulePortGetType(const etx_module_driver_t& d) {
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return d.port->type;
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}
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inline const etx_serial_driver_t* modulePortGetSerialDrv(const etx_module_driver_t& d) {
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return d.port->drv.serial;
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}
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inline const etx_timer_driver_t* modulePortGetTimerDrv(const etx_module_driver_t& d) {
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return d.port->drv.timer;
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}
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inline void* modulePortGetCtx(const etx_module_driver_t& d) {
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return d.ctx;
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}
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