446 lines
10 KiB
C++
446 lines
10 KiB
C++
/*
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* Authors (alphabetical order)
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* - Bertrand Songis <bsongis@gmail.com>
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* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
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*
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* gruvin9x is based on code named er9x by
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* Author - Erez Raviv <erezraviv@gmail.com>, which is in turn
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* was based on the original (and ongoing) project by Thomas Husterer,
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* th9x -- http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "gruvin9x.h"
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#ifndef SIMU
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#ifdef ASYNC_WRITE
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uint16_t eeprom_pointer;
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const char* eeprom_buffer_data;
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volatile size_t eeprom_buffer_size = 0;
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inline void eeprom_write_byte()
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{
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EEAR = eeprom_pointer;
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EEDR = *eeprom_buffer_data;
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#if defined (PCBV3)
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EECR |= 1<<EEMPE;
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EECR |= 1<<EEPE;
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#else
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EECR |= 1<<EEMWE;
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EECR |= 1<<EEWE;
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#endif
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eeprom_pointer++;
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eeprom_buffer_data++;
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}
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ISR(EE_READY_vect)
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{
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if (--eeprom_buffer_size > 0) {
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eeprom_write_byte();
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}
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else {
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#if defined (PCBV3)
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EECR &= ~(1<<EERIE);
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#else
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EECR &= ~(1<<EERIE);
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#endif
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}
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}
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void eeWriteBlockCmp(const void *i_pointer_ram, void *i_pointer_eeprom, size_t size)
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{
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assert(!eeprom_buffer_size);
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eeprom_pointer = (uint16_t)i_pointer_eeprom;
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eeprom_buffer_data = (const char*)i_pointer_ram;
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eeprom_buffer_size = size;
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#if defined (PCBV3)
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EECR |= (1<<EERIE);
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#else
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EECR |= (1<<EERIE);
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#endif
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while (s_sync_write && eeprom_buffer_size > 0);
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}
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#else
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///opt/cross/avr/include/avr/eeprom.h
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static inline void __attribute__ ((always_inline))
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eeprom_write_byte_cmp (uint8_t dat, uint16_t pointer_eeprom)
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{
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//see /home/thus/work/avr/avrsdk4/avr-libc-1.4.4/libc/misc/eeprom.S:98 143
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#if defined (PCBV3)
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while(EECR & (1<<EEPE))
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#else
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while(EECR & (1<<EEWE))
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#endif
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;
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EEAR = pointer_eeprom;
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EECR |= 1<<EERE;
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if(dat == EEDR) return;
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EEDR = dat;
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uint8_t flags=SREG;
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cli();
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#if defined (PCBV3)
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EECR |= 1<<EEMPE;
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EECR |= 1<<EEPE;
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#else
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EECR |= 1<<EEMWE;
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EECR |= 1<<EEWE;
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#endif
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SREG = flags;
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sei();
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}
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void eeWriteBlockCmp(const void *i_pointer_ram, void *i_pointer_eeprom, size_t size)
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{
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const char* pointer_ram = (const char*)i_pointer_ram;
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uint16_t pointer_eeprom = (uint16_t)i_pointer_eeprom;
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while(size){
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eeprom_write_byte_cmp(*pointer_ram++,pointer_eeprom++);
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size--;
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}
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}
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#endif
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#endif
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static uint8_t s_evt;
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void putEvent(uint8_t evt)
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{
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s_evt = evt;
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}
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uint8_t getEvent()
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{
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uint8_t evt = s_evt;
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s_evt=0;
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return evt;
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}
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class Key
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{
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#define FILTERBITS 4
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#ifdef SIMU
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#define FFVAL 1
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#else
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#define FFVAL ((1<<FILTERBITS)-1)
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#endif
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#define KSTATE_OFF 0
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#define KSTATE_RPTDELAY 95 // gruvin: delay state before key repeating starts
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//#define KSTATE_SHORT 96
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#define KSTATE_START 97
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#define KSTATE_PAUSE 98
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#define KSTATE_KILLED 99
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uint8_t m_vals:FILTERBITS; // key debounce? 4 = 40ms
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uint8_t m_dblcnt:2;
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uint8_t m_cnt;
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uint8_t m_state;
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public:
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void input(bool val, EnumKeys enuk);
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bool state() { return m_vals==FFVAL; }
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void pauseEvents() { m_state = KSTATE_PAUSE; m_cnt = 0;}
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void killEvents() { m_state = KSTATE_KILLED; m_dblcnt=0; }
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uint8_t getDbl() { return m_dblcnt; }
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};
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Key keys[NUM_KEYS];
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void Key::input(bool val, EnumKeys enuk)
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{
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// uint8_t old=m_vals;
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m_vals <<= 1; if(val) m_vals |= 1; //portbit einschieben
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m_cnt++;
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if(m_state && m_vals==0){ //gerade eben sprung auf 0
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if(m_state!=KSTATE_KILLED) {
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putEvent(EVT_KEY_BREAK(enuk));
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if(!( m_state == 16 && m_cnt<16)){
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m_dblcnt=0;
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}
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// }
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}
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m_cnt = 0;
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m_state = KSTATE_OFF;
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}
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switch(m_state){
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case KSTATE_OFF:
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if(m_vals==FFVAL){ //gerade eben sprung auf ff
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m_state = KSTATE_START;
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if(m_cnt>16) m_dblcnt=0; //pause zu lang fuer double
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m_cnt = 0;
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}
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break;
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//fallthrough
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case KSTATE_START:
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putEvent(EVT_KEY_FIRST(enuk));
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m_dblcnt++;
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m_state = KSTATE_RPTDELAY;
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m_cnt = 0;
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break;
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case KSTATE_RPTDELAY: // gruvin: delay state before first key repeat
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if(m_cnt == 24) putEvent(EVT_KEY_LONG(enuk));
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if (m_cnt == 40) {
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m_state = 16;
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m_cnt = 0;
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}
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break;
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case 16:
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case 8:
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case 4:
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case 2:
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if(m_cnt >= 48) { //3 6 12 24 48 pulses in every 480ms
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m_state >>= 1;
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m_cnt = 0;
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}
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//fallthrough
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case 1:
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if( (m_cnt & (m_state-1)) == 0) putEvent(EVT_KEY_REPT(enuk));
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break;
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case KSTATE_PAUSE: //pause
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if(m_cnt >= 64) {
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m_state = 8;
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m_cnt = 0;
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}
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break;
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case KSTATE_KILLED: //killed
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break;
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}
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}
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bool keyState(EnumKeys enuk)
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{
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if(enuk < (int)DIM(keys)) return keys[enuk].state() ? 1 : 0;
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switch(enuk){
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case SW_ElevDR : return PINE & (1<<INP_E_ElevDR);
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#if defined(JETI) || defined(FRSKY)
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case SW_AileDR : return PINC & (1<<INP_C_AileDR); //shad974: rerouted inputs to free up UART0
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#else
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case SW_AileDR : return PINE & (1<<INP_E_AileDR);
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#endif
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case SW_RuddDR : return PING & (1<<INP_G_RuddDR);
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// INP_G_ID1 INP_E_ID2
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// id0 0 1
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// id1 1 1
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// id2 1 0
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case SW_ID0 : return !(PING & (1<<INP_G_ID1));
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case SW_ID1 : return (PING & (1<<INP_G_ID1))&& (PINE & (1<<INP_E_ID2));
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case SW_ID2 : return !(PINE & (1<<INP_E_ID2));
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case SW_Gear : return PINE & (1<<INP_E_Gear);
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//case SW_ThrCt : return PINE & (1<<INP_E_ThrCt);
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#if defined(JETI) || defined(FRSKY)
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case SW_ThrCt : return PINC & (1<<INP_C_ThrCt); //shad974: rerouted inputs to free up UART0
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#else
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case SW_ThrCt : return PINE & (1<<INP_E_ThrCt);
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#endif
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case SW_Trainer: return PINE & (1<<INP_E_Trainer);
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default:;
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}
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return 0;
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}
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void pauseEvents(uint8_t event)
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{
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event=event & EVT_KEY_MASK;
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if(event < (int)DIM(keys)) keys[event].pauseEvents();
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}
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void killEvents(uint8_t event)
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{
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event=event & EVT_KEY_MASK;
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if(event < (int)DIM(keys)) keys[event].killEvents();
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}
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uint8_t getEventDbl(uint8_t event)
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{
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event=event & EVT_KEY_MASK;
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if(event < (int)DIM(keys)) return keys[event].getDbl();
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return 0;
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}
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//uint16_t g_anaIns[8];
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volatile uint16_t g_tmr10ms;
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volatile uint8_t g_blinkTmr10ms;
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#if defined (PCBV3)
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uint8_t g_ms100 = 0; // global to allow time set function to reset to zero
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#endif
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void per10ms()
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{
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g_tmr10ms++;
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g_blinkTmr10ms++;
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#if defined (PCBV3)
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/* Update gloabal Date/Time every 100 per10ms cycles */
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if (++g_ms100 == 100)
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{
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g_unixTime++; // inc global unix timestamp one second
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g_ms100 = 0;
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}
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#endif
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/**** BEGIN KEY STATE READ ****/
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uint8_t enuk = KEY_MENU;
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#if defined (PCBV3)
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/* Original keys were connected to PORTB as follows:
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Bit Key
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7 other use
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6 LEFT
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5 RIGHT
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4 UP
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3 DOWN
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2 EXIT
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1 MENU
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0 other use
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*/
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#define KEY_Y0 1 // EXIT / MENU
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#define KEY_Y1 2 // LEFT / RIGHT / UP / DOWN
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#define KEY_Y2 4 // LV_Trim_Up / Down / LH_Trim_Up / Down
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#define KEY_Y3 8 // RV_Trim_Up / Down / RH_Trim_Up / Down
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#define TRIM_M_LH_DWN 0 // KEY_X0
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#define TRIM_M_LH_UP 1 // KEY_X1
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#define TRIM_M_LV_DWN 2 // KEY_X2
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#define TRIM_M_LV_UP 3 // KEY_X3
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#define TRIM_M_RV_DWN 4 // KEY_X0
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#define TRIM_M_RV_UP 5 // KEY_X1
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#define TRIM_M_RH_DWN 6 // KEY_X2
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#define TRIM_M_RH_UP 7 // KEY_3X
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uint8_t in, tin;
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in = keyDown(); // in gruvin9x.cpp
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#else
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uint8_t in = ~PINB;
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#endif
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for(int i=1; i<7; i++)
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{
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//INP_B_KEY_MEN 1 .. INP_B_KEY_LFT 6
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keys[enuk].input(in & (1<<i),(EnumKeys)enuk);
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++enuk;
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}
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#if defined (PCBV3)
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static prog_uchar APM crossTrim[]={
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1<<TRIM_M_RV_DWN,
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1<<TRIM_M_RV_UP,
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1<<TRIM_M_RH_DWN,
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1<<TRIM_M_RH_UP,
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1<<TRIM_M_LH_DWN,
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1<<TRIM_M_LH_UP,
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1<<TRIM_M_LV_DWN,
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1<<TRIM_M_LV_UP
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};
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#else
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static prog_uchar APM crossTrim[]={
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1<<INP_D_TRM_LH_DWN, // bit 7
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1<<INP_D_TRM_LH_UP,
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1<<INP_D_TRM_LV_DWN,
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1<<INP_D_TRM_LV_UP,
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1<<INP_D_TRM_RV_DWN,
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1<<INP_D_TRM_RV_UP,
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1<<INP_D_TRM_RH_DWN,
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1<<INP_D_TRM_RH_UP // bit 0
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};
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#endif
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#if defined (PCBV3)
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PORTD = ~KEY_Y2; // select Y2 row. (Bits 3:0 LVD / LVU / LHU / LHD)
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_delay_us(1);
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in = ~PIND & 0xf0; // mask out outputs
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PORTD = ~KEY_Y3; // select Y3 row. (Bits 3:0 RHU / RHD / RVD / RVU)
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_delay_us(1);
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in |= ((~PIND & 0xf0) >> 4);
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PORTD = 0xFF;
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#else
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in = ~PIND;
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// Legacy support for USART1 free hardware mod [DEPRECATED]
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#if defined(USART1FREED)
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// mask out original INP_D_TRM_LV_UP and INP_D_TRM_LV_DWN bits
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in &= ~((1<<INP_D_TRM_LV_UP) | (1<<INP_D_TRM_LV_DWN));
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// merge in the two new switch port values
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in |= (~PINC & (1<<INP_C_TRM_LV_UP)) ? (1<<INP_D_TRM_LV_UP) : 0;
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in |= (~PING & (1<<INP_G_TRM_LV_DWN)) ? (1<<INP_D_TRM_LV_DWN) : 0;
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#endif
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#endif
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for(int i=0; i<8; i++)
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{
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// INP_D_TRM_RH_UP 0 .. INP_D_TRM_LH_UP 7
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keys[enuk].input(in & pgm_read_byte(crossTrim+i),(EnumKeys)enuk);
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++enuk;
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}
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/**** END KEY STATE READ ****/
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#if defined (FRSKY)
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// Used to detect presence of valid FrSky telemetry packets inside the
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// last <FRSKY_TIMEOUT10ms> 10ms intervals
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if ( FrskyAlarmSendState )
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FRSKY10mspoll() ;
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if (frskyStreaming > 0)
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frskyStreaming--;
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else if (g_eeGeneral.enableTelemetryAlarm && (g_model.frsky.channels[0].ratio || g_model.frsky.channels[1].ratio)) {
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#if defined (BEEPSPKR)
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if (!(g_tmr10ms % 30)) beepWarn2Spkr((g_tmr10ms % 60) ? 25 : 20);
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#else
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if (!(g_tmr10ms % 30))
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{
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warble = !(g_tmr10ms % 60);
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beepWarn2();
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}
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#endif
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}
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#endif
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// These moved here from perOut() [gruvin9x.cpp] to improve beep trigger reliability.
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#if defined (BEEPSPKR)
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if(mixWarning & 1) if(((g_tmr10ms&0xFF)== 0)) beepWarn1Spkr(BEEP_DEFAULT_FREQ+7);
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if(mixWarning & 2) if(((g_tmr10ms&0xFF)== 64)
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|| ((g_tmr10ms&0xFF)== 72)) beepWarn1Spkr(BEEP_DEFAULT_FREQ+9);
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if(mixWarning & 4) if(((g_tmr10ms&0xFF)==128) || ((g_tmr10ms&0xFF)==136)
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|| ((g_tmr10ms&0xFF)==144)) beepWarn1Spkr(BEEP_DEFAULT_FREQ+11);
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#else
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if(mixWarning & 1) if(((g_tmr10ms&0xFF)== 0)) beepWarn1();
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if(mixWarning & 2) if(((g_tmr10ms&0xFF)== 64) || ((g_tmr10ms&0xFF)== 72)) beepWarn1();
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if(mixWarning & 4) if(((g_tmr10ms&0xFF)==128) || ((g_tmr10ms&0xFF)==136) || ((g_tmr10ms&0xFF)==144)) beepWarn1();
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#endif
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}
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