399 lines
16 KiB
C++
399 lines
16 KiB
C++
/*
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* Copyright (C) OpenTX
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*
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* Based on code named
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "opentx.h"
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void extmoduleStop()
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{
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EXTERNAL_MODULE_OFF();
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NVIC_DisableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_DisableIRQ(EXTMODULE_TIMER_CC_IRQn);
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EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
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EXTMODULE_TIMER->DIER &= ~(TIM_DIER_CC2IE | TIM_DIER_UDE);
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EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(EXTMODULE_TX_GPIO, &GPIO_InitStructure);
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}
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void extmodulePpmStart()
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{
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EXTERNAL_MODULE_ON();
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GPIO_PinAFConfig(EXTMODULE_TX_GPIO, EXTMODULE_TX_GPIO_PinSource, EXTMODULE_TIMER_TX_GPIO_AF);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(EXTMODULE_TX_GPIO, &GPIO_InitStructure);
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// PPM generation principle:
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//
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// Hardware timer in PWM mode is used for PPM generation
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// Output is OFF if CNT<CCR1(delay) and ON if bigger
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// CCR1 register defines duration of pulse length and is constant
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// AAR register defines duration of each pulse, it is
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// updated after every pulse in Update interrupt handler.
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// CCR2 register defines duration of no pulses (time between two pulse trains)
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// it is calculated every round to have PPM period constant.
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// CC2 interrupt is then used to setup new PPM values for the
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// next PPM pulses train.
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EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop timer
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EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
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EXTMODULE_TIMER->ARR = 45000;
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER->CCR3 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
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EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC3P : 0);
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EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2; // PWM mode 1
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EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE;
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EXTMODULE_TIMER->EGR = 1; // Reloads register values now
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#else
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EXTMODULE_TIMER->CCR1 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
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EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC1P : 0);
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0; // Force O/P high
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EXTMODULE_TIMER->EGR = 1; // Reloads register values now
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1
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#endif
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EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE; // Enable this interrupt
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EXTMODULE_TIMER->CR1 = TIM_CR1_CEN; // Start timer
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_DMA_STREAM_IRQn, 7);
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NVIC_EnableIRQ(EXTMODULE_TIMER_CC_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_CC_IRQn, 7);
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}
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#if defined(PXX1)
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void extmodulePxx1PulsesStart()
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{
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EXTERNAL_MODULE_ON();
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GPIO_PinAFConfig(EXTMODULE_TX_GPIO, EXTMODULE_TX_GPIO_PinSource, EXTMODULE_TIMER_TX_GPIO_AF);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(EXTMODULE_TX_GPIO, &GPIO_InitStructure);
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EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
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EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
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EXTMODULE_TIMER->ARR = 18000;
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | TIM_CCER_CC3NE;
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EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
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EXTMODULE_TIMER->CCR3 = 18;
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EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_0; // Force O/P high
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2;
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#else
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EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P | TIM_CCER_CC1NE | TIM_CCER_CC1NP; // TIM_CCER_CC1E | TIM_CCER_CC1P;
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EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
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EXTMODULE_TIMER->CCR1 = 18;
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0; // Force O/P high
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
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#endif
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EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE; // Enable DMA on update
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_DMA_STREAM_IRQn, 7);
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NVIC_EnableIRQ(EXTMODULE_TIMER_CC_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_CC_IRQn, 7);
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}
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#endif
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void extmoduleSerialStart(uint32_t /*baudrate*/, uint32_t period_half_us, bool inverted)
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{
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EXTERNAL_MODULE_ON();
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GPIO_PinAFConfig(EXTMODULE_TX_GPIO, EXTMODULE_TX_GPIO_PinSource, EXTMODULE_TIMER_TX_GPIO_AF);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(EXTMODULE_TX_GPIO, &GPIO_InitStructure);
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EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
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EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
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EXTMODULE_TIMER->ARR = period_half_us;
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | TIM_CCER_CC3P;
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EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
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EXTMODULE_TIMER->CCR3 = 0;
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EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_0; // Force O/P high
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0;
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#else
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EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P;
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EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
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EXTMODULE_TIMER->CCR1 = 0;
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0; // Force O/P high
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EXTMODULE_TIMER->EGR = 1; // Restart
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EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0;
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#endif
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EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE;
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EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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NVIC_EnableIRQ(EXTMODULE_TIMER_DMA_STREAM_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_DMA_STREAM_IRQn, 7);
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NVIC_EnableIRQ(EXTMODULE_TIMER_CC_IRQn);
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NVIC_SetPriority(EXTMODULE_TIMER_CC_IRQn, 7);
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}
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#if defined(EXTMODULE_USART)
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ModuleFifo extmoduleFifo;
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void extmoduleInvertedSerialStart(uint32_t baudrate)
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{
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EXTERNAL_MODULE_ON();
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// TX + RX Pins
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GPIO_PinAFConfig(EXTMODULE_USART_GPIO, EXTMODULE_TX_GPIO_PinSource, EXTMODULE_USART_GPIO_AF);
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GPIO_PinAFConfig(EXTMODULE_USART_GPIO, EXTMODULE_RX_GPIO_PinSource, EXTMODULE_USART_GPIO_AF);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(EXTMODULE_USART_GPIO, &GPIO_InitStructure);
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// UART config
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USART_DeInit(EXTMODULE_USART);
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USART_InitTypeDef USART_InitStructure;
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USART_InitStructure.USART_BaudRate = baudrate;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
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USART_Init(EXTMODULE_USART, &USART_InitStructure);
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USART_Cmd(EXTMODULE_USART, ENABLE);
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extmoduleFifo.clear();
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USART_ITConfig(EXTMODULE_USART, USART_IT_RXNE, ENABLE);
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NVIC_SetPriority(EXTMODULE_USART_IRQn, 6);
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NVIC_EnableIRQ(EXTMODULE_USART_IRQn);
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}
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void extmoduleSendBuffer(const uint8_t * data, uint8_t size)
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{
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DMA_InitTypeDef DMA_InitStructure;
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DMA_DeInit(EXTMODULE_USART_TX_DMA_STREAM);
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DMA_InitStructure.DMA_Channel = EXTMODULE_USART_TX_DMA_CHANNEL;
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DMA_InitStructure.DMA_PeripheralBaseAddr = CONVERT_PTR_UINT(&EXTMODULE_USART->DR);
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_Memory0BaseAddr = CONVERT_PTR_UINT(data);
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(EXTMODULE_USART_TX_DMA_STREAM, &DMA_InitStructure);
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DMA_Cmd(EXTMODULE_USART_TX_DMA_STREAM, ENABLE);
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USART_DMACmd(EXTMODULE_USART, USART_DMAReq_Tx, ENABLE);
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}
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#define USART_FLAG_ERRORS (USART_FLAG_ORE | USART_FLAG_NE | USART_FLAG_FE | USART_FLAG_PE)
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extern "C" void EXTMODULE_USART_IRQHandler(void)
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{
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uint32_t status = EXTMODULE_USART->SR;
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while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) {
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uint8_t data = EXTMODULE_USART->DR;
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if (status & USART_FLAG_ERRORS) {
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extmoduleFifo.errors++;
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}
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else {
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extmoduleFifo.push(data);
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}
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status = EXTMODULE_USART->SR;
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}
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}
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#endif
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void extmoduleSendNextFrame()
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{
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switch (moduleState[EXTERNAL_MODULE].protocol) {
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case PROTOCOL_CHANNELS_PPM:
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER->CCR3 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
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EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC3P : 0);
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EXTMODULE_TIMER->CCR2 = *(extmodulePulsesData.ppm.ptr - 1) - 4000; // 2mS in advance
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EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
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EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
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#else
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EXTMODULE_TIMER->CCR1 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
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EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC1P : 0);
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EXTMODULE_TIMER->CCR2 = *(extmodulePulsesData.ppm.ptr - 1) - 4000; // 2mS in advance
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EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
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EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
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#endif
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EXTMODULE_TIMER_DMA_STREAM->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->ARR);
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EXTMODULE_TIMER_DMA_STREAM->M0AR = CONVERT_PTR_UINT(extmodulePulsesData.ppm.pulses);
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EXTMODULE_TIMER_DMA_STREAM->NDTR = extmodulePulsesData.ppm.ptr - extmodulePulsesData.ppm.pulses;
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EXTMODULE_TIMER_DMA_STREAM->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA
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break;
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#if defined(PXX1)
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case PROTOCOL_CHANNELS_PXX1_PULSES:
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EXTMODULE_TIMER->CCR2 = extmodulePulsesData.pxx.getLast() - 4000; // 2mS in advance
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EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
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#else
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EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
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#endif
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EXTMODULE_TIMER_DMA_STREAM->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->ARR);
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EXTMODULE_TIMER_DMA_STREAM->M0AR = CONVERT_PTR_UINT(extmodulePulsesData.pxx.getData());
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EXTMODULE_TIMER_DMA_STREAM->NDTR = extmodulePulsesData.pxx.getSize();
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EXTMODULE_TIMER_DMA_STREAM->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA
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break;
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#endif
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#if defined(PXX1) && defined(EXTMODULE_USART)
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case PROTOCOL_CHANNELS_PXX1_SERIAL:
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extmoduleSendBuffer(extmodulePulsesData.pxx_uart.getData(), extmodulePulsesData.pxx_uart.getSize());
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break;
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#endif
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#if defined(PXX2)
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case PROTOCOL_CHANNELS_PXX2_HIGHSPEED:
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case PROTOCOL_CHANNELS_PXX2_LOWSPEED:
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extmoduleSendBuffer(extmodulePulsesData.pxx2.getData(), extmodulePulsesData.pxx2.getSize());
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break;
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#endif
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#if defined(DSM2)
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case PROTOCOL_CHANNELS_SBUS:
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | (GET_SBUS_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC3P : 0); // reverse polarity for Sbus if needed
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#else
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EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | (GET_SBUS_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC1P : 0); // reverse polarity for Sbus if needed
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#endif
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// no break
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case PROTOCOL_CHANNELS_DSM2_LP45:
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case PROTOCOL_CHANNELS_DSM2_DSM2:
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case PROTOCOL_CHANNELS_DSM2_DSMX:
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case PROTOCOL_CHANNELS_MULTIMODULE:
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EXTMODULE_TIMER->CCR2 = *(extmodulePulsesData.dsm2.ptr - 1) - 4000; // 2mS in advance
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EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
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#if defined(PCBX10) || PCBREV >= 13
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EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
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#else
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EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
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#endif
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EXTMODULE_TIMER_DMA_STREAM->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->ARR);
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EXTMODULE_TIMER_DMA_STREAM->M0AR = CONVERT_PTR_UINT(extmodulePulsesData.dsm2.pulses);
|
|
EXTMODULE_TIMER_DMA_STREAM->NDTR = extmodulePulsesData.dsm2.ptr - extmodulePulsesData.dsm2.pulses;
|
|
EXTMODULE_TIMER_DMA_STREAM->CR |= DMA_SxCR_EN | DMA_SxCR_TCIE; // Enable DMA
|
|
break;
|
|
#endif
|
|
|
|
#if defined(CROSSFIRE)
|
|
case PROTOCOL_CHANNELS_CROSSFIRE:
|
|
sportSendBuffer(extmodulePulsesData.crossfire.pulses, extmodulePulsesData.crossfire.length);
|
|
break;
|
|
#endif
|
|
|
|
default:
|
|
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE;
|
|
break;
|
|
}
|
|
}
|
|
|
|
extern "C" void EXTMODULE_TIMER1_DMA_IRQHandler()
|
|
{
|
|
if (!DMA_GetITStatus(EXTMODULE_TIMER1_DMA_STREAM, EXTMODULE_TIMER1_DMA_FLAG_TC))
|
|
return;
|
|
|
|
DMA_ClearITPendingBit(EXTMODULE_TIMER1_DMA_STREAM, EXTMODULE_TIMER1_DMA_FLAG_TC);
|
|
|
|
EXTMODULE_TIMER1->SR &= ~TIM_SR_CC2IF; // Clear flag
|
|
EXTMODULE_TIMER1->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
|
|
}
|
|
|
|
extern "C" void EXTMODULE_TIMER1_IRQHandler()
|
|
{
|
|
EXTMODULE_TIMER1->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
|
|
EXTMODULE_TIMER1->SR &= ~TIM_SR_CC2IF;
|
|
if (setupPulsesExternalModule())
|
|
extmoduleSendNextFrame();
|
|
}
|
|
|
|
#if defined(EXTMODULE_TIMER2)
|
|
extern "C" void EXTMODULE_TIMER2_DMA_IRQHandler()
|
|
{
|
|
if (!DMA_GetITStatus(EXTMODULE_TIMER2_DMA_STREAM, EXTMODULE_TIMER2_DMA_FLAG_TC))
|
|
return;
|
|
|
|
DMA_ClearITPendingBit(EXTMODULE_TIMER2_DMA_STREAM, EXTMODULE_TIMER2_DMA_FLAG_TC);
|
|
|
|
EXTMODULE_TIMER2->SR &= ~TIM_SR_CC2IF; // Clear flag
|
|
EXTMODULE_TIMER2->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
|
|
}
|
|
|
|
extern "C" void EXTMODULE_TIMER2_IRQHandler()
|
|
{
|
|
EXTMODULE_TIMER2->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
|
|
EXTMODULE_TIMER2->SR &= ~TIM_SR_CC2IF;
|
|
if (setupPulsesExternalModule())
|
|
extmoduleSendNextFrame();
|
|
}
|
|
#endif
|