PXX pulses fix improved (thanks to Mike for the idea!)
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@@ -364,29 +364,29 @@ static void disable_pa10_ppm()
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#if !defined(SIMU)
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extern "C" void TIM1_CC_IRQHandler()
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{
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TIM1->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
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TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM1->DIER &= ~TIM_DIER_CC2IE; // stop this interrupt
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TIM1->SR &= ~TIM_SR_CC2IF; // clear flag
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DMA2_Stream6->CR &= ~DMA_SxCR_EN; // disable DMA, it will have the whole of the execution time of setupPulses() to actually stop
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setupPulses(INTERNAL_MODULE) ;
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setupPulses(INTERNAL_MODULE);
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if (s_current_protocol[INTERNAL_MODULE] == PROTO_PXX) {
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DMA2_Stream6->CR &= ~DMA_SxCR_EN ; // Disable DMA
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DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6 ; // Write ones to clear bits
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DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6;
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DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&modulePulsesData[INTERNAL_MODULE].pxx.pulses[1]);
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DMA2_Stream6->CR |= DMA_SxCR_EN ; // Enable DMA
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DMA2_Stream6->CR |= DMA_SxCR_EN; // enable DMA
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TIM1->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
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TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM1->DIER |= TIM_DIER_CC2IE; // enable this interrupt
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}
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#if defined(TARANIS_INTERNAL_PPM)
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else if (s_current_protocol[INTERNAL_MODULE] == PROTO_PPM) {
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modulePulsesData[INTERNAL_MODULE].ppm.ptr = modulePulsesData[INTERNAL_MODULE].ppm.pulses;
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TIM1->DIER |= TIM_DIER_UDE ;
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TIM1->SR &= ~TIM_SR_UIF ; // Clear this flag
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TIM1->DIER |= TIM_DIER_UIE ; // Enable this interrupt
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TIM1->DIER |= TIM_DIER_UDE;
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TIM1->SR &= ~TIM_SR_UIF;
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TIM1->DIER |= TIM_DIER_UIE;
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}
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#endif
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else {
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TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM1->DIER |= TIM_DIER_CC2IE;
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}
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}
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