[avr/dsm_ppm] Testing of a stock unit reveals that DSM2=PPM bit timing

adjustment is NOT required for the stock board. Thus, all the problems Cam and
I have witnessed appear to apply only to the ATmega2560 chip -- bringing the
total number of design bugs in said chip that we alone have now found to 3.

I do not have any ATmega128 based boards to runs tests there-on.

The only change here is to the code comment on the same topic.

src/pulses_avr.cpp

@@ -503,8 +503,7 @@ void sendByteDsm2(uint8_t b) //max 10changes 0 10 10 10 10 1
         }else{
 #if defined (PCBGRUVIN9X)
             // G: Compensate for main clock synchronisation -- to get accurate 8us bit length
-            // NOTE: This is probably required for the stock board (S/W bit-bang mode) also, 
-            //       but I did not want to commit that to trunk without testing it first.
+            // NOTE: This has now been tested as NOT required on the stock board, with the ATmega64A chip.
             if (nlev)
               _send_1(len-5);// -1);
             else