[Horus] Cosmetics
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@@ -1,23 +1,23 @@
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/*
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* Copyright (C) OpenTX
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*
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* Based on code named
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* Copyright (C) OpenTX
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*
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* Based on code named
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "../../opentx.h"
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const int8_t volumeScale[VOLUME_LEVEL_MAX+1] =
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@@ -33,23 +33,20 @@ void setSampleRate(uint32_t frequency)
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{
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register uint32_t timer = (PERI1_FREQUENCY * TIMER_MULT_APB1) / frequency - 1 ; // MCK/8 and 100 000 Hz
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TIM6->CR1 &= ~TIM_CR1_CEN ;
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TIM6->CNT = 0 ;
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TIM6->ARR = limit<uint32_t>(2, timer, 65535) ;
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TIM6->CR1 |= TIM_CR1_CEN ;
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AUDIO_TIMER->CR1 &= ~TIM_CR1_CEN ;
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AUDIO_TIMER->CNT = 0 ;
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AUDIO_TIMER->ARR = limit<uint32_t>(2, timer, 65535) ;
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AUDIO_TIMER->CR1 |= TIM_CR1_CEN ;
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}
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// Start TIMER6 at 100000Hz, used for DAC trigger
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void dacTimerInit()
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{
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// Now for timer 6
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RCC->APB1ENR |= RCC_APB1ENR_TIM6EN ; // Enable clock
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TIM6->PSC = 0 ; // Max speed
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TIM6->ARR = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 100000 - 1 ; // 10 uS, 100 kHz
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TIM6->CR2 = 0 ;
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TIM6->CR2 = 0x20 ;
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TIM6->CR1 = TIM_CR1_CEN ;
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AUDIO_TIMER->PSC = 0 ; // Max speed
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AUDIO_TIMER->ARR = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 100000 - 1 ; // 10 uS, 100 kHz
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AUDIO_TIMER->CR2 = 0 ;
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AUDIO_TIMER->CR2 = 0x20 ;
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AUDIO_TIMER->CR1 = TIM_CR1_CEN ;
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}
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// Configure DAC0 (or DAC1 for REVA)
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@@ -59,10 +56,7 @@ void dacInit()
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{
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dacTimerInit();
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
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configure_pins( GPIO_Pin_4, PIN_ANALOG | PIN_PORTA ) ;
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RCC->APB1ENR |= RCC_APB1ENR_DACEN ; // Enable clock
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RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN ; // Enable DMA1 clock
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// Chan 7, 16-bit wide, Medium priority, memory increments
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DMA1_Stream5->CR &= ~DMA_SxCR_EN ; // Disable DMA
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@@ -77,13 +71,13 @@ void dacInit()
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DAC->DHR12R1 = 2010 ;
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DAC->SR = DAC_SR_DMAUDR1 ; // Write 1 to clear flag
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DAC->CR = DAC_CR_TEN1 | DAC_CR_EN1 ; // Enable DAC
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NVIC_EnableIRQ(TIM6_DAC_IRQn); // TODO needed?
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NVIC_SetPriority(TIM6_DAC_IRQn, 7);
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NVIC_EnableIRQ(AUDIO_TIMER_DAC_IRQn); // TODO needed?
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NVIC_SetPriority(AUDIO_TIMER_DAC_IRQn, 7);
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NVIC_EnableIRQ(DMA1_Stream5_IRQn);
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NVIC_SetPriority(DMA1_Stream5_IRQn, 7);
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}
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bool dacQueue(AudioBuffer *buffer)
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bool dacQueue(AudioBuffer * buffer)
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{
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if (dacIdle) {
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dacIdle = false;
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@@ -123,9 +117,9 @@ void audioInit()
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void audioEnd()
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{
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DAC->CR = 0 ;
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TIM6->CR1 = 0 ;
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AUDIO_TIMER->CR1 = 0 ;
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// Also need to turn off any possible interrupts
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NVIC_DisableIRQ(TIM6_DAC_IRQn) ;
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NVIC_DisableIRQ(AUDIO_TIMER_DAC_IRQn) ;
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NVIC_DisableIRQ(DMA1_Stream5_IRQn) ;
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}
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@@ -77,7 +77,6 @@ void interrupt5ms()
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++pre_scale;
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if (pre_scale == 5 || pre_scale == 10) {
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AUDIO_HEARTBEAT();
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#if defined(HAPTIC)
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HAPTIC_HEARTBEAT();
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@@ -125,8 +124,8 @@ void pinCheck(GPIO_TypeDef * gpio, uint32_t pin, uint32_t RCC_AHB1Periph)
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void boardInit()
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{
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RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | LCD_RCC_AHB1Periph | KEYS_RCC_AHB1Periph_GPIO | ADC_RCC_AHB1Periph | I2C_RCC_AHB1Periph | SERIAL_RCC_AHB1Periph | TELEMETRY_RCC_AHB1Periph | HAPTIC_RCC_AHB1Periph, ENABLE);
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RCC_APB1PeriphClockCmd(INTERRUPT_5MS_APB1Periph | TIMER_2MHz_APB1Periph | I2C_RCC_APB1Periph | SERIAL_RCC_APB1Periph | TELEMETRY_RCC_APB1Periph, ENABLE);
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RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | LCD_RCC_AHB1Periph | KEYS_RCC_AHB1Periph_GPIO | ADC_RCC_AHB1Periph | I2C_RCC_AHB1Periph | SERIAL_RCC_AHB1Periph | TELEMETRY_RCC_AHB1Periph | AUDIO_RCC_AHB1Periph | HAPTIC_RCC_AHB1Periph, ENABLE);
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RCC_APB1PeriphClockCmd(INTERRUPT_5MS_APB1Periph | TIMER_2MHz_APB1Periph | I2C_RCC_APB1Periph | SERIAL_RCC_APB1Periph | TELEMETRY_RCC_APB1Periph | AUDIO_RCC_APB1Periph, ENABLE);
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RCC_APB2PeriphClockCmd(LCD_RCC_APB2Periph | ADC_RCC_APB2Periph | HAPTIC_RCC_APB2Periph, ENABLE);
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pwrInit();
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@@ -207,6 +207,10 @@
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#define SD_SDIO_TRANSFER_CLK_DIV SD_SDIO_CLK_DIV(24000000)
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// Audio
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#define AUDIO_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1ENR_DMA1EN)
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#define AUDIO_RCC_APB1Periph (RCC_APB1ENR_TIM6EN | RCC_APB1ENR_DACEN)
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#define AUDIO_TIMER TIM6
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#define AUDIO_TIMER_DAC_IRQn TIM6_DAC_IRQn
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// I2C Bus: CAT5137
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#define I2C_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
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