IMPORTANT: PPM/DSM2 protocols BROKEN for several revisioins before this one.
WARNING: All protocols shoul dbe testing on stock board again. Fixed a number of problems relating to the (dis)enabling of hardware switched PPM_OUT for the G9XV4 board. I also broke a lot of stuff along the way over several previous commits, as I slowly learned how all the code went together and the 'whys' for some stuff. My bad. In other words, this commit finally has DSM2=PPM mode working on the G9XV4 board without breaking a bunch of other stuff -- hopefully. !! STOCK BOARD TESTING NEEDED !! I am pretty sure I have not broken anything for the stock board code -- BUT it MUST be tested before the next release, because I have made quite a few changes in and around that code.
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+88
-92
@@ -61,37 +61,29 @@ void set_timer3_ppm( void ) ;
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void startPulses()
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{
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#ifdef SIMU
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s_current_protocol = g_model.protocol;
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#else
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setupPulses();
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#ifdef DSM2_SERIAL
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if (g_model.protocol != PROTO_DSM2)
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#endif
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{
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#if defined(PCBV4)
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// TODO g: There has to be a better place for this bug fix
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OCR1B = 0xffff; /* Prevent any PPM_PUT pin toggle before the TCNT1 interrupt
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fires for the first time and sets up the pulse period. */
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// TCCR1A |= (1<<COM1B0); // (COM1B1=0 and COM1B0=1 in TCCR1A) toogle the state of PB6(OC1B) on each TCNT1==OCR1B
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TCCR1A = (3<<COM1B0); // Connect OC1B to PPM_OUT pin (SET the state of PB6(OC1B) on next TCNT1==OCR1B)
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fires for the first time and sets up the pulse period.
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*** Prevents WDT reset loop. */
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#endif
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}
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#if defined(PCBV4)
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TIMSK1 |= (1<<OCIE1A); // Pulse generator enable immediately before mainloop
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#ifdef SIMU
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s_current_protocol = g_model.protocol;
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#else
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TIMSK |= (1<<OCIE1A); // Pulse generator enable immediately before mainloop
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#endif
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setupPulses();
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#endif // SIMU
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}
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#define PULSES_SIZE 144
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uint8_t pulses2MHz[PULSES_SIZE] = {0}; // TODO check this length, pulled from er9x, perhaps too big.
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// G: Yes, too big. The PPM DSM2 code doesn't even use this any more, far as I can see.
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// I'm pretty sure the original code put DSM2 bit bang data into here. But not any more?
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uint8_t *pulses2MHzRPtr = pulses2MHz;
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#if defined(DSM2) || defined(PXX) || defined(IRPROTOS)
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@@ -161,18 +153,19 @@ ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR)
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pulsePol = g_model.pulsePol;
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if (!IS_PXX_PROTOCOL(s_current_protocol) && !IS_DSM2_PROTOCOL(s_current_protocol)) {
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#if defined(PCBV4)
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TIMSK1 &= ~(1<<OCIE1A); // stop reentrance (disable Timer1 interrupt)
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TIMSK1 &= ~(1<<OCIE1A); // stop reentrance (disable Timer1 interrupt)
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#else
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TIMSK &= ~(1<<OCIE1A); // stop reentrance (disable Timer1 interrupt)
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TIMSK &= ~(1<<OCIE1A); // stop reentrance (disable Timer1 interrupt)
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#endif
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sei(); // enable interrupts during setupPulses
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setupPulses(); // does not sei() for setupPulsesPPM
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cli();
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setupPulses(); // does not sei() for setupPulsesPPM
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// if setupPulses changed protocol to one that doesn't use COMPA then don't re-enable.
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if (!IS_PXX_PROTOCOL(s_current_protocol) && !IS_DSM2_PROTOCOL(s_current_protocol)) {
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cli();
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#if defined(PCBV4)
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TIMSK1 |= (1<<OCIE1A); // re-enable Timer1 interrupt
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#else
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@@ -749,114 +742,117 @@ void setupPulses()
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#if defined(DSM2_PPM)
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case PROTO_DSM2:
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set_timer3_capture() ;
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TCCR1B = 0; // Stop counter
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OCR1C = 200; // 100 uS
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TCNT1 = 300; // Past the OCR1C value
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ICR1 = 44000; // Next frame starts in 22 mS
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set_timer3_capture();
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TCCR1B = 0; // Stop counter
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OCR1C = 200; // 100 uS
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TCNT1 = 300; // Past the OCR1C value
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ICR1 = 44000; // Next frame starts in 22 mS
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#if defined(PCBV4)
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TIMSK1 &= ~0x3C; // All interrupts off
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TIMSK1 &= ~0x2F; // All interrupts off
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TIFR1 = 0x2F;
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TIMSK1 |= 0x28; // Enable CAPT and COMPC
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TIMSK1 |= 0x28; // Enable CAPT and COMPC
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TCCR1A = (0 << WGM10); // Also disconnects OC1B for PPM_OUT bit-bang mode
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#else
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TIMSK &= ~0x3C; // All interrupts off
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TIMSK &= ~0x3C; // All Timer1 interrupts off
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TIFR = 0x3C;
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ETIFR = 0x3F ;
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TIMSK |= 0x20; // Enable CAPT
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ETIMSK |= (1<<OCIE1C); // Enable COMPC
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#endif
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ETIFR = 0x3F;
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TIMSK |= 0x20; // Enable CAPT
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ETIMSK |= (1<<OCIE1C); // Enable COMPC
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TCCR1A = (0 << WGM10);
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TCCR1B = (3 << WGM12) | (2 << CS10); // CTC ICR, 16MHz / 8
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#endif
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TCCR1B = (3 << WGM12) | (2 << CS10); // CTC ICR, 16MHz / 8
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break;
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#endif
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#if defined(PXX)
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case PROTO_PXX:
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set_timer3_capture() ;
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TCCR1B = 0 ; // Stop counter
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TCNT1 = 0 ;
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OCR1B = 6000 ; // Next frame starts in 3 mS
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OCR1C = 4000 ; // Next frame setup in 2 mS
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set_timer3_capture();
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TCCR1B = 0; // Stop counter
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TCNT1 = 0;
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OCR1B = 6000; // Next frame starts in 3 mS
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OCR1C = 4000; // Next frame setup in 2 mS
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#if defined(PCBV4)
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TIMSK1 &= ~0x3C; // All interrupts off
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TIMSK1 &= ~0x2F; // All Timer1 interrupts off
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TIFR1 = 0x2F;
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TIMSK1 |= (1<<OCIE1B) ; // Enable COMPB
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TIMSK1 |= (1<<OCIE1C); // Enable COMPC
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TIMSK1 |= (1<<OCIE1B); // Enable COMPB
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TIMSK1 |= (1<<OCIE1C); // Enable COMPC
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TCCR1A = (3 << COM1B0); // Connect OC1B for hardware PPM switching
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#else
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TIMSK &= ~0x3C; // All interrupts off
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TIFR = 0x3C ;
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ETIFR = 0x3F ;
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TIMSK |= (1<<OCIE1B) ; // Enable COMPB
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ETIMSK |= (1<<OCIE1C); // Enable COMPC
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#endif
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TIMSK &= ~0x3C; // All Timer1 interrupts off
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TIFR = 0x3C;
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ETIFR = 0x3F;
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TIMSK |= (1<<OCIE1B); // Enable COMPB
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ETIMSK |= (1<<OCIE1C); // Enable COMPC
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TCCR1A = 0;
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TCCR1B = (2<<CS10); //ICNC3 16MHz / 8
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#endif
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TCCR1B = (2<<CS10); // ICNC3 16MHz / 8
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break;
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#endif
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case PROTO_PPM16 :
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TCCR1B = 0 ; // Stop counter
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OCR1A = 40000 ; // Next frame starts in 20 mS
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TCNT1 = 0 ;
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case PROTO_PPM16:
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TCCR1B = 0; // Stop counter
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OCR1A = 40000; // Next frame starts in 20 mS
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TCNT1 = 0;
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#if defined(PCBV4)
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TIMSK1 &= ~0x3C; // All interrupts off
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TIMSK1 &= ~(1<<OCIE1C) ; // COMPC1 off
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TIMSK1 &= ~0x2F; // All Timer1 interrupts off
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TIMSK1 &= ~(1<<OCIE1C); // COMPC1 off
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TIFR1 = 0x2F;
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TIMSK1 |= (1<<OCIE1A); // Enable COMPA
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TIMSK1 |= (1<<OCIE1A); // Enable COMPA
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TCCR1A = (3 << COM1B0); // Connect OC1B for hardware PPM switching
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#else
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TIMSK &= ~0x3C ; // All interrupts off
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ETIMSK &= ~(1<<OCIE1C) ; // COMPC1 off
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TIFR = 0x3C ; // Clear all pending interrupts
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ETIFR = 0x3F ; // Clear all pending interrupts
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TIMSK |= 0x10 ; // Enable COMPA
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TIMSK &= ~0x3C; // All Timer1 interrupts off
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ETIMSK &= ~(1<<OCIE1C); // COMPC1 off
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TIFR = 0x3C; // Clear all pending interrupts
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ETIFR = 0x3F; // Clear all pending interrupts
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TIMSK |= 0x10; // Enable COMPA
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TCCR1A = (0<<WGM10);
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#endif
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TCCR1A = (0<<WGM10) ;
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TCCR1B = (1 << WGM12) | (2<<CS10) ; // CTC OCRA, 16MHz / 8
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TCCR1B = (1 << WGM12) | (2<<CS10) ; // CTC OCRA, 16MHz / 8
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setupPulsesPPM(PROTO_PPM16);
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OCR3A = 50000 ;
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OCR3B = 5000 ;
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set_timer3_ppm() ;
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break ;
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OCR3A = 50000;
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OCR3B = 5000;
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set_timer3_ppm();
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break;
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case PROTO_PPMSIM :
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TCCR1B = 0 ; // Stop counter
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TCNT1 = 0 ;
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case PROTO_PPMSIM:
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TCCR1B = 0; // Stop counter
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TCNT1 = 0;
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#if defined(PCBV4)
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TIMSK1 &= ~0x3C; // All interrupts off
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TIMSK1 &= ~(1<<OCIE1C) ; // COMPC1 off
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TIMSK1 &= ~0x2F; // All Timer1 interrupts off
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TIMSK1 &= ~(1<<OCIE1C); // COMPC1 off
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TIFR1 = 0x2F;
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TCCR1A = 0; // Disconnect OC1B for bit-bang PPM switching
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#else
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TIMSK &= ~0x3C ; // All interrupts off
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ETIMSK &= ~(1<<OCIE1C) ; // COMPC1 off
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TIFR = 0x3C ; // Clear all pending interrupts
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ETIFR = 0x3F ; // Clear all pending interrupts
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TIMSK &= ~0x3C; // All Timer1 interrupts off
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ETIMSK &= ~(1<<OCIE1C); // COMPC1 off
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TIFR = 0x3C; // Clear all pending interrupts
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ETIFR = 0x3F; // Clear all pending interrupts
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#endif
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setupPulsesPPM(PROTO_PPMSIM);
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OCR3A = 50000 ;
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OCR3B = 5000 ;
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set_timer3_ppm() ;
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PORTB &= ~(1<<OUT_B_PPM); // Hold PPM output low
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OCR3A = 50000;
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OCR3B = 5000;
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set_timer3_ppm();
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PORTB &= ~(1<<OUT_B_PPM); // Hold PPM output low
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break ;
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default:
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set_timer3_capture() ;
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TCCR1B = 0; // Stop counter
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OCR1A = 40000; // Next frame starts in 20 mS
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set_timer3_capture();
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TCCR1B = 0; // Stop counter
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OCR1A = 40000; // Next frame starts in 20 mS
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TCNT1 = 0;
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#if defined(PCBV4)
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TIMSK1 &= ~0x3C; // All interrupts off
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TIMSK1 &= ~0x2F; // All Timer1 interrupts off
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TIFR1 = 0x2F;
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TIMSK1 |= (1<<OCIE1A); // Enable COMPA
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TIMSK1 |= (1<<OCIE1A); // Enable COMPA
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TCCR1A = (3 << COM1B0); // Connect OC1B for hardware PPM switching
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#else
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TIMSK &= ~0x3C; // All interrupts off
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TIMSK &= ~0x3C; // All Timer1 interrupts off
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TIFR = 0x3C;
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ETIFR = 0x3F ; // Clear all pending interrupts
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TIMSK |= 0x10; // Enable COMPA
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#endif
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// TCNT1 2MHz counter (auto-cleared) plus Capture Compare int.
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// Used for PPM pulse generator
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ETIFR = 0x3F; // Clear all pending interrupts
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TIMSK |= 0x10; // Enable COMPA
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TCCR1A = (0 << WGM10);
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TCCR1B = (1 << WGM12) | (2 << CS10); // CTC OCRA, 16MHz / 8
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#endif
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TCCR1B = (1 << WGM12) | (2 << CS10); // CTC OCRA, 16MHz / 8
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break;
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}
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}
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@@ -885,7 +881,7 @@ void setupPulses()
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#endif
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default:
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// no sei here
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sei(); // no sei here g: why not? breaks for me on V4 board.
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setupPulsesPPM(PROTO_PPM);
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// if PPM16, PPM16 pulses are set up automatically within the interrupts
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break;
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