Fixed SWB/SWD problem.

This commit is contained in:
Richard Li
2021-07-05 16:55:34 +08:00
parent e029160eb5
commit 3a9571eeb8
+2 -1
View File
@@ -71,6 +71,7 @@
#elif defined(PCBNV14) && defined(FLYSKY_HALL_STICKS)
#define FIRST_ANALOG_ADC 4
#define NUM_MAIN_ANALOGS_ADC 9
#define NUM_SUB_ANALOGS_ADC 2
#else
#define FIRST_ANALOG_ADC 0
#define FIRST_SUB_ANALOG_ADC 0
@@ -173,7 +174,7 @@ void adcInit()
ADC_MAIN_DMA_Stream->NDTR = NUM_MAIN_ANALOGS_ADC;
ADC_MAIN_DMA_Stream->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0;
#if NUM_SUB_ANALOGS > 0
#if NUM_SUB_ANALOGS_ADC > 0
ADC_SUB->SMPR1 = ADC_SAMPTIME + (ADC_SAMPTIME<<3) + (ADC_SAMPTIME<<6) + (ADC_SAMPTIME<<9) + (ADC_SAMPTIME<<12) + (ADC_SAMPTIME<<15) + (ADC_SAMPTIME<<18) + (ADC_SAMPTIME<<21) + (ADC_SAMPTIME<<24);
ADC_SUB->SMPR2 = ADC_SAMPTIME + (ADC_SAMPTIME<<3) + (ADC_SAMPTIME<<6) + (ADC_SAMPTIME<<9) + (ADC_SAMPTIME<<12) + (ADC_SAMPTIME<<15) + (ADC_SAMPTIME<<18) + (ADC_SAMPTIME<<21) + (ADC_SAMPTIME<<24) + (ADC_SAMPTIME<<27);