[Sky9x] EEPROM code moved to driver
This commit is contained in:
+22
-31
@@ -46,7 +46,7 @@
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#define EEPROM_ZONE_SIZE (8*1024)
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#define EEPROM_BUFFER_SIZE 256
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#define EEPROM_FAT_SIZE 128
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#define EEPROM_MAX_ZONES (EEPROM_SIZE / EEPROM_ZONE_SIZE)
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#define EEPROM_MAX_ZONES ((EEPROM_SIZE / EEPROM_ZONE_SIZE) - 1)
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#define FIRST_FILE_AVAILABLE (1+MAX_MODELS)
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PACK(struct EepromHeaderFile
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@@ -71,10 +71,6 @@ uint32_t eepromWriteDestinationAddr;
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uint16_t eepromFatAddr = 0;
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uint8_t eepromWriteBuffer[EEPROM_BUFFER_SIZE];
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#define COMMAND_BLOCK_ERASE 0x20
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#define COMMAND_WRITE 0x02
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#define COMMAND_READ 0x03
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void eepromWaitSpiComplete()
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{
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while (!Spi_complete) {
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@@ -103,13 +99,8 @@ void eepromEraseBlock(uint32_t address, bool blocking=true)
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Spi_complete = false;
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sem_post(eeprom_write_sem);
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#else
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eeprom_write_enable();
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uint8_t * p = Spi_tx_buf;
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*p = COMMAND_BLOCK_ERASE;
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*(p+1) = address >> 16;
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*(p+2) = address >> 8;
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*(p+3) = address;
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spi_PDC_action(p, 0, 0, 4, 0);
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eepromWriteEnable();
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eepromBlockErase(address);
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#endif
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if (blocking) {
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@@ -131,12 +122,7 @@ void eepromRead(uint32_t address, uint8_t * buffer, uint32_t size, bool blocking
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Spi_complete = false;
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sem_post(eeprom_write_sem);
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#else
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uint8_t * p = Spi_tx_buf;
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*p = COMMAND_READ;
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*(p+1) = address >> 16;
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*(p+2) = address >> 8;
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*(p+3) = address;
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spi_PDC_action(p, 0, buffer, 4, size);
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eepromReadArray(address, buffer, size);
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#endif
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if (blocking) {
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@@ -157,13 +143,8 @@ void eepromWrite(uint32_t address, uint8_t * buffer, uint32_t size, bool blockin
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Spi_complete = false;
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sem_post(eeprom_write_sem);
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#else
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eeprom_write_enable();
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uint8_t * p = Spi_tx_buf;
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*p = COMMAND_WRITE;
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*(p+1) = address >> 16;
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*(p+2) = address >> 8;
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*(p+3) = address;
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spi_PDC_action(p, buffer, 0, 4, size);
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eepromWriteEnable();
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eepromByteProgram(address, buffer, size);
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#endif
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if (blocking) {
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@@ -196,7 +177,7 @@ bool eepromOpen()
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uint32_t readFile(int index, uint8_t * data, uint32_t size)
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{
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uint16_t fileSize;
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uint16_t fileSize = 0;
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uint32_t address = eepromHeader.files[index].zoneIndex * EEPROM_ZONE_SIZE;
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eepromRead(address, (uint8_t *)&fileSize, sizeof(fileSize));
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if (size < fileSize) {
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@@ -292,7 +273,6 @@ void eeSwapModels(uint8_t id1, uint8_t id2)
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modelHeaders[id1] = modelHeaders[id2];
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modelHeaders[id2] = tmp;
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}
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}
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// For conversions ...
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@@ -322,10 +302,14 @@ bool eeLoadGeneral()
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if (g_eeGeneral.version != EEPROM_VER) {
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TRACE("EEPROM version %d instead of %d", g_eeGeneral.version, EEPROM_VER);
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if (!eeConvert())
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#if defined(PCBSKY9X)
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if (!eeConvert()) {
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return false;
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}
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#else
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return false;
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#endif
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}
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return true;
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}
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@@ -423,7 +407,6 @@ void eeErase(bool warn)
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MESSAGE(STR_EEPROMWARN, STR_EEPROMFORMATTING, NULL, AU_EEPROM_FORMATTING);
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eepromFormat();
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eeDirty(EE_GENERAL);
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eeDirty(EE_MODEL);
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eeCheck(true);
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@@ -446,6 +429,7 @@ void eeCheck(bool immediately)
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}
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if (s_eeDirtyMsk & EE_GENERAL) {
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TRACE("eeprom write general");
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s_eeDirtyMsk -= EE_GENERAL;
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writeGeneralSettings();
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if (immediately)
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@@ -455,6 +439,7 @@ void eeCheck(bool immediately)
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}
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if (s_eeDirtyMsk & EE_MODEL) {
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TRACE("eeprom write model");
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s_eeDirtyMsk -= EE_MODEL;
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writeModel(g_eeGeneral.currModel);
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if (immediately)
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@@ -591,8 +576,10 @@ const pm_char * eeBackupModel(uint8_t i_fileSrc)
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return SDCARD_ERROR(result);
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}
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#if defined(PCBSKY9X)
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strcpy(statusLineMsg, PSTR("File "));
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strcpy(statusLineMsg+5, &buf[sizeof(MODELS_PATH)]);
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#endif
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uint16_t size = eeModelSize(i_fileSrc);
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@@ -621,7 +608,11 @@ const pm_char * eeBackupModel(uint8_t i_fileSrc)
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}
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f_close(&archiveFile);
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#if defined(PCBSKY9X)
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showStatusLine();
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#endif
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return NULL;
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}
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@@ -700,7 +691,7 @@ const pm_char * eeRestoreModel(uint8_t i_fileDst, char *model_name)
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eeLoadModelHeader(i_fileDst, &modelHeaders[i_fileDst]);
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#if defined(CPUARM)
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#if defined(PCBSKY9X)
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if (version < EEPROM_VER) {
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ConvertModel(i_fileDst, version);
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loadModel(g_eeGeneral.currModel);
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@@ -38,9 +38,8 @@
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volatile uint32_t Spi_complete;
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uint8_t Spi_tx_buf[24] ;
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uint8_t Spi_rx_buf[24] ;
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uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count )
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uint32_t eepromTransmitData(register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count )
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{
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#ifndef SIMU
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@@ -98,103 +97,90 @@ uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, regist
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return 0 ;
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}
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uint32_t spi_operation( register uint8_t *tx, register uint8_t *rx, register uint32_t count )
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uint8_t eepromTransmitByte(uint8_t out, bool skipFirst)
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{
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register Spi *spiptr;
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register uint32_t result;
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register uint32_t delay;
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result = 0;
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spiptr = SPI;
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spiptr->SPI_CR = 1; // Enable
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(void) spiptr->SPI_RDR; // Dump any rx data
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while (count) {
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_TXEMPTY) == 0) {
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// wait
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if (++result > 10000) {
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result = 0xFFFF;
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break;
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}
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}
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if (result > 10000) {
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spiptr->SPI_TDR = out;
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delay = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++delay > 10000) {
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break;
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}
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spiptr->SPI_TDR = *tx++;
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result = 0;
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}
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if (skipFirst) {
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(void) spiptr->SPI_RDR; // Dump the rx data
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spiptr->SPI_TDR = 0;
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delay = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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result = 0x2FFFF;
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if (++delay > 10000) {
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break;
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}
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}
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if (result > 10000) {
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break;
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}
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*rx++ = spiptr->SPI_RDR;
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count -= 1;
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}
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if (result <= 10000) {
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result = 0;
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}
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spiptr->SPI_CR = 2; // Disable
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return result ;
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}
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uint32_t eeprom_write_one(uint8_t byte, uint8_t count)
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{
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#ifndef SIMU
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register Spi *spiptr;
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register uint32_t result;
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spiptr = SPI;
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spiptr->SPI_CR = 1; // Enable
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(void) spiptr->SPI_RDR; // Dump any rx data
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spiptr->SPI_TDR = byte;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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break;
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}
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}
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if (count == 0) {
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spiptr->SPI_CR = 2; // Disable
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return spiptr->SPI_RDR;
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}
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(void) spiptr->SPI_RDR; // Dump the rx data
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spiptr->SPI_TDR = 0;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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break;
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}
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}
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spiptr->SPI_CR = 2; // Disable
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return spiptr->SPI_RDR ;
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#else
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return !Spi_complete;
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#endif
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}
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void eeprom_write_enable()
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enum EepromCommand {
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COMMAND_WRITE_STATUS_REGISTER = 0x01,
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COMMAND_BYTE_PROGRAM = 0x02,
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COMMAND_READ_ARRAY = 0x03,
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COMMAND_READ_STATUS = 0x05,
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COMMAND_WRITE_ENABLE = 0x06,
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COMMAND_BLOCK_ERASE = 0x20,
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};
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void eepromPrepareCommand(EepromCommand command, uint32_t address)
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{
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eeprom_write_one(6, 0);
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uint8_t * p = Spi_tx_buf;
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*p = command;
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*(p+1) = address >> 16;
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*(p+2) = address >> 8;
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*(p+3) = address;
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}
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uint32_t eepromReadStatus()
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{
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#if defined(SIMU)
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return 0;
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#else
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return eeprom_write_one(5, 1);
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#endif
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return eepromTransmitByte(COMMAND_READ_STATUS, true);
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}
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void eepromWriteStatusRegister()
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{
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eepromTransmitByte(COMMAND_WRITE_STATUS_REGISTER, true);
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}
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void eepromByteProgram(uint32_t address, uint8_t * buffer, uint32_t size)
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{
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eepromPrepareCommand(COMMAND_BYTE_PROGRAM, address);
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eepromTransmitData(Spi_tx_buf, buffer, 0, 4, size);
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}
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void eepromReadArray(uint32_t address, uint8_t * buffer, uint32_t size)
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{
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eepromPrepareCommand(COMMAND_READ_ARRAY, address);
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eepromTransmitData(Spi_tx_buf, 0, buffer, 4, size);
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}
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void eepromWriteEnable()
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{
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eepromTransmitByte(COMMAND_WRITE_ENABLE, false);
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}
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void eepromBlockErase(uint32_t address)
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{
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eepromPrepareCommand(COMMAND_BLOCK_ERASE, address);
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eepromTransmitData(Spi_tx_buf, 0, 0, 4, 0);
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}
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// SPI i/f to EEPROM (4Mb)
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@@ -209,8 +195,6 @@ void eepromInit()
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{
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register Spi *spiptr ;
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register uint32_t timer ;
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register uint8_t *p ;
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uint8_t spi_buf[4] ;
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PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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/* Configure PIO */
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@@ -222,20 +206,8 @@ void eepromInit()
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spiptr->SPI_CSR[0] = 0x01180009 | timer ; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
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NVIC_EnableIRQ(SPI_IRQn) ;
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p = spi_buf ;
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// *p = 0x39 ; // Unprotect sector command
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// *(p+1) = 0 ;
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// *(p+2) = 0 ;
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// *(p+3) = 0 ; // 3 bytes address
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// spi_operation( p, spi_buf, 4 ) ;
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eeprom_write_enable() ;
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*p = 1 ; // Write status register command
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*(p+1) = 0 ;
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spi_operation( p, spi_buf, 2 ) ;
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eepromWriteEnable();
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eepromWriteStatusRegister();
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}
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#ifndef SIMU
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@@ -255,28 +227,3 @@ extern "C" void SPI_IRQHandler()
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// PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI
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}
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#endif
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void end_spi()
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{
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SPI->SPI_CR = 2 ; // Disable
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SPI->SPI_IDR = 0x07FF ; // All interrupts off
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NVIC_DisableIRQ(SPI_IRQn) ;
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}
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#if 0
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uint32_t unprotect_eeprom()
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{
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register uint8_t *p;
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eeprom_write_enable();
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p = Spi_tx_buf;
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*p = 0x39; // Unprotect sector command
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*(p + 1) = 0;
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*(p + 2) = 0;
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*(p + 3) = 0; // 3 bytes address
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return spi_operation( p, Spi_rx_buf, 4 ) ;
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}
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#endif
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