Check AND switch before clearing LS
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@@ -695,13 +695,14 @@ int ModelData::updateReference()
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default:
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break;
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}
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if (clearlsd) {
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if (lsd->andsw != 0)
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updateSwitchIntRef(lsd->andsw);
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if (clearlsd && lsd->andsw == 0) {
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lsd->clear();
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appendUpdateReferenceParams(REF_UPD_TYPE_LOGICAL_SWITCH, REF_UPD_ACT_CLEAR, i);
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}
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else if (lsd->andsw != 0) {
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updateSwitchIntRef(lsd->andsw);
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}
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}
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}
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//s1.report("Logical Switches");
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