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[stock128] Less RAM used!!!

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This commit is contained in:
bsongis@gmail.com
2013-04-08 19:12:38 +00:00
parent 541c5aa000
commit 4d03134e9e
8 changed files with 8 additions and 8 deletions
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src/translations/cz.h
+1 -1
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@@ -285,7 +285,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC""CSD""CSE""CSF""CSG""CSH""CSI""CSJ""CSK""CSL""CSM""CSN""CSO""CSP""CSQ""CSR""CSS""CST""CSU""CSV""CSW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC""CSD""CSE""CSF"
#else
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC"
src/translations/de.h
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@@ -287,7 +287,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "PS1""PS2""PS3""PS4""PS5""PS6""PS7""PS8""PS9""PSA""PSB""PSC""PSD""PSE""PSF""PSG""PSH""PSI""PSJ""PSK""PSL""PSM""PSN""PSO""PSP""PSQ""PSR""PSS""PST""PSU""PSV""PSW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "PS1""PS2""PS3""PS4""PS5""PS6""PS7""PS8""PS9""PSA""PSB""PSC""PSD""PSE""PSF"
#else
#define TR_CUSTOMSW "PS1""PS2""PS3""PS4""PS5""PS6""PS7""PS8""PS9""PSA""PSB""PSC"
src/translations/en.h
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@@ -299,7 +299,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC""CSD""CSE""CSF""CSG""CSH""CSI""CSJ""CSK""CSL""CSM""CSN""CSO""CSP""CSQ""CSR""CSS""CST""CSU""CSV""CSW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC""CSD""CSE""CSF"
#else
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC"
src/translations/es.h
+1 -1
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@@ -285,7 +285,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC""CSD""CSE""CSF""CSG""CSH""CSI""CSJ""CSK""CSL""CSM""CSN""CSO""CSP""CSQ""CSR""CSS""CST""CSU""CSV""CSW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC""CSD""CSE""CSF"
#else
#define TR_CUSTOMSW "CS1""CS2""CS3""CS4""CS5""CS6""CS7""CS8""CS9""CSA""CSB""CSC"
src/translations/fr.h
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@@ -299,7 +299,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "IP1""IP2""IP3""IP4""IP5""IP6""IP7""IP8""IP9""IPA""IPB""IPC""IPD""IPE""IPF""IPG""IPH""IPI""IPJ""IPK""IPL""IPM""IPN""IPO""IPP""IPQ""IPR""IPS""IPT""IPU""IPV""IPW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "IP1""IP2""IP3""IP4""IP5""IP6""IP7""IP8""IP9""IPA""IPB""IPC""IPD""IPE""IPF"
#else
#define TR_CUSTOMSW "IP1""IP2""IP3""IP4""IP5""IP6""IP7""IP8""IP9""IPA""IPB""IPC"
src/translations/it.h
+1 -1
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@@ -284,7 +284,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "SW1""SW2""SW3""SW4""SW5""SW6""SW7""SW8""SW9""SWA""SWB""SWC""SWD""SWE""SWF""SWG""SWH""SWI""SWJ""SWK""SWL""SWM""SWN""SWO""SWP""SWQ""SWR""SWS""SWT""SWU""SWV""SWW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "SW1""SW2""SW3""SW4""SW5""SW6""SW7""SW8""SW9""SWA""SWB""SWC""SWD""SWE""SWF"
#else
#define TR_CUSTOMSW "SW1""SW2""SW3""SW4""SW5""SW6""SW7""SW8""SW9""SWA""SWB""SWC"
src/translations/pt.h
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@@ -263,7 +263,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "CE1""CE2""CE3""CE4""CE5""CE6""CE7""CE8""CE9""CEA""CEB""CEC""CED""CEE""CEF""CEG""CEH""CEI""CEJ""CEK""CEL""CEM""CEN""CEO""CEP""CEQ""CER""CES""CET""CEU""CEV""CEW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "CE1""CE2""CE3""CE4""CE5""CE6""CE7""CE8""CE9""CEA""CEB""CEC""CED""CEE""CEF"
#else
#define TR_CUSTOMSW "CE1""CE2""CE3""CE4""CE5""CE6""CE7""CE8""CE9""CEA""CEB""CEC"
src/translations/se.h
+1 -1
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@@ -299,7 +299,7 @@
#if defined(CPUARM)
#define TR_CUSTOMSW "LB1""LB2""LB3""LB4""LB5""LB6""LB7""LB8""LB9""LBA""LBB""LBC""LBD""LBE""LBF""LBG""LBH""LBI""LBJ""LBK""LBL""LBM""LBN""LBO""LBP""LBQ""LBR""LBS""LBT""LBU""LBV""LBW"
#elif defined(PCBGRUVIN9X) || defined(CPUM128)
#elif defined(PCBGRUVIN9X)
#define TR_CUSTOMSW "LB1""LB2""LB3""LB4""LB5""LB6""LB7""LB8""LB9""LBA""LBB""LBC""LBD""LBE""LBF"
#else
#define TR_CUSTOMSW "LB1""LB2""LB3""LB4""LB5""LB6""LB7""LB8""LB9""LBA""LBB""LBC"