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[Taranis] More stuff moved to hal

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This commit is contained in:
bsongis
2015-06-16 22:44:10 +02:00
parent bbdadf57e7
commit 5764cdee57
16 changed files with 440 additions and 535 deletions
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radio/src/targets/taranis/adc_driver.cpp
-6
View File
@@ -70,10 +70,6 @@ uint16_t Analog_values[NUMBER_ANALOG];
void adcInit()
{
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // Enable clock
RCC->AHB1ENR |= ADC_AHB1Periph_GPIO; // Enable ports A&C clocks
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN; // Enable DMA2 clock
#if defined(REV9E)
configure_pins(ADC_GPIO_PIN_STICK_RV | ADC_GPIO_PIN_STICK_RH | ADC_GPIO_PIN_STICK_LH | ADC_GPIO_PIN_STICK_LV | ADC_GPIO_PIN_SLIDER3, PIN_ANALOG | PIN_PORTA);
configure_pins(ADC_GPIO_PIN_POT2 | ADC_GPIO_PIN_SLIDER4, PIN_ANALOG | PIN_PORTB);
@@ -111,8 +107,6 @@ void adcInit()
DMA2_Stream0->FCR = DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
#if defined(REV9E)
RCC->APB2ENR |= RCC_APB2ENR_ADC3EN ; // Enable clock
ADC3->CR1 = ADC_CR1_SCAN ;
ADC3->CR2 = ADC_CR2_ADON | ADC_CR2_DMA | ADC_CR2_DDS ;
ADC3->SQR1 = (NUMBER_ANALOG_ADC3-1) << 20 ; // NUMBER_ANALOG Channels
radio/src/targets/taranis/board_taranis.cpp
+23 -26
View File
@@ -55,39 +55,33 @@ void watchdogInit(unsigned int duration)
IWDG->KR = 0xCCCC ; // start
}
// Start TIMER7 at 2000000Hz
// Starts TIMER at 2MHz
void init2MhzTimer()
{
// Now for timer 7
RCC->APB1ENR |= RCC_APB1ENR_TIM7EN ; // Enable clock
TIM7->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5 uS, 2 MHz
TIM7->ARR = 65535;
TIM7->CR2 = 0;
TIM7->CR1 = TIM_CR1_CEN;
TIMER_2MHz_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5 uS, 2 MHz
TIMER_2MHz_TIMER->ARR = 65535;
TIMER_2MHz_TIMER->CR2 = 0;
TIMER_2MHz_TIMER->CR1 = TIM_CR1_CEN;
}
// Starts TIMER at 200Hz, 5mS period
// Starts TIMER at 200Hz (5ms)
void init5msTimer()
{
// Timer14
RCC->APB1ENR |= RCC_APB1ENR_TIM14EN ; // Enable clock
TIM14->ARR = 4999 ; // 5mS
TIM14->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 1000000 - 1 ; // 1uS from 30MHz
TIM14->CCER = 0 ;
TIM14->CCMR1 = 0 ;
TIM14->EGR = 0 ;
TIM14->CR1 = 5 ;
TIM14->DIER |= 1 ;
NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn) ;
NVIC_SetPriority(TIM8_TRG_COM_TIM14_IRQn, 7);
INTERRUPT_5MS_TIMER->ARR = 4999 ; // 5mS
INTERRUPT_5MS_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 1000000 - 1 ; // 1uS from 30MHz
INTERRUPT_5MS_TIMER->CCER = 0 ;
INTERRUPT_5MS_TIMER->CCMR1 = 0 ;
INTERRUPT_5MS_TIMER->EGR = 0 ;
INTERRUPT_5MS_TIMER->CR1 = 5 ;
INTERRUPT_5MS_TIMER->DIER |= 1 ;
NVIC_EnableIRQ(INTERRUPT_5MS_IRQn) ;
NVIC_SetPriority(INTERRUPT_5MS_IRQn, 7);
}
void stop5msTimer( void )
{
TIM14->CR1 = 0 ; // stop timer
NVIC_DisableIRQ(TIM8_TRG_COM_TIM14_IRQn) ;
RCC->APB1ENR &= ~RCC_APB1ENR_TIM14EN ; // Disable clock
INTERRUPT_5MS_TIMER->CR1 = 0 ; // stop timer
NVIC_DisableIRQ(INTERRUPT_5MS_IRQn) ;
}
// TODO use the same than board_sky9x.cpp
@@ -112,14 +106,18 @@ void interrupt5ms()
}
#if !defined(SIMU)
extern "C" void TIM8_TRG_COM_TIM14_IRQHandler()
extern "C" void INTERRUPT_5MS_IRQHandler()
{
TIM14->SR &= ~TIM_SR_UIF ;
INTERRUPT_5MS_TIMER->SR &= ~TIM_SR_UIF ;
interrupt5ms() ;
}
void boardInit()
{
RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | KEYS_RCC_AHB1Periph | LCD_RCC_AHB1Periph | BACKLIGHT_RCC_AHB1Periph | ADC_RCC_AHB1Periph | I2C_RCC_AHB1Periph | SD_RCC_AHB1Periph | HAPTIC_RCC_AHB1Periph | INTMODULE_RCC_AHB1Periph | EXTMODULE_RCC_AHB1Periph | TELEMETRY_RCC_AHB1Periph | SERIAL_RCC_AHB1Periph | TRAINER_RCC_AHB1Periph | HEARTBEAT_RCC_AHB1Periph, ENABLE);
RCC_APB1PeriphClockCmd(LCD_RCC_APB1Periph | BACKLIGHT_RCC_APB1Periph | INTERRUPT_5MS_APB1Periph | TIMER_2MHz_APB1Periph | I2C_RCC_APB1Periph | SD_RCC_APB1Periph | TRAINER_RCC_APB1Periph | TELEMETRY_RCC_APB1Periph | SERIAL_RCC_APB1Periph, ENABLE);
RCC_APB2PeriphClockCmd(BACKLIGHT_RCC_APB2Periph | ADC_RCC_APB2Periph | HAPTIC_RCC_APB2Periph | INTMODULE_RCC_APB2Periph | EXTMODULE_RCC_APB2Periph | HEARTBEAT_RCC_APB2Periph, ENABLE);
pwrInit();
keysInit();
adcInit();
@@ -237,4 +235,3 @@ void checkTrainerSettings()
}
}
}
radio/src/targets/taranis/board_taranis.h
+4 -4
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@@ -270,10 +270,10 @@ uint32_t pwrPressedDuration(void);
#define backlightDisable() turnBacklightOff()
#define isBacklightEnable() ((BACKLIGHT_TIMER->CCR4 != 0) || (BACKLIGHT_TIMER->CCR2 != 0))
#else
#define setBacklight(xx) TIM10->CCR1 = 100-xx
#define backlightEnable() TIM10->CCR1 = 100-g_eeGeneral.backlightBright
#define backlightDisable() TIM10->CCR1 = 0
#define isBacklightEnable() (TIM10->CCR1 != 0)
#define setBacklight(xx) BACKLIGHT_TIMER->CCR1 = 100-xx
#define backlightEnable() BACKLIGHT_TIMER->CCR1 = 100-g_eeGeneral.backlightBright
#define backlightDisable() BACKLIGHT_TIMER->CCR1 = 0
#define isBacklightEnable() (BACKLIGHT_TIMER->CCR1 != 0)
#endif
// USB driver
radio/src/targets/taranis/bootloader/boot.cpp
+3 -42
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@@ -223,48 +223,8 @@ void interrupt10ms(void)
#endif
}
#if defined(PCBSKY9X)
void init10msTimer()
{
register Tc *ptc;
register uint32_t timer;
PMC->PMC_PCER0 |= 0x02000000L; // Enable peripheral clock to TC2
timer = Master_frequency / 12800;// MCK/128 and 100 Hz
ptc = TC0;// Tc block 0 (TC0-2)
ptc->TC_BCR = 0;// No sync
ptc->TC_BMR = 0;
ptc->TC_CHANNEL[2].TC_CMR = 0x00008000;// Waveform mode
ptc->TC_CHANNEL[2].TC_RC = timer;// 10 Hz
ptc->TC_CHANNEL[2].TC_RA = timer >> 1;
ptc->TC_CHANNEL[2].TC_CMR = 0x0009C003;// 0000 0000 0000 1001 1100 0000 0000 0011
// MCK/128, set @ RA, Clear @ RC waveform
ptc->TC_CHANNEL[2].TC_CCR = 5;// Enable clock and trigger it (may only need trigger)
NVIC_EnableIRQ(TC2_IRQn);
TC0->TC_CHANNEL[2].TC_IER = TC_IER0_CPCS;
}
extern "C" void TC2_IRQHandler()
{
register uint32_t dummy;
/* Clear status bit to acknowledge interrupt */
dummy = TC0->TC_CHANNEL[2].TC_SR;
(void) dummy; // Discard value - prevents compiler warning
interrupt10ms();
}
#endif
#if defined(PCBTARANIS)
void init10msTimer()
{
// Timer14
RCC->APB1ENR |= RCC_APB1ENR_TIM14EN; // Enable clock
TIM14->ARR = 9999; // 10mS
TIM14->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 1000000 - 1; // 1uS from 12MHz
TIM14->CCER = 0;
@@ -280,7 +240,6 @@ extern "C" void TIM8_TRG_COM_TIM14_IRQHandler()
TIM14->SR &= ~TIM_SR_UIF;
interrupt10ms();
}
#endif
FRESULT readBinDir(DIR *dj, FILINFO *fno)
{
@@ -468,7 +427,9 @@ int main()
#if defined(PCBTARANIS)
wdt_reset();
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; // Enable portA clock
RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | KEYS_RCC_AHB1Periph | LCD_RCC_AHB1Periph | BACKLIGHT_RCC_AHB1Periph | I2C_RCC_AHB1Periph | SD_RCC_AHB1Periph, ENABLE);
RCC_APB1PeriphClockCmd(LCD_RCC_APB1Periph | BACKLIGHT_RCC_APB1Periph | INTERRUPT_5MS_APB1Periph | I2C_RCC_APB1Periph | SD_RCC_APB1Periph, ENABLE);
RCC_APB2PeriphClockCmd(BACKLIGHT_RCC_APB2Periph, ENABLE);
#endif
pwrInit();
radio/src/targets/taranis/diskio.cpp
+1 -11
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@@ -317,11 +317,6 @@ void power_on (void)
SPI_InitTypeDef SPI_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
volatile BYTE dummyread;
/* Enable GPIO clock for CS */
RCC_AHB1PeriphClockCmd(SD_RCC_AHB1Periph_GPIO, ENABLE);
/* Enable SPI clock, SPI1: APB2, SPI2: APB1 */
RCC_APB1PeriphClockCmd(SD_RCC_APB1Periph_SPI, ENABLE);
card_power(1);
@@ -371,13 +366,9 @@ void power_on (void)
while (SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_TXE) == RESET) { ; }
dummyread = SPI_I2S_ReceiveData(SD_SPI);
#ifdef SD_USE_DMA
/* enable DMA clock */
RCC_AHB1PeriphClockCmd(SD_RCC_AHB1Periph_DMA, ENABLE);
#endif
(void) dummyread; // Discard value - prevents compiler warning
}
static
void power_off (void)
{
@@ -391,7 +382,6 @@ void power_off (void)
SPI_I2S_DeInit(SD_SPI);
SPI_Cmd(SD_SPI, DISABLE);
RCC_APB1PeriphClockCmd(SD_RCC_APB1Periph_SPI, DISABLE);
//All SPI-Pins to input with weak internal pull-downs
GPIO_InitStructure.GPIO_Pin = SD_GPIO_PIN_SCK | SD_GPIO_PIN_MISO | SD_GPIO_PIN_MOSI;
radio/src/targets/taranis/hal.h
+85 -39
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@@ -50,13 +50,13 @@
#define TRIMS_GPIO_REG_LVU GPIOE->IDR
#define TRIMS_GPIO_PIN_LVU GPIO_Pin_5 // PE.05
#define TRIMS_GPIO_REG_RVD GPIOC->IDR
#define TRIMS_GPIO_PIN_RVD GPIO_Pin_3 // PC.03
#define TRIMS_GPIO_PIN_RVD GPIO_Pin_1 // PC.01
#define TRIMS_GPIO_REG_RHL GPIOC->IDR
#define TRIMS_GPIO_PIN_RHL GPIO_Pin_1 // PC.01
#define TRIMS_GPIO_PIN_RHL GPIO_Pin_3 // PC.03
#define TRIMS_GPIO_REG_RVU GPIOC->IDR
#define TRIMS_GPIO_PIN_RVU GPIO_Pin_2 // PC.02
#define TRIMS_GPIO_PIN_RVU GPIO_Pin_13 // PC.13
#define TRIMS_GPIO_REG_RHR GPIOC->IDR
#define TRIMS_GPIO_PIN_RHR GPIO_Pin_13 // PC.13
#define TRIMS_GPIO_PIN_RHR GPIO_Pin_2 // PC.02
#endif
// Switches
@@ -200,7 +200,7 @@
#endif
#if defined(REV9E)
#define KEYS_RCC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE|RCC_AHB1Periph_GPIOF|RCC_AHB1Periph_GPIOG)
#define KEYS_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE|RCC_AHB1Periph_GPIOF|RCC_AHB1Periph_GPIOG)
#define KEYS_GPIOA_PINS (SWITCHES_GPIO_PIN_M_L)
#define KEYS_GPIOB_PINS (SWITCHES_GPIO_PIN_N_H | SWITCHES_GPIO_PIN_N_L | SWITCHES_GPIO_PIN_R_H)
#define KEYS_GPIOC_PINS (TRIMS_GPIO_PIN_RVD | TRIMS_GPIO_PIN_RVU | TRIMS_GPIO_PIN_RHL | TRIMS_GPIO_PIN_RHR)
@@ -209,14 +209,14 @@
#define KEYS_GPIOF_PINS (KEYS_GPIO_PIN_ENTER | SWITCHES_GPIO_PIN_E_H | SWITCHES_GPIO_PIN_E_L | SWITCHES_GPIO_PIN_G_H | SWITCHES_GPIO_PIN_G_L | SWITCHES_GPIO_PIN_H | SWITCHES_GPIO_PIN_I_H | SWITCHES_GPIO_PIN_O_H | SWITCHES_GPIO_PIN_P_H | SWITCHES_GPIO_PIN_P_L | SWITCHES_GPIO_PIN_Q_H | SWITCHES_GPIO_PIN_Q_L)
#define KEYS_GPIOG_PINS (TRIMS_GPIO_PIN_LVD | TRIMS_GPIO_PIN_LVU | SWITCHES_GPIO_PIN_C_H | SWITCHES_GPIO_PIN_C_L | SWITCHES_GPIO_PIN_J_H | SWITCHES_GPIO_PIN_J_L | SWITCHES_GPIO_PIN_K_H | SWITCHES_GPIO_PIN_K_L)
#elif defined(REVPLUS)
#define KEYS_RCC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE)
#define KEYS_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE)
#define KEYS_GPIOA_PINS (SWITCHES_GPIO_PIN_C_L)
#define KEYS_GPIOB_PINS (SWITCHES_GPIO_PIN_E_L | SWITCHES_GPIO_PIN_E_H | SWITCHES_GPIO_PIN_A_H)
#define KEYS_GPIOC_PINS (TRIMS_GPIO_PIN_RVD | TRIMS_GPIO_PIN_RVU | TRIMS_GPIO_PIN_RHL | TRIMS_GPIO_PIN_RHR)
#define KEYS_GPIOD_PINS (KEYS_GPIO_PIN_MENU | KEYS_GPIO_PIN_EXIT | KEYS_GPIO_PIN_PAGE | SWITCHES_GPIO_PIN_H)
#define KEYS_GPIOE_PINS (KEYS_GPIO_PIN_PLUS | KEYS_GPIO_PIN_ENTER | KEYS_GPIO_PIN_MINUS | TRIMS_GPIO_PIN_LHR | TRIMS_GPIO_PIN_LHL | TRIMS_GPIO_PIN_LVD | TRIMS_GPIO_PIN_LVU | SWITCHES_GPIO_PIN_F | SWITCHES_GPIO_PIN_A_L | SWITCHES_GPIO_PIN_B_H | SWITCHES_GPIO_PIN_B_L | SWITCHES_GPIO_PIN_C_H | SWITCHES_GPIO_PIN_D_H | SWITCHES_GPIO_PIN_D_L | SWITCHES_GPIO_PIN_G_H | SWITCHES_GPIO_PIN_G_L)
#else
#define KEYS_RCC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE)
#define KEYS_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA|RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOC|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_GPIOE)
#define KEYS_GPIOA_PINS (SWITCHES_GPIO_PIN_C_L)
#define KEYS_GPIOB_PINS (SWITCHES_GPIO_PIN_E_L | SWITCHES_GPIO_PIN_E_H | SWITCHES_GPIO_PIN_A_H | SWITCHES_GPIO_PIN_D_L)
#define KEYS_GPIOC_PINS (TRIMS_GPIO_PIN_RVD | TRIMS_GPIO_PIN_RVU | TRIMS_GPIO_PIN_RHL | TRIMS_GPIO_PIN_RHR)
@@ -226,9 +226,11 @@
// ADC
#if defined(REV9E)
#define ADC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOF)
#define ADC_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_DMA2)
#define ADC_RCC_APB2Periph (RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC3)
#else
#define ADC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC)
#define ADC_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_DMA2)
#define ADC_RCC_APB2Periph RCC_APB2Periph_ADC1
#endif
#define ADC_GPIO_PIN_STICK_RV GPIO_Pin_0 // PA.00
#define ADC_GPIO_PIN_STICK_RH GPIO_Pin_1 // PA.01
@@ -285,7 +287,7 @@
#endif
// Power_OFF Delay and LED
#define PWR_RCC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD)
#define PWR_RCC_AHB1Periph (RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD)
#define PWR_GPIO GPIOD
#define PWR_GPIO_PIN_SWITCH GPIO_Pin_1 // PD.01
#define PWR_GPIO_PIN_ON GPIO_Pin_0 // PD.00
@@ -293,7 +295,8 @@
#define PWR_GPIO_PIN_LED GPIO_Pin_6 // PC.06
// Internal Module
#define INTMODULE_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOA
#define INTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_DMA2)
#define INTMODULE_RCC_APB2Periph RCC_APB2Periph_TIM1
#if defined(REVPLUS)
#define INTMODULE_GPIO_PWR GPIOC
#define INTMODULE_GPIO_PIN_PWR GPIO_Pin_6
@@ -304,25 +307,37 @@
#define INTMODULE_GPIO_PIN GPIO_Pin_10 // PA.10
#define INTMODULE_GPIO GPIOA
#define INTMODULE_GPIO_PinSource GPIO_PinSource10
#define INTMODULE_GPIO_AF GPIO_AF_TIM1
#define INTMODULE_TIMER TIM1
// External Module
#define EXTMODULE_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOA
#define EXTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_DMA2)
#define EXTMODULE_RCC_APB2Periph RCC_APB2Periph_TIM8
#define EXTMODULE_GPIO_PWR GPIOD
#define EXTMODULE_GPIO_PIN_PWR GPIO_Pin_8
#define EXTMODULE_GPIO_PIN GPIO_Pin_7 // PA.07
#define EXTMODULE_GPIO GPIOA
#define EXTMODULE_TIMER TIM8
#define EXTMODULE_GPIO_AF GPIO_AF_TIM8
#define EXTMODULE_GPIO_PinSource GPIO_PinSource7
#define EXTMODULE_TIMER_IRQn TIM8_CC_IRQn
// Trainer Port
#define TRAINER_RCC_AHB1Periph RCC_AHB1Periph_GPIOC
#define TRAINER_RCC_APB1Periph RCC_APB1Periph_TIM3
#define TRAINER_GPIO GPIOC
#define TRAINER_GPIO_PIN_IN GPIO_Pin_8 // PC.08
#define TRAINER_GPIO_PIN_OUT GPIO_Pin_9 // PC.09
#define TRAINER_GPIO_DETECT GPIOA
#define TRAINER_GPIO_PIN_DETECT GPIO_Pin_8 // PA.08
#define TRAINER_TIMER TIM3
#define TRAINER_TIMER_IRQn TIM3_IRQn
#define TRAINER_GPIO_PinSource_IN GPIO_PinSource8
#define TRAINER_GPIO_AF GPIO_AF_TIM3
// SERIAL_USART
#define SERIAL_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOB
#define SERIAL_RCC_APB1Periph_USART RCC_APB1Periph_USART3
// Serial Port
#define SERIAL_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
#define SERIAL_RCC_APB1Periph RCC_APB1Periph_USART3
#define SERIAL_GPIO GPIOB
#define SERIAL_GPIO_PIN_TX GPIO_Pin_10 // PB.10
#define SERIAL_GPIO_PIN_RX GPIO_Pin_11 // PB.11
@@ -330,10 +345,12 @@
#define SERIAL_GPIO_PinSource_RX GPIO_PinSource11
#define SERIAL_GPIO_AF GPIO_AF_USART3
#define SERIAL_USART USART3
#define SERIAL_USART_IRQHandler USART3_IRQHandler
#define SERIAL_USART_IRQn USART3_IRQn
// Telemetry
#define TELEMETRY_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOD
#define TELEMETRY_RCC_APB1Periph_USART RCC_APB1Periph_USART2
#define TELEMETRY_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOD)
#define TELEMETRY_RCC_APB1Periph RCC_APB1Periph_USART2
#define TELEMETRY_GPIO_DIR GPIOA
#define TELEMETRY_GPIO_PIN_DIR GPIO_Pin_15 // PA.15
#define TELEMETRY_GPIO GPIOD
@@ -346,6 +363,16 @@
#define TELEMETRY_USART_IRQHandler USART2_IRQHandler
#define TELEMETRY_USART_IRQn USART2_IRQn
// Heartbeat
#define HEARTBEAT_RCC_AHB1Periph RCC_AHB1Periph_GPIOC
#define HEARTBEAT_RCC_APB2Periph RCC_APB2Periph_USART6
#define HEARTBEAT_GPIO_PIN GPIO_Pin_7 // PC.07
#define HEARTBEAT_GPIO_PinSource GPIO_PinSource7
#define HEARTBEAT_GPIO_AF GPIO_AF_USART6
#define HEARTBEAT_USART USART6
#define HEARTBEAT_USART_IRQHandler USART6_IRQHandler
#define HEARTBEAT_USART_IRQn USART6_IRQn
// USB
#define USB_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOA
#define USB_GPIO GPIOA
@@ -358,9 +385,11 @@
// BackLight
#if defined(REV9E)
#define BACKLIGHT_RCC_AHB1Periph RCC_AHB1Periph_GPIOE
#define BACKLIGHT_RCC_APB1Periph 0
#define BACKLIGHT_RCC_APB2Periph RCC_APB2Periph_TIM9
#define BACKLIGHT_TIMER TIM9
#define BACKLIGHT_GPIO GPIOE
#define BACKLIGHT_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOE
#define BACKLIGHT_GPIO_PIN_1 GPIO_Pin_6 // PE.06
#define BACKLIGHT_GPIO_PIN_2 GPIO_Pin_5 // PE.05
#define BACKLIGHT_GPIO_PinSource_1 GPIO_PinSource6
@@ -368,28 +397,32 @@
#define BACKLIGHT_GPIO_AF_1 GPIO_AF_TIM9
#define BACKLIGHT_GPIO_AF_2 GPIO_AF_TIM9
#elif defined (REVPLUS)
#define BACKLIGHT_RCC_AHB1Periph RCC_AHB1Periph_GPIOD
#define BACKLIGHT_RCC_APB1Periph RCC_APB1Periph_TIM4
#define BACKLIGHT_RCC_APB2Periph 0
#define BACKLIGHT_TIMER TIM4
#define BACKLIGHT_GPIO GPIOD
#define BACKLIGHT_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOD
#define BACKLIGHT_GPIO_AF_1 GPIO_AF_TIM4
#define BACKLIGHT_GPIO_PIN_1 GPIO_Pin_15 // PD.15
#define BACKLIGHT_GPIO_PinSource_1 GPIO_PinSource15
#define BACKLIGHT_GPIO_AF_2 GPIO_AF_TIM4
#define BACKLIGHT_GPIO_PIN_2 GPIO_Pin_13 // PD.13
#define BACKLIGHT_GPIO_PinSource_1 GPIO_PinSource15
#define BACKLIGHT_GPIO_PinSource_2 GPIO_PinSource13
#define BACKLIGHT_GPIO_AF_1 GPIO_AF_TIM4
#define BACKLIGHT_GPIO_AF_2 GPIO_AF_TIM4
#else
#define BACKLIGHT_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOB
#define BACKLIGHT_GPIO_PIN_1 GPIO_Pin_8 // PB.08
#define BACKLIGHT_GPIO_AF_1 GPIO_AF_TIM10
#define BACKLIGHT_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
#define BACKLIGHT_RCC_APB1Periph 0
#define BACKLIGHT_RCC_APB2Periph RCC_APB2Periph_TIM10
#define BACKLIGHT_TIMER TIM10
#define BACKLIGHT_GPIO GPIOB
#define BACKLIGHT_GPIO_PIN_1 GPIO_Pin_8 // PB.08
#define BACKLIGHT_GPIO_PinSource_1 GPIO_PinSource8
#define BACKLIGHT_GPIO_AF_1 GPIO_AF_TIM10
#endif
// LCD
#if defined(REV9E)
#define LCD_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD)
#define LCD_RCC_AHB1Periph_RST RCC_AHB1Periph_GPIOD
#define LCD_RCC_AHB1Periph_NCS RCC_AHB1Periph_GPIOA
#define LCD_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_DMA1)
#define LCD_RCC_APB1Periph RCC_APB1Periph_SPI3
#define LCD_GPIO_SPI GPIOC
#define LCD_GPIO_NCS GPIOA
#define LCD_GPIO_RST GPIOD
@@ -399,9 +432,8 @@
#define LCD_GPIO_PIN_A0 GPIO_Pin_11 // PC.11
#define LCD_GPIO_PIN_RST GPIO_Pin_15 // PD.15
#elif defined(REVPLUS)
#define LCD_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD)
#define LCD_RCC_AHB1Periph_RST RCC_AHB1Periph_GPIOD
#define LCD_RCC_AHB1Periph_NCS RCC_AHB1Periph_GPIOA
#define LCD_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_DMA1)
#define LCD_RCC_APB1Periph RCC_APB1Periph_SPI3
#define LCD_GPIO_SPI GPIOC
#define LCD_GPIO_NCS GPIOA
#define LCD_GPIO_RST GPIOD
@@ -412,6 +444,7 @@
#define LCD_GPIO_PIN_RST GPIO_Pin_12 // PD.12
#else
#define LCD_RCC_AHB1Periph RCC_AHB1Periph_GPIOD
#define LCD_RCC_APB1Periph 0
#define LCD_GPIO_SPI GPIOD
#define LCD_GPIO_NCS GPIOD
#define LCD_GPIO_RST GPIOD
@@ -423,8 +456,8 @@
#endif
// I2C Bus: EEPROM and CAT5137
#define I2C_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOB
#define I2C_RCC_APB1Periph_I2C RCC_APB1Periph_I2C1
#define I2C_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
#define I2C_RCC_APB1Periph RCC_APB1Periph_I2C1
#define I2C I2C1
#define I2C_GPIO GPIOB
#define I2C_GPIO_PIN_SCL GPIO_Pin_6 // PB.06
@@ -443,9 +476,8 @@
#define I2C_FLASH_PAGESIZE 64
// SD - SPI2
#define SD_RCC_AHB1Periph_GPIO (RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOB)
#define SD_RCC_APB1Periph_SPI RCC_APB1Periph_SPI2
#define SD_RCC_AHB1Periph_DMA RCC_AHB1Periph_DMA1
#define SD_RCC_AHB1Periph (RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_DMA1)
#define SD_RCC_APB1Periph RCC_APB1Periph_SPI2
#define SD_GPIO_PRESENT GPIOD
#define SD_GPIO_PIN_PRESENT GPIO_Pin_9 // PD.09
#define SD_GPIO GPIOB
@@ -472,25 +504,39 @@
// Haptic
#if defined(REVPLUS)
#define HAPTIC_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOB
#define HAPTIC_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
#define HAPTIC_RCC_APB2Periph RCC_APB2Periph_TIM10
#define HAPTIC_GPIO_PinSource GPIO_PinSource8
#define HAPTIC_GPIO GPIOB
#define HAPTIC_GPIO_PIN GPIO_Pin_8
#define HAPTIC_GPIO_AF GPIO_AF_TIM10
#define HAPTIC_TIMER TIM10
#else
#define HAPTIC_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOC
#define HAPTIC_RCC_AHB1Periph RCC_AHB1Periph_GPIOC
#define HAPTIC_RCC_APB2Periph 0
#define HAPTIC_GPIO GPIOC
#define HAPTIC_GPIO_PIN GPIO_Pin_12
#endif
// Top LCD on X9E
#if defined(REV9E)
#define TOPLCD_RCC_AHB1Periph RCC_AHB1Periph_GPIOG
#define TOPLCD_GPIO GPIOG
#define TOPLCD_GPIO_PIN_DATA GPIO_Pin_5
#define TOPLCD_GPIO_PIN_WR GPIO_Pin_4
#define TOPLCD_GPIO_PIN_CS1 GPIO_Pin_3
#define TOPLCD_GPIO_PIN_CS2 GPIO_Pin_15
#define TOPLCD_GPIO_PIN_BL GPIO_Pin_2
#define TOPLCD_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOG
#endif
// 5ms Interrupt
#define INTERRUPT_5MS_APB1Periph RCC_APB1Periph_TIM14
#define INTERRUPT_5MS_TIMER TIM14
#define INTERRUPT_5MS_IRQn TIM8_TRG_COM_TIM14_IRQn
#define INTERRUPT_5MS_IRQHandler TIM8_TRG_COM_TIM14_IRQHandler
// 2MHz Timer
#define TIMER_2MHz_APB1Periph RCC_APB1Periph_TIM7
#define TIMER_2MHz_TIMER TIM7
#endif
radio/src/targets/taranis/haptic_driver.cpp
+10 -15
View File
@@ -39,7 +39,7 @@
#if defined(REVPLUS)
void hapticOff(void)
{
TIM10->CCR1 = 0;
HAPTIC_TIMER->CCR1 = 0;
}
void hapticOn(uint32_t pwmPercent)
@@ -47,12 +47,11 @@ void hapticOn(uint32_t pwmPercent)
if (pwmPercent > 100) {
pwmPercent = 100;
}
TIM10->CCR1 = pwmPercent;
HAPTIC_TIMER->CCR1 = pwmPercent;
}
void hapticInit(void)
{
RCC_AHB1PeriphClockCmd(HAPTIC_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = HAPTIC_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
@@ -61,17 +60,16 @@ void hapticInit(void)
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(HAPTIC_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(HAPTIC_GPIO, HAPTIC_GPIO_PinSource, GPIO_AF_TIM10);
GPIO_PinAFConfig(HAPTIC_GPIO, HAPTIC_GPIO_PinSource, HAPTIC_GPIO_AF);
RCC->APB2ENR |= RCC_APB2ENR_TIM10EN ; // Enable clock
TIM10->ARR = 100 ;
TIM10->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 10000 - 1;
TIM10->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 ; // PWM
TIM10->CCER = TIM_CCER_CC1E ;
HAPTIC_TIMER->ARR = 100 ;
HAPTIC_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 10000 - 1;
HAPTIC_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 ; // PWM
HAPTIC_TIMER->CCER = TIM_CCER_CC1E ;
TIM10->CCR1 = 0 ;
TIM10->EGR = 0 ;
TIM10->CR1 = TIM_CR1_CEN ; // Counter enable
HAPTIC_TIMER->CCR1 = 0 ;
HAPTIC_TIMER->EGR = 0 ;
HAPTIC_TIMER->CR1 = TIM_CR1_CEN ; // Counter enable
}
#else
@@ -80,9 +78,6 @@ void hapticInit(void)
void hapticInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(HAPTIC_RCC_AHB1Periph_GPIO, ENABLE);
/* GPIO Configuration*/
GPIO_InitStructure.GPIO_Pin = HAPTIC_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
radio/src/targets/taranis/i2c_driver.cpp
-3
View File
@@ -5,9 +5,6 @@ void I2C_EE_WaitEepromStandbyState(void);
void eepromInit(void)
{
RCC_AHB1PeriphClockCmd(I2C_RCC_AHB1Periph_GPIO, ENABLE);
RCC_APB1PeriphClockCmd(I2C_RCC_APB1Periph_I2C, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = I2C_GPIO_PIN_WP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
radio/src/targets/taranis/keys_driver.cpp
-2
View File
@@ -238,8 +238,6 @@ void keysInit()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(KEYS_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_InitStructure.GPIO_Pin = KEYS_GPIOA_PINS;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
radio/src/targets/taranis/lcd_driver.cpp
+24 -39
View File
@@ -42,11 +42,6 @@ static void Delay(uint32_t ms)
// New hardware SPI driver for LCD
void initLcdSpi()
{
RCC_AHB1PeriphClockCmd(LCD_RCC_AHB1Periph, ENABLE);
RCC_AHB1PeriphClockCmd(LCD_RCC_AHB1Periph_RST, ENABLE);
RCC_AHB1PeriphClockCmd(LCD_RCC_AHB1Periph_NCS, ENABLE);
RCC->APB1ENR |= RCC_APB1ENR_SPI3EN ; // Enable clock
// APB1 clock / 2 = 133nS per clock
SPI3->CR1 = 0 ; // Clear any mode error
SPI3->CR1 = SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_CPOL | SPI_CR1_CPHA ;
@@ -65,8 +60,6 @@ void initLcdSpi()
DMA1->HIFCR |= DMA_HIFCR_CTCIF7; //clear interrupt flag
DMA1->LISR |= DMA_HISR_TCIF7; //enable DMA TX end interrupt
RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN ; // Enable DMA1 clock
DMA1_Stream7->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA1->HIFCR = DMA_HIFCR_CTCIF7 | DMA_HIFCR_CHTIF7 | DMA_HIFCR_CTEIF7 | DMA_HIFCR_CDMEIF7 | DMA_HIFCR_CFEIF7 ; // Write ones to clear bits
DMA1_Stream7->CR = DMA_SxCR_PL_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 ;
@@ -263,7 +256,6 @@ void lcdRefresh()
/**Init the Backlight GPIO */
static void LCD_BL_Config()
{
RCC_AHB1PeriphClockCmd(BACKLIGHT_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
#if defined(REV9E)
@@ -275,15 +267,14 @@ static void LCD_BL_Config()
GPIO_Init(BACKLIGHT_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(BACKLIGHT_GPIO, BACKLIGHT_GPIO_PinSource_1, BACKLIGHT_GPIO_AF_1);
GPIO_PinAFConfig(BACKLIGHT_GPIO, BACKLIGHT_GPIO_PinSource_2, BACKLIGHT_GPIO_AF_1);
RCC->APB2ENR |= RCC_APB2ENR_TIM9EN ; // Enable clock
TIM9->ARR = 100 ;
TIM9->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 50000 - 1; // 20us * 100 = 2ms => 500Hz
TIM9->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 ; // PWM
TIM9->CCER = TIM_CCER_CC1E | TIM_CCER_CC2E ;
TIM9->CCR1 = 0 ;
TIM9->CCR2 = 80 ;
TIM9->EGR = 0 ;
TIM9->CR1 = TIM_CR1_CEN ; // Counter enable
BACKLIGHT_TIMER->ARR = 100 ;
BACKLIGHT_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 50000 - 1; // 20us * 100 = 2ms => 500Hz
BACKLIGHT_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 ; // PWM
BACKLIGHT_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC2E ;
BACKLIGHT_TIMER->CCR1 = 0 ;
BACKLIGHT_TIMER->CCR2 = 80 ;
BACKLIGHT_TIMER->EGR = 0 ;
BACKLIGHT_TIMER->CR1 = TIM_CR1_CEN ; // Counter enable
#elif defined(REVPLUS)
GPIO_InitStructure.GPIO_Pin = BACKLIGHT_GPIO_PIN_1|BACKLIGHT_GPIO_PIN_2;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
@@ -293,17 +284,15 @@ static void LCD_BL_Config()
GPIO_Init(BACKLIGHT_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(BACKLIGHT_GPIO, BACKLIGHT_GPIO_PinSource_1, BACKLIGHT_GPIO_AF_1);
GPIO_PinAFConfig(BACKLIGHT_GPIO, BACKLIGHT_GPIO_PinSource_2, BACKLIGHT_GPIO_AF_1);
RCC->APB1ENR |= RCC_APB1ENR_TIM4EN ; // Enable clock
TIM4->ARR = 100 ;
TIM4->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 50000 - 1; // 20us * 100 = 2ms => 500Hz
TIM4->CCMR1 = TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 ; // PWM
TIM4->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 ; // PWM
TIM4->CCER = TIM_CCER_CC4E | TIM_CCER_CC2E ;
TIM4->CCR2 = 0 ;
TIM4->CCR4 = 80 ;
TIM4->EGR = 0 ;
TIM4->CR1 = TIM_CR1_CEN ; // Counter enable
BACKLIGHT_TIMER->ARR = 100 ;
BACKLIGHT_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 50000 - 1; // 20us * 100 = 2ms => 500Hz
BACKLIGHT_TIMER->CCMR1 = TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 ; // PWM
BACKLIGHT_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 ; // PWM
BACKLIGHT_TIMER->CCER = TIM_CCER_CC4E | TIM_CCER_CC2E ;
BACKLIGHT_TIMER->CCR2 = 0 ;
BACKLIGHT_TIMER->CCR4 = 80 ;
BACKLIGHT_TIMER->EGR = 0 ;
BACKLIGHT_TIMER->CR1 = TIM_CR1_CEN ; // Counter enable
#else
GPIO_InitStructure.GPIO_Pin = BACKLIGHT_GPIO_PIN_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
@@ -312,15 +301,13 @@ static void LCD_BL_Config()
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(BACKLIGHT_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(BACKLIGHT_GPIO, BACKLIGHT_GPIO_PinSource_1, BACKLIGHT_GPIO_AF_1);
RCC->APB2ENR |= RCC_APB2ENR_TIM10EN ; // Enable clock
TIM10->ARR = 100 ;
TIM10->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 50000 - 1; // 20us * 100 = 2ms => 500Hz
TIM10->CCMR1 = 0x60 ; // PWM
TIM10->CCER = 1 ;
TIM10->CCR1 = 80;
TIM10->EGR = 0 ;
TIM10->CR1 = 1 ;
BACKLIGHT_TIMER->ARR = 100 ;
BACKLIGHT_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 50000 - 1; // 20us * 100 = 2ms => 500Hz
BACKLIGHT_TIMER->CCMR1 = 0x60 ; // PWM
BACKLIGHT_TIMER->CCER = 1 ;
BACKLIGHT_TIMER->CCR1 = 80;
BACKLIGHT_TIMER->EGR = 0 ;
BACKLIGHT_TIMER->CR1 = 1 ;
#endif
}
@@ -328,8 +315,6 @@ static void LCD_BL_Config()
*/
static void LCD_Hardware_Init()
{
RCC_AHB1PeriphClockCmd(LCD_RCC_AHB1Periph, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
/*!< Configure lcd CLK\ MOSI\ A0pin in output push-pull mode *************/
radio/src/targets/taranis/pulses_driver.cpp
+204 -240
View File
@@ -40,53 +40,53 @@ void setupPulses(unsigned int port);
void setupPulsesPPM(unsigned int port);
void setupPulsesPXX(unsigned int port);
static void init_pa10_pxx( void ) ;
static void disable_pa10_pxx( void ) ;
static void intmodulePxxStart( void ) ;
static void intmodulePxxStop( void ) ;
#if defined(TARANIS_INTERNAL_PPM)
static void init_pa10_ppm( void ) ;
static void disable_pa10_ppm( void ) ;
static void intmodulePpmStart( void ) ;
static void intmodulePpmStop( void ) ;
#endif
static void init_pa7_pxx( void ) ;
static void disable_pa7_pxx( void ) ;
static void extmodulePxxStart( void ) ;
static void extmodulePxxStop( void ) ;
#if defined(DSM2)
static void init_pa7_dsm2( void ) ;
static void disable_pa7_dsm2( void ) ;
static void extmoduleDsm2Start( void ) ;
static void extmoduleDsm2Stop( void ) ;
#endif
static void init_pa7_ppm( void ) ;
static void disable_pa7_ppm( void ) ;
static void init_pa10_none( void ) ;
static void disable_pa10_none( void ) ;
static void init_pa7_none( void ) ;
static void disable_pa7_none( void ) ;
static void extmodulePpmStart( void ) ;
static void extmodulePpmStop( void ) ;
static void intmoduleNoneStart( void ) ;
static void intmoduleNoneStop( void ) ;
static void extmoduleNoneStart( void ) ;
static void extmoduleNoneStop( void ) ;
void init_pxx(uint32_t port)
{
if (port == INTERNAL_MODULE)
init_pa10_pxx() ;
intmodulePxxStart() ;
else
init_pa7_pxx() ;
extmodulePxxStart() ;
}
void disable_pxx(uint32_t port)
{
if (port == INTERNAL_MODULE)
disable_pa10_pxx() ;
intmodulePxxStop() ;
else
disable_pa7_pxx() ;
extmodulePxxStop() ;
}
#if defined(DSM2)
void init_dsm2(uint32_t port)
{
if (port == EXTERNAL_MODULE) {
init_pa7_dsm2();
extmoduleDsm2Start();
}
}
void disable_dsm2(uint32_t port)
{
if (port == EXTERNAL_MODULE) {
disable_pa7_dsm2();
extmoduleDsm2Stop();
}
}
#endif
@@ -94,11 +94,11 @@ void disable_dsm2(uint32_t port)
void init_ppm(uint32_t port)
{
if (port == EXTERNAL_MODULE) {
init_pa7_ppm();
extmodulePpmStart();
}
#if defined(TARANIS_INTERNAL_PPM)
else if (port == INTERNAL_MODULE) {
init_pa10_ppm();
intmodulePpmStart();
}
#endif
}
@@ -106,56 +106,54 @@ void init_ppm(uint32_t port)
void disable_ppm(uint32_t port)
{
if (port == EXTERNAL_MODULE) {
disable_pa7_ppm();
extmodulePpmStop();
}
#if defined(TARANIS_INTERNAL_PPM)
else if (port == INTERNAL_MODULE) {
disable_pa10_ppm();
intmodulePpmStop();
}
#endif
}
void set_external_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
{
TIM8->CCR2 = idleTime;
TIM8->CCR1 = delay;
EXTMODULE_TIMER->CCR2 = idleTime;
EXTMODULE_TIMER->CCR1 = delay;
// we are using complementary output so logic has to be reversed here
TIM8->CCER = TIM_CCER_CC1NE | (positive ? 0 : TIM_CCER_CC1NP);
EXTMODULE_TIMER->CCER = TIM_CCER_CC1NE | (positive ? 0 : TIM_CCER_CC1NP);
}
#if defined(TARANIS_INTERNAL_PPM)
void set_internal_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
{
TIM1->CCR2 = idleTime;
TIM1->CCR3 = delay;
TIM1->CCER = TIM_CCER_CC3E | (positive ? TIM_CCER_CC3P : 0);
INTMODULE_TIMER->CCR2 = idleTime;
INTMODULE_TIMER->CCR3 = delay;
INTMODULE_TIMER->CCER = TIM_CCER_CC3E | (positive ? TIM_CCER_CC3P : 0);
}
#endif
void init_no_pulses(uint32_t port)
{
if (port == INTERNAL_MODULE)
init_pa10_none();
intmoduleNoneStart();
else
init_pa7_none();
extmoduleNoneStart();
}
void disable_no_pulses(uint32_t port)
{
if (port == INTERNAL_MODULE)
disable_pa10_none();
intmoduleNoneStop();
else
disable_pa7_none();
extmoduleNoneStop();
}
static void init_pa10_none()
static void intmoduleNoneStart()
{
INTERNAL_MODULE_OFF();
// Timer1, channel 3
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(INTMODULE_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_InitStructure.GPIO_Pin = INTMODULE_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
@@ -165,89 +163,79 @@ static void init_pa10_none()
GPIO_SetBits(INTMODULE_GPIO, INTMODULE_GPIO_PIN) ; // Set high
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock
TIM1->CR1 &= ~TIM_CR1_CEN ;
TIM1->ARR = 36000 ; // 18mS
TIM1->CCR2 = 32000 ; // Update time
TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
INTMODULE_TIMER->ARR = 36000 ; // 18mS
INTMODULE_TIMER->CCR2 = 32000 ; // Update time
INTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM1->CCER = TIM_CCER_CC3E ;
INTMODULE_TIMER->CCER = TIM_CCER_CC3E ;
TIM1->CCMR2 = 0 ;
TIM1->EGR = 1 ; // Restart
INTMODULE_TIMER->CCMR2 = 0 ;
INTMODULE_TIMER->EGR = 1 ; // Restart
TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM1->CR1 |= TIM_CR1_CEN ;
INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
INTMODULE_TIMER->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM1_CC_IRQn) ;
NVIC_SetPriority(TIM1_CC_IRQn, 7);
}
static void disable_pa10_none()
static void intmoduleNoneStop()
{
NVIC_DisableIRQ(TIM1_CC_IRQn) ;
TIM1->DIER &= ~TIM_DIER_CC2IE ;
TIM1->CR1 &= ~TIM_CR1_CEN ;
INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ;
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
}
static void init_pa7_none()
static void extmoduleNoneStart()
{
if (!IS_TRAINER_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
}
// Timer8
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(EXTMODULE_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_InitStructure.GPIO_Pin = EXTMODULE_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(EXTMODULE_GPIO, &GPIO_InitStructure);
GPIO_SetBits(EXTMODULE_GPIO, EXTMODULE_GPIO_PIN) ; // Set high
GPIO_SetBits(EXTMODULE_GPIO, EXTMODULE_GPIO_PIN); // Set high
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
TIM8->ARR = 36000 ; // 18mS
TIM8->CCR2 = 32000 ; // Update time
TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
EXTMODULE_TIMER->ARR = 36000 ; // 18mS
EXTMODULE_TIMER->CCR2 = 32000 ; // Update time
EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM8->CCMR2 = 0 ;
TIM8->EGR = 1 ; // Restart
EXTMODULE_TIMER->CCMR2 = 0 ;
EXTMODULE_TIMER->EGR = 1 ; // Restart
TIM8->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM8->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
NVIC_SetPriority(TIM8_CC_IRQn, 7);
EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ;
NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7);
}
static void disable_pa7_none()
static void extmoduleNoneStop()
{
NVIC_DisableIRQ(TIM8_CC_IRQn) ;
TIM8->DIER &= ~TIM_DIER_CC2IE ;
TIM8->CR1 &= ~TIM_CR1_CEN ;
NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ;
EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ;
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
}
static void init_pa10_pxx()
static void intmodulePxxStart()
{
INTERNAL_MODULE_ON();
// Timer1, channel 3
setupPulsesPXX(INTERNAL_MODULE) ; // TODO not here!
// RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(INTMODULE_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_PinAFConfig(INTMODULE_GPIO, INTMODULE_GPIO_PinSource, GPIO_AF_TIM1);
GPIO_PinAFConfig(INTMODULE_GPIO, INTMODULE_GPIO_PinSource, INTMODULE_GPIO_AF);
GPIO_InitStructure.GPIO_Pin = INTMODULE_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
@@ -255,45 +243,42 @@ static void init_pa10_pxx()
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(INTMODULE_GPIO, &GPIO_InitStructure);
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock
TIM1->CR1 &= ~TIM_CR1_CEN ;
TIM1->ARR = 18000 ; // 9mS
TIM1->CCR2 = 15000 ; // Update time
TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM1->CCER = TIM_CCER_CC3E ;
TIM1->CR2 = TIM_CR2_OIS3 ; // O/P idle high
TIM1->BDTR = TIM_BDTR_MOE ; // Enable outputs
TIM1->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
TIM1->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_0 ; // Force O/P high
TIM1->EGR = 1 ; // Restart
TIM1->DIER |= TIM_DIER_CC3DE ; // Enable DMA on CC3 match
TIM1->DCR = 15 ; // DMA to CC1
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
INTMODULE_TIMER->ARR = 18000 ; // 9mS
INTMODULE_TIMER->CCR2 = 15000 ; // Update time
INTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
INTMODULE_TIMER->CCER = TIM_CCER_CC3E ;
INTMODULE_TIMER->CR2 = TIM_CR2_OIS3 ; // O/P idle high
INTMODULE_TIMER->BDTR = TIM_BDTR_MOE ; // Enable outputs
INTMODULE_TIMER->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_0 ; // Force O/P high
INTMODULE_TIMER->EGR = 1 ; // Restart
INTMODULE_TIMER->DIER |= TIM_DIER_CC3DE ; // Enable DMA on CC3 match
INTMODULE_TIMER->DCR = 15 ; // DMA to CC1
// Enable the DMA channel here, DMA2 stream 6, channel 6
DMA2_Stream6->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6 ; // Write ones to clear bits
DMA2_Stream6->CR = DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream6->PAR = CONVERT_PTR_UINT(&TIM1->DMAR);
DMA2_Stream6->PAR = CONVERT_PTR_UINT(&INTMODULE_TIMER->DMAR);
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&modulePulsesData[INTERNAL_MODULE].pxx.pulses[1]);
DMA2_Stream6->CR |= DMA_SxCR_EN ; // Enable DMA
TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM1->CR1 |= TIM_CR1_CEN ;
INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0 ; // Toggle CC1 o/p
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
INTMODULE_TIMER->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM1_CC_IRQn);
NVIC_SetPriority(TIM1_CC_IRQn, 7);
}
static void disable_pa10_pxx()
static void intmodulePxxStop()
{
DMA2_Stream6->CR &= ~DMA_SxCR_EN ; // Disable DMA
NVIC_DisableIRQ(TIM1_CC_IRQn) ;
TIM1->DIER &= ~TIM_DIER_CC2IE ;
TIM1->CR1 &= ~TIM_CR1_CEN ;
INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ;
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
INTERNAL_MODULE_OFF();
}
@@ -301,53 +286,49 @@ static void disable_pa10_pxx()
// PPM output
// Timer 1, channel 1 on PA8 for prototype
// Pin is AF1 function for timer 1
static void init_pa10_ppm()
static void intmodulePpmStart()
{
INTERNAL_MODULE_ON();
// Timer1
modulePulsesData[INTERNAL_MODULE].ppm.ptr = modulePulsesData[INTERNAL_MODULE].ppm.pulses;
//RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
RCC_AHB1PeriphClockCmd(INTMODULE_RCC_AHB1Periph_GPIO, ENABLE);
configure_pins( INTMODULE_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25) ;
configure_pins(INTMODULE_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25);
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock
TIM1->CR1 &= ~TIM_CR1_CEN ;
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
// setupPulsesPPM() is also configuring registers,
// so it has to be called after the peripheral is enabled
setupPulsesPPM(INTERNAL_MODULE) ;
TIM1->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
INTMODULE_TIMER->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
INTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM1->CCER = TIM_CCER_CC3E ;
INTMODULE_TIMER->CCER = TIM_CCER_CC3E ;
TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 ; // PWM mode 1
TIM1->CCMR1 = TIM_CCMR1_OC2PE ; // PWM mode 1
TIM1->BDTR = TIM_BDTR_MOE ;
TIM1->EGR = 1 ;
TIM1->DIER = TIM_DIER_UDE ;
INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 ; // PWM mode 1
INTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC2PE ; // PWM mode 1
INTMODULE_TIMER->BDTR = TIM_BDTR_MOE ;
INTMODULE_TIMER->EGR = 1 ;
INTMODULE_TIMER->DIER = TIM_DIER_UDE ;
TIM1->SR &= ~TIM_SR_UIF ; // Clear flag
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM1->DIER |= TIM_DIER_CC2IE ;
TIM1->DIER |= TIM_DIER_UIE ;
INTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ;
INTMODULE_TIMER->DIER |= TIM_DIER_UIE ;
TIM1->CR1 = TIM_CR1_CEN ;
INTMODULE_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM1_CC_IRQn) ;
NVIC_SetPriority(TIM1_CC_IRQn, 7);
NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn) ;
NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 7);
}
static void disable_pa10_ppm()
static void intmodulePpmStop()
{
NVIC_DisableIRQ(TIM1_CC_IRQn) ;
NVIC_DisableIRQ(TIM1_UP_TIM10_IRQn) ;
TIM1->DIER &= ~TIM_DIER_CC2IE & ~TIM_DIER_UIE ;
TIM1->CR1 &= ~TIM_CR1_CEN ;
INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE & ~TIM_DIER_UIE ;
INTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
INTERNAL_MODULE_OFF();
}
@@ -356,8 +337,8 @@ static void disable_pa10_ppm()
#if !defined(SIMU)
extern "C" void TIM1_CC_IRQHandler()
{
TIM1->DIER &= ~TIM_DIER_CC2IE; // stop this interrupt
TIM1->SR &= ~TIM_SR_CC2IF; // clear flag
INTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // stop this interrupt
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // clear flag
DMA2_Stream6->CR &= ~DMA_SxCR_EN; // disable DMA, it will have the whole of the execution time of setupPulses() to actually stop
setupPulses(INTERNAL_MODULE);
@@ -366,165 +347,150 @@ extern "C" void TIM1_CC_IRQHandler()
DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6;
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&modulePulsesData[INTERNAL_MODULE].pxx.pulses[1]);
DMA2_Stream6->CR |= DMA_SxCR_EN; // enable DMA
TIM1->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
TIM1->DIER |= TIM_DIER_CC2IE; // enable this interrupt
INTMODULE_TIMER->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // enable this interrupt
}
#if defined(TARANIS_INTERNAL_PPM)
else if (s_current_protocol[INTERNAL_MODULE] == PROTO_PPM) {
modulePulsesData[INTERNAL_MODULE].ppm.ptr = modulePulsesData[INTERNAL_MODULE].ppm.pulses;
TIM1->DIER |= TIM_DIER_UDE;
TIM1->SR &= ~TIM_SR_UIF;
TIM1->DIER |= TIM_DIER_UIE;
INTMODULE_TIMER->DIER |= TIM_DIER_UDE;
INTMODULE_TIMER->SR &= ~TIM_SR_UIF;
INTMODULE_TIMER->DIER |= TIM_DIER_UIE;
}
#endif
else {
TIM1->DIER |= TIM_DIER_CC2IE;
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE;
}
}
extern "C" void TIM1_UP_TIM10_IRQHandler()
{
TIM1->SR &= ~TIM_SR_UIF ; // Clear flag
INTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
TIM1->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
INTMODULE_TIMER->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
if ( *modulePulsesData[INTERNAL_MODULE].ppm.ptr == 0 )
{
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear this flag
TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear this flag
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
}
}
#endif
void init_pa7_pxx()
void extmodulePxxStart()
{
EXTERNAL_MODULE_ON();
// Timer8
setupPulsesPXX(EXTERNAL_MODULE);
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(EXTMODULE_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_PinAFConfig(EXTMODULE_GPIO, EXTMODULE_GPIO_PinSource, GPIO_AF_TIM8);
GPIO_PinAFConfig(EXTMODULE_GPIO, EXTMODULE_GPIO_PinSource, EXTMODULE_GPIO_AF);
GPIO_InitStructure.GPIO_Pin = EXTMODULE_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(EXTMODULE_GPIO, &GPIO_InitStructure);
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
TIM8->ARR = 18000 ; // 9mS
TIM8->CCR2 = 15000 ; // Update time
TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM8->CCER = TIM_CCER_CC1NE ;
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0];
TIM8->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
TIM8->EGR = 1 ; // Restart
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
EXTMODULE_TIMER->ARR = 18000 ; // 9mS
EXTMODULE_TIMER->CCR2 = 15000 ; // Update time
EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
EXTMODULE_TIMER->CCER = TIM_CCER_CC1NE ;
EXTMODULE_TIMER->CR2 = TIM_CR2_OIS1 ; // O/P idle high
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE ; // Enable outputs
EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0];
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
EXTMODULE_TIMER->EGR = 1 ; // Restart
// TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
// TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match
TIM8->DCR = 13 ; // DMA to CC1
EXTMODULE_TIMER->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match
EXTMODULE_TIMER->DCR = 13 ; // DMA to CC1
// TIM8->CR1 = TIM_CR1_OPM ; // Just run once
// Enable the DMA channel here, DMA2 stream 2, channel 7
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].pxx.pulses[1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM8->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
NVIC_SetPriority(TIM8_CC_IRQn, 7);
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ;
NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7);
}
static void disable_pa7_pxx()
static void extmodulePxxStop()
{
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
NVIC_DisableIRQ(TIM8_CC_IRQn) ;
TIM8->DIER &= ~TIM_DIER_CC2IE ;
TIM8->CR1 &= ~TIM_CR1_CEN ;
NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ;
EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ;
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
if (!IS_TRAINER_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
}
}
#if defined(DSM2)
static void init_pa7_dsm2()
static void extmoduleDsm2Start()
{
EXTERNAL_MODULE_ON();
// Timer8
setupPulsesDSM2(EXTERNAL_MODULE);
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(EXTMODULE_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_PinAFConfig(EXTMODULE_GPIO, EXTMODULE_GPIO_PinSource, GPIO_AF_TIM8);
GPIO_PinAFConfig(EXTMODULE_GPIO, EXTMODULE_GPIO_PinSource, EXTMODULE_GPIO_AF);
GPIO_InitStructure.GPIO_Pin = EXTMODULE_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(EXTMODULE_GPIO, &GPIO_InitStructure);
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
RCC->AHB1ENR |= RCC_AHB1ENR_DMA2EN ; // Enable DMA2 clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
TIM8->ARR = 44000 ; // 22mS
TIM8->CCR2 = 40000 ; // Update time
TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0];
TIM8->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
TIM8->EGR = 1 ; // Restart
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
EXTMODULE_TIMER->ARR = 44000 ; // 22mS
EXTMODULE_TIMER->CCR2 = 40000 ; // Update time
EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
EXTMODULE_TIMER->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
EXTMODULE_TIMER->CR2 = TIM_CR2_OIS1 ; // O/P idle high
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE ; // Enable outputs
EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0];
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
EXTMODULE_TIMER->EGR = 1 ; // Restart
// TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
// TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match
TIM8->DCR = 13 ; // DMA to CC1
EXTMODULE_TIMER->DIER |= TIM_DIER_CC1DE ; // Enable DMA on CC1 match
EXTMODULE_TIMER->DCR = 13 ; // DMA to CC1
// TIM8->CR1 = TIM_CR1_OPM ; // Just run once
// Enable the DMA channel here, DMA2 stream 2, channel 7
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->DMAR);
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[1]);
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
// DMA2_Stream2->NDTR = 100 ;
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM8->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
NVIC_SetPriority(TIM8_CC_IRQn, 7);
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0 ; // Toggle CC1 o/p
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN ;
NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ;
NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7);
}
static void disable_pa7_dsm2()
static void extmoduleDsm2Stop()
{
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
NVIC_DisableIRQ(TIM8_CC_IRQn) ;
TIM8->DIER &= ~TIM_DIER_CC2IE ;
TIM8->CR1 &= ~TIM_CR1_CEN ;
NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ;
EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ;
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
if (!IS_TRAINER_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
}
@@ -534,48 +500,46 @@ static void disable_pa7_dsm2()
// PPM output
// Timer 1, channel 1 on PA8 for prototype
// Pin is AF1 function for timer 1
static void init_pa7_ppm()
static void extmodulePpmStart()
{
EXTERNAL_MODULE_ON();
// Timer1
modulePulsesData[EXTERNAL_MODULE].ppm.ptr = modulePulsesData[EXTERNAL_MODULE].ppm.pulses;
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
configure_pins( EXTMODULE_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25) ;
RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
TIM8->CR1 &= ~TIM_CR1_CEN ;
configure_pins(EXTMODULE_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25);
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
// setupPulsesPPM() is also configuring registers,
// so it has to be called after the peripheral is enabled
setupPulsesPPM(EXTERNAL_MODULE) ;
TIM8->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ;
TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
EXTMODULE_TIMER->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ;
EXTMODULE_TIMER->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE ; // PWM mode 1
TIM8->BDTR = TIM_BDTR_MOE ;
TIM8->EGR = 1 ;
TIM8->DIER = TIM_DIER_UDE ;
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE ; // PWM mode 1
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE ;
EXTMODULE_TIMER->EGR = 1 ;
EXTMODULE_TIMER->DIER = TIM_DIER_UDE ;
TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM8->DIER |= TIM_DIER_CC2IE ;
TIM8->DIER |= TIM_DIER_UIE ;
EXTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ;
EXTMODULE_TIMER->DIER |= TIM_DIER_UIE ;
TIM8->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
NVIC_SetPriority(TIM8_CC_IRQn, 7);
EXTMODULE_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(EXTMODULE_TIMER_IRQn) ;
NVIC_SetPriority(EXTMODULE_TIMER_IRQn, 7);
NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn) ;
NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 7);
}
static void disable_pa7_ppm()
static void extmodulePpmStop()
{
NVIC_DisableIRQ(TIM8_CC_IRQn) ;
NVIC_DisableIRQ(EXTMODULE_TIMER_IRQn) ;
NVIC_DisableIRQ(TIM8_UP_TIM13_IRQn) ;
TIM8->DIER &= ~TIM_DIER_CC2IE & ~TIM_DIER_UIE ;
TIM8->CR1 &= ~TIM_CR1_CEN ;
EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE & ~TIM_DIER_UIE ;
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN ;
if (!IS_TRAINER_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
}
@@ -584,8 +548,8 @@ static void disable_pa7_ppm()
#if !defined(SIMU)
extern "C" void TIM8_CC_IRQHandler()
{
TIM8->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
setupPulses(EXTERNAL_MODULE) ;
@@ -594,8 +558,8 @@ extern "C" void TIM8_CC_IRQHandler()
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].pxx.pulses[1]);
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0];
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0];
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
}
#if defined(DSM2)
else if (s_current_protocol[EXTERNAL_MODULE] >= PROTO_DSM2_LP45 && s_current_protocol[EXTERNAL_MODULE] <= PROTO_DSM2_DSMX) {
@@ -603,29 +567,29 @@ extern "C" void TIM8_CC_IRQHandler()
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[1]);
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0];
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0];
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
}
#endif
else if (s_current_protocol[EXTERNAL_MODULE] == PROTO_PPM) {
modulePulsesData[EXTERNAL_MODULE].ppm.ptr = modulePulsesData[EXTERNAL_MODULE].ppm.pulses;
TIM8->DIER |= TIM_DIER_UDE ;
TIM8->SR &= ~TIM_SR_UIF ; // Clear this flag
TIM8->DIER |= TIM_DIER_UIE ; // Enable this interrupt
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE ;
EXTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear this flag
EXTMODULE_TIMER->DIER |= TIM_DIER_UIE ; // Enable this interrupt
}
else {
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
}
}
extern "C" void TIM8_UP_TIM13_IRQHandler()
{
TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
EXTMODULE_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
TIM8->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ;
EXTMODULE_TIMER->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ;
if (*modulePulsesData[EXTERNAL_MODULE].ppm.ptr == 0) {
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear this flag
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear this flag
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
}
}
#endif
radio/src/targets/taranis/pwr_driver.c
-4
View File
@@ -43,10 +43,6 @@ extern volatile uint32_t g_tmr10ms;
void pwrInit()
{
GPIO_InitTypeDef GPIO_InitStructure;
/* GPIOC GPIOD clock enable */
RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph_GPIO, ENABLE);
/* GPIO Configuration*/
GPIO_InitStructure.GPIO_Pin = PWR_GPIO_PIN_ON;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
radio/src/targets/taranis/telemetry_driver.cpp
+1 -5
View File
@@ -48,8 +48,6 @@ void telemetryPortInit(uint32_t baudrate)
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(TELEMETRY_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_PinAFConfig(TELEMETRY_GPIO, TELEMETRY_GPIO_PinSource_RX, TELEMETRY_GPIO_AF);
GPIO_PinAFConfig(TELEMETRY_GPIO, TELEMETRY_GPIO_PinSource_TX, TELEMETRY_GPIO_AF);
@@ -65,9 +63,7 @@ void telemetryPortInit(uint32_t baudrate)
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(TELEMETRY_GPIO_DIR, &GPIO_InitStructure);
GPIO_ResetBits(TELEMETRY_GPIO_DIR, TELEMETRY_GPIO_PIN_DIR);
RCC_APB1PeriphClockCmd(TELEMETRY_RCC_APB1Periph_USART, ENABLE);
USART_InitStructure.USART_BaudRate = baudrate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
radio/src/targets/taranis/top_lcd_driver.cpp
+1 -1
View File
@@ -249,7 +249,7 @@ extern "C" void TIM8_BRK_TIM12_IRQHandler()
void topLcdInit()
{
RCC_AHB1PeriphClockCmd(TOPLCD_RCC_AHB1Periph_GPIO, ENABLE);
RCC_AHB1PeriphClockCmd(TOPLCD_RCC_AHB1Periph, ENABLE);
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = TOPLCD_GPIO_PIN_DATA | TOPLCD_GPIO_PIN_WR |TOPLCD_GPIO_PIN_BL|TOPLCD_GPIO_PIN_CS1|TOPLCD_GPIO_PIN_CS2;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
radio/src/targets/taranis/trainer_driver.cpp
+75 -85
View File
@@ -45,46 +45,44 @@ void init_trainer_ppm()
{
trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
configure_pins( TRAINER_GPIO_PIN_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25) ;
configure_pins( TRAINER_GPIO_PIN_IN, PIN_PORTA | PIN_INPUT ) ;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
TIM3->CR1 &= ~TIM_CR1_CEN ;
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ;
// setupTrainerPulses() is also configuring registers,
// so it has to be called after the peripheral is enabled
setupTrainerPulses() ;
TIM3->ARR = *trainerPulsesData.ppm.ptr++ ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
TIM3->BDTR = TIM_BDTR_MOE ;
TIM3->EGR = 1 ;
TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++ ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
TRAINER_TIMER->BDTR = TIM_BDTR_MOE ;
TRAINER_TIMER->EGR = 1 ;
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
TIM3->DIER |= TIM_DIER_CC1IE ;
TIM3->DIER |= TIM_DIER_UIE ;
TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear flag
TRAINER_TIMER->DIER |= TIM_DIER_CC1IE ;
TRAINER_TIMER->DIER |= TIM_DIER_UIE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM3_IRQn) ;
NVIC_SetPriority(TIM3_IRQn, 7);
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
}
// TODO - testing
void stop_trainer_ppm()
{
configure_pins( TRAINER_GPIO_PIN_OUT, PIN_INPUT | PIN_PORTC ) ; // Pin as input
TIM3->DIER = 0 ; // Stop Interrupt
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
TRAINER_TIMER->DIER = 0 ; // Stop Interrupt
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt
}
void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
{
TIM3->CCR1 = idleTime;
TIM3->CCR4 = delay;
TIM3->CCER = TIM_CCER_CC4E | (positive ? TIM_CCER_CC4P : 0);
TRAINER_TIMER->CCR1 = idleTime;
TRAINER_TIMER->CCR4 = delay;
TRAINER_TIMER->CCER = TIM_CCER_CC4E | (positive ? TIM_CCER_CC4P : 0);
}
// Trainer capture, PC8, Timer 3 channel 3
@@ -92,33 +90,31 @@ void init_trainer_capture()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_InitStructure.GPIO_Pin = TRAINER_GPIO_PIN_IN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(TRAINER_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(TRAINER_GPIO, GPIO_PinSource8, GPIO_AF_TIM3);
GPIO_PinAFConfig(TRAINER_GPIO, TRAINER_GPIO_PinSource_IN, TRAINER_GPIO_AF);
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ;
TIM3->ARR = 0xFFFF ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CR2 = 0 ;
TIM3->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ;
TIM3->CCER = TIM_CCER_CC3E ;
TIM3->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
TIM3->DIER |= TIM_DIER_CC3IE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM3_IRQn) ;
NVIC_SetPriority(TIM3_IRQn, 7);
TRAINER_TIMER->ARR = 0xFFFF ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CR2 = 0 ;
TRAINER_TIMER->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ;
TRAINER_TIMER->CCER = TIM_CCER_CC3E ;
TRAINER_TIMER->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
TRAINER_TIMER->DIER |= TIM_DIER_CC3IE ;
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
}
void stop_trainer_capture()
{
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
TIM3->DIER = 0; // Stop Interrupt
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter
TRAINER_TIMER->DIER = 0; // Stop Interrupt
NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt
}
#if !defined(SIMU)
@@ -130,15 +126,15 @@ extern "C" void TIM3_IRQHandler()
bool doCapture = false ;
// What mode? in or out?
if ( (TIM3->DIER & TIM_DIER_CC3IE ) && ( TIM3->SR & TIM_SR_CC3IF ) ) {
if ( (TRAINER_TIMER->DIER & TIM_DIER_CC3IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC3IF ) ) {
// capture mode on trainer jack
capture = TIM3->CCR3 ;
capture = TRAINER_TIMER->CCR3 ;
doCapture = true;
}
if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
if ( ( TRAINER_TIMER->DIER & TIM_DIER_CC2IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC2IF ) ) {
// capture mode on heartbeat pin (external module)
capture = TIM3->CCR2 ;
capture = TRAINER_TIMER->CCR2 ;
doCapture = true ;
}
@@ -165,26 +161,26 @@ extern "C" void TIM3_IRQHandler()
}
// PPM out compare interrupt
if ( ( TIM3->DIER & TIM_DIER_CC1IE ) && ( TIM3->SR & TIM_SR_CC1IF ) ) {
if ( ( TRAINER_TIMER->DIER & TIM_DIER_CC1IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC1IF ) ) {
// compare interrupt
TIM3->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
TRAINER_TIMER->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt
TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear flag
setupTrainerPulses() ;
trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
TIM3->DIER |= TIM_DIER_UDE ;
TIM3->SR &= ~TIM_SR_UIF ; // Clear this flag
TIM3->DIER |= TIM_DIER_UIE ; // Enable this interrupt
TRAINER_TIMER->DIER |= TIM_DIER_UDE ;
TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear this flag
TRAINER_TIMER->DIER |= TIM_DIER_UIE ; // Enable this interrupt
}
// PPM out update interrupt
if ( (TIM3->DIER & TIM_DIER_UIE) && ( TIM3->SR & TIM_SR_UIF ) ) {
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
TIM3->ARR = *trainerPulsesData.ppm.ptr++ ;
if ( (TRAINER_TIMER->DIER & TIM_DIER_UIE) && ( TRAINER_TIMER->SR & TIM_SR_UIF ) ) {
TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++ ;
if ( *trainerPulsesData.ppm.ptr == 0 ) {
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear this flag
TIM3->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear this flag
TRAINER_TIMER->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
}
}
}
@@ -194,27 +190,25 @@ void init_cppm_on_heartbeat_capture(void)
{
EXTERNAL_MODULE_ON();
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
configure_pins( 0x0080, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 ) ;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
configure_pins(HEARTBEAT_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2);
TIM3->ARR = 0xFFFF ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CR2 = 0 ;
TIM3->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0 ;
TIM3->CCER = TIM_CCER_CC2E ;
TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM3->DIER |= TIM_DIER_CC2IE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority(TIM3_IRQn, 7);
NVIC_EnableIRQ(TIM3_IRQn) ;
TRAINER_TIMER->ARR = 0xFFFF ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CR2 = 0 ;
TRAINER_TIMER->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0 ;
TRAINER_TIMER->CCER = TIM_CCER_CC2E ;
TRAINER_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
TRAINER_TIMER->DIER |= TIM_DIER_CC2IE ;
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
}
void stop_cppm_on_heartbeat_capture(void)
{
TIM3->DIER = 0 ;
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
TRAINER_TIMER->DIER = 0 ;
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt
if (!IS_PULSES_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
@@ -228,19 +222,15 @@ void init_sbus_on_heartbeat_capture()
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_PinAFConfig(GPIOC, HEARTBEAT_GPIO_PinSource, HEARTBEAT_GPIO_AF);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource7, GPIO_AF_USART6);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_InitStructure.GPIO_Pin = HEARTBEAT_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOC, &GPIO_InitStructure);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
USART_InitStructure.USART_BaudRate = 100000;
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
@@ -248,18 +238,18 @@ void init_sbus_on_heartbeat_capture()
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx;
USART_Init(USART6, &USART_InitStructure);
USART_Cmd(USART6, ENABLE);
USART_ITConfig(USART6, USART_IT_RXNE, ENABLE);
USART_Init(HEARTBEAT_USART, &USART_InitStructure);
USART_Cmd(HEARTBEAT_USART, ENABLE);
USART_ITConfig(HEARTBEAT_USART, USART_IT_RXNE, ENABLE);
NVIC_SetPriority(USART6_IRQn, 6);
NVIC_EnableIRQ(USART6_IRQn);
NVIC_SetPriority(HEARTBEAT_USART_IRQn, 6);
NVIC_EnableIRQ(HEARTBEAT_USART_IRQn);
}
void stop_sbus_on_heartbeat_capture(void)
{
configure_pins( 0x0080, PIN_INPUT | PIN_PORTC ) ;
NVIC_DisableIRQ(USART6_IRQn) ;
configure_pins(HEARTBEAT_GPIO_PIN, PIN_INPUT | PIN_PORTC);
NVIC_DisableIRQ(HEARTBEAT_USART_IRQn) ;
if (!IS_PULSES_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
@@ -267,20 +257,20 @@ void stop_sbus_on_heartbeat_capture(void)
}
#if !defined(SIMU) && !defined(REV9E)
extern "C" void USART6_IRQHandler()
extern "C" void HEARTBEAT_USART_IRQHandler()
{
uint32_t status;
uint8_t data;
status = USART6->SR;
status = HEARTBEAT_USART->SR;
while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) {
data = USART6->DR;
data = HEARTBEAT_USART->DR;
if (!(status & USART_FLAG_ERRORS))
sbusFifo.push(data);
status = USART6->SR;
status = HEARTBEAT_USART->SR;
}
}
#endif
radio/src/targets/taranis/uart3_driver.cpp
+9 -13
View File
@@ -46,8 +46,6 @@ void uart3Setup(unsigned int baudrate)
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(SERIAL_RCC_AHB1Periph_GPIO, ENABLE);
GPIO_PinAFConfig(SERIAL_GPIO, SERIAL_GPIO_PinSource_RX, SERIAL_GPIO_AF);
GPIO_PinAFConfig(SERIAL_GPIO, SERIAL_GPIO_PinSource_TX, SERIAL_GPIO_AF);
@@ -58,8 +56,6 @@ void uart3Setup(unsigned int baudrate)
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(SERIAL_GPIO, &GPIO_InitStructure);
RCC_APB1PeriphClockCmd(SERIAL_RCC_APB1Periph_USART, ENABLE);
USART_InitStructure.USART_BaudRate = baudrate;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
@@ -73,13 +69,13 @@ void uart3Setup(unsigned int baudrate)
USART_ITConfig(SERIAL_USART, USART_IT_RXNE, ENABLE);
USART_ITConfig(SERIAL_USART, USART_IT_TXE, DISABLE);
NVIC_SetPriority(USART3_IRQn, 7);
NVIC_EnableIRQ(USART3_IRQn);
NVIC_SetPriority(SERIAL_USART_IRQn, 7);
NVIC_EnableIRQ(SERIAL_USART_IRQn);
}
void uart3Init(unsigned int mode, unsigned int protocol)
{
USART_DeInit(USART3);
USART_DeInit(SERIAL_USART);
uart3Mode = false;
@@ -120,16 +116,16 @@ void debugPutc(const char c)
void uart3SbusInit()
{
uart3Setup(100000);
USART3->CR1 |= USART_CR1_M | USART_CR1_PCE ;
SERIAL_USART->CR1 |= USART_CR1_M | USART_CR1_PCE ;
}
void uart3Stop()
{
USART_DeInit(USART3);
USART_DeInit(SERIAL_USART);
}
#if !defined(SIMU)
extern "C" void USART3_IRQHandler(void)
extern "C" void SERIAL_USART_IRQHandler(void)
{
// Send
if (USART_GetITStatus(SERIAL_USART, USART_IT_TXE) != RESET) {
@@ -144,9 +140,9 @@ extern "C" void USART3_IRQHandler(void)
}
// Receive
uint32_t status = USART3->SR;
uint32_t status = SERIAL_USART->SR;
while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) {
uint8_t data = USART3->DR;
uint8_t data = SERIAL_USART->DR;
if (!(status & USART_FLAG_ERRORS)) {
switch (uart3Mode) {
@@ -159,7 +155,7 @@ extern "C" void USART3_IRQHandler(void)
}
}
status = USART3->SR;
status = SERIAL_USART->SR;
}
}
#endif