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[Taranis] More stuff moved to hal

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This commit is contained in:
bsongis
2015-06-16 22:44:10 +02:00
parent bbdadf57e7
commit 5764cdee57
16 changed files with 440 additions and 535 deletions
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radio/src/targets/taranis/trainer_driver.cpp
+75 -85
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@@ -45,46 +45,44 @@ void init_trainer_ppm()
{
trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
configure_pins( TRAINER_GPIO_PIN_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25) ;
configure_pins( TRAINER_GPIO_PIN_IN, PIN_PORTA | PIN_INPUT ) ;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
TIM3->CR1 &= ~TIM_CR1_CEN ;
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ;
// setupTrainerPulses() is also configuring registers,
// so it has to be called after the peripheral is enabled
setupTrainerPulses() ;
TIM3->ARR = *trainerPulsesData.ppm.ptr++ ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
TIM3->BDTR = TIM_BDTR_MOE ;
TIM3->EGR = 1 ;
TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++ ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
TRAINER_TIMER->BDTR = TIM_BDTR_MOE ;
TRAINER_TIMER->EGR = 1 ;
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
TIM3->DIER |= TIM_DIER_CC1IE ;
TIM3->DIER |= TIM_DIER_UIE ;
TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear flag
TRAINER_TIMER->DIER |= TIM_DIER_CC1IE ;
TRAINER_TIMER->DIER |= TIM_DIER_UIE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM3_IRQn) ;
NVIC_SetPriority(TIM3_IRQn, 7);
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
}
// TODO - testing
void stop_trainer_ppm()
{
configure_pins( TRAINER_GPIO_PIN_OUT, PIN_INPUT | PIN_PORTC ) ; // Pin as input
TIM3->DIER = 0 ; // Stop Interrupt
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
TRAINER_TIMER->DIER = 0 ; // Stop Interrupt
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt
}
void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
{
TIM3->CCR1 = idleTime;
TIM3->CCR4 = delay;
TIM3->CCER = TIM_CCER_CC4E | (positive ? TIM_CCER_CC4P : 0);
TRAINER_TIMER->CCR1 = idleTime;
TRAINER_TIMER->CCR4 = delay;
TRAINER_TIMER->CCER = TIM_CCER_CC4E | (positive ? TIM_CCER_CC4P : 0);
}
// Trainer capture, PC8, Timer 3 channel 3
@@ -92,33 +90,31 @@ void init_trainer_capture()
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_InitStructure.GPIO_Pin = TRAINER_GPIO_PIN_IN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(TRAINER_GPIO, &GPIO_InitStructure);
GPIO_PinAFConfig(TRAINER_GPIO, GPIO_PinSource8, GPIO_AF_TIM3);
GPIO_PinAFConfig(TRAINER_GPIO, TRAINER_GPIO_PinSource_IN, TRAINER_GPIO_AF);
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ;
TIM3->ARR = 0xFFFF ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CR2 = 0 ;
TIM3->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ;
TIM3->CCER = TIM_CCER_CC3E ;
TIM3->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
TIM3->DIER |= TIM_DIER_CC3IE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TIM3_IRQn) ;
NVIC_SetPriority(TIM3_IRQn, 7);
TRAINER_TIMER->ARR = 0xFFFF ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CR2 = 0 ;
TRAINER_TIMER->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ;
TRAINER_TIMER->CCER = TIM_CCER_CC3E ;
TRAINER_TIMER->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
TRAINER_TIMER->DIER |= TIM_DIER_CC3IE ;
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
}
void stop_trainer_capture()
{
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
TIM3->DIER = 0; // Stop Interrupt
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter
TRAINER_TIMER->DIER = 0; // Stop Interrupt
NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt
}
#if !defined(SIMU)
@@ -130,15 +126,15 @@ extern "C" void TIM3_IRQHandler()
bool doCapture = false ;
// What mode? in or out?
if ( (TIM3->DIER & TIM_DIER_CC3IE ) && ( TIM3->SR & TIM_SR_CC3IF ) ) {
if ( (TRAINER_TIMER->DIER & TIM_DIER_CC3IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC3IF ) ) {
// capture mode on trainer jack
capture = TIM3->CCR3 ;
capture = TRAINER_TIMER->CCR3 ;
doCapture = true;
}
if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
if ( ( TRAINER_TIMER->DIER & TIM_DIER_CC2IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC2IF ) ) {
// capture mode on heartbeat pin (external module)
capture = TIM3->CCR2 ;
capture = TRAINER_TIMER->CCR2 ;
doCapture = true ;
}
@@ -165,26 +161,26 @@ extern "C" void TIM3_IRQHandler()
}
// PPM out compare interrupt
if ( ( TIM3->DIER & TIM_DIER_CC1IE ) && ( TIM3->SR & TIM_SR_CC1IF ) ) {
if ( ( TRAINER_TIMER->DIER & TIM_DIER_CC1IE ) && ( TRAINER_TIMER->SR & TIM_SR_CC1IF ) ) {
// compare interrupt
TIM3->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
TRAINER_TIMER->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt
TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear flag
setupTrainerPulses() ;
trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
TIM3->DIER |= TIM_DIER_UDE ;
TIM3->SR &= ~TIM_SR_UIF ; // Clear this flag
TIM3->DIER |= TIM_DIER_UIE ; // Enable this interrupt
TRAINER_TIMER->DIER |= TIM_DIER_UDE ;
TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear this flag
TRAINER_TIMER->DIER |= TIM_DIER_UIE ; // Enable this interrupt
}
// PPM out update interrupt
if ( (TIM3->DIER & TIM_DIER_UIE) && ( TIM3->SR & TIM_SR_UIF ) ) {
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
TIM3->ARR = *trainerPulsesData.ppm.ptr++ ;
if ( (TRAINER_TIMER->DIER & TIM_DIER_UIE) && ( TRAINER_TIMER->SR & TIM_SR_UIF ) ) {
TRAINER_TIMER->SR &= ~TIM_SR_UIF ; // Clear flag
TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++ ;
if ( *trainerPulsesData.ppm.ptr == 0 ) {
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear this flag
TIM3->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
TRAINER_TIMER->SR &= ~TIM_SR_CC1IF ; // Clear this flag
TRAINER_TIMER->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
}
}
}
@@ -194,27 +190,25 @@ void init_cppm_on_heartbeat_capture(void)
{
EXTERNAL_MODULE_ON();
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
configure_pins( 0x0080, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 ) ;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
configure_pins(HEARTBEAT_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2);
TIM3->ARR = 0xFFFF ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CR2 = 0 ;
TIM3->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0 ;
TIM3->CCER = TIM_CCER_CC2E ;
TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM3->DIER |= TIM_DIER_CC2IE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority(TIM3_IRQn, 7);
NVIC_EnableIRQ(TIM3_IRQn) ;
TRAINER_TIMER->ARR = 0xFFFF ;
TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TRAINER_TIMER->CR2 = 0 ;
TRAINER_TIMER->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0 ;
TRAINER_TIMER->CCER = TIM_CCER_CC2E ;
TRAINER_TIMER->SR &= ~TIM_SR_CC2IF ; // Clear flag
TRAINER_TIMER->DIER |= TIM_DIER_CC2IE ;
TRAINER_TIMER->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
NVIC_EnableIRQ(TRAINER_TIMER_IRQn) ;
}
void stop_cppm_on_heartbeat_capture(void)
{
TIM3->DIER = 0 ;
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
TRAINER_TIMER->DIER = 0 ;
TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TRAINER_TIMER_IRQn) ; // Stop Interrupt
if (!IS_PULSES_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
@@ -228,19 +222,15 @@ void init_sbus_on_heartbeat_capture()
USART_InitTypeDef USART_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_PinAFConfig(GPIOC, HEARTBEAT_GPIO_PinSource, HEARTBEAT_GPIO_AF);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource7, GPIO_AF_USART6);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_InitStructure.GPIO_Pin = HEARTBEAT_GPIO_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOC, &GPIO_InitStructure);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
USART_InitStructure.USART_BaudRate = 100000;
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
@@ -248,18 +238,18 @@ void init_sbus_on_heartbeat_capture()
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx;
USART_Init(USART6, &USART_InitStructure);
USART_Cmd(USART6, ENABLE);
USART_ITConfig(USART6, USART_IT_RXNE, ENABLE);
USART_Init(HEARTBEAT_USART, &USART_InitStructure);
USART_Cmd(HEARTBEAT_USART, ENABLE);
USART_ITConfig(HEARTBEAT_USART, USART_IT_RXNE, ENABLE);
NVIC_SetPriority(USART6_IRQn, 6);
NVIC_EnableIRQ(USART6_IRQn);
NVIC_SetPriority(HEARTBEAT_USART_IRQn, 6);
NVIC_EnableIRQ(HEARTBEAT_USART_IRQn);
}
void stop_sbus_on_heartbeat_capture(void)
{
configure_pins( 0x0080, PIN_INPUT | PIN_PORTC ) ;
NVIC_DisableIRQ(USART6_IRQn) ;
configure_pins(HEARTBEAT_GPIO_PIN, PIN_INPUT | PIN_PORTC);
NVIC_DisableIRQ(HEARTBEAT_USART_IRQn) ;
if (!IS_PULSES_EXTERNAL_MODULE()) {
EXTERNAL_MODULE_OFF();
@@ -267,20 +257,20 @@ void stop_sbus_on_heartbeat_capture(void)
}
#if !defined(SIMU) && !defined(REV9E)
extern "C" void USART6_IRQHandler()
extern "C" void HEARTBEAT_USART_IRQHandler()
{
uint32_t status;
uint8_t data;
status = USART6->SR;
status = HEARTBEAT_USART->SR;
while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) {
data = USART6->DR;
data = HEARTBEAT_USART->DR;
if (!(status & USART_FLAG_ERRORS))
sbusFifo.push(data);
status = USART6->SR;
status = HEARTBEAT_USART->SR;
}
}
#endif