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Some cleanup

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This commit is contained in:
Raphael Coeffic
2021-11-01 11:01:32 +01:00
committed by Raphael Coeffic
parent b4e8ff3d6b
commit 5af7b7edc7
1 changed files with 15 additions and 30 deletions
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radio/src/targets/nv14/hal.h
+15 -30
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@@ -100,17 +100,11 @@
// ADC
#define ADC_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_DMA2)
#define ADC_RCC_APB2Periph (RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC3)
#if !defined(FLYSKY_HALL_STICKS)
#define ADC_GPIO_PIN_STICK_LH GPIO_Pin_2 // PA.02
#define ADC_GPIO_PIN_STICK_LV GPIO_Pin_3 // PA.03
#define ADC_GPIO_PIN_STICK_RH GPIO_Pin_4 // PA.04
#define ADC_GPIO_PIN_STICK_RV GPIO_Pin_5 // PA.05
#else
#define ADC_GPIO_PIN_STICK_LH 0
#define ADC_GPIO_PIN_STICK_LV 0
#define ADC_GPIO_PIN_STICK_RH 0
#define ADC_GPIO_PIN_STICK_RV 0
#endif
// FLYSKY_HALL_STICKS
#define ADC_GPIO_PIN_STICK_LH 0
#define ADC_GPIO_PIN_STICK_LV 0
#define ADC_GPIO_PIN_STICK_RH 0
#define ADC_GPIO_PIN_STICK_RV 0
#define ADC_GPIO_PIN_POT1 GPIO_Pin_6 // PA.06 VRA
#define ADC_GPIO_PIN_POT2 GPIO_Pin_4 // PC.04 VRB
@@ -124,26 +118,17 @@
#define ADC_GPIO_PIN_SWH GPIO_Pin_1 // PC.01
#define ADC_GPIO_PIN_BATT GPIO_Pin_5 // PC.05
#if !defined(FLYSKY_HALL_STICKS)
#define ADC_GPIOA_PINS (GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4| GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7)
#else
#define ADC_GPIOA_PINS (GPIO_Pin_6 | GPIO_Pin_7)
#endif
#define ADC_GPIOB_PINS (GPIO_Pin_0 | GPIO_Pin_1)
#define ADC_GPIOC_PINS (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_4 | GPIO_Pin_5)
#define ADC_GPIOF_PINS (GPIO_Pin_8 | GPIO_Pin_10)
// FLYSKY_HALL_STICKS
#define ADC_GPIOA_PINS (GPIO_Pin_6 | GPIO_Pin_7)
#define ADC_GPIOB_PINS (GPIO_Pin_0 | GPIO_Pin_1)
#define ADC_GPIOC_PINS \
(GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_4 | GPIO_Pin_5)
#define ADC_GPIOF_PINS (GPIO_Pin_8 | GPIO_Pin_10)
#if !defined(FLYSKY_HALL_STICKS)
#define ADC_CHANNEL_STICK_LH ADC_Channel_2 // ADC123_IN2 -> ADC1_IN2
#define ADC_CHANNEL_STICK_LV ADC_Channel_3 // ADC123_IN3 -> ADC1_IN3
#define ADC_CHANNEL_STICK_RH ADC_Channel_4 // ADC12_IN4 -> ADC1_IN4
#define ADC_CHANNEL_STICK_RV ADC_Channel_5 // ADC12_IN5 -> ADC1_IN5
#else
#define ADC_CHANNEL_STICK_LH 0
#define ADC_CHANNEL_STICK_LV 0
#define ADC_CHANNEL_STICK_RH 0
#define ADC_CHANNEL_STICK_RV 0
#endif
#define ADC_CHANNEL_STICK_LH 0
#define ADC_CHANNEL_STICK_LV 0
#define ADC_CHANNEL_STICK_RH 0
#define ADC_CHANNEL_STICK_RV 0
#define ADC_CHANNEL_POT1 ADC_Channel_6 // ADC12_IN6 -> ADC1_IN6
#define ADC_CHANNEL_POT2 ADC_Channel_14 // ADC12_IN14 -> ADC1_IN14