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[X9D] SD support

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bsongis
2013-01-07 18:35:24 +00:00
parent 8123713372
commit 5cb5ee0111
60 changed files with 939 additions and 26493 deletions
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src/Makefile
+7 -4
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@@ -142,10 +142,6 @@ WS_HOW_HIGH = YES
# Values = YES, NO
VARIO = YES
# SDCARD
# Values = YES, NO
SDCARD = NO
# RTCLOCK
# Values = YES, NO
# default = YES (means enabled when available)
@@ -229,6 +225,7 @@ ifeq ($(PCB), STD)
MCU = atmega64
CPPDEFS += -DF_CPU=$(F_CPU)UL
XCURVES = NO
SDCARD = NO
endif
ifeq ($(PCB), STD128)
@@ -236,6 +233,7 @@ ifeq ($(PCB), STD128)
TRGT = avr-
MCU = atmega128
CPPDEFS += -DF_CPU=$(F_CPU)UL
SDCARD = NO
endif
ifeq ($(PCB), GRUVIN9X)
@@ -248,6 +246,7 @@ ifeq ($(PCB), GRUVIN9X)
TRGT = avr-
MCU = atmega2560
CPPDEFS += -DF_CPU=$(F_CPU)UL
SDCARD = NO
endif
ifeq ($(PCB), SKY9X)
@@ -265,6 +264,7 @@ ifeq ($(PCB), SKY9X)
TRGT = arm-none-eabi-
MCU = cortex-m3
CPPDEFS += -Dat91sam3s4
SDCARD = YES
endif
ifeq ($(PCB), X9D)
@@ -273,6 +273,7 @@ ifeq ($(PCB), X9D)
TRGT = arm-none-eabi-
MCU = cortex-m3
CPPDEFS += -DHSE_VALUE=12000000
SDCARD = YES
endif
ifeq ($(PCB), ACT)
@@ -280,6 +281,7 @@ ifeq ($(PCB), ACT)
LDSCRIPT = x9d/stm32_flash.ld
TRGT = arm-none-eabi-
MCU = cortex-m3
SDCARD = NO
endif
CC = $(TRGT)gcc
@@ -499,6 +501,7 @@ ifeq ($(PCB), X9D)
SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/src/stm32f2xx_gpio.c
SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/src/stm32f2xx_rcc.c
SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/src/stm32f2xx_spi.c
SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/gcc_ride7/startup_stm32f2xx.s
ifeq ($(SDCARD), YES)
src/general_menus.cpp
+3 -1
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@@ -666,8 +666,10 @@ void menuGeneralSdManager(uint8_t event)
else if (result == STR_SD_FORMAT) {
displayPopup(STR_FORMATTING);
closeLogs();
#if defined(CPUARM)
#if defined(PCBSKY9X)
Card_state = SD_ST_DATA;
#endif
#if defined(CPUARM)
audioQueue.stopSD();
#endif
if (f_mkfs(0, 1, 0) == FR_OK) {
src/lcd.cpp
+1 -7
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@@ -34,7 +34,7 @@
#include "open9x.h"
uint8_t displayBuf[DISPLAY_BUF_SIZE];
#define DISPLAY_END (displayBuf+sizeof(displayBuf))
#define DISPLAY_END (displayBuf+DISPLAY_PLAN_SIZE)
#define ASSERT_IN_DISPLAY(p) assert((p) >= displayBuf && (p) < DISPLAY_END)
void lcd_clear()
@@ -78,8 +78,6 @@ uint8_t lcdLastPos;
#if defined(PCBX9D)
#define LCD_BYTE_FILTER(p, keep, add) \
do { \
ASSERT_IN_DISPLAY(p); \
ASSERT_IN_DISPLAY(p+DISPLAY_W); \
if (!(flags & GREY1)) \
*(p) = (*(p) & (keep)) + (add); \
if (!(flags & GREY2)) \
@@ -178,7 +176,6 @@ void lcd_putcAtt(xcoord_t x, uint8_t y, const unsigned char c, LcdFlags flags)
uint8_t b = pgm_read_byte(q--);
if (inv) b = ~b & 0x7f;
if (p<DISPLAY_END) {
ASSERT_IN_DISPLAY(p);
LCD_BYTE_FILTER(p, ~(0x7f << ym8), b << ym8);
if (ym8) {
uint8_t *r = p + DISPLAY_W;
@@ -197,7 +194,6 @@ void lcd_putcAtt(xcoord_t x, uint8_t y, const unsigned char c, LcdFlags flags)
uint8_t b = pgm_read_byte(q--);
if (inv) b = ~b & 0x3f;
if (p<DISPLAY_END) {
ASSERT_IN_DISPLAY(p);
LCD_BYTE_FILTER(p, ~(0x3f << ym8), b << ym8);
if (ym8) {
uint8_t *r = p + DISPLAY_W;
@@ -229,7 +225,6 @@ void lcd_putcAtt(xcoord_t x, uint8_t y, const unsigned char c, LcdFlags flags)
}
if (p<DISPLAY_END) {
ASSERT_IN_DISPLAY(p);
LCD_BYTE_FILTER(p, ~(0xff << ym8), b << ym8);
if (ym8) {
uint8_t *r = p + DISPLAY_W;
@@ -478,7 +473,6 @@ void lcd_mask(uint8_t *p, uint8_t mask, LcdFlags att)
if (!(att & GREY2)) {
p += DISPLAY_PLAN_SIZE;
ASSERT_IN_DISPLAY(p);
if (att & FORCE)
*p |= mask;
src/model_menus.cpp
+1 -1
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@@ -676,7 +676,7 @@ void menuModelSetup(uint8_t event)
#endif
break;
#if defined(PCBX9D)
#if defined(PCBX9D) && defined(SDCARD)
case ITEM_MODEL_BITMAP:
lcd_putsLeft(y, STR_BITMAP);
if (ZLEN(g_model.bitmap) > 0)
src/open9x.cpp
+6 -9
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@@ -284,6 +284,11 @@ void per10ms()
if(mixWarning & 2) if(((g_tmr10ms&0xFF)== 64) || ((g_tmr10ms&0xFF)== 72)) AUDIO_MIX_WARNING_2();
if(mixWarning & 4) if(((g_tmr10ms&0xFF)==128) || ((g_tmr10ms&0xFF)==136) || ((g_tmr10ms&0xFF)==144)) AUDIO_MIX_WARNING_3();
#if defined(SDCARD)
sdPoll10ms();
#endif
heartbeat |= HEART_TIMER10ms;
}
PhaseData *phaseaddress(uint8_t idx)
@@ -3053,12 +3058,6 @@ ISR(TIMER_10MS_VECT, ISR_NOBLOCK) // 10ms timer
per10ms();
#if defined(SDCARD)
sdPoll10ms();
#endif
heartbeat |= HEART_TIMER10ms;
#if defined(PCBSTD) && (defined(AUDIO) || defined(VOICE))
} // end 10ms event
#endif
@@ -3389,7 +3388,7 @@ inline void open9xInit(OPEN9X_INIT_ARGS)
else {
doSplash();
#if defined(CPUARM) && defined(SDCARD)
#if defined(PCBSKY9X) && defined(SDCARD)
for (int i=0; i<500 && !Card_initialized; i++) {
CoTickDelay(1); // 2ms
}
@@ -3447,8 +3446,6 @@ void mixerTask(void * pdata)
if (tick10ms) checkTrims();
}
heartbeat |= HEART_TIMER10ms; // TODO not here but in 10ms interrupt!
if (heartbeat == HEART_TIMER_PULSES+HEART_TIMER10ms) {
wdt_reset();
heartbeat = 0;
src/sdcard.h
+3 -2
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@@ -74,17 +74,18 @@ inline const pm_char *SDCARD_ERROR(FRESULT result)
#if defined(SIMU)
#define sdMountPoll()
#define sdPoll10ms()
#else
extern void sdMountPoll();
#endif
#if defined(CPUARM) && !(defined(SIMU))
#if defined(CPUARM) && !defined(SIMU)
extern "C" {
extern uint32_t sd_card_ready();
extern uint32_t sd_card_mounted();
}
#else
#define sd_card_ready() (true)
#define sd_card_ready() (true)
#define sd_card_mounted() (true)
#endif
src/simpgmspace.cpp
+1 -3
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@@ -609,13 +609,11 @@ FRESULT f_getcwd (TCHAR *path, UINT sz_path)
return FR_OK;
}
#if defined(CPUARM)
#if defined(PCBSKY9X)
int32_t Card_state = SD_ST_MOUNTED;
uint32_t Card_CSD[4]; // TODO elsewhere
#endif
#else // TODO no SD quick and dirty!
int32_t Card_state;
#endif
bool lcd_refresh = true;
src/sky9x/audio.cpp
+2 -1
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@@ -615,7 +615,8 @@ void AudioQueue::playFile(const char *filename, uint8_t flags, uint8_t id)
#if defined(SIMU)
printf("playFile(\"%s\")\n", filename); fflush(stdout);
#else
if (Card_initialized && !sd_card_mounted())
if (!sd_card_mounted())
return;
CoEnterMutexSection(audioMutex);
src/sky9x/diskio.cpp
-8
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@@ -1445,11 +1445,3 @@ DRESULT disk_ioctl (
return res;
}
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/CMSIS END USER LICENCE AGREEMENT.pdf
BIN
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Release_Notes.html
-146
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@@ -1,146 +0,0 @@
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<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../../Release_Notes.html">Back to Release page</a></span></td>
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<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
Notes for STM32F2xx CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p>&nbsp;</o:p></span></p>
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
<ol style="margin-top: 0cm;" start="1" type="1">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F2xx&nbsp;CMSIS
update History</a><o:p></o:p></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
</ol>
<span style="font-family: &quot;Times New Roman&quot;;"></span>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F2xx CMSIS
update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.3 / 05-March-2012<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files:&nbsp;license disclaimer text update and add link to the License file on ST Internet.</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.2 / 28-December-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files: update disclaimer to add reference to the&nbsp;new license agreement</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f2xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Correct&nbsp;bit definition: </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RCC_AHB2RSTR_<span style="font-weight: bold;">HSAH</span>RST</span>&nbsp;changed to <span style="font-style: italic;">RCC_AHB2RSTR_<span style="font-weight: bold;">HASH</span>RST</span></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.1 / 14-November-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f2xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add missing bits definition for&nbsp;<span style="font-style: italic;">DAC CR</span> register</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add missing bits definition for <span style="font-style: italic;">FSMC BTR1, BTR2, BTR3, BWTR1, BWTR2, BWTR3 and BWTR4</span> registers</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add startup file for <span style="font-style: italic;">TASKING</span> toolchain<br></span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 /&nbsp;23-September-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f2xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add define for Cortex-M3 revision&nbsp;<span style="font-style: italic;">__CM3_REV</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Allow
modification of&nbsp;some constants by the application code, definition of
these constants is now bracketed by &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;<span style="font-style: italic;">#if !defined</span><span style="font-style: italic;"></span>. The concerned constant are <span style="font-style: italic;">HSE_VALUE</span>, <span style="font-style: italic;">HSI_VALUE</span> and <span style="font-style: italic;">HSE_STARTUP_TIMEOUT</span>.</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Fix include of </span><span style="font-size: 10pt; font-family: Verdana;">stm32f2xx_conf.h file, </span><span style="font-size: 10pt; font-family: Verdana;">change <span style="font-style: italic;">"stm32f2xx_conf.h<span style="font-weight: bold;"> "</span></span> by <span style="font-style: italic;">"stm32f2xx_conf.h"</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Correct MII_RMII_SEL bit&nbsp;(in SYSCFG_PMC register) value to 0x00800000</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Correct RCC_CFGR_PPRE2_DIV16 bit&nbsp;(in&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">RCC_CFGR</span><span style="font-size: 10pt; font-family: Verdana;"> register) value to&nbsp;0x0000E000</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Correct some&nbsp;bits definition to be in line with naming used in the Reference Manual </span><span style="font-size: 10pt; font-family: Verdana;"> (RM0033)</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_<span style="font-weight: bold;">OTYPER</span>_IDR_x</span> changed to <span style="font-style: italic;">GPIO_<span style="font-weight: bold;">IDR</span>_IDR_x</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_<span style="font-weight: bold;">OTYPER</span>_ODR_x</span> changed to <span style="font-style: italic;">GPIO_<span style="font-weight: bold;">ODR</span>_ODR_x</span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SYSCFG_PMC_MII_RMII</span> changed to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana; font-style: italic;">SYSCFG_PMC_MII_RMII<span style="font-weight: bold;">_SEL</span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RCC_APB2RSTR_SPI1</span> changed to&nbsp;<span style="font-style: italic;">RCC_APB2RSTR_SPI1<span style="font-weight: bold;">RST</span></span></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">DBGMCU_APB1_FZ_DBG_IWD<span style="font-weight: bold;">E</span>G_STOP</span> changed to&nbsp;<span style="font-style: italic;">DBGMCU_APB1_FZ_DBG_IWDG_STOP</span><br></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">GPIO_TypeDef structure: in the comment change AFR[2] address mapping&nbsp;to <span style="font-style: italic;">0x20-0x24</span> instead of <span style="font-style: italic;">0x24-0x28</span></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 / 18-April-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">First official release&nbsp;for <span style="font-weight: bold; font-style: italic;">STM32F2xx devices</span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f2xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add SYSCFG CMPCR register and bits definition&nbsp;</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Peripheral register's definitions: add description and address offset of each register</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add <span style="font-style: italic;">startup_stm32f2xx.s</span> startup files for "gcc_ride7" and "TrueSTUDIO" compilers<br></span></li></ul><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0RC1 / 11-March-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Official version (V1.0.0) Release </span><span style="font-size: 10pt; font-family: Verdana;">Candidate&nbsp;1</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f2xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update file's header comments</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change "RNG_CR_IM" by "RNG_CR_IE"</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update "ETH_MACMIIAR_CR" bits definition</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">system_stm32f2xx.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Implement <span style="font-style: italic;">SystemInit_ExtMemCtl()</span> function</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change everywhere "STM3220F_EVAL" by "STM322xG_EVAL"</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">SystemCoreClockUpdate()</span> function's header comments</span></li></ul></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;"></span><span style="font-weight: bold; font-style: italic;"></span></span>
<ul style="margin-top: 0in;" type="disc">
</ul>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this&nbsp;</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">package</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"> except in compliance with the License. You may obtain a copy of the License at:<br><br></span></p><div style="text-align: center;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <a target="_blank" href="http://www.st.com/software_license_agreement_liberty_v2">http://www.st.com/software_license_agreement_liberty_v2</a></span><br><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"></span></div><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"><br>Unless
required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, <br>WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See
the License for the specific language governing permissions and
limitations under the License.</span>
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
<hr align="center" size="2" width="100%"></span></div>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32<span style="color: black;"> Microcontrollers
visit </span><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/family/141.jsp" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/TASKING/cstart_thumb2.asm
-140
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@@ -1,140 +0,0 @@
;; NOTE: To allow the use of this file for both ARMv6M and ARMv7M,
;; we will only use 16-bit Thumb intructions.
.extern _lc_ub_stack ; usr/sys mode stack pointer
.extern _lc_ue_stack ; symbol required by debugger
.extern _lc_ub_table ; ROM to RAM copy table
.extern main
.extern _Exit
.extern exit
.weak exit
.global __get_argcv
.weak __get_argcv
.extern __argcvbuf
.weak __argcvbuf
;;.extern __init_hardware
.extern SystemInit
.if @defined('__PROF_ENABLE__')
.extern __prof_init
.endif
.if @defined('__POSIX__')
.extern posix_main
.extern _posix_boot_stack_top
.endif
.global _START
.section .text.cstart
.thumb
_START:
;; anticipate possible ROM/RAM remapping
;; by loading the 'real' program address
ldr r1,=_Next
bx r1
_Next:
;; initialize the stack pointer
ldr r1,=_lc_ub_stack ; TODO: make this part of the vector table
mov sp,r1
;; call a user function which initializes function.
bl SystemInit
;; copy initialized sections from ROM to RAM
;; and clear uninitialized data sections in RAM
ldr r3,=_lc_ub_table
movs r0,#0
cploop:
ldr r4,[r3,#0] ; load type
ldr r5,[r3,#4] ; dst address
ldr r6,[r3,#8] ; src address
ldr r7,[r3,#12] ; size
cmp r4,#1
beq copy
cmp r4,#2
beq clear
b done
copy:
subs r7,r7,#1
ldrb r1,[r6,r7]
strb r1,[r5,r7]
bne copy
adds r3,r3,#16
b cploop
clear:
subs r7,r7,#1
strb r0,[r5,r7]
bne clear
adds r3,r3,#16
b cploop
done:
.if @defined('__POSIX__')
;; posix stack buffer for system upbringing
ldr r0,=_posix_boot_stack_top
ldr r0, [r0]
mov sp,r0
.else
;; load r10 with end of USR/SYS stack, which is
;; needed in case stack overflow checking is on
;; NOTE: use 16-bit instructions only, for ARMv6M
ldr r0,=_lc_ue_stack
mov r10,r0
.endif
.if @defined('__PROF_ENABLE__')
bl __prof_init
.endif
.if @defined('__POSIX__')
;; call posix_main with no arguments
bl posix_main
.else
;; retrieve argc and argv (default argv[0]==NULL & argc==0)
bl __get_argcv
ldr r1,=__argcvbuf
;; call main
bl main
.endif
;; call exit using the return value from main()
;; Note. Calling exit will also run all functions
;; that were supplied through atexit().
bl exit
__get_argcv: ; weak definition
movs r0,#0
bx lr
.ltorg
.endsec
.calls '_START', ' '
.calls '_START','__init_vector_table'
.if @defined('__PROF_ENABLE__')
.calls '_START','__prof_init'
.endif
.if @defined('__POSIX__')
.calls '_START','posix_main'
.else
.calls '_START','__get_argcv'
.calls '_START','main'
.endif
.calls '_START','exit'
.calls '_START','',0
.end
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/TrueSTUDIO/startup_stm32f2xx.s
-514
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@@ -1,514 +0,0 @@
/**
******************************************************************************
* @file startup_stm32f2xx.s
* @author MCD Application Team
* @version V1.1.3
* @date 05-March-2012
* @brief STM32F2xx Devices vector table for Atollic TrueSTUDIO toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the system clock and the external SRAM mounted on
* STM322xG-EVAL board to be used as data memory (optional,
* to be enabled by user)
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word FSMC_IRQHandler /* FSMC */
.word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
.word TIM7_IRQHandler /* TIM7 */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
.word OTG_HS_IRQHandler /* USB OTG HS */
.word DCMI_IRQHandler /* DCMI */
.word CRYP_IRQHandler /* CRYP crypto */
.word HASH_RNG_IRQHandler /* Hash and Rng */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Stream0_IRQHandler
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
.weak DMA1_Stream1_IRQHandler
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
.weak DMA1_Stream2_IRQHandler
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
.weak DMA1_Stream3_IRQHandler
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
.weak DMA1_Stream4_IRQHandler
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
.weak DMA1_Stream5_IRQHandler
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
.weak DMA1_Stream6_IRQHandler
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM9_IRQHandler
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
.weak TIM1_UP_TIM10_IRQHandler
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM11_IRQHandler
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak TIM8_BRK_TIM12_IRQHandler
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
.weak TIM8_UP_TIM13_IRQHandler
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
.weak TIM8_TRG_COM_TIM14_IRQHandler
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
.weak TIM8_CC_IRQHandler
.thumb_set TIM8_CC_IRQHandler,Default_Handler
.weak DMA1_Stream7_IRQHandler
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
.weak FSMC_IRQHandler
.thumb_set FSMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak DMA2_Stream0_IRQHandler
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
.weak DMA2_Stream1_IRQHandler
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
.weak DMA2_Stream2_IRQHandler
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
.weak DMA2_Stream3_IRQHandler
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
.weak DMA2_Stream4_IRQHandler
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
.weak ETH_IRQHandler
.thumb_set ETH_IRQHandler,Default_Handler
.weak ETH_WKUP_IRQHandler
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
.weak CAN2_TX_IRQHandler
.thumb_set CAN2_TX_IRQHandler,Default_Handler
.weak CAN2_RX0_IRQHandler
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
.weak CAN2_RX1_IRQHandler
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
.weak CAN2_SCE_IRQHandler
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_Stream5_IRQHandler
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
.weak DMA2_Stream6_IRQHandler
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
.weak DMA2_Stream7_IRQHandler
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak OTG_HS_EP1_OUT_IRQHandler
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
.weak OTG_HS_EP1_IN_IRQHandler
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
.weak OTG_HS_WKUP_IRQHandler
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
.weak OTG_HS_IRQHandler
.thumb_set OTG_HS_IRQHandler,Default_Handler
.weak DCMI_IRQHandler
.thumb_set DCMI_IRQHandler,Default_Handler
.weak CRYP_IRQHandler
.thumb_set CRYP_IRQHandler,Default_Handler
.weak HASH_RNG_IRQHandler
.thumb_set HASH_RNG_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/arm/startup_stm32f2xx.s
-512
View File
@@ -1,512 +0,0 @@
/**
******************************************************************************
* @file startup_stm32f2xx.s
* @author MCD Application Team
* @version V1.1.3
* @date 05-March-2012
* @brief STM32F2xx Devices vector table for RIDE7 toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the system clock and the external SRAM mounted on
* STM322xG-EVAL board to be used as data memory (optional,
* to be enabled by user)
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word FSMC_IRQHandler /* FSMC */
.word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
.word TIM7_IRQHandler /* TIM7 */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
.word OTG_HS_IRQHandler /* USB OTG HS */
.word DCMI_IRQHandler /* DCMI */
.word CRYP_IRQHandler /* CRYP crypto */
.word HASH_RNG_IRQHandler /* Hash and Rng */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Stream0_IRQHandler
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
.weak DMA1_Stream1_IRQHandler
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
.weak DMA1_Stream2_IRQHandler
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
.weak DMA1_Stream3_IRQHandler
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
.weak DMA1_Stream4_IRQHandler
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
.weak DMA1_Stream5_IRQHandler
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
.weak DMA1_Stream6_IRQHandler
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM9_IRQHandler
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
.weak TIM1_UP_TIM10_IRQHandler
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM11_IRQHandler
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak TIM8_BRK_TIM12_IRQHandler
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
.weak TIM8_UP_TIM13_IRQHandler
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
.weak TIM8_TRG_COM_TIM14_IRQHandler
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
.weak TIM8_CC_IRQHandler
.thumb_set TIM8_CC_IRQHandler,Default_Handler
.weak DMA1_Stream7_IRQHandler
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
.weak FSMC_IRQHandler
.thumb_set FSMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak DMA2_Stream0_IRQHandler
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
.weak DMA2_Stream1_IRQHandler
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
.weak DMA2_Stream2_IRQHandler
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
.weak DMA2_Stream3_IRQHandler
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
.weak DMA2_Stream4_IRQHandler
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
.weak ETH_IRQHandler
.thumb_set ETH_IRQHandler,Default_Handler
.weak ETH_WKUP_IRQHandler
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
.weak CAN2_TX_IRQHandler
.thumb_set CAN2_TX_IRQHandler,Default_Handler
.weak CAN2_RX0_IRQHandler
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
.weak CAN2_RX1_IRQHandler
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
.weak CAN2_SCE_IRQHandler
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_Stream5_IRQHandler
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
.weak DMA2_Stream6_IRQHandler
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
.weak DMA2_Stream7_IRQHandler
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak OTG_HS_EP1_OUT_IRQHandler
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
.weak OTG_HS_EP1_IN_IRQHandler
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
.weak OTG_HS_WKUP_IRQHandler
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
.weak OTG_HS_IRQHandler
.thumb_set OTG_HS_IRQHandler,Default_Handler
.weak DCMI_IRQHandler
.thumb_set DCMI_IRQHandler,Default_Handler
.weak CRYP_IRQHandler
.thumb_set CRYP_IRQHandler,Default_Handler
.weak HASH_RNG_IRQHandler
.thumb_set HASH_RNG_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/iar/startup_stm32f2xx.s
-629
View File
@@ -1,629 +0,0 @@
;/******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
;* File Name : startup_stm32f2xx.s
;* Author : MCD Application Team
;* Version : V1.1.3
;* Date : 05-March-2012
;* Description : STM32F2xx devices vector table for EWARM toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == __iar_program_start,
;* - Set the vector table entries with the exceptions ISR
;* address.
;* - Configure the system clock and the external SRAM mounted on
;* STM322xG-EVAL board to be used as data memory (optional,
;* to be enabled by user)
;* - Branches to main in the C library (which eventually
;* calls main()).
;* After Reset the Cortex-M3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;********************************************************************************
;*
;* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
;* You may not use this file except in compliance with the License.
;* You may obtain a copy of the License at:
;*
;* http://www.st.com/software_license_agreement_liberty_v2
;*
;* Unless required by applicable law or agreed to in writing, software
;* distributed under the License is distributed on an "AS IS" BASIS,
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
;* See the License for the specific language governing permissions and
;* limitations under the License.
;*
;*******************************************************************************/
;
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window WatchDog
DCD PVD_IRQHandler ; PVD through EXTI Line detection
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
DCD FLASH_IRQHandler ; FLASH
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line0
DCD EXTI1_IRQHandler ; EXTI Line1
DCD EXTI2_IRQHandler ; EXTI Line2
DCD EXTI3_IRQHandler ; EXTI Line3
DCD EXTI4_IRQHandler ; EXTI Line4
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
DCD CAN1_TX_IRQHandler ; CAN1 TX
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
DCD ETH_IRQHandler ; Ethernet
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
DCD CAN2_TX_IRQHandler ; CAN2 TX
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
DCD OTG_FS_IRQHandler ; USB OTG FS
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
DCD USART6_IRQHandler ; USART6
DCD I2C3_EV_IRQHandler ; I2C3 event
DCD I2C3_ER_IRQHandler ; I2C3 error
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
DCD OTG_HS_IRQHandler ; USB OTG HS
DCD DCMI_IRQHandler ; DCMI
DCD CRYP_IRQHandler ; CRYP crypto
DCD HASH_RNG_IRQHandler ; Hash and Rng
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER(1)
NMI_Handler
B NMI_Handler
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER(1)
HardFault_Handler
B HardFault_Handler
PUBWEAK MemManage_Handler
SECTION .text:CODE:REORDER(1)
MemManage_Handler
B MemManage_Handler
PUBWEAK BusFault_Handler
SECTION .text:CODE:REORDER(1)
BusFault_Handler
B BusFault_Handler
PUBWEAK UsageFault_Handler
SECTION .text:CODE:REORDER(1)
UsageFault_Handler
B UsageFault_Handler
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER(1)
SVC_Handler
B SVC_Handler
PUBWEAK DebugMon_Handler
SECTION .text:CODE:REORDER(1)
DebugMon_Handler
B DebugMon_Handler
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER(1)
PendSV_Handler
B PendSV_Handler
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER(1)
SysTick_Handler
B SysTick_Handler
PUBWEAK WWDG_IRQHandler
SECTION .text:CODE:REORDER(1)
WWDG_IRQHandler
B WWDG_IRQHandler
PUBWEAK PVD_IRQHandler
SECTION .text:CODE:REORDER(1)
PVD_IRQHandler
B PVD_IRQHandler
PUBWEAK TAMP_STAMP_IRQHandler
SECTION .text:CODE:REORDER(1)
TAMP_STAMP_IRQHandler
B TAMP_STAMP_IRQHandler
PUBWEAK RTC_WKUP_IRQHandler
SECTION .text:CODE:REORDER(1)
RTC_WKUP_IRQHandler
B RTC_WKUP_IRQHandler
PUBWEAK FLASH_IRQHandler
SECTION .text:CODE:REORDER(1)
FLASH_IRQHandler
B FLASH_IRQHandler
PUBWEAK RCC_IRQHandler
SECTION .text:CODE:REORDER(1)
RCC_IRQHandler
B RCC_IRQHandler
PUBWEAK EXTI0_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI0_IRQHandler
B EXTI0_IRQHandler
PUBWEAK EXTI1_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI1_IRQHandler
B EXTI1_IRQHandler
PUBWEAK EXTI2_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI2_IRQHandler
B EXTI2_IRQHandler
PUBWEAK EXTI3_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI3_IRQHandler
B EXTI3_IRQHandler
PUBWEAK EXTI4_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI4_IRQHandler
B EXTI4_IRQHandler
PUBWEAK DMA1_Stream0_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream0_IRQHandler
B DMA1_Stream0_IRQHandler
PUBWEAK DMA1_Stream1_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream1_IRQHandler
B DMA1_Stream1_IRQHandler
PUBWEAK DMA1_Stream2_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream2_IRQHandler
B DMA1_Stream2_IRQHandler
PUBWEAK DMA1_Stream3_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream3_IRQHandler
B DMA1_Stream3_IRQHandler
PUBWEAK DMA1_Stream4_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream4_IRQHandler
B DMA1_Stream4_IRQHandler
PUBWEAK DMA1_Stream5_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream5_IRQHandler
B DMA1_Stream5_IRQHandler
PUBWEAK DMA1_Stream6_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream6_IRQHandler
B DMA1_Stream6_IRQHandler
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER(1)
ADC_IRQHandler
B ADC_IRQHandler
PUBWEAK CAN1_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN1_TX_IRQHandler
B CAN1_TX_IRQHandler
PUBWEAK CAN1_RX0_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN1_RX0_IRQHandler
B CAN1_RX0_IRQHandler
PUBWEAK CAN1_RX1_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN1_RX1_IRQHandler
B CAN1_RX1_IRQHandler
PUBWEAK CAN1_SCE_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN1_SCE_IRQHandler
B CAN1_SCE_IRQHandler
PUBWEAK EXTI9_5_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI9_5_IRQHandler
B EXTI9_5_IRQHandler
PUBWEAK TIM1_BRK_TIM9_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM1_BRK_TIM9_IRQHandler
B TIM1_BRK_TIM9_IRQHandler
PUBWEAK TIM1_UP_TIM10_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM1_UP_TIM10_IRQHandler
B TIM1_UP_TIM10_IRQHandler
PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM1_TRG_COM_TIM11_IRQHandler
B TIM1_TRG_COM_TIM11_IRQHandler
PUBWEAK TIM1_CC_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM1_CC_IRQHandler
B TIM1_CC_IRQHandler
PUBWEAK TIM2_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM2_IRQHandler
B TIM2_IRQHandler
PUBWEAK TIM3_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM3_IRQHandler
B TIM3_IRQHandler
PUBWEAK TIM4_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM4_IRQHandler
B TIM4_IRQHandler
PUBWEAK I2C1_EV_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C1_EV_IRQHandler
B I2C1_EV_IRQHandler
PUBWEAK I2C1_ER_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C1_ER_IRQHandler
B I2C1_ER_IRQHandler
PUBWEAK I2C2_EV_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C2_EV_IRQHandler
B I2C2_EV_IRQHandler
PUBWEAK I2C2_ER_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C2_ER_IRQHandler
B I2C2_ER_IRQHandler
PUBWEAK SPI1_IRQHandler
SECTION .text:CODE:REORDER(1)
SPI1_IRQHandler
B SPI1_IRQHandler
PUBWEAK SPI2_IRQHandler
SECTION .text:CODE:REORDER(1)
SPI2_IRQHandler
B SPI2_IRQHandler
PUBWEAK USART1_IRQHandler
SECTION .text:CODE:REORDER(1)
USART1_IRQHandler
B USART1_IRQHandler
PUBWEAK USART2_IRQHandler
SECTION .text:CODE:REORDER(1)
USART2_IRQHandler
B USART2_IRQHandler
PUBWEAK USART3_IRQHandler
SECTION .text:CODE:REORDER(1)
USART3_IRQHandler
B USART3_IRQHandler
PUBWEAK EXTI15_10_IRQHandler
SECTION .text:CODE:REORDER(1)
EXTI15_10_IRQHandler
B EXTI15_10_IRQHandler
PUBWEAK RTC_Alarm_IRQHandler
SECTION .text:CODE:REORDER(1)
RTC_Alarm_IRQHandler
B RTC_Alarm_IRQHandler
PUBWEAK OTG_FS_WKUP_IRQHandler
SECTION .text:CODE:REORDER(1)
OTG_FS_WKUP_IRQHandler
B OTG_FS_WKUP_IRQHandler
PUBWEAK TIM8_BRK_TIM12_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM8_BRK_TIM12_IRQHandler
B TIM8_BRK_TIM12_IRQHandler
PUBWEAK TIM8_UP_TIM13_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM8_UP_TIM13_IRQHandler
B TIM8_UP_TIM13_IRQHandler
PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM8_TRG_COM_TIM14_IRQHandler
B TIM8_TRG_COM_TIM14_IRQHandler
PUBWEAK TIM8_CC_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM8_CC_IRQHandler
B TIM8_CC_IRQHandler
PUBWEAK DMA1_Stream7_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA1_Stream7_IRQHandler
B DMA1_Stream7_IRQHandler
PUBWEAK FSMC_IRQHandler
SECTION .text:CODE:REORDER(1)
FSMC_IRQHandler
B FSMC_IRQHandler
PUBWEAK SDIO_IRQHandler
SECTION .text:CODE:REORDER(1)
SDIO_IRQHandler
B SDIO_IRQHandler
PUBWEAK TIM5_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM5_IRQHandler
B TIM5_IRQHandler
PUBWEAK SPI3_IRQHandler
SECTION .text:CODE:REORDER(1)
SPI3_IRQHandler
B SPI3_IRQHandler
PUBWEAK UART4_IRQHandler
SECTION .text:CODE:REORDER(1)
UART4_IRQHandler
B UART4_IRQHandler
PUBWEAK UART5_IRQHandler
SECTION .text:CODE:REORDER(1)
UART5_IRQHandler
B UART5_IRQHandler
PUBWEAK TIM6_DAC_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM6_DAC_IRQHandler
B TIM6_DAC_IRQHandler
PUBWEAK TIM7_IRQHandler
SECTION .text:CODE:REORDER(1)
TIM7_IRQHandler
B TIM7_IRQHandler
PUBWEAK DMA2_Stream0_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream0_IRQHandler
B DMA2_Stream0_IRQHandler
PUBWEAK DMA2_Stream1_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream1_IRQHandler
B DMA2_Stream1_IRQHandler
PUBWEAK DMA2_Stream2_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream2_IRQHandler
B DMA2_Stream2_IRQHandler
PUBWEAK DMA2_Stream3_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream3_IRQHandler
B DMA2_Stream3_IRQHandler
PUBWEAK DMA2_Stream4_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream4_IRQHandler
B DMA2_Stream4_IRQHandler
PUBWEAK ETH_IRQHandler
SECTION .text:CODE:REORDER(1)
ETH_IRQHandler
B ETH_IRQHandler
PUBWEAK ETH_WKUP_IRQHandler
SECTION .text:CODE:REORDER(1)
ETH_WKUP_IRQHandler
B ETH_WKUP_IRQHandler
PUBWEAK CAN2_TX_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN2_TX_IRQHandler
B CAN2_TX_IRQHandler
PUBWEAK CAN2_RX0_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN2_RX0_IRQHandler
B CAN2_RX0_IRQHandler
PUBWEAK CAN2_RX1_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN2_RX1_IRQHandler
B CAN2_RX1_IRQHandler
PUBWEAK CAN2_SCE_IRQHandler
SECTION .text:CODE:REORDER(1)
CAN2_SCE_IRQHandler
B CAN2_SCE_IRQHandler
PUBWEAK OTG_FS_IRQHandler
SECTION .text:CODE:REORDER(1)
OTG_FS_IRQHandler
B OTG_FS_IRQHandler
PUBWEAK DMA2_Stream5_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream5_IRQHandler
B DMA2_Stream5_IRQHandler
PUBWEAK DMA2_Stream6_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream6_IRQHandler
B DMA2_Stream6_IRQHandler
PUBWEAK DMA2_Stream7_IRQHandler
SECTION .text:CODE:REORDER(1)
DMA2_Stream7_IRQHandler
B DMA2_Stream7_IRQHandler
PUBWEAK USART6_IRQHandler
SECTION .text:CODE:REORDER(1)
USART6_IRQHandler
B USART6_IRQHandler
PUBWEAK I2C3_EV_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C3_EV_IRQHandler
B I2C3_EV_IRQHandler
PUBWEAK I2C3_ER_IRQHandler
SECTION .text:CODE:REORDER(1)
I2C3_ER_IRQHandler
B I2C3_ER_IRQHandler
PUBWEAK OTG_HS_EP1_OUT_IRQHandler
SECTION .text:CODE:REORDER(1)
OTG_HS_EP1_OUT_IRQHandler
B OTG_HS_EP1_OUT_IRQHandler
PUBWEAK OTG_HS_EP1_IN_IRQHandler
SECTION .text:CODE:REORDER(1)
OTG_HS_EP1_IN_IRQHandler
B OTG_HS_EP1_IN_IRQHandler
PUBWEAK OTG_HS_WKUP_IRQHandler
SECTION .text:CODE:REORDER(1)
OTG_HS_WKUP_IRQHandler
B OTG_HS_WKUP_IRQHandler
PUBWEAK OTG_HS_IRQHandler
SECTION .text:CODE:REORDER(1)
OTG_HS_IRQHandler
B OTG_HS_IRQHandler
PUBWEAK DCMI_IRQHandler
SECTION .text:CODE:REORDER(1)
DCMI_IRQHandler
B DCMI_IRQHandler
PUBWEAK CRYP_IRQHandler
SECTION .text:CODE:REORDER(1)
CRYP_IRQHandler
B CRYP_IRQHandler
PUBWEAK HASH_RNG_IRQHandler
SECTION .text:CODE:REORDER(1)
HASH_RNG_IRQHandler
B HASH_RNG_IRQHandler
END
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Documentation/CMSIS-SVD_Schema_1_0.xsd
-274
View File
@@ -1,274 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<!--
@date: 29.07.2011
@note Copyright (C) 2011 ARM Limited. All rights reserved.
@par
ARM Limited (ARM) is supplying this software for use with Cortex-M
processor based microcontroller, but can be equally used for other
suitable processor architectures. This file can be freely distributed.
Modifications to this file shall be clearly marked.
@par
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-->
<xs:schema xmlns:xs="http://www.w3.org/2001/XMLSchema" elementFormDefault="qualified" attributeFormDefault="qualified" version="1.0">
<xs:simpleType name="registerNameType">
<xs:restriction base="xs:string">
<xs:pattern value="([_A-Za-z]{1}[_A-Za-z0-9]*(\[%s\])?)|([_A-Za-z]{1}[_A-Za-z0-9]*(%s)?[_A-Za-z0-9]*)"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="dimIndexType">
<xs:restriction base="xs:string">
<xs:pattern value="[0-9]+\-[0-9]+|[A-Z]-[A-Z]|[_0-9a-zA-Z]+(,\s*[_0-9a-zA-Z]+)+"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="scaledNonNegativeInteger">
<xs:restriction base="xs:string">
<xs:pattern value="[+]?(0x|0X|#)?[0-9a-fA-F]+[kmgtKMGT]?"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="enumeratedValueDataType">
<xs:restriction base="xs:string">
<xs:pattern value="[+]?(0x|0X|#)?[0-9a-fxA-FX]+"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="accessType">
<xs:restriction base="xs:token">
<xs:enumeration value="read-only"/>
<xs:enumeration value="write-only"/>
<xs:enumeration value="read-write"/>
<xs:enumeration value="writeOnce"/>
<xs:enumeration value="read-writeOnce"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="modifiedWriteValuesType">
<xs:restriction base="xs:token">
<xs:enumeration value="oneToClear"/>
<xs:enumeration value="oneToSet"/>
<xs:enumeration value="oneToToggle"/>
<xs:enumeration value="zeroToClear"/>
<xs:enumeration value="zeroToSet"/>
<xs:enumeration value="zeroToToggle"/>
<xs:enumeration value="clear"/>
<xs:enumeration value="set"/>
<xs:enumeration value="modify"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="readActionType">
<xs:restriction base="xs:token">
<xs:enumeration value="clear"/>
<xs:enumeration value="set"/>
<xs:enumeration value="modify"/>
<xs:enumeration value="modifyExternal"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="enumUsageType">
<xs:restriction base="xs:token">
<xs:enumeration value="read"/>
<xs:enumeration value="write"/>
<xs:enumeration value="read-write"/>
</xs:restriction>
</xs:simpleType>
<xs:simpleType name="bitRangeType">
<xs:restriction base="xs:token">
<xs:pattern value="\[([0-3])?[0-9]:([0-3])?[0-9]\]"/>
</xs:restriction>
</xs:simpleType>
<xs:complexType name="writeConstraintType">
<xs:choice>
<xs:element name="writeAsRead" type="xs:boolean"/>
<xs:element name="useEnumeratedValues" type="xs:boolean"/>
<xs:element name="range">
<xs:complexType>
<xs:sequence>
<xs:element name="minimum" type="scaledNonNegativeInteger"/>
<xs:element name="maximum" type="scaledNonNegativeInteger"/>
</xs:sequence>
</xs:complexType>
</xs:element>
</xs:choice>
</xs:complexType>
<xs:complexType name="addressBlockType">
<xs:sequence>
<xs:element name="offset" type="scaledNonNegativeInteger"/>
<xs:element name="size" type="scaledNonNegativeInteger"/>
<xs:element name="usage">
<xs:simpleType>
<xs:restriction base="xs:token">
<xs:enumeration value="registers"/>
<xs:enumeration value="buffer"/>
<xs:enumeration value="reserved"/>
</xs:restriction>
</xs:simpleType>
</xs:element>
</xs:sequence>
</xs:complexType>
<xs:complexType name="interruptType">
<xs:sequence>
<xs:element name="name" type="xs:string"/>
<xs:element name="value" type="xs:integer"/>
</xs:sequence>
</xs:complexType>
<xs:group name="registerPropertiesGroup">
<xs:sequence>
<xs:element name="size" type="scaledNonNegativeInteger" minOccurs="0"/>
<xs:element name="access" type="accessType" minOccurs="0"/>
<xs:element name="resetValue" type="scaledNonNegativeInteger" minOccurs="0"/>
<xs:element name="resetMask" type="scaledNonNegativeInteger" minOccurs="0"/>
</xs:sequence>
</xs:group>
<xs:group name="bitRangeLsbMsbStyle">
<xs:sequence>
<xs:element name="lsb" type="scaledNonNegativeInteger"/>
<xs:element name="msb" type="scaledNonNegativeInteger"/>
</xs:sequence>
</xs:group>
<xs:group name="bitRangeOffsetWidthStyle">
<xs:sequence>
<xs:element name="bitOffset" type="scaledNonNegativeInteger"/>
<xs:element name="bitWidth" type="scaledNonNegativeInteger" minOccurs="0"/>
</xs:sequence>
</xs:group>
<xs:group name="dimElementGroup">
<xs:sequence>
<xs:element name="dim" type="scaledNonNegativeInteger"/>
<xs:element name="dimIncrement" type="scaledNonNegativeInteger"/>
<xs:element name="dimIndex" type="dimIndexType" minOccurs="0"/>
</xs:sequence>
</xs:group>
<xs:element name="device" nillable="true">
<xs:complexType>
<xs:sequence>
<xs:element name="name" type="xs:string"/>
<xs:element name="version" type="xs:string"/>
<xs:element name="description" type="xs:string"/>
<xs:element name="addressUnitBits" type="scaledNonNegativeInteger"/>
<xs:element name="width" type="scaledNonNegativeInteger"/>
<xs:group ref="registerPropertiesGroup" minOccurs="0"/>
<xs:element name="peripherals">
<xs:complexType>
<xs:sequence>
<xs:element name="peripheral" minOccurs="1" maxOccurs="unbounded">
<xs:complexType>
<xs:sequence>
<xs:element name="name" type="xs:Name"/>
<xs:element name="version" type="xs:string" minOccurs="0"/>
<xs:element name="description" type="xs:string" minOccurs="0"/>
<xs:element name="groupName" type="xs:string" minOccurs="0"/>
<xs:element name="prependToName" type="xs:string" minOccurs="0"/>
<xs:element name="appendToName" type="xs:string" minOccurs="0"/>
<xs:element name="disableCondition" type="xs:string" minOccurs="0"/>
<xs:element name="baseAddress" type="scaledNonNegativeInteger"/>
<xs:group ref="registerPropertiesGroup" minOccurs="0"/>
<xs:element name="addressBlock" type="addressBlockType" minOccurs="0" maxOccurs="unbounded"/>
<xs:element name="interrupt" type="interruptType" minOccurs="0" maxOccurs="unbounded"/>
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<html>
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<title>CMSIS Debug Support</title>
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<body>
<h1>CMSIS Debug Support</h1>
<p align="center">This file describes the CMSIS Debug support available with CMSIS (starting V1.30).</p>
<p align="center">Version: 1.02 - 25. July 2011</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
</p>
<hr>
<p><span style="FONT-WEIGHT: bold">Revision History</span></p>
<ul>
<li>Version 1.00: Initial Release. </li>
<li>Version 1.01: Internal Review. </li>
<li>Version 1.02: Removed product specific information. </li>
</ul>
<hr>
<h2>Contents</h2>
<ol>
<li class="LI2"><a href="#About">About</a></li>
<li class="LI2"><a href="#ITM_DbgAcc">Cortex-M3 / Cortex-M4 ITM Debug Access</a></li>
<li class="LI2"><a href="#DbgIn_DbgOut">Debug IN / OUT functions</a></li>
<li class="LI2"><a href="#ITM_DbgSup">ITM Debug Support in Debugger</a></li>
</ol>
<p>&nbsp;</p>
<h2><a name="About"></a>About</h2>
<p>
CMSIS provides for Cortex-M3 / Cortex-M4 processor based microcontrollers debug support via the Instrumented Trace Macrocell (ITM).
This document describes the available CMSIS Debug functions and the used methods.
</p>
<p>&nbsp;</p>
<h2><a name="ITM_DbgAcc"></a>Cortex-M3 / Cortex-M4 ITM Debug Access</h2>
<p>
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
communication channels are used by CMSIS to output the following information:
</p>
<ul>
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
</ul>
<p>&nbsp;</p>
<h2><a name="DbgIn_DbgOut"></a>Debug IN / OUT functions</h2>
<p>CMSIS provides following debug functions:</p>
<ul>
<li>ITM_SendChar (uses ITM channel 0)</li>
<li>ITM_ReceiveChar (uses global variable)</li>
<li>ITM_CheckChar (uses global variable)</li>
</ul>
<h3>ITM_SendChar</h3>
<p>
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
the microcontroller system to the debug system. <br>
Only a 8 bit value is transmitted.
</p>
<pre>
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
{
/* check if debugger connected and ITM channel enabled for tracing */
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &amp;&amp;
(ITM-&gt;TCR & ITM_TCR_ITMENA) &amp;&amp;
(ITM-&gt;TER & (1UL &lt;&lt; 0)) )
{
while (ITM-&gt;PORT[0].u32 == 0);
ITM-&gt;PORT[0].u8 = (uint8_t)ch;
}
return (ch);
}</pre>
<h3>ITM_ReceiveChar</h3>
<p>
ITM communication channel is only capable for OUT direction. For IN direction
a global variable is used. A simple mechanism detects if a character is received.
The project to test need to be build with debug information.
</p>
<p>
The global variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to
ensure a proper handshake.
</p>
<pre>
extern volatile int32_t ITM_RxBuffer; /* variable to receive characters */
</pre>
<p>
A dedicated bit pattern is used to determine if <strong>ITM_RxBuffer</strong> is empty
or contains a valid value.
</p>
<pre>
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
</pre>
<p>
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
It returns the received character or '-1' if no character was available.
</p>
<pre>
static __INLINE int32_t ITM_ReceiveChar (void) {
int32_t ch = -1; /* no character available */
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
ch = ITM_RxBuffer;
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
}
return (ch);
}
</pre>
<h3>ITM_CheckChar</h3>
<p>
<strong>ITM_CheckChar</strong> is used to check if a character is received.
</p>
<pre>
static __INLINE int32_t ITM_CheckChar (void) {
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
return (0); /* no character available */
} else {
return (1); /* character available */
}
}</pre>
<p>&nbsp;</p>
<h2><a name="ITM_DbgSup"></a>ITM Debug Support in a Debugger</h2>
<p>
The Debugger shall offer a dedicated console window for printf style debug input and output using the CMSIS defined ITM methods described above.
</p>
<p>Direction: Microcontroller -&gt; Debugger:</p>
<ul>
<li>
at the beginning of a debug session the debugger shall enable ITM trace on channel 0 and continuously snoop for channel 0 data on the ITM trace
stream it receives from the Microcontroller's CoreSight ITM unit
</li>
<li>
data received via the ITM communication channel 0 is interpreted as charater and gets redirected into the dedicated <strong>Console Window</strong>
</li>
</ul>
<p>Direction: Debugger -&gt; Microcontroller:</p>
<ul>
<li>
at the beginning of a debug session the debugger shall seek for the presence of the global variable named <strong>ITM_RxBuffer</strong> in the debug
information of the application being loaded
</li>
<li>
strings entered into the <strong>Console Window</strong> are written by the debugger as a stream of char values via the variable <strong>ITM_RxBuffer</strong>.
</li>
<li>
the debugger writes the next character into the <strong>ITM_RxBuffer</strong> only once the value has been read and the <strong>ITM_RXBUFFER_EMPTY</strong> value being set.
(refer to: ITM_ReceiveChar()).
</ul>
</body>
</html>
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<html>
<head>
<title>CMSIS Version History</title>
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<h1>CMSIS Version History</h1>
<p align="center">This document describes the changes between the different CMSIS versions.</p>
<p align="center">Version: 2.10 - July 2011</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
</p>
<hr>
<h2>Contents</h2>
<ol>
<li class="LI2"><a href="#Toolchain">Used Toolchains</a></li>
<li class="LI2"><a href="#6">Changes to version V2.00</a></li>
<li class="LI2"><a href="#5">Changes to version V1.30</a></li>
<li class="LI2"><a href="#4">Changes to version V1.20</a></li>
<li class="LI2"><a href="#2">Open Points</a></li>
<li class="LI2"><a href="#1">Limitations</a></li>
</ol>
<h2><a name="Toolchain"></a>Used Toolchains</h2>
<p>
Following toolchains have been used for test / verification:</i>.
</p>
<ul>
<li>ARM: MDK-ARM Version 4.21</li>
<li>GNU: Sourcery G++ Lite Edition for ARM 2010.09-51</li>
<li>IAR: IAR Embedded Workbench Kickstart Edition V6.10</li>
</ul>
<h2><a name="6"></a>Changes to version V2.00</h2>
<h3>Added CMSIS DSP Software Library support for Cortex-M0 based MCUs</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> provides now also libraries and examples for Cortex-M0.
</p>
<p>
For more information refer to <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Added big endian support for DSP library</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> provides now also pre-build libraries
and projects for big endian devices.
</p>
<p>
For more information refer to <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Simplified folder structure for CMSIS include files</h3>
<p>
All CMSIS core include files as well as the DSP-Library header files are located in
a single folder <strong>./CMSIS/Include</strong>.
</p>
<h3>Changed folder structure for Device Support packages</h3>
<p>
Device Support packages are expected to be in folder <strong>./Device</strong> located at the
same level as <strong>./CMSIS</strong>.
</p>
<p>The new Device folder contains the following subfolders:</p>
<ul>
<li><b>Device</b></li>
<ul>
<li>&lt;<b>Vendor</b>&gt;
<ul>
<li>&lt;<b>Device</b>&gt; | &lt;<b>Device Series</b>&gt;
<ul>
<li><b>Include</b><br>
&lt;device&gt;.h<br>
system_&lt;device&gt;.h<br>
</li>
<li><b>Source</b>
<ul>
<li><b>Templates</b><br>
system_&lt;device&gt;.c<br>
<ul>
<li>&lt;<b>Toolchain</b>&gt;<br>
startup_&lt;device&gt;.s<br>
</li>
<li>&lt;<b>Toolchain</b>&gt;</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
</ul>
<li>&lt;<b>Device</b>&gt; | &lt;<b>Device Series</b>&gt;</li>
<li>...</li>
</ul>
</li>
<li>&lt;<b>Vendor</b>&gt;</li>
<li>...</li>
</ul>
</li>
</ul>
<p>Template files are application specific files and are required to be copied to the project prior to use!</p>
<h3>Removed CMSIS core source files</h3>
<p>
The CMSIS core source files <strong>core_cm0.c, core_cm3.c, core_cm4.c</strong>
containing helper functions for older ARM compiler versions got removed.
</p>
<p>
For the <b>ARM Compiler Toolchain </b>version <b>V4.0.677</b> or later is
required!</p>
<h2><a name="5"></a>Changes to version V1.30</h2>
<h3>Added CMSIS DSP Software Library</h3>
<p>
The <strong>CMSIS DSP Software Library</strong> is a suite of common signal processing functions targeted
to Cortex-M processor based microcontrollers. Even though the code has been specifically
optimized towards using the extended DSP instruction set of the Cortex-M4 processor,
the library can be compiled for any Cortex-M processor.
</p>
<p>
For more information see <i>CMSIS DSP Library documentation</i>.
</p>
<h3>Added CMSIS System View Description</h3>
<p>
The <strong>CMSIS System View Description</strong> answers the challenges of accurate, detailed and
timely device aware peripheral debugging support for Cortex Microcontroller based
devices by the software development tools vendor community.
</p>
<p>
Silicon vendors shall create and maintain a formalized description of the debug view
for all the peripherals contained in their Cortex Microcontroller based devices.
Tool vendors use such descriptions to establish device specific debug support in
their debugging tools.
</p>
<p>
A standardized System View Description shall provide a common approach to
capturing peripheral debug related information in a machine readable files.
</p>
<p>
For more information see <i>CMSIS System View Description</i>.
</p>
<h3>Added Cortex-M4 Core Support</h3>
<p>
Additional folder <strong>CM4</strong>, containing the Cortex-M4 core support files, has been added.
</p>
<ul>
<li>CM0</li>
<li>CM3</li>
<li>CM4
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
</ul>
</li>
</ul>
<h3>New naming for Core Support Files</h3>
<p>
The new Core Support Files are:
</p>
<ul>
<li>core_cm#.h (# = 0, 3, 4)</li>
<li>core_cmFunc.h (Cortex-M Core Register access functions)</li>
<li>core_cmInstr.h (Cortex-M Core instructions)</li>
<li>core_cm4_simd.h (Cortex-M4 SIMD instructions)</li>
</ul>
<h2><a name="4"></a>Changes to version V1.20</h2>
<h3>Removed CMSIS Middelware packages</h3>
<p>
CMSIS Middleware is removed and no longer focus of CMSIS.
</p>
<h3>SystemFrequency renamed to SystemCoreClock</h3>
<p>
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
because the variable holds the clock value at which the core is running.
</p>
<h3>Changed startup concept</h3>
<p>
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
from main) has the weakness that it does not work for controllers which need a already
configuerd clock system to configure the external memory controller.
</p>
<h5>Changed startup concept</h5>
<ul>
<li>
SystemInit() is called from startup file before <strong>premain</strong>.
</li>
<li>
<strong>SystemInit()</strong> configures the clock system and also configures
an existing external memory controller.
</li>
<li>
<strong>SystemInit()</strong> must not use global variables.
</li>
<li>
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
</li>
<li>
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
and must be called whenever the core clock is changed.<br>
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
the current core clock.
</li>
</ul>
<h3>Advanced Debug Functions</h3>
<p>
ITM communication channel is only capable for OUT direction. To allow also communication for
IN direction a simple concept is provided.
</p>
<ul>
<li>
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
</li>
<li>
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
</li>
<li>
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
</li>
</ul>
<p>
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
</p>
<h3>Core Register Bit Definitions</h3>
<p>
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
defines correspond with the Cortex-M Technical Reference Manual.
</p>
<p>
e.g. SysTick structure with bit definitions
</p>
<pre>
/** \brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */</pre>
<h3>DoxyGen Tags</h3>
<p>
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
using DoxyGen.
</p>
<h3>Folder Structure</h3>
<p>
The folder structure is changed to differentiate the single support packages.
</p>
<ul>
<li>CM0</li>
<li>CM3
<ul>
<li>CoreSupport</li>
<li>DeviceSupport</li>
<ul>
<li>Vendor
<ul>
<li>Device
<ul>
<li>Startup
<ul>
<li>Toolchain</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Vendor</li>
<li>...</li>
</ul>
</li>
<li>Example <i>(optional)</i>
<ul>
<li>Toolchain
<ul>
<li>Device</li>
<li>Device</li>
<li>...</li>
</ul>
</li>
<li>Toolchain</li>
<li>...</li>
</ul>
</li>
</ul>
</li>
<li>Documentation</li>
</ul>
<h2><a name="2"></a>Open Points</h2>
<p>
Following points need to be clarified and solved:
</p>
<ul>
<li>
<p>
Equivalent C and Assembler startup files.
</p>
<p>
Is there a need for having C startup files although assembler startup files are
very efficient and do not need to be changed?
<p/>
</li>
<li>
<p>
Placing of HEAP in external RAM.
</p>
<p>
It must be possible to place HEAP in external RAM if the device supports an
external memory controller.
</p>
</li>
<li>
<p>
Placing of STACK /HEAP.
</p>
<p>
STACK should always be placed at the end of internal RAM.
</p>
<p>
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
</p>
</li>
</ul>
<h2><a name="1"></a>Limitations</h2>
<p>
The following limitations are not covered with the current CMSIS version:
</p>
<ul>
<li>
No <strong>C startup files</strong> are available.
</li>
</ul>
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* -------------------------------------------------------------------
* Copyright (C) 2011 ARM Limited. All rights reserved.
*
* Date: 25 July 2011
* Revision: V2.10
*
* Project: Cortex Microcontroller Software Interface Standard (CMSIS)
* Title: Release Note for CMSIS
*
* -------------------------------------------------------------------
NOTE - Open the index.html file to access CMSIS documentation
The Cortex Microcontroller Software Interface Standard (CMSIS) provides a single standard across all
Cortex-Mx processor series vendors. It enables code re-use and code sharing across software projects
and reduces time-to-market for new embedded applications.
CMSIS is released under the terms of the end user license agreement ("CMSIS END USER LICENCE AGREEMENT.pdf").
Any user of the software package is bound to the terms and conditions of the end user license agreement.
You will find the following sub-directories:
Documentation - Contains CMSIS documentation.
DSP_Lib - MDK project files, Examples and source files etc.. to build the
CMSIS DSP Software Library for Cortex-M0, Cortex-M3, Cortex-M4 processors.
Include - CMSIS Core Support and CMSIS DSP Include Files.
Lib - CMSIS DSP Binaries
---
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<html>
<head>
<title>CMSIS Release Notes</title>
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<body>
<h1>CMSIS Release Notes</h1>
<p align="center">Release Notes for CMSIS V2.00</p>
<p align="center">November 2010</p>
<p class="TinyT">Information in this file, the accompany manuals, and software is<br>
Copyright © ARM Ltd.<br>All rights reserved.
<p align="center"><img src="Documentation/CMSIS_Logo_Final.jpg" height="78" width="197">
</p>
<hr>
<h2>Contents</h2>
<ul>
<li class="LI2"><a href="Documentation/CMSIS_History.htm">CMSIS Version History</a>
lists the changes between the different CMSIS versions.
</li>
<li class="LI2"><a href="Documentation/CMSIS_Core.htm">CMSIS Core Support</a>
contains a general description for CMSIS.
</li>
<li class="LI2"><a href="Documentation/DSP_Lib/html/index.html">CMSIS DSP Software Library</a>
describes the CMSIS DSP software library.
</li>
<li class="LI2"><a href="Documentation/CMSIS_System_View_Description.htm">CMSIS System View Description</a>
describes the CMSIS System View Description.
</li>
<li class="LI2"><a href="Documentation/CMSIS_CM4_SIMD.htm">CMSIS Support for Cortex-M4 SIMD Instructions</a>
lists the Cortex-M4 instructions supported by CMSIS.
</li>
<li class="LI2"><a href="Documentation/CMSIS_DebugSupport.htm">CMSIS Debug Support</a>
describes the available CMSIS Debug functions and the used methods.
</li>
<li class="LI2"><a href="CMSIS END USER LICENCE AGREEMENT.pdf">License</a></li>
</ul>
</body>
</html>
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<div class="Section1">
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<h1 style="margin-bottom: 0.25in; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
Notes for STM32F2xx Standard Peripherals Library</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright&nbsp;2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img style="border: 0px solid ; width: 86px; height: 65px;" alt="" id="_x0000_i1025" src="_htmresc/logo.bmp"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
<ol style="margin-top: 0in;" start="1" type="1">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F2xx Standard Peripheral
Library&nbsp;update History</a><o:p></o:p></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
</ol>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">STM32F2xx Standard
Peripherals Library update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 13-April-2012<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files:&nbsp;license disclaimer text update and add link to the License file on ST Internet.</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32F2xx HAL and BSP components&nbsp;update (</span><span style="font-size: 10pt; font-family: Verdana;">for more details refer to each&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">component</span><span style="font-size: 10pt; font-family: Verdana;">'s release notes):</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CMSIS drivers:</span> update directory structure&nbsp;to be compliant&nbsp;with CMSIS V2.1, </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">full&nbsp;API compatibility maintained vs. V1.0.0</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Standard Peripherals&nbsp;Drivers:</span> miscellaneous bug fix and </span><span style="font-size: 10pt; font-family: Verdana;">enhancement</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM322xG_EVAL board drivers:</span>&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">update drivers architecture and folder organization,&nbsp;<span style="font-weight: bold; font-style: italic;">full&nbsp;API compatibility maintained vs. V4.6.2 (and </span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">V4.6.1)</span></span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Template projects:&nbsp;</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update&nbsp;to be in line with changes made on latest version of the&nbsp;STM32F2xx CMSIS&nbsp;and STM322xG_EVAL drivers</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update </span><span style="font-size: 10pt; font-family: Verdana;"> to use the latest version of the supported toolchains</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All
examples:&nbsp;</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Update&nbsp;to be in line with latest version of&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">STM322xG_EVAL board drivers</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Miscellaneous bug fix and </span><span style="font-size: 10pt; font-family: Verdana;">enhancement</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">
For more details refer to the example's&nbsp;release notes</span></li></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;"><span style="font-weight: bold;"></span></span></span><br>
<span style="font-size: 10pt; font-family: Verdana; color: black;"><o:p></o:p></span><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 23px; width: 868px;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Contents<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Cortex-M </span><span style="font-size: 10pt; font-family: Verdana;">CMSIS </span><span style="font-size: 10pt; font-family: Verdana;">V2.1 (<a href="Libraries/CMSIS/Documentation/CMSIS_History.htm">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32F2xx CMSIS V1.1.3 (<a href="Libraries/CMSIS/Device/ST/STM32F2xx/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">STM32</span><span style="font-size: 10pt; font-family: Verdana;">F2</span><span style="font-size: 10pt; font-family: Verdana;">xx_StdPeriph_Driver V1.1.2 (<a href="Libraries/STM32F2xx_StdPeriph_Driver/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32</span><span style="font-size: 10pt; font-family: Verdana;">F2</span><span style="font-size: 10pt; font-family: Verdana;">xx_StdPeriph_Examples V1.1.0 (<a href="Project/STM32F2xx_StdPeriph_Examples/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32</span><span style="font-size: 10pt; font-family: Verdana;">F2</span><span style="font-size: 10pt; font-family: Verdana;">xx_StdPeriph_Template V1.1.0 (<a href="Project/STM32F2xx_StdPeriph_Template/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM322xG_EVAL board drivers&nbsp;V5.0.3</span><span style="font-size: 10pt; font-family: Verdana;"> (<a href="Utilities/STM32_EVAL/STM322xG_EVAL/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32_EVAL Common drivers V5.0.2</span><span style="font-size: 10pt; font-family: Verdana;">&nbsp;(<a href="Utilities/STM32_EVAL/Common/Release_Notes.html">release
notes</a>)</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"></span><br><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;"><span style="font-weight: bold;"></span></span></span><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 23px; width: 868px;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Development Toolchains and Compilers<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">IAR Embedded Workbench for ARM (EWARM) toolchain V6.30.7 + J-Link</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">RealView Microcontroller Development Kit (MDK-ARM) toolchain V4.23 + ULINK</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Raisonance IDE RIDE7 (RIDE) toolchain (RIDE7 IDE:7.36, RKitARM for RIDE7:1.38) +&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">Rlink Pro</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Atollic TrueSTUDIO&nbsp;toolchain V3.0.0 +&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">ST-LINK</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">TASKING VX-toolset for ARM Cortex-M V4.2r1 +&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">ST-LINK</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 / 18-April-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">First official release for <span style="font-weight: bold; font-style: italic;">STM32F2xx devices</span></span></li></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;"><span style="font-weight: bold;"></span></span></span><br>
<span style="font-size: 10pt; font-family: Verdana; color: black;"><o:p></o:p></span><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 23px; width: 868px;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Contents<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">CM3 CMSIS </span><span style="font-size: 10pt; font-family: Verdana;">V1.30 (<a href="Libraries/CMSIS/CMSIS_changes.htm">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32F2xx CMSIS V1.0.0 (<a href="Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F2xx/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">STM32</span><span style="font-size: 10pt; font-family: Verdana;">F2</span><span style="font-size: 10pt; font-family: Verdana;">xx_StdPeriph_Driver V1.0.0 (<a href="Libraries/STM32F2xx_StdPeriph_Driver/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32</span><span style="font-size: 10pt; font-family: Verdana;">F2</span><span style="font-size: 10pt; font-family: Verdana;">xx_StdPeriph_Examples V1.0.0 (<a href="Project/STM32F2xx_StdPeriph_Examples/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32</span><span style="font-size: 10pt; font-family: Verdana;">F2</span><span style="font-size: 10pt; font-family: Verdana;">xx_StdPeriph_Template V1.0.0 (<a href="Project/STM32F2xx_StdPeriph_Template/Release_Notes.html">release
notes</a>)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">STM32_EVAL V4.6.1 (<a href="Utilities/STM32_EVAL/Release_Notes.html">release
notes</a>)</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"></span><br><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;"><span style="font-weight: bold;"></span></span></span><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 23px; width: 868px;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Development Toolchains and Compilers<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">IAR Embedded Workbench for ARM (EWARM) toolchain V6.10.5</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">RealView Microcontroller Development Kit (MDK-ARM) toolchain V4.20</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Raisonance IDE RIDE7 (RIDE) toolchain (RIDE7 IDE:7.30.10, RKitARM for RIDE7:1.31.10)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Atollic TrueSTUDIO STM32 (TrueSTUDIO) toolchain V2.0.1</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">TASKING VX-toolset for ARM Cortex-M V3.2r1</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"><br></span>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2><p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this&nbsp;</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">package</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"> except in compliance with the License. You may obtain a copy of the License at:<br><br></span></p><div style="text-align: center;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <a target="_blank" href="http://www.st.com/software_license_agreement_liberty_v2">http://www.st.com/software_license_agreement_liberty_v2</a></span><br><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"></span></div><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"><br>Unless
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<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
Notes for STM32 Evaluation Board Common Drivers</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
<ol style="margin-top: 0cm;" start="1" type="1">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32 Evaluation Board Common Drivers
update History</a><o:p></o:p></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32 Evaluation Board Common Drivers update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.2 / 05-March-2012<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files:&nbsp;license disclaimer text update and add link to the License file on ST Internet.</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.1 / 28-December-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files: update disclaimer to add reference to the&nbsp;new license agreement</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.0 / 30-September-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Update STM32 Evaluation Board Drivers architecture and folder organization,&nbsp;<span style="font-weight: bold; font-style: italic;">full&nbsp;API compatibility maintained vs. V4.6.2</span></span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">All the HW&nbsp;drivers required for each board are&nbsp;provided within this board folder</span><span style="font-size: 10pt; font-family: Verdana;">. The concerned drivers are:</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_ee.c\.h:</span>&nbsp;I2C M24CXX EEPROM memory driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_tsensor.c\.h:</span>&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">I2C </span><span style="font-size: 10pt; font-family: Verdana;">LM75 temperature sensor driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_spi_flash.c\.h:</span> SPI M25Pxxx FLASH memory driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_sdio_sd.c\.h:</span> SDIO SD Card memory driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_spi_sd.c\.h:</span>&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">SPI SD Card memory driver&nbsp;</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">These drivers were&nbsp;moved from </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">\Common</span> to </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">\STM32XXX_EVAL</span> folder(s)</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">\Common&nbsp;</span></span><span style="font-size: 10pt; font-family: Verdana;">folder contains only drivers for the fonts and log module used by the LCD driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval.c\.h</span> files removed, <span style="font-style: italic; text-decoration: underline;">as consequence you need to perform the following update on your project configuration&nbsp; (based on EVAL drivers V4.6.2):</span></span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">In the&nbsp;project files, add your EVAL board driver source&nbsp;file </span><span style="font-size: 10pt; font-family: Verdana;">(ex. <span style="font-style: italic;">"stm3210c_eval.c"</span>)&nbsp;instead of <span style="font-style: italic;">"stm32_eval.c"</span></span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Include your EVAL board driver header file (ex. <span style="font-style: italic;">#include "stm3210c_eval.h"</span>)&nbsp;instead of <span style="font-style: italic;">#include "stm32_eval.h"</span></span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">If
you are&nbsp;using the EVAL board's LCD, you need to add the include of
the LCD header file (ex: #include "stm3210c_eval_lcd.h")</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">If
you are using the LCD log module, after copying it to the application
folder you have to edit it and update the name of the LCD header file. For more details, refer to the <span style="font-style: italic;">lcd_log_conf_template.h</span> driver description.<br></span></li></ul></ul></ul></ul><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 175px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.6.2 /&nbsp;22-July-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM3210C_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval_lcd.c: update to support new LCD AM240320D5TOQW01H (controller ILI9325)</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM322xG-EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval.h: fix value of the SDIO clock divider (<span style="font-style: italic;">SDIO_TRANSFER_CLK_DIV</span> constant) to 2 instead of 0</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_lcd.c: increase FSMC<span style="font-style: italic;"> AddressSetupTime</span> value from 1 to 3 to be compliant with some&nbsp;LCD access timing</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_audio_codec.c: update <span style="font-style: italic;">Codec_CtrlInterface_Init(</span>) and <span style="font-style: italic;">Codec_GPIO_Init(</span>) functions to not reconfigure the I2C peripheral if it's&nbsp;already </span><span style="font-size: 10pt; font-family: Verdana;">enabled and </span><span style="font-size: 10pt; font-family: Verdana;">configured&nbsp;(to
avoid configuring the I2C twice when using both&nbsp;Audio codec and IO
Expander drivers in the same application).</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.6.1 / 18-April-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Update&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">some</span><span style="font-size: 10pt; font-family: Verdana;"> <span style="font-weight: bold; font-style: italic;">STM322xG_EVAL</span> drivers (no change on the API) to fix&nbsp;warnings wit<span style="font-weight: bold; font-style: italic;"></span>h TASKING C compiler.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Change the Release Notes name to <span style="font-weight: bold; font-style: italic;">STM32 Evaluation Board Drivers </span><br></span></li><li style="font-style: italic;" class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">SD_LowLevel_Init(): change&nbsp;SDIO pins speed configuration to&nbsp;"GPIO_Speed_25MHz"</span></li></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.6.0 / 11-March-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Official version supporting <span style="font-weight: bold; font-style: italic;">STM322xG_EVAL</span> evaluation board RevB (for <span style="font-weight: bold; font-style: italic;">STM32F2xx</span> devices).</span></li><li style="font-style: italic;" class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Common</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
new LCD log utility drivers: The LCD Log module allows to automatically
set a header and footer on any application using the LCD display and
allows to dump user, debug and error messages by using the following
macros: LCD_ErrLog(),&nbsp;&nbsp;&nbsp; LCD_UsrLog() and LCD_DbgLog().</span></li></ul></ul><div style="margin-left: 40px;"><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline; font-style: italic;">Note</span><span style="font-style: italic;">:</span> the <span style="font-style: italic;">STM322xG_EVAL</span> board RevA was wrongly named <span style="font-style: italic;">STM3220F_EVAL</span></span><br></div><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.5.0 / 07-March-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_sdio_sd.c\.h: driver improvement</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">SD Clock increased to 24MHz to improve the data transfer performance.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
new functions to check the SDIO peripheral and SD Card status at any
time:&nbsp;SD_WaitReadOperation(), SD_WaitWriteOperation(). The
software sequence is little bit changed&nbsp;but without any impact on
driver API. For more details, refer to the stm32_eval_sdio_sd.c
driver&nbsp;description.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
new structure containing the SD Status register parameters. This
structure is called by the
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
&nbsp;SD_SendSDStatus() function.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Transfers mode updated</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Read/Write Block using Polling and DMA modes</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Read/Write Multi Blocks using DMA mode only</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Interrupt mode removed</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Data transfer functions are managing only fixed Block size (512-byte)&nbsp;</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM32100B-EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100b_eval_cec.c: fix some strict ANSI-C errors</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM32100E-EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval_cec.c: fix some strict ANSI-C errors<br></span></li></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.4.0 / 31-December-2010<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add new directory for STM32L152-EVAL board containing the following files:</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32l152_eval.h/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm32l152</span><span style="font-size: 10pt; font-family: Verdana;">_eval_lcd.h/.c, stm32l152_eval_glass_lcd.h</span><span style="font-size: 10pt; font-family: Verdana;">/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm32l152_eval_i2c_ee</span><span style="font-size: 10pt; font-family: Verdana;">.h/.c</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add support for the STM32100E-EVAL Rev B: SPI FLASH CS pin "sFLASH_CS_PIN" changed from PB.02 to PE.06.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval_lcd.h/.c: Add support for "LCD_ILI9325" LCD controller.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval_fsmc_onenand.h/.c driver updated to correct asynchronous and synchronous read operations procedures.<br>
</span></li></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">4.3.0
- 10/15/2010</span></h3>
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C EEPROM,&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">Temperature Sensor and&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">IOE Expander</span><span style="font-size: 10pt; font-family: Verdana;"> drivers&nbsp;updated to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">use the DMA for read/write transfer and add more robustness</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SD Card (SDIO) driver updated to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">add more robustness</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SPI Flash and </span><span style="font-size: 10pt; font-family: Verdana;">SD Card (SPI) drivers: SPI MISO pin configuration changed to Input Floating&nbsp;</span></li></ul>
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">Utilities</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
<ul style="margin-top: 0in;" type="circle"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add new directory for STM32100E-EVAL board containing the following files:</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval.h/.c,
stm32100e_eval_lcd.h/.c, stm32100e_eval_cec.h/.c,
stm32100e_eval_fsmc_onenand.h/.c, stm32100e_eval_fsmc_sram.h/.c,
stm32100e_eval_ioe.h/.c</span><br>
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Common</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_sdio_sd.c:
Update the DMA End of Transfer Check loop inside the SD_ReadBlock(),
SD_WriteBlock(), SD_ReadMultiBlocks() and SD_Write MultiBlocks().</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_ee.c/.h</span> <br>
</span></li></ul><ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced sEE_WaitEepromStandbyState() function for more robustness.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced Read and Write operations to manage I2C limitations.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add Timeout management with user callback implementation which allows recovering from I2C bus errors.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
critical sections user callbacks allowing to disable then enable
interrupts when I2C operation require to be not interrupted.</span></li></ul></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_tsensor.c/.h</span> <br>
</span></li></ul><ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced I2C communication functions by using DMA for registers Read and Write operations.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add Timeout management with user callback implementation which allows recovering from I2C bus errors.</span></li></ul></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM32100B_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100b_eval.h: Add LM75 DMA defines.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100b_eval_lcd.c: </span><span style="font-size: 10pt; font-family: Verdana;">Change "SPI_FLASH" by "sFLASH" in LCD_DrawBMP() function.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM3210B_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210b_eval.h: Add LM75 DMA defines.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210b_eval_lcd.c: </span><span style="font-size: 10pt; font-family: Verdana;">Change "SPI_FLASH" by "sFLASH" in LCD_DrawBMP() function.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM3210C_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval.h: Add EEPROM driver Timeout define.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval_lcd.c: </span><span style="font-size: 10pt; font-family: Verdana;">Change "SPI_FLASH" by "sFLASH" in LCD_DrawBMP() function.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval_i2c_ioe.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced I2C communication functions by using DMA for registers Read and Write operations.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add Timeout management with user callback implementation which allows recovering from I2C bus errors.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">change IOE_I2C_SPEED from "400000" to "300000".</span></li></ul></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">STM3210E_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval.c: change "void SD_WaitForDMAEndOfTransfer(void)" to "uint32_t SD_DMAEndOfTransferStatus(void)".</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval.h: Add LM75 DMA defines.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nand.h: remove "NAND_CMD_AREA_TRUE1" define.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nand.c: Update FSMC timing in NAND_Init() function to be aligned with AN2784 application note.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nor.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">NOR</span><span style="font-size: 10pt; font-family: Verdana;">_Init()&nbsp;function: add FSMC_AsynchronousWait&nbsp;field&nbsp;to FSMC_NORSRAMInitStructure&nbsp;</span></li></ul></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_sram.c<br>
</span></li></ul><ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Update FSMC timing in SRAM_Init() function to be aligned with AN2784 application note.</span><br>
<span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">SRAM_Init()&nbsp;function: add FSMC_AsynchronousWait&nbsp;field&nbsp;to FSMC_NORSRAMInitStructure&nbsp;</span></li></ul></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_lcd.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">LCD_FSMCConfig() function: add FSMC_AsynchronousWait&nbsp;field&nbsp;to FSMC_NORSRAMInitStructure&nbsp;</span></li></ul></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">4.2.0
- 04/16/2010</span></h3>
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C EEPROM driver
update to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">use the DMA to
perform&nbsp;data transfer&nbsp;to/from EEPROM memory.</span><span style="font-size: 10pt; font-family: Verdana;"> </span><span style="font-size: 10pt;"><o:p></o:p></span></li></ul>
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">Utilities</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><i><u><span style="font-size: 10pt; font-family: Verdana;">STM32_EVAL</span></u></i><u><span style="font-size: 10pt;"><o:p></o:p></span></u></li></ul>
<ul style="margin-top: 0in;" type="disc"><ul style="margin-top: 0in;" type="circle"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_ee.c</span>:
updated to use the DMA to perform&nbsp;data transfer&nbsp;to/from
EEPROM memory. For more details, refer to the description provided
within this file.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210c_eval.c</span>: add low level
functions to configure the DMA (needed for I2C EEPROM driver)<br>
</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210c_eval_ioe.c</span>: add a delay
in&nbsp;IOE_TS_GetState() function to wait till the end of ADC
conversion</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210e_eval_fsmc_nor.c</span>: add </span><span style="font-size: 10pt; font-family: Verdana;">PD6 pin </span><span style="font-size: 10pt; font-family: Verdana;">configuration&nbsp;in
NOR_Init() function</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210b_eval_lcd.c</span>: remove the
second ";" from "static void PutPixel(int16_t x, int16_t y);;"&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">4.1.0
- 03/01/2010</span></h3>
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
for&nbsp;<b>STM32 Low-density Value line (STM32F100x4/6) and
Medium-density Value line (STM32F100x8/B) devices</b>.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for the
STMicroelectronics STM32100B-EVAL evaluation board. </span><span style="font-size: 10pt;"><o:p></o:p></span></li></ul>
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">Utilities</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><i><u><span style="font-size: 10pt; font-family: Verdana;">STM32_EVAL</span></u></i><u><span style="font-size: 10pt;"><o:p></o:p></span></u></li></ul>
<ul style="margin-top: 0in;" type="circle"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Add new directory
"Common" containing a common drivers for all STM32 evaluation boards:
fonts.h/.c, stm32_eval_i2c_ee.h/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_spi_flash.h/.c,
</span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_i2c_tsensor.h/.c,
</span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_spi_sd.h/.c
and </span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_sdio_sd.h/.c</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new driver for the
STM32100B-EVAL managing Leds, push button and COM ports.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">New HDMI CEC High level
driver.</span><br>
</li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span>For all LCD drivers new fonts has
been added.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">New FSMC memories
drivers for STM3210E-EVAL board: stm3210e_eval_fsmc_sram.h/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nor.h/.c
and </span><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nand.h/.c.</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span><h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this&nbsp;</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">package</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"> except in compliance with the License. You may obtain a copy of the License at:<br><br></span></p><div style="text-align: center;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <a target="_blank" href="http://www.st.com/software_license_agreement_liberty_v2">http://www.st.com/software_license_agreement_liberty_v2</a></span><br><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"></span></div><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"><br>Unless
required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, <br>WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See
the License for the specific language governing permissions and
limitations under the License.</span><b><span style="font-size: 10pt; font-family: Verdana; color: black;"></span></b>
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<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32<span style="color: black;">&nbsp;Microcontrollers
visit </span><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/class/1734.jsp" target="_blank">www.st.com/STM32</a></span></u></span><span style="font-size: 10pt; font-family: Verdana;"><a target="_blank" href="http://www.st.com/internet/mcu/family/141.jsp"><u><span style="color: blue;"></span></u></a></span><span style="font-size: 10pt; font-family: Verdana;"><u><span style="color: blue;"></span></u></span><span style="color: black;"><o:p></o:p></span></p>
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/Common/fonts.c
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/Common/fonts.h
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/**
******************************************************************************
* @file fonts.h
* @author MCD Application Team
* @version V5.0.2
* @date 05-March-2012
* @brief Header for fonts.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __FONTS_H
#define __FONTS_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup Common
* @{
*/
/** @addtogroup FONTS
* @{
*/
/** @defgroup FONTS_Exported_Types
* @{
*/
typedef struct _tFont
{
const uint16_t *table;
uint16_t Width;
uint16_t Height;
} sFONT;
extern sFONT Font16x24;
extern sFONT Font12x12;
extern sFONT Font8x12;
extern sFONT Font8x8;
/**
* @}
*/
/** @defgroup FONTS_Exported_Constants
* @{
*/
#define LINE(x) ((x) * (((sFONT *)LCD_GetFont())->Height))
/**
* @}
*/
/** @defgroup FONTS_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup FONTS_Exported_Functions
* @{
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __FONTS_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/Common/lcd_log.c
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/**
******************************************************************************
* @file lcd_log.c
* @author MCD Application Team
* @version V5.0.2
* @date 05-March-2012
* @brief This file provides all the LCD Log firmware functions.
*
* The LCD Log module allows to automatically set a header and footer
* on any application using the LCD display and allows to dump user,
* debug and error messages by using the following macros: LCD_ErrLog(),
* LCD_UsrLog() and LCD_DbgLog().
*
* It supports also the scroll feature by embedding an internal software
* cache for display. This feature allows to dump message sequentially
* on the display even if the number of displayed lines is bigger than
* the total number of line allowed by the display.
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "lcd_log.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup Common
* @{
*/
/** @defgroup LCD_LOG
* @brief LCD Log LCD_Application module
* @{
*/
/** @defgroup LCD_LOG_Private_Types
* @{
*/
/**
* @}
*/
/** @defgroup LCD_LOG_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup LCD_LOG_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup LCD_LOG_Private_Variables
* @{
*/
LCD_LOG_line LCD_CacheBuffer [LCD_CACHE_DEPTH];
uint16_t LCD_LineColor;
uint16_t LCD_CacheBuffer_xptr;
uint16_t LCD_CacheBuffer_yptr_top;
uint16_t LCD_CacheBuffer_yptr_bottom;
uint16_t LCD_CacheBuffer_yptr_top_bak;
uint16_t LCD_CacheBuffer_yptr_bottom_bak;
FunctionalState LCD_CacheBuffer_yptr_invert;
FunctionalState LCD_ScrollActive;
FunctionalState LCD_Lock;
FunctionalState LCD_Scrolled;
uint16_t LCD_ScrollBackStep;
/**
* @}
*/
/** @defgroup LCD_LOG_Private_FunctionPrototypes
* @{
*/
static void LCD_LOG_UpdateDisplay (void);
/**
* @}
*/
/** @defgroup LCD_LOG_Private_Functions
* @{
*/
/**
* @brief Init the LCD Log module
* @param None
* @retval None
*/
void LCD_LOG_Init ( void)
{
/* Deinit LCD cache */
LCD_LOG_DeInit();
/* Clear the LCD */
LCD_Clear(Black);
}
/**
* @brief DeInitializes the LCD Log module.
* @param None
* @retval None
*/
void LCD_LOG_DeInit(void)
{
LCD_LineColor = LCD_LOG_DEFAULT_COLOR;
LCD_CacheBuffer_xptr = 0;
LCD_CacheBuffer_yptr_top = 0;
LCD_CacheBuffer_yptr_bottom = 0;
LCD_CacheBuffer_yptr_top_bak = 0;
LCD_CacheBuffer_yptr_bottom_bak = 0;
LCD_CacheBuffer_yptr_invert= ENABLE;
LCD_ScrollActive = DISABLE;
LCD_Lock = DISABLE;
LCD_Scrolled = DISABLE;
LCD_ScrollBackStep = 0;
}
/**
* @brief Display the application header (title) on the LCD screen
* @param Title : pointer to the string to be displayed
* @retval None
*/
void LCD_LOG_SetHeader (uint8_t *Title)
{
sFONT *cFont;
uint32_t size = 0 , idx;
uint8_t *ptr = Title;
uint8_t tmp[27];
/* center the header */
while (*ptr++) size ++ ;
/* truncate extra text */
if(size > 26)
{
size = 26;
}
for (idx = 0 ; idx < 27 ; idx ++)
{
tmp[idx] = ' ';
}
for (idx = 0 ; idx < size ; idx ++)
{
tmp[idx + (27 - size)/2] = Title[idx];
}
/* Clear the LCD */
LCD_Clear(Black);
/* Set the LCD Font */
LCD_SetFont (&Font12x12);
cFont = LCD_GetFont();
/* Set the LCD Text Color */
LCD_SetTextColor(White);
LCD_SetBackColor(Blue);
LCD_ClearLine(0);
LCD_DisplayStringLine(cFont->Height, tmp);
LCD_ClearLine(2 * cFont->Height);
LCD_SetBackColor(Black);
LCD_SetFont (&Font8x12);
}
/**
* @brief Display the application footer (status) on the LCD screen
* @param Status : pointer to the string to be displayed
* @retval None
*/
void LCD_LOG_SetFooter(uint8_t *Status)
{
sFONT *cFont;
uint8_t tmp[40], i;
LCD_SetBackColor(Blue);
cFont = LCD_GetFont();
for (i= 0; i< (320/cFont->Width)-1 ; i++)
{
tmp[i] = ' ';
}
tmp[(320/cFont->Width)-1] = 0;
LCD_DisplayStringLine(LCD_PIXEL_HEIGHT - cFont->Height, tmp);
LCD_DisplayStringLine(LCD_PIXEL_HEIGHT - cFont->Height, Status);
LCD_SetBackColor(Black);
}
/**
* @brief Clear the Text Zone
* @param None
* @retval None
*/
void LCD_LOG_ClearTextZone(void)
{
uint8_t i=0;
sFONT *cFont = LCD_GetFont();
for (i= 0 ; i < YWINDOW_SIZE; i++)
{
LCD_ClearLine((i + YWINDOW_MIN) * cFont->Height);
}
LCD_LOG_DeInit();
}
/**
* @brief Redirect the printf to the lcd
* @param c: character to be displayed
* @param f: output file pointer
* @retval None
*/
PUTCHAR_PROTOTYPE
{
sFONT *cFont = LCD_GetFont();
uint32_t idx;
if(LCD_Lock == DISABLE)
{
if((LCD_ScrollActive == ENABLE)||(LCD_ScrollActive == ENABLE))
{
LCD_CacheBuffer_yptr_bottom = LCD_CacheBuffer_yptr_bottom_bak;
LCD_CacheBuffer_yptr_top = LCD_CacheBuffer_yptr_top_bak;
LCD_ScrollActive = DISABLE;
LCD_Scrolled = DISABLE;
LCD_ScrollBackStep = 0;
}
if(( LCD_CacheBuffer_xptr < LCD_PIXEL_WIDTH /cFont->Width ) && ( ch != '\n'))
{
LCD_CacheBuffer[LCD_CacheBuffer_yptr_bottom].line[LCD_CacheBuffer_xptr++] = (uint16_t)ch;
}
else
{
if(LCD_CacheBuffer_yptr_top >= LCD_CacheBuffer_yptr_bottom)
{
if(LCD_CacheBuffer_yptr_invert == DISABLE)
{
LCD_CacheBuffer_yptr_top++;
if(LCD_CacheBuffer_yptr_top == LCD_CACHE_DEPTH)
{
LCD_CacheBuffer_yptr_top = 0;
}
}
else
{
LCD_CacheBuffer_yptr_invert= DISABLE;
}
}
for(idx = LCD_CacheBuffer_xptr ; idx < LCD_PIXEL_WIDTH /cFont->Width; idx++)
{
LCD_CacheBuffer[LCD_CacheBuffer_yptr_bottom].line[LCD_CacheBuffer_xptr++] = ' ';
}
LCD_CacheBuffer[LCD_CacheBuffer_yptr_bottom].color = LCD_LineColor;
LCD_CacheBuffer_xptr = 0;
LCD_LOG_UpdateDisplay ();
LCD_CacheBuffer_yptr_bottom ++;
if (LCD_CacheBuffer_yptr_bottom == LCD_CACHE_DEPTH)
{
LCD_CacheBuffer_yptr_bottom = 0;
LCD_CacheBuffer_yptr_top = 1;
LCD_CacheBuffer_yptr_invert = ENABLE;
}
if( ch != '\n')
{
LCD_CacheBuffer[LCD_CacheBuffer_yptr_bottom].line[LCD_CacheBuffer_xptr++] = (uint16_t)ch;
}
}
}
return ch;
}
/**
* @brief Update the text area display
* @param None
* @retval None
*/
static void LCD_LOG_UpdateDisplay (void)
{
uint8_t cnt = 0 ;
uint16_t length = 0 ;
uint16_t ptr = 0, index = 0;
sFONT *cFont = LCD_GetFont();
if((LCD_CacheBuffer_yptr_bottom < (YWINDOW_SIZE -1)) &&
(LCD_CacheBuffer_yptr_bottom >= LCD_CacheBuffer_yptr_top))
{
LCD_SetTextColor(LCD_CacheBuffer[cnt + LCD_CacheBuffer_yptr_bottom].color);
LCD_DisplayStringLine ((YWINDOW_MIN + LCD_CacheBuffer_yptr_bottom) * cFont->Height,
(uint8_t *)(LCD_CacheBuffer[cnt + LCD_CacheBuffer_yptr_bottom].line));
}
else
{
if(LCD_CacheBuffer_yptr_bottom < LCD_CacheBuffer_yptr_top)
{
/* Virtual length for rolling */
length = LCD_CACHE_DEPTH + LCD_CacheBuffer_yptr_bottom ;
}
else
{
length = LCD_CacheBuffer_yptr_bottom;
}
ptr = length - YWINDOW_SIZE + 1;
for (cnt = 0 ; cnt < YWINDOW_SIZE ; cnt ++)
{
index = (cnt + ptr )% LCD_CACHE_DEPTH ;
LCD_SetTextColor(LCD_CacheBuffer[index].color);
LCD_DisplayStringLine ((cnt + YWINDOW_MIN) * cFont->Height,
(uint8_t *)(LCD_CacheBuffer[index].line));
}
}
}
#ifdef LCD_SCROLL_ENABLED
/**
* @brief Display previous text frame
* @param None
* @retval Status
*/
ErrorStatus LCD_LOG_ScrollBack (void)
{
if(LCD_ScrollActive == DISABLE)
{
LCD_CacheBuffer_yptr_bottom_bak = LCD_CacheBuffer_yptr_bottom;
LCD_CacheBuffer_yptr_top_bak = LCD_CacheBuffer_yptr_top;
if(LCD_CacheBuffer_yptr_bottom > LCD_CacheBuffer_yptr_top)
{
if ((LCD_CacheBuffer_yptr_bottom - LCD_CacheBuffer_yptr_top) <= YWINDOW_SIZE)
{
LCD_Lock = DISABLE;
return ERROR;
}
}
LCD_ScrollActive = ENABLE;
if((LCD_CacheBuffer_yptr_bottom > LCD_CacheBuffer_yptr_top)&&
(LCD_Scrolled == DISABLE ))
{
LCD_CacheBuffer_yptr_bottom--;
LCD_Scrolled = ENABLE;
}
}
if(LCD_ScrollActive == ENABLE)
{
LCD_Lock = ENABLE;
if(LCD_CacheBuffer_yptr_bottom > LCD_CacheBuffer_yptr_top)
{
if((LCD_CacheBuffer_yptr_bottom - LCD_CacheBuffer_yptr_top) < YWINDOW_SIZE )
{
LCD_Lock = DISABLE;
return ERROR;
}
LCD_CacheBuffer_yptr_bottom --;
}
else if(LCD_CacheBuffer_yptr_bottom <= LCD_CacheBuffer_yptr_top)
{
if((LCD_CACHE_DEPTH - LCD_CacheBuffer_yptr_top + LCD_CacheBuffer_yptr_bottom) < YWINDOW_SIZE)
{
LCD_Lock = DISABLE;
return ERROR;
}
LCD_CacheBuffer_yptr_bottom --;
if(LCD_CacheBuffer_yptr_bottom == 0xFFFF)
{
LCD_CacheBuffer_yptr_bottom = LCD_CACHE_DEPTH - 2;
}
}
LCD_ScrollBackStep++;
LCD_LOG_UpdateDisplay();
LCD_Lock = DISABLE;
}
return SUCCESS;
}
/**
* @brief Display next text frame
* @param None
* @retval Status
*/
ErrorStatus LCD_LOG_ScrollForward (void)
{
if(LCD_ScrollBackStep != 0)
{
if(LCD_ScrollActive == DISABLE)
{
LCD_CacheBuffer_yptr_bottom_bak = LCD_CacheBuffer_yptr_bottom;
LCD_CacheBuffer_yptr_top_bak = LCD_CacheBuffer_yptr_top;
if(LCD_CacheBuffer_yptr_bottom > LCD_CacheBuffer_yptr_top)
{
if ((LCD_CacheBuffer_yptr_bottom - LCD_CacheBuffer_yptr_top) <= YWINDOW_SIZE)
{
LCD_Lock = DISABLE;
return ERROR;
}
}
LCD_ScrollActive = ENABLE;
if((LCD_CacheBuffer_yptr_bottom > LCD_CacheBuffer_yptr_top)&&
(LCD_Scrolled == DISABLE ))
{
LCD_CacheBuffer_yptr_bottom--;
LCD_Scrolled = ENABLE;
}
}
if(LCD_ScrollActive == ENABLE)
{
LCD_Lock = ENABLE;
LCD_ScrollBackStep--;
if(++LCD_CacheBuffer_yptr_bottom == LCD_CACHE_DEPTH)
{
LCD_CacheBuffer_yptr_bottom = 0;
}
LCD_LOG_UpdateDisplay();
LCD_Lock = DISABLE;
}
return SUCCESS;
}
else // LCD_ScrollBackStep == 0
{
LCD_Lock = DISABLE;
return ERROR;
}
}
#endif /* LCD_SCROLL_ENABLED */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/Common/lcd_log.h
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/**
******************************************************************************
* @file lcd_log.h
* @author MCD Application Team
* @version V5.0.2
* @date 05-March-2012
* @brief header for the lcd_log.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __LCD_LOG_H__
#define __LCD_LOG_H__
/* Includes ------------------------------------------------------------------*/
#include "lcd_log_conf.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup Common
* @{
*/
/** @addtogroup LCD_LOG
* @{
*/
/** @defgroup LCD_LOG
* @brief
* @{
*/
/** @defgroup LCD_LOG_Exported_Defines
* @{
*/
#ifdef __GNUC__
/* With GCC/RAISONANCE, small printf (option LD Linker->Libraries->Small printf
set to 'Yes') calls __io_putchar() */
#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
#else
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
#endif /* __GNUC__ */
/** These value can be changed by user */
#ifdef LCD_SCROLL_ENABLED
#define LCD_CACHE_DEPTH (YWINDOW_SIZE + CACHE_SIZE)
#else
#define LCD_CACHE_DEPTH YWINDOW_SIZE
#endif
/**
* @}
*/
/** @defgroup LCD_LOG_Exported_Types
* @{
*/
typedef struct _LCD_LOG_line
{
uint8_t line[XWINDOW_MAX];
uint16_t color;
}LCD_LOG_line;
/**
* @}
*/
/** @defgroup LCD_LOG_Exported_Macros
* @{
*/
#define LCD_ErrLog(...) LCD_LineColor = Red;\
printf("ERROR: ") ;\
printf(__VA_ARGS__);\
LCD_LineColor = LCD_LOG_DEFAULT_COLOR
#define LCD_UsrLog(...) LCD_LineColor = LCD_LOG_DEFAULT_COLOR;\
printf(__VA_ARGS__);\
#define LCD_DbgLog(...) LCD_LineColor = Cyan;\
printf(__VA_ARGS__);\
LCD_LineColor = LCD_LOG_DEFAULT_COLOR
/**
* @}
*/
/** @defgroup LCD_LOG_Exported_Variables
* @{
*/
extern uint16_t LCD_LineColor;
/**
* @}
*/
/** @defgroup LCD_LOG_Exported_FunctionsPrototype
* @{
*/
void LCD_LOG_Init(void);
void LCD_LOG_DeInit(void);
void LCD_LOG_SetHeader(uint8_t *Title);
void LCD_LOG_SetFooter(uint8_t *Status);
void LCD_LOG_ClearTextZone(void);
#ifdef LCD_SCROLL_ENABLED
ErrorStatus LCD_LOG_ScrollBack(void);
ErrorStatus LCD_LOG_ScrollForward(void);
#endif
/**
* @}
*/
#endif /* __LCD_LOG_H__ */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/Common/lcd_log_conf_template.h
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/**
******************************************************************************
* @file lcd_log_conf_template.h
* @author MCD Application Team
* @version V5.0.2
* @date 05-March-2012
* @brief lcd_log configuration template file.
* This file should be copied to the application folder and modified
* as follows:
* - Rename it to 'lcd_log_conf.h'.
* - Update the name of the LCD header file depending on the EVAL board
* you are using (see line32 below).
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __LCD_LOG_CONF_H__
#define __LCD_LOG_CONF_H__
/* Includes ------------------------------------------------------------------*/
#include "stm32xxx_eval_lcd.h" /* replace 'stm32xxx' with your EVAL board name, ex: stm3210c_eval_lcd.h */
#include <stdio.h>
/** @addtogroup LCD_LOG
* @{
*/
/** @defgroup LCD_LOG
* @brief This file is the
* @{
*/
/** @defgroup LCD_LOG_CONF_Exported_Defines
* @{
*/
/* Comment the line below to disable the scroll back and forward features */
#define LCD_SCROLL_ENABLED
/* Define the LCD default text color */
#define LCD_LOG_DEFAULT_COLOR LCD_COLOR_WHITE
/* Define the display window settings */
#define YWINDOW_MIN 3
#define YWINDOW_SIZE 12
#define XWINDOW_MAX 50
/* Define the cache depth */
#define CACHE_SIZE 50
/** @defgroup LCD_LOG_CONF_Exported_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup LCD_LOG_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup LCD_LOG_CONF_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup LCD_LOG_CONF_Exported_FunctionsPrototype
* @{
*/
/**
* @}
*/
#endif /* __LCD_LOG_H__ */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/Common/stm32_eval_legacy.h
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/**
******************************************************************************
* @file stm32_eval_legacy.h
* @author MCD Application Team
* @version V5.0.2
* @date 05-March-2012
* @brief This file contains defines legacy for STM32 EVAL drivers.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_EVAL_LEGACY_H
#define __STM32_EVAL_LEGACY_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* STM322xG_EVAL Defines Legacy */
#ifdef USE_STM3220F_EVAL
#define USE_STM322xG_EVAL
#endif
#define STM3220F_LCD_Init STM322xG_LCD_Init
/* Button Defines Legacy */
#define Button_WAKEUP BUTTON_WAKEUP
#define Button_TAMPER BUTTON_TAMPER
#define Button_KEY BUTTON_KEY
#define Button_RIGHT BUTTON_RIGHT
#define Button_LEFT BUTTON_LEFT
#define Button_UP BUTTON_UP
#define Button_DOWN BUTTON_DOWN
#define Button_SEL BUTTON_SEL
#define Mode_GPIO BUTTON_MODE_GPIO
#define Mode_EXTI BUTTON_MODE_EXTI
#define Button_Mode_TypeDef ButtonMode_TypeDef
#define JOY_CENTER JOY_SEL
#define JOY_State_TypeDef JOYState_TypeDef
/* LCD Defines Legacy */
#define LCD_RSNWR_GPIO_CLK LCD_NWR_GPIO_CLK
#define LCD_SPI_GPIO_PORT LCD_SPI_SCK_GPIO_PORT
#define LCD_SPI_GPIO_CLK LCD_SPI_SCK_GPIO_CLK
#define R0 LCD_REG_0
#define R1 LCD_REG_1
#define R2 LCD_REG_2
#define R3 LCD_REG_3
#define R4 LCD_REG_4
#define R5 LCD_REG_5
#define R6 LCD_REG_6
#define R7 LCD_REG_7
#define R8 LCD_REG_8
#define R9 LCD_REG_9
#define R10 LCD_REG_10
#define R12 LCD_REG_12
#define R13 LCD_REG_13
#define R14 LCD_REG_14
#define R15 LCD_REG_15
#define R16 LCD_REG_16
#define R17 LCD_REG_17
#define R18 LCD_REG_18
#define R19 LCD_REG_19
#define R20 LCD_REG_20
#define R21 LCD_REG_21
#define R22 LCD_REG_22
#define R23 LCD_REG_23
#define R24 LCD_REG_24
#define R25 LCD_REG_25
#define R26 LCD_REG_26
#define R27 LCD_REG_27
#define R28 LCD_REG_28
#define R29 LCD_REG_29
#define R30 LCD_REG_30
#define R31 LCD_REG_31
#define R32 LCD_REG_32
#define R33 LCD_REG_33
#define R34 LCD_REG_34
#define R36 LCD_REG_36
#define R37 LCD_REG_37
#define R40 LCD_REG_40
#define R41 LCD_REG_41
#define R43 LCD_REG_43
#define R45 LCD_REG_45
#define R48 LCD_REG_48
#define R49 LCD_REG_49
#define R50 LCD_REG_50
#define R51 LCD_REG_51
#define R52 LCD_REG_52
#define R53 LCD_REG_53
#define R54 LCD_REG_54
#define R55 LCD_REG_55
#define R56 LCD_REG_56
#define R57 LCD_REG_57
#define R59 LCD_REG_59
#define R60 LCD_REG_60
#define R61 LCD_REG_61
#define R62 LCD_REG_62
#define R63 LCD_REG_63
#define R64 LCD_REG_64
#define R65 LCD_REG_65
#define R66 LCD_REG_66
#define R67 LCD_REG_67
#define R68 LCD_REG_68
#define R69 LCD_REG_69
#define R70 LCD_REG_70
#define R71 LCD_REG_71
#define R72 LCD_REG_72
#define R73 LCD_REG_73
#define R74 LCD_REG_74
#define R75 LCD_REG_75
#define R76 LCD_REG_76
#define R77 LCD_REG_77
#define R78 LCD_REG_78
#define R79 LCD_REG_79
#define R80 LCD_REG_80
#define R81 LCD_REG_81
#define R82 LCD_REG_82
#define R83 LCD_REG_83
#define R96 LCD_REG_96
#define R97 LCD_REG_97
#define R106 LCD_REG_106
#define R118 LCD_REG_118
#define R128 LCD_REG_128
#define R129 LCD_REG_129
#define R130 LCD_REG_130
#define R131 LCD_REG_131
#define R132 LCD_REG_132
#define R133 LCD_REG_133
#define R134 LCD_REG_134
#define R135 LCD_REG_135
#define R136 LCD_REG_136
#define R137 LCD_REG_137
#define R139 LCD_REG_139
#define R140 LCD_REG_140
#define R141 LCD_REG_141
#define R143 LCD_REG_143
#define R144 LCD_REG_144
#define R145 LCD_REG_145
#define R146 LCD_REG_146
#define R147 LCD_REG_147
#define R148 LCD_REG_148
#define R149 LCD_REG_149
#define R150 LCD_REG_150
#define R151 LCD_REG_151
#define R152 LCD_REG_152
#define R153 LCD_REG_153
#define R154 LCD_REG_154
#define R157 LCD_REG_157
#define R192 LCD_REG_192
#define R193 LCD_REG_193
#define R227 LCD_REG_227
#define R229 LCD_REG_229
#define R231 LCD_REG_231
#define R239 LCD_REG_239
#define White LCD_COLOR_WHITE
#define Black LCD_COLOR_BLACK
#define Grey LCD_COLOR_GREY
#define Blue LCD_COLOR_BLUE
#define Blue2 LCD_COLOR_BLUE2
#define Red LCD_COLOR_RED
#define Magenta LCD_COLOR_MAGENTA
#define Green LCD_COLOR_GREEN
#define Cyan LCD_COLOR_CYAN
#define Yellow LCD_COLOR_YELLOW
#define Line0 LCD_LINE_0
#define Line1 LCD_LINE_1
#define Line2 LCD_LINE_2
#define Line3 LCD_LINE_3
#define Line4 LCD_LINE_4
#define Line5 LCD_LINE_5
#define Line6 LCD_LINE_6
#define Line7 LCD_LINE_7
#define Line8 LCD_LINE_8
#define Line9 LCD_LINE_9
#define Horizontal LCD_DIR_HORIZONTAL
#define Vertical LCD_DIR_VERTICAL
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32_EVAL_LEGACY_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/Release_Notes.html
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<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
Notes for STM322xG_EVAL Evaluation Board Drivers</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p>&nbsp;</o:p></span></p>
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<td style="padding: 0cm;" valign="top">
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
<ol style="margin-top: 0cm;" start="1" type="1">
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM322xG_EVAL Evaluation Board Drivers
update History</a><o:p></o:p></span></li>
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
</ol>
<span style="font-family: &quot;Times New Roman&quot;;">
</span>
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM322xG_EVAL Evaluation Board Drivers update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.3 / 05-March-2012<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files:&nbsp;license disclaimer text update and add link to the License file on ST Internet.</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_lcd.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Enhance Gamma Curve settings for ILI9320 controller&nbsp;</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval.c and stm322xg_eval_ioe.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Swap
the order of I2C&nbsp;IOs and&nbsp;alternate function (AF)
configuration: AF configuration should be done before to configure the
IOs.</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_sdio_sd.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">In <span style="font-style: italic;">SD_WaitWriteOperation()</span> and <span style="font-style: italic;">SD_WaitReadOperation()</span> functions: reset <span style="font-style: italic;">StopCondition</span> flag after sending CMD12</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 176px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.2 / 28-December-2011<o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files: update disclaimer to add reference to the&nbsp;new license agreement</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_lcd.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Remove &#8220;static&#8221; from&nbsp;<span style="font-style: italic;">TextColor</span> and&nbsp;<span style="font-style: italic;">BackColor</span> variables declaration (need to be changed from other application modules)&nbsp;</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_ioe.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add
conditional compilation on the default DMA stream(s) used for I2C1 Tx
and Rx transfers, to allow user to change them from application level.<br></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.1 / 14-November-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_sdio_sd.h</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SD_CardInfo</span> structure, define <span style="font-style: italic;">CardCapacity</span> variable as 64-bit long (instead of 32-bit)&nbsp; to support SDHC memory cards with capacity greater than 4 GB.</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V5.0.0 / 07-October-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Update STM32 Evaluation Board Drivers architecture and folder organization,&nbsp;<span style="font-weight: bold; font-style: italic;">full&nbsp;API compatibility maintained vs. V4.6.2</span></span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">All the HW&nbsp;drivers required for each board are&nbsp;provided within this board folder</span><span style="font-size: 10pt; font-family: Verdana;">. The concerned drivers are:</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_ee.c\.h:</span>&nbsp;I2C M24Cxx EEPROM memory driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_tsensor.c\.h:</span>&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">I2C </span><span style="font-size: 10pt; font-family: Verdana;">LM75 temperature sensor driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_spi_flash.c\.h:</span> SPI M25Pxxx FLASH memory driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_sdio_sd.c\.h:</span> SDIO SD Card memory driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_spi_sd.c\.h:</span>&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">SPI SD Card memory driver&nbsp;</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">These drivers were&nbsp;moved from </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">\Common</span> to </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">\STM32XXX_EVAL</span> folder(s)</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">\Common&nbsp;</span></span><span style="font-size: 10pt; font-family: Verdana;">folder contains only drivers for the fonts and log module used by the LCD driver</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval.c\.h</span> files removed, <span style="font-style: italic; text-decoration: underline;">as consequence you need to perform the following update on your project configuration&nbsp; (based on EVAL drivers V4.6.2):</span></span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">In the&nbsp;project files, add your EVAL board driver source&nbsp;file&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">"stm322xg_eval.c"</span>&nbsp;instead of <span style="font-style: italic;">"stm32_eval.c"</span></span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Include your EVAL board driver header file&nbsp;<span style="font-style: italic;">#include "stm322xg_eval.h"</span>&nbsp;instead of <span style="font-style: italic;">#include "stm32_eval.h"</span></span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">If
you are&nbsp;using the EVAL board's LCD, you need to add the include of
the LCD header file&nbsp;#include "stm322xg_eval_lcd.h"</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">If
you are using the LCD log module, after copying it to the application
folder you have to edit it and update the name of the LCD header file. For more details, refer to the <span style="font-style: italic;">lcd_log_conf_template.h</span> driver description.</span></li></ul></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval.h/.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">change value of&nbsp;<span style="font-style: italic;">&#8220;SDIO_TRANSFER_CLK_DIV&#8221;</span> define from 2 to 0 to achieve SD max frequency at 24MHz.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Remove <span style="font-style: italic;">SD_DMAEndOfTransferStatus()</span> function as now the DMA transfer is tracked using DMA End of transfer interrupt.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add new define for the&nbsp;SDIO's DMA2 Stream (3 or 6): <span style="font-style: italic;">SD_SDIO_DMA_IRQn</span> and <span style="font-style: italic;">SD_SDIO_DMA_IRQHANDLER</span>.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_sdio_sd.h/.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add new function <span style="font-style: italic;">SD_ProcessDMAIRQ()</span> to be called from the DMA end of transfer interrupt.&nbsp;</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add some improvements by handling SDIO errors and adding timeout for different loops.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Refer to the driver header file's comments for more information on how to use the provided API. </span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_fsmc_sram.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add IOs config of missing FSMC address lines (FSMC_A21, FSMC_A22 and FSMC_A23). <br><br></span></li></ul></ul></ul><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 175px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.6.2 /&nbsp;22-July-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM3210C_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval_lcd.c: update to support new LCD AM240320D5TOQW01H (controller ILI9325)</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM322xG-EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval.h: fix value of the SDIO clock divider (<span style="font-style: italic;">SDIO_TRANSFER_CLK_DIV</span> constant) to 2 instead of 0</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_lcd.c: increase FSMC<span style="font-style: italic;"> AddressSetupTime</span> value from 1 to 3 to be compliant with some&nbsp;LCD access timing</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval_audio_codec.c: update <span style="font-style: italic;">Codec_CtrlInterface_Init(</span>) and <span style="font-style: italic;">Codec_GPIO_Init(</span>) functions to not reconfigure the I2C peripheral if it's&nbsp;already </span><span style="font-size: 10pt; font-family: Verdana;">enabled and </span><span style="font-size: 10pt; font-family: Verdana;">configured&nbsp;(to
avoid configuring the I2C twice when using both&nbsp;Audio codec and IO
Expander drivers in the same application).</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.6.1 / 18-April-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Update&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">some</span><span style="font-size: 10pt; font-family: Verdana;"> <span style="font-weight: bold; font-style: italic;">STM322xG_EVAL</span> drivers (no change on the API) to fix&nbsp;warnings wit<span style="font-weight: bold; font-style: italic;"></span>h TASKING C compiler.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Change the Release Notes name to <span style="font-weight: bold; font-style: italic;">STM32 Evaluation Board Drivers </span><br></span></li><li style="font-style: italic;" class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm322xg_eval.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">SD_LowLevel_Init(): change&nbsp;SDIO pins speed configuration to&nbsp;"GPIO_Speed_25MHz"</span></li></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.6.0 / 11-March-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Official version supporting <span style="font-weight: bold; font-style: italic;">STM322xG_EVAL</span> evaluation board RevB (for <span style="font-weight: bold; font-style: italic;">STM32F2xx</span> devices).</span></li><li style="font-style: italic;" class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Common</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
new LCD log utility drivers: The LCD Log module allows to automatically
set a header and footer on any application using the LCD display and
allows to dump user, debug and error messages by using the following
macros: LCD_ErrLog(),&nbsp;&nbsp;&nbsp; LCD_UsrLog() and LCD_DbgLog().</span></li></ul></ul><div style="margin-left: 40px;"><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline; font-style: italic;">Note</span><span style="font-style: italic;">:</span> the <span style="font-style: italic;">STM322xG_EVAL</span> board RevA was wrongly named <span style="font-style: italic;">STM3220F_EVAL</span></span><br></div><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.5.0 / 07-March-2011<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_sdio_sd.c\.h: driver improvement</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">SD Clock increased to 24MHz to improve the data transfer performance.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
new functions to check the SDIO peripheral and SD Card status at any
time:&nbsp;SD_WaitReadOperation(), SD_WaitWriteOperation(). The
software sequence is little bit changed&nbsp;but without any impact on
driver API. For more details, refer to the stm32_eval_sdio_sd.c
driver&nbsp;description.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
new structure containing the SD Status register parameters. This
structure is called by the
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
&nbsp;SD_SendSDStatus() function.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Transfers mode updated</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Read/Write Block using Polling and DMA modes</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Read/Write Multi Blocks using DMA mode only</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Interrupt mode removed</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Data transfer functions are managing only fixed Block size (512-byte)&nbsp;</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM32100B-EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100b_eval_cec.c: fix some strict ANSI-C errors</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM32100E-EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval_cec.c: fix some strict ANSI-C errors<br></span></li></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V4.4.0 / 31-December-2010<o:p></o:p></span></h3>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
Changes<o:p></o:p></span></u></b></p>
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add new directory for STM32L152-EVAL board containing the following files:</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32l152_eval.h/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm32l152</span><span style="font-size: 10pt; font-family: Verdana;">_eval_lcd.h/.c, stm32l152_eval_glass_lcd.h</span><span style="font-size: 10pt; font-family: Verdana;">/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm32l152_eval_i2c_ee</span><span style="font-size: 10pt; font-family: Verdana;">.h/.c</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add support for the STM32100E-EVAL Rev B: SPI FLASH CS pin "sFLASH_CS_PIN" changed from PB.02 to PE.06.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval_lcd.h/.c: Add support for "LCD_ILI9325" LCD controller.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval_fsmc_onenand.h/.c driver updated to correct asynchronous and synchronous read operations procedures.<br>
</span></li></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">4.3.0
- 10/15/2010</span></h3>
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C EEPROM,&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">Temperature Sensor and&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">IOE Expander</span><span style="font-size: 10pt; font-family: Verdana;"> drivers&nbsp;updated to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">use the DMA for read/write transfer and add more robustness</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SD Card (SDIO) driver updated to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">add more robustness</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SPI Flash and </span><span style="font-size: 10pt; font-family: Verdana;">SD Card (SPI) drivers: SPI MISO pin configuration changed to Input Floating&nbsp;</span></li></ul>
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">Utilities</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
<ul style="margin-top: 0in;" type="circle"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add new directory for STM32100E-EVAL board containing the following files:</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100e_eval.h/.c,
stm32100e_eval_lcd.h/.c, stm32100e_eval_cec.h/.c,
stm32100e_eval_fsmc_onenand.h/.c, stm32100e_eval_fsmc_sram.h/.c,
stm32100e_eval_ioe.h/.c</span><br>
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Common</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_sdio_sd.c:
Update the DMA End of Transfer Check loop inside the SD_ReadBlock(),
SD_WriteBlock(), SD_ReadMultiBlocks() and SD_Write MultiBlocks().</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_ee.c/.h</span> <br>
</span></li></ul><ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced sEE_WaitEepromStandbyState() function for more robustness.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced Read and Write operations to manage I2C limitations.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add Timeout management with user callback implementation which allows recovering from I2C bus errors.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add
critical sections user callbacks allowing to disable then enable
interrupts when I2C operation require to be not interrupted.</span></li></ul></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_tsensor.c/.h</span> <br>
</span></li></ul><ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced I2C communication functions by using DMA for registers Read and Write operations.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add Timeout management with user callback implementation which allows recovering from I2C bus errors.</span></li></ul></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM32100B_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100b_eval.h: Add LM75 DMA defines.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32100b_eval_lcd.c: </span><span style="font-size: 10pt; font-family: Verdana;">Change "SPI_FLASH" by "sFLASH" in LCD_DrawBMP() function.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM3210B_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210b_eval.h: Add LM75 DMA defines.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210b_eval_lcd.c: </span><span style="font-size: 10pt; font-family: Verdana;">Change "SPI_FLASH" by "sFLASH" in LCD_DrawBMP() function.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">STM3210C_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval.h: Add EEPROM driver Timeout define.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval_lcd.c: </span><span style="font-size: 10pt; font-family: Verdana;">Change "SPI_FLASH" by "sFLASH" in LCD_DrawBMP() function.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210c_eval_i2c_ioe.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Enhanced I2C communication functions by using DMA for registers Read and Write operations.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Add Timeout management with user callback implementation which allows recovering from I2C bus errors.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">change IOE_I2C_SPEED from "400000" to "300000".</span></li></ul></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">STM3210E_EVAL</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval.c: change "void SD_WaitForDMAEndOfTransfer(void)" to "uint32_t SD_DMAEndOfTransferStatus(void)".</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval.h: Add LM75 DMA defines.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nand.h: remove "NAND_CMD_AREA_TRUE1" define.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nand.c: Update FSMC timing in NAND_Init() function to be aligned with AN2784 application note.</span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nor.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">NOR</span><span style="font-size: 10pt; font-family: Verdana;">_Init()&nbsp;function: add FSMC_AsynchronousWait&nbsp;field&nbsp;to FSMC_NORSRAMInitStructure&nbsp;</span></li></ul></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_sram.c<br>
</span></li></ul><ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">Update FSMC timing in SRAM_Init() function to be aligned with AN2784 application note.</span><br>
<span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">SRAM_Init()&nbsp;function: add FSMC_AsynchronousWait&nbsp;field&nbsp;to FSMC_NORSRAMInitStructure&nbsp;</span></li></ul></ul><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_lcd.c</span></li><ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">LCD_FSMCConfig() function: add FSMC_AsynchronousWait&nbsp;field&nbsp;to FSMC_NORSRAMInitStructure&nbsp;</span></li></ul></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">4.2.0
- 04/16/2010</span></h3>
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C EEPROM driver
update to&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;">use the DMA to
perform&nbsp;data transfer&nbsp;to/from EEPROM memory.</span><span style="font-size: 10pt; font-family: Verdana;"> </span><span style="font-size: 10pt;"><o:p></o:p></span></li></ul>
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">Utilities</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><i><u><span style="font-size: 10pt; font-family: Verdana;">STM32_EVAL</span></u></i><u><span style="font-size: 10pt;"><o:p></o:p></span></u></li></ul>
<ul style="margin-top: 0in;" type="disc"><ul style="margin-top: 0in;" type="circle"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32_eval_i2c_ee.c</span>:
updated to use the DMA to perform&nbsp;data transfer&nbsp;to/from
EEPROM memory. For more details, refer to the description provided
within this file.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210c_eval.c</span>: add low level
functions to configure the DMA (needed for I2C EEPROM driver)<br>
</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210c_eval_ioe.c</span>: add a delay
in&nbsp;IOE_TS_GetState() function to wait till the end of ADC
conversion</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210e_eval_fsmc_nor.c</span>: add </span><span style="font-size: 10pt; font-family: Verdana;">PD6 pin </span><span style="font-size: 10pt; font-family: Verdana;">configuration&nbsp;in
NOR_Init() function</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm3210b_eval_lcd.c</span>: remove the
second ";" from "static void PutPixel(int16_t x, int16_t y);;"&nbsp;</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul></ul>
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">4.1.0
- 03/01/2010</span></h3>
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
for&nbsp;<b>STM32 Low-density Value line (STM32F100x4/6) and
Medium-density Value line (STM32F100x8/B) devices</b>.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for the
STMicroelectronics STM32100B-EVAL evaluation board. </span><span style="font-size: 10pt;"><o:p></o:p></span></li></ul>
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">Utilities</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><i><u><span style="font-size: 10pt; font-family: Verdana;">STM32_EVAL</span></u></i><u><span style="font-size: 10pt;"><o:p></o:p></span></u></li></ul>
<ul style="margin-top: 0in;" type="circle"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">Add new directory
"Common" containing a common drivers for all STM32 evaluation boards:
fonts.h/.c, stm32_eval_i2c_ee.h/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_spi_flash.h/.c,
</span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_i2c_tsensor.h/.c,
</span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_spi_sd.h/.c
and </span><span style="font-size: 10pt; font-family: Verdana;">stm32_eval_sdio_sd.h/.c</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new driver for the
STM32100B-EVAL managing Leds, push button and COM ports.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">New HDMI CEC High level
driver.</span><br>
</li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span>For all LCD drivers new fonts has
been added.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">New FSMC memories
drivers for STM3210E-EVAL board: stm3210e_eval_fsmc_sram.h/.c, </span><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nor.h/.c
and </span><span style="font-size: 10pt; font-family: Verdana;">stm3210e_eval_fsmc_nand.h/.c.</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic; font-weight: bold;"></span></span><span style="font-size: 10pt; font-family: Verdana;"></span><h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
<p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this&nbsp;</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">package</span><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"> except in compliance with the License. You may obtain a copy of the License at:<br><br></span></p><div style="text-align: center;"><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <a target="_blank" href="http://www.st.com/software_license_agreement_liberty_v2">http://www.st.com/software_license_agreement_liberty_v2</a></span><br><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"></span></div><span style="font-size: 10pt; font-family: &quot;Verdana&quot;,&quot;sans-serif&quot;; color: black;"><br>Unless
required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, <br>WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See
the License for the specific language governing permissions and
limitations under the License.</span><b><span style="font-size: 10pt; font-family: Verdana; color: black;"></span></b>
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
<hr align="center" size="2" width="100%"></span></div>
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32<span style="color: black;">&nbsp;Microcontrollers
visit </span><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/class/1734.jsp" target="_blank">www.st.com/STM32</a></span></u></span><span style="font-size: 10pt; font-family: Verdana;"><a target="_blank" href="http://www.st.com/internet/mcu/family/141.jsp"><u><span style="color: blue;"></span></u></a></span><span style="font-size: 10pt; font-family: Verdana;"><u><span style="color: blue;"></span></u></span><span style="color: black;"><o:p></o:p></span></p>
</td>
</tr>
</tbody>
</table>
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
</td>
</tr>
</tbody>
</table>
</div>
<p class="MsoNormal"><o:p>&nbsp;</o:p></p>
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval.c
-737
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@@ -1,737 +0,0 @@
/**
******************************************************************************
* @file stm322xg_eval.c
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file provides
* - set of firmware functions to manage Leds, push-button and COM ports
* - low level initialization functions for SD card (on SDIO) and
* serial EEPROM (sEE)
* available on STM322xG-EVAL evaluation board(MB786) RevA and RevB
* from STMicroelectronics.
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
#include "stm32f2xx_sdio.h"
#include "stm32f2xx_dma.h"
#include "stm32f2xx_i2c.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL
* @brief This file provides firmware functions to manage Leds, push-buttons,
* COM ports, SD card on SDIO and serial EEPROM (sEE) available on
* STM322xG-EVAL evaluation board from STMicroelectronics.
* @{
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Private_Variables
* @{
*/
GPIO_TypeDef* GPIO_PORT[LEDn] = {LED1_GPIO_PORT, LED2_GPIO_PORT, LED3_GPIO_PORT,
LED4_GPIO_PORT};
const uint16_t GPIO_PIN[LEDn] = {LED1_PIN, LED2_PIN, LED3_PIN,
LED4_PIN};
const uint32_t GPIO_CLK[LEDn] = {LED1_GPIO_CLK, LED2_GPIO_CLK, LED3_GPIO_CLK,
LED4_GPIO_CLK};
GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {WAKEUP_BUTTON_GPIO_PORT, TAMPER_BUTTON_GPIO_PORT,
KEY_BUTTON_GPIO_PORT};
const uint16_t BUTTON_PIN[BUTTONn] = {WAKEUP_BUTTON_PIN, TAMPER_BUTTON_PIN,
KEY_BUTTON_PIN};
const uint32_t BUTTON_CLK[BUTTONn] = {WAKEUP_BUTTON_GPIO_CLK, TAMPER_BUTTON_GPIO_CLK,
KEY_BUTTON_GPIO_CLK};
const uint16_t BUTTON_EXTI_LINE[BUTTONn] = {WAKEUP_BUTTON_EXTI_LINE,
TAMPER_BUTTON_EXTI_LINE,
KEY_BUTTON_EXTI_LINE};
const uint8_t BUTTON_PORT_SOURCE[BUTTONn] = {WAKEUP_BUTTON_EXTI_PORT_SOURCE,
TAMPER_BUTTON_EXTI_PORT_SOURCE,
KEY_BUTTON_EXTI_PORT_SOURCE};
const uint8_t BUTTON_PIN_SOURCE[BUTTONn] = {WAKEUP_BUTTON_EXTI_PIN_SOURCE,
TAMPER_BUTTON_EXTI_PIN_SOURCE,
KEY_BUTTON_EXTI_PIN_SOURCE};
const uint8_t BUTTON_IRQn[BUTTONn] = {WAKEUP_BUTTON_EXTI_IRQn, TAMPER_BUTTON_EXTI_IRQn,
KEY_BUTTON_EXTI_IRQn};
USART_TypeDef* COM_USART[COMn] = {EVAL_COM1};
GPIO_TypeDef* COM_TX_PORT[COMn] = {EVAL_COM1_TX_GPIO_PORT};
GPIO_TypeDef* COM_RX_PORT[COMn] = {EVAL_COM1_RX_GPIO_PORT};
const uint32_t COM_USART_CLK[COMn] = {EVAL_COM1_CLK};
const uint32_t COM_TX_PORT_CLK[COMn] = {EVAL_COM1_TX_GPIO_CLK};
const uint32_t COM_RX_PORT_CLK[COMn] = {EVAL_COM1_RX_GPIO_CLK};
const uint16_t COM_TX_PIN[COMn] = {EVAL_COM1_TX_PIN};
const uint16_t COM_RX_PIN[COMn] = {EVAL_COM1_RX_PIN};
const uint8_t COM_TX_PIN_SOURCE[COMn] = {EVAL_COM1_TX_SOURCE};
const uint8_t COM_RX_PIN_SOURCE[COMn] = {EVAL_COM1_RX_SOURCE};
const uint8_t COM_TX_AF[COMn] = {EVAL_COM1_TX_AF};
const uint8_t COM_RX_AF[COMn] = {EVAL_COM1_RX_AF};
DMA_InitTypeDef sEEDMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Private_Functions
* @{
*/
/**
* @brief Configures LED GPIO.
* @param Led: Specifies the Led to be configured.
* This parameter can be one of following parameters:
* @arg LED1
* @arg LED2
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDInit(Led_TypeDef Led)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable the GPIO_LED Clock */
RCC_AHB1PeriphClockCmd(GPIO_CLK[Led], ENABLE);
/* Configure the GPIO_LED pin */
GPIO_InitStructure.GPIO_Pin = GPIO_PIN[Led];
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIO_PORT[Led], &GPIO_InitStructure);
}
/**
* @brief Turns selected LED On.
* @param Led: Specifies the Led to be set on.
* This parameter can be one of following parameters:
* @arg LED1
* @arg LED2
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDOn(Led_TypeDef Led)
{
GPIO_PORT[Led]->BSRRL = GPIO_PIN[Led];
}
/**
* @brief Turns selected LED Off.
* @param Led: Specifies the Led to be set off.
* This parameter can be one of following parameters:
* @arg LED1
* @arg LED2
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDOff(Led_TypeDef Led)
{
GPIO_PORT[Led]->BSRRH = GPIO_PIN[Led];
}
/**
* @brief Toggles the selected LED.
* @param Led: Specifies the Led to be toggled.
* This parameter can be one of following parameters:
* @arg LED1
* @arg LED2
* @arg LED3
* @arg LED4
* @retval None
*/
void STM_EVAL_LEDToggle(Led_TypeDef Led)
{
GPIO_PORT[Led]->ODR ^= GPIO_PIN[Led];
}
/**
* @brief Configures Button GPIO and EXTI Line.
* @param Button: Specifies the Button to be configured.
* This parameter can be one of following parameters:
* @arg BUTTON_WAKEUP: Wakeup Push Button
* @arg BUTTON_TAMPER: Tamper Push Button
* @arg BUTTON_KEY: Key Push Button
* @arg BUTTON_RIGHT: Joystick Right Push Button
* @arg BUTTON_LEFT: Joystick Left Push Button
* @arg BUTTON_UP: Joystick Up Push Button
* @arg BUTTON_DOWN: Joystick Down Push Button
* @arg BUTTON_SEL: Joystick Sel Push Button
* @param Button_Mode: Specifies Button mode.
* This parameter can be one of following parameters:
* @arg BUTTON_MODE_GPIO: Button will be used as simple IO
* @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt
* generation capability
* @retval None
*/
void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode)
{
GPIO_InitTypeDef GPIO_InitStructure;
EXTI_InitTypeDef EXTI_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
/* Enable the BUTTON Clock */
RCC_AHB1PeriphClockCmd(BUTTON_CLK[Button], ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
/* Configure Button pin as input */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin = BUTTON_PIN[Button];
GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStructure);
if (Button_Mode == BUTTON_MODE_EXTI)
{
/* Connect Button EXTI Line to Button GPIO Pin */
SYSCFG_EXTILineConfig(BUTTON_PORT_SOURCE[Button], BUTTON_PIN_SOURCE[Button]);
/* Configure Button EXTI line */
EXTI_InitStructure.EXTI_Line = BUTTON_EXTI_LINE[Button];
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
if(Button != BUTTON_WAKEUP)
{
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
}
else
{
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
}
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
/* Enable and set Button EXTI Interrupt to the lowest priority */
NVIC_InitStructure.NVIC_IRQChannel = BUTTON_IRQn[Button];
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
}
/**
* @brief Returns the selected Button state.
* @param Button: Specifies the Button to be checked.
* This parameter can be one of following parameters:
* @arg BUTTON_WAKEUP: Wakeup Push Button
* @arg BUTTON_TAMPER: Tamper Push Button
* @arg BUTTON_KEY: Key Push Button
* @arg BUTTON_RIGHT: Joystick Right Push Button
* @arg BUTTON_LEFT: Joystick Left Push Button
* @arg BUTTON_UP: Joystick Up Push Button
* @arg BUTTON_DOWN: Joystick Down Push Button
* @arg BUTTON_SEL: Joystick Sel Push Button
* @retval The Button GPIO pin value.
*/
uint32_t STM_EVAL_PBGetState(Button_TypeDef Button)
{
return GPIO_ReadInputDataBit(BUTTON_PORT[Button], BUTTON_PIN[Button]);
}
/**
* @brief Configures COM port.
* @param COM: Specifies the COM port to be configured.
* This parameter can be one of following parameters:
* @arg COM1
* @arg COM2
* @param USART_InitStruct: pointer to a USART_InitTypeDef structure that
* contains the configuration information for the specified USART peripheral.
* @retval None
*/
void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable GPIO clock */
RCC_AHB1PeriphClockCmd(COM_TX_PORT_CLK[COM] | COM_RX_PORT_CLK[COM], ENABLE);
if (COM == COM1)
{
/* Enable UART clock */
RCC_APB1PeriphClockCmd(COM_USART_CLK[COM], ENABLE);
}
/* Connect PXx to USARTx_Tx*/
GPIO_PinAFConfig(COM_TX_PORT[COM], COM_TX_PIN_SOURCE[COM], COM_TX_AF[COM]);
/* Connect PXx to USARTx_Rx*/
GPIO_PinAFConfig(COM_RX_PORT[COM], COM_RX_PIN_SOURCE[COM], COM_RX_AF[COM]);
/* Configure USART Tx as alternate function */
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Pin = COM_TX_PIN[COM];
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(COM_TX_PORT[COM], &GPIO_InitStructure);
/* Configure USART Rx as alternate function */
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Pin = COM_RX_PIN[COM];
GPIO_Init(COM_RX_PORT[COM], &GPIO_InitStructure);
/* USART configuration */
USART_Init(COM_USART[COM], USART_InitStruct);
/* Enable USART */
USART_Cmd(COM_USART[COM], ENABLE);
}
/**
* @brief DeInitializes the SDIO interface.
* @param None
* @retval None
*/
void SD_LowLevel_DeInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/*!< Disable SDIO Clock */
SDIO_ClockCmd(DISABLE);
/*!< Set Power State to OFF */
SDIO_SetPowerState(SDIO_PowerState_OFF);
/*!< DeInitializes the SDIO peripheral */
SDIO_DeInit();
/* Disable the SDIO APB2 Clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, DISABLE);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_MCO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_MCO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_MCO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_MCO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_MCO);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_MCO);
/* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/* Configure PD.02 CMD line */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* Configure PC.12 pin: CLK pin */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_Init(GPIOC, &GPIO_InitStructure);
}
/**
* @brief Initializes the SD Card and put it into StandBy State (Ready for
* data transfer).
* @param None
* @retval None
*/
void SD_LowLevel_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* GPIOC and GPIOD Periph clock enable */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD | SD_DETECT_GPIO_CLK, ENABLE);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_SDIO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_SDIO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_SDIO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_SDIO);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_SDIO);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_SDIO);
/* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_25MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/* Configure PD.02 CMD line */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* Configure PC.12 pin: CLK pin */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */
GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure);
/* Enable the SDIO APB2 Clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, ENABLE);
/* Enable the DMA2 Clock */
RCC_AHB1PeriphClockCmd(SD_SDIO_DMA_CLK, ENABLE);
}
/**
* @brief Configures the DMA2 Channel4 for SDIO Tx request.
* @param BufferSRC: pointer to the source buffer
* @param BufferSize: buffer size
* @retval None
*/
void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize)
{
DMA_InitTypeDef SDDMA_InitStructure;
DMA_ClearFlag(SD_SDIO_DMA_STREAM, SD_SDIO_DMA_FLAG_FEIF | SD_SDIO_DMA_FLAG_DMEIF | SD_SDIO_DMA_FLAG_TEIF | SD_SDIO_DMA_FLAG_HTIF | SD_SDIO_DMA_FLAG_TCIF);
/* DMA2 Stream3 or Stream6 disable */
DMA_Cmd(SD_SDIO_DMA_STREAM, DISABLE);
/* DMA2 Stream3 or Stream6 Config */
DMA_DeInit(SD_SDIO_DMA_STREAM);
SDDMA_InitStructure.DMA_Channel = SD_SDIO_DMA_CHANNEL;
SDDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_ADDRESS;
SDDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)BufferSRC;
SDDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
SDDMA_InitStructure.DMA_BufferSize = 0;
SDDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
SDDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
SDDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
SDDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
SDDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
SDDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
SDDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
SDDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
SDDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
SDDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;
DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);
DMA_ITConfig(SD_SDIO_DMA_STREAM, DMA_IT_TC, ENABLE);
DMA_FlowControllerConfig(SD_SDIO_DMA_STREAM, DMA_FlowCtrl_Peripheral);
/* DMA2 Stream3 or Stream6 enable */
DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
}
/**
* @brief Configures the DMA2 Channel4 for SDIO Rx request.
* @param BufferDST: pointer to the destination buffer
* @param BufferSize: buffer size
* @retval None
*/
void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize)
{
DMA_InitTypeDef SDDMA_InitStructure;
DMA_ClearFlag(SD_SDIO_DMA_STREAM, SD_SDIO_DMA_FLAG_FEIF | SD_SDIO_DMA_FLAG_DMEIF | SD_SDIO_DMA_FLAG_TEIF | SD_SDIO_DMA_FLAG_HTIF | SD_SDIO_DMA_FLAG_TCIF);
/* DMA2 Stream3 or Stream6 disable */
DMA_Cmd(SD_SDIO_DMA_STREAM, DISABLE);
/* DMA2 Stream3 or Stream6 Config */
DMA_DeInit(SD_SDIO_DMA_STREAM);
SDDMA_InitStructure.DMA_Channel = SD_SDIO_DMA_CHANNEL;
SDDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_ADDRESS;
SDDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)BufferDST;
SDDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
SDDMA_InitStructure.DMA_BufferSize = 0;
SDDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
SDDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
SDDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
SDDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
SDDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
SDDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
SDDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
SDDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
SDDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_INC4;
SDDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_INC4;
DMA_Init(SD_SDIO_DMA_STREAM, &SDDMA_InitStructure);
DMA_ITConfig(SD_SDIO_DMA_STREAM, DMA_IT_TC, ENABLE);
DMA_FlowControllerConfig(SD_SDIO_DMA_STREAM, DMA_FlowCtrl_Peripheral);
/* DMA2 Stream3 or Stream6 enable */
DMA_Cmd(SD_SDIO_DMA_STREAM, ENABLE);
}
/**
* @brief DeInitializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_LowLevel_DeInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* sEE_I2C Peripheral Disable */
I2C_Cmd(sEE_I2C, DISABLE);
/* sEE_I2C DeInit */
I2C_DeInit(sEE_I2C);
/*!< sEE_I2C Periph clock disable */
RCC_APB1PeriphClockCmd(sEE_I2C_CLK, DISABLE);
/*!< GPIO configuration */
/*!< Configure sEE_I2C pins: SCL */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
/*!< Configure sEE_I2C pins: SDA */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN;
GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
/* Configure and enable I2C DMA TX Stream interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
NVIC_Init(&NVIC_InitStructure);
/* Configure and enable I2C DMA RX Stream interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_Init(&NVIC_InitStructure);
/* Disable and Deinitialize the DMA Streams */
DMA_Cmd(sEE_I2C_DMA_STREAM_TX, DISABLE);
DMA_Cmd(sEE_I2C_DMA_STREAM_RX, DISABLE);
DMA_DeInit(sEE_I2C_DMA_STREAM_TX);
DMA_DeInit(sEE_I2C_DMA_STREAM_RX);
}
/**
* @brief Initializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_LowLevel_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/*!< sEE_I2C Periph clock enable */
RCC_APB1PeriphClockCmd(sEE_I2C_CLK, ENABLE);
/*!< sEE_I2C_SCL_GPIO_CLK and sEE_I2C_SDA_GPIO_CLK Periph clock enable */
RCC_AHB1PeriphClockCmd(sEE_I2C_SCL_GPIO_CLK | sEE_I2C_SDA_GPIO_CLK, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
/* Reset sEE_I2C IP */
RCC_APB1PeriphResetCmd(sEE_I2C_CLK, ENABLE);
/* Release reset signal of sEE_I2C IP */
RCC_APB1PeriphResetCmd(sEE_I2C_CLK, DISABLE);
/*!< GPIO configuration */
/* Connect PXx to I2C_SCL*/
GPIO_PinAFConfig(sEE_I2C_SCL_GPIO_PORT, sEE_I2C_SCL_SOURCE, sEE_I2C_SCL_AF);
/* Connect PXx to I2C_SDA*/
GPIO_PinAFConfig(sEE_I2C_SDA_GPIO_PORT, sEE_I2C_SDA_SOURCE, sEE_I2C_SDA_AF);
/*!< Configure sEE_I2C pins: SCL */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
/*!< Configure sEE_I2C pins: SDA */
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN;
GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
/* Configure and enable I2C DMA TX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Configure and enable I2C DMA RX Channel interrupt */
NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO;
NVIC_Init(&NVIC_InitStructure);
/*!< I2C DMA TX and RX channels configuration */
/* Enable the DMA clock */
RCC_AHB1PeriphClockCmd(sEE_I2C_DMA_CLK, ENABLE);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C_DMA_STREAM_TX, sEE_TX_DMA_FLAG_FEIF | sEE_TX_DMA_FLAG_DMEIF | sEE_TX_DMA_FLAG_TEIF | \
sEE_TX_DMA_FLAG_HTIF | sEE_TX_DMA_FLAG_TCIF);
/* Disable the EE I2C Tx DMA stream */
DMA_Cmd(sEE_I2C_DMA_STREAM_TX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral TX direction */
DMA_DeInit(sEE_I2C_DMA_STREAM_TX);
sEEDMA_InitStructure.DMA_Channel = sEE_I2C_DMA_CHANNEL;
sEEDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)sEE_I2C_DR_Address;
sEEDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */;
sEEDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */
sEEDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
sEEDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
sEEDMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
sEEDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
sEEDMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
sEEDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
sEEDMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
sEEDMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
sEEDMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
sEEDMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(sEE_I2C_DMA_STREAM_TX, &sEEDMA_InitStructure);
/* Clear any pending flag on Rx Stream */
DMA_ClearFlag(sEE_I2C_DMA_STREAM_RX, sEE_RX_DMA_FLAG_FEIF | sEE_RX_DMA_FLAG_DMEIF | sEE_RX_DMA_FLAG_TEIF | \
sEE_RX_DMA_FLAG_HTIF | sEE_RX_DMA_FLAG_TCIF);
/* Disable the EE I2C DMA Rx stream */
DMA_Cmd(sEE_I2C_DMA_STREAM_RX, DISABLE);
/* Configure the DMA stream for the EE I2C peripheral RX direction */
DMA_DeInit(sEE_I2C_DMA_STREAM_RX);
DMA_Init(sEE_I2C_DMA_STREAM_RX, &sEEDMA_InitStructure);
/* Enable the DMA Channels Interrupts */
DMA_ITConfig(sEE_I2C_DMA_STREAM_TX, DMA_IT_TC, ENABLE);
DMA_ITConfig(sEE_I2C_DMA_STREAM_RX, DMA_IT_TC, ENABLE);
}
/**
* @brief Initializes DMA channel used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_LowLevel_DMAConfig(uint32_t pBuffer, uint32_t BufferSize, uint32_t Direction)
{
/* Initialize the DMA with the new parameters */
if (Direction == sEE_DIRECTION_TX)
{
/* Configure the DMA Tx Stream with the buffer address and the buffer size */
sEEDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)pBuffer;
sEEDMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
sEEDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize;
DMA_Init(sEE_I2C_DMA_STREAM_TX, &sEEDMA_InitStructure);
}
else
{
/* Configure the DMA Rx Stream with the buffer address and the buffer size */
sEEDMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)pBuffer;
sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
sEEDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize;
DMA_Init(sEE_I2C_DMA_STREAM_RX, &sEEDMA_InitStructure);
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval.h
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/**
******************************************************************************
* @file stm322xg_eval.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains definitions for STM322xG_EVAL's Leds, push-buttons
* and COM ports hardware resources.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_H
#define __STM322xG_EVAL_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f2xx.h"
#include "stm32_eval_legacy.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_LOW_LEVEL
* @{
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Exported_Types
* @{
*/
typedef enum
{
LED1 = 0,
LED2 = 1,
LED3 = 2,
LED4 = 3
} Led_TypeDef;
typedef enum
{
BUTTON_WAKEUP = 0,
BUTTON_TAMPER = 1,
BUTTON_KEY = 2,
BUTTON_RIGHT = 3,
BUTTON_LEFT = 4,
BUTTON_UP = 5,
BUTTON_DOWN = 6,
BUTTON_SEL = 7
} Button_TypeDef;
typedef enum
{
BUTTON_MODE_GPIO = 0,
BUTTON_MODE_EXTI = 1
} ButtonMode_TypeDef;
typedef enum
{
JOY_NONE = 0,
JOY_SEL = 1,
JOY_DOWN = 2,
JOY_LEFT = 3,
JOY_RIGHT = 4,
JOY_UP = 5
} JOYState_TypeDef
;
typedef enum
{
COM1 = 0,
COM2 = 1
} COM_TypeDef;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Exported_Constants
* @{
*/
/**
* @brief Define for STM322xG_EVAL board
*/
#if !defined (USE_STM322xG_EVAL)
#define USE_STM322xG_EVAL
#endif
/** @addtogroup STM322xG_EVAL_LOW_LEVEL_LED
* @{
*/
#define LEDn 4
#define LED1_PIN GPIO_Pin_6
#define LED1_GPIO_PORT GPIOG
#define LED1_GPIO_CLK RCC_AHB1Periph_GPIOG
#define LED2_PIN GPIO_Pin_8
#define LED2_GPIO_PORT GPIOG
#define LED2_GPIO_CLK RCC_AHB1Periph_GPIOG
#define LED3_PIN GPIO_Pin_9
#define LED3_GPIO_PORT GPIOI
#define LED3_GPIO_CLK RCC_AHB1Periph_GPIOI
#define LED4_PIN GPIO_Pin_7
#define LED4_GPIO_PORT GPIOC
#define LED4_GPIO_CLK RCC_AHB1Periph_GPIOC
/**
* @}
*/
/** @addtogroup STM322xG_EVAL_LOW_LEVEL_BUTTON
* @{
*/
#define BUTTONn 3 /*!< Joystick pins are connected to
an IO Expander (accessible through
I2C1 interface) */
/**
* @brief Wakeup push-button
*/
#define WAKEUP_BUTTON_PIN GPIO_Pin_0
#define WAKEUP_BUTTON_GPIO_PORT GPIOA
#define WAKEUP_BUTTON_GPIO_CLK RCC_AHB1Periph_GPIOA
#define WAKEUP_BUTTON_EXTI_LINE EXTI_Line0
#define WAKEUP_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOA
#define WAKEUP_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource0
#define WAKEUP_BUTTON_EXTI_IRQn EXTI0_IRQn
/**
* @brief Tamper push-button
*/
#define TAMPER_BUTTON_PIN GPIO_Pin_13
#define TAMPER_BUTTON_GPIO_PORT GPIOC
#define TAMPER_BUTTON_GPIO_CLK RCC_AHB1Periph_GPIOC
#define TAMPER_BUTTON_EXTI_LINE EXTI_Line13
#define TAMPER_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOC
#define TAMPER_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource13
#define TAMPER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
/**
* @brief Key push-button
*/
#define KEY_BUTTON_PIN GPIO_Pin_15
#define KEY_BUTTON_GPIO_PORT GPIOG
#define KEY_BUTTON_GPIO_CLK RCC_AHB1Periph_GPIOG
#define KEY_BUTTON_EXTI_LINE EXTI_Line15
#define KEY_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG
#define KEY_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource15
#define KEY_BUTTON_EXTI_IRQn EXTI15_10_IRQn
/**
* @}
*/
/** @addtogroup STM322xG_EVAL_LOW_LEVEL_COM
* @{
*/
#define COMn 1
/**
* @brief Definition for COM port1, connected to USART3
*/
#define EVAL_COM1 USART3
#define EVAL_COM1_CLK RCC_APB1Periph_USART3
#define EVAL_COM1_TX_PIN GPIO_Pin_10
#define EVAL_COM1_TX_GPIO_PORT GPIOC
#define EVAL_COM1_TX_GPIO_CLK RCC_AHB1Periph_GPIOC
#define EVAL_COM1_TX_SOURCE GPIO_PinSource10
#define EVAL_COM1_TX_AF GPIO_AF_USART3
#define EVAL_COM1_RX_PIN GPIO_Pin_11
#define EVAL_COM1_RX_GPIO_PORT GPIOC
#define EVAL_COM1_RX_GPIO_CLK RCC_AHB1Periph_GPIOC
#define EVAL_COM1_RX_SOURCE GPIO_PinSource11
#define EVAL_COM1_RX_AF GPIO_AF_USART3
#define EVAL_COM1_IRQn USART3_IRQn
/**
* @}
*/
/** @addtogroup STM322xG_EVAL_LOW_LEVEL_SD_FLASH
* @{
*/
/**
* @brief SD FLASH SDIO Interface
*/
#define SD_DETECT_PIN GPIO_Pin_13 /* PH.13 */
#define SD_DETECT_GPIO_PORT GPIOH /* GPIOH */
#define SD_DETECT_GPIO_CLK RCC_AHB1Periph_GPIOH
#define SDIO_FIFO_ADDRESS ((uint32_t)0x40012C80)
/**
* @brief SDIO Intialization Frequency (400KHz max)
*/
#define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
/**
* @brief SDIO Data Transfer Frequency (25MHz max)
*/
#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0)
#define SD_SDIO_DMA DMA2
#define SD_SDIO_DMA_CLK RCC_AHB1Periph_DMA2
#define SD_SDIO_DMA_STREAM3 3
//#define SD_SDIO_DMA_STREAM6 6
#ifdef SD_SDIO_DMA_STREAM3
#define SD_SDIO_DMA_STREAM DMA2_Stream3
#define SD_SDIO_DMA_CHANNEL DMA_Channel_4
#define SD_SDIO_DMA_FLAG_FEIF DMA_FLAG_FEIF3
#define SD_SDIO_DMA_FLAG_DMEIF DMA_FLAG_DMEIF3
#define SD_SDIO_DMA_FLAG_TEIF DMA_FLAG_TEIF3
#define SD_SDIO_DMA_FLAG_HTIF DMA_FLAG_HTIF3
#define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF3
#define SD_SDIO_DMA_IRQn DMA2_Stream3_IRQn
#define SD_SDIO_DMA_IRQHANDLER DMA2_Stream3_IRQHandler
#elif defined SD_SDIO_DMA_STREAM6
#define SD_SDIO_DMA_STREAM DMA2_Stream6
#define SD_SDIO_DMA_CHANNEL DMA_Channel_4
#define SD_SDIO_DMA_FLAG_FEIF DMA_FLAG_FEIF6
#define SD_SDIO_DMA_FLAG_DMEIF DMA_FLAG_DMEIF6
#define SD_SDIO_DMA_FLAG_TEIF DMA_FLAG_TEIF6
#define SD_SDIO_DMA_FLAG_HTIF DMA_FLAG_HTIF6
#define SD_SDIO_DMA_FLAG_TCIF DMA_FLAG_TCIF6
#define SD_SDIO_DMA_IRQn DMA2_Stream6_IRQn
#define SD_SDIO_DMA_IRQHANDLER DMA2_Stream6_IRQHandler
#endif /* SD_SDIO_DMA_STREAM3 */
/**
* @}
*/
/** @addtogroup STM322xG_EVAL_LOW_LEVEL_I2C_EE
* @{
*/
/**
* @brief I2C EEPROM Interface pins
*/
#define sEE_I2C I2C1
#define sEE_I2C_CLK RCC_APB1Periph_I2C1
#define sEE_I2C_SCL_PIN GPIO_Pin_6 /* PB.06 */
#define sEE_I2C_SCL_GPIO_PORT GPIOB /* GPIOB */
#define sEE_I2C_SCL_GPIO_CLK RCC_AHB1Periph_GPIOB
#define sEE_I2C_SCL_SOURCE GPIO_PinSource6
#define sEE_I2C_SCL_AF GPIO_AF_I2C1
#define sEE_I2C_SDA_PIN GPIO_Pin_9 /* PB.09 */
#define sEE_I2C_SDA_GPIO_PORT GPIOB /* GPIOB */
#define sEE_I2C_SDA_GPIO_CLK RCC_AHB1Periph_GPIOB
#define sEE_I2C_SDA_SOURCE GPIO_PinSource9
#define sEE_I2C_SDA_AF GPIO_AF_I2C1
#define sEE_M24C64_32
#define sEE_I2C_DMA DMA1
#define sEE_I2C_DMA_CHANNEL DMA_Channel_1
#define sEE_I2C_DMA_STREAM_TX DMA1_Stream6
#define sEE_I2C_DMA_STREAM_RX DMA1_Stream0
#define sEE_I2C_DMA_CLK RCC_AHB1Periph_DMA1
#define sEE_I2C_DR_Address ((uint32_t)0x40005410)
#define sEE_USE_DMA
#define sEE_I2C_DMA_TX_IRQn DMA1_Stream6_IRQn
#define sEE_I2C_DMA_RX_IRQn DMA1_Stream0_IRQn
#define sEE_I2C_DMA_TX_IRQHandler DMA1_Stream6_IRQHandler
#define sEE_I2C_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler
#define sEE_I2C_DMA_PREPRIO 0
#define sEE_I2C_DMA_SUBPRIO 0
#define sEE_TX_DMA_FLAG_FEIF DMA_FLAG_FEIF6
#define sEE_TX_DMA_FLAG_DMEIF DMA_FLAG_DMEIF6
#define sEE_TX_DMA_FLAG_TEIF DMA_FLAG_TEIF6
#define sEE_TX_DMA_FLAG_HTIF DMA_FLAG_HTIF6
#define sEE_TX_DMA_FLAG_TCIF DMA_FLAG_TCIF6
#define sEE_RX_DMA_FLAG_FEIF DMA_FLAG_FEIF0
#define sEE_RX_DMA_FLAG_DMEIF DMA_FLAG_DMEIF0
#define sEE_RX_DMA_FLAG_TEIF DMA_FLAG_TEIF0
#define sEE_RX_DMA_FLAG_HTIF DMA_FLAG_HTIF0
#define sEE_RX_DMA_FLAG_TCIF DMA_FLAG_TCIF0
#define sEE_DIRECTION_TX 0
#define sEE_DIRECTION_RX 1
/* Time constant for the delay caclulation allowing to have a millisecond
incrementing counter. This value should be equal to (System Clock / 1000).
ie. if system clock = 120MHz then sEE_TIME_CONST should be 120. */
#define sEE_TIME_CONST 120
/**
* @}
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LOW_LEVEL_Exported_Functions
* @{
*/
void STM_EVAL_LEDInit(Led_TypeDef Led);
void STM_EVAL_LEDOn(Led_TypeDef Led);
void STM_EVAL_LEDOff(Led_TypeDef Led);
void STM_EVAL_LEDToggle(Led_TypeDef Led);
void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode);
uint32_t STM_EVAL_PBGetState(Button_TypeDef Button);
void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct);
void SD_LowLevel_DeInit(void);
void SD_LowLevel_Init(void);
void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize);
void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize);
void sEE_LowLevel_DeInit(void);
void sEE_LowLevel_Init(void);
void sEE_LowLevel_DMAConfig(uint32_t pBuffer, uint32_t BufferSize, uint32_t Direction);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_audio_codec.c
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_audio_codec.h
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/**
******************************************************************************
* @file stm322xg_eval_audio_codec.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the
* stm322xg_eval_audio_codec.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_AUDIOCODEC_H
#define __STM322xG_EVAL_AUDIOCODEC_H
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
#include "stm322xg_eval_ioe.h" /* IOExpander driver is included in order to allow
CS43L22 codec reset pin managment on the
evaluation board */
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @defgroup STM322xG_EVAL_AUDIO_CODEC
* @{
*/
/** @defgroup STM322xG_EVAL_AUDIO_CODEC_Exported_Types
* @{
*/
/** @defgroup STM322xG_EVAL_AUDIO_CODEC_Exported_Constants
* @{
*/
/*------------------------------------
CONFIGURATION: Audio Codec Driver Configuration parameters
----------------------------------------*/
/* Audio Transfer mode (DMA, Interrupt or Polling) */
#define AUDIO_MAL_MODE_NORMAL /* Uncomment this line to enable the audio
Transfer using DMA */
/* #define AUDIO_MAL_MODE_CIRCULAR */ /* Uncomment this line to enable the audio
Transfer using DMA */
/* For the DMA modes select the interrupt that will be used */
#define AUDIO_MAL_DMA_IT_TC_EN /* Uncomment this line to enable DMA Transfer Complete interrupt */
/* #define AUDIO_MAL_DMA_IT_HT_EN */ /* Uncomment this line to enable DMA Half Transfer Complete interrupt */
/* #define AUDIO_MAL_DMA_IT_TE_EN */ /* Uncomment this line to enable DMA Transfer Error interrupt */
/* Select the interrupt preemption priority and subpriority for the DMA interrupt */
#define EVAL_AUDIO_IRQ_PREPRIO 0 /* Select the preemption priority level(0 is the highest) */
#define EVAL_AUDIO_IRQ_SUBRIO 0 /* Select the sub-priority level (0 is the highest) */
/* Uncomment the following line to use the default Codec_TIMEOUT_UserCallback()
function implemented in stm322xg_eval_audio_codec.c file.
Codec_TIMEOUT_UserCallback() function is called whenever a timeout condition
occurs during communication (waiting on an event that doesn't occur, bus
errors, busy devices ...). */
/* #define USE_DEFAULT_TIMEOUT_CALLBACK */
/*----------------------------------------------------------------------------*/
/*------------------------------------
OPTIONAL Configuration defines parameters
----------------------------------------*/
/* I2C clock speed configuration (in Hz)
WARNING:
Make sure that this define is not already declared in other files (ie.
stm322xg_eval.h file). It can be used in parallel by other modules. */
#ifndef I2C_SPEED
#define I2C_SPEED 100000
#endif /* I2C_SPEED */
/* Uncomment defines below to select standard for audio communication between
Codec and I2S peripheral */
#define I2S_STANDARD_PHILLIPS
/* #define I2S_STANDARD_MSB */
/* #define I2S_STANDARD_LSB */
/* Uncomment the defines below to select if the Master clock mode should be
enabled or not */
#define CODEC_MCLK_ENABLED
/* #deine CODEC_MCLK_DISABLED */
/* Uncomment this line to enable verifying data sent to codec after each write
operation */
#define VERIFY_WRITTENDATA
/*----------------------------------------------------------------------------*/
/*-----------------------------------
Hardware Configuration defines parameters
-----------------------------------------*/
/* I2S peripheral configuration defines */
#define CODEC_I2S SPI2
#define CODEC_I2S_CLK RCC_APB1Periph_SPI2
#define CODEC_I2S_ADDRESS 0x4000380C
#define CODEC_I2S_GPIO_AF GPIO_AF_SPI2
#define CODEC_I2S_IRQ SPI2_IRQn
#define CODEC_I2S_GPIO_CLOCK (RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOI)
#define CODEC_I2S_WS_PIN GPIO_Pin_0
#define CODEC_I2S_SCK_PIN GPIO_Pin_1
#define CODEC_I2S_SD_PIN GPIO_Pin_3
#define CODEC_I2S_MCK_PIN GPIO_Pin_6
#define CODEC_I2S_WS_PINSRC GPIO_PinSource0
#define CODEC_I2S_SCK_PINSRC GPIO_PinSource1
#define CODEC_I2S_SD_PINSRC GPIO_PinSource3
#define CODEC_I2S_MCK_PINSRC GPIO_PinSource6
#define CODEC_I2S_GPIO GPIOI
#define CODEC_I2S_MCK_GPIO GPIOC
/* I2S DMA Stream definitions */
#define AUDIO_MAL_DMA_CLOCK RCC_AHB1Periph_DMA1
#define AUDIO_MAL_DMA_STREAM DMA1_Stream4
#define AUDIO_MAL_DMA_CHANNEL DMA_Channel_0
#define AUDIO_MAL_DMA_IRQ DMA1_Stream4_IRQn
#define AUDIO_MAL_DMA_FLAG_TC DMA_FLAG_TCIF4
#define AUDIO_MAL_DMA_FLAG_HT DMA_FLAG_HTIF4
#define AUDIO_MAL_DMA_FLAG_FE DMA_FLAG_FEIF4
#define AUDIO_MAL_DMA_FLAG_TE DMA_FLAG_TEIF4
#define AUDIO_MAL_DMA_FLAG_DME DMA_FLAG_DMEIF4
#define AUDIO_MAL_DMA_PERIPH_DATA_SIZE DMA_PeripheralDataSize_HalfWord
#define AUDIO_MAL_DMA_MEM_DATA_SIZE DMA_MemoryDataSize_HalfWord
#define DMA_MAX_SZE 0xFFFF
#define Audio_MAL_IRQHandler DMA1_Stream4_IRQHandler
/* I2C peripheral configuration defines (control interface of the audio codec) */
#define CODEC_I2C I2C1
#define CODEC_I2C_CLK RCC_APB1Periph_I2C1
#define CODEC_I2C_GPIO_CLOCK RCC_AHB1Periph_GPIOB
#define CODEC_I2C_GPIO_AF GPIO_AF_I2C1
#define CODEC_I2C_GPIO GPIOB
#define CODEC_I2C_SCL_PIN GPIO_Pin_6
#define CODEC_I2C_SDA_PIN GPIO_Pin_9
#define CODEC_I2S_SCL_PINSRC GPIO_PinSource6
#define CODEC_I2S_SDA_PINSRC GPIO_PinSource9
/* Maximum Timeout values for flags and events waiting loops. These timeouts are
not based on accurate values, they just guarantee that the application will
not remain stuck if the I2C communication is corrupted.
You may modify these timeout values depending on CPU frequency and application
conditions (interrupts routines ...). */
#define CODEC_FLAG_TIMEOUT ((uint32_t)0x1000)
#define CODEC_LONG_TIMEOUT ((uint32_t)(300 * CODEC_FLAG_TIMEOUT))
/*----------------------------------------------------------------------------*/
/*-----------------------------------
Audio Codec User defines
-----------------------------------------*/
/* Codec output DEVICE */
#define OUTPUT_DEVICE_SPEAKER 1
#define OUTPUT_DEVICE_HEADPHONE 2
#define OUTPUT_DEVICE_BOTH 3
#define OUTPUT_DEVICE_AUTO 4
/* Volume Levels values */
#define DEFAULT_VOLMIN 0x00
#define DEFAULT_VOLMAX 0xFF
#define DEFAULT_VOLSTEP 0x04
#define AUDIO_PAUSE 0
#define AUDIO_RESUME 1
/* Codec POWER DOWN modes */
#define CODEC_PDWN_HW 1
#define CODEC_PDWN_SW 2
/* MUTE commands */
#define AUDIO_MUTE_ON 1
#define AUDIO_MUTE_OFF 0
/*----------------------------------------------------------------------------*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_AUDIO_CODEC_Exported_Macros
* @{
*/
#define VOLUME_CONVERT(x) ((Volume > 100)? 100:((uint8_t)((Volume * 255) / 100)))
#define DMA_MAX(x) (((x) <= DMA_MAX_SZE)? (x):DMA_MAX_SZE)
/**
* @}
*/
/** @defgroup STM322xG_EVAL_AUDIO_CODEC_Exported_Functions
* @{
*/
uint32_t EVAL_AUDIO_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq);
uint32_t EVAL_AUDIO_DeInit(void);
uint32_t EVAL_AUDIO_Play(uint16_t* pBuffer, uint32_t Size);
uint32_t EVAL_AUDIO_PauseResume(uint32_t Cmd);
uint32_t EVAL_AUDIO_Stop(uint32_t CodecPowerDown_Mode);
uint32_t EVAL_AUDIO_VolumeCtl(uint8_t Volume);
uint32_t EVAL_AUDIO_Mute(uint32_t Command);
uint32_t Codec_SwitchOutput(uint8_t Output);
/* User Callbacks: user has to implement these functions in his code if
they are needed. -----------------------------------------------------------*/
/* This function is called when the requested data has been completely transferred.
In Normal mode (when the define AUDIO_MAL_MODE_NORMAL is enabled) this function
is called at the end of the whole audio file.
In circular mode (when the define AUDIO_MAL_MODE_CIRCULAR is enabled) this
function is called at the end of the current buffer transmission. */
void EVAL_AUDIO_TransferComplete_CallBack(uint32_t pBuffer, uint32_t Size);
/* This function is called when half of the requested buffer has been transferred
This callback is useful in Circular mode only (when AUDIO_MAL_MODE_CIRCULAR
define is enabled)*/
void EVAL_AUDIO_HalfTransfer_CallBack(uint32_t pBuffer, uint32_t Size);
/* This function is called when an Interrupt due to transfer error on or peripheral
error occurs. */
void EVAL_AUDIO_Error_CallBack(void* pData);
/* Codec_TIMEOUT_UserCallback() function is called whenever a timeout condition
occurs during communication (waiting on an event that doesn't occur, bus
errors, busy devices ...) on the Codec control interface (I2C).
You can use the default timeout callback implementation by uncommenting the
define USE_DEFAULT_TIMEOUT_CALLBACK in stm322xg_eval_audio_codec.h file.
Typically the user implementation of this callback should reset I2C peripheral
and re-initialize communication or in worst case reset all the application. */
uint32_t Codec_TIMEOUT_UserCallback(void);
#endif /* __STM322xG_EVAL_AUDIOCODEC_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_fsmc_onenand.c
-567
View File
@@ -1,567 +0,0 @@
/**
******************************************************************************
* @file stm322xg_eval_fsmc_onenand.c
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file provides a set of functions needed to drive the
* KFG1216U2A/B-DIB6 OneNAND memory mounted on STM322xG-EVAL evaluation
* board(MB786) RevA.
*
* Note: This memory is not available on the RevB of the board.
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval_fsmc_onenand.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_FSMC_ONENAND
* @brief This file provides a set of functions needed to drive the
* KFG1216U2A/B-DIB6 OneNAND memory mounted on STM322xG-EVAL board.
* @{
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Private_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Private_Defines
* @{
*/
#define BANK1_ONENAND1_ADDR ((uint32_t)0x60000000)
#define ONENAND_BOOTPARTITION_ADDR ((uint32_t)BANK1_ONENAND1_ADDR)
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Private_Macros
* @{
*/
#define OneNAND_WRITE(Address, Data) (*(__IO uint16_t *)(Address) = (Data))
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Private_Function_Prototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Private_Functions
* @{
*/
/**
* @brief Configures the FSMC and GPIOs to interface with the OneNAND memory.
* This function must be called before any write/read operation on the
* OneNAND.
* @param None
* @retval None
*/
void OneNAND_Init(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOG | RCC_AHB1Periph_GPIOE |
RCC_AHB1Periph_GPIOF | RCC_AHB1Periph_GPIOB, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/* OneNAND Data lines configuration */
GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource7, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource8, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource9, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource11, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource13, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource15, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
GPIO_Pin_14 | GPIO_Pin_15 |GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* OneNAND Address lines configuration */
GPIO_PinAFConfig(GPIOF,GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource2, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource3, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource13, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF,GPIO_PinSource15, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource2, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource3, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD,GPIO_PinSource11, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD,GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD,GPIO_PinSource13, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE,GPIO_PinSource3, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE,GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE,GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE,GPIO_PinSource6, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE,GPIO_PinSource2, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource13, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG,GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_13 | GPIO_Pin_14;
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4| GPIO_Pin_5 | GPIO_Pin_6;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* NOE, NWE and CLK configuration */
GPIO_PinAFConfig(GPIOD,GPIO_PinSource3, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD,GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD,GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5 | GPIO_Pin_3;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NE1 configuration */
GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* NL configuration */
GPIO_PinAFConfig(GPIOB,GPIO_PinSource7, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* NWAIT Configuration */
GPIO_PinAFConfig(GPIOD,GPIO_PinSource6, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/*-- FSMC Configuration ----------------------------------------------------*/
p.FSMC_AddressSetupTime = 0x03;
p.FSMC_AddressHoldTime = 0x00;
p.FSMC_DataSetupTime = 0x0C;
p.FSMC_BusTurnAroundDuration = 0x01;
p.FSMC_CLKDivision = 0x2;
p.FSMC_DataLatency = 0x00;
p.FSMC_AccessMode = FSMC_AccessMode_B;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Enable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
}
/**
* @brief Resets the OneNAND memory.
* @param None
* @retval None
*/
void OneNAND_Reset(void)
{
OneNAND_WRITE(ONENAND_BOOTPARTITION_ADDR, OneNAND_CMD_RESET);
}
/**
* @brief Reads OneNAND memory's Manufacturer and Device Code.
* @param OneNAND_ID: pointer to a OneNAND_IDTypeDef structure which will hold
* the Manufacturer and Device Code.
* @retval None
*/
void OneNAND_ReadID(OneNAND_IDTypeDef* OneNAND_ID)
{
uint16_t status = 0x0;
/* Wait till no ongoing operation */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
while((status & 0x8000) == 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
}
/* Read ID data */
OneNAND_ID->Manufacturer_ID = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_MANUFACTERID);
OneNAND_ID->Device_ID = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_DEVICEID);
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION) = 0x40E0;
}
/**
* @brief Unlocks the specified OneNAND memory block (128Kb).
* @param BlockNumber: specifies the block number to be erased. This parameter
* should be between 0 and 511.
* @retval OneNAND memory Interrupt Status.
*/
uint16_t OneNAND_UnlockBlock(uint16_t BlockNumber)
{
uint16_t status = 0;
/* Wait till no ongoing operation */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
while((status & 0x8000) == 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
}
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBLOCKADDRESS) = BlockNumber;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_UNLOCK;
/* Wait till the command is completed */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
while((status & 0x8000) != 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
}
/* Get the Controller Status */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
return (status);
}
/**
* @brief Erases the specified OneNAND memory block (128Kb).
* @param BlockNumber: specifies the block number to be erased. This parameter
* should be between 0 and 511.
* @retval OneNAND memory Interrupt Status.
*/
uint16_t OneNAND_EraseBlock(uint16_t BlockNumber)
{
uint16_t status = 0x0;
/* Wait till no ongoing operation */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
while((status & 0x8000) == 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
}
/* Erase operation */
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = BlockNumber;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_ERASE;
/* Wait till no error is generated */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
while((status & 0x0400) == 0x0400)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
}
/* Wait till the command is completed */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
while((status & 0x8000) != 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
}
/* Get the Controller Status */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
return (status);
}
/**
* @brief Writes a Half-word buffer to the OneNAND memory.
* @param pBuffer: pointer to buffer.
* @param WriteAddr: OneNAND memory internal address from which the data will be
* written.
* @param NumHalfwordToWrite: number of half-words to write.
* @retval OneNAND memory Controller Status.
*/
uint16_t OneNAND_WriteBuffer(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToWrite)
{
uint32_t datacounter = 0;
uint16_t status = 0;
/* Load the buffer to be written into the DATA RAM0*/
for(datacounter = 0; datacounter < NumHalfwordToWrite; datacounter++)
{
*(__IO uint16_t *)((BANK1_ONENAND1_ADDR + OneNAND_DATA_RAM_0_0_ADD) + (2*datacounter)) = pBuffer[datacounter];
}
/* Write operation from DATA RAM0 to NAND address*/
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = Address.Block; /* NAND Flash block address*/
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESINT8_T) = (uint16_t)(Address.Page << 2); /* NAND Flash start page address */
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBUFFER) = OneNAND_DATA_RAM_0_0_REG;/* BufferRAM Sector Count (BSC) and BufferRAM Sector Address (BSA).*/
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_PROGRAM; /* Command */
/* Wait till the command is completed */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
while((status & 0x8000) != 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
}
/* Wait till the write interrupt is set */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
while((status & 0x40) != 0x40)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
}
/* Get the Controller Status */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
return (status);
}
/**
* @brief Reads a block of data from the OneNAND memory using asynchronous mode.
* @param pBuffer: pointer to the buffer that receives the data read from the
* OneNAND memory.
* @param ReadAddr: OneNAND memory internal address to read from.
* @param NumHalfwordToRead: number of half-words to read.
* @retval None
*/
void OneNAND_AsynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead)
{
uint16_t datatmp = 0x0, index = 0;
__IO uint16_t status = 0;
datatmp = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION);
/* Set the asynchronous read mode */
OneNAND_WRITE(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION, (datatmp& 0x7FFF));
/* Load data from the read address to the DATA RAM 1 sector 1 */
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = Address.Block; /* NAND Flash block address*/
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESINT8_T) = (uint16_t)(Address.Page << 2);
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBUFFER) = OneNAND_DATA_RAM_1_0_REG;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_LOAD; /* Command */
/* Wait till the command is completed */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
while((status & 0x8000) != 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
}
/* Read Controller status */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
/* Read data */
for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /* While there is data to read */
{
/* Read a Halfword from the memory */
*pBuffer++ = *(__IO uint16_t *)((BANK1_ONENAND1_ADDR + OneNAND_DATA_RAM_1_0_ADD)+ 2*index);
index++;
}
}
/**
* @brief Reads a block of data from the OneNAND memory using synchronous mode.
* @param pBuffer: pointer to the buffer that receives the data read from the
* OneNAND memory.
* @param ReadAddr: OneNAND memory internal address to read from.
* @param NumHalfwordToRead: number of half-words to read.
* @retval None
*/
void OneNAND_SynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead)
{
uint16_t index = 0;
__IO uint16_t status = 0;
/* Set the asynchronous read mode */
OneNAND_WRITE(BANK1_ONENAND1_ADDR + OneNAND_REG_SYSTEMCONFIGURATION, 0xB4C0);
/* Load data from the read address to the DATA RAM 1 sector 1 */
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESS1) = Address.Block; /* NAND Flash block address*/
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTADDRESINT8_T) = (uint16_t)(Address.Page << 2);
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_STARTBUFFER) = OneNAND_DATA_RAM_1_0_REG;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT) = 0x0000;
*(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_COMMAND) = OneNAND_CMD_LOAD; /* Command */
/* Wait till the command is completed */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
while((status & 0x8000) != 0x8000)
{
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT);
}
/* Read Controller status */
status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS);
/* Read data */
for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /* While there is data to read */
{
*pBuffer++ = *(__IO uint16_t *)((BANK1_ONENAND1_ADDR + OneNAND_DATA_RAM_1_0_ADD + 2*index));
index++;
}
}
/**
* @brief Reads the OneNAND memory Interrupt status.
* @param None
* @retval OneNAND memory Interrupt Status.
*/
uint16_t OneNAND_ReadStatus(void)
{
__IO uint16_t status = 0x0;
/* Read Status */
return (status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_INTERRUPT));
}
/**
* @brief Reads the OneNAND Controller status.
* @param None
* @retval OneNAND Controller Status.
*/
uint16_t OneNAND_ReadControllerStatus(void)
{
__IO uint16_t status = 0x0;
/* Read Controller Status */
return (status = *(__IO uint16_t *)(BANK1_ONENAND1_ADDR + OneNAND_REG_CONTROLSTATUS));
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_fsmc_onenand.h
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/**
******************************************************************************
* @file stm322xg_eval_fsmc_onenand.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the
* stm322xg_eval_fsmc_onenand.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_FSMC_ONENAND_H
#define __STM322xG_EVAL_FSMC_ONENAND_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_FSMC_ONENAND
* @{
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Exported_Types
* @{
*/
typedef struct
{
uint16_t Manufacturer_ID;
uint16_t Device_ID;
}OneNAND_IDTypeDef;
/* OneNand Status */
typedef enum
{
OneNAND_SUCCESS = 0,
OneNAND_ONGOING,
OneNAND_ERROR,
OneNAND_TIMEOUT
}OneNAND_Status;
typedef struct
{
uint16_t Block;
uint16_t Page;
} OneNAND_ADDRESS;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Exported_Constants
* @{
*/
/**
* @brief OneNAND memory command
*/
#define OneNAND_CMD_ERASE ((uint16_t)0x0094)
#define OneNAND_CMD_PROGRAM ((uint16_t)0x0080)
#define OneNAND_CMD_RESET ((uint16_t)0x00F0)
#define OneNAND_CMD_READ_ID ((uint16_t)0x0090)
#define OneNAND_CMD_UNLOCK ((uint16_t)0x0023)
#define OneNAND_CMD_LOAD ((uint16_t)0x0000)
/**
* @brief OneNand Register description
*/
#define OneNAND_REG_MANUFACTERID ((uint32_t)0x1E000) /* Manufacturer identification */
#define OneNAND_REG_DEVICEID ((uint32_t)0x1E002) /* Device identification */
#define OneNAND_REG_DATABUFFERSIZE ((uint32_t)0x1E006) /* Data Buffer size */
#define OneNAND_REG_BOOTBUFFERSIZE ((uint32_t)0x1E008) /* Boot Buffer size */
#define OneNAND_REG_AMOUNTOFBUFFERS ((uint32_t)0x1E00A) /* Amount of data/boot buffers */
#define OneNAND_REG_TECHNOLOGY ((uint32_t)0x1E00C) /* Info about technology */
#define OneNAND_REG_STARTADDRESS1 ((uint32_t)0x1E200) /* Nand Flash Block Address */
#define OneNAND_REG_STARTADDRESS3 ((uint32_t)0x1E204) /* Destination Block address for copy back program */
#define OneNAND_REG_STARTADDRESS4 ((uint32_t)0x1E206) /* Destination Page & sector address for copy back program */
#define OneNAND_REG_STARTADDRESINT8_T ((uint32_t)0x1E20E) /* Nand Flash Page & sector address */
#define OneNAND_REG_STARTBUFFER ((uint32_t)0x1E400) /* The meaning is with which buffer to start and how many
buffers to use for the data transfer */
#define OneNAND_REG_COMMAND ((uint32_t)0x1E440) /* Host control and memory operation commands*/
#define OneNAND_REG_SYSTEMCONFIGURATION ((uint32_t)0x1E442) /* Memory and host interface configuration */
#define OneNAND_REG_CONTROLSTATUS ((uint32_t)0x1E480) /* Control status and result of memory operation */
#define OneNAND_REG_INTERRUPT ((uint32_t)0x1E482) /* Memory Command Completion Interrupt Status */
#define OneNAND_REG_STARTBLOCKADDRESS ((uint32_t)0x1E498) /* Start memory block address in Write Protection mode */
#define OneNAND_REG_WRITEPROTECTIONSTATUS ((uint32_t)0x1E49C) /* Current memory Write Protection status */
/**
* @brief OneNand Memory partition description
*/
#define OneNAND_DATA_RAM_0_0_ADD ((uint32_t)0x0400) /* DataRAM Main page0/sector0 */
#define OneNAND_DATA_RAM_0_0_REG ((uint32_t)0x0800) /* DataRAM 0_0 is selected with 4 sector */
#define OneNAND_DATA_RAM_0_1_ADD ((uint32_t)0x0600) /* DataRAM Main page0/sector1 */
#define OneNAND_DATA_RAM_0_1_REG ((uint32_t)0x0900) /* DataRAM 0_1 is selected with 4 sector */
#define OneNAND_DATA_RAM_0_2_ADD ((uint32_t)0x0800) /* DataRAM Main page0/sector2 */
#define OneNAND_DATA_RAM_0_2_REG ((uint32_t)0x0A00) /* DataRAM 0_2 is selected with 4 sector */
#define OneNAND_DATA_RAM_0_3_ADD ((uint32_t)0x0A00) /* DataRAM Main page0/sector3 */
#define OneNAND_DATA_RAM_0_3_REG ((uint32_t)0x0B00) /* DataRAM 0_3 is selected with 4 sector */
#define OneNAND_DATA_RAM_1_0_ADD ((uint32_t)0x0C00) /* DataRAM Main page1/sector0 */
#define OneNAND_DATA_RAM_1_0_REG ((uint32_t)0x0C00) /* DataRAM 1_0 is selected with 4 sector */
#define OneNAND_DATA_RAM_1_1_ADD ((uint32_t)0x0E00) /* DataRAM Main page1/sector1 */
#define OneNAND_DATA_RAM_1_1_REG ((uint32_t)0x0D00) /* DataRAM 1_1 is selected with 4 sector */
#define OneNAND_DATA_RAM_1_2_ADD ((uint32_t)0x1000) /* DataRAM Main page1/sector2 */
#define OneNAND_DATA_RAM_1_2_REG ((uint32_t)0x0E00) /* DataRAM 1_2 is selected with 4 sector */
#define OneNAND_DATA_RAM_1_3_ADD ((uint32_t)0x1200) /* DataRAM Main page1/sector3 */
#define OneNAND_DATA_RAM_1_3_REG ((uint32_t)0x0F00) /* DataRAM 1_3 is selected with 4 sector */
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_ONENAND_Exported_Functions
* @{
*/
void OneNAND_Init(void);
void OneNAND_Reset(void);
void OneNAND_ReadID(OneNAND_IDTypeDef* OneNAND_ID);
uint16_t OneNAND_UnlockBlock(uint16_t BlockNumber);
uint16_t OneNAND_EraseBlock(uint16_t BlockNumber);
uint16_t OneNAND_WriteBuffer(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToWrite);
void OneNAND_AsynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead);
void OneNAND_SynchronousRead(uint16_t* pBuffer, OneNAND_ADDRESS Address, uint32_t NumHalfwordToRead);
uint16_t OneNAND_ReadStatus(void);
uint16_t OneNAND_ReadControllerStatus(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_FSMC_ONENAND_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_fsmc_psram.c
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/**
******************************************************************************
* @file stm322xg_eval_fsmc_psram.c
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file provides a set of functions needed to drive the IS66WV25616BLL
* PSRAM memory mounted on STM322xG-EVAL evaluation board(MB786) RevA.
*
* Note: This memory is not available on the RevB of the board.
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval_fsmc_psram.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_FSMC_PSRAM
* @brief This file provides a set of functions needed to drive the
* IS66WV25616BLL PSRAM memory mounted on STM322xG-EVAL board.
* @{
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Private_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Private_Defines
* @{
*/
/**
* @brief FSMC Bank 1 NOR/SRAM2
*/
#define Bank1_SRAM2_ADDR ((uint32_t)0x64000000)
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Private_Function_Prototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Private_Functions
* @{
*/
/**
* @brief Configures the FSMC and GPIOs to interface with the PSRAM memory.
* This function must be called before any write/read operation
* on the PSRAM.
* @param None
* @retval None
*/
void PSRAM_Init(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable GPIOs clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
RCC_AHB1Periph_GPIOG, ENABLE);
/* Enable FSMC clock */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
/*-- GPIOs Configuration ------------------------------------------------------*/
/*
+-------------------+--------------------+------------------+------------------+
+ PSRAM pins assignment +
+-------------------+--------------------+------------------+------------------+
| PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
| PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
| PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
| PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
| PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
| PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
| PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
| PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
| PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
| PD14 <-> FSMC_D0 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
| PD15 <-> FSMC_D1 | PE15 <-> FSMC_D12 |------------------+
+-------------------+--------------------+
*/
/* GPIOD configuration */
GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* GPIOE configuration */
GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_7 |
GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11|
GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* GPIOF configuration */
GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
/* GPIOG configuration */
GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_9;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0x2;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 0xB;
p.FSMC_BusTurnAroundDuration = 1;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
/*!< Enable FSMC Bank1_SRAM2 Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
}
/**
* @brief Writes a Half-word buffer to the FSMC PSRAM memory.
* @param pBuffer : pointer to buffer.
* @param WriteAddr : PSRAM memory internal address from which the data will be
* written.
* @param NumHalfwordToWrite : number of half-words to write.
* @retval None
*/
void PSRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
{
for(; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */
{
/* Transfer data to the memory */
*(uint16_t *) (Bank1_SRAM2_ADDR + WriteAddr) = *pBuffer++;
/* Increment the address*/
WriteAddr += 2;
}
}
/**
* @brief Reads a block of data from the FSMC PSRAM memory.
* @param pBuffer : pointer to the buffer that receives the data read from the
* PSRAM memory.
* @param ReadAddr : PSRAM memory internal address to read from.
* @param NumHalfwordToRead : number of half-words to read.
* @retval None
*/
void PSRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead)
{
for(; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */
{
/* Read a half-word from the memory */
*pBuffer++ = *(__IO uint16_t*) (Bank1_SRAM2_ADDR + ReadAddr);
/* Increment the address*/
ReadAddr += 2;
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_fsmc_psram.h
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/**
******************************************************************************
* @file stm322xg_eval_fsmc_psram.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the
* stm322xg_eval_fsmc_psram.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_FSMC_PSRAM_H
#define __STM322xG_EVAL_FSMC_PSRAM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_FSMC_PSRAM
* @{
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Exported_Constants
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_PSRAM_Exported_Functions
* @{
*/
void PSRAM_Init(void);
void PSRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite);
void PSRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead);
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_FSMC_PSRAM_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_fsmc_sram.c
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/**
******************************************************************************
* @file stm322xg_eval_fsmc_sram.c
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file provides a set of functions needed to drive the
* IS61WV102416BLL SRAM memory mounted on STM322xG-EVAL evaluation
* board(MB786) RevB.
*
* Note: This memory is not available on the RevA of the board.
*
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval_fsmc_sram.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_FSMC_SRAM
* @brief This file provides a set of functions needed to drive the
* IS61WV102416BLL SRAM memory mounted on STM322xG-EVAL board.
* @{
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Private_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Private_Defines
* @{
*/
/**
* @brief FSMC Bank 1 NOR/SRAM2
*/
#define Bank1_SRAM2_ADDR ((uint32_t)0x64000000)
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Private_Function_Prototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Private_Functions
* @{
*/
/**
* @brief Configures the FSMC and GPIOs to interface with the SRAM memory.
* This function must be called before any write/read operation
* on the SRAM.
* @param None
* @retval None
*/
void SRAM_Init(void)
{
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable GPIOs clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
RCC_AHB1Periph_GPIOG, ENABLE);
/* Enable FSMC clock */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
/*-- GPIOs Configuration -----------------------------------------------------*/
/*
+-------------------+--------------------+------------------+------------------+
| PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
| PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
| PD4 <-> FSMC_NOE | PE2 <-> FSMC_A23 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
| PD5 <-> FSMC_NWE | PE3 <-> FSMC_A19 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
| PD8 <-> FSMC_D13 | PE4 <-> FSMC_A20 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
| PD9 <-> FSMC_D14 | PE5 <-> FSMC_A21 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
| PD10 <-> FSMC_D15 | PE6 <-> FSMC_A22 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
| PD11 <-> FSMC_A16 | PE7 <-> FSMC_D4 | PF13 <-> FSMC_A7 |------------------+
| PD12 <-> FSMC_A17 | PE8 <-> FSMC_D5 | PF14 <-> FSMC_A8 |
| PD13 <-> FSMC_A18 | PE9 <-> FSMC_D6 | PF15 <-> FSMC_A9 |
| PD14 <-> FSMC_D0 | PE10 <-> FSMC_D7 |------------------+
| PD15 <-> FSMC_D1 | PE11 <-> FSMC_D8 |
+-------------------| PE12 <-> FSMC_D9 |
| PE13 <-> FSMC_D10 |
| PE14 <-> FSMC_D11 |
| PE15 <-> FSMC_D12 |
+--------------------+
*/
/* GPIOD configuration */
GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/* GPIOE configuration */
GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource6 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 |
GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11|
GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* GPIOF configuration */
GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |
GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
/* GPIOG configuration */
GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC);
GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 |
GPIO_Pin_4 | GPIO_Pin_5 |GPIO_Pin_9;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/*-- FSMC Configuration ------------------------------------------------------*/
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 4;
p.FSMC_BusTurnAroundDuration = 1;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
/*!< Enable FSMC Bank1_SRAM2 Bank */
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
}
/**
* @brief Writes a Half-word buffer to the FSMC SRAM memory.
* @param pBuffer : pointer to buffer.
* @param WriteAddr : SRAM memory internal address from which the data will be
* written.
* @param NumHalfwordToWrite : number of half-words to write.
* @retval None
*/
void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite)
{
for (; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */
{
/* Transfer data to the memory */
*(uint16_t *) (Bank1_SRAM2_ADDR + WriteAddr) = *pBuffer++;
/* Increment the address*/
WriteAddr += 2;
}
}
/**
* @brief Reads a block of data from the FSMC SRAM memory.
* @param pBuffer : pointer to the buffer that receives the data read from the
* SRAM memory.
* @param ReadAddr : SRAM memory internal address to read from.
* @param NumHalfwordToRead : number of half-words to read.
* @retval None
*/
void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead)
{
for (; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */
{
/* Read a half-word from the memory */
*pBuffer++ = *(__IO uint16_t*) (Bank1_SRAM2_ADDR + ReadAddr);
/* Increment the address*/
ReadAddr += 2;
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_fsmc_sram.h
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/**
******************************************************************************
* @file stm322xg_eval_fsmc_sram.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the
* stm322xg_eval_fsmc_sram.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_FSMC_SRAM_H
#define __STM322xG_EVAL_FSMC_SRAM_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_FSMC_SRAM
* @{
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Exported_Constants
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_FSMC_SRAM_Exported_Functions
* @{
*/
void SRAM_Init(void);
void SRAM_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite);
void SRAM_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead);
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_FSMC_SRAM_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_i2c_ee.c
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/**
******************************************************************************
* @file stm322xg_eval_i2c_ee.c
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file provides a set of functions needed to manage the I2C M24CXX
* EEPROM memory mounted on STM322xG-EVAL evaluation board(MB786) RevA
* and RevB.
*
* ===================================================================
* Note: This driver is intended for STM32F2xx families devices only.
* ===================================================================
*
* It implements a high level communication layer for read and write
* from/to this memory. The needed STM32 hardware resources (I2C and
* GPIO) are defined in stm322xg_eval.h file, and the initialization is
* performed in sEE_LowLevel_Init() function declared in stm322xg_eval.c
* file.
* You can easily tailor this driver to any other development board,
* by just adapting the defines for hardware resources and
* sEE_LowLevel_Init() function.
*
* @note In this driver, basic read and write functions (sEE_ReadBuffer()
* and sEE_WritePage()) use the DMA to perform the data transfer
* to/from EEPROM memory (except when number of requested data is
* equal to 1). Thus, after calling these two functions, user
* application may perform other tasks while DMA is transferring
* data. The application should then monitor the variable holding
* the number of data in order to determine when the transfer is
* completed (variable decremented to 0). Stopping transfer tasks
* are performed into DMA interrupt handlers (which are integrated
* into this driver).
*
* +-----------------------------------------------------------------+
* | Pin assignment |
* +---------------------------------------+-----------+-------------+
* | STM32 I2C Pins | sEE | Pin |
* +---------------------------------------+-----------+-------------+
* | . | E0(GND) | 1 (0V) |
* | . | E1(GND) | 2 (0V) |
* | . | E2(GND) | 3 (0V) |
* | . | E0(VSS) | 4 (0V) |
* | sEE_I2C_SDA_PIN/ SDA | SDA | 5 |
* | sEE_I2C_SCL_PIN/ SCL | SCL | 6 |
* | . | /WC(VDD)| 7 (3.3V) |
* | . | VDD | 8 (3.3V) |
* +---------------------------------------+-----------+-------------+
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval_i2c_ee.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_I2C_EE
* @brief This file includes the I2C EEPROM driver of STM32-EVAL boards.
* @{
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Private_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Private_Defines
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Private_Variables
* @{
*/
__IO uint16_t sEEAddress = 0;
__IO uint32_t sEETimeout = sEE_LONG_TIMEOUT;
__IO uint16_t* sEEDataReadPointer;
__IO uint8_t* sEEDataWritePointer;
__IO uint8_t sEEDataNum;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Private_Function_Prototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Private_Functions
* @{
*/
/**
* @brief DeInitializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_DeInit(void)
{
sEE_LowLevel_DeInit();
}
/**
* @brief Initializes peripherals used by the I2C EEPROM driver.
* @param None
* @retval None
*/
void sEE_Init(void)
{
I2C_InitTypeDef I2C_InitStructure;
sEE_LowLevel_Init();
/*!< I2C configuration */
/* sEE_I2C configuration */
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
I2C_InitStructure.I2C_OwnAddress1 = I2C_SLAVE_ADDRESS7;
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
I2C_InitStructure.I2C_ClockSpeed = I2C_SPEED;
/* sEE_I2C Peripheral Enable */
I2C_Cmd(sEE_I2C, ENABLE);
/* Apply sEE_I2C configuration after enabling it */
I2C_Init(sEE_I2C, &I2C_InitStructure);
/* Enable the sEE_I2C peripheral DMA requests */
I2C_DMACmd(sEE_I2C, ENABLE);
#if defined (sEE_M24C64_32)
/*!< Select the EEPROM address according to the state of E0, E1, E2 pins */
sEEAddress = sEE_HW_ADDRESS;
#elif defined (sEE_M24C08)
/*!< depending on the sEE Address selected in the stm322xg_eval_i2c_ee.h file */
#ifdef sEE_Block0_ADDRESS
/*!< Select the sEE Block0 to write on */
sEEAddress = sEE_Block0_ADDRESS;
#endif
#ifdef sEE_Block1_ADDRESS
/*!< Select the sEE Block1 to write on */
sEEAddress = sEE_Block1_ADDRESS;
#endif
#ifdef sEE_Block2_ADDRESS
/*!< Select the sEE Block2 to write on */
sEEAddress = sEE_Block2_ADDRESS;
#endif
#ifdef sEE_Block3_ADDRESS
/*!< Select the sEE Block3 to write on */
sEEAddress = sEE_Block3_ADDRESS;
#endif
#endif /*!< sEE_M24C64_32 */
}
/**
* @brief Reads a block of data from the EEPROM.
* @param pBuffer : pointer to the buffer that receives the data read from
* the EEPROM.
* @param ReadAddr : EEPROM's internal address to start reading from.
* @param NumByteToRead : pointer to the variable holding number of bytes to
* be read from the EEPROM.
*
* @note The variable pointed by NumByteToRead is reset to 0 when all the
* data are read from the EEPROM. Application should monitor this
* variable in order know when the transfer is complete.
*
* @note When number of data to be read is higher than 1, this function just
* configures the communication and enable the DMA channel to transfer data.
* Meanwhile, the user application may perform other tasks.
* When number of data to be read is 1, then the DMA is not used. The byte
* is read in polling mode.
*
* @retval sEE_OK (0) if operation is correctly performed, else return value
* different from sEE_OK (0) or the timeout user callback.
*/
uint32_t sEE_ReadBuffer(uint8_t* pBuffer, uint16_t ReadAddr, uint16_t* NumByteToRead)
{
/* Set the pointer to the Number of data to be read. This pointer will be used
by the DMA Transfer Completer interrupt Handler in order to reset the
variable to 0. User should check on this variable in order to know if the
DMA transfer has been complete or not. */
sEEDataReadPointer = NumByteToRead;
/*!< While the bus is busy */
sEETimeout = sEE_LONG_TIMEOUT;
while(I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_BUSY))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send START condition */
I2C_GenerateSTART(sEE_I2C, ENABLE);
/*!< Test on EV5 and clear it (cleared by reading SR1 then writing to DR) */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_MODE_SELECT))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send EEPROM address for write */
I2C_Send7bitAddress(sEE_I2C, sEEAddress, I2C_Direction_Transmitter);
/*!< Test on EV6 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
#ifdef sEE_M24C08
/*!< Send the EEPROM's internal address to read from: Only one byte address */
I2C_SendData(sEE_I2C, ReadAddr);
#elif defined (sEE_M24C64_32)
/*!< Send the EEPROM's internal address to read from: MSB of the address first */
I2C_SendData(sEE_I2C, (uint8_t)((ReadAddr & 0xFF00) >> 8));
/*!< Test on EV8 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_BYTE_TRANSMITTING))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send the EEPROM's internal address to read from: LSB of the address */
I2C_SendData(sEE_I2C, (uint8_t)(ReadAddr & 0x00FF));
#endif /*!< sEE_M24C08 */
/*!< Test on EV8 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_BTF) == RESET)
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send STRAT condition a second time */
I2C_GenerateSTART(sEE_I2C, ENABLE);
/*!< Test on EV5 and clear it (cleared by reading SR1 then writing to DR) */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_MODE_SELECT))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send EEPROM address for read */
I2C_Send7bitAddress(sEE_I2C, sEEAddress, I2C_Direction_Receiver);
/* If number of data to be read is 1, then DMA couldn't be used */
/* One Byte Master Reception procedure (POLLING) ---------------------------*/
if ((uint16_t)(*NumByteToRead) < 2)
{
/* Wait on ADDR flag to be set (ADDR is still not cleared at this level */
sEETimeout = sEE_FLAG_TIMEOUT;
while(I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_ADDR) == RESET)
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Disable Acknowledgment */
I2C_AcknowledgeConfig(sEE_I2C, DISABLE);
/* Clear ADDR register by reading SR1 then SR2 register (SR1 has already been read) */
(void)sEE_I2C->SR2;
/*!< Send STOP Condition */
I2C_GenerateSTOP(sEE_I2C, ENABLE);
/* Wait for the byte to be received */
sEETimeout = sEE_FLAG_TIMEOUT;
while(I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_RXNE) == RESET)
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Read the byte received from the EEPROM */
*pBuffer = I2C_ReceiveData(sEE_I2C);
/*!< Decrement the read bytes counter */
(uint16_t)(*NumByteToRead)--;
/* Wait to make sure that STOP control bit has been cleared */
sEETimeout = sEE_FLAG_TIMEOUT;
while(sEE_I2C->CR1 & I2C_CR1_STOP)
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Re-Enable Acknowledgment to be ready for another reception */
I2C_AcknowledgeConfig(sEE_I2C, ENABLE);
}
else/* More than one Byte Master Reception procedure (DMA) -----------------*/
{
/*!< Test on EV6 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/* Configure the DMA Rx Channel with the buffer address and the buffer size */
sEE_LowLevel_DMAConfig((uint32_t)pBuffer, (uint16_t)(*NumByteToRead), sEE_DIRECTION_RX);
/* Inform the DMA that the next End Of Transfer Signal will be the last one */
I2C_DMALastTransferCmd(sEE_I2C, ENABLE);
/* Enable the DMA Rx Stream */
DMA_Cmd(sEE_I2C_DMA_STREAM_RX, ENABLE);
}
/* If all operations OK, return sEE_OK (0) */
return sEE_OK;
}
/**
* @brief Writes more than one byte to the EEPROM with a single WRITE cycle.
*
* @note The number of bytes (combined to write start address) must not
* cross the EEPROM page boundary. This function can only write into
* the boundaries of an EEPROM page.
* This function doesn't check on boundaries condition (in this driver
* the function sEE_WriteBuffer() which calls sEE_WritePage() is
* responsible of checking on Page boundaries).
*
* @param pBuffer : pointer to the buffer containing the data to be written to
* the EEPROM.
* @param WriteAddr : EEPROM's internal address to write to.
* @param NumByteToWrite : pointer to the variable holding number of bytes to
* be written into the EEPROM.
*
* @note The variable pointed by NumByteToWrite is reset to 0 when all the
* data are written to the EEPROM. Application should monitor this
* variable in order know when the transfer is complete.
*
* @note This function just configure the communication and enable the DMA
* channel to transfer data. Meanwhile, the user application may perform
* other tasks in parallel.
*
* @retval sEE_OK (0) if operation is correctly performed, else return value
* different from sEE_OK (0) or the timeout user callback.
*/
uint32_t sEE_WritePage(uint8_t* pBuffer, uint16_t WriteAddr, uint8_t* NumByteToWrite)
{
/* Set the pointer to the Number of data to be written. This pointer will be used
by the DMA Transfer Completer interrupt Handler in order to reset the
variable to 0. User should check on this variable in order to know if the
DMA transfer has been complete or not. */
sEEDataWritePointer = NumByteToWrite;
/*!< While the bus is busy */
sEETimeout = sEE_LONG_TIMEOUT;
while(I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_BUSY))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send START condition */
I2C_GenerateSTART(sEE_I2C, ENABLE);
/*!< Test on EV5 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_MODE_SELECT))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send EEPROM address for write */
sEETimeout = sEE_FLAG_TIMEOUT;
I2C_Send7bitAddress(sEE_I2C, sEEAddress, I2C_Direction_Transmitter);
/*!< Test on EV6 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
#ifdef sEE_M24C08
/*!< Send the EEPROM's internal address to write to : only one byte Address */
I2C_SendData(sEE_I2C, WriteAddr);
#elif defined(sEE_M24C64_32)
/*!< Send the EEPROM's internal address to write to : MSB of the address first */
I2C_SendData(sEE_I2C, (uint8_t)((WriteAddr & 0xFF00) >> 8));
/*!< Test on EV8 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_BYTE_TRANSMITTING))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send the EEPROM's internal address to write to : LSB of the address */
I2C_SendData(sEE_I2C, (uint8_t)(WriteAddr & 0x00FF));
#endif /*!< sEE_M24C08 */
/*!< Test on EV8 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_BYTE_TRANSMITTING))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/* Configure the DMA Tx Channel with the buffer address and the buffer size */
sEE_LowLevel_DMAConfig((uint32_t)pBuffer, (uint8_t)(*NumByteToWrite), sEE_DIRECTION_TX);
/* Enable the DMA Tx Stream */
DMA_Cmd(sEE_I2C_DMA_STREAM_TX, ENABLE);
/* If all operations OK, return sEE_OK (0) */
return sEE_OK;
}
/**
* @brief Writes buffer of data to the I2C EEPROM.
* @param pBuffer : pointer to the buffer containing the data to be written
* to the EEPROM.
* @param WriteAddr : EEPROM's internal address to write to.
* @param NumByteToWrite : number of bytes to write to the EEPROM.
* @retval None
*/
void sEE_WriteBuffer(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t NumByteToWrite)
{
uint8_t NumOfPage = 0, NumOfSingle = 0, count = 0;
uint16_t Addr = 0;
Addr = WriteAddr % sEE_PAGESIZE;
count = sEE_PAGESIZE - Addr;
NumOfPage = NumByteToWrite / sEE_PAGESIZE;
NumOfSingle = NumByteToWrite % sEE_PAGESIZE;
/*!< If WriteAddr is sEE_PAGESIZE aligned */
if(Addr == 0)
{
/*!< If NumByteToWrite < sEE_PAGESIZE */
if(NumOfPage == 0)
{
/* Store the number of data to be written */
sEEDataNum = NumOfSingle;
/* Start writing data */
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
}
/*!< If NumByteToWrite > sEE_PAGESIZE */
else
{
while(NumOfPage--)
{
/* Store the number of data to be written */
sEEDataNum = sEE_PAGESIZE;
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
WriteAddr += sEE_PAGESIZE;
pBuffer += sEE_PAGESIZE;
}
if(NumOfSingle!=0)
{
/* Store the number of data to be written */
sEEDataNum = NumOfSingle;
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
}
}
}
/*!< If WriteAddr is not sEE_PAGESIZE aligned */
else
{
/*!< If NumByteToWrite < sEE_PAGESIZE */
if(NumOfPage== 0)
{
/*!< If the number of data to be written is more than the remaining space
in the current page: */
if (NumByteToWrite > count)
{
/* Store the number of data to be written */
sEEDataNum = count;
/*!< Write the data contained in same page */
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
/* Store the number of data to be written */
sEEDataNum = (NumByteToWrite - count);
/*!< Write the remaining data in the following page */
sEE_WritePage((uint8_t*)(pBuffer + count), (WriteAddr + count), (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
}
else
{
/* Store the number of data to be written */
sEEDataNum = NumOfSingle;
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
}
}
/*!< If NumByteToWrite > sEE_PAGESIZE */
else
{
NumByteToWrite -= count;
NumOfPage = NumByteToWrite / sEE_PAGESIZE;
NumOfSingle = NumByteToWrite % sEE_PAGESIZE;
if(count != 0)
{
/* Store the number of data to be written */
sEEDataNum = count;
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
WriteAddr += count;
pBuffer += count;
}
while(NumOfPage--)
{
/* Store the number of data to be written */
sEEDataNum = sEE_PAGESIZE;
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
WriteAddr += sEE_PAGESIZE;
pBuffer += sEE_PAGESIZE;
}
if(NumOfSingle != 0)
{
/* Store the number of data to be written */
sEEDataNum = NumOfSingle;
sEE_WritePage(pBuffer, WriteAddr, (uint8_t*)(&sEEDataNum));
/* Wait transfer through DMA to be complete */
sEETimeout = sEE_LONG_TIMEOUT;
while (sEEDataNum > 0)
{
if((sEETimeout--) == 0) {sEE_TIMEOUT_UserCallback(); return;};
}
sEE_WaitEepromStandbyState();
}
}
}
}
/**
* @brief Wait for EEPROM Standby state.
*
* @note This function allows to wait and check that EEPROM has finished the
* last operation. It is mostly used after Write operation: after receiving
* the buffer to be written, the EEPROM may need additional time to actually
* perform the write operation. During this time, it doesn't answer to
* I2C packets addressed to it. Once the write operation is complete
* the EEPROM responds to its address.
*
* @param None
* @retval sEE_OK (0) if operation is correctly performed, else return value
* different from sEE_OK (0) or the timeout user callback.
*/
uint32_t sEE_WaitEepromStandbyState(void)
{
__IO uint16_t tmpSR1 = 0;
__IO uint32_t sEETrials = 0;
/*!< While the bus is busy */
sEETimeout = sEE_LONG_TIMEOUT;
while(I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_BUSY))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/* Keep looping till the slave acknowledge his address or maximum number
of trials is reached (this number is defined by sEE_MAX_TRIALS_NUMBER define
in stm322xg_eval_i2c_ee.h file) */
while (1)
{
/*!< Send START condition */
I2C_GenerateSTART(sEE_I2C, ENABLE);
/*!< Test on EV5 and clear it */
sEETimeout = sEE_FLAG_TIMEOUT;
while(!I2C_CheckEvent(sEE_I2C, I2C_EVENT_MASTER_MODE_SELECT))
{
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/*!< Send EEPROM address for write */
I2C_Send7bitAddress(sEE_I2C, sEEAddress, I2C_Direction_Transmitter);
/* Wait for ADDR flag to be set (Slave acknowledged his address) */
sEETimeout = sEE_LONG_TIMEOUT;
do
{
/* Get the current value of the SR1 register */
tmpSR1 = sEE_I2C->SR1;
/* Update the timeout value and exit if it reach 0 */
if((sEETimeout--) == 0) return sEE_TIMEOUT_UserCallback();
}
/* Keep looping till the Address is acknowledged or the AF flag is
set (address not acknowledged at time) */
while((tmpSR1 & (I2C_SR1_ADDR | I2C_SR1_AF)) == 0);
/* Check if the ADDR flag has been set */
if (tmpSR1 & I2C_SR1_ADDR)
{
/* Clear ADDR Flag by reading SR1 then SR2 registers (SR1 have already
been read) */
(void)sEE_I2C->SR2;
/*!< STOP condition */
I2C_GenerateSTOP(sEE_I2C, ENABLE);
/* Exit the function */
return sEE_OK;
}
else
{
/*!< Clear AF flag */
I2C_ClearFlag(sEE_I2C, I2C_FLAG_AF);
}
/* Check if the maximum allowed number of trials has bee reached */
if (sEETrials++ == sEE_MAX_TRIALS_NUMBER)
{
/* If the maximum number of trials has been reached, exit the function */
return sEE_TIMEOUT_UserCallback();
}
}
}
/**
* @brief This function handles the DMA Tx Channel interrupt Handler.
* @param None
* @retval None
*/
void sEE_I2C_DMA_TX_IRQHandler(void)
{
/* Check if the DMA transfer is complete */
if(DMA_GetFlagStatus(sEE_I2C_DMA_STREAM_TX, sEE_TX_DMA_FLAG_TCIF) != RESET)
{
/* Disable the DMA Tx Stream and Clear TC flag */
DMA_Cmd(sEE_I2C_DMA_STREAM_TX, DISABLE);
DMA_ClearFlag(sEE_I2C_DMA_STREAM_TX, sEE_TX_DMA_FLAG_TCIF);
/*!< Wait till all data have been physically transferred on the bus */
sEETimeout = sEE_LONG_TIMEOUT;
while(!I2C_GetFlagStatus(sEE_I2C, I2C_FLAG_BTF))
{
if((sEETimeout--) == 0) sEE_TIMEOUT_UserCallback();
}
/*!< Send STOP condition */
I2C_GenerateSTOP(sEE_I2C, ENABLE);
/* Reset the variable holding the number of data to be written */
*sEEDataWritePointer = 0;
}
}
/**
* @brief This function handles the DMA Rx Channel interrupt Handler.
* @param None
* @retval None
*/
void sEE_I2C_DMA_RX_IRQHandler(void)
{
/* Check if the DMA transfer is complete */
if(DMA_GetFlagStatus(sEE_I2C_DMA_STREAM_RX, sEE_RX_DMA_FLAG_TCIF) != RESET)
{
/*!< Send STOP Condition */
I2C_GenerateSTOP(sEE_I2C, ENABLE);
/* Disable the DMA Rx Stream and Clear TC Flag */
DMA_Cmd(sEE_I2C_DMA_STREAM_RX, DISABLE);
DMA_ClearFlag(sEE_I2C_DMA_STREAM_RX, sEE_RX_DMA_FLAG_TCIF);
/* Reset the variable holding the number of data to be read */
*sEEDataReadPointer = 0;
}
}
#ifdef USE_DEFAULT_TIMEOUT_CALLBACK
/**
* @brief Basic management of the timeout situation.
* @param None.
* @retval None.
*/
uint32_t sEE_TIMEOUT_UserCallback(void)
{
/* Block communication and all processes */
while (1)
{
}
}
#endif /* USE_DEFAULT_TIMEOUT_CALLBACK */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_i2c_ee.h
-194
View File
@@ -1,194 +0,0 @@
/**
******************************************************************************
* @file stm322xg_eval_i2c_ee.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the
* stm322xg_eval_i2c_ee.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_I2C_EE_H
#define __STM322xG_EVAL_I2C_EE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_I2C_EE
* @{
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Exported_Constants
* @{
*/
/* Uncomment the following line to use the default sEE_TIMEOUT_UserCallback()
function implemented in stm32_evel_i2c_ee.c file.
sEE_TIMEOUT_UserCallback() function is called whenever a timeout condition
occure during communication (waiting on an event that doesn't occur, bus
errors, busy devices ...). */
/* #define USE_DEFAULT_TIMEOUT_CALLBACK */
#if !defined (sEE_M24C08) && !defined (sEE_M24C64_32)
/* Use the defines below the choose the EEPROM type */
/* #define sEE_M24C08*/ /* Support the device: M24C08. */
/* note: Could support: M24C01, M24C02, M24C04 and M24C16 if the blocks and
HW address are correctly defined*/
#define sEE_M24C64_32 /* Support the devices: M24C32 and M24C64 */
#endif
#ifdef sEE_M24C64_32
/* For M24C32 and M24C64 devices, E0,E1 and E2 pins are all used for device
address selection (ne need for additional address lines). According to the
Harware connection on the board (on STM322xG-EVAL board E0 = E1 = E2 = 0) */
#define sEE_HW_ADDRESS 0xA0 /* E0 = E1 = E2 = 0 */
#elif defined (sEE_M24C08)
/* The M24C08W contains 4 blocks (128byte each) with the adresses below: E2 = 0
EEPROM Addresses defines */
#define sEE_Block0_ADDRESS 0xA0 /* E2 = 0 */
/*#define sEE_Block1_ADDRESS 0xA2*/ /* E2 = 0 */
/*#define sEE_Block2_ADDRESS 0xA4*/ /* E2 = 0 */
/*#define sEE_Block3_ADDRESS 0xA6*/ /* E2 = 0 */
#endif /* sEE_M24C64_32 */
/* I2C clock speed configuration (in Hz)
WARNING:
Make sure that this define is not already declared in other files (ie.
stm322xg_eval.h file). It can be used in parallel by other modules. */
#ifndef I2C_SPEED
#define I2C_SPEED 100000
#endif /* I2C_SPEED */
#define I2C_SLAVE_ADDRESS7 0xA0
#if defined (sEE_M24C08)
#define sEE_PAGESIZE 16
#elif defined (sEE_M24C64_32)
#define sEE_PAGESIZE 32
#endif
/* Maximum Timeout values for flags and events waiting loops. These timeouts are
not based on accurate values, they just guarantee that the application will
not remain stuck if the I2C communication is corrupted.
You may modify these timeout values depending on CPU frequency and application
conditions (interrupts routines ...). */
#define sEE_FLAG_TIMEOUT ((uint32_t)0x1000)
#define sEE_LONG_TIMEOUT ((uint32_t)(10 * sEE_FLAG_TIMEOUT))
/* Maximum number of trials for sEE_WaitEepromStandbyState() function */
#define sEE_MAX_TRIALS_NUMBER 300
/* Defintions for the state of the DMA transfer */
#define sEE_STATE_READY 0
#define sEE_STATE_BUSY 1
#define sEE_STATE_ERROR 2
#define sEE_OK 0
#define sEE_FAIL 1
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_I2C_EE_Exported_Functions
* @{
*/
void sEE_DeInit(void);
void sEE_Init(void);
uint32_t sEE_ReadBuffer(uint8_t* pBuffer, uint16_t ReadAddr, uint16_t* NumByteToRead);
uint32_t sEE_WritePage(uint8_t* pBuffer, uint16_t WriteAddr, uint8_t* NumByteToWrite);
void sEE_WriteBuffer(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t NumByteToWrite);
uint32_t sEE_WaitEepromStandbyState(void);
/* USER Callbacks: These are functions for which prototypes only are declared in
EEPROM driver and that should be implemented into user applicaiton. */
/* sEE_TIMEOUT_UserCallback() function is called whenever a timeout condition
occure during communication (waiting on an event that doesn't occur, bus
errors, busy devices ...).
You can use the default timeout callback implementation by uncommenting the
define USE_DEFAULT_TIMEOUT_CALLBACK in stm322xg_eval_i2c_ee.h file.
Typically the user implementation of this callback should reset I2C peripheral
and re-initialize communication or in worst case reset all the application. */
uint32_t sEE_TIMEOUT_UserCallback(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_I2C_EE_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_ioe.c
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/**
******************************************************************************
* @file stm322xg_eval_ioe.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the
* stm322xg_eval_ioe.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* File Info : ---------------------------------------------------------------
SUPPORTED FEATURES:
- IO Read/write : Set/Reset and Read (Polling/Interrupt)
- Joystick: config and Read (Polling/Interrupt)
- Touch Screen Features: Single point mode (Polling/Interrupt)
- TempSensor Feature: accuracy not determined (Polling).
UNSUPPORTED FEATURES:
- Row ADC Feature is not supported (not implemented on STM322xG_EVAL board)
----------------------------------------------------------------------------*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_IOE_H
#define __STM322xG_EVAL_IOE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @defgroup STM322xG_EVAL_IOE
* @{
*/
/** @defgroup STM322xG_EVAL_IOE_Exported_Types
* @{
*/
/**
* @brief Touch Screen Information structure
*/
typedef struct
{
uint16_t TouchDetected;
uint16_t X;
uint16_t Y;
uint16_t Z;
}TS_STATE;
/**
* @brief Joystick State definitions
*/
#ifndef __STM322xG_EVAL_H
typedef enum
{
JOY_NONE = 0,
JOY_SEL = 1,
JOY_DOWN = 2,
JOY_LEFT = 3,
JOY_RIGHT = 4,
JOY_UP = 5
} JOYState_TypeDef
;
#endif /* __STM322xG_EVAL_H */
/**
* @brief IO_Expander Error codes
*/
typedef enum
{
IOE_OK = 0,
IOE_FAILURE,
IOE_TIMEOUT,
PARAM_ERROR,
IOE1_NOT_OPERATIONAL,
IOE2_NOT_OPERATIONAL
}IOE_Status_TypDef;
/**
* @brief IO bit values
*/
typedef enum
{
BitReset = 0,
BitSet = 1
}IOE_BitValue_TypeDef;
/**
* @brief IOE DMA Direction
*/
typedef enum
{
IOE_DMA_TX = 0,
IOE_DMA_RX = 1
}IOE_DMADirection_TypeDef;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_IOE_Exported_Constants
* @{
*/
/**
* @brief Uncomment the line below to enable verfying each written byte in write
* operation. The I2C_WriteDeviceRegister() function will then compare the
* written and read data and return error status if a mismatch occurs.
*/
/* #define VERIFY_WRITTENDATA */
/**
* @brief Uncomment the line below if you want to use user timeout callback.
* Function prototypes is declared in this file but function body may be
* implemented into user application.
*/
/* #define USE_TIMEOUT_USER_CALLBACK */
/**
* @brief Uncomment the line below if you want to use user defined Delay function
* (for precise timing), otherwise default _delay_ function defined within
* this driver is used (less precise timing).
*/
/* #define USE_Delay */
#ifdef USE_Delay
#include "main.h"
#define _delay_ Delay /* !< User can provide more timing precise _delay_ function
(with 10ms time base), using SysTick for example */
#else
#define _delay_ delay /* !< Default _delay_ function with less precise timing */
#endif
/*------------------------------------------------------------------------------
Hardware Configuration
------------------------------------------------------------------------------*/
/**
* @brief I2C port definitions
*/
#define IOE_I2C I2C1
#define IOE_I2C_CLK RCC_APB1Periph_I2C1
#define IOE_I2C_SCL_PIN GPIO_Pin_6
#define IOE_I2C_SCL_GPIO_PORT GPIOB
#define IOE_I2C_SCL_GPIO_CLK RCC_AHB1Periph_GPIOB
#define IOE_I2C_SCL_SOURCE GPIO_PinSource6
#define IOE_I2C_SCL_AF GPIO_AF_I2C1
#define IOE_I2C_SDA_PIN GPIO_Pin_9
#define IOE_I2C_SDA_GPIO_PORT GPIOB
#define IOE_I2C_SDA_GPIO_CLK RCC_AHB1Periph_GPIOB
#define IOE_I2C_SDA_SOURCE GPIO_PinSource9
#define IOE_I2C_SDA_AF GPIO_AF_I2C1
#define IOE_I2C_DR ((uint32_t)0x40005410)
/* I2C clock speed configuration (in Hz)
WARNING:
Make sure that this define is not already declared in other files (ie.
stm322xg_eval.h file). It can be used in parallel by other modules. */
#ifndef I2C_SPEED
#define I2C_SPEED 100000
#endif /* I2C_SPEED */
/**
* @brief IOE DMA definitions
*/
#define IOE_DMA_CLK RCC_AHB1Periph_DMA1
#define IOE_DMA_CHANNEL DMA_Channel_1
#ifndef IOE_DMA_TX_STREAM
#define IOE_DMA_TX_STREAM DMA1_Stream6
#endif /* IOE_DMA_TX_STREAM */
#ifndef IOE_DMA_TX_TCFLAG
#define IOE_DMA_TX_TCFLAG DMA_FLAG_TCIF6
#endif /* IOE_DMA_TX_TCFLAG */
#ifndef IOE_DMA_RX_STREAM
#define IOE_DMA_RX_STREAM DMA1_Stream0
#endif /* IOE_DMA_RX_STREAM */
#ifndef IOE_DMA_RX_TCFLAG
#define IOE_DMA_RX_TCFLAG DMA_FLAG_TCIF0
#endif /* IOE_DMA_RX_TCFLAG */
/**
* @brief IO Expander Interrupt line on EXTI
*/
#define IOE_IT_PIN GPIO_Pin_2
#define IOE_IT_GPIO_PORT GPIOI
#define IOE_IT_GPIO_CLK RCC_AHB1Periph_GPIOI
#define IOE_IT_EXTI_PORT_SOURCE EXTI_PortSourceGPIOI
#define IOE_IT_EXTI_PIN_SOURCE EXTI_PinSource2
#define IOE_IT_EXTI_LINE EXTI_Line2
#define IOE_IT_EXTI_IRQn EXTI2_IRQn
/**
* @brief Eval Board IO Pins definition
*/
#define AUDIO_RESET_PIN IO_Pin_2 /* IO_Exapnader_2 */ /* Output */
#define MII_INT_PIN IO_Pin_0 /* IO_Exapnader_2 */ /* Output */
#define VBAT_DIV_PIN IO_Pin_0 /* IO_Exapnader_1 */ /* Output */
#define MEMS_INT1_PIN IO_Pin_3 /* IO_Exapnader_1 */ /* Input */
#define MEMS_INT2_PIN IO_Pin_2 /* IO_Exapnader_1 */ /* Input */
/**
* @brief Eval Board both IO Exapanders Pins definition
*/
#define IO1_IN_ALL_PINS (uint32_t)(MEMS_INT1_PIN | MEMS_INT2_PIN)
#define IO2_IN_ALL_PINS (uint32_t)(JOY_IO_PINS)
#define IO1_OUT_ALL_PINS (uint32_t)(VBAT_DIV_PIN)
#define IO2_OUT_ALL_PINS (uint32_t)(AUDIO_RESET_PIN | MII_INT_PIN)
/**
* @brief The 7 bits IO Expanders adresses and chip IDs
*/
#define IOE_1_ADDR 0x82
#define IOE_2_ADDR 0x88
#define STMPE811_ID 0x0811
/*------------------------------------------------------------------------------
Functional and Interrupt Management
------------------------------------------------------------------------------*/
/**
* @brief IO Expander Functionalities definitions
*/
#define IOE_ADC_FCT 0x01
#define IOE_TS_FCT 0x02
#define IOE_IO_FCT 0x04
#define IOE_TEMPSENS_FCT 0x08
/**
* @brief Interrupt source configuration definitons
*/
#define IOE_ITSRC_TSC 0x01 /* IO_Exapnder 1 */
#define IOE_ITSRC_INMEMS 0x02 /* IO_Exapnder 1 */
#define IOE_ITSRC_JOYSTICK 0x04 /* IO_Exapnder 2 */
#define IOE_ITSRC_TEMPSENS 0x08 /* IO_Exapnder 2 */
/**
* @brief Glaobal Interrupts definitions
*/
#define IOE_GIT_GPIO 0x80
#define IOE_GIT_ADC 0x40
#define IOE_GIT_TEMP 0x20
#define IOE_GIT_FE 0x10
#define IOE_GIT_FF 0x08
#define IOE_GIT_FOV 0x04
#define IOE_GIT_FTH 0x02
#define IOE_GIT_TOUCH 0x01
/*------------------------------------------------------------------------------
STMPE811 device register definition
------------------------------------------------------------------------------*/
/**
* @brief Identification registers
*/
#define IOE_REG_CHP_ID 0x00
#define IOE_REG_ID_VER 0x02
/**
* @brief General Control Registers
*/
#define IOE_REG_SYS_CTRL1 0x03
#define IOE_REG_SYS_CTRL2 0x04
#define IOE_REG_SPI_CFG 0x08
/**
* @brief Interrupt Control register
*/
#define IOE_REG_INT_CTRL 0x09
#define IOE_REG_INT_EN 0x0A
#define IOE_REG_INT_STA 0x0B
#define IOE_REG_GPIO_INT_EN 0x0C
#define IOE_REG_GPIO_INT_STA 0x0D
/**
* @brief GPIO Registers
*/
#define IOE_REG_GPIO_SET_PIN 0x10
#define IOE_REG_GPIO_CLR_PIN 0x11
#define IOE_REG_GPIO_MP_STA 0x12
#define IOE_REG_GPIO_DIR 0x13
#define IOE_REG_GPIO_ED 0x14
#define IOE_REG_GPIO_RE 0x15
#define IOE_REG_GPIO_FE 0x16
#define IOE_REG_GPIO_AF 0x17
/**
* @brief ADC Registers
*/
#define IOE_REG_ADC_INT_EN 0x0E
#define IOE_REG_ADC_INT_STA 0x0F
#define IOE_REG_ADC_CTRL1 0x20
#define IOE_REG_ADC_CTRL2 0x21
#define IOE_REG_ADC_CAPT 0x22
#define IOE_REG_ADC_DATA_CH0 0x30 /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH1 0x32 /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH2 0x34 /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH3 0x36 /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH4 0x38 /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH5 0x3A /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH6 0x3B /* 16-Bit register */
#define IOE_REG_ADC_DATA_CH7 0x3C /* 16-Bit register */
/**
* @brief TouchScreen Registers
*/
#define IOE_REG_TSC_CTRL 0x40
#define IOE_REG_TSC_CFG 0x41
#define IOE_REG_WDM_TR_X 0x42
#define IOE_REG_WDM_TR_Y 0x44
#define IOE_REG_WDM_BL_X 0x46
#define IOE_REG_WDM_BL_Y 0x48
#define IOE_REG_FIFO_TH 0x4A
#define IOE_REG_FIFO_STA 0x4B
#define IOE_REG_FIFO_SIZE 0x4C
#define IOE_REG_TSC_DATA_X 0x4D
#define IOE_REG_TSC_DATA_Y 0x4F
#define IOE_REG_TSC_DATA_Z 0x51
#define IOE_REG_TSC_DATA_XYZ 0x52
#define IOE_REG_TSC_FRACT_XYZ 0x56
#define IOE_REG_TSC_DATA 0x57
#define IOE_REG_TSC_I_DRIVE 0x58
#define IOE_REG_TSC_SHIELD 0x59
/**
* @brief Temperature Sensor registers
*/
#define IOE_REG_TEMP_CTRL 0x60
#define IOE_REG_TEMP_DATA 0x61
#define IOE_REG_TEMP_TH 0x62
/*------------------------------------------------------------------------------
Functions parameters defines
------------------------------------------------------------------------------*/
/**
* @brief Touch Screen Pins definition
*/
#define TOUCH_YD IO_Pin_1 /* IO_Exapnader_1 */ /* Input */
#define TOUCH_XD IO_Pin_2 /* IO_Exapnader_1 */ /* Input */
#define TOUCH_YU IO_Pin_3 /* IO_Exapnader_1 */ /* Input */
#define TOUCH_XU IO_Pin_4 /* IO_Exapnader_1 */ /* Input */
#define TOUCH_IO_ALL (uint32_t)(IO_Pin_1 | IO_Pin_2 | IO_Pin_3 | IO_Pin_4)
/**
* @brief JOYSTICK Pins definition
*/
#define JOY_IO_SEL IO_Pin_7
#define JOY_IO_DOWN IO_Pin_6
#define JOY_IO_LEFT IO_Pin_5
#define JOY_IO_RIGHT IO_Pin_4
#define JOY_IO_UP IO_Pin_3
#define JOY_IO_NONE JOY_IO_PINS
#define JOY_IO_PINS (uint32_t)(IO_Pin_3 | IO_Pin_4 | IO_Pin_5 | IO_Pin_6 | IO_Pin_7)
/**
* @brief IO Pins
*/
#define IO_Pin_0 0x01
#define IO_Pin_1 0x02
#define IO_Pin_2 0x04
#define IO_Pin_3 0x08
#define IO_Pin_4 0x10
#define IO_Pin_5 0x20
#define IO_Pin_6 0x40
#define IO_Pin_7 0x80
#define IO_Pin_ALL 0xFF
/**
* @brief IO Pin directions
*/
#define Direction_IN 0x00
#define Direction_OUT 0x01
/**
* @brief Interrupt Line output parameters
*/
#define Polarity_Low 0x00
#define Polarity_High 0x04
#define Type_Level 0x00
#define Type_Edge 0x02
/**
* @brief IO Interrupts
*/
#define IO_IT_0 0x01
#define IO_IT_1 0x02
#define IO_IT_2 0x04
#define IO_IT_3 0x08
#define IO_IT_4 0x10
#define IO_IT_5 0x20
#define IO_IT_6 0x40
#define IO_IT_7 0x80
#define ALL_IT 0xFF
#define IOE_JOY_IT (uint8_t)(IO_IT_3 | IO_IT_4 | IO_IT_5 | IO_IT_6 | IO_IT_7)
#define IOE_TS_IT (uint8_t)(IO_IT_0 | IO_IT_1 | IO_IT_2)
#define IOE_INMEMS_IT (uint8_t)(IO_IT_2 | IO_IT_3)
/**
* @brief Edge detection value
*/
#define EDGE_FALLING 0x01
#define EDGE_RISING 0x02
/**
* @brief Global interrupt Enable bit
*/
#define IOE_GIT_EN 0x01
/**
* @}
*/
/** @defgroup STM322xG_EVAL_IOE_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_IOE_Exported_Functions
* @{
*/
/**
* @brief Configuration and initialization functions
*/
uint8_t IOE_Config(void);
uint8_t IOE_ITConfig(uint32_t IOE_ITSRC_Source);
/**
* @brief Timeout user callback function. This function is called when a timeout
* condition occurs during communication with IO Expander. Only protoype
* of this function is decalred in IO Expander driver. Its implementation
* may be done into user application. This function may typically stop
* current operations and reset the I2C peripheral and IO Expander.
* To enable this function use uncomment the define USE_TIMEOUT_USER_CALLBACK
* at the top of this file.
*/
#ifdef USE_TIMEOUT_USER_CALLBACK
uint8_t IOE_TimeoutUserCallback(void);
#else
#define IOE_TimeoutUserCallback() IOE_TIMEOUT
#endif /* USE_TIMEOUT_USER_CALLBACK */
/**
* @brief IO pins control functions
*/
uint8_t IOE_WriteIOPin(uint8_t IO_Pin, IOE_BitValue_TypeDef BitVal);
uint8_t IOE_ReadIOPin(uint32_t IO_Pin);
JOYState_TypeDef
IOE_JoyStickGetState(void);
/**
* @brief Touch Screen controller functions
*/
TS_STATE* IOE_TS_GetState(void);
/**
* @brief Interrupts Mangement functions
*/
FlagStatus IOE_GetGITStatus(uint8_t DeviceAddr, uint8_t Global_IT);
uint8_t IOE_ClearGITPending(uint8_t DeviceAddr, uint8_t IO_IT);
FlagStatus IOE_GetIOITStatus(uint8_t DeviceAddr, uint8_t IO_IT);
uint8_t IOE_ClearIOITPending(uint8_t DeviceAddr, uint8_t IO_IT);
/**
* @brief Temperature Sensor functions
*/
uint32_t IOE_TempSens_GetData(void);
/**
* @brief IO-Expander Control functions
*/
uint8_t IOE_IsOperational(uint8_t DeviceAddr);
uint8_t IOE_Reset(uint8_t DeviceAddr);
uint16_t IOE_ReadID(uint8_t DeviceAddr);
uint8_t IOE_FnctCmd(uint8_t DeviceAddr, uint8_t Fct, FunctionalState NewState);
uint8_t IOE_IOPinConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Direction);
uint8_t IOE_GITCmd(uint8_t DeviceAddr, FunctionalState NewState);
uint8_t IOE_GITConfig(uint8_t DeviceAddr, uint8_t Global_IT, FunctionalState NewState);
uint8_t IOE_IOITConfig(uint8_t DeviceAddr, uint8_t IO_IT, FunctionalState NewState);
/**
* @brief Low Layer functions
*/
uint8_t IOE_TS_Config(void);
uint8_t IOE_TempSens_Config(void);
uint8_t IOE_IOAFConfig(uint8_t DeviceAddr, uint8_t IO_Pin, FunctionalState NewState);
uint8_t IOE_IOEdgeConfig(uint8_t DeviceAddr, uint8_t IO_Pin, uint8_t Edge);
uint8_t IOE_ITOutConfig(uint8_t Polarity, uint8_t Type);
uint8_t I2C_WriteDeviceRegister(uint8_t DeviceAddr, uint8_t RegisterAddr, uint8_t RegisterValue);
uint8_t I2C_ReadDeviceRegister(uint8_t DeviceAddr, uint8_t RegisterAddr);
uint16_t I2C_ReadDataBuffer(uint8_t DeviceAddr, uint8_t RegisterAddr);
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_IOE_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_lcd.c
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/**
******************************************************************************
* @file stm322xg_eval_lcd.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the stm322xg_eval_lcd.c
* driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_LCD_H
#define __STM322xG_EVAL_LCD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
#include "../Common/fonts.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_LCD
* @{
*/
/** @defgroup STM322xG_EVAL_LCD_Exported_Types
* @{
*/
typedef struct
{
int16_t X;
int16_t Y;
} Point, * pPoint;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LCD_Exported_Constants
* @{
*/
/**
* @brief Uncomment the line below if you want to use user defined Delay function
* (for precise timing), otherwise default _delay_ function defined within
* this driver is used (less precise timing).
*/
/* #define USE_Delay */
#ifdef USE_Delay
#include "main.h"
#define _delay_ Delay /* !< User can provide more timing precise _delay_ function
(with 10ms time base), using SysTick for example */
#else
#define _delay_ delay /* !< Default _delay_ function with less precise timing */
#endif
/**
* @brief LCD Registers
*/
#define LCD_REG_0 0x00
#define LCD_REG_1 0x01
#define LCD_REG_2 0x02
#define LCD_REG_3 0x03
#define LCD_REG_4 0x04
#define LCD_REG_5 0x05
#define LCD_REG_6 0x06
#define LCD_REG_7 0x07
#define LCD_REG_8 0x08
#define LCD_REG_9 0x09
#define LCD_REG_10 0x0A
#define LCD_REG_12 0x0C
#define LCD_REG_13 0x0D
#define LCD_REG_14 0x0E
#define LCD_REG_15 0x0F
#define LCD_REG_16 0x10
#define LCD_REG_17 0x11
#define LCD_REG_18 0x12
#define LCD_REG_19 0x13
#define LCD_REG_20 0x14
#define LCD_REG_21 0x15
#define LCD_REG_22 0x16
#define LCD_REG_23 0x17
#define LCD_REG_24 0x18
#define LCD_REG_25 0x19
#define LCD_REG_26 0x1A
#define LCD_REG_27 0x1B
#define LCD_REG_28 0x1C
#define LCD_REG_29 0x1D
#define LCD_REG_30 0x1E
#define LCD_REG_31 0x1F
#define LCD_REG_32 0x20
#define LCD_REG_33 0x21
#define LCD_REG_34 0x22
#define LCD_REG_36 0x24
#define LCD_REG_37 0x25
#define LCD_REG_40 0x28
#define LCD_REG_41 0x29
#define LCD_REG_43 0x2B
#define LCD_REG_45 0x2D
#define LCD_REG_48 0x30
#define LCD_REG_49 0x31
#define LCD_REG_50 0x32
#define LCD_REG_51 0x33
#define LCD_REG_52 0x34
#define LCD_REG_53 0x35
#define LCD_REG_54 0x36
#define LCD_REG_55 0x37
#define LCD_REG_56 0x38
#define LCD_REG_57 0x39
#define LCD_REG_58 0x3A
#define LCD_REG_59 0x3B
#define LCD_REG_60 0x3C
#define LCD_REG_61 0x3D
#define LCD_REG_62 0x3E
#define LCD_REG_63 0x3F
#define LCD_REG_64 0x40
#define LCD_REG_65 0x41
#define LCD_REG_66 0x42
#define LCD_REG_67 0x43
#define LCD_REG_68 0x44
#define LCD_REG_69 0x45
#define LCD_REG_70 0x46
#define LCD_REG_71 0x47
#define LCD_REG_72 0x48
#define LCD_REG_73 0x49
#define LCD_REG_74 0x4A
#define LCD_REG_75 0x4B
#define LCD_REG_76 0x4C
#define LCD_REG_77 0x4D
#define LCD_REG_78 0x4E
#define LCD_REG_79 0x4F
#define LCD_REG_80 0x50
#define LCD_REG_81 0x51
#define LCD_REG_82 0x52
#define LCD_REG_83 0x53
#define LCD_REG_96 0x60
#define LCD_REG_97 0x61
#define LCD_REG_106 0x6A
#define LCD_REG_118 0x76
#define LCD_REG_128 0x80
#define LCD_REG_129 0x81
#define LCD_REG_130 0x82
#define LCD_REG_131 0x83
#define LCD_REG_132 0x84
#define LCD_REG_133 0x85
#define LCD_REG_134 0x86
#define LCD_REG_135 0x87
#define LCD_REG_136 0x88
#define LCD_REG_137 0x89
#define LCD_REG_139 0x8B
#define LCD_REG_140 0x8C
#define LCD_REG_141 0x8D
#define LCD_REG_143 0x8F
#define LCD_REG_144 0x90
#define LCD_REG_145 0x91
#define LCD_REG_146 0x92
#define LCD_REG_147 0x93
#define LCD_REG_148 0x94
#define LCD_REG_149 0x95
#define LCD_REG_150 0x96
#define LCD_REG_151 0x97
#define LCD_REG_152 0x98
#define LCD_REG_153 0x99
#define LCD_REG_154 0x9A
#define LCD_REG_157 0x9D
#define LCD_REG_192 0xC0
#define LCD_REG_193 0xC1
#define LCD_REG_229 0xE5
/**
* @brief LCD color
*/
#define LCD_COLOR_WHITE 0xFFFF
#define LCD_COLOR_BLACK 0x0000
#define LCD_COLOR_GREY 0xF7DE
#define LCD_COLOR_BLUE 0x001F
#define LCD_COLOR_BLUE2 0x051F
#define LCD_COLOR_RED 0xF800
#define LCD_COLOR_MAGENTA 0xF81F
#define LCD_COLOR_GREEN 0x07E0
#define LCD_COLOR_CYAN 0x7FFF
#define LCD_COLOR_YELLOW 0xFFE0
/**
* @brief LCD Lines depending on the chosen fonts.
*/
#define LCD_LINE_0 LINE(0)
#define LCD_LINE_1 LINE(1)
#define LCD_LINE_2 LINE(2)
#define LCD_LINE_3 LINE(3)
#define LCD_LINE_4 LINE(4)
#define LCD_LINE_5 LINE(5)
#define LCD_LINE_6 LINE(6)
#define LCD_LINE_7 LINE(7)
#define LCD_LINE_8 LINE(8)
#define LCD_LINE_9 LINE(9)
#define LCD_LINE_10 LINE(10)
#define LCD_LINE_11 LINE(11)
#define LCD_LINE_12 LINE(12)
#define LCD_LINE_13 LINE(13)
#define LCD_LINE_14 LINE(14)
#define LCD_LINE_15 LINE(15)
#define LCD_LINE_16 LINE(16)
#define LCD_LINE_17 LINE(17)
#define LCD_LINE_18 LINE(18)
#define LCD_LINE_19 LINE(19)
#define LCD_LINE_20 LINE(20)
#define LCD_LINE_21 LINE(21)
#define LCD_LINE_22 LINE(22)
#define LCD_LINE_23 LINE(23)
#define LCD_LINE_24 LINE(24)
#define LCD_LINE_25 LINE(25)
#define LCD_LINE_26 LINE(26)
#define LCD_LINE_27 LINE(27)
#define LCD_LINE_28 LINE(28)
#define LCD_LINE_29 LINE(29)
/**
* @brief LCD default font
*/
#define LCD_DEFAULT_FONT Font16x24
/**
* @brief LCD Direction
*/
#define LCD_DIR_HORIZONTAL 0x0000
#define LCD_DIR_VERTICAL 0x0001
/**
* @brief LCD Size (Width and Height)
*/
#define LCD_PIXEL_WIDTH 0x0140
#define LCD_PIXEL_HEIGHT 0x00F0
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LCD_Exported_Macros
* @{
*/
#define ASSEMBLE_RGB(R ,G, B) ((((R)& 0xF8) << 8) | (((G) & 0xFC) << 3) | (((B) & 0xF8) >> 3))
/**
* @}
*/
/** @defgroup STM322xG_EVAL_LCD_Exported_Functions
* @{
*/
/** @defgroup
* @{
*/
void LCD_DeInit(void);
void STM322xG_LCD_Init(void);
void LCD_SetColors(__IO uint16_t _TextColor, __IO uint16_t _BackColor);
void LCD_GetColors(__IO uint16_t *_TextColor, __IO uint16_t *_BackColor);
void LCD_SetTextColor(__IO uint16_t Color);
void LCD_SetBackColor(__IO uint16_t Color);
void LCD_ClearLine(uint16_t Line);
void LCD_Clear(uint16_t Color);
void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos);
void LCD_DrawChar(uint16_t Xpos, uint16_t Ypos, const uint16_t *c);
void LCD_DisplayChar(uint16_t Line, uint16_t Column, uint8_t Ascii);
void LCD_SetFont(sFONT *fonts);
sFONT *LCD_GetFont(void);
void LCD_DisplayStringLine(uint16_t Line, uint8_t *ptr);
void LCD_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width);
void LCD_WindowModeDisable(void);
void LCD_DrawLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length, uint8_t Direction);
void LCD_DrawRect(uint16_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width);
void LCD_DrawCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius);
void LCD_DrawMonoPict(const uint32_t *Pict);
void LCD_WriteBMP(uint32_t BmpAddress);
void LCD_DrawUniLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
void LCD_DrawFullRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
void LCD_DrawFullCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius);
void LCD_PolyLine(pPoint Points, uint16_t PointCount);
void LCD_PolyLineRelative(pPoint Points, uint16_t PointCount);
void LCD_ClosedPolyLine(pPoint Points, uint16_t PointCount);
void LCD_ClosedPolyLineRelative(pPoint Points, uint16_t PointCount);
void LCD_FillPolyLine(pPoint Points, uint16_t PointCount);
/**
* @}
*/
/** @defgroup
* @{
*/
void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue);
uint16_t LCD_ReadReg(uint8_t LCD_Reg);
void LCD_WriteRAM_Prepare(void);
void LCD_WriteRAM(uint16_t RGB_Code);
uint16_t LCD_ReadRAM(void);
void LCD_PowerOn(void);
void LCD_DisplayOn(void);
void LCD_DisplayOff(void);
/**
* @}
*/
/** @defgroup
* @{
*/
void LCD_CtrlLinesConfig(void);
void LCD_FSMCConfig(void);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_LCD_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Utilities/STM32_EVAL/STM322xG_EVAL/stm322xg_eval_sdio_sd.c
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/**
******************************************************************************
* @file stm322xg_eval_sdio_sd.h
* @author MCD Application Team
* @version V5.0.3
* @date 09-March-2012
* @brief This file contains all the functions prototypes for the SD Card
* stm322xg_eval_sdio_sd driver firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM322xG_EVAL_SDIO_SD_H
#define __STM322xG_EVAL_SDIO_SD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm322xg_eval.h"
/** @addtogroup Utilities
* @{
*/
/** @addtogroup STM32_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL
* @{
*/
/** @addtogroup STM322xG_EVAL_SDIO_SD
* @{
*/
/** @defgroup STM322xG_EVAL_SDIO_SD_Exported_Types
* @{
*/
typedef enum
{
/**
* @brief SDIO specific error defines
*/
SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
SD_DATA_CRC_FAIL = (2), /*!< Data bock sent/received (CRC check Failed) */
SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
SD_DATA_TIMEOUT = (4), /*!< Data time out */
SD_TX_UNDERRUN = (5), /*!< Transmit FIFO under-run */
SD_RX_OVERRUN = (6), /*!< Receive FIFO over-run */
SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in widE bus mode */
SD_CMD_OUT_OF_RANGE = (8), /*!< CMD's argument was out of range.*/
SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs.*/
SD_BAD_ERASE_PARAM = (12), /*!< An Invalid selection for erase groups */
SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
SD_CC_ERROR = (18), /*!< Internal card controller error */
SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or Unknown error */
SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
SD_WP_ERASE_SKIP = (23), /*!< only partial address space was erased */
SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
SD_INVALID_VOLTRANGE = (27),
SD_ADDR_OUT_OF_RANGE = (28),
SD_SWITCH_ERROR = (29),
SD_SDIO_DISABLED = (30),
SD_SDIO_FUNCTION_BUSY = (31),
SD_SDIO_FUNCTION_FAILED = (32),
SD_SDIO_UNKNOWN_FUNCTION = (33),
/**
* @brief Standard error defines
*/
SD_INTERNAL_ERROR,
SD_NOT_CONFIGURED,
SD_REQUEST_PENDING,
SD_REQUEST_NOT_APPLICABLE,
SD_INVALID_PARAMETER,
SD_UNSUPPORTED_FEATURE,
SD_UNSUPPORTED_HW,
SD_ERROR,
SD_OK = 0
} SD_Error;
/**
* @brief SDIO Transfer state
*/
typedef enum
{
SD_TRANSFER_OK = 0,
SD_TRANSFER_BUSY = 1,
SD_TRANSFER_ERROR
} SDTransferState;
/**
* @brief SD Card States
*/
typedef enum
{
SD_CARD_READY = ((uint32_t)0x00000001),
SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002),
SD_CARD_STANDBY = ((uint32_t)0x00000003),
SD_CARD_TRANSFER = ((uint32_t)0x00000004),
SD_CARD_SENDING = ((uint32_t)0x00000005),
SD_CARD_RECEIVING = ((uint32_t)0x00000006),
SD_CARD_PROGRAMMING = ((uint32_t)0x00000007),
SD_CARD_DISCONNECTED = ((uint32_t)0x00000008),
SD_CARD_ERROR = ((uint32_t)0x000000FF)
}SDCardState;
/**
* @brief Card Specific Data: CSD Register
*/
typedef struct
{
__IO uint8_t CSDStruct; /*!< CSD structure */
__IO uint8_t SysSpecVersion; /*!< System specification version */
__IO uint8_t Reserved1; /*!< Reserved */
__IO uint8_t TAAC; /*!< Data read access-time 1 */
__IO uint8_t NSAC; /*!< Data read access-time 2 in CLK cycles */
__IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
__IO uint16_t CardComdClasses; /*!< Card command classes */
__IO uint8_t RdBlockLen; /*!< Max. read data block length */
__IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
__IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
__IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
__IO uint8_t DSRImpl; /*!< DSR implemented */
__IO uint8_t Reserved2; /*!< Reserved */
__IO uint32_t DeviceSize; /*!< Device Size */
__IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
__IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
__IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
__IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
__IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
__IO uint8_t EraseGrSize; /*!< Erase group size */
__IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
__IO uint8_t WrProtectGrSize; /*!< Write protect group size */
__IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
__IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
__IO uint8_t WrSpeedFact; /*!< Write speed factor */
__IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
__IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
__IO uint8_t Reserved3; /*!< Reserded */
__IO uint8_t ContentProtectAppli; /*!< Content protection application */
__IO uint8_t FileFormatGrouop; /*!< File format group */
__IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
__IO uint8_t PermWrProtect; /*!< Permanent write protection */
__IO uint8_t TempWrProtect; /*!< Temporary write protection */
__IO uint8_t FileFormat; /*!< File Format */
__IO uint8_t ECC; /*!< ECC code */
__IO uint8_t CSD_CRC; /*!< CSD CRC */
__IO uint8_t Reserved4; /*!< always 1*/
} SD_CSD;
/**
* @brief Card Identification Data: CID Register
*/
typedef struct
{
__IO uint8_t ManufacturerID; /*!< ManufacturerID */
__IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
__IO uint32_t ProdName1; /*!< Product Name part1 */
__IO uint8_t ProdName2; /*!< Product Name part2*/
__IO uint8_t ProdRev; /*!< Product Revision */
__IO uint32_t ProdSN; /*!< Product Serial Number */
__IO uint8_t Reserved1; /*!< Reserved1 */
__IO uint16_t ManufactDate; /*!< Manufacturing Date */
__IO uint8_t CID_CRC; /*!< CID CRC */
__IO uint8_t Reserved2; /*!< always 1 */
} SD_CID;
/**
* @brief SD Card Status
*/
typedef struct
{
__IO uint8_t DAT_BUS_WIDTH;
__IO uint8_t SECURED_MODE;
__IO uint16_t SD_CARD_TYPE;
__IO uint32_t SIZE_OF_PROTECTED_AREA;
__IO uint8_t SPEED_CLASS;
__IO uint8_t PERFORMANCE_MOVE;
__IO uint8_t AU_SIZE;
__IO uint16_t ERASE_SIZE;
__IO uint8_t ERASE_TIMEOUT;
__IO uint8_t ERASE_OFFSET;
} SD_CardStatus;
/**
* @brief SD Card information
*/
typedef struct
{
SD_CSD SD_csd;
SD_CID SD_cid;
uint64_t CardCapacity; /*!< Card Capacity */
uint32_t CardBlockSize; /*!< Card Block Size */
uint16_t RCA;
uint8_t CardType;
} SD_CardInfo;
/**
* @}
*/
/** @defgroup STM322xG_EVAL_SDIO_SD_Exported_Constants
* @{
*/
/**
* @brief SDIO Commands Index
*/
#define SD_CMD_GO_IDLE_STATE ((uint8_t)0)
#define SD_CMD_SEND_OP_COND ((uint8_t)1)
#define SD_CMD_ALL_SEND_CID ((uint8_t)2)
#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< SDIO_SEND_REL_ADDR for SD Card */
#define SD_CMD_SET_DSR ((uint8_t)4)
#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5)
#define SD_CMD_HS_SWITCH ((uint8_t)6)
#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7)
#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8)
#define SD_CMD_SEND_CSD ((uint8_t)9)
#define SD_CMD_SEND_CID ((uint8_t)10)
#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD Card doesn't support it */
#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12)
#define SD_CMD_SEND_STATUS ((uint8_t)13)
#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15)
#define SD_CMD_SET_BLOCKLEN ((uint8_t)16)
#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17)
#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18)
#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19)
#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< SD Card doesn't support it */
#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< SD Card doesn't support it */
#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24)
#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25)
#define SD_CMD_PROG_CID ((uint8_t)26) /*!< reserved for manufacturers */
#define SD_CMD_PROG_CSD ((uint8_t)27)
#define SD_CMD_SET_WRITE_PROT ((uint8_t)28)
#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29)
#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30)
#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< To set the address of the first write
block to be erased. (For SD card only) */
#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< To set the address of the last write block of the
continuous range to be erased. (For SD card only) */
#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< To set the address of the first write block to be erased.
(For MMC card only spec 3.31) */
#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< To set the address of the last write block of the
continuous range to be erased. (For MMC card only spec 3.31) */
#define SD_CMD_ERASE ((uint8_t)38)
#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD Card doesn't support it */
#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD Card doesn't support it */
#define SD_CMD_LOCK_UNLOCK ((uint8_t)42)
#define SD_CMD_APP_CMD ((uint8_t)55)
#define SD_CMD_GEN_CMD ((uint8_t)56)
#define SD_CMD_NO_CMD ((uint8_t)64)
/**
* @brief Following commands are SD Card Specific commands.
* SDIO_APP_CMD should be sent before sending these commands.
*/
#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< For SD Card only */
#define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< For SD Card only */
#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< For SD Card only */
#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< For SD Card only */
#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< For SD Card only */
#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< For SD Card only */
#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O Card only */
#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O Card only */
/**
* @brief Following commands are SD Card Specific security commands.
* SDIO_APP_CMD should be sent before sending these commands.
*/
#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD Card only */
#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD Card only */
#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD Card only */
#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD Card only */
#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD Card only */
#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD Card only */
#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD Card only */
#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD Card only */
#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD Card only */
#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD Card only */
#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD Card only */
/* Uncomment the following line to select the SDIO Data transfer mode */
#if !defined (SD_DMA_MODE) && !defined (SD_POLLING_MODE)
#define SD_DMA_MODE ((uint32_t)0x00000000)
/*#define SD_POLLING_MODE ((uint32_t)0x00000002)*/
#endif
/**
* @brief SD detection on its memory slot
*/
#define SD_PRESENT ((uint8_t)0x01)
#define SD_NOT_PRESENT ((uint8_t)0x00)
/**
* @brief Supported SD Memory Cards
*/
#define SDIO_STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
#define SDIO_STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
#define SDIO_HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
#define SDIO_MULTIMEDIA_CARD ((uint32_t)0x00000003)
#define SDIO_SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
#define SDIO_HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
#define SDIO_SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
#define SDIO_HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
/**
* @}
*/
/** @defgroup STM322xG_EVAL_SDIO_SD_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM322xG_EVAL_SDIO_SD_Exported_Functions
* @{
*/
void SD_DeInit(void);
SD_Error SD_Init(void);
SDTransferState SD_GetStatus(void);
SDCardState SD_GetState(void);
uint8_t SD_Detect(void);
SD_Error SD_PowerON(void);
SD_Error SD_PowerOFF(void);
SD_Error SD_InitializeCards(void);
SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo);
SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus);
SD_Error SD_EnableWideBusOperation(uint32_t WideMode);
SD_Error SD_SelectDeselect(uint32_t addr);
SD_Error SD_ReadBlock(uint8_t *readbuff, uint32_t ReadAddr, uint16_t BlockSize);
SD_Error SD_ReadMultiBlocks(uint8_t *readbuff, uint32_t ReadAddr, uint16_t BlockSize, uint32_t NumberOfBlocks);
SD_Error SD_WriteBlock(uint8_t *writebuff, uint32_t WriteAddr, uint16_t BlockSize);
SD_Error SD_WriteMultiBlocks(uint8_t *writebuff, uint32_t WriteAddr, uint16_t BlockSize, uint32_t NumberOfBlocks);
SDTransferState SD_GetTransferState(void);
SD_Error SD_StopTransfer(void);
SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr);
SD_Error SD_SendStatus(uint32_t *pcardstatus);
SD_Error SD_SendSDStatus(uint32_t *psdstatus);
SD_Error SD_ProcessIRQSrc(void);
void SD_ProcessDMAIRQ(void);
SD_Error SD_WaitReadOperation(void);
SD_Error SD_WaitWriteOperation(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM322xG_EVAL_SDIO_SD_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/_htmresc/CMSIS_Logo_Final.jpg
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src/x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/stm32f2xx_stdperiph_lib_um.chm
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src/x9d/board_x9d.cpp
-2
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@@ -40,8 +40,6 @@ volatile uint32_t Tenms ; // TODO to remove everywhere / use a #define
// TODO why not here the Peri1_frequency ... (to avoid modifications in system_stm32f2xx.c)
uint32_t Master_frequency ;
extern uint32_t Peri1_frequency ;
extern uint32_t Peri2_frequency ;
#define PIN_MODE_MASK 0x0003
#define PIN_INPUT 0x0000
src/x9d/board_x9d.h
+5 -11
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@@ -38,6 +38,7 @@
#include "./STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc/stm32f2xx_rcc.h"
#include "./STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc/stm32f2xx_gpio.h"
#include "./STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/inc/stm32f2xx_spi.h"
#include "./STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h"
#include "hal.h"
@@ -46,17 +47,15 @@
#include "audio_driver.h"
#include "delays.h"
extern uint32_t Peri1_frequency ;
extern uint32_t Peri2_frequency ;
// TODO elsewhere
#if !defined(SIMU)
#define SD_IS_HC() (1)
#endif
extern "C" {
extern void init_SDcard();
extern void sdInit();
}
#define sdPoll10ms()
void sdPoll10ms();
void usbMassStorage();
@@ -71,11 +70,6 @@ extern uint8_t temperature ; // Raw temp reading
extern uint8_t maxTemperature ; // Raw temp reading
uint8_t getTemperature();
extern int32_t Card_state;
extern volatile uint32_t Card_initialized;
#define SD_ST_DATA 9
#define SD_ST_MOUNTED 10
#define SD_GET_SIZE_MB() (0)
#define SD_GET_BLOCKNR() (0)
#define SD_GET_SPEED() (0)
src/x9d/diskio.cpp
+906 -36
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@@ -31,21 +31,52 @@
*
*/
/*-----------------------------------------------------------------------*/
/* MMCv3/SDv1/SDv2 (in SPI mode) control module (C)ChaN, 2010 */
/*-----------------------------------------------------------------------*/
/* Only rcvr_spi(), xmit_spi(), sdPoll10ms() and some macros */
/* are platform dependent. */
/*-----------------------------------------------------------------------*/
#include <string.h>
#include "../FatFs/diskio.h"
#include "../FatFs/ff.h"
#include "../CoOS/kernel/CoOS.h"
/* Definitions for MMC/SDC command */
#define CMD0 (0x40+0) /* GO_IDLE_STATE */
#define CMD1 (0x40+1) /* SEND_OP_COND (MMC) */
#define ACMD41 (0xC0+41) /* SEND_OP_COND (SDC) */
#define CMD8 (0x40+8) /* SEND_IF_COND */
#define CMD9 (0x40+9) /* SEND_CSD */
#define CMD10 (0x40+10) /* SEND_CID */
#define CMD12 (0x40+12) /* STOP_TRANSMISSION */
#define ACMD13 (0xC0+13) /* SD_STATUS (SDC) */
#define CMD16 (0x40+16) /* SET_BLOCKLEN */
#define CMD17 (0x40+17) /* READ_SINGLE_BLOCK */
#define CMD18 (0x40+18) /* READ_MULTIPLE_BLOCK */
#define CMD23 (0x40+23) /* SET_BLOCK_COUNT (MMC) */
#define ACMD23 (0xC0+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
#define CMD24 (0x40+24) /* WRITE_BLOCK */
#define CMD25 (0x40+25) /* WRITE_MULTIPLE_BLOCK */
#define CMD55 (0x40+55) /* APP_CMD */
#define CMD58 (0x40+58) /* READ_OCR */
/* Card-Select Controls (Platform dependent) */
#define SELECT() GPIO_ResetBits(GPIO_SPI_SD, GPIO_Pin_SPI_SD_CS) /* MMC CS = L */
#define DESELECT() GPIO_SetBits(GPIO_SPI_SD, GPIO_Pin_SPI_SD_CS) /* MMC CS = H */
uint32_t Card_ID[4] ;
#if (_MAX_SS != 512) || (_FS_READONLY == 0) || (STM32_SD_DISK_IOCTRL_FORCE == 1)
#define STM32_SD_DISK_IOCTRL 1
#else
#define STM32_SD_DISK_IOCTRL 0
#endif
#define BOOL bool
#define FALSE false
#define TRUE true
/* Card type flags (CardType) */
#define CT_MMC 0x01
#define CT_SD1 0x02
#define CT_SD2 0x04
#define CT_SDC (CT_SD1|CT_SD2)
#define CT_BLOCK 0x08
/*uint32_t Card_ID[4] ;
uint32_t Card_SCR[2] ;
uint32_t Card_CSD[4] ;
int32_t Card_state; // = SD_ST_STARTUP ;
@@ -53,7 +84,7 @@ volatile uint32_t Card_initialized = 0;
uint32_t Sd_rca ;
uint32_t Cmd_A41_resp ;
uint8_t cardType;
uint32_t transSpeed;
uint32_t transSpeed; */
/*-----------------------------------------------------------------------*/
/* Lock / unlock functions */
@@ -80,59 +111,898 @@ int ff_del_syncobj (_SYNC_t mutex)
return 1;
}
DSTATUS disk_initialize (
BYTE drv /* Physical drive nmuber (0) */
)
static const DWORD socket_state_mask_cp = (1 << 0);
static const DWORD socket_state_mask_wp = (1 << 1);
static volatile
DSTATUS Stat = STA_NOINIT; /* Disk status */
static volatile
DWORD Timer1, Timer2; /* 100Hz decrement timers */
static
BYTE CardType; /* Card type flags */
enum speed_setting { INTERFACE_SLOW, INTERFACE_FAST };
static void interface_speed( enum speed_setting speed )
{
return RES_NOTRDY;
DWORD tmp;
tmp = SPI_SD->CR1;
if ( speed == INTERFACE_SLOW ) {
/* Set slow clock (100k-400k) */
tmp = ( tmp | SPI_BaudRatePrescaler_256 );
} else {
/* Set fast clock (depends on the CSD) */
tmp = ( tmp & ~SPI_BaudRatePrescaler_256 ) | SPI_BaudRatePrescaler_SPI_SD;
}
SPI_SD->CR1 = tmp;
}
#if SOCKET_WP_CONNECTED
/* Socket's Write-Protection Pin: high = write-protected, low = writable */
static void socket_wp_init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Configure I/O for write-protect */
RCC_AHB1PeriphClockCmd(RCC_AHBxPeriph_GPIO_WP, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_WP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_WP;
GPIO_Init(GPIO_CTL_SD, &GPIO_InitStructure);
}
static DWORD socket_is_write_protected(void)
{
return ( GPIO_ReadInputData(GPIO_CTL_SD) & GPIO_Pin_WP ) ? socket_state_mask_wp : 0;
}
#else
static void socket_wp_init(void)
{
return;
}
static inline DWORD socket_is_write_protected(void)
{
return 0; /* fake not protected */
}
#endif /* SOCKET_WP_CONNECTED */
#if SOCKET_CP_CONNECTED
/* Socket's Card-Present Pin: high = socket empty, low = card inserted */
static void socket_cp_init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Configure I/O for card-present */
RCC_AHB1PeriphClockCmd(RCC_AHBxPeriph_GPIO_CP, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_CP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_CP;
GPIO_Init(GPIO_CTL_SD, &GPIO_InitStructure);
}
static inline DWORD socket_is_empty(void)
{
return ( GPIO_ReadInputData(GPIO_CTL_SD) & GPIO_Pin_CP ) ? socket_state_mask_cp : FALSE;
}
#else
static void socket_cp_init(void)
{
return;
}
static inline DWORD socket_is_empty(void)
{
return 0; /* fake inserted */
}
#endif /* SOCKET_CP_CONNECTED */
#if CARD_SUPPLY_SWITCHABLE
static void card_power(BOOL on) /* switch FET for card-socket VCC */
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Turn on GPIO for power-control pin connected to FET's gate */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_PWR, ENABLE);
/* Configure I/O for Power FET */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_PWR;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_PWR;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIO_PWR, &GPIO_InitStructure);
if (on) {
GPIO_ResetBits(GPIO_PWR, GPIO_Pin_PWR);
} else {
/* Chip select internal pull-down (to avoid parasite powering) */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_CS;
GPIO_Init(GPIO_CS, &GPIO_InitStructure);
GPIO_SetBits(GPIO_PWR, GPIO_Pin_PWR);
}
}
#if (STM32_SD_DISK_IOCTRL == 1)
static int chk_power(void) /* Socket power state: 0=off, 1=on */
{
if ( GPIO_ReadOutputDataBit(GPIO_PWR, GPIO_Pin_PWR) == Bit_SET ) {
return 0;
} else {
return 1;
}
}
#endif
#else
static void card_power(BYTE on)
{
on=on;
}
#if (STM32_SD_DISK_IOCTRL == 1)
static int chk_power(void)
{
return 1; /* fake powered */
}
#endif
#endif /* CARD_SUPPLY_SWITCHABLE */
/*-----------------------------------------------------------------------*/
/* Transmit/Receive a byte to MMC via SPI (Platform dependent) */
/*-----------------------------------------------------------------------*/
static BYTE stm32_spi_rw( BYTE out )
{
/* Loop while DR register in not empty */
/// not needed: while (SPI_I2S_GetFlagStatus(SPI_SD, SPI_I2S_FLAG_TXE) == RESET) { ; }
/* Send byte through the SPI peripheral */
SPI_I2S_SendData(SPI_SD, out);
/* Wait to receive a byte */
while (SPI_I2S_GetFlagStatus(SPI_SD, SPI_I2S_FLAG_RXNE) == RESET) { ; }
/* Return the byte read from the SPI bus */
return SPI_I2S_ReceiveData(SPI_SD);
}
/*-----------------------------------------------------------------------*/
/* Transmit a byte to MMC via SPI (Platform dependent) */
/*-----------------------------------------------------------------------*/
#define xmit_spi(dat) stm32_spi_rw(dat)
/*-----------------------------------------------------------------------*/
/* Receive a byte from MMC via SPI (Platform dependent) */
/*-----------------------------------------------------------------------*/
static
BYTE rcvr_spi (void)
{
return stm32_spi_rw(0xff);
}
/* Alternative macro to receive data fast */
#define rcvr_spi_m(dst) *(dst)=stm32_spi_rw(0xff)
/*-----------------------------------------------------------------------*/
/* Wait for card ready */
/*-----------------------------------------------------------------------*/
static
BYTE wait_ready (void)
{
BYTE res;
Timer2 = 50; /* Wait for ready in timeout of 500ms */
rcvr_spi();
do
res = rcvr_spi();
while ((res != 0xFF) && Timer2);
return res;
}
/*-----------------------------------------------------------------------*/
/* Deselect the card and release SPI bus */
/*-----------------------------------------------------------------------*/
static
void release_spi (void)
{
DESELECT();
rcvr_spi();
}
#ifdef STM32_SD_USE_DMA
/*-----------------------------------------------------------------------*/
/* Transmit/Receive Block using DMA (Platform dependent. STM32 here) */
/*-----------------------------------------------------------------------*/
static
void stm32_dma_transfer(
BOOL receive, /* FALSE for buff->SPI, TRUE for SPI->buff */
const BYTE *buff, /* receive TRUE : 512 byte data block to be transmitted
receive FALSE : Data buffer to store received data */
UINT btr /* receive TRUE : Byte count (must be multiple of 2)
receive FALSE : Byte count (must be 512) */
)
{
DMA_InitTypeDef DMA_InitStructure;
WORD rw_workbyte[] = { 0xffff };
/* shared DMA configuration values */
DMA_InitStructure.DMA_PeripheralBaseAddr = (DWORD)(&(SPI_SD->DR));
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_BufferSize = btr;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_DeInit(DMA_Channel_SPI_SD_RX);
DMA_DeInit(DMA_Channel_SPI_SD_TX);
if ( receive ) {
/* DMA1 channel2 configuration SPI1 RX ---------------------------------------------*/
/* DMA1 channel4 configuration SPI2 RX ---------------------------------------------*/
DMA_InitStructure.DMA_MemoryBaseAddr = (DWORD)buff;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_Init(DMA_Channel_SPI_SD_RX, &DMA_InitStructure);
/* DMA1 channel3 configuration SPI1 TX ---------------------------------------------*/
/* DMA1 channel5 configuration SPI2 TX ---------------------------------------------*/
DMA_InitStructure.DMA_MemoryBaseAddr = (DWORD)rw_workbyte;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
DMA_Init(DMA_Channel_SPI_SD_TX, &DMA_InitStructure);
} else {
#if _FS_READONLY == 0
/* DMA1 channel2 configuration SPI1 RX ---------------------------------------------*/
/* DMA1 channel4 configuration SPI2 RX ---------------------------------------------*/
DMA_InitStructure.DMA_MemoryBaseAddr = (DWORD)rw_workbyte;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
DMA_Init(DMA_Channel_SPI_SD_RX, &DMA_InitStructure);
/* DMA1 channel3 configuration SPI1 TX ---------------------------------------------*/
/* DMA1 channel5 configuration SPI2 TX ---------------------------------------------*/
DMA_InitStructure.DMA_MemoryBaseAddr = (DWORD)buff;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_Init(DMA_Channel_SPI_SD_TX, &DMA_InitStructure);
#endif
}
/* Enable DMA RX Channel */
DMA_Cmd(DMA_Channel_SPI_SD_RX, ENABLE);
/* Enable DMA TX Channel */
DMA_Cmd(DMA_Channel_SPI_SD_TX, ENABLE);
/* Enable SPI TX/RX request */
SPI_I2S_DMACmd(SPI_SD, SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx, ENABLE);
/* Wait until DMA1_Channel 3 Transfer Complete */
/// not needed: while (DMA_GetFlagStatus(DMA_FLAG_SPI_SD_TC_TX) == RESET) { ; }
/* Wait until DMA1_Channel 2 Receive Complete */
while (DMA_GetFlagStatus(DMA_FLAG_SPI_SD_TC_RX) == RESET) { ; }
// same w/o function-call:
// while ( ( ( DMA1->ISR ) & DMA_FLAG_SPI_SD_TC_RX ) == RESET ) { ; }
/* Disable DMA RX Channel */
DMA_Cmd(DMA_Channel_SPI_SD_RX, DISABLE);
/* Disable DMA TX Channel */
DMA_Cmd(DMA_Channel_SPI_SD_TX, DISABLE);
/* Disable SPI RX/TX request */
SPI_I2S_DMACmd(SPI_SD, SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx, DISABLE);
}
#endif /* STM32_SD_USE_DMA */
/*-----------------------------------------------------------------------*/
/* Power Control and interface-initialization (Platform dependent) */
/*-----------------------------------------------------------------------*/
static
void power_on (void)
{
SPI_InitTypeDef SPI_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
volatile BYTE dummyread;
/* Enable GPIO clock for CS */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIO_CS, ENABLE);
/* Enable SPI clock, SPI1: APB2, SPI2: APB1 */
RCC_APBPeriphClockCmd_SPI_SD(RCC_APBPeriph_SPI_SD, ENABLE);
GPIO_PinAFConfig(GPIO_SPI_SD,GPIO_PinSource_SCK ,GPIO_AF_SD);
GPIO_PinAFConfig(GPIO_SPI_SD,GPIO_PinSource_MISO,GPIO_AF_SD);
GPIO_PinAFConfig(GPIO_SPI_SD,GPIO_PinSource_MOSI,GPIO_AF_SD);
card_power(1);
socket_cp_init();//Empty return
socket_wp_init();//Empty return.
for (Timer1 = 25; Timer1; ); /* Wait for 250ms */
/* Configure I/O for Flash Chip select */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_SPI_SD_CS;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIO_SPI_SD, &GPIO_InitStructure);
/* De-select the Card: Chip Select high */
DESELECT();
/* Configure SPI pins: SCK MISO and MOSI with alternate function push-down */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_SPI_SD_SCK | GPIO_Pin_SPI_SD_MOSI | GPIO_Pin_SPI_SD_MISO;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_Init(GPIO_SPI_SD, &GPIO_InitStructure);
/* SPI configuration */
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_SPI_SD; //
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI_SD, &SPI_InitStructure);
SPI_CalculateCRC(SPI_SD, DISABLE);
SPI_Cmd(SPI_SD, ENABLE);
/* drain SPI */
while (SPI_I2S_GetFlagStatus(SPI_SD, SPI_I2S_FLAG_TXE) == RESET) { ; }
dummyread = SPI_I2S_ReceiveData(SPI_SD);
#ifdef STM32_SD_USE_DMA
/* enable DMA clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
#endif
}
static
void power_off (void)
{
GPIO_InitTypeDef GPIO_InitStructure;
if (!(Stat & STA_NOINIT)) {
SELECT();
wait_ready();
release_spi();
}
SPI_I2S_DeInit(SPI_SD);
SPI_Cmd(SPI_SD, DISABLE);
RCC_APBPeriphClockCmd_SPI_SD(RCC_APBPeriph_SPI_SD, DISABLE);
//All SPI-Pins to input with weak internal pull-downs //
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_SPI_SD_SCK | GPIO_Pin_SPI_SD_MISO | GPIO_Pin_SPI_SD_MOSI;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
GPIO_Init(GPIO_SPI_SD, &GPIO_InitStructure);
card_power(0);
Stat |= STA_NOINIT; /* Set STA_NOINIT */
}
/*-----------------------------------------------------------------------*/
/* Receive a data packet from MMC */
/*-----------------------------------------------------------------------*/
static
BOOL rcvr_datablock (
BYTE *buff, /* Data buffer to store received data */
UINT btr /* Byte count (must be multiple of 4) */
)
{
BYTE token;
Timer1 = 10;
do { /* Wait for data packet in timeout of 100ms */
token = rcvr_spi();
} while ((token == 0xFF) && Timer1);
if(token != 0xFE) return FALSE; /* If not valid data token, return with error */
#ifdef STM32_SD_USE_DMA
stm32_dma_transfer( TRUE, buff, btr );
#else
do { /* Receive the data block into buffer */
rcvr_spi_m(buff++);
rcvr_spi_m(buff++);
rcvr_spi_m(buff++);
rcvr_spi_m(buff++);
} while (btr -= 4);
#endif /* STM32_SD_USE_DMA */
rcvr_spi(); /* Discard CRC */
rcvr_spi();
return TRUE; /* Return with success */
}
/*-----------------------------------------------------------------------*/
/* Send a data packet to MMC */
/*-----------------------------------------------------------------------*/
#if _FS_READONLY == 0
static
BOOL xmit_datablock (
const BYTE *buff, /* 512 byte data block to be transmitted */
BYTE token /* Data/Stop token */
)
{
BYTE resp;
#ifndef STM32_SD_USE_DMA
BYTE wc;
#endif
if (wait_ready() != 0xFF) return FALSE;
xmit_spi(token); /* transmit data token */
if (token != 0xFD) { /* Is data token */
#ifdef STM32_SD_USE_DMA
stm32_dma_transfer( FALSE, buff, 512 );
#else
wc = 0;
do { /* transmit the 512 byte data block to MMC */
xmit_spi(*buff++);
xmit_spi(*buff++);
} while (--wc);
#endif /* STM32_SD_USE_DMA */
xmit_spi(0xFF); /* CRC (Dummy) */
xmit_spi(0xFF);
resp = rcvr_spi(); /* Receive data response */
if ((resp & 0x1F) != 0x05) /* If not accepted, return with error */
return FALSE;
}
return TRUE;
}
#endif /* _READONLY */
/*-----------------------------------------------------------------------*/
/* Send a command packet to MMC */
/*-----------------------------------------------------------------------*/
static
BYTE send_cmd (
BYTE cmd, /* Command byte */
DWORD arg /* Argument */
)
{
BYTE n, res;
if (cmd & 0x80) { /* ACMD<n> is the command sequence of CMD55-CMD<n> */
cmd &= 0x7F;
res = send_cmd(CMD55, 0);
if (res > 1) return res;
}
/* Select the card and wait for ready */
DESELECT();
SELECT();
if (wait_ready() != 0xFF) {
return 0xFF;
}
/* Send command packet */
xmit_spi(cmd); /* Start + Command index */
xmit_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
xmit_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
xmit_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
xmit_spi((BYTE)arg); /* Argument[7..0] */
n = 0x01; /* Dummy CRC + Stop */
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
xmit_spi(n);
/* Receive command response */
if (cmd == CMD12) rcvr_spi(); /* Skip a stuff byte when stop reading */
n = 10; /* Wait for a valid response in timeout of 10 attempts */
do
res = rcvr_spi();
while ((res & 0x80) && --n);
return res; /* Return with the response value */
}
/*--------------------------------------------------------------------------
Public Functions
---------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------*/
/* Initialize Disk Drive */
/*-----------------------------------------------------------------------*/
DSTATUS disk_initialize (
BYTE drv /* Physical drive number (0) */
)
{
BYTE n, cmd, ty, ocr[4];
if (drv) return STA_NOINIT; /* Supports only single drive */
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
power_on(); /* Force socket power on and initialize interface */
interface_speed(INTERFACE_SLOW);
for (n = 10; n; n--) rcvr_spi(); /* 80 dummy clocks */
ty = 0;
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
Timer1 = 100; /* Initialization timeout of 1000 milliseconds */
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDHC */
for (n = 0; n < 4; n++) ocr[n] = rcvr_spi(); /* Get trailing return value of R7 response */
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at VDD range of 2.7-3.6V */
while (Timer1 && send_cmd(ACMD41, 1UL << 30)); /* Wait for leaving idle state (ACMD41 with HCS bit) */
if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
}
}
} else { /* SDSC or MMC */
if (send_cmd(ACMD41, 0) <= 1) {
ty = CT_SD1; cmd = ACMD41; /* SDSC */
} else {
ty = CT_MMC; cmd = CMD1; /* MMC */
}
while (Timer1 && send_cmd(cmd, 0)); /* Wait for leaving idle state */
if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */
ty = 0;
}
}
CardType = ty;
release_spi();
if (ty) { /* Initialization succeeded */
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
interface_speed(INTERFACE_FAST);
} else { /* Initialization failed */
power_off();
}
return Stat;
}
/*-----------------------------------------------------------------------*/
/* Get Disk Status */
/*-----------------------------------------------------------------------*/
DSTATUS disk_status (
BYTE drv /* Physical drive number (0) */
)
BYTE drv /* Physical drive number (0) */
)
{
return RES_NOTRDY;
if (drv) return STA_NOINIT; /* Supports only single drive */
return Stat;
}
/*-----------------------------------------------------------------------*/
/* Read Sector(s) */
/*-----------------------------------------------------------------------*/
DRESULT disk_read (
BYTE drv, /* Physical drive nmuber (0) */
BYTE *buff, /* Pointer to the data buffer to store read data */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
BYTE drv, /* Physical drive number (0) */
BYTE *buff, /* Pointer to the data buffer to store read data */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
{
return RES_NOTRDY;
if (drv || !count) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
if (count == 1) { /* Single block read */
if (send_cmd(CMD17, sector) == 0) { /* READ_SINGLE_BLOCK */
if (rcvr_datablock(buff, 512)) {
count = 0;
}
}
}
else { /* Multiple block read */
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
do {
if (!rcvr_datablock(buff, 512)) {
break;
}
buff += 512;
} while (--count);
send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
}
}
release_spi();
return count ? RES_ERROR : RES_OK;
}
/*-----------------------------------------------------------------------*/
/* Write Sector(s) */
/*-----------------------------------------------------------------------*/
#if _FS_READONLY == 0
DRESULT disk_write (
BYTE drv, /* Physical drive nmuber (0) */
const BYTE *buff, /* Pointer to the data to be written */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
BYTE drv, /* Physical drive number (0) */
const BYTE *buff, /* Pointer to the data to be written */
DWORD sector, /* Start sector number (LBA) */
BYTE count /* Sector count (1..255) */
)
{
return RES_NOTRDY;
}
if (drv || !count) return RES_PARERR;
if (Stat & STA_NOINIT) return RES_NOTRDY;
if (Stat & STA_PROTECT) return RES_WRPRT;
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert to byte address if needed */
if (count == 1) { /* Single block write */
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
&& xmit_datablock(buff, 0xFE))
count = 0;
}
else { /* Multiple block write */
if (CardType & CT_SDC) send_cmd(ACMD23, count);
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
do {
if (!xmit_datablock(buff, 0xFC)) break;
buff += 512;
} while (--count);
if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
count = 1;
}
}
release_spi();
return count ? RES_ERROR : RES_OK;
}
#endif /* _READONLY == 0 */
/*-----------------------------------------------------------------------*/
/* Miscellaneous Functions */
/*-----------------------------------------------------------------------*/
#if (STM32_SD_DISK_IOCTRL == 1)
DRESULT disk_ioctl (
BYTE drv, /* Physical drive nmuber (0) */
BYTE ctrl, /* Control code */
void *buff /* Buffer to send/receive control data */
)
BYTE drv, /* Physical drive number (0) */
BYTE ctrl, /* Control code */
void *buff /* Buffer to send/receive control data */
)
{
return RES_NOTRDY;
DRESULT res;
BYTE n, csd[16], *ptr = (BYTE *)buff;
WORD csize;
if (drv) return RES_PARERR;
res = RES_ERROR;
if (ctrl == CTRL_POWER) {
switch (*ptr) {
case 0: /* Sub control code == 0 (POWER_OFF) */
if (chk_power())
power_off(); /* Power off */
res = RES_OK;
break;
case 1: /* Sub control code == 1 (POWER_ON) */
power_on(); /* Power on */
res = RES_OK;
break;
case 2: /* Sub control code == 2 (POWER_GET) */
*(ptr+1) = (BYTE)chk_power();
res = RES_OK;
break;
default :
res = RES_PARERR;
}
}
else {
if (Stat & STA_NOINIT) return RES_NOTRDY;
switch (ctrl) {
case CTRL_SYNC : /* Make sure that no pending write process */
SELECT();
if (wait_ready() == 0xFF)
res = RES_OK;
break;
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
if ((csd[0] >> 6) == 1) { /* SDC version 2.00 */
csize = csd[9] + ((WORD)csd[8] << 8) + 1;
*(DWORD*)buff = (DWORD)csize << 10;
} else { /* SDC version 1.XX or MMC*/
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
*(DWORD*)buff = (DWORD)csize << (n - 9);
}
res = RES_OK;
}
break;
case GET_SECTOR_SIZE : /* Get R/W sector size (WORD) */
*(WORD*)buff = 512;
res = RES_OK;
break;
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
if (CardType & CT_SD2) { /* SDC version 2.00 */
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
rcvr_spi();
if (rcvr_datablock(csd, 16)) { /* Read partial block */
for (n = 64 - 16; n; n--) rcvr_spi(); /* Purge trailing data */
*(DWORD*)buff = 16UL << (csd[10] >> 4);
res = RES_OK;
}
}
} else { /* SDC version 1.XX or MMC */
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
if (CardType & CT_SD1) { /* SDC version 1.XX */
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
} else { /* MMC */
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
}
res = RES_OK;
}
}
break;
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
*ptr = CardType;
res = RES_OK;
break;
case MMC_GET_CSD : /* Receive CSD as a data block (16 bytes) */
if (send_cmd(CMD9, 0) == 0 /* READ_CSD */
&& rcvr_datablock(ptr, 16))
res = RES_OK;
break;
case MMC_GET_CID : /* Receive CID as a data block (16 bytes) */
if (send_cmd(CMD10, 0) == 0 /* READ_CID */
&& rcvr_datablock(ptr, 16))
res = RES_OK;
break;
case MMC_GET_OCR : /* Receive OCR as an R3 resp (4 bytes) */
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
for (n = 4; n; n--) *ptr++ = rcvr_spi();
res = RES_OK;
}
break;
case MMC_GET_SDSTAT : /* Receive SD status as a data block (64 bytes) */
if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
rcvr_spi();
if (rcvr_datablock(ptr, 64))
res = RES_OK;
}
break;
default:
res = RES_PARERR;
}
release_spi();
}
return res;
}
#endif /* _USE_IOCTL != 0 */
/*-----------------------------------------------------------------------*/
/* Device Timer Interrupt Procedure (Platform dependent) */
/*-----------------------------------------------------------------------*/
/* This function must be called in period of 10ms */
void sdPoll10ms()
{
static DWORD pv;
DWORD ns;
BYTE n, s;
n = Timer1; /* 100Hz decrement timers */
if (n) Timer1 = --n;
n = Timer2;
if (n) Timer2 = --n;
ns = pv;
pv = socket_is_empty() | socket_is_write_protected(); /* Sample socket switch */
if (ns == pv) { /* Have contacts stabled? */
s = Stat;
if (pv & socket_state_mask_wp) /* WP is H (write protected) */
s |= STA_PROTECT;
else /* WP is L (write enabled) */
s &= ~STA_PROTECT;
if (pv & socket_state_mask_cp) /* INS = H (Socket empty) */
s |= (STA_NODISK | STA_NOINIT);
else /* INS = L (Card inserted) */
s &= ~STA_NODISK;
Stat = s;
}
}
void sdInit()
{
}
FATFS g_FATFS_Obj;
void sdMountPoll()
{
static uint8_t mountTimer;
if (mountTimer-- == 0) {
mountTimer = 100;
if (g_FATFS_Obj.fs_type == 0) {
f_mount(0, &g_FATFS_Obj);
}
}
}
uint32_t sd_card_mounted( void )
uint32_t sd_card_mounted(void)
{
return 0; // CardIsConnected() && Card_state == SD_ST_MOUNTED;
return g_FATFS_Obj.fs_type != 0;
}
src/x9d/pwr_driver.cpp
+4
View File
@@ -40,10 +40,14 @@ void soft_power_off()
uint32_t check_soft_power()
{
#if defined(SIMU)
return e_power_on;
#else
if (GPIO_ReadInputDataBit(GPIOPWR, PIN_PWR_STATUS) == Bit_RESET)
return e_power_on;
else
return e_power_off;
#endif
}
void pwrInit()