Move external module serial to HAL LL
This commit is contained in:
Raphael Coeffic
@@ -19,27 +19,7 @@
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* GNU General Public License for more details.
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*/
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extern "C" {
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#define USE_FULL_LL_DRIVER
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#if defined(STM32F4)
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#include "CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h"
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#elif defined(STM32F2)
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// Workaround to prevent the other CMSIS header to be included
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// and fix some missing items in the old one
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#include "thirdparty/CMSIS/Include/cmsis_compiler.h"
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#define __CORE_CM3_H_GENERIC
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#include "CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_gpio.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_tim.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_dma.h"
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#endif
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}
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#include "stm32_hal_ll.h"
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#include "hal.h"
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#include "extmodule_driver.h"
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#include "timers_driver.h"
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@@ -19,6 +19,7 @@
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* GNU General Public License for more details.
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*/
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#include "stm32_hal_ll.h"
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#include "extmodule_serial_driver.h"
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#include "board.h"
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@@ -63,24 +64,24 @@ static void extmoduleSerialStart(const etx_serial_init* params)
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extmodule_driver.on_error = params->on_error;
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// TX + RX Pins
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GPIO_PinAFConfig(EXTMODULE_USART_GPIO, EXTMODULE_TX_GPIO_PinSource,
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EXTMODULE_USART_GPIO_AF);
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GPIO_PinAFConfig(EXTMODULE_USART_GPIO, EXTMODULE_RX_GPIO_PinSource,
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EXTMODULE_USART_GPIO_AF);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(EXTMODULE_USART_GPIO, &GPIO_InitStructure);
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LL_GPIO_InitTypeDef pinInit;
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LL_GPIO_StructInit(&pinInit);
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pinInit.Pin = EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN;
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pinInit.Mode = LL_GPIO_MODE_ALTERNATE;
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pinInit.Pull = LL_GPIO_PULL_UP;
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pinInit.Alternate = EXTMODULE_USART_GPIO_AF_LL;
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LL_GPIO_Init(EXTMODULE_USART_GPIO, &pinInit);
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// UART config
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stm32_usart_init(EXTMODULE_USART, params);
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extmoduleFifo.clear();
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USART_ITConfig(EXTMODULE_USART, USART_IT_RXNE, ENABLE);
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// Enable TX DMA request
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LL_USART_EnableDMAReq_TX(EXTMODULE_USART);
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// Enable RX IRQ
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LL_USART_EnableIT_RXNE(EXTMODULE_USART);
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NVIC_SetPriority(EXTMODULE_USART_IRQn, 6);
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NVIC_EnableIRQ(EXTMODULE_USART_IRQn);
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}
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@@ -107,17 +108,18 @@ void extmoduleSerialStop()
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{
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DMA_DeInit(EXTMODULE_USART_TX_DMA_STREAM);
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_Init(EXTMODULE_USART_GPIO, &GPIO_InitStructure);
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// Reconfigure pin as output
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LL_GPIO_InitTypeDef pinInit;
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LL_GPIO_StructInit(&pinInit);
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USART_DeInit(EXTMODULE_USART);
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pinInit.Pin = EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN;
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pinInit.Mode = LL_GPIO_MODE_OUTPUT;
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pinInit.Pull = LL_GPIO_PULL_DOWN;
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LL_GPIO_Init(EXTMODULE_TX_GPIO, &pinInit);
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GPIO_ResetBits(EXTMODULE_USART_GPIO, EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN);
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LL_USART_DeInit(EXTMODULE_USART);
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LL_GPIO_ResetOutputPin(EXTMODULE_USART_GPIO,
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EXTMODULE_TX_GPIO_PIN | EXTMODULE_RX_GPIO_PIN);
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// reset callbacks
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extmodule_driver.on_receive = nullptr;
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@@ -126,35 +128,27 @@ void extmoduleSerialStop()
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static void extmoduleSendByte(uint8_t byte)
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{
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while (!(EXTMODULE_USART->SR & USART_SR_TXE));
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USART_SendData(EXTMODULE_USART, byte);
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while (!LL_USART_IsActiveFlag_TXE(EXTMODULE_USART));
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LL_USART_TransmitData8(EXTMODULE_USART, byte);
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}
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static void extmoduleSendBuffer(const uint8_t * data, uint8_t size)
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{
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if (size == 0)
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return;
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if (size == 0) return;
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LL_DMA_DeInit(EXTMODULE_USART_TX_DMA, EXTMODULE_USART_TX_DMA_STREAM_LL);
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DMA_InitTypeDef DMA_InitStructure;
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DMA_DeInit(EXTMODULE_USART_TX_DMA_STREAM);
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DMA_InitStructure.DMA_Channel = EXTMODULE_USART_TX_DMA_CHANNEL;
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DMA_InitStructure.DMA_PeripheralBaseAddr = CONVERT_PTR_UINT(&EXTMODULE_USART->DR);
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_Memory0BaseAddr = CONVERT_PTR_UINT(data);
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(EXTMODULE_USART_TX_DMA_STREAM, &DMA_InitStructure);
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DMA_Cmd(EXTMODULE_USART_TX_DMA_STREAM, ENABLE);
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USART_DMACmd(EXTMODULE_USART, USART_DMAReq_Tx, ENABLE);
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LL_DMA_InitTypeDef dmaInit;
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LL_DMA_StructInit(&dmaInit);
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dmaInit.Channel = EXTMODULE_USART_TX_DMA_CHANNEL;
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dmaInit.PeriphOrM2MSrcAddress = CONVERT_PTR_UINT(&EXTMODULE_USART->DR);
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dmaInit.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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dmaInit.MemoryOrM2MDstAddress = CONVERT_PTR_UINT(data);
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dmaInit.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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dmaInit.NbData = size;
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dmaInit.Priority = LL_DMA_PRIORITY_VERYHIGH;
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LL_DMA_Init(EXTMODULE_USART_TX_DMA, EXTMODULE_USART_TX_DMA_STREAM_LL, &dmaInit);
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LL_DMA_EnableStream(EXTMODULE_USART_TX_DMA, EXTMODULE_USART_TX_DMA_STREAM_LL);
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}
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#define USART_FLAG_ERRORS (USART_FLAG_ORE | USART_FLAG_NE | USART_FLAG_FE | USART_FLAG_PE)
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@@ -163,9 +157,9 @@ extern "C" void EXTMODULE_USART_IRQHandler(void)
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// No ISR based send loop: DMA only
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// Receive
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uint32_t status = EXTMODULE_USART->SR;
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uint32_t status = LL_USART_ReadReg(EXTMODULE_USART, SR);
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while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) {
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uint8_t data = EXTMODULE_USART->DR;
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uint8_t data = LL_USART_ReceiveData8(EXTMODULE_USART);
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if (status & USART_FLAG_ERRORS) {
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if (extmodule_driver.on_error)
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extmodule_driver.on_error();
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@@ -174,23 +168,36 @@ extern "C" void EXTMODULE_USART_IRQHandler(void)
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if (extmodule_driver.on_receive)
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extmodule_driver.on_receive(data);
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}
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status = EXTMODULE_USART->SR;
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status = LL_USART_ReadReg(EXTMODULE_USART, SR);
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}
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}
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static void extmoduleWaitForTxCompleted()
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{
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#if !defined(SIMU)
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// TODO: check if everything is properly initialised, this seems to block when
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// the port has been initialised with a zero baudrate
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if (DMA_GetCmdStatus(EXTMODULE_USART_TX_DMA_STREAM) == ENABLE) {
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while (DMA_GetFlagStatus(EXTMODULE_USART_TX_DMA_STREAM,
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EXTMODULE_USART_TX_DMA_FLAG_TC) == RESET)
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;
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DMA_ClearFlag(EXTMODULE_USART_TX_DMA_STREAM,
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EXTMODULE_USART_TX_DMA_FLAG_TC);
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if (LL_DMA_IsEnabledStream(EXTMODULE_USART_TX_DMA,
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EXTMODULE_USART_TX_DMA_STREAM_LL)) {
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static_assert(EXTMODULE_USART_TX_DMA_STREAM_LL == LL_DMA_STREAM_3 ||
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EXTMODULE_USART_TX_DMA_STREAM_LL == LL_DMA_STREAM_6 ||
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EXTMODULE_USART_TX_DMA_STREAM_LL == LL_DMA_STREAM_7, "");
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switch(EXTMODULE_USART_TX_DMA_STREAM_LL) {
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case LL_DMA_STREAM_3:
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while (LL_DMA_IsActiveFlag_TC3(EXTMODULE_USART_TX_DMA));
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LL_DMA_ClearFlag_TC3(EXTMODULE_USART_TX_DMA);
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break;
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case LL_DMA_STREAM_6:
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while (LL_DMA_IsActiveFlag_TC6(EXTMODULE_USART_TX_DMA));
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LL_DMA_ClearFlag_TC6(EXTMODULE_USART_TX_DMA);
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break;
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case LL_DMA_STREAM_7:
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while (LL_DMA_IsActiveFlag_TC7(EXTMODULE_USART_TX_DMA));
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LL_DMA_ClearFlag_TC7(EXTMODULE_USART_TX_DMA);
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break;
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}
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}
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#endif
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}
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const etx_serial_driver_t ExtmoduleSerialDriver = {
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@@ -9,6 +9,7 @@ add_library(stm32cube_ll OBJECT
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_gpio.c
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_tim.c
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_dma.c
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_usart.c
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)
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target_compile_options(stm32cube_ll PRIVATE -DUSE_FULL_LL_DRIVER)
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@@ -0,0 +1,45 @@
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/*
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* Copyright (C) EdgeTX
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#pragma once
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extern "C" {
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#define USE_FULL_LL_DRIVER
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#if defined(STM32F4)
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#include "CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h"
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#elif defined(STM32F2)
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// Workaround to prevent the other CMSIS header to be included
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// and fix some missing items in the old one
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#include "thirdparty/CMSIS/Include/cmsis_compiler.h"
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#define __CORE_CM3_H_GENERIC
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#include "CMSIS/Device/ST/STM32F2xx/Include/stm32f2xx.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_gpio.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_tim.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_dma.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f2xx_ll_usart.h"
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#endif
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}
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@@ -841,8 +841,10 @@
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#define EXTMODULE_TX_GPIO GPIOB
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#define EXTMODULE_USART_GPIO EXTMODULE_TX_GPIO
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#define EXTMODULE_TX_GPIO_PIN GPIO_Pin_10 // PB.10 (TIM2_CH3)
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#define EXTMODULE_TX_GPIO_PIN_LL LL_GPIO_PIN_10 // PB.10 (TIM2_CH3)
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#define EXTMODULE_TX_GPIO_PinSource GPIO_PinSource10
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#define EXTMODULE_RX_GPIO_PIN GPIO_Pin_11 // PB.11
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#define EXTMODULE_RX_GPIO_PIN_LL LL_GPIO_PIN_11 // PB.11
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#define EXTMODULE_RX_GPIO_PinSource GPIO_PinSource11
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#define EXTMODULE_TIMER_TX_GPIO_AF GPIO_AF_TIM2
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#define EXTMODULE_TIMER TIM2
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@@ -860,11 +862,14 @@
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#define EXTMODULE_TIMER_DMA_STREAM_IRQn DMA1_Stream1_IRQn
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#define EXTMODULE_TIMER_DMA_IRQHandler DMA1_Stream1_IRQHandler
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#define EXTMODULE_USART_GPIO_AF GPIO_AF_USART3
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#define EXTMODULE_USART_GPIO_AF_LL LL_GPIO_AF_7
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#define EXTMODULE_USART USART3
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#define EXTMODULE_USART_IRQn USART3_IRQn
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#define EXTMODULE_USART_IRQHandler USART3_IRQHandler
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#define EXTMODULE_USART_TX_DMA DMA1
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#define EXTMODULE_USART_TX_DMA_CHANNEL DMA_Channel_4
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#define EXTMODULE_USART_TX_DMA_STREAM DMA1_Stream3
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#define EXTMODULE_USART_TX_DMA_STREAM_LL LL_DMA_STREAM_3
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#define EXTMODULE_USART_TX_DMA_FLAG_TC DMA_FLAG_TCIF3
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#define EXTMODULE_USART_RX_DMA_CHANNEL DMA_Channel_4
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#define EXTMODULE_USART_RX_DMA_STREAM DMA1_Stream1
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@@ -425,11 +425,13 @@
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#define EXTMODULE_RCC_APB2Periph (RCC_APB2Periph_TIM8 | RCC_APB2Periph_USART6)
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#define EXTMODULE_TX_GPIO GPIOC
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#define EXTMODULE_TX_GPIO_PIN GPIO_Pin_6 // PC.06
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#define EXTMODULE_TX_GPIO_PIN_LL LL_GPIO_PIN_6
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#define EXTMODULE_TX_GPIO_PinSource GPIO_PinSource6
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#define EXTMODULE_TX_GPIO_AF GPIO_AF_TIM8 // TIM8_CH1
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#define EXTMODULE_TX_GPIO_AF_USART GPIO_AF_USART6
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#define EXTMODULE_RX_GPIO GPIOC
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#define EXTMODULE_RX_GPIO_PIN GPIO_Pin_7 // PC.07
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#define EXTMODULE_RX_GPIO_PIN_LL LL_GPIO_PIN_7
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#define EXTMODULE_RX_GPIO_PinSource GPIO_PinSource7
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#define EXTMODULE_RX_GPIO_AF_USART GPIO_AF_USART6
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#define EXTMODULE_TIMER TIM8
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@@ -443,9 +445,11 @@
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#define EXTMODULE_USART USART6
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#define EXTMODULE_USART_GPIO GPIOC
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#define EXTMODULE_USART_GPIO_AF GPIO_AF_USART6
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#define EXTMODULE_USART_GPIO_AF_LL LL_GPIO_AF_8
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#define EXTMODULE_USART_TX_DMA DMA2
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#define EXTMODULE_USART_TX_DMA_CHANNEL DMA_Channel_5
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#define EXTMODULE_USART_TX_DMA_STREAM DMA2_Stream7
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#define EXTMODULE_USART_TX_DMA_STREAM_LL LL_DMA_STREAM_7
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#define EXTMODULE_USART_TX_DMA_IRQn DMA2_Stream7_IRQn
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#define EXTMODULE_USART_TX_DMA_IRQHandler DMA2_Stream7_IRQHandler
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#define EXTMODULE_USART_TX_DMA_FLAG_TC DMA_IT_TCIF7
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@@ -1542,11 +1542,14 @@
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#define EXTMODULE_TIMER_OUTPUT_ENABLE TIM_CCER_CC1E
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#define EXTMODULE_TIMER_OUTPUT_POLARITY TIM_CCER_CC1P
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#define EXTMODULE_USART_GPIO_AF GPIO_AF_USART6
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#define EXTMODULE_USART_GPIO_AF_LL LL_GPIO_AF_8
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#define EXTMODULE_USART USART6
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#define EXTMODULE_USART_IRQn USART6_IRQn
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#define EXTMODULE_USART_IRQHandler USART6_IRQHandler
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#define EXTMODULE_USART_TX_DMA DMA2
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#define EXTMODULE_USART_TX_DMA_CHANNEL DMA_Channel_5
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#define EXTMODULE_USART_TX_DMA_STREAM DMA2_Stream6
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#define EXTMODULE_USART_TX_DMA_STREAM_LL LL_DMA_STREAM_6
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#define EXTMODULE_USART_TX_DMA_FLAG_TC DMA_FLAG_TCIF6
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#define EXTMODULE_USART_RX_DMA_CHANNEL DMA_Channel_5
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#define EXTMODULE_USART_RX_DMA_STREAM DMA2_Stream1
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