Fixes #1968 - I ported the last changes from Damjan in the same time.
Please review (I push it anyway as there was a freeze before on startup when radio in Slave mode)
This commit is contained in:
@@ -2593,7 +2593,7 @@ void opentxInit(OPENTX_INIT_ARGS)
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uart3Init(g_eeGeneral.uart3Mode, MODEL_TELEMETRY_PROTOCOL());
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#endif
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#if defined(CPUARM) && !defined(SIMU)
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#if defined(PCBSKY9X) && !defined(SIMU)
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init_trainer_capture();
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#endif
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@@ -55,6 +55,7 @@ void setupPulsesPPM(unsigned int port) // Don't enable interru
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uint32_t lastCh = min<unsigned int>(NUM_CHNOUT, firstCh + 8 + g_model.moduleData[port].channelsCount);
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#if defined(PCBSKY9X)
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// TODO move register stuff to driver
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register Pwm *pwmptr = PWM;
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uint32_t pwmCh = (port == EXTERNAL_MODULE ? 3 : 1);
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pwmptr->PWM_CH_NUM[pwmCh].PWM_CDTYUPD = (g_model.moduleData[port].ppmDelay * 50 + 300) * 2; //Stoplen *2
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@@ -78,25 +79,19 @@ void setupPulsesPPM(unsigned int port) // Don't enable interru
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*(ptr + 1) = 0;
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#if defined(PCBTARANIS)
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rest -= 1000;
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uint32_t ppmDelay = (g_model.moduleData[port].ppmDelay * 50 + 300) * 2;
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// set idle time, ppm delay and ppm polarity
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if (port == TRAINER_MODULE) {
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TIM3->CCR2 = rest - 1000 ; // Update time
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TIM3->CCR4 = (g_model.moduleData[port].ppmDelay*50+300)*2;
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if (!g_model.moduleData[TRAINER_MODULE].ppmPulsePol)
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TIM3->CCER |= TIM_CCER_CC4P;
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else
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TIM3->CCER &= ~TIM_CCER_CC4P;
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set_trainer_ppm_parameters(rest, ppmDelay, !g_model.moduleData[TRAINER_MODULE].ppmPulsePol); // ppmPulsePol: 0 - positive, 1 - negative
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}
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else if (port == EXTERNAL_MODULE) {
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TIM8->CCR2 = rest - 1000; // Update time
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TIM8->CCR1 = (g_model.moduleData[port].ppmDelay*50+300)*2;
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if(!g_model.moduleData[EXTERNAL_MODULE].ppmPulsePol)
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TIM8->CCER |= TIM_CCER_CC1NP;
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else
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TIM8->CCER &= ~TIM_CCER_CC1NP;
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set_external_ppm_parameters(rest, ppmDelay, !g_model.moduleData[EXTERNAL_MODULE].ppmPulsePol);
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}
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else {
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TIM1->CCR2 = rest - 1000; // Update time
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TIM1->CCR3 = (g_model.moduleData[port].ppmDelay*50+300)*2;
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#if defined(TARANIS_INTERNAL_PPM)
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else if (port == INTERNAL_MODULE) {
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set_internal_ppm_parameters(rest, ppmDelay, !g_model.moduleData[INTERNAL_MODULE].ppmPulsePol);
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}
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#endif // #if defined(TARANIS_INTERNAL_PPM)
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#endif
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}
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@@ -150,6 +150,10 @@ void init_no_pulses(uint32_t port);
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void disable_no_pulses(uint32_t port);
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void init_ppm( uint32_t module_index );
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void disable_ppm( uint32_t module_index );
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void set_external_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive);
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#if defined(TARANIS_INTERNAL_PPM)
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void set_internal_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive);
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#endif
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void init_pxx( uint32_t module_index );
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void disable_pxx( uint32_t module_index );
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void init_dsm2( uint32_t module_index );
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@@ -158,6 +162,7 @@ void disable_dsm2( uint32_t module_index );
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// Trainer driver
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void init_trainer_ppm(void);
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void stop_trainer_ppm(void);
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void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive);
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void init_trainer_capture(void);
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void stop_trainer_capture(void);
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void init_cppm_on_heartbeat_capture(void);
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@@ -47,8 +47,10 @@ extern uint16_t dsm2Stream[400];
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static void init_pa10_pxx( void ) ;
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static void disable_pa10_pxx( void ) ;
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static void init_pa10_ppm( void ) ;
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static void disable_pa10_ppm( void ) ;
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#if defined(TARANIS_INTERNAL_PPM)
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static void init_pa10_ppm( void ) ;
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static void disable_pa10_ppm( void ) ;
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#endif
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static void init_pa7_pxx( void ) ;
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static void disable_pa7_pxx( void ) ;
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#if defined(DSM2)
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@@ -96,20 +98,45 @@ void disable_dsm2(uint32_t port)
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void init_ppm(uint32_t port)
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{
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if (port == INTERNAL_MODULE)
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init_pa10_ppm(); // TODO needed?
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else
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if (port == EXTERNAL_MODULE) {
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init_pa7_ppm();
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}
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#if defined(TARANIS_INTERNAL_PPM)
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else if (port == INTERNAL_MODULE) {
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init_pa10_ppm();
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}
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#endif
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}
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void disable_ppm(uint32_t port)
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{
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if (port == INTERNAL_MODULE)
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disable_pa10_ppm(); // TODO needed?
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else
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if (port == EXTERNAL_MODULE) {
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disable_pa7_ppm();
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}
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#if defined(TARANIS_INTERNAL_PPM)
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else if (port == INTERNAL_MODULE) {
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disable_pa10_ppm();
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}
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#endif
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}
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void set_external_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
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{
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TIM8->CCR2 = idleTime;
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TIM8->CCR1 = delay;
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// we are using complementary output so logic has to be reversed here
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TIM8->CCER = TIM_CCER_CC1NE | (positive ? 0 : TIM_CCER_CC1NP);
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}
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#if defined(TARANIS_INTERNAL_PPM)
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void set_internal_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
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{
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TIM1->CCR2 = idleTime;
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TIM1->CCR3 = delay;
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TIM1->CCER = TIM_CCER_CC3E | (positive ? TIM_CCER_CC3P : 0);
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}
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#endif
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void init_no_pulses(uint32_t port)
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{
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if (port == INTERNAL_MODULE)
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@@ -283,6 +310,7 @@ static void disable_pa10_pxx()
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INTERNAL_RF_OFF();
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}
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#if defined(TARANIS_INTERNAL_PPM)
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// PPM output
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// Timer 1, channel 1 on PA8 for prototype
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// Pin is AF1 function for timer 1
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@@ -290,7 +318,6 @@ static void init_pa10_ppm()
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{
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INTERNAL_RF_ON();
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// Timer1
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setupPulsesPPM(INTERNAL_MODULE) ;
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ppmStreamPtr[INTERNAL_MODULE] = ppmStream[INTERNAL_MODULE];
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//RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
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@@ -299,8 +326,12 @@ static void init_pa10_ppm()
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configure_pins( PIN_INTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_1 | PIN_OS25 | PIN_PUSHPULL ) ;
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RCC->APB2ENR |= RCC_APB2ENR_TIM1EN ; // Enable clock
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TIM1->CR1 &= ~TIM_CR1_CEN ;
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// setupPulsesPPM() is also configuring registers,
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// so it has to be called after the peripheral is enabled
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setupPulsesPPM(INTERNAL_MODULE) ;
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TIM1->ARR = *ppmStreamPtr[INTERNAL_MODULE]++ ;
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TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
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@@ -308,7 +339,6 @@ static void init_pa10_ppm()
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TIM1->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2 ; // PWM mode 1
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TIM1->CCMR1 = TIM_CCMR1_OC2PE ; // PWM mode 1
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TIM1->CCR3 = (g_model.moduleData[INTERNAL_MODULE].ppmDelay*50+300)*2;
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TIM1->BDTR = TIM_BDTR_MOE ;
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TIM1->EGR = 1 ;
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TIM1->DIER = TIM_DIER_UDE ;
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@@ -334,6 +364,7 @@ static void disable_pa10_ppm()
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INTERNAL_RF_OFF();
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}
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#endif // #if defined(TARANIS_INTERNAL_PPM)
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#if !defined(SIMU)
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extern "C" void TIM1_CC_IRQHandler()
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@@ -535,7 +566,6 @@ static void init_pa7_ppm()
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EXTERNAL_MODULE_ON();
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// Timer1
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setupPulsesPPM(EXTERNAL_MODULE) ;
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ppmStreamPtr[EXTERNAL_MODULE] = ppmStream[EXTERNAL_MODULE];
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
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@@ -545,20 +575,16 @@ static void init_pa7_ppm()
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configure_pins( PIN_EXTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25 | PIN_PUSHPULL ) ;
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#endif
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RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
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TIM8->CR1 &= ~TIM_CR1_CEN ;
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// setupPulsesPPM() is also configuring registers,
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// so it has to be called after the peripheral is enabled
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setupPulsesPPM(EXTERNAL_MODULE) ;
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TIM8->ARR = *ppmStreamPtr[EXTERNAL_MODULE]++ ;
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TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
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#if defined(REV3)
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TIM8->CCER = TIM_CCER_CC1E ;
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#else
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TIM8->CCER = TIM_CCER_CC1NE;
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if(g_model.moduleData[EXTERNAL_MODULE].ppmPulsePol)
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TIM8->CCER |= TIM_CCER_CC1NP;
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#endif
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TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE ; // PWM mode 1
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TIM8->CCR1 = (g_model.moduleData[EXTERNAL_MODULE].ppmDelay*50+300)*2;
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TIM8->BDTR = TIM_BDTR_MOE ;
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TIM8->EGR = 1 ;
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TIM8->DIER = TIM_DIER_UDE ;
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@@ -45,28 +45,27 @@ extern Fifo<32> sbusFifo;
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// Trainer PPM oputput PC9, Timer 3 channel 4, (Alternate Function 2)
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void init_trainer_ppm()
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{
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setupTrainerPulses() ;
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TrainerPulsePtr = ppmStream[TRAINER_MODULE];
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
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configure_pins( PIN_TR_PPM_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25 | PIN_PUSHPULL ) ;
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configure_pins( PIN_TR_PPM_IN, PIN_PORTA | PIN_INPUT ) ;
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RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
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TIM3->CR1 &= ~TIM_CR1_CEN ;
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// setupTrainerPulses() is also configuring registers,
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// so it has to be called after the peripheral is enabled
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setupTrainerPulses() ;
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TIM3->ARR = *TrainerPulsePtr++ ;
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TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
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TIM3->CCER = TIM_CCER_CC4E ;
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if(!g_model.moduleData[TRAINER_MODULE].ppmPulsePol)
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TIM3->CCER |= TIM_CCER_CC4P;
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TIM3->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
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TIM3->CCR4 = (g_model.moduleData[TRAINER_MODULE].ppmDelay*50+300)*2;
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TIM3->BDTR = TIM_BDTR_MOE ;
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TIM3->EGR = 1 ;
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// TIM3->DIER = TIM_DIER_UDE ;
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TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM3->DIER |= TIM_DIER_CC2IE ;
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TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
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TIM3->DIER |= TIM_DIER_CC1IE ;
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TIM3->DIER |= TIM_DIER_UIE ;
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TIM3->CR1 = TIM_CR1_CEN ;
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@@ -78,11 +77,18 @@ void init_trainer_ppm()
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void stop_trainer_ppm()
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{
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configure_pins( PIN_TR_PPM_OUT, PIN_INPUT | PIN_PORTC ) ; // Pin as input
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TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
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TIM3->DIER = 0 ; // Stop Interrupt
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TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
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NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
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}
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void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
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{
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TIM3->CCR1 = idleTime;
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TIM3->CCR4 = delay;
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TIM3->CCER = TIM_CCER_CC4E | (positive ? TIM_CCER_CC4P : 0);
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}
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// Trainer capture, PC8, Timer 3 channel 3
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void init_trainer_capture()
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{
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@@ -98,8 +104,8 @@ void init_trainer_capture()
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TIM3->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
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TIM3->DIER |= TIM_DIER_CC3IE ;
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TIM3->CR1 = TIM_CR1_CEN ;
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NVIC_SetPriority(TIM3_IRQn, 7);
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NVIC_EnableIRQ(TIM3_IRQn) ;
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NVIC_SetPriority(TIM3_IRQn, 7);
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}
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void stop_trainer_capture()
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@@ -124,7 +130,7 @@ extern "C" void TIM3_IRQHandler()
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doCapture = true;
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}
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if ( (TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
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if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
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// capture mode on heartbeat pin (external module)
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capture = TIM3->CCR2 ;
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doCapture = true ;
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@@ -153,11 +159,10 @@ extern "C" void TIM3_IRQHandler()
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}
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// PPM out compare interrupt
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if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
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if ( ( TIM3->DIER & TIM_DIER_CC1IE ) && ( TIM3->SR & TIM_SR_CC1IF ) ) {
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// compare interrupt
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM3->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
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TIM3->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt
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TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
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setupTrainerPulses() ;
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@@ -172,8 +177,8 @@ extern "C" void TIM3_IRQHandler()
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TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
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TIM3->ARR = *TrainerPulsePtr++ ;
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if ( *TrainerPulsePtr == 0 ) {
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TIM3->SR &= ~TIM_SR_CC2IF ; // Clear this flag
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TIM3->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
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TIM3->SR &= ~TIM_SR_CC1IF ; // Clear this flag
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TIM3->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
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}
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}
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}
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