piotr/edgetx-gx12
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Fixes #1968 - I ported the last changes from Damjan in the same time.

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Please review (I push it anyway as there was a freeze before on startup
when radio in Slave mode)
This commit is contained in:
bsongis
2015-01-28 23:22:04 +01:00
parent a63bb7f9be
commit 76937ea566
5 changed files with 86 additions and 55 deletions
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radio/src/targets/taranis/trainer_driver.cpp
+22 -17
View File
@@ -45,28 +45,27 @@ extern Fifo<32> sbusFifo;
// Trainer PPM oputput PC9, Timer 3 channel 4, (Alternate Function 2)
void init_trainer_ppm()
{
setupTrainerPulses() ;
TrainerPulsePtr = ppmStream[TRAINER_MODULE];
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
configure_pins( PIN_TR_PPM_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25 | PIN_PUSHPULL ) ;
configure_pins( PIN_TR_PPM_IN, PIN_PORTA | PIN_INPUT ) ;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
TIM3->CR1 &= ~TIM_CR1_CEN ;
// setupTrainerPulses() is also configuring registers,
// so it has to be called after the peripheral is enabled
setupTrainerPulses() ;
TIM3->ARR = *TrainerPulsePtr++ ;
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
TIM3->CCER = TIM_CCER_CC4E ;
if(!g_model.moduleData[TRAINER_MODULE].ppmPulsePol)
TIM3->CCER |= TIM_CCER_CC4P;
TIM3->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
TIM3->CCR4 = (g_model.moduleData[TRAINER_MODULE].ppmDelay*50+300)*2;
TIM3->BDTR = TIM_BDTR_MOE ;
TIM3->EGR = 1 ;
// TIM3->DIER = TIM_DIER_UDE ;
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM3->DIER |= TIM_DIER_CC2IE ;
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
TIM3->DIER |= TIM_DIER_CC1IE ;
TIM3->DIER |= TIM_DIER_UIE ;
TIM3->CR1 = TIM_CR1_CEN ;
@@ -78,11 +77,18 @@ void init_trainer_ppm()
void stop_trainer_ppm()
{
configure_pins( PIN_TR_PPM_OUT, PIN_INPUT | PIN_PORTC ) ; // Pin as input
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
TIM3->DIER = 0 ; // Stop Interrupt
TIM3->CR1 &= ~TIM_CR1_CEN ; // Stop counter
NVIC_DisableIRQ(TIM3_IRQn) ; // Stop Interrupt
}
void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
{
TIM3->CCR1 = idleTime;
TIM3->CCR4 = delay;
TIM3->CCER = TIM_CCER_CC4E | (positive ? TIM_CCER_CC4P : 0);
}
// Trainer capture, PC8, Timer 3 channel 3
void init_trainer_capture()
{
@@ -98,8 +104,8 @@ void init_trainer_capture()
TIM3->SR &= ~TIM_SR_CC3IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF ; // Clear flags
TIM3->DIER |= TIM_DIER_CC3IE ;
TIM3->CR1 = TIM_CR1_CEN ;
NVIC_SetPriority(TIM3_IRQn, 7);
NVIC_EnableIRQ(TIM3_IRQn) ;
NVIC_SetPriority(TIM3_IRQn, 7);
}
void stop_trainer_capture()
@@ -124,7 +130,7 @@ extern "C" void TIM3_IRQHandler()
doCapture = true;
}
if ( (TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
// capture mode on heartbeat pin (external module)
capture = TIM3->CCR2 ;
doCapture = true ;
@@ -153,11 +159,10 @@ extern "C" void TIM3_IRQHandler()
}
// PPM out compare interrupt
if ( ( TIM3->DIER & TIM_DIER_CC2IE ) && ( TIM3->SR & TIM_SR_CC2IF ) ) {
if ( ( TIM3->DIER & TIM_DIER_CC1IE ) && ( TIM3->SR & TIM_SR_CC1IF ) ) {
// compare interrupt
TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM3->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
TIM3->SR &= ~TIM_SR_CC2IF ; // Clear flag
TIM3->DIER &= ~TIM_DIER_CC1IE ; // stop this interrupt
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear flag
setupTrainerPulses() ;
@@ -172,8 +177,8 @@ extern "C" void TIM3_IRQHandler()
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
TIM3->ARR = *TrainerPulsePtr++ ;
if ( *TrainerPulsePtr == 0 ) {
TIM3->SR &= ~TIM_SR_CC2IF ; // Clear this flag
TIM3->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear this flag
TIM3->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
}
}
}