[Taranis] DSM2 now ok on the logic analyser. I cannot test with a module, as I don't have a module ready for...
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+16
-13
@@ -59,20 +59,18 @@ uint8_t dsm2SerialBitCount;
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uint8_t dsm2Index = 0;
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void _send_1(uint8_t v)
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{
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dsm2Value += v;
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if (dsm2Index == 0)
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v -= 2;
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else
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v += 2;
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if (dsm2Index == 0) {
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*(dsm2StreamPtr+1) = dsm2Value;
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dsm2Index = 1;
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}
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else {
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*dsm2StreamPtr = dsm2Value;
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dsm2Index = 0;
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dsm2StreamPtr += 2;
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}
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dsm2Value += v;
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*dsm2StreamPtr++ = dsm2Value;
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dsm2Index = (dsm2Index+1) % 2;
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}
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void sendByteDsm2(uint8_t b) //max 10changes 0 10 10 10 10 1
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void sendByteDsm2(uint8_t b) //max 10 changes 0 10 10 10 10 1
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{
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bool lev = 0;
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uint8_t len = BITLEN_DSM2; //max val: 9*16 < 256
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@@ -92,7 +90,7 @@ void sendByteDsm2(uint8_t b) //max 10changes 0 10 10 10 10 1
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}
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void putDsm2Flush()
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{
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// dsm2StreamPtr--; //remove last stopbits and
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dsm2StreamPtr--; //remove last stopbits and
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*dsm2StreamPtr++ = 44010; // Past the 44000 of the ARR
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}
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#else
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@@ -139,11 +137,16 @@ void setupPulsesDSM2(unsigned int port)
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dsm2SerialBitCount = 0 ;
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#else
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dsm2Value = 0;
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dsm2Index = 0;
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dsm2Index = 1;
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#endif
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dsm2StreamPtr = dsm2Stream;
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#if defined(PCBTARANIS)
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dsm2Value = 100;
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*dsm2StreamPtr++ = dsm2Value;
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#endif
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switch(s_current_protocol[port]) {
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case PROTO_DSM2_LP45:
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dsmDat[0] = 0x00;
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@@ -52,7 +52,7 @@ uint8_t s_pulses_paused = 0;
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uint16_t B3_comp_value;
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#ifdef DSM2_SERIAL
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#if defined(DSM2_SERIAL)
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inline void DSM2_EnableTXD(void)
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{
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UCSR0B |= (1 << TXEN0); // enable TX
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@@ -471,7 +471,7 @@ static void init_pa7_dsm2()
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#if defined(REV3)
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TIM8->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ;
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#else
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TIM8->CCER = TIM_CCER_CC1NE ;
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TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
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#endif
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TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
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TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
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