[Taranis] DSM2 now ok on the logic analyser. I cannot test with a module, as I don't have a module ready for...

This commit is contained in:
bsongis
2013-11-03 14:17:54 +00:00
parent 0592960262
commit 82f111d249
3 changed files with 18 additions and 15 deletions
+1 -1
View File
@@ -471,7 +471,7 @@ static void init_pa7_dsm2()
#if defined(REV3)
TIM8->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P ;
#else
TIM8->CCER = TIM_CCER_CC1NE ;
TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
#endif
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs