Taranis internal module fix
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@@ -127,8 +127,9 @@ void intmodulePxxStart()
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INTMODULE_TIMER->DIER |= TIM_DIER_UDE; // Enable DMA on update
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INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2;
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INTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
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intmoduleSendNextFrame();
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INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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INTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
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NVIC_EnableIRQ(INTMODULE_DMA_STREAM_IRQn);
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NVIC_SetPriority(INTMODULE_DMA_STREAM_IRQn, 7);
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@@ -159,8 +160,9 @@ void intmodulePpmStart()
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INTMODULE_TIMER->EGR = 1;
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INTMODULE_TIMER->DIER = TIM_DIER_UDE;
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INTMODULE_TIMER->CR1 = TIM_CR1_CEN;
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intmoduleSendNextFrame();
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INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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INTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
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INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
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NVIC_EnableIRQ(INTMODULE_DMA_STREAM_IRQn);
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NVIC_SetPriority(INTMODULE_DMA_STREAM_IRQn, 7);
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