Taranis internal module fix

This commit is contained in:
Bertrand Songis
2019-02-08 10:12:50 +01:00
parent 3d162d9b1f
commit 8cd50725fa
@@ -127,8 +127,9 @@ void intmodulePxxStart()
INTMODULE_TIMER->DIER |= TIM_DIER_UDE; // Enable DMA on update
INTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2;
INTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
intmoduleSendNextFrame();
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
INTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
NVIC_EnableIRQ(INTMODULE_DMA_STREAM_IRQn);
NVIC_SetPriority(INTMODULE_DMA_STREAM_IRQn, 7);
@@ -159,8 +160,9 @@ void intmodulePpmStart()
INTMODULE_TIMER->EGR = 1;
INTMODULE_TIMER->DIER = TIM_DIER_UDE;
INTMODULE_TIMER->CR1 = TIM_CR1_CEN;
intmoduleSendNextFrame();
INTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
INTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
INTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
NVIC_EnableIRQ(INTMODULE_DMA_STREAM_IRQn);
NVIC_SetPriority(INTMODULE_DMA_STREAM_IRQn, 7);