piotr/edgetx-gx12
1
0
Fork 0
Code Issues 2 Pull Requests Actions Packages Projects Releases Wiki Activity

Cosmetics

Browse Source
This commit is contained in:
3djc
2021-01-18 17:37:50 +01:00
parent ea6fec611f
commit 8fcc4f7247
2 changed files with 29 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files
radio/src/gui/common/stdlcd/radio_hardware.cpp
+8 -8
View File
@@ -251,14 +251,14 @@ enum {
#define EXTERNAL_ANTENNA_ROW 0,
void onHardwareAntennaSwitchConfirm(const char * result)
{
if (result == STR_OK) {
// Switch to external antenna confirmation
g_eeGeneral.antennaMode = reusableBuffer.radioHardware.antennaMode;
storageDirty(EE_GENERAL);
}
else {
reusableBuffer.radioHardware.antennaMode = g_eeGeneral.antennaMode;
}
if (result == STR_OK) {
// Switch to external antenna confirmation
g_eeGeneral.antennaMode = reusableBuffer.radioHardware.antennaMode;
storageDirty(EE_GENERAL);
}
else {
reusableBuffer.radioHardware.antennaMode = g_eeGeneral.antennaMode;
}
}
#else
#define EXTERNAL_ANTENNA_ROW
radio/src/targets/taranis/hal.h
+21 -21
View File
@@ -1720,27 +1720,27 @@
#define TRAINER_MODULE_CPPM
#define TRAINER_MODULE_SBUS
#endif
#define TRAINER_MODULE_RCC_AHB1Periph RCC_AHB1Periph_GPIOC
#define TRAINER_MODULE_RCC_APB2Periph RCC_APB2Periph_USART6
#define TRAINER_MODULE_RCC_APB1Periph RCC_APB1Periph_TIM3
#define TRAINER_MODULE_CPPM_TIMER TRAINER_TIMER
#define TRAINER_MODULE_CPPM_GPIO INTMODULE_HEARTBEAT_GPIO
#define TRAINER_MODULE_CPPM_GPIO_PIN INTMODULE_HEARTBEAT_GPIO_PIN
#define TRAINER_MODULE_CPPM_GPIO_PinSource INTMODULE_HEARTBEAT_EXTI_PinSource
#define TRAINER_MODULE_CPPM_INTERRUPT_ENABLE TIM_DIER_CC2IE
#define TRAINER_MODULE_CPPM_INTERRUPT_FLAG TIM_SR_CC2IF
#define TRAINER_MODULE_CPPM_CCMR1 (TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0)
#define TRAINER_MODULE_CPPM_CCER TIM_CCER_CC2E
#define TRAINER_MODULE_CPPM_COUNTER_REGISTER TRAINER_TIMER->CCR2
#define TRAINER_MODULE_CPPM_TIMER_IRQn TRAINER_TIMER_IRQn
#define TRAINER_MODULE_CPPM_GPIO_AF GPIO_AF_TIM3
#define TRAINER_MODULE_SBUS_GPIO_AF GPIO_AF_USART6
#define TRAINER_MODULE_SBUS_USART USART6
#define TRAINER_MODULE_SBUS_GPIO INTMODULE_HEARTBEAT_GPIO
#define TRAINER_MODULE_SBUS_GPIO_PIN INTMODULE_HEARTBEAT_GPIO_PIN
#define TRAINER_MODULE_SBUS_GPIO_PinSource INTMODULE_HEARTBEAT_EXTI_PinSource
#define TRAINER_MODULE_SBUS_DMA_STREAM DMA2_Stream1
#define TRAINER_MODULE_SBUS_DMA_CHANNEL DMA_Channel_5
#define TRAINER_MODULE_RCC_AHB1Periph RCC_AHB1Periph_GPIOC
#define TRAINER_MODULE_RCC_APB2Periph RCC_APB2Periph_USART6
#define TRAINER_MODULE_RCC_APB1Periph RCC_APB1Periph_TIM3
#define TRAINER_MODULE_CPPM_TIMER TRAINER_TIMER
#define TRAINER_MODULE_CPPM_GPIO INTMODULE_HEARTBEAT_GPIO
#define TRAINER_MODULE_CPPM_GPIO_PIN INTMODULE_HEARTBEAT_GPIO_PIN
#define TRAINER_MODULE_CPPM_GPIO_PinSource INTMODULE_HEARTBEAT_EXTI_PinSource
#define TRAINER_MODULE_CPPM_INTERRUPT_ENABLE TIM_DIER_CC2IE
#define TRAINER_MODULE_CPPM_INTERRUPT_FLAG TIM_SR_CC2IF
#define TRAINER_MODULE_CPPM_CCMR1 (TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0)
#define TRAINER_MODULE_CPPM_CCER TIM_CCER_CC2E
#define TRAINER_MODULE_CPPM_COUNTER_REGISTER TRAINER_TIMER->CCR2
#define TRAINER_MODULE_CPPM_TIMER_IRQn TRAINER_TIMER_IRQn
#define TRAINER_MODULE_CPPM_GPIO_AF GPIO_AF_TIM3
#define TRAINER_MODULE_SBUS_GPIO_AF GPIO_AF_USART6
#define TRAINER_MODULE_SBUS_USART USART6
#define TRAINER_MODULE_SBUS_GPIO INTMODULE_HEARTBEAT_GPIO
#define TRAINER_MODULE_SBUS_GPIO_PIN INTMODULE_HEARTBEAT_GPIO_PIN
#define TRAINER_MODULE_SBUS_GPIO_PinSource INTMODULE_HEARTBEAT_EXTI_PinSource
#define TRAINER_MODULE_SBUS_DMA_STREAM DMA2_Stream1
#define TRAINER_MODULE_SBUS_DMA_CHANNEL DMA_Channel_5
#endif
// USB