[X9D] Trainer driver
[X9D] Audio started
This commit is contained in:
+1
-1
@@ -496,7 +496,7 @@ ifeq ($(PCB), X9D)
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EEPROMSRC = eeprom_avr.cpp # TODO later eeprom_conversions.cpp
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PULSESSRC = pulses_arm.cpp
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CPPSRC += sky9x/audio.cpp
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CPPSRC += x9d/pwr_driver.cpp x9d/eeprom_driver.cpp x9d/pulses_driver.cpp x9d/keys_driver.cpp x9d/adc_driver.cpp x9d/audio_driver.cpp x9d/delays.cpp x9d/uart.cpp
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CPPSRC += x9d/pwr_driver.cpp x9d/eeprom_driver.cpp x9d/pulses_driver.cpp x9d/keys_driver.cpp x9d/adc_driver.cpp x9d/trainer_driver.cpp x9d/audio_driver.cpp x9d/delays.cpp x9d/uart.cpp
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CPPSRC += bmp.cpp monitors_views.cpp
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SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/CMSIS/Device/ST/STM32F2xx/Source/Templates/system_stm32f2xx.c
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SRC += x9d/STM32F2xx_StdPeriph_Lib_V1.1.0/Libraries/STM32F2xx_StdPeriph_Driver/src/stm32f2xx_gpio.c
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@@ -302,10 +302,10 @@ extern "C" void TC3_IRQHandler() //capture ppm in at 2MHz
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// G: We process g_ppmIns immediately here, to make servo movement as smooth as possible
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// while under trainee control
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if (val>4000 && val < 16000) // G: Prioritize reset pulse. (Needed when less than 8 incoming pulses)
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if (val>4000 && val<19000) { // G: Prioritize reset pulse. (Needed when less than 8 incoming pulses)
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ppmInState = 1; // triggered
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else
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{
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}
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else {
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if (ppmInState && ppmInState<=8)
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{
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if (val>800 && val<2200) // if valid pulse-width range
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-105
@@ -1,105 +0,0 @@
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/**
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******************************************************************************
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* @file Project/Audio/Audio.c
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* @author X9D Application Team
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* @version V 0.2
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* @date 12-JULY-2012
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* @brief This file provides drivers foe Audio module.I2S AND GPIO Included.
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******************************************************************************
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*/
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#include "stm32f2xx.h"
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#include "Audio.h"
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#include "hal.h"
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static
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void Audio_GPIO_Init()
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* EnableI2C GPIO clocks */
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RCC_AHB1PeriphClockCmd(CODEC_I2S_GPIO_CLOCK, ENABLE);//GPIOA C
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/* CODEC_I2S pins configuration: WS, SCK and SD pins -----------------------------*/
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_SCK_PIN | CODEC_I2S_SD_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_WS_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_WS_GPIO, &GPIO_InitStructure);
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/* Connect pins to I2S peripheral */
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GPIO_PinAFConfig(CODEC_I2S_WS_GPIO, CODEC_I2S_WS_PINSRC, CODEC_I2S_GPIO_AF);
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GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SCK_PINSRC, CODEC_I2S_GPIO_AF);
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GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SD_PINSRC, CODEC_I2S_GPIO_AF);
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#ifdef CODEC_MCLK_ENABLED
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/* CODEC_I2S pins configuration: MCK pin */
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_MCK_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_MCK_GPIO, &GPIO_InitStructure);
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/* Connect pins to I2S peripheral */
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GPIO_PinAFConfig(CODEC_I2S_MCK_GPIO, CODEC_I2S_MCK_PINSRC, CODEC_I2S_GPIO_AF);
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#endif /* CODEC_MCLK_ENABLED */
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/*CODEC_I2S_MUTE & CODEC_I2S_FLT GPIO CONFIG*/
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_MUTE;// | CODEC_I2S_FLT;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure);
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GPIO_SetBits(CODEC_I2S_GPIO,CODEC_I2S_MUTE);
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// GPIO_SetBits(CODEC_I2S_CTL_GPIO,CODEC_I2S_FLT);
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}
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void I2S2_Init()
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{
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I2S_InitTypeDef I2S_InitStructure;
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Audio_GPIO_Init();
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/*CONFIG the I2S_RCC ,MUST before enabling the I2S APB clock*/
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//PLLI2SN 302,PLLI2SR 2,I2SDIV 53,I2SODD 1,FS 44.1KHZ,16bit,Error 0.0011%
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RCC_PLLI2SConfig(302,2);
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RCC_PLLI2SCmd(ENABLE);
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RCC_I2SCLKConfig(RCC_I2S2CLKSource_PLLI2S);
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/* Enable the CODEC_I2S peripheral clock */
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RCC_APB1PeriphClockCmd(CODEC_I2S_CLK, ENABLE);
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/* CODEC_I2S peripheral configuration */
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SPI_I2S_DeInit(CODEC_I2S);
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I2S_InitStructure.I2S_AudioFreq = AudioFreq;
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I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
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I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
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I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low;//clk 0 when idle state
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I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;
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#ifdef CODEC_MCLK_ENABLED
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable;
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#elif defined(CODEC_MCLK_DISABLED)
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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#else
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#error "No selection for the MCLK output has been defined !"
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#endif /* CODEC_MCLK_ENABLED */
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/* Initialize the I2S peripheral with the structure above */
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I2S_Init(CODEC_I2S, &I2S_InitStructure);
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I2S_Cmd(CODEC_I2S,ENABLE);
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//interrupt
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#ifdef CODEC_USE_INT
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SPI_I2S_ITConfig(CODEC_I2S,SPI_I2S_IT_TXE,ENABLE);
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#elif defined(CODEC_USE_DMA)
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#error "DMA is not initialized"
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#endif
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}
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@@ -1,28 +0,0 @@
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/**
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******************************************************************************
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* @file Project/Audio/Audio.h
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* @author X9D Application Team
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* @version V 0.2
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* @date 12-JULY-2011
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* @brief Header for Audio.c.
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******************************************************************************
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*/
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#ifndef _AUDIO_H_
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#define _AUDIO_H_
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#include "stdint.h"
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#include "Macro_define.h"
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extern const uint16_t AUDIO_SAMPLE[];
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//
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void I2S2_Init();
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typedef struct{
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uint32_t size; //number of chars per font
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uint16_t *base; //font addr
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}A_SAMPLE;
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extern A_SAMPLE demo_sample;
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#endif
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@@ -101,3 +101,94 @@ void setVolume( unsigned char volume )
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void read_volume()
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{
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} */
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static void Audio_GPIO_Init()
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* EnableI2C GPIO clocks */
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RCC_AHB1PeriphClockCmd(CODEC_I2S_GPIO_CLOCK, ENABLE);//GPIOA C
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/* CODEC_I2S pins configuration: WS, SCK and SD pins -----------------------------*/
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_SCK_PIN | CODEC_I2S_SD_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_WS_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_WS_GPIO, &GPIO_InitStructure);
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/* Connect pins to I2S peripheral */
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GPIO_PinAFConfig(CODEC_I2S_WS_GPIO, CODEC_I2S_WS_PINSRC, CODEC_I2S_GPIO_AF);
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GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SCK_PINSRC, CODEC_I2S_GPIO_AF);
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GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SD_PINSRC, CODEC_I2S_GPIO_AF);
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#ifdef CODEC_MCLK_ENABLED
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/* CODEC_I2S pins configuration: MCK pin */
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_MCK_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_MCK_GPIO, &GPIO_InitStructure);
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/* Connect pins to I2S peripheral */
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GPIO_PinAFConfig(CODEC_I2S_MCK_GPIO, CODEC_I2S_MCK_PINSRC, CODEC_I2S_GPIO_AF);
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#endif /* CODEC_MCLK_ENABLED */
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/*CODEC_I2S_MUTE & CODEC_I2S_FLT GPIO CONFIG*/
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GPIO_InitStructure.GPIO_Pin = CODEC_I2S_MUTE;// | CODEC_I2S_FLT;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure);
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GPIO_SetBits(CODEC_I2S_GPIO,CODEC_I2S_MUTE);
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// GPIO_SetBits(CODEC_I2S_CTL_GPIO,CODEC_I2S_FLT);
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}
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void audioInit()
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{
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I2S_InitTypeDef I2S_InitStructure;
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Audio_GPIO_Init();
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/*CONFIG the I2S_RCC ,MUST before enabling the I2S APB clock*/
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//PLLI2SN 302,PLLI2SR 2,I2SDIV 53,I2SODD 1,FS 44.1KHZ,16bit,Error 0.0011%
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RCC_PLLI2SConfig(302,2);
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RCC_PLLI2SCmd(ENABLE);
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RCC_I2SCLKConfig(RCC_I2S2CLKSource_PLLI2S);
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/* Enable the CODEC_I2S peripheral clock */
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RCC_APB1PeriphClockCmd(CODEC_I2S_CLK, ENABLE);
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/* CODEC_I2S peripheral configuration */
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SPI_I2S_DeInit(CODEC_I2S);
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I2S_InitStructure.I2S_AudioFreq = AudioFreq;
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I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
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I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
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I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low;//clk 0 when idle state
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I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;
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#ifdef CODEC_MCLK_ENABLED
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable;
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#elif defined(CODEC_MCLK_DISABLED)
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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#else
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#error "No selection for the MCLK output has been defined !"
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#endif /* CODEC_MCLK_ENABLED */
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/* Initialize the I2S peripheral with the structure above */
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I2S_Init(CODEC_I2S, &I2S_InitStructure);
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I2S_Cmd(CODEC_I2S,ENABLE);
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//interrupt
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#ifdef CODEC_USE_INT
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SPI_I2S_ITConfig(CODEC_I2S,SPI_I2S_IT_TXE,ENABLE);
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#elif defined(CODEC_USE_DMA)
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#error "DMA is not initialized"
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#endif
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}
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@@ -169,6 +169,13 @@ void boardInit()
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keysInit();
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adcInit();
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delaysInit();
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audioInit();
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// TODO init_ppm() ;
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init_trainer_ppm() ;
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init_trainer_capture() ;
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init5msTimer();
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+4
-1
@@ -123,8 +123,11 @@ void pwrInit();
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void eepromInit(); // TODO check it's not in another include
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void delaysInit();
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void adcInit();
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void adcRead();
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void audioInit();
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void adcRead();
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void init_trainer_ppm();
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void init_trainer_capture();
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extern volatile uint16_t Analog_values[];
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#define DEBUG_UART_BAUDRATE 115200
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+8
-1
@@ -70,9 +70,16 @@
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#define PIN_SPORT_RX GPIO_Pin_6 //PD.06
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// Trainer Port
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#define PIN_TR_PPM_IN GPIO_Pin_8 //PC.08
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#define PIN_TR_PPM_IN GPIO_Pin_5 //PC.08
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#define PIN_TR_PPM_OUT GPIO_Pin_9 //PC.09
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// TODO merge these constants
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#define PIN_PER_3 0x030
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// #define PIN_OS2 0x0000
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#define PIN_OS25 0x2000
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// #define PIN_OS50 0x4000
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// #define PIN_OS100 0x6000
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// Cppm
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#define RCC_AHB1Periph_GPIOCPPM RCC_AHB1Periph_GPIOA
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#define PIN_CPPM_OUT GPIO_Pin_8 //PA.08
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@@ -0,0 +1,177 @@
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/*
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* Authors (alphabetical order)
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* - Andre Bernet <bernet.andre@gmail.com>
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* - Bertrand Songis <bsongis@gmail.com>
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* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
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* - Cameron Weeks <th9xer@gmail.com>
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* - Erez Raviv
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* - Jean-Pierre Parisy
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* - Karl Szmutny <shadow@privy.de>
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* - Michael Blandford
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* - Michal Hlavinka
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* - Pat Mackenzie
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* - Philip Moss
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* - Rob Thomson
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* - Romolo Manfredini <romolo.manfredini@gmail.com>
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* - Thomas Husterer
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*
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* open9x is based on code named
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* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
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* er9x by Erez Raviv: http://code.google.com/p/er9x/,
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* and the original (and ongoing) project by
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* Thomas Husterer, th9x: http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
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*
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*/
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#include "../open9x.h"
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uint16_t TrainerPpmStream[20] =
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{
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2000,
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2200,
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2400,
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2600,
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2800,
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3000,
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3200,
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3400,
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45000-21600,
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0,0,0,0,0,0,0,0,0,0,0
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};
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uint16_t * TrainerPulsePtr;
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void setupTrainerPulses()
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{
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int16_t PPM_range = g_model.extendedLimits ? 640 * 2 : 512 * 2; //range of 0.7..1.7msec
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uint16_t *ptr ;
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uint32_t p=8+g_model.ppmNCH*2; //Channels *2
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ptr = TrainerPpmStream ;
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uint32_t rest = 22500u * 2; //Minimum Framelen=22.5 ms
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rest += int32_t(g_model.ppmFrameLength) * 1000;
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for (uint32_t i = 0 ; i < p ; i += 1 ) {
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uint32_t pulse = limit((int16_t)-PPM_range, g_chans512[i], (int16_t)PPM_range) + 2*PPM_CH_CENTER(i);
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rest -= pulse ;
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*ptr++ = pulse ;
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}
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*ptr++ = rest ;
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*ptr = 0 ;
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TIM8->CCR2 = rest - 1000 ; // Update time
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TIM8->CCR4 = (g_model.ppmDelay*50+300)*2 ;
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}
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// Trainer PPM oputput PC9, Timer 8 channel 4
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void init_trainer_ppm()
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{
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setupTrainerPulses() ;
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TrainerPulsePtr = TrainerPpmStream ;
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RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
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configure_pins( 0x0200, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_3 | PIN_OS25 | PIN_PUSHPULL ) ;
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RCC->APB2ENR |= RCC_APB2ENR_TIM8EN ; // Enable clock
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TIM8->ARR = *TrainerPulsePtr++ ;
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TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
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TIM8->CCER = TIM_CCER_CC4E ;
|
||||
TIM8->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
|
||||
TIM8->CCR4 = 600 ; // 300 uS pulse
|
||||
TIM8->BDTR = TIM_BDTR_MOE ;
|
||||
TIM8->EGR = 1 ;
|
||||
TIM8->DIER = TIM_DIER_UDE ;
|
||||
|
||||
TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
|
||||
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
|
||||
TIM8->DIER |= TIM_DIER_CC2IE ;
|
||||
TIM8->DIER |= TIM_DIER_UIE ;
|
||||
|
||||
TIM8->CR1 = TIM_CR1_CEN ;
|
||||
NVIC_EnableIRQ(TIM8_CC_IRQn) ;
|
||||
NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn) ;
|
||||
}
|
||||
|
||||
extern "C" void TIM8_CC_IRQHandler()
|
||||
{
|
||||
TIM8->DIER &= ~TIM_DIER_CC2IE ; // stop this interrupt
|
||||
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear flag
|
||||
|
||||
setupTrainerPulses() ;
|
||||
|
||||
TrainerPulsePtr = TrainerPpmStream ;
|
||||
TIM8->DIER |= TIM_DIER_UDE ;
|
||||
|
||||
TIM8->SR &= ~TIM_SR_UIF ; // Clear this flag
|
||||
TIM8->DIER |= TIM_DIER_UIE ; // Enable this interrupt
|
||||
}
|
||||
|
||||
extern "C" void TIM8_UP_TIM13_IRQHandler()
|
||||
{
|
||||
TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
|
||||
|
||||
TIM8->ARR = *TrainerPulsePtr++ ;
|
||||
if ( *TrainerPulsePtr == 0 )
|
||||
{
|
||||
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear this flag
|
||||
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
|
||||
}
|
||||
}
|
||||
|
||||
// Trainer capture, PC8, Timer 3 channel 3
|
||||
void init_trainer_capture()
|
||||
{
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
|
||||
configure_pins( 0x0100, PIN_PERIPHERAL | PIN_PORTC | PIN_TR_PPM_IN ) ;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN ; // Enable clock
|
||||
|
||||
TIM3->ARR = 0xFFFF ;
|
||||
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
|
||||
TIM3->CR2 = 0 ;
|
||||
TIM3->CCMR2 = TIM_CCMR2_IC3F_0 | TIM_CCMR2_IC3F_1 | TIM_CCMR2_CC3S_0 ;
|
||||
TIM3->CCER = TIM_CCER_CC3E ;
|
||||
TIM3->SR &= ~TIM_SR_CC3IF ; // Clear flag
|
||||
TIM3->DIER |= TIM_DIER_CC3IE ;
|
||||
TIM3->CR1 = TIM_CR1_CEN ;
|
||||
NVIC_EnableIRQ(TIM3_IRQn) ;
|
||||
}
|
||||
|
||||
|
||||
extern "C" void TIM3_IRQHandler()
|
||||
{
|
||||
uint16_t capture ;
|
||||
static uint16_t lastCapt ;
|
||||
uint16_t val ;
|
||||
|
||||
capture = TIM3->CCR3 ;
|
||||
|
||||
val = (uint16_t)(capture - lastCapt) / 2 ;
|
||||
lastCapt = capture;
|
||||
|
||||
// We prcoess g_ppmInsright here to make servo movement as smooth as possible
|
||||
// while under trainee control
|
||||
if ((val>4000) && (val < 19000)) { // G: Prioritize reset pulse. (Needed when less than 8 incoming pulses)
|
||||
ppmInState = 1; // triggered
|
||||
}
|
||||
else {
|
||||
if(ppmInState && (ppmInState<=8)) {
|
||||
if ((val>800) && (val<2200)) {
|
||||
g_ppmIns[ppmInState++ - 1] = (int16_t)(val - 1500)*(g_eeGeneral.PPM_Multiplier+10)/10; //+-500 != 512, but close enough.
|
||||
}
|
||||
else {
|
||||
ppmInState = 0; // not triggered
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user