[Taranis X9E] PLL fix

radio/src/targets/taranis/STM32F4xx_DSP_StdPeriph_Lib_V1.4.0/Libraries/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c

@@ -313,7 +313,11 @@
 /************************* PLL Parameters *************************************/
 #if defined (STM32F40_41xxx) || defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx)
 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
+#if defined(REV9E)
+#define PLL_M      12
+#else
 #define PLL_M      25
+#endif
 #else /* STM32F411xE */
 #if defined (USE_HSE_BYPASS)
 #define PLL_M      8    

radio/src/targets/taranis/audio_driver.cpp

@@ -47,10 +47,6 @@ bool dacIdle = true;
 
 void setSampleRate(uint32_t frequency)
 {
-#if defined(REV9E)
-  frequency *= 2;
-#endif
-
   register uint32_t timer = (PERI1_FREQUENCY * TIMER_MULT_APB1) / frequency - 1 ;         // MCK/8 and 100 000 Hz
 
   TIM6->CR1 &= ~TIM_CR1_CEN ;