Move Horus GT911 driver to HAL
This commit is contained in:
Raphael Coeffic
committed by
Raphael Coeffic
Raphael Coeffic
parent
35e14ff83e
commit
bc6c53681c
@@ -21,7 +21,9 @@
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#pragma once
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#include "board_common.h"
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// Avoid using any other header file
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#include <stdint.h>
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extern uint32_t SystemCoreClock;
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#define configUSE_PREEMPTION 1
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#define configUSE_IDLE_HOOK 0
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@@ -23,7 +23,6 @@
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#define _RTOS_H_
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#include "definitions.h"
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#include "board.h"
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#ifdef __cplusplus
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extern "C++" {
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@@ -37,6 +37,8 @@ set(FIRMWARE_TARGET_SRC
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../common/arm/stm32/flash_driver.cpp
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../common/arm/stm32/usbd_storage_msd.cpp
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../common/arm/stm32/usbd_hid_joystick.c
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../common/arm/stm32/stm32_hal.cpp
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../common/arm/stm32/stm32_i2c_driver.cpp
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)
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if(AUX_SERIAL OR AUX2_SERIAL)
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@@ -122,16 +122,13 @@ static inline uint32_t ticksNow()
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return DWT->CYCCNT;
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#endif
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}
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void delaysInit();
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void delay_01us(uint32_t count);
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void delay_us(uint32_t count);
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void delay_ms(uint32_t count);
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#ifdef __cplusplus
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}
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#endif
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#include "delays_driver.h"
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#define INIT_KEYS_PINS(GPIO) \
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GPIO_InitStructure.GPIO_Pin = KEYS_ ## GPIO ## _PINS; \
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GPIO_Init(GPIO, &GPIO_InitStructure)
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@@ -209,17 +209,23 @@ void writeEepromBlock()
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void bootloaderInitApp()
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{
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RCC_AHB1PeriphClockCmd(PWR_RCC_AHB1Periph | KEYS_RCC_AHB1Periph |
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LCD_RCC_AHB1Periph | BACKLIGHT_RCC_AHB1Periph |
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AUX_SERIAL_RCC_AHB1Periph | AUX2_SERIAL_RCC_AHB1Periph |
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I2C_B1_RCC_AHB1Periph | KEYS_BACKLIGHT_RCC_AHB1Periph |
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SD_RCC_AHB1Periph, ENABLE);
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LCD_RCC_AHB1Periph | BACKLIGHT_RCC_AHB1Periph |
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AUX_SERIAL_RCC_AHB1Periph |
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AUX2_SERIAL_RCC_AHB1Periph |
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KEYS_BACKLIGHT_RCC_AHB1Periph | SD_RCC_AHB1Periph,
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ENABLE);
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RCC_APB1PeriphClockCmd(ROTARY_ENCODER_RCC_APB1Periph | LCD_RCC_APB1Periph | BACKLIGHT_RCC_APB1Periph |
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INTERRUPT_xMS_RCC_APB1Periph | I2C_B1_RCC_APB1Periph |
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AUX_SERIAL_RCC_APB1Periph | AUX2_SERIAL_RCC_APB1Periph |
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SD_RCC_APB1Periph, ENABLE);
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RCC_APB1PeriphClockCmd(ROTARY_ENCODER_RCC_APB1Periph | LCD_RCC_APB1Periph |
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BACKLIGHT_RCC_APB1Periph |
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INTERRUPT_xMS_RCC_APB1Periph |
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AUX_SERIAL_RCC_APB1Periph |
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AUX2_SERIAL_RCC_APB1Periph | SD_RCC_APB1Periph,
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ENABLE);
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RCC_APB2PeriphClockCmd(LCD_RCC_APB2Periph | BACKLIGHT_RCC_APB2Periph | RCC_APB2Periph_SYSCFG | AUX_SERIAL_RCC_APB2Periph | AUX2_SERIAL_RCC_APB2Periph, ENABLE);
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RCC_APB2PeriphClockCmd(LCD_RCC_APB2Periph | BACKLIGHT_RCC_APB2Periph |
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RCC_APB2Periph_SYSCFG | AUX_SERIAL_RCC_APB2Periph |
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AUX2_SERIAL_RCC_APB2Periph,
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ENABLE);
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pwrInit();
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keysInit();
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@@ -0,0 +1,31 @@
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/*
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* Copyright (C) EdgeTX
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#pragma once
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#include <stdint.h>
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#include "definitions.h"
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EXTERN_C(void delaysInit());
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EXTERN_C(void delay_01us(uint32_t count));
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EXTERN_C(void delay_us(uint32_t count));
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EXTERN_C(void delay_ms(uint32_t count));
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@@ -5,6 +5,7 @@ set(FPU_FLAGS "-mfloat-abi=hard -mfpu=fpv4-sp-d16")
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if(NOT NATIVE_BUILD)
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# STM32 HAL/LL library
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set(STM32CUBE_DIR ${THIRDPARTY_DIR}/STM32F4xx_HAL_Driver)
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include_directories(${STM32CUBE_DIR}/Inc)
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add_library(stm32cube_ll OBJECT EXCLUDE_FROM_ALL
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_gpio.c
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@@ -12,11 +13,15 @@ if(NOT NATIVE_BUILD)
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_dma.c
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_usart.c
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_rcc.c
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${STM32CUBE_DIR}/Src/stm32f4xx_ll_exti.c
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# HAL drivers
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${STM32CUBE_DIR}/Src/stm32f4xx_hal_rcc.c
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${STM32CUBE_DIR}/Src/stm32f4xx_hal_i2c.c
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${STM32CUBE_DIR}/Src/stm32f4xx_hal_i2c_ex.c
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)
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target_compile_options(stm32cube_ll PRIVATE -DUSE_FULL_LL_DRIVER)
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target_include_directories(stm32cube_ll PRIVATE
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${STM32CUBE_DIR}/Inc
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${THIRDPARTY_DIR}/CMSIS/Device/ST/STM32F4xx/Include
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${THIRDPARTY_DIR}/CMSIS/Include)
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@@ -0,0 +1,28 @@
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/*
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* Copyright (C) EdgeTX
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "stm32_hal.h"
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#include "rtos.h"
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extern "C" uint32_t HAL_GetTick(void)
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{
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return RTOS_GET_MS();
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}
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@@ -0,0 +1,31 @@
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/*
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* Copyright (C) EdgeTX
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#pragma once
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extern "C" {
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#if defined(STM32F4)
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#include "CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
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#include "stm32f4xx_hal.h"
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#elif defined(STM32F2)
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#include "stm32f2xx_hal.h"
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#endif
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}
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@@ -29,6 +29,8 @@ extern "C" {
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h"
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#include "STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h"
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#elif defined(STM32F2)
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// Workaround to prevent the other CMSIS header to be included
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@@ -41,5 +43,7 @@ extern "C" {
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_tim.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_dma.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_usart.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_exti.h"
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#include "STM32F2xx_HAL_Driver/Inc/stm32f2xx_ll_system.h"
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#endif
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}
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@@ -0,0 +1,280 @@
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/*
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* Copyright (C) EdgeTX
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "stm32_hal_ll.h"
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#include "stm32_hal.h"
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#include "stm32_i2c_driver.h"
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#include "hal.h"
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#include "debug.h"
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struct _i2c_defs {
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GPIO_TypeDef* GPIOx;
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uint32_t SCL_Pin;
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uint32_t SDA_Pin;
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uint32_t Alternate;
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};
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#if defined(I2C_B1)
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static I2C_HandleTypeDef hi2c1 = {
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.Instance = I2C_B1,
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.Init = { 0, 0, 0, 0, 0, 0, 0, 0 },
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};
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static const _i2c_defs pins_hi2c1 = {
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.GPIOx = I2C_B1_GPIO,
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.SCL_Pin = I2C_B1_SCL_GPIO_PIN,
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.SDA_Pin = I2C_B1_SDA_GPIO_PIN,
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.Alternate = I2C_B1_GPIO_AF,
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};
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#endif
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#if defined(I2C_B2)
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static I2C_HandleTypeDef hi2c2 = {
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.Instance = I2C_B2,
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.Init = { 0, 0, 0, 0, 0, 0, 0, 0 },
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};
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static const _i2c_defs pins_hi2c2 = {
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.GPIOx = I2C_B2_GPIO,
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.SCL_Pin = I2C_B2_SCL_GPIO_PIN,
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.SDA_Pin = I2C_B2_SDA_GPIO_PIN,
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.Alternate = I2C_B2_GPIO_AF,
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};
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#endif
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static I2C_HandleTypeDef* get_i2c_handle(uint8_t bus)
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{
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#if defined(I2C_B1)
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if (bus == I2C_Bus_1) { return &hi2c1; }
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#endif
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#if defined(I2C_B2)
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if (bus == I2C_Bus_2) { return &hi2c2; }
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#endif
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return nullptr;
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}
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int stm32_i2c_init(uint8_t bus, uint32_t clock_rate)
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{
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I2C_HandleTypeDef* h = get_i2c_handle(bus);
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if (!h) return -1;
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I2C_InitTypeDef& init = h->Init;
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if (init.ClockSpeed > 0) {
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if (init.ClockSpeed != clock_rate) return -1;
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return 0;
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}
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init.ClockSpeed = clock_rate;
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init.DutyCycle = I2C_DUTYCYCLE_16_9;
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init.OwnAddress1 = 0;
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init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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init.OwnAddress2 = 0;
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init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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if (HAL_I2C_Init(h) != HAL_OK) {
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TRACE("I2C ERROR: HAL_I2C_Init() failed");
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return -1;
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}
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// Configure Analogue filter
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if (HAL_I2CEx_ConfigAnalogFilter(h, I2C_ANALOGFILTER_ENABLE) != HAL_OK) {
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TRACE("I2C ERROR: HAL_I2CEx_ConfigAnalogFilter() failed");
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return -1;
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}
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// Configure Digital filter
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if (HAL_I2CEx_ConfigDigitalFilter(h, 0) != HAL_OK) {
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TRACE("I2C ERROR: HAL_I2CEx_ConfigDigitalFilter() failed");
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return -1;
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}
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return 1;
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}
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int stm32_i2c_deinit(uint8_t bus)
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{
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I2C_HandleTypeDef* h = get_i2c_handle(bus);
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if (!h) return -1;
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if (HAL_I2C_DeInit(h) != HAL_OK) return -1;
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return 0;
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}
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int stm32_i2c_master_tx(uint8_t bus, uint16_t addr, uint8_t *data, uint16_t len,
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uint32_t timeout)
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{
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I2C_HandleTypeDef* h = get_i2c_handle(bus);
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if (!h) return -1;
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if (HAL_I2C_Master_Transmit(h, addr << 1, data, len, timeout) != HAL_OK) {
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return -1;
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}
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return 0;
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}
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int stm32_i2c_master_rx(uint8_t bus, uint16_t addr, uint8_t *data, uint16_t len,
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uint32_t timeout)
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{
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I2C_HandleTypeDef* h = get_i2c_handle(bus);
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if (!h) return -1;
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if (HAL_I2C_Master_Receive(h, addr << 1, data, len, timeout) != HAL_OK) {
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return -1;
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}
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return 0;
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}
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static int i2c_enable_gpio_clock(GPIO_TypeDef *GPIOx)
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{
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if (GPIOx == GPIOA)
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__HAL_RCC_GPIOA_CLK_ENABLE();
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else if (GPIOx == GPIOB)
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__HAL_RCC_GPIOB_CLK_ENABLE();
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else if (GPIOx == GPIOC)
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__HAL_RCC_GPIOC_CLK_ENABLE();
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else if (GPIOx == GPIOH)
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__HAL_RCC_GPIOH_CLK_ENABLE();
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else
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return -1;
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return 0;
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}
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static int i2c_enable_clock(I2C_TypeDef* instance)
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{
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/* Peripheral clock enable */
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if (instance == I2C1)
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__HAL_RCC_I2C1_CLK_ENABLE();
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else if (instance == I2C2)
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__HAL_RCC_I2C2_CLK_ENABLE();
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else if (instance == I2C3)
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__HAL_RCC_I2C3_CLK_ENABLE();
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else
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return -1;
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return 0;
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}
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static int i2c_disable_clock(I2C_TypeDef* instance)
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{
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/* Peripheral clock disable */
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if (instance == I2C1)
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__HAL_RCC_I2C1_CLK_DISABLE();
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else if (instance == I2C2)
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__HAL_RCC_I2C2_CLK_DISABLE();
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else if (instance == I2C3)
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__HAL_RCC_I2C3_CLK_DISABLE();
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else
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return -1;
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return 0;
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}
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static int i2c_pins_init(const _i2c_defs* def)
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{
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if (i2c_enable_gpio_clock(def->GPIOx) < 0) return -1;
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|
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LL_GPIO_InitTypeDef pinInit;
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LL_GPIO_StructInit(&pinInit);
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pinInit.Pin = def->SCL_Pin | def->SDA_Pin;
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pinInit.Speed = LL_GPIO_SPEED_FREQ_LOW;
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pinInit.Mode = LL_GPIO_MODE_ALTERNATE;
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pinInit.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
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pinInit.Pull = LL_GPIO_PULL_NO;
|
||||
pinInit.Alternate = def->Alternate;
|
||||
|
||||
LL_GPIO_Init(def->GPIOx, &pinInit);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int i2c_pins_deinit(const _i2c_defs* def)
|
||||
{
|
||||
// reconfigure pins as open-drain input
|
||||
LL_GPIO_InitTypeDef pinInit;
|
||||
LL_GPIO_StructInit(&pinInit);
|
||||
|
||||
pinInit.Pin = def->SCL_Pin | def->SDA_Pin;
|
||||
pinInit.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||
pinInit.Mode = LL_GPIO_MODE_INPUT;
|
||||
pinInit.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
|
||||
pinInit.Pull = LL_GPIO_PULL_NO;
|
||||
pinInit.Alternate = 0;
|
||||
|
||||
LL_GPIO_Init(def->GPIOx, &pinInit);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initialize the I2C MSP.
|
||||
* @param h Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_I2C_MspInit(I2C_HandleTypeDef *h)
|
||||
{
|
||||
const _i2c_defs* defs = nullptr;
|
||||
#if defined(I2C_B1)
|
||||
if (h == &hi2c1) { defs = &pins_hi2c1; }
|
||||
#endif
|
||||
#if defined(I2C_B2)
|
||||
if (h == &hi2c2) { defs = &pins_hi2c2; }
|
||||
#endif
|
||||
if (!defs) return;
|
||||
|
||||
if (i2c_pins_init(defs) < 0) {
|
||||
TRACE("I2C ERROR: HAL_I2C_MspInit() I2C_GPIO misconfiguration");
|
||||
return;
|
||||
}
|
||||
|
||||
if (i2c_enable_clock(h->Instance) < 0) {
|
||||
TRACE("I2C ERROR: HAL_I2C_MspInit() I2C misconfiguration");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DeInitialize the I2C MSP.
|
||||
* @param h Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *h)
|
||||
{
|
||||
const _i2c_defs* defs = nullptr;
|
||||
#if defined(I2C_B1)
|
||||
if (h == &hi2c1) { defs = &pins_hi2c1; }
|
||||
#endif
|
||||
#if defined(I2C_B2)
|
||||
if (h == &hi2c2) { defs = &pins_hi2c2; }
|
||||
#endif
|
||||
if (!defs) return;
|
||||
|
||||
if (i2c_disable_clock(h->Instance) < 0) {
|
||||
TRACE("I2C ERROR: HAL_I2C_MspDeInit() I2C misconfiguration");
|
||||
return;
|
||||
}
|
||||
|
||||
i2c_pins_deinit(defs);
|
||||
}
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* Copyright (C) EdgeTX
|
||||
*
|
||||
* Based on code named
|
||||
* opentx - https://github.com/opentx/opentx
|
||||
* th9x - http://code.google.com/p/th9x
|
||||
* er9x - http://code.google.com/p/er9x
|
||||
* gruvin9x - http://code.google.com/p/gruvin9x
|
||||
*
|
||||
* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
enum { I2C_Bus_1 = 0, I2C_Bus_2 };
|
||||
|
||||
// Init I2C bus
|
||||
// @return -1 if error, 0 if already running, 1 otherwise
|
||||
int stm32_i2c_init(uint8_t bus, uint32_t clock_rate);
|
||||
|
||||
// DeInit I2C bus
|
||||
// @return -1 if error, 0 otherwise
|
||||
int stm32_i2c_deinit(uint8_t bus);
|
||||
|
||||
// Transmit in master mode (blocking mode)
|
||||
// @return -1 if error, 0 otherwise
|
||||
int stm32_i2c_master_tx(uint8_t bus, uint16_t addr, uint8_t *data, uint16_t len,
|
||||
uint32_t timeout);
|
||||
|
||||
// Receive in master mode (blocking mode)
|
||||
// @return -1 if error, 0 otherwise
|
||||
int stm32_i2c_master_rx(uint8_t bus, uint16_t addr, uint8_t *data, uint16_t len,
|
||||
uint32_t timeout);
|
||||
@@ -0,0 +1,504 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_conf_template.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration template file.
|
||||
* This file should be copied to the application folder and renamed
|
||||
* to stm32f4xx_hal_conf.h.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_CONF_H
|
||||
#define __STM32F4xx_HAL_CONF_H
|
||||
|
||||
// Include common definitions for Cortex MCUs
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
// #define HAL_MODULE_ENABLED
|
||||
// #define HAL_ADC_MODULE_ENABLED
|
||||
// #define HAL_CAN_MODULE_ENABLED
|
||||
// #define HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
// #define HAL_CRC_MODULE_ENABLED
|
||||
// #define HAL_CEC_MODULE_ENABLED
|
||||
// #define HAL_CRYP_MODULE_ENABLED
|
||||
// #define HAL_DAC_MODULE_ENABLED
|
||||
// #define HAL_DCMI_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
// #define HAL_DMA2D_MODULE_ENABLED
|
||||
// #define HAL_ETH_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
// #define HAL_NAND_MODULE_ENABLED
|
||||
// #define HAL_NOR_MODULE_ENABLED
|
||||
// #define HAL_PCCARD_MODULE_ENABLED
|
||||
// #define HAL_SRAM_MODULE_ENABLED
|
||||
// #define HAL_SDRAM_MODULE_ENABLED
|
||||
// #define HAL_HASH_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
// #define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
// #define HAL_SMBUS_MODULE_ENABLED
|
||||
// #define HAL_I2S_MODULE_ENABLED
|
||||
// #define HAL_IWDG_MODULE_ENABLED
|
||||
// #define HAL_LTDC_MODULE_ENABLED
|
||||
// #define HAL_DSI_MODULE_ENABLED
|
||||
// #define HAL_PWR_MODULE_ENABLED
|
||||
// #define HAL_QSPI_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
// #define HAL_RNG_MODULE_ENABLED
|
||||
// #define HAL_RTC_MODULE_ENABLED
|
||||
// #define HAL_SAI_MODULE_ENABLED
|
||||
// #define HAL_SD_MODULE_ENABLED
|
||||
// #define HAL_SPI_MODULE_ENABLED
|
||||
// #define HAL_TIM_MODULE_ENABLED
|
||||
// #define HAL_UART_MODULE_ENABLED
|
||||
// #define HAL_USART_MODULE_ENABLED
|
||||
// #define HAL_IRDA_MODULE_ENABLED
|
||||
// #define HAL_SMARTCARD_MODULE_ENABLED
|
||||
// #define HAL_WWDG_MODULE_ENABLED
|
||||
// #define HAL_CORTEX_MODULE_ENABLED
|
||||
// #define HAL_PCD_MODULE_ENABLED
|
||||
// #define HAL_HCD_MODULE_ENABLED
|
||||
// #define HAL_FMPI2C_MODULE_ENABLED
|
||||
// #define HAL_FMPSMBUS_MODULE_ENABLED
|
||||
// #define HAL_SPDIFRX_MODULE_ENABLED
|
||||
// #define HAL_DFSDM_MODULE_ENABLED
|
||||
// #define HAL_LPTIM_MODULE_ENABLED
|
||||
// #define HAL_MMC_MODULE_ENABLED
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
|
||||
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
|
||||
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
|
||||
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
|
||||
#define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
|
||||
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
|
||||
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
|
||||
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848 PHY Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY 0x000000FFU
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY 0x00000FFFU
|
||||
|
||||
#define PHY_READ_TO 0x0000FFFFU
|
||||
#define PHY_WRITE_TO 0x0000FFFFU
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
|
||||
#define PHY_SR ((uint16_t)0x0010) /*!< PHY status register Offset */
|
||||
#define PHY_MICR ((uint16_t)0x0011) /*!< MII Interrupt Control Register */
|
||||
#define PHY_MISR ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */
|
||||
|
||||
#define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
|
||||
|
||||
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
|
||||
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
|
||||
|
||||
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
|
||||
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 1U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPI2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpi2c.h"
|
||||
#endif /* HAL_FMPI2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPSMBUS_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpsmbus.h"
|
||||
#endif /* HAL_FMPSMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -246,7 +246,7 @@ endif()
|
||||
set(GVAR_SCREEN model_gvars.cpp)
|
||||
|
||||
if(HARDWARE_TOUCH)
|
||||
set(TOUCH_DRIVER tp_gt911.cpp i2c_driver.cpp)
|
||||
set(TOUCH_DRIVER tp_gt911.cpp)
|
||||
add_definitions(-DHARDWARE_TOUCH)
|
||||
endif()
|
||||
|
||||
|
||||
@@ -113,11 +113,7 @@ void boardInit()
|
||||
#if defined(RADIO_FAMILY_T16)
|
||||
FLYSKY_HALL_RCC_AHB1Periph |
|
||||
#endif
|
||||
#if defined(IMU_LSM6DS33)
|
||||
I2C_B2_RCC_AHB1Periph |
|
||||
#else
|
||||
AUX_SERIAL_RCC_AHB1Periph |
|
||||
#endif
|
||||
AUX2_SERIAL_RCC_AHB1Periph |
|
||||
TELEMETRY_RCC_AHB1Periph |
|
||||
TRAINER_RCC_AHB1Periph |
|
||||
@@ -126,7 +122,6 @@ void boardInit()
|
||||
HAPTIC_RCC_AHB1Periph |
|
||||
INTMODULE_RCC_AHB1Periph |
|
||||
EXTMODULE_RCC_AHB1Periph |
|
||||
I2C_B1_RCC_AHB1Periph |
|
||||
SPORT_UPDATE_RCC_AHB1Periph |
|
||||
TOUCH_INT_RCC_AHB1Periph |
|
||||
TOUCH_RST_RCC_AHB1Periph,
|
||||
@@ -140,18 +135,13 @@ void boardInit()
|
||||
#if defined(RADIO_FAMILY_T16)
|
||||
FLYSKY_HALL_RCC_APB1Periph |
|
||||
#endif
|
||||
#if defined(IMU_LSM6DS33)
|
||||
I2C_B2_RCC_APB1Periph |
|
||||
#else
|
||||
AUX_SERIAL_RCC_APB1Periph |
|
||||
#endif
|
||||
AUX2_SERIAL_RCC_APB1Periph |
|
||||
TELEMETRY_RCC_APB1Periph |
|
||||
TRAINER_RCC_APB1Periph |
|
||||
AUDIO_RCC_APB1Periph |
|
||||
INTMODULE_RCC_APB1Periph |
|
||||
EXTMODULE_RCC_APB1Periph |
|
||||
I2C_B1_RCC_APB1Periph |
|
||||
MIXER_SCHEDULER_TIMER_RCC_APB1Periph |
|
||||
BACKLIGHT_RCC_APB1Periph,
|
||||
ENABLE);
|
||||
|
||||
@@ -693,16 +693,19 @@
|
||||
|
||||
// Touch
|
||||
#if defined(HARDWARE_TOUCH)
|
||||
#define TOUCH_I2C_BUS I2C_Bus_1
|
||||
#define TOUCH_I2C_CLK_RATE 400000
|
||||
|
||||
#define TOUCH_INT_RCC_AHB1Periph RCC_AHB1Periph_GPIOH
|
||||
#define TOUCH_INT_GPIO GPIOH
|
||||
#define TOUCH_INT_GPIO_PIN GPIO_Pin_2 // PH.02
|
||||
#define TOUCH_INT_GPIO_PIN LL_GPIO_PIN_2 // PH.02
|
||||
|
||||
#define TOUCH_RST_RCC_AHB1Periph RCC_AHB1Periph_GPIOF
|
||||
#define TOUCH_RST_GPIO GPIOF
|
||||
#if defined(PCBX12S)
|
||||
#define TOUCH_RST_GPIO_PIN GPIO_Pin_7 // PF.7
|
||||
#define TOUCH_RST_GPIO_PIN LL_GPIO_PIN_7 // PF.7
|
||||
#else
|
||||
#define TOUCH_RST_GPIO_PIN GPIO_Pin_10 // PF.10
|
||||
#define TOUCH_RST_GPIO_PIN LL_GPIO_PIN_10 // PF.10
|
||||
#endif
|
||||
#define TOUCH_INT_EXTI_LINE1 EXTI_Line2
|
||||
#define TOUCH_INT_EXTI_IRQn1 EXTI2_IRQn
|
||||
@@ -710,7 +713,11 @@
|
||||
#define TOUCH_INT_EXTI_PortSource EXTI_PortSourceGPIOH
|
||||
#define TOUCH_INT_EXTI_PinSource1 EXTI_PinSource2
|
||||
|
||||
#define TOUCH_INT_STATUS() (GPIO_ReadInputDataBit(TOUCH_INT_GPIO, TOUCH_INT_GPIO_PIN))
|
||||
#define TOUCH_INT_EXTI_Line LL_EXTI_LINE_2
|
||||
#define TOUCH_INT_EXTI_Port LL_SYSCFG_EXTI_PORTH
|
||||
#define TOUCH_INT_EXTI_SysCfgLine LL_SYSCFG_EXTI_LINE2
|
||||
#define TOUCH_INT_EXTI_IRQn EXTI2_IRQn
|
||||
#define TOUCH_INT_EXTI_IRQHandler EXTI2_IRQHandler
|
||||
#else
|
||||
#define TOUCH_INT_RCC_AHB1Periph 0
|
||||
#define TOUCH_RST_RCC_AHB1Periph 0
|
||||
@@ -718,39 +725,26 @@
|
||||
|
||||
// First I2C Bus
|
||||
#if defined(RADIO_T18)
|
||||
#define I2C_B1_RCC_AHB1Periph RCC_AHB1Periph_GPIOH
|
||||
#define I2C_B1_RCC_APB1Periph RCC_APB1Periph_I2C3
|
||||
#define I2C_B1 I2C3
|
||||
#define I2C_B1_GPIO GPIOH
|
||||
#define I2C_B1_SCL_GPIO_PIN GPIO_Pin_7 // PH.07
|
||||
#define I2C_B1_SDA_GPIO_PIN GPIO_Pin_8 // PH.08
|
||||
#define I2C_B1_GPIO_AF GPIO_AF_I2C3
|
||||
#define I2C_B1_SCL_GPIO_PinSource GPIO_PinSource7
|
||||
#define I2C_B1_SDA_GPIO_PinSource GPIO_PinSource8
|
||||
#define I2C_B1_SCL_GPIO_PIN LL_GPIO_PIN_7 // PH.07
|
||||
#define I2C_B1_SDA_GPIO_PIN LL_GPIO_PIN_8 // PH.08
|
||||
#define I2C_B1_GPIO_AF LL_GPIO_AF_4 // I2C3
|
||||
#else
|
||||
#define I2C_B1_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
|
||||
#define I2C_B1_RCC_APB1Periph RCC_APB1Periph_I2C1
|
||||
#define I2C_B1 I2C1
|
||||
#define I2C_B1_GPIO GPIOB
|
||||
#define I2C_B1_SCL_GPIO_PIN GPIO_Pin_8 // PB.08
|
||||
#define I2C_B1_SDA_GPIO_PIN GPIO_Pin_9 // PB.09
|
||||
#define I2C_B1_GPIO_AF GPIO_AF_I2C1
|
||||
#define I2C_B1_SCL_GPIO_PinSource GPIO_PinSource8
|
||||
#define I2C_B1_SDA_GPIO_PinSource GPIO_PinSource9
|
||||
#define I2C_B1_SCL_GPIO_PIN LL_GPIO_PIN_8 // PB.08
|
||||
#define I2C_B1_SDA_GPIO_PIN LL_GPIO_PIN_9 // PB.09
|
||||
#define I2C_B1_GPIO_AF LL_GPIO_AF_4 // I2C1
|
||||
#endif
|
||||
#define I2C_B1_CLK_RATE 400000
|
||||
|
||||
// Second I2C Bus
|
||||
#if defined(RADIO_TX16S) && defined(IMU_LSM6DS33)
|
||||
#define I2C_B2_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
|
||||
#define I2C_B2_RCC_APB1Periph RCC_APB1Periph_I2C2
|
||||
#define I2C_B2 I2C2
|
||||
#define I2C_B2_GPIO GPIOB
|
||||
#define I2C_B2_SCL_GPIO_PIN GPIO_Pin_10 // PB.10
|
||||
#define I2C_B2_SDA_GPIO_PIN GPIO_Pin_11 // PB.11
|
||||
#define I2C_B2_GPIO_AF GPIO_AF_I2C2
|
||||
#define I2C_B2_SCL_GPIO_PinSource GPIO_PinSource10
|
||||
#define I2C_B2_SDA_GPIO_PinSource GPIO_PinSource11
|
||||
#define I2C_B2_SCL_GPIO_PIN LL_GPIO_PIN_10 // PB.10
|
||||
#define I2C_B2_SDA_GPIO_PIN LL_GPIO_PIN_11 // PB.11
|
||||
#define I2C_B2_GPIO_AF LL_GPIO_AF_4 // I2C2
|
||||
#define I2C_B2_CLK_RATE 100000
|
||||
#define AUX_I2C_B2_PWR_GPIO GPIOA
|
||||
#define AUX_I2C_B2_PWR_GPIO_PIN GPIO_Pin_15 // PA.15
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,475 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) EdgeTX
|
||||
*
|
||||
* Based on code named
|
||||
* OpenTX - https://github.com/opentx/opentx
|
||||
* th9x - http://code.google.com/p/th9x
|
||||
* er9x - http://code.google.com/p/er9x
|
||||
* gruvin9x - http://code.google.com/p/gruvin9x
|
||||
*
|
||||
* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* The content of this file partially stems from STM32F4 HAL by STMicroelectronics.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define __IO volatile /*!< Defines 'read / write' permissions */
|
||||
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
|
||||
#define GPIO_NUMBER 16U
|
||||
|
||||
#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
|
||||
((__GPIOx__) == (GPIOB))? 1U :\
|
||||
((__GPIOx__) == (GPIOC))? 2U :\
|
||||
((__GPIOx__) == (GPIOD))? 3U :\
|
||||
((__GPIOx__) == (GPIOE))? 4U :\
|
||||
((__GPIOx__) == (GPIOF))? 5U :\
|
||||
((__GPIOx__) == (GPIOG))? 6U :\
|
||||
((__GPIOx__) == (GPIOH))? 7U :\
|
||||
((__GPIOx__) == (GPIOI))? 8U :\
|
||||
((__GPIOx__) == (GPIOJ))? 9U : 10U)
|
||||
|
||||
#define HAL_MAX_DELAY 0xFFFFFFFFU
|
||||
|
||||
/* AHB1 Peripheral Clock Enable Disable
|
||||
* @brief Enable or disable the AHB1 peripheral clock.
|
||||
* @note After reset, the peripheral clock (used for registers read/write access)
|
||||
* is disabled and the application software has to enable this clock before
|
||||
* using it.
|
||||
*/
|
||||
#define __HAL_RCC_GPIOA_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOAEN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
#define __HAL_RCC_GPIOB_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOBEN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
#define __HAL_RCC_GPIOC_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
#define __HAL_RCC_GPIOH_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOHEN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
|
||||
#define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN))
|
||||
#define __HAL_RCC_GPIOB_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOBEN))
|
||||
#define __HAL_RCC_GPIOC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOCEN))
|
||||
#define __HAL_RCC_GPIOH_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOHEN))
|
||||
|
||||
/* APB1 Peripheral Clock Enable Disable
|
||||
* @brief Enable or disable the Low Speed APB (APB1) peripheral clock.
|
||||
* @note After reset, the peripheral clock (used for registers read/write access)
|
||||
* is disabled and the application software has to enable this clock before
|
||||
* using it.
|
||||
*/
|
||||
#define __HAL_RCC_I2C1_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C1EN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
#define __HAL_RCC_I2C2_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
#define __HAL_RCC_I2C3_CLK_ENABLE() do { \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
|
||||
/* Delay after an RCC peripheral clock enabling */ \
|
||||
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C3EN);\
|
||||
UNUSED(tmpreg); \
|
||||
} while(0U)
|
||||
#define __HAL_RCC_I2C1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C1EN))
|
||||
#define __HAL_RCC_I2C2_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C2EN))
|
||||
#define __HAL_RCC_I2C3_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C3EN))
|
||||
|
||||
#define __HAL_LOCK(__HANDLE__) \
|
||||
do{ \
|
||||
if((__HANDLE__)->Lock == HAL_LOCKED) \
|
||||
{ \
|
||||
return HAL_BUSY; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Lock = HAL_LOCKED; \
|
||||
} \
|
||||
}while (0U)
|
||||
|
||||
#define __HAL_UNLOCK(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->Lock = HAL_UNLOCKED; \
|
||||
}while (0U)
|
||||
|
||||
|
||||
/* Enable the specified I2C peripheral.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
|
||||
|
||||
/* Disable the specified I2C peripheral.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
|
||||
|
||||
// I2C Private Constants
|
||||
#define I2C_FLAG_MASK 0x0000FFFFU
|
||||
#define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */
|
||||
#define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */
|
||||
|
||||
#define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
|
||||
#define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
|
||||
#define I2C_TIMEOUT_STOP_FLAG 5U /*!< Timeout 5 ms */
|
||||
#define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
|
||||
|
||||
// I2C Private Macros
|
||||
#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
|
||||
#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
|
||||
#define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
|
||||
#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
|
||||
#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
|
||||
#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
|
||||
#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
|
||||
((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
|
||||
((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
|
||||
#define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
|
||||
#define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
|
||||
|
||||
#define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
|
||||
#define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
|
||||
#define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
|
||||
|
||||
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
|
||||
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
|
||||
|
||||
// I2C duty cycle in fast mode
|
||||
#define I2C_DUTYCYCLE_2 0x00000000U
|
||||
#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
|
||||
|
||||
// I2C addressing mode
|
||||
#define I2C_ADDRESSINGMODE_7BIT 0x00004000U
|
||||
#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
|
||||
|
||||
// I2C dual addressing mode
|
||||
#define I2C_DUALADDRESS_DISABLE 0x00000000U
|
||||
#define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
|
||||
|
||||
// I2C general call addressing mode
|
||||
#define I2C_GENERALCALL_DISABLE 0x00000000U
|
||||
#define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
|
||||
|
||||
// I2C nostretch mode
|
||||
#define I2C_NOSTRETCH_DISABLE 0x00000000U
|
||||
#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
|
||||
|
||||
// I2C Error Code definition
|
||||
#define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */
|
||||
#define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */
|
||||
#define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */
|
||||
#define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */
|
||||
#define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */
|
||||
#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
|
||||
#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
|
||||
#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
|
||||
#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */
|
||||
|
||||
// I2C XferOptions definition
|
||||
#define I2C_FIRST_FRAME 0x00000001U
|
||||
#define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
|
||||
#define I2C_NEXT_FRAME 0x00000004U
|
||||
#define I2C_FIRST_AND_LAST_FRAME 0x00000008U
|
||||
#define I2C_LAST_FRAME_NO_STOP 0x00000010U
|
||||
#define I2C_LAST_FRAME 0x00000020U
|
||||
|
||||
// List of XferOptions
|
||||
#define I2C_OTHER_FRAME (0x00AA0000U)
|
||||
#define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
|
||||
|
||||
// I2C states
|
||||
#define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */
|
||||
#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
|
||||
#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
|
||||
#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
|
||||
#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
|
||||
#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
|
||||
|
||||
// I2C Analog Filter
|
||||
#define I2C_ANALOGFILTER_ENABLE 0x00000000U
|
||||
#define I2C_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
|
||||
|
||||
// I2C Memory Address Size
|
||||
#define I2C_MEMADD_SIZE_8BIT 0x00000001U
|
||||
#define I2C_MEMADD_SIZE_16BIT 0x00000010U
|
||||
|
||||
// DMA Error Code
|
||||
#define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */
|
||||
#define HAL_DMA_ERROR_FE 0x00000002U /*!< FIFO error */
|
||||
#define HAL_DMA_ERROR_DME 0x00000004U /*!< Direct Mode error */
|
||||
#define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
|
||||
#define HAL_DMA_ERROR_PARAM 0x00000040U /*!< Parameter error */
|
||||
#define HAL_DMA_ERROR_NO_XFER 0x00000080U /*!< Abort requested with no Xfer ongoing */
|
||||
#define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */
|
||||
|
||||
/* Clears the I2C ADDR pending flag.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
|
||||
do{ \
|
||||
__IO uint32_t tmpreg = 0x00U; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR1; \
|
||||
tmpreg = (__HANDLE__)->Instance->SR2; \
|
||||
UNUSED(tmpreg); \
|
||||
} while(0)
|
||||
|
||||
/* Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @param __FLAG__ specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
|
||||
* @arg I2C_FLAG_AF: Acknowledge failure flag
|
||||
* @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
|
||||
* @arg I2C_FLAG_BERR: Bus error flag
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = (uint16_t)(~((__FLAG__) & I2C_FLAG_MASK)))
|
||||
|
||||
/* Enable or disable the specified I2C interrupts.
|
||||
* @param __HANDLE__ specifies the I2C Handle.
|
||||
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_IT_BUF: Buffer interrupt enable
|
||||
* @arg I2C_IT_EVT: Event interrupt enable
|
||||
* @arg I2C_IT_ERR: Error interrupt enable
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
|
||||
#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
|
||||
|
||||
// DMA Data transfer direction
|
||||
#define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
|
||||
#define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_SxCR_DIR_0) /*!< Memory to peripheral direction */
|
||||
#define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_SxCR_DIR_1) /*!< Memory to memory direction */
|
||||
|
||||
/* Enable the specified DMA Stream.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA_SxCR_EN)
|
||||
|
||||
/* Disable the specified DMA Stream.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA_SxCR_EN)
|
||||
|
||||
// HAL Status structures definition
|
||||
typedef enum
|
||||
{
|
||||
HAL_OK = 0x00U,
|
||||
HAL_ERROR = 0x01U,
|
||||
HAL_BUSY = 0x02U,
|
||||
HAL_TIMEOUT = 0x03U
|
||||
} HAL_StatusTypeDef;
|
||||
|
||||
// HAL lock structures definition
|
||||
typedef enum
|
||||
{
|
||||
HAL_UNLOCKED = 0x00U,
|
||||
HAL_LOCKED = 0x01U
|
||||
} HAL_LockTypeDef;
|
||||
|
||||
/* HAL State structure definition
|
||||
* HAL I2C State value coding follow below described bitmap :
|
||||
* b7-b6 Error information
|
||||
* 00 : No Error
|
||||
* 01 : Abort (Abort user request on going)
|
||||
* 10 : Timeout
|
||||
* 11 : Error
|
||||
* b5 Peripheral initialization status
|
||||
* 0 : Reset (Peripheral not initialized)
|
||||
* 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
|
||||
* b4 (not used)
|
||||
* x : Should be set to 0
|
||||
* b3
|
||||
* 0 : Ready or Busy (No Listen mode ongoing)
|
||||
* 1 : Listen (Peripheral in Address Listen Mode)
|
||||
* b2 Intrinsic process state
|
||||
* 0 : Ready
|
||||
* 1 : Busy (Peripheral busy with some configuration or internal operations)
|
||||
* b1 Rx state
|
||||
* 0 : Ready (no Rx operation ongoing)
|
||||
* 1 : Busy (Rx operation ongoing)
|
||||
* b0 Tx state
|
||||
* 0 : Ready (no Tx operation ongoing)
|
||||
* 1 : Busy (Tx operation ongoing)
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
|
||||
HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
|
||||
HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
|
||||
HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
|
||||
HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
|
||||
HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
|
||||
HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
|
||||
process is ongoing */
|
||||
HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
|
||||
process is ongoing */
|
||||
HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
|
||||
HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
|
||||
HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
|
||||
} HAL_I2C_StateTypeDef;
|
||||
|
||||
/* HAL Mode structure definition
|
||||
* HAL I2C Mode value coding follow below described bitmap :
|
||||
* b7 (not used)
|
||||
* x : Should be set to 0
|
||||
* b6
|
||||
* 0 : None
|
||||
* 1 : Memory (HAL I2C communication is in Memory Mode)
|
||||
* b5
|
||||
* 0 : None
|
||||
* 1 : Slave (HAL I2C communication is in Slave Mode)
|
||||
* b4
|
||||
* 0 : None
|
||||
* 1 : Master (HAL I2C communication is in Master Mode)
|
||||
* b3-b2-b1-b0 (not used)
|
||||
* xxxx : Should be set to 0000
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
|
||||
HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
|
||||
HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
|
||||
HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
|
||||
} HAL_I2C_ModeTypeDef;
|
||||
|
||||
// HAL DMA State structures definition
|
||||
typedef enum
|
||||
{
|
||||
HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
|
||||
HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
|
||||
HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
|
||||
HAL_DMA_STATE_TIMEOUT = 0x03U, /*!< DMA timeout state */
|
||||
HAL_DMA_STATE_ERROR = 0x04U, /*!< DMA error state */
|
||||
HAL_DMA_STATE_ABORT = 0x05U, /*!< DMA Abort state */
|
||||
}HAL_DMA_StateTypeDef;
|
||||
|
||||
// DMA handle Structure definition
|
||||
typedef struct __DMA_HandleTypeDef
|
||||
{
|
||||
DMA_Stream_TypeDef *Instance; /*!< Register base address */
|
||||
DMA_InitTypeDef Init; /*!< DMA communication parameters */
|
||||
HAL_LockTypeDef Lock; /*!< DMA locking object */
|
||||
__IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
|
||||
void *Parent; /*!< Parent object state */
|
||||
void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
|
||||
void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
|
||||
void (* XferM1CpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete Memory1 callback */
|
||||
void (* XferM1HalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer Half complete Memory1 callback */
|
||||
void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
|
||||
void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer Abort callback */
|
||||
__IO uint32_t ErrorCode; /*!< DMA Error code */
|
||||
uint32_t StreamBaseAddress; /*!< DMA Stream Base Address */
|
||||
uint32_t StreamIndex; /*!< DMA Stream Index */
|
||||
}DMA_HandleTypeDef;
|
||||
|
||||
|
||||
// I2C configuration structure definition
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ClockSpeed; /*!< Specifies the clock frequency.
|
||||
This parameter must be set to a value lower than 400kHz */
|
||||
uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
|
||||
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
||||
uint32_t OwnAddress1; /*!< Specifies the first device own address.
|
||||
This parameter can be a 7-bit or 10-bit address. */
|
||||
uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
|
||||
This parameter can be a value of @ref I2C_addressing_mode */
|
||||
uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
|
||||
This parameter can be a value of @ref I2C_dual_addressing_mode */
|
||||
uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
|
||||
This parameter can be a 7-bit address. */
|
||||
uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
|
||||
This parameter can be a value of @ref I2C_general_call_addressing_mode */
|
||||
uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
|
||||
This parameter can be a value of @ref I2C_nostretch_mode */
|
||||
} HAL_I2C_InitTypeDef; // WARNING: renamed from I2C_InitTypeDef due to conflict
|
||||
|
||||
// I2C handle structure definition
|
||||
typedef struct
|
||||
{
|
||||
I2C_TypeDef *Instance; /*!< I2C registers base address */
|
||||
HAL_I2C_InitTypeDef Init; /*!< I2C communication parameters (MOD!) */
|
||||
uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
|
||||
uint16_t XferSize; /*!< I2C transfer size */
|
||||
__IO uint16_t XferCount; /*!< I2C transfer counter */
|
||||
__IO uint32_t XferOptions; /*!< I2C transfer options */
|
||||
__IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
|
||||
context for internal usage */
|
||||
DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
|
||||
DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
|
||||
HAL_LockTypeDef Lock; /*!< I2C locking object */
|
||||
__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
|
||||
__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
|
||||
__IO uint32_t ErrorCode; /*!< I2C Error code */
|
||||
__IO uint32_t Devaddress; /*!< I2C Target device address */
|
||||
__IO uint32_t Memaddress; /*!< I2C Target memory address */
|
||||
__IO uint32_t MemaddSize; /*!< I2C Target memory address size */
|
||||
__IO uint32_t EventCount; /*!< I2C Event counter */
|
||||
} I2C_HandleTypeDef;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t ISR; /*!< DMA interrupt status register */
|
||||
__IO uint32_t Reserved0;
|
||||
__IO uint32_t IFCR; /*!< DMA interrupt flag clear register */
|
||||
} DMA_Base_Registers;
|
||||
|
||||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
|
||||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||
@@ -19,9 +19,27 @@
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include "opentx.h"
|
||||
#include "i2c_driver.h"
|
||||
#include "stm32_hal_ll.h"
|
||||
#include "stm32_i2c_driver.h"
|
||||
|
||||
#include "hal.h"
|
||||
#include "tp_gt911.h"
|
||||
#include "delays_driver.h"
|
||||
|
||||
#include "rtos.h"
|
||||
#include "opentx_types.h"
|
||||
#include "debug.h"
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
#define TP_GT911_ID "911"
|
||||
|
||||
#define TPRST_LOW() LL_GPIO_ResetOutputPin(TOUCH_RST_GPIO, TOUCH_RST_GPIO_PIN)
|
||||
#define TPRST_HIGH() LL_GPIO_SetOutputPin(TOUCH_RST_GPIO, TOUCH_RST_GPIO_PIN)
|
||||
|
||||
#define TPINT_LOW() LL_GPIO_ResetOutputPin(TOUCH_INT_GPIO, TOUCH_INT_GPIO_PIN)
|
||||
#define TPINT_HIGH() LL_GPIO_SetOutputPin(TOUCH_INT_GPIO, TOUCH_INT_GPIO_PIN)
|
||||
|
||||
#if defined (RADIO_T18)
|
||||
const uint8_t TOUCH_GT911_Cfg[] = {
|
||||
@@ -409,160 +427,123 @@ volatile static bool touchEventOccured = false;
|
||||
struct TouchData touchData;
|
||||
uint16_t touchGT911fwver = 0;
|
||||
uint32_t touchGT911hiccups = 0;
|
||||
|
||||
static tmr10ms_t downTime = 0;
|
||||
static tmr10ms_t tapTime = 0;
|
||||
static short tapCount = 0;
|
||||
|
||||
#define TAP_TIME 25
|
||||
|
||||
static I2C_HandleTypeDef hi2c1;
|
||||
|
||||
static TouchState internalTouchState = {};
|
||||
|
||||
static void TOUCH_AF_ExtiStop(void)
|
||||
{
|
||||
SYSCFG_EXTILineConfig(TOUCH_INT_EXTI_PortSource, TOUCH_INT_EXTI_PinSource1);
|
||||
LL_EXTI_InitTypeDef extiInit;
|
||||
LL_EXTI_StructInit(&extiInit);
|
||||
|
||||
EXTI_InitTypeDef EXTI_InitStructure;
|
||||
EXTI_StructInit(&EXTI_InitStructure);
|
||||
EXTI_InitStructure.EXTI_Line = TOUCH_INT_EXTI_LINE1;
|
||||
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
|
||||
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
|
||||
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
|
||||
EXTI_Init(&EXTI_InitStructure);
|
||||
extiInit.Line_0_31 = TOUCH_INT_EXTI_Line;
|
||||
extiInit.Mode = LL_EXTI_MODE_IT;
|
||||
extiInit.Trigger = LL_EXTI_TRIGGER_RISING;
|
||||
extiInit.LineCommand = DISABLE;
|
||||
LL_EXTI_Init(&extiInit);
|
||||
|
||||
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
NVIC_InitStructure.NVIC_IRQChannel = TOUCH_INT_EXTI_IRQn1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 9;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; /* Not used as 4 bits are used for the pre-emption priority. */;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
NVIC_DisableIRQ(TOUCH_INT_EXTI_IRQn);
|
||||
}
|
||||
|
||||
static void TOUCH_AF_ExtiConfig(void)
|
||||
{
|
||||
SYSCFG_EXTILineConfig(TOUCH_INT_EXTI_PortSource, TOUCH_INT_EXTI_PinSource1);
|
||||
LL_SYSCFG_SetEXTISource(TOUCH_INT_EXTI_Port, TOUCH_INT_EXTI_SysCfgLine);
|
||||
|
||||
EXTI_InitTypeDef EXTI_InitStructure;
|
||||
EXTI_StructInit(&EXTI_InitStructure);
|
||||
EXTI_InitStructure.EXTI_Line = TOUCH_INT_EXTI_LINE1;
|
||||
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
|
||||
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
|
||||
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
|
||||
EXTI_Init(&EXTI_InitStructure);
|
||||
LL_EXTI_InitTypeDef extiInit;
|
||||
LL_EXTI_StructInit(&extiInit);
|
||||
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
NVIC_InitStructure.NVIC_IRQChannel = TOUCH_INT_EXTI_IRQn1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 9;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; /* Not used as 4 bits are used for the pre-emption priority. */;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
extiInit.Line_0_31 = TOUCH_INT_EXTI_Line;
|
||||
extiInit.Mode = LL_EXTI_MODE_IT;
|
||||
extiInit.Trigger = LL_EXTI_TRIGGER_RISING;
|
||||
extiInit.LineCommand = ENABLE;
|
||||
LL_EXTI_Init(&extiInit);
|
||||
|
||||
NVIC_SetPriority(TOUCH_INT_EXTI_IRQn, 9);
|
||||
NVIC_EnableIRQ(TOUCH_INT_EXTI_IRQn);
|
||||
}
|
||||
|
||||
static void TOUCH_AF_GPIOConfig(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
GPIO_InitStructure.GPIO_Pin = TOUCH_RST_GPIO_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(TOUCH_RST_GPIO, &GPIO_InitStructure);
|
||||
LL_GPIO_InitTypeDef gpioInit;
|
||||
LL_GPIO_StructInit(&gpioInit);
|
||||
|
||||
GPIO_ResetBits(TOUCH_RST_GPIO, TOUCH_RST_GPIO_PIN);
|
||||
gpioInit.Pin = TOUCH_RST_GPIO_PIN;
|
||||
gpioInit.Mode = LL_GPIO_MODE_OUTPUT;
|
||||
gpioInit.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
||||
gpioInit.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||
gpioInit.Pull = LL_GPIO_PULL_NO;
|
||||
LL_GPIO_Init(TOUCH_RST_GPIO, &gpioInit);
|
||||
LL_GPIO_ResetOutputPin(TOUCH_RST_GPIO, TOUCH_RST_GPIO_PIN);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pin = TOUCH_INT_GPIO_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(TOUCH_INT_GPIO, &GPIO_InitStructure);
|
||||
|
||||
GPIO_ResetBits(TOUCH_INT_GPIO, TOUCH_INT_GPIO_PIN);
|
||||
gpioInit.Pin = TOUCH_INT_GPIO_PIN;
|
||||
LL_GPIO_Init(TOUCH_INT_GPIO, &gpioInit);
|
||||
LL_GPIO_ResetOutputPin(TOUCH_INT_GPIO, TOUCH_INT_GPIO_PIN);
|
||||
}
|
||||
|
||||
void TOUCH_AF_INT_Change(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
LL_GPIO_InitTypeDef gpioInit;
|
||||
LL_GPIO_StructInit(&gpioInit);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pin = TOUCH_INT_GPIO_PIN;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_Init(TOUCH_INT_GPIO, &GPIO_InitStructure);
|
||||
gpioInit.Pin = TOUCH_INT_GPIO_PIN;
|
||||
gpioInit.Mode = LL_GPIO_MODE_INPUT;
|
||||
gpioInit.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
||||
gpioInit.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||
gpioInit.Pull = LL_GPIO_PULL_UP;
|
||||
LL_GPIO_Init(TOUCH_INT_GPIO, &gpioInit);
|
||||
}
|
||||
|
||||
void I2C_Init_Radio(void)
|
||||
{
|
||||
TRACE("I2C B1 Init");
|
||||
|
||||
hi2c1.Instance = I2C_B1;
|
||||
hi2c1.Init.ClockSpeed = I2C_B1_CLK_RATE;
|
||||
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_16_9;
|
||||
hi2c1.Init.OwnAddress1 = 0;
|
||||
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||||
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
||||
hi2c1.Init.OwnAddress2 = 0;
|
||||
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
||||
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
||||
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
||||
{
|
||||
TRACE("I2C B1 ERROR: HAL_I2C_Init() failed");
|
||||
}
|
||||
// Configure Analogue filter
|
||||
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
|
||||
{
|
||||
TRACE("I2C B1 ERROR: HAL_I2CEx_ConfigAnalogFilter() failed");
|
||||
}
|
||||
// Configure Digital filter
|
||||
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
|
||||
{
|
||||
TRACE("I2C B1 ERROR: HAL_I2CEx_ConfigDigitalFilter() failed");
|
||||
if (stm32_i2c_init(TOUCH_I2C_BUS, TOUCH_I2C_CLK_RATE) < 0) {
|
||||
TRACE("GT911 ERROR: stm32_i2c_init failed");
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
bool I2C_GT911_WriteRegister(uint16_t reg, uint8_t * buf, uint8_t len)
|
||||
bool I2C_GT911_WriteRegister(uint16_t reg, uint8_t *buf, uint8_t len)
|
||||
{
|
||||
uint8_t uAddrAndBuf[258];
|
||||
uAddrAndBuf[0] = (uint8_t)((reg & 0xFF00) >> 8);
|
||||
uAddrAndBuf[1] = (uint8_t)(reg & 0x00FF);
|
||||
uint8_t uAddrAndBuf[258];
|
||||
uAddrAndBuf[0] = (uint8_t)((reg & 0xFF00) >> 8);
|
||||
uAddrAndBuf[1] = (uint8_t)(reg & 0x00FF);
|
||||
|
||||
if (len > 0)
|
||||
{
|
||||
for (int i = 0;i < len;i++)
|
||||
{
|
||||
uAddrAndBuf[i + 2] = buf[i];
|
||||
}
|
||||
if (len > 0) {
|
||||
for (int i = 0; i < len; i++) {
|
||||
uAddrAndBuf[i + 2] = buf[i];
|
||||
}
|
||||
}
|
||||
|
||||
if (HAL_I2C_Master_Transmit(&hi2c1, GT911_I2C_ADDR << 1, uAddrAndBuf, len + 2, 100) != HAL_OK)
|
||||
{
|
||||
TRACE("I2C B1 ERROR: WriteRegister failed");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
if (stm32_i2c_master_tx(TOUCH_I2C_BUS, GT911_I2C_ADDR, uAddrAndBuf, len + 2,
|
||||
100) < 0) {
|
||||
TRACE("I2C B1 ERROR: WriteRegister failed");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool I2C_GT911_ReadRegister(uint16_t reg, uint8_t * buf, uint8_t len)
|
||||
bool I2C_GT911_ReadRegister(uint16_t reg, uint8_t *buf, uint8_t len)
|
||||
{
|
||||
uint8_t uRegAddr[2];
|
||||
uRegAddr[0] = (uint8_t)((reg & 0xFF00) >> 8);
|
||||
uRegAddr[1] = (uint8_t)(reg & 0x00FF);
|
||||
uint8_t uRegAddr[2];
|
||||
uRegAddr[0] = (uint8_t)((reg & 0xFF00) >> 8);
|
||||
uRegAddr[1] = (uint8_t)(reg & 0x00FF);
|
||||
|
||||
if (HAL_I2C_Master_Transmit(&hi2c1, GT911_I2C_ADDR << 1, uRegAddr, 2, 10) != HAL_OK)
|
||||
{
|
||||
TRACE("I2C B1 ERROR: ReadRegister write reg address failed");
|
||||
return false;
|
||||
}
|
||||
if (stm32_i2c_master_tx(TOUCH_I2C_BUS, GT911_I2C_ADDR, uRegAddr, 2, 10) < 0) {
|
||||
TRACE("I2C B1 ERROR: ReadRegister write reg address failed");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (HAL_I2C_Master_Receive(&hi2c1, GT911_I2C_ADDR << 1, buf, len, 100) != HAL_OK)
|
||||
{
|
||||
TRACE("I2C B1 ERROR: ReadRegister read reg address failed");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
if (stm32_i2c_master_rx(TOUCH_I2C_BUS, GT911_I2C_ADDR, buf, len, 100) < 0) {
|
||||
TRACE("I2C B1 ERROR: ReadRegister read reg address failed");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool I2C_GT911_SendConfig()
|
||||
@@ -578,14 +559,14 @@ bool I2C_GT911_SendConfig()
|
||||
}
|
||||
|
||||
buf[0] = (~buf[0]) + 1;
|
||||
if (!I2C_GT911_WriteRegister(GT911_CONFIG_REG, (uint8_t *) TOUCH_GT911_Cfg, sizeof(TOUCH_GT911_Cfg)))
|
||||
{
|
||||
if (!I2C_GT911_WriteRegister(GT911_CONFIG_REG, (uint8_t *)TOUCH_GT911_Cfg,
|
||||
sizeof(TOUCH_GT911_Cfg))) {
|
||||
TRACE("GT911 ERROR: write config failed");
|
||||
bResult = false;
|
||||
}
|
||||
|
||||
if (!I2C_GT911_WriteRegister(GT911_CONFIG_CHECKSUM_REG, buf, 2)) //write checksum and config_fresh
|
||||
{
|
||||
// write checksum and config_fresh
|
||||
if (!I2C_GT911_WriteRegister(GT911_CONFIG_CHECKSUM_REG, buf, 2)) {
|
||||
TRACE("GT911 ERROR: write config checksum failed");
|
||||
bResult = false;
|
||||
}
|
||||
@@ -605,11 +586,10 @@ bool touchPanelInit(void)
|
||||
if (touchGT911Flag) {
|
||||
TOUCH_AF_ExtiConfig();
|
||||
return true;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
TRACE("Touchpanel init start ...");
|
||||
|
||||
TOUCH_AF_GPIOConfig(); //SET RST=OUT INT=OUT INT=LOW
|
||||
TOUCH_AF_GPIOConfig(); // SET RST=OUT INT=OUT INT=LOW
|
||||
I2C_Init_Radio();
|
||||
|
||||
TPRST_LOW();
|
||||
@@ -622,53 +602,43 @@ bool touchPanelInit(void)
|
||||
TPINT_LOW();
|
||||
delay_ms(55);
|
||||
|
||||
TOUCH_AF_INT_Change(); //Set INT INPUT INT=LOW
|
||||
TOUCH_AF_INT_Change(); // Set INT INPUT INT=LOW
|
||||
|
||||
delay_ms(50);
|
||||
|
||||
TRACE("Reading Touch registry");
|
||||
if (!I2C_GT911_ReadRegister(GT911_PRODUCT_ID_REG, tmp, 4))
|
||||
{
|
||||
if (!I2C_GT911_ReadRegister(GT911_PRODUCT_ID_REG, tmp, 4)) {
|
||||
TRACE("GT911 ERROR: Product ID read failed");
|
||||
}
|
||||
|
||||
if (strcmp((char *) tmp, "911") == 0) //ID==9147
|
||||
{
|
||||
if (strcmp((char *)tmp, TP_GT911_ID) == 0) {
|
||||
TRACE("GT911 chip detected");
|
||||
tmp[0] = 0X02;
|
||||
if (!I2C_GT911_WriteRegister(GT911_COMMAND_REG, tmp, 1))
|
||||
{
|
||||
TRACE("GT911 ERROR: write to command register failed");
|
||||
if (!I2C_GT911_WriteRegister(GT911_COMMAND_REG, tmp, 1)) {
|
||||
TRACE("GT911 ERROR: write to control register failed");
|
||||
}
|
||||
if (!I2C_GT911_ReadRegister(GT911_CONFIG_REG, tmp, 1))
|
||||
{
|
||||
TRACE("GT911 ERROR: configuration register read failed");
|
||||
if (!I2C_GT911_ReadRegister(GT911_CONFIG_REG, tmp, 1)) {
|
||||
TRACE("GT911 ERROR: configuration register read failed");
|
||||
}
|
||||
|
||||
TRACE("Chip config Ver:%x", tmp[0]);
|
||||
if (tmp[0] < GT911_CFG_NUMBER) //Config ver
|
||||
{
|
||||
if (tmp[0] < GT911_CFG_NUMBER) { // Config ver
|
||||
TRACE("Sending new config %d", GT911_CFG_NUMBER);
|
||||
if (!I2C_GT911_SendConfig())
|
||||
{
|
||||
if (!I2C_GT911_SendConfig()) {
|
||||
TRACE("GT911 ERROR: sending configration failed");
|
||||
}
|
||||
}
|
||||
|
||||
if (!I2C_GT911_ReadRegister(GT911_FIRMWARE_VERSION_REG, tmp, 2))
|
||||
{
|
||||
if (!I2C_GT911_ReadRegister(GT911_FIRMWARE_VERSION_REG, tmp, 2)) {
|
||||
TRACE("GT911 ERROR: reading firmware version failed");
|
||||
}
|
||||
else
|
||||
{
|
||||
touchGT911fwver = (tmp[1] << 8) + tmp[0];
|
||||
TRACE("GT911 FW version: %u", touchGT911fwver);
|
||||
} else {
|
||||
touchGT911fwver = (tmp[1] << 8) + tmp[0];
|
||||
TRACE("GT911 FW version: %u", touchGT911fwver);
|
||||
}
|
||||
|
||||
delay_ms(10);
|
||||
tmp[0] = 0X00;
|
||||
if (!I2C_GT911_WriteRegister(GT911_COMMAND_REG, tmp, 1)) //end reset
|
||||
{
|
||||
if (!I2C_GT911_WriteRegister(GT911_COMMAND_REG, tmp, 1)) { // end reset
|
||||
TRACE("GT911 ERROR: write to command register failed");
|
||||
}
|
||||
touchGT911Flag = true;
|
||||
@@ -684,37 +654,35 @@ bool touchPanelInit(void)
|
||||
|
||||
bool I2C_ReInit(void)
|
||||
{
|
||||
TRACE("I2C B1 ReInit");
|
||||
touchPanelDeInit();
|
||||
if (HAL_I2C_DeInit(&hi2c1) != HAL_OK)
|
||||
TRACE("I2C B1 ReInit - I2C DeInit failed");
|
||||
TRACE("I2C B1 ReInit");
|
||||
touchPanelDeInit();
|
||||
if (stm32_i2c_deinit(TOUCH_I2C_BUS) < 0)
|
||||
TRACE("I2C B1 ReInit - I2C DeInit failed");
|
||||
|
||||
// If DeInit fails, try to re-init anyway
|
||||
if (!touchPanelInit())
|
||||
{
|
||||
TRACE("I2C B1 ReInit - touchPanelInit failed");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
// If DeInit fails, try to re-init anyway
|
||||
if (!touchPanelInit()) {
|
||||
TRACE("I2C B1 ReInit - touchPanelInit failed");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
#if defined(SIMU) || defined(SEMIHOSTING) || defined(DEBUG)
|
||||
static const char* event2str(uint8_t ev)
|
||||
static const char *event2str(uint8_t ev)
|
||||
{
|
||||
switch(ev){
|
||||
case TE_NONE:
|
||||
return "NONE";
|
||||
case TE_UP:
|
||||
return "UP";
|
||||
case TE_DOWN:
|
||||
return "DOWN";
|
||||
case TE_SLIDE_END:
|
||||
return "SLIDE_END";
|
||||
case TE_SLIDE:
|
||||
return "SLIDE";
|
||||
default:
|
||||
return "UNKNOWN";
|
||||
switch (ev) {
|
||||
case TE_NONE:
|
||||
return "NONE";
|
||||
case TE_UP:
|
||||
return "UP";
|
||||
case TE_DOWN:
|
||||
return "DOWN";
|
||||
case TE_SLIDE_END:
|
||||
return "SLIDE_END";
|
||||
case TE_SLIDE:
|
||||
return "SLIDE";
|
||||
default:
|
||||
return "UNKNOWN";
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@@ -723,19 +691,17 @@ struct TouchState touchPanelRead()
|
||||
{
|
||||
uint8_t state = 0;
|
||||
|
||||
if (!touchEventOccured)
|
||||
return internalTouchState;
|
||||
if (!touchEventOccured) return internalTouchState;
|
||||
|
||||
touchEventOccured = false;
|
||||
|
||||
uint32_t startReadStatus = RTOS_GET_MS();
|
||||
do {
|
||||
if (!I2C_GT911_ReadRegister(GT911_READ_XY_REG, &state, 1)) {
|
||||
//ledRed();
|
||||
// ledRed();
|
||||
touchGT911hiccups++;
|
||||
TRACE("GT911 I2C read XY error");
|
||||
if (!I2C_ReInit())
|
||||
TRACE("I2C B1 ReInit failed");
|
||||
if (!I2C_ReInit()) TRACE("I2C B1 ReInit failed");
|
||||
return internalTouchState;
|
||||
}
|
||||
|
||||
@@ -744,24 +710,23 @@ struct TouchState touchPanelRead()
|
||||
break;
|
||||
}
|
||||
RTOS_WAIT_MS(1);
|
||||
} while(RTOS_GET_MS() - startReadStatus < GT911_TIMEOUT);
|
||||
} while (RTOS_GET_MS() - startReadStatus < GT911_TIMEOUT);
|
||||
|
||||
internalTouchState.deltaX = 0;
|
||||
internalTouchState.deltaY = 0;
|
||||
TRACE("touch state = 0x%x", state);
|
||||
if (state & 0x80u) {
|
||||
uint8_t pointsCount = (state & 0x0Fu);
|
||||
tmr10ms_t now = get_tmr10ms();
|
||||
uint32_t now = RTOS_GET_MS();
|
||||
internalTouchState.tapCount = 0;
|
||||
|
||||
if (pointsCount > 0 && pointsCount <= GT911_MAX_TP) {
|
||||
if (!I2C_GT911_ReadRegister(GT911_READ_XY_REG + 1, touchData.data,
|
||||
pointsCount * sizeof(TouchPoint))) {
|
||||
//ledRed();
|
||||
// ledRed();
|
||||
touchGT911hiccups++;
|
||||
TRACE("GT911 I2C data read error");
|
||||
if (!I2C_ReInit())
|
||||
TRACE("I2C B1 ReInit failed");
|
||||
if (!I2C_ReInit()) TRACE("I2C B1 ReInit failed");
|
||||
return internalTouchState;
|
||||
}
|
||||
|
||||
@@ -770,15 +735,20 @@ struct TouchState touchPanelRead()
|
||||
touchData.points[0].y = LCD_H - touchData.points[0].y;
|
||||
#endif
|
||||
|
||||
if (internalTouchState.event == TE_NONE || internalTouchState.event == TE_UP ||
|
||||
if (internalTouchState.event == TE_NONE ||
|
||||
internalTouchState.event == TE_UP ||
|
||||
internalTouchState.event == TE_SLIDE_END) {
|
||||
internalTouchState.event = TE_DOWN;
|
||||
internalTouchState.startX = internalTouchState.x = touchData.points[0].x;
|
||||
internalTouchState.startY = internalTouchState.y = touchData.points[0].y;
|
||||
internalTouchState.startX = internalTouchState.x =
|
||||
touchData.points[0].x;
|
||||
internalTouchState.startY = internalTouchState.y =
|
||||
touchData.points[0].y;
|
||||
downTime = now;
|
||||
} else {
|
||||
internalTouchState.deltaX = touchData.points[0].x - internalTouchState.x;
|
||||
internalTouchState.deltaY = touchData.points[0].y - internalTouchState.y;
|
||||
internalTouchState.deltaX =
|
||||
touchData.points[0].x - internalTouchState.x;
|
||||
internalTouchState.deltaY =
|
||||
touchData.points[0].y - internalTouchState.y;
|
||||
if (internalTouchState.event == TE_SLIDE ||
|
||||
abs(internalTouchState.deltaX) >= SLIDE_RANGE ||
|
||||
abs(internalTouchState.deltaY) >= SLIDE_RANGE) {
|
||||
@@ -792,8 +762,8 @@ struct TouchState touchPanelRead()
|
||||
internalTouchState.event = TE_SLIDE_END;
|
||||
} else if (internalTouchState.event == TE_DOWN) {
|
||||
internalTouchState.event = TE_UP;
|
||||
if (now - downTime <= TAP_TIME) {
|
||||
if (now - tapTime > TAP_TIME)
|
||||
if (now - downTime <= GT911_TAP_TIME) {
|
||||
if (now - tapTime > GT911_TAP_TIME)
|
||||
tapCount = 1;
|
||||
else
|
||||
tapCount++;
|
||||
@@ -807,8 +777,7 @@ struct TouchState touchPanelRead()
|
||||
}
|
||||
|
||||
uint8_t zero = 0;
|
||||
if (!I2C_GT911_WriteRegister(GT911_READ_XY_REG, &zero, 1))
|
||||
{
|
||||
if (!I2C_GT911_WriteRegister(GT911_READ_XY_REG, &zero, 1)) {
|
||||
TRACE("GT911 ERROR: clearing XY register failed");
|
||||
}
|
||||
|
||||
@@ -816,11 +785,15 @@ struct TouchState touchPanelRead()
|
||||
return internalTouchState;
|
||||
}
|
||||
|
||||
extern "C" void TOUCH_INT_EXTI_IRQHandler1(void)
|
||||
#if !defined(TOUCH_INT_EXTI_IRQHandler)
|
||||
#error "TOUCH_INT_EXTI_IRQHandler is not defined"
|
||||
#endif
|
||||
extern "C" void TOUCH_INT_EXTI_IRQHandler(void)
|
||||
{
|
||||
if (EXTI_GetITStatus(TOUCH_INT_EXTI_LINE1) != RESET) {
|
||||
if (LL_EXTI_IsEnabledIT_0_31(TOUCH_INT_EXTI_Line) &&
|
||||
LL_EXTI_IsActiveFlag_0_31(TOUCH_INT_EXTI_Line)) {
|
||||
touchEventOccured = true;
|
||||
EXTI_ClearITPendingBit(TOUCH_INT_EXTI_LINE1);
|
||||
LL_EXTI_ClearFlag_0_31(TOUCH_INT_EXTI_Line);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -22,8 +22,9 @@
|
||||
#pragma once
|
||||
|
||||
#include "touch.h"
|
||||
#include "definitions.h"
|
||||
|
||||
#define HAS_TOUCH_PANEL() touchGT911Flag == true
|
||||
#define HAS_TOUCH_PANEL() (touchGT911Flag == true)
|
||||
|
||||
extern bool touchGT911Flag;
|
||||
extern uint16_t touchGT911fwver;
|
||||
@@ -35,6 +36,7 @@ bool touchPanelEventOccured();
|
||||
struct TouchState getInternalTouchState();
|
||||
|
||||
#define GT911_TIMEOUT 3 // 3ms
|
||||
#define GT911_TAP_TIME 250 // 250 ms
|
||||
|
||||
#define GT911_MAX_TP 5
|
||||
|
||||
@@ -77,9 +79,3 @@ PACK(struct TouchData {
|
||||
uint8_t data[GT911_MAX_TP * sizeof(TouchPoint)];
|
||||
};
|
||||
});
|
||||
|
||||
#define TPRST_LOW() do { TOUCH_RST_GPIO->BSRRH = TOUCH_RST_GPIO_PIN; } while(0)
|
||||
#define TPRST_HIGH() do { TOUCH_RST_GPIO->BSRRL = TOUCH_RST_GPIO_PIN; } while(0)
|
||||
|
||||
#define TPINT_LOW() do { TOUCH_INT_GPIO->BSRRH = TOUCH_INT_GPIO_PIN; } while(0)
|
||||
#define TPINT_HIGH() do { TOUCH_INT_GPIO->BSRRL = TOUCH_INT_GPIO_PIN; } while(0)
|
||||
|
||||
Reference in New Issue
Block a user