feat: Flysky PL18 Support (#4105)
Co-authored-by: raphaelcoeffic <raphael.coeffic@frafos.com> Co-authored-by: rotorman <risto.koiva@web.de> Co-authored-by: Xy201207 <yaoxu@flysky.com> Co-authored-by: Peter Feerick <peter.feerick@gmail.com>
This commit is contained in:
co-authored by
raphaelcoeffic
rotorman
Xy201207
Peter Feerick
parent
5153aaeea0
commit
cc17046e7a
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/*
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* Copyright (C) EdgeTX
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "hal/key_driver.h"
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#include "stm32_hal_ll.h"
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#include "stm32_gpio_driver.h"
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#include "hal.h"
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#include "delays_driver.h"
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#include "keys.h"
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/* The output bit-order has to be:
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0 LHL TR7L (Left equals down)
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1 LHR TR7R
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2 LVD TR5D
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3 LVU TR5U
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4 RVD TR6D
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5 RVU TR6U
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6 RHL TR8L
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7 RHR TR8R
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8 LSD TR1D
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9 LSU TR1U
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10 RSD TR2D
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11 RSU TR2U
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12 EX1D TR3D
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13 EX1U TR3U
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14 EX2D TR4D
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15 EX2U TR4U
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*/
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enum PhysicalTrims
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{
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TR7L = 0,
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TR7R,
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TR5D = 2,
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TR5U,
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TR6D = 4,
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TR6U,
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TR8L = 6,
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TR8R,
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TR1D = 8,
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TR1U,
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TR2D = 10,
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TR2U,
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TR3D = 12,
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TR3U,
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TR4D = 14,
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TR4U,
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};
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void keysInit()
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{
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stm32_gpio_enable_clock(GPIOB);
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stm32_gpio_enable_clock(GPIOC);
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stm32_gpio_enable_clock(GPIOD);
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stm32_gpio_enable_clock(GPIOF);
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stm32_gpio_enable_clock(GPIOH);
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stm32_gpio_enable_clock(GPIOJ);
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LL_GPIO_InitTypeDef pinInit;
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LL_GPIO_StructInit(&pinInit);
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pinInit.Mode = LL_GPIO_MODE_INPUT;
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pinInit.Pull = LL_GPIO_PULL_DOWN;
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pinInit.Pin = KEYS_GPIOB_PINS;
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LL_GPIO_Init(GPIOB, &pinInit);
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pinInit.Pin = KEYS_GPIOC_PINS;
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LL_GPIO_Init(GPIOC, &pinInit);
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pinInit.Pin = KEYS_GPIOD_PINS;
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LL_GPIO_Init(GPIOD, &pinInit);
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pinInit.Pin = KEYS_GPIOH_PINS;
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LL_GPIO_Init(GPIOH, &pinInit);
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pinInit.Pin = KEYS_GPIOJ_PINS;
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LL_GPIO_Init(GPIOJ, &pinInit);
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// Matrix outputs
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pinInit.Mode = LL_GPIO_MODE_OUTPUT;
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pinInit.Pull = LL_GPIO_PULL_NO;
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pinInit.Pin = KEYS_OUT_GPIOG_PINS;
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LL_GPIO_Init(GPIOG, &pinInit);
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pinInit.Pin = KEYS_OUT_GPIOH_PINS;
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LL_GPIO_Init(GPIOH, &pinInit);
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}
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static uint32_t _readKeyMatrix()
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{
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// This function avoids concurrent matrix agitation
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uint32_t result = 0;
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/* Bit 0 - TR3 down
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* Bit 1 - TR3 up
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* Bit 2 - TR4 down
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* Bit 3 - TR4 up
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* Bit 4 - TR5 down
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* Bit 5 - TR5 up
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* Bit 6 - TR6 down
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* Bit 7 - TR6 up
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* Bit 8 - TR7 left
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* Bit 9 - TR7 right
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* Bit 10 - TR8 left
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* Bit 11 - TR8 right
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*/
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volatile static struct
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{
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uint32_t oldResult = 0;
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uint8_t ui8ReadInProgress = 0;
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} syncelem;
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if (syncelem.ui8ReadInProgress != 0) return syncelem.oldResult;
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// ui8ReadInProgress was 0, increment it
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syncelem.ui8ReadInProgress++;
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// Double check before continuing, as non-atomic, non-blocking so far
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// If ui8ReadInProgress is above 1, then there was concurrent task calling it, exit
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if (syncelem.ui8ReadInProgress > 1) return syncelem.oldResult;
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// If we land here, we have exclusive access to Matrix
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LL_GPIO_ResetOutputPin(TRIMS_GPIO_OUT1, TRIMS_GPIO_OUT1_PIN);
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LL_GPIO_SetOutputPin(TRIMS_GPIO_OUT2, TRIMS_GPIO_OUT2_PIN);
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LL_GPIO_SetOutputPin(TRIMS_GPIO_OUT3, TRIMS_GPIO_OUT3_PIN);
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LL_GPIO_SetOutputPin(TRIMS_GPIO_OUT4, TRIMS_GPIO_OUT4_PIN);
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delay_us(10);
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if (~TRIMS_GPIO_REG_IN1 & TRIMS_GPIO_PIN_IN1)
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result |= 1 << TR7L;
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if (~TRIMS_GPIO_REG_IN2 & TRIMS_GPIO_PIN_IN2)
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result |= 1 << TR7R;
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if (~TRIMS_GPIO_REG_IN3 & TRIMS_GPIO_PIN_IN3)
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result |= 1 << TR5D;
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if (~TRIMS_GPIO_REG_IN4 & TRIMS_GPIO_PIN_IN4)
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result |= 1 << TR5U;
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LL_GPIO_SetOutputPin(TRIMS_GPIO_OUT1, TRIMS_GPIO_OUT1_PIN);
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LL_GPIO_ResetOutputPin(TRIMS_GPIO_OUT2, TRIMS_GPIO_OUT2_PIN);
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delay_us(10);
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if (~TRIMS_GPIO_REG_IN1 & TRIMS_GPIO_PIN_IN1)
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result |= 1 << TR3D;
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if (~TRIMS_GPIO_REG_IN2 & TRIMS_GPIO_PIN_IN2)
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result |= 1 << TR3U;
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if (~TRIMS_GPIO_REG_IN3 & TRIMS_GPIO_PIN_IN3)
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result |= 1 << TR4U;
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if (~TRIMS_GPIO_REG_IN4 & TRIMS_GPIO_PIN_IN4)
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result |= 1 << TR4D;
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LL_GPIO_SetOutputPin(TRIMS_GPIO_OUT2, TRIMS_GPIO_OUT2_PIN);
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LL_GPIO_ResetOutputPin(TRIMS_GPIO_OUT3, TRIMS_GPIO_OUT3_PIN);
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delay_us(10);
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if (~TRIMS_GPIO_REG_IN1 & TRIMS_GPIO_PIN_IN1)
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result |= 1 << TR6U;
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if (~TRIMS_GPIO_REG_IN2 & TRIMS_GPIO_PIN_IN2)
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result |= 1 << TR6D;
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if (~TRIMS_GPIO_REG_IN3 & TRIMS_GPIO_PIN_IN3)
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result |= 1 << TR8L;
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if (~TRIMS_GPIO_REG_IN4 & TRIMS_GPIO_PIN_IN4)
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result |= 1 << TR8R;
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LL_GPIO_SetOutputPin(TRIMS_GPIO_OUT3, TRIMS_GPIO_OUT3_PIN);
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syncelem.oldResult = result;
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syncelem.ui8ReadInProgress = 0;
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return result;
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}
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uint32_t readKeys()
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{
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uint32_t result = 0;
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if (getHatsAsKeys()) {
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uint32_t mkeys = _readKeyMatrix();
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if (mkeys & (1 << TR4D)) result |= 1 << KEY_ENTER;
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if (mkeys & (1 << TR4U)) result |= 1 << KEY_EXIT;
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}
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return result;
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}
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uint32_t readTrims()
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{
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uint32_t result = 0;
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result |= _readKeyMatrix();
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if (~TRIMS_GPIO_REG_TR1U & TRIMS_GPIO_PIN_TR1U)
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result |= 1 << (TR1U);
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if (~TRIMS_GPIO_REG_TR1D & TRIMS_GPIO_PIN_TR1D)
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result |= 1 << (TR1D);
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if (~TRIMS_GPIO_REG_TR2U & TRIMS_GPIO_PIN_TR2U)
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result |= 1 << (TR2U);
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if (~TRIMS_GPIO_REG_TR2D & TRIMS_GPIO_PIN_TR2D)
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result |= 1 << (TR2D);
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return result;
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}
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