piotr/edgetx-gx12
1
0
Fork 0
Code Issues 2 Pull Requests Actions Packages Projects Releases Wiki Activity

Prepare intmodule bootpin

Browse Source
This commit is contained in:
Raphael Coeffic
2021-12-17 15:17:49 +01:00
parent 0f970c93c9
commit cd4b782cfe
3 changed files with 28 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files
radio/src/cli.cpp
+8
View File
@@ -876,10 +876,18 @@ int cliSet(const char **argv)
}
if (module == 0) {
if (level) {
#if defined(INTMODULE_BOOTCMD_INVERTED)
GPIO_ResetBits(INTMODULE_BOOTCMD_GPIO, INTMODULE_BOOTCMD_GPIO_PIN);
#else
GPIO_SetBits(INTMODULE_BOOTCMD_GPIO, INTMODULE_BOOTCMD_GPIO_PIN);
#endif
serialPrint("%s: bootpin set", argv[0]);
} else {
#if defined(INTMODULE_BOOTCMD_INVERTED)
GPIO_SetBits(INTMODULE_BOOTCMD_GPIO, INTMODULE_BOOTCMD_GPIO_PIN);
#else
GPIO_ResetBits(INTMODULE_BOOTCMD_GPIO, INTMODULE_BOOTCMD_GPIO_PIN);
#endif
serialPrint("%s: bootpin reset", argv[0]);
}
}
radio/src/targets/taranis/CMakeLists.txt
+2
View File
@@ -187,6 +187,8 @@ elseif(PCB STREQUAL X7)
add_definitions(-DRADIO_ZORRO)
add_definitions(-DEEPROM_VARIANT=0x4006)
add_definitions(-DMANUFACTURER_RADIOMASTER)
set(ENABLE_SERIAL_PASSTHROUGH ON CACHE BOOL "Enable serial passthrough")
set(CLI ON CACHE BOOL "Enable CLI")
elseif(PCBREV STREQUAL T8)
set(DEFAULT_INTERNAL_MODULE MULTIMODULE CACHE STRING "Default internal module")
set(INTERNAL_MODULE_SERIAL YES)
radio/src/targets/taranis/hal.h
+18 -13
View File
@@ -1339,6 +1339,10 @@
#define INTMODULE_DMA_STREAM_IRQHandler DMA2_Stream7_IRQHandler
#define INTMODULE_DMA_FLAG_TC DMA_IT_TCIF7
#define INTMODULE_DMA_CHANNEL DMA_Channel_4
#define INTMODULE_BOOTCMD_GPIO GPIOB
#define INTMODULE_BOOTCMD_GPIO_PIN GPIO_Pin_1 // PB.01
#define INTMODULE_BOOTCMD_INVERTED
#define INIT_INTMODULE_BOOTCMD_PIN() GPIO_SetBits(INTMODULE_BOOTCMD_GPIO, INTMODULE_BOOTCMD_GPIO_PIN);
#elif defined(PCBX9E) || defined(PCBX9DP) || defined(RADIO_X7)
#define INTMODULE_PULSES
#define INTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_DMA2)
@@ -1698,15 +1702,7 @@
#define INTMODULE_HEARTBEAT_EXTI_IRQn EXTI15_10_IRQn
#define INTMODULE_HEARTBEAT_EXTI_IRQHandler EXTI15_10_IRQHandler
#elif defined(PCBX9LITE)
// #define INTMODULE_HEARTBEAT
#define INTMODULE_HEARTBEAT_RCC_AHB1Periph 0 // RCC_AHB1Periph_GPIOC
// #define INTMODULE_HEARTBEAT_GPIO GPIOC
// #define INTMODULE_HEARTBEAT_GPIO_PIN GPIO_Pin_9
// #define INTMODULE_HEARTBEAT_EXTI_PortSource EXTI_PortSourceGPIOC
// #define INTMODULE_HEARTBEAT_EXTI_PinSource GPIO_PinSource9
// #define INTMODULE_HEARTBEAT_EXTI_LINE EXTI_Line9
// #define INTMODULE_HEARTBEAT_EXTI_IRQn EXTI9_5_IRQn
// #define INTMODULE_HEARTBEAT_EXTI_IRQHandler EXTI9_5_IRQHandler
#define INTMODULE_HEARTBEAT_RCC_AHB1Periph 0
#elif defined(RADIO_X7ACCESS)
#define INTMODULE_HEARTBEAT
#define INTMODULE_HEARTBEAT_REUSE_INTERRUPT_ROTARY_ENCODER
@@ -1717,7 +1713,7 @@
#define INTMODULE_HEARTBEAT_EXTI_PinSource GPIO_PinSource7
#define INTMODULE_HEARTBEAT_EXTI_LINE EXTI_Line7
#define INTMODULE_HEARTBEAT_EXTI_IRQn EXTI9_5_IRQn
#elif defined(RADIO_X9DP2019) || defined(RADIO_ZORRO)
#elif defined(RADIO_X9DP2019)
#define INTMODULE_HEARTBEAT
#define INTMODULE_HEARTBEAT_RCC_AHB1Periph RCC_AHB1Periph_GPIOB
#define INTMODULE_HEARTBEAT_GPIO GPIOB
@@ -1727,6 +1723,8 @@
#define INTMODULE_HEARTBEAT_EXTI_LINE EXTI_Line1
#define INTMODULE_HEARTBEAT_EXTI_IRQn EXTI1_IRQn
#define INTMODULE_HEARTBEAT_EXTI_IRQHandler EXTI1_IRQHandler
#elif defined(RADIO_ZORRO)
#define INTMODULE_HEARTBEAT_RCC_AHB1Periph 0
#elif defined(RADIO_X7) || defined(RADIO_TX12)
#define INTMODULE_HEARTBEAT
#define INTMODULE_HEARTBEAT_REUSE_INTERRUPT_ROTARY_ENCODER
@@ -1787,10 +1785,9 @@
#define TRAINER_MODULE_SBUS_DMA_STREAM EXTMODULE_USART_RX_DMA_STREAM
#define TRAINER_MODULE_SBUS_DMA_CHANNEL EXTMODULE_USART_RX_DMA_CHANNEL
#else
#if defined(HARDWARE_EXTERNAL_MODULE)
#if defined(INTMODULE_HEARTBEAT_GPIO) && defined(HARDWARE_EXTERNAL_MODULE)
// Trainer CPPM input on heartbeat pin
#define TRAINER_MODULE_CPPM
#define TRAINER_MODULE_SBUS
#endif
#define TRAINER_MODULE_RCC_AHB1Periph RCC_AHB1Periph_GPIOC
#define TRAINER_MODULE_RCC_APB2Periph RCC_APB2Periph_USART6
#define TRAINER_MODULE_RCC_APB1Periph RCC_APB1Periph_TIM3
@@ -1805,6 +1802,8 @@
#define TRAINER_MODULE_CPPM_COUNTER_REGISTER TRAINER_TIMER->CCR2
#define TRAINER_MODULE_CPPM_TIMER_IRQn TRAINER_TIMER_IRQn
#define TRAINER_MODULE_CPPM_GPIO_AF GPIO_AF_TIM3
// Trainer SBUS input on heartbeat pin
#define TRAINER_MODULE_SBUS
#define TRAINER_MODULE_SBUS_GPIO_AF GPIO_AF_USART6
#define TRAINER_MODULE_SBUS_USART USART6
#define TRAINER_MODULE_SBUS_GPIO INTMODULE_HEARTBEAT_GPIO
@@ -1812,6 +1811,12 @@
#define TRAINER_MODULE_SBUS_GPIO_PinSource INTMODULE_HEARTBEAT_EXTI_PinSource
#define TRAINER_MODULE_SBUS_DMA_STREAM DMA2_Stream1
#define TRAINER_MODULE_SBUS_DMA_CHANNEL DMA_Channel_5
#else
// TODO: replace SBUS trainer with S.PORT pin
#define TRAINER_MODULE_RCC_AHB1Periph 0
#define TRAINER_MODULE_RCC_APB2Periph 0
#define TRAINER_MODULE_RCC_APB1Periph 0
#endif
#endif
// USB