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chore: Remove unused files (#3191)

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This commit is contained in:
Raphael Coeffic
2023-02-15 13:10:14 +10:00
committed by GitHub
parent 205342b9b4
commit d57afea89e
5 changed files with 0 additions and 1890 deletions
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radio/src/thirdparty/windows/msinttypes/changelog.txt
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------------------------------------------------------------------------
r26 | 2009-10-02 13:36:47 +0400 | 2 lines
[Issue 5] Change <stdint.h> to "stdint.h" to let compiler search for it in local directory.
------------------------------------------------------------------------
r25 | 2009-09-17 23:46:49 +0400 | 2 lines
[Issue 4] Fix incorrect int8_t behaviour if compiled with /J flag.
------------------------------------------------------------------------
r24 | 2009-05-13 14:53:48 +0400 | 2 lines
Forgot about #ifdef __cplusplus guard around 'extern "C"', so inclusion to C files has been broken.
------------------------------------------------------------------------
r23 | 2009-05-12 01:27:45 +0400 | 3 lines
[Issue 2] Always wrap <wcharîàž with external "C" {}.
It turns out that not only Visual Studio 6 requires this, but also newer versions when compiling for ARM.
------------------------------------------------------------------------
r22 | 2009-05-11 22:22:15 +0400 | 3 lines
[Issue 3] Visual Studio 6 and Embedded Visual C++ 4 doesn't realize that, e.g. char has the same size as __int8 so we give up on __intX for them.
his should close Issue 3 in issue tracker.
------------------------------------------------------------------------
r21 | 2008-07-17 09:47:22 +0400 | 4 lines
Get rid of these compiler warnings when compiling for 32-bit:
warning C4311: 'type cast' : pointer truncation from 'void *' to 'uintptr_t'
warning C4312: 'type cast' : conversion from 'uintptr_t' to 'const void *' of greater size
------------------------------------------------------------------------
r20 | 2007-10-09 16:54:27 +0400 | 2 lines
Better C99 conformance: macros for format specifiers should only be included in C++ implementations if __STDC_FORMAT_MACROS is defined before <inttypes.h> is included.
------------------------------------------------------------------------
r19 | 2007-07-04 02:14:40 +0400 | 3 lines
Explicitly cast to appropriate type INT8_MIN, INT16_MIN, INT32_MIN and INT64_MIN constants.
Due to their unusual definition in Visual Studio headers (-_Ix_MAX-1) they are propagated to int and thus do not have expected type, causing VS6 strict compiler to claim about type inconsistency.
------------------------------------------------------------------------
r18 | 2007-06-26 16:53:23 +0400 | 2 lines
Better handling of (U)INTx_C macros - now they generate constants of exact width.
------------------------------------------------------------------------
r17 | 2007-03-29 20:16:14 +0400 | 2 lines
Fix typo: Miscrosoft -> Microsoft.
------------------------------------------------------------------------
r16 | 2007-02-24 17:32:58 +0300 | 4 lines
Remove <BaseTsd.h> include, as it is not present in Visual Studio 2005 Epxress Edition and required only for INT_PTR and UINT_PTR types.
'intptr_t' and 'uintptr_t' types now defined explicitly with #ifdef _WIN64.
------------------------------------------------------------------------
r15 | 2007-02-11 20:53:05 +0300 | 2 lines
More correct fix for compilation under VS6.
------------------------------------------------------------------------
r14 | 2007-02-11 20:04:32 +0300 | 2 lines
Bugfix: fix compiling under VS6, when stdint.h enclosed in 'extern "C" {}'.
------------------------------------------------------------------------
r13 | 2006-12-13 16:53:11 +0300 | 2 lines
Make _inline modifier for imaxdiv default option. Use STATIC_IMAXDIV to make it static.
------------------------------------------------------------------------
r12 | 2006-12-13 16:42:24 +0300 | 2 lines
Error message changed: VC6 supported from now.
------------------------------------------------------------------------
r11 | 2006-12-13 16:39:33 +0300 | 2 lines
All (U)INT* types changed to (unsigned) __int*. This should make stdint.h compatible with VC6.
------------------------------------------------------------------------
r10 | 2006-12-13 16:20:57 +0300 | 3 lines
Added INLINE_IMAXDIV define switch.
If INLINE_IMAXDIV is defined imaxdiv() have static modifier. If not - it is _inline.
------------------------------------------------------------------------
r9 | 2006-12-13 15:53:52 +0300 | 2 lines
Error message for non-MSC compiler changed.
------------------------------------------------------------------------
r8 | 2006-12-13 12:47:48 +0300 | 2 lines
Added #ifndef for SIZE_MAX (it is defined in limits.h on MSVSC 8).
------------------------------------------------------------------------
r7 | 2006-12-13 01:08:02 +0300 | 2 lines
License chaged to BSD-derivative.
------------------------------------------------------------------------
r6 | 2006-12-13 00:53:20 +0300 | 2 lines
Added <wchar.h> include to avoid warnings when it is included after stdint.h.
------------------------------------------------------------------------
r5 | 2006-12-12 00:58:05 +0300 | 2 lines
BUGFIX: Definitions of INTPTR_MIN, INTPTR_MAX and UINTPTR_MAX for WIN32 and WIN64 was mixed up.
------------------------------------------------------------------------
r4 | 2006-12-12 00:51:55 +0300 | 2 lines
Rise #error if _MSC_VER is not defined. I.e. compiler other then Microsoft Visual C++ is used.
------------------------------------------------------------------------
r3 | 2006-12-11 22:54:14 +0300 | 2 lines
Added <limits.h> include to stdint.h.
------------------------------------------------------------------------
r2 | 2006-12-11 21:39:27 +0300 | 2 lines
Initial check in.
------------------------------------------------------------------------
r1 | 2006-12-11 21:30:23 +0300 | 1 line
Initial directory structure.
------------------------------------------------------------------------
radio/src/thirdparty/windows/msinttypes/inttypes.h
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// ISO C9x compliant inttypes.h for Microsoft Visual Studio
// Based on ISO/IEC 9899:TC2 Committee draft (May 6, 2005) WG14/N1124
//
// Copyright (c) 2006 Alexander Chemeris
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. The name of the author may be used to endorse or promote products
// derived from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
// EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
///////////////////////////////////////////////////////////////////////////////
#ifndef _MSC_VER // [
#error "Use this header only with Microsoft Visual C++ compilers!"
#endif // _MSC_VER ]
#ifndef _MSC_INTTYPES_H_ // [
#define _MSC_INTTYPES_H_
#if _MSC_VER > 1000
#pragma once
#endif
#include "stdint.h"
// 7.8 Format conversion of integer types
typedef struct {
intmax_t quot;
intmax_t rem;
} imaxdiv_t;
// 7.8.1 Macros for format specifiers
#if !defined(__cplusplus) || defined(__STDC_FORMAT_MACROS) // [ See footnote 185 at page 198
// The fprintf macros for signed integers are:
#define PRId8 "d"
#define PRIi8 "i"
#define PRIdLEAST8 "d"
#define PRIiLEAST8 "i"
#define PRIdFAST8 "d"
#define PRIiFAST8 "i"
#define PRId16 "hd"
#define PRIi16 "hi"
#define PRIdLEAST16 "hd"
#define PRIiLEAST16 "hi"
#define PRIdFAST16 "hd"
#define PRIiFAST16 "hi"
#define PRId32 "I32d"
#define PRIi32 "I32i"
#define PRIdLEAST32 "I32d"
#define PRIiLEAST32 "I32i"
#define PRIdFAST32 "I32d"
#define PRIiFAST32 "I32i"
#define PRId64 "I64d"
#define PRIi64 "I64i"
#define PRIdLEAST64 "I64d"
#define PRIiLEAST64 "I64i"
#define PRIdFAST64 "I64d"
#define PRIiFAST64 "I64i"
#define PRIdMAX "I64d"
#define PRIiMAX "I64i"
#define PRIdPTR "Id"
#define PRIiPTR "Ii"
// The fprintf macros for unsigned integers are:
#define PRIo8 "o"
#define PRIu8 "u"
#define PRIx8 "x"
#define PRIX8 "X"
#define PRIoLEAST8 "o"
#define PRIuLEAST8 "u"
#define PRIxLEAST8 "x"
#define PRIXLEAST8 "X"
#define PRIoFAST8 "o"
#define PRIuFAST8 "u"
#define PRIxFAST8 "x"
#define PRIXFAST8 "X"
#define PRIo16 "ho"
#define PRIu16 "hu"
#define PRIx16 "hx"
#define PRIX16 "hX"
#define PRIoLEAST16 "ho"
#define PRIuLEAST16 "hu"
#define PRIxLEAST16 "hx"
#define PRIXLEAST16 "hX"
#define PRIoFAST16 "ho"
#define PRIuFAST16 "hu"
#define PRIxFAST16 "hx"
#define PRIXFAST16 "hX"
#define PRIo32 "I32o"
#define PRIu32 "I32u"
#define PRIx32 "I32x"
#define PRIX32 "I32X"
#define PRIoLEAST32 "I32o"
#define PRIuLEAST32 "I32u"
#define PRIxLEAST32 "I32x"
#define PRIXLEAST32 "I32X"
#define PRIoFAST32 "I32o"
#define PRIuFAST32 "I32u"
#define PRIxFAST32 "I32x"
#define PRIXFAST32 "I32X"
#define PRIo64 "I64o"
#define PRIu64 "I64u"
#define PRIx64 "I64x"
#define PRIX64 "I64X"
#define PRIoLEAST64 "I64o"
#define PRIuLEAST64 "I64u"
#define PRIxLEAST64 "I64x"
#define PRIXLEAST64 "I64X"
#define PRIoFAST64 "I64o"
#define PRIuFAST64 "I64u"
#define PRIxFAST64 "I64x"
#define PRIXFAST64 "I64X"
#define PRIoMAX "I64o"
#define PRIuMAX "I64u"
#define PRIxMAX "I64x"
#define PRIXMAX "I64X"
#define PRIoPTR "Io"
#define PRIuPTR "Iu"
#define PRIxPTR "Ix"
#define PRIXPTR "IX"
// The fscanf macros for signed integers are:
#define SCNd8 "d"
#define SCNi8 "i"
#define SCNdLEAST8 "d"
#define SCNiLEAST8 "i"
#define SCNdFAST8 "d"
#define SCNiFAST8 "i"
#define SCNd16 "hd"
#define SCNi16 "hi"
#define SCNdLEAST16 "hd"
#define SCNiLEAST16 "hi"
#define SCNdFAST16 "hd"
#define SCNiFAST16 "hi"
#define SCNd32 "ld"
#define SCNi32 "li"
#define SCNdLEAST32 "ld"
#define SCNiLEAST32 "li"
#define SCNdFAST32 "ld"
#define SCNiFAST32 "li"
#define SCNd64 "I64d"
#define SCNi64 "I64i"
#define SCNdLEAST64 "I64d"
#define SCNiLEAST64 "I64i"
#define SCNdFAST64 "I64d"
#define SCNiFAST64 "I64i"
#define SCNdMAX "I64d"
#define SCNiMAX "I64i"
#ifdef _WIN64 // [
# define SCNdPTR "I64d"
# define SCNiPTR "I64i"
#else // _WIN64 ][
# define SCNdPTR "ld"
# define SCNiPTR "li"
#endif // _WIN64 ]
// The fscanf macros for unsigned integers are:
#define SCNo8 "o"
#define SCNu8 "u"
#define SCNx8 "x"
#define SCNX8 "X"
#define SCNoLEAST8 "o"
#define SCNuLEAST8 "u"
#define SCNxLEAST8 "x"
#define SCNXLEAST8 "X"
#define SCNoFAST8 "o"
#define SCNuFAST8 "u"
#define SCNxFAST8 "x"
#define SCNXFAST8 "X"
#define SCNo16 "ho"
#define SCNu16 "hu"
#define SCNx16 "hx"
#define SCNX16 "hX"
#define SCNoLEAST16 "ho"
#define SCNuLEAST16 "hu"
#define SCNxLEAST16 "hx"
#define SCNXLEAST16 "hX"
#define SCNoFAST16 "ho"
#define SCNuFAST16 "hu"
#define SCNxFAST16 "hx"
#define SCNXFAST16 "hX"
#define SCNo32 "lo"
#define SCNu32 "lu"
#define SCNx32 "lx"
#define SCNX32 "lX"
#define SCNoLEAST32 "lo"
#define SCNuLEAST32 "lu"
#define SCNxLEAST32 "lx"
#define SCNXLEAST32 "lX"
#define SCNoFAST32 "lo"
#define SCNuFAST32 "lu"
#define SCNxFAST32 "lx"
#define SCNXFAST32 "lX"
#define SCNo64 "I64o"
#define SCNu64 "I64u"
#define SCNx64 "I64x"
#define SCNX64 "I64X"
#define SCNoLEAST64 "I64o"
#define SCNuLEAST64 "I64u"
#define SCNxLEAST64 "I64x"
#define SCNXLEAST64 "I64X"
#define SCNoFAST64 "I64o"
#define SCNuFAST64 "I64u"
#define SCNxFAST64 "I64x"
#define SCNXFAST64 "I64X"
#define SCNoMAX "I64o"
#define SCNuMAX "I64u"
#define SCNxMAX "I64x"
#define SCNXMAX "I64X"
#ifdef _WIN64 // [
# define SCNoPTR "I64o"
# define SCNuPTR "I64u"
# define SCNxPTR "I64x"
# define SCNXPTR "I64X"
#else // _WIN64 ][
# define SCNoPTR "lo"
# define SCNuPTR "lu"
# define SCNxPTR "lx"
# define SCNXPTR "lX"
#endif // _WIN64 ]
#endif // __STDC_FORMAT_MACROS ]
// 7.8.2 Functions for greatest-width integer types
// 7.8.2.1 The imaxabs function
#define imaxabs _abs64
// 7.8.2.2 The imaxdiv function
// This is modified version of div() function from Microsoft's div.c found
// in %MSVC.NET%\crt\src\div.c
#ifdef STATIC_IMAXDIV // [
static
#else // STATIC_IMAXDIV ][
_inline
#endif // STATIC_IMAXDIV ]
imaxdiv_t __cdecl imaxdiv(intmax_t numer, intmax_t denom)
{
imaxdiv_t result;
result.quot = numer / denom;
result.rem = numer % denom;
if (numer < 0 && result.rem > 0) {
// did division wrong; must fix up
++result.quot;
result.rem -= denom;
}
return result;
}
// 7.8.2.3 The strtoimax and strtoumax functions
#define strtoimax _strtoi64
#define strtoumax _strtoui64
// 7.8.2.4 The wcstoimax and wcstoumax functions
#define wcstoimax _wcstoi64
#define wcstoumax _wcstoui64
#endif // _MSC_INTTYPES_H_ ]
radio/src/thirdparty/windows/msinttypes/stdint.h
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// ISO C9x compliant stdint.h for Microsoft Visual Studio
// Based on ISO/IEC 9899:TC2 Committee draft (May 6, 2005) WG14/N1124
//
// Copyright (c) 2006-2008 Alexander Chemeris
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// 2. Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
//
// 3. The name of the author may be used to endorse or promote products
// derived from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
// EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
///////////////////////////////////////////////////////////////////////////////
#ifndef _MSC_VER // [
#error "Use this header only with Microsoft Visual C++ compilers!"
#endif // _MSC_VER ]
#ifndef _MSC_STDINT_H_ // [
#define _MSC_STDINT_H_
#if _MSC_VER > 1000
#pragma once
#endif
#include <limits.h>
// For Visual Studio 6 in C++ mode and for many Visual Studio versions when
// compiling for ARM we should wrap <wchar.h> include with 'extern "C++" {}'
// or compiler give many errors like this:
// error C2733: second C linkage of overloaded function 'wmemchr' not allowed
#ifdef __cplusplus
extern "C" {
#endif
# include <wchar.h>
#ifdef __cplusplus
}
#endif
// Define _W64 macros to mark types changing their size, like intptr_t.
#ifndef _W64
# if !defined(__midl) && (defined(_X86_) || defined(_M_IX86)) && _MSC_VER >= 1300
# define _W64 __w64
# else
# define _W64
# endif
#endif
// 7.18.1 Integer types
// 7.18.1.1 Exact-width integer types
// Visual Studio 6 and Embedded Visual C++ 4 doesn't
// realize that, e.g. char has the same size as __int8
// so we give up on __intX for them.
#if (_MSC_VER < 1300)
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
#else
typedef signed __int8 int8_t;
typedef signed __int16 int16_t;
typedef signed __int32 int32_t;
typedef unsigned __int8 uint8_t;
typedef unsigned __int16 uint16_t;
typedef unsigned __int32 uint32_t;
#endif
typedef signed __int64 int64_t;
typedef unsigned __int64 uint64_t;
// 7.18.1.2 Minimum-width integer types
typedef int8_t int_least8_t;
typedef int16_t int_least16_t;
typedef int32_t int_least32_t;
typedef int64_t int_least64_t;
typedef uint8_t uint_least8_t;
typedef uint16_t uint_least16_t;
typedef uint32_t uint_least32_t;
typedef uint64_t uint_least64_t;
// 7.18.1.3 Fastest minimum-width integer types
typedef int8_t int_fast8_t;
typedef int16_t int_fast16_t;
typedef int32_t int_fast32_t;
typedef int64_t int_fast64_t;
typedef uint8_t uint_fast8_t;
typedef uint16_t uint_fast16_t;
typedef uint32_t uint_fast32_t;
typedef uint64_t uint_fast64_t;
// 7.18.1.4 Integer types capable of holding object pointers
#ifdef _WIN64 // [
typedef signed __int64 intptr_t;
typedef unsigned __int64 uintptr_t;
#else // _WIN64 ][
typedef _W64 signed int intptr_t;
typedef _W64 unsigned int uintptr_t;
#endif // _WIN64 ]
// 7.18.1.5 Greatest-width integer types
typedef int64_t intmax_t;
typedef uint64_t uintmax_t;
// 7.18.2 Limits of specified-width integer types
#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) // [ See footnote 220 at page 257 and footnote 221 at page 259
// 7.18.2.1 Limits of exact-width integer types
#define INT8_MIN ((int8_t)_I8_MIN)
#define INT8_MAX _I8_MAX
#define INT16_MIN ((int16_t)_I16_MIN)
#define INT16_MAX _I16_MAX
#define INT32_MIN ((int32_t)_I32_MIN)
#define INT32_MAX _I32_MAX
#define INT64_MIN ((int64_t)_I64_MIN)
#define INT64_MAX _I64_MAX
#define UINT8_MAX _UI8_MAX
#define UINT16_MAX _UI16_MAX
#define UINT32_MAX _UI32_MAX
#define UINT64_MAX _UI64_MAX
// 7.18.2.2 Limits of minimum-width integer types
#define INT_LEAST8_MIN INT8_MIN
#define INT_LEAST8_MAX INT8_MAX
#define INT_LEAST16_MIN INT16_MIN
#define INT_LEAST16_MAX INT16_MAX
#define INT_LEAST32_MIN INT32_MIN
#define INT_LEAST32_MAX INT32_MAX
#define INT_LEAST64_MIN INT64_MIN
#define INT_LEAST64_MAX INT64_MAX
#define UINT_LEAST8_MAX UINT8_MAX
#define UINT_LEAST16_MAX UINT16_MAX
#define UINT_LEAST32_MAX UINT32_MAX
#define UINT_LEAST64_MAX UINT64_MAX
// 7.18.2.3 Limits of fastest minimum-width integer types
#define INT_FAST8_MIN INT8_MIN
#define INT_FAST8_MAX INT8_MAX
#define INT_FAST16_MIN INT16_MIN
#define INT_FAST16_MAX INT16_MAX
#define INT_FAST32_MIN INT32_MIN
#define INT_FAST32_MAX INT32_MAX
#define INT_FAST64_MIN INT64_MIN
#define INT_FAST64_MAX INT64_MAX
#define UINT_FAST8_MAX UINT8_MAX
#define UINT_FAST16_MAX UINT16_MAX
#define UINT_FAST32_MAX UINT32_MAX
#define UINT_FAST64_MAX UINT64_MAX
// 7.18.2.4 Limits of integer types capable of holding object pointers
#ifdef _WIN64 // [
# define INTPTR_MIN INT64_MIN
# define INTPTR_MAX INT64_MAX
# define UINTPTR_MAX UINT64_MAX
#else // _WIN64 ][
# define INTPTR_MIN INT32_MIN
# define INTPTR_MAX INT32_MAX
# define UINTPTR_MAX UINT32_MAX
#endif // _WIN64 ]
// 7.18.2.5 Limits of greatest-width integer types
#define INTMAX_MIN INT64_MIN
#define INTMAX_MAX INT64_MAX
#define UINTMAX_MAX UINT64_MAX
// 7.18.3 Limits of other integer types
#ifdef _WIN64 // [
# define PTRDIFF_MIN _I64_MIN
# define PTRDIFF_MAX _I64_MAX
#else // _WIN64 ][
# define PTRDIFF_MIN _I32_MIN
# define PTRDIFF_MAX _I32_MAX
#endif // _WIN64 ]
#define SIG_ATOMIC_MIN INT_MIN
#define SIG_ATOMIC_MAX INT_MAX
#ifndef SIZE_MAX // [
# ifdef _WIN64 // [
# define SIZE_MAX _UI64_MAX
# else // _WIN64 ][
# define SIZE_MAX _UI32_MAX
# endif // _WIN64 ]
#endif // SIZE_MAX ]
// WCHAR_MIN and WCHAR_MAX are also defined in <wchar.h>
#ifndef WCHAR_MIN // [
# define WCHAR_MIN 0
#endif // WCHAR_MIN ]
#ifndef WCHAR_MAX // [
# define WCHAR_MAX _UI16_MAX
#endif // WCHAR_MAX ]
#define WINT_MIN 0
#define WINT_MAX _UI16_MAX
#endif // __STDC_LIMIT_MACROS ]
// 7.18.4 Limits of other integer types
#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) // [ See footnote 224 at page 260
// 7.18.4.1 Macros for minimum-width integer constants
#define INT8_C(val) val##i8
#define INT16_C(val) val##i16
#define INT32_C(val) val##i32
#define INT64_C(val) val##i64
#define UINT8_C(val) val##ui8
#define UINT16_C(val) val##ui16
#define UINT32_C(val) val##ui32
#define UINT64_C(val) val##ui64
// 7.18.4.2 Macros for greatest-width integer constants
#define INTMAX_C INT64_C
#define UINTMAX_C UINT64_C
#endif // __STDC_CONSTANT_MACROS ]
#endif // _MSC_STDINT_H_ ]
radio/src/thirdparty/xdk-asf-3.31.0/sam/drivers/twi/twi.c
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/**
* \file
*
* \brief Two-Wire Interface (TWI) driver for SAM.
*
* Copyright (c) 2011-2016 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
/**
* \defgroup sam_drivers_twi_group Two-Wire Interface (TWI)
*
* Driver for the TWI (Two-Wire Interface). This driver provides access to the main
* features of the TWI controller.
* The TWI interconnects components on a unique two-wire bus.
* The TWI is programmable as a master or a slave with sequential or single-byte access.
* Multiple master capability is supported.
*
* \par Usage
*
* -# Enable the TWI peripheral clock in the PMC.
* -# Enable the required TWI PIOs (see pio.h).
* -# Enable TWI master mode by calling twi_enable_master_mode if it is a master on the I2C bus.
* -# Configure the TWI in master mode by calling twi_master_init.
* -# Send data to a slave device on the I2C bus by calling twi_master_write.
* -# Receive data from a slave device on the I2C bus by calling the twi_master_read.
* -# Enable TWI slave mode by calling twi_enable_slave_mode if it is a slave on the I2C bus.
* -# Configure the TWI in slave mode by calling twi_slave_init.
*
* @{
*/
#include "twi.h"
#include "stddef.h"
#define I2C_FAST_MODE_SPEED 400000
#define TWI_CLK_DIVIDER 2
#if SAMG55
#define TWI_CLK_CALC_ARGU 3
#else
#define TWI_CLK_CALC_ARGU 4
#endif
#define TWI_CLK_DIV_MAX 0xFF
#define TWI_CLK_DIV_MIN 7
#define TWI_WP_KEY_VALUE TWI_WPMR_WPKEY_PASSWD
/**
* \brief Enable TWI master mode.
*
* \param p_twi Pointer to a TWI instance.
*/
void twi_enable_master_mode(Twi *p_twi)
{
/* Set Master Disable bit and Slave Disable bit */
p_twi->TWI_CR = TWI_CR_MSDIS;
p_twi->TWI_CR = TWI_CR_SVDIS;
/* Set Master Enable bit */
p_twi->TWI_CR = TWI_CR_MSEN;
}
/**
* \brief Disable TWI master mode.
*
* \param p_twi Pointer to a TWI instance.
*/
void twi_disable_master_mode(Twi *p_twi)
{
/* Set Master Disable bit */
p_twi->TWI_CR = TWI_CR_MSDIS;
}
/**
* \brief Initialize TWI master mode.
*
* \param p_twi Pointer to a TWI instance.
* \param p_opt Options for initializing the TWI module (see \ref twi_options_t).
*
* \return TWI_SUCCESS if initialization is complete, error code otherwise.
*/
uint32_t twi_master_init(Twi *p_twi, const twi_options_t *p_opt)
{
uint32_t status = TWI_SUCCESS;
/* Disable TWI interrupts */
p_twi->TWI_IDR = ~(uint32_t)0;
/* Dummy read in status register */
p_twi->TWI_SR;
/* Reset TWI peripheral */
twi_reset(p_twi);
twi_enable_master_mode(p_twi);
/* Select the speed */
if (twi_set_speed(p_twi, p_opt->speed, p_opt->master_clk) == FAIL) {
/* The desired speed setting is rejected */
status = TWI_INVALID_ARGUMENT;
}
if (p_opt->smbus == 1) {
p_twi->TWI_CR = TWI_CR_QUICK;
}
return status;
}
/**
* \brief Set the I2C bus speed in conjunction with the clock frequency.
*
* \param p_twi Pointer to a TWI instance.
* \param ul_speed The desired I2C bus speed (in Hz).
* \param ul_mck Main clock of the device (in Hz).
*
* \retval PASS New speed setting is accepted.
* \retval FAIL New speed setting is rejected.
*/
uint32_t twi_set_speed(Twi *p_twi, uint32_t ul_speed, uint32_t ul_mck)
{
uint32_t ckdiv = 0;
uint32_t c_lh_div;
if (ul_speed > I2C_FAST_MODE_SPEED) {
return FAIL;
}
c_lh_div = ul_mck / (ul_speed * TWI_CLK_DIVIDER) - TWI_CLK_CALC_ARGU;
/* cldiv must fit in 8 bits, ckdiv must fit in 3 bits */
while ((c_lh_div > TWI_CLK_DIV_MAX) && (ckdiv < TWI_CLK_DIV_MIN)) {
/* Increase clock divider */
ckdiv++;
/* Divide cldiv value */
c_lh_div /= TWI_CLK_DIVIDER;
}
/* set clock waveform generator register */
p_twi->TWI_CWGR =
TWI_CWGR_CLDIV(c_lh_div) | TWI_CWGR_CHDIV(c_lh_div) |
TWI_CWGR_CKDIV(ckdiv);
return PASS;
}
/**
* \brief Test if a chip answers a given I2C address.
*
* \param p_twi Pointer to a TWI instance.
* \param uc_slave_addr Address of the remote chip to search for.
*
* \return TWI_SUCCESS if a chip was found, error code otherwise.
*/
uint32_t twi_probe(Twi *p_twi, uint8_t uc_slave_addr)
{
twi_packet_t packet;
uint8_t data = 0;
/* Data to send */
packet.buffer = &data;
/* Data length */
packet.length = 1;
/* Slave chip address */
packet.chip = (uint32_t) uc_slave_addr;
/* Internal chip address */
packet.addr[0] = 0;
/* Address length */
packet.addr_length = 0;
/* Perform a master write access */
return (twi_master_write(p_twi, &packet));
}
/**
* \internal
* \brief Construct the TWI module address register field
*
* The TWI module address register is sent out MSB first. And the size controls
* which byte is the MSB to start with.
*
* Please see the device datasheet for details on this.
*/
uint32_t twi_mk_addr(const uint8_t *addr, int len)
{
uint32_t val;
if (len == 0)
return 0;
val = addr[0];
if (len > 1) {
val <<= 8;
val |= addr[1];
}
if (len > 2) {
val <<= 8;
val |= addr[2];
}
return val;
}
/**
* \brief Read multiple bytes from a TWI compatible slave device.
*
* \note This function will NOT return until all data has been read or error occurs.
*
* \param p_twi Pointer to a TWI instance.
* \param p_packet Packet information and data (see \ref twi_packet_t).
*
* \return TWI_SUCCESS if all bytes were read, error code otherwise.
*/
uint32_t twi_master_read(Twi *p_twi, twi_packet_t *p_packet)
{
uint32_t status;
uint32_t cnt = p_packet->length;
uint8_t *buffer = p_packet->buffer;
uint8_t stop_sent = 0;
uint32_t timeout = TWI_TIMEOUT;;
/* Check argument */
if (cnt == 0) {
return TWI_INVALID_ARGUMENT;
}
/* Set read mode, slave address and 3 internal address byte lengths */
p_twi->TWI_MMR = 0;
p_twi->TWI_MMR = TWI_MMR_MREAD | TWI_MMR_DADR(p_packet->chip) |
((p_packet->addr_length << TWI_MMR_IADRSZ_Pos) &
TWI_MMR_IADRSZ_Msk);
/* Set internal address for remote chip */
p_twi->TWI_IADR = 0;
p_twi->TWI_IADR = twi_mk_addr(p_packet->addr, p_packet->addr_length);
/* Send a START condition */
if (cnt == 1) {
p_twi->TWI_CR = TWI_CR_START | TWI_CR_STOP;
stop_sent = 1;
} else {
p_twi->TWI_CR = TWI_CR_START;
stop_sent = 0;
}
while (cnt > 0) {
status = p_twi->TWI_SR;
if (status & TWI_SR_NACK) {
return TWI_RECEIVE_NACK;
}
if (!timeout--) {
return TWI_ERROR_TIMEOUT;
}
/* Last byte ? */
if (cnt == 1 && !stop_sent) {
p_twi->TWI_CR = TWI_CR_STOP;
stop_sent = 1;
}
if (!(status & TWI_SR_RXRDY)) {
continue;
}
*buffer++ = p_twi->TWI_RHR;
cnt--;
timeout = TWI_TIMEOUT;
}
while (!(p_twi->TWI_SR & TWI_SR_TXCOMP)) {
}
p_twi->TWI_SR;
return TWI_SUCCESS;
}
/**
* \brief Write multiple bytes to a TWI compatible slave device.
*
* \note This function will NOT return until all data has been written or error occurred.
*
* \param p_twi Pointer to a TWI instance.
* \param p_packet Packet information and data (see \ref twi_packet_t).
*
* \return TWI_SUCCESS if all bytes were written, error code otherwise.
*/
uint32_t twi_master_write(Twi *p_twi, twi_packet_t *p_packet)
{
uint32_t status;
uint32_t cnt = p_packet->length;
uint8_t *buffer = p_packet->buffer;
/* Check argument */
if (cnt == 0) {
return TWI_INVALID_ARGUMENT;
}
/* Set write mode, slave address and 3 internal address byte lengths */
p_twi->TWI_MMR = 0;
p_twi->TWI_MMR = TWI_MMR_DADR(p_packet->chip) |
((p_packet->addr_length << TWI_MMR_IADRSZ_Pos) &
TWI_MMR_IADRSZ_Msk);
/* Set internal address for remote chip */
p_twi->TWI_IADR = 0;
p_twi->TWI_IADR = twi_mk_addr(p_packet->addr, p_packet->addr_length);
/* Send all bytes */
while (cnt > 0) {
status = p_twi->TWI_SR;
if (status & TWI_SR_NACK) {
return TWI_RECEIVE_NACK;
}
if (!(status & TWI_SR_TXRDY)) {
continue;
}
p_twi->TWI_THR = *buffer++;
cnt--;
}
while (1) {
status = p_twi->TWI_SR;
if (status & TWI_SR_NACK) {
return TWI_RECEIVE_NACK;
}
if (status & TWI_SR_TXRDY) {
break;
}
}
p_twi->TWI_CR = TWI_CR_STOP;
while (!(p_twi->TWI_SR & TWI_SR_TXCOMP)) {
}
return TWI_SUCCESS;
}
/**
* \brief Enable TWI interrupts.
*
* \param p_twi Pointer to a TWI instance.
* \param ul_sources Interrupts to be enabled.
*/
void twi_enable_interrupt(Twi *p_twi, uint32_t ul_sources)
{
/* Enable the specified interrupts */
p_twi->TWI_IER = ul_sources;
}
/**
* \brief Disable TWI interrupts.
*
* \param p_twi Pointer to a TWI instance.
* \param ul_sources Interrupts to be disabled.
*/
void twi_disable_interrupt(Twi *p_twi, uint32_t ul_sources)
{
/* Disable the specified interrupts */
p_twi->TWI_IDR = ul_sources;
/* Dummy read */
p_twi->TWI_SR;
}
/**
* \brief Get TWI interrupt status.
*
* \param p_twi Pointer to a TWI instance.
*
* \retval TWI interrupt status.
*/
uint32_t twi_get_interrupt_status(Twi *p_twi)
{
return p_twi->TWI_SR;
}
/**
* \brief Read TWI interrupt mask.
*
* \param p_twi Pointer to a TWI instance.
*
* \return The interrupt mask value.
*/
uint32_t twi_get_interrupt_mask(Twi *p_twi)
{
return p_twi->TWI_IMR;
}
/**
* \brief Reads a byte from the TWI bus.
*
* \param p_twi Pointer to a TWI instance.
*
* \return The byte read.
*/
uint8_t twi_read_byte(Twi *p_twi)
{
return p_twi->TWI_RHR;
}
/**
* \brief Sends a byte of data to one of the TWI slaves on the bus.
*
* \param p_twi Pointer to a TWI instance.
* \param byte The byte to send.
*/
void twi_write_byte(Twi *p_twi, uint8_t uc_byte)
{
p_twi->TWI_THR = uc_byte;
}
/**
* \brief Enable TWI slave mode.
*
* \param p_twi Pointer to a TWI instance.
*/
void twi_enable_slave_mode(Twi *p_twi)
{
/* Set Master Disable bit and Slave Disable bit */
p_twi->TWI_CR = TWI_CR_MSDIS;
p_twi->TWI_CR = TWI_CR_SVDIS;
/* Set Slave Enable bit */
p_twi->TWI_CR = TWI_CR_SVEN;
}
/**
* \brief Disable TWI slave mode.
*
* \param p_twi Pointer to a TWI instance.
*/
void twi_disable_slave_mode(Twi *p_twi)
{
/* Set Slave Disable bit */
p_twi->TWI_CR = TWI_CR_SVDIS;
}
/**
* \brief Initialize TWI slave mode.
*
* \param p_twi Pointer to a TWI instance.
* \param ul_device_addr Device address of the SAM slave device on the I2C bus.
*/
void twi_slave_init(Twi *p_twi, uint32_t ul_device_addr)
{
/* Disable TWI interrupts */
p_twi->TWI_IDR = ~(uint32_t)0;
p_twi->TWI_SR;
/* Reset TWI */
twi_reset(p_twi);
/* Set slave address in slave mode */
p_twi->TWI_SMR = TWI_SMR_SADR(ul_device_addr);
/* Enable slave mode */
twi_enable_slave_mode(p_twi);
}
/**
* \brief Set TWI slave address.
*
* \param p_twi Pointer to a TWI instance.
* \param ul_device_addr Device address of the SAM slave device on the I2C bus.
*/
void twi_set_slave_addr(Twi *p_twi, uint32_t ul_device_addr)
{
/* Set slave address */
p_twi->TWI_SMR = TWI_SMR_SADR(ul_device_addr);
}
/**
* \brief Read data from master.
*
* \note This function will NOT return until master sends a STOP condition.
*
* \param p_twi Pointer to a TWI instance.
* \param p_data Pointer to the data buffer where data received will be stored.
*
* \return Number of bytes read.
*/
uint32_t twi_slave_read(Twi *p_twi, uint8_t *p_data)
{
uint32_t status, cnt = 0;
do {
status = p_twi->TWI_SR;
if (status & TWI_SR_SVACC) {
if (!(status & TWI_SR_GACC) &&
((status & (TWI_SR_SVREAD | TWI_SR_RXRDY))
== (TWI_SR_SVREAD | TWI_SR_RXRDY))) {
*p_data++ = (uint8_t) p_twi->TWI_RHR;
cnt++;
}
} else if ((status & (TWI_SR_EOSACC | TWI_SR_TXCOMP))
== (TWI_SR_EOSACC | TWI_SR_TXCOMP)) {
break;
}
} while (1);
return cnt;
}
/**
* \brief Write data to TWI bus.
*
* \note This function will NOT return until master sends a STOP condition.
*
* \param p_twi Pointer to a TWI instance.
* \param p_data Pointer to the data buffer to be sent.
*
* \return Number of bytes written.
*/
uint32_t twi_slave_write(Twi *p_twi, uint8_t *p_data)
{
uint32_t status, cnt = 0;
do {
status = p_twi->TWI_SR;
if (status & TWI_SR_SVACC) {
if (!(status & (TWI_SR_GACC | TWI_SR_SVREAD)) &&
(status & TWI_SR_TXRDY)) {
p_twi->TWI_THR = *p_data++;
cnt++;
}
} else if ((status & (TWI_SR_EOSACC | TWI_SR_TXCOMP))
== (TWI_SR_EOSACC | TWI_SR_TXCOMP)) {
break;
}
} while (1);
return cnt;
}
/**
* \brief Reset TWI.
*
* \param p_twi Pointer to a TWI instance.
*/
void twi_reset(Twi *p_twi)
{
/* Set SWRST bit to reset TWI peripheral */
p_twi->TWI_CR = TWI_CR_SWRST;
p_twi->TWI_RHR;
}
/**
* \brief Get TWI PDC base address.
*
* \param p_twi Pointer to a TWI instance.
*
* \return TWI PDC registers base for PDC driver to access.
*/
Pdc *twi_get_pdc_base(Twi *p_twi)
{
Pdc *p_pdc_base = NULL;
#if !SAMG
if (p_twi == TWI0) {
p_pdc_base = PDC_TWI0;
} else
#endif
#ifdef PDC_TWI1
if (p_twi == TWI1) {
p_pdc_base = PDC_TWI1;
} else
#endif
#ifdef PDC_TWI2
if (p_twi == TWI2) {
p_pdc_base = PDC_TWI2;
} else
#endif
{
Assert(false);
}
return p_pdc_base;
}
#if (SAM4E || SAM4C || SAMG || SAM4CP || SAM4CM)
/**
* \brief Enables/Disables write protection mode.
*
* \param p_twi Pointer to a TWI instance.
* \param flag ture for enable, false for disable.
*/
void twi_set_write_protection(Twi *p_twi, bool flag)
{
p_twi->TWI_WPMR = (flag ? TWI_WPMR_WPEN : 0) | TWI_WP_KEY_VALUE;
}
/**
* \brief Read the write protection status.
*
* \param p_twi Pointer to a TWI instance.
* \param p_status Pointer to save the status.
*/
void twi_read_write_protection_status(Twi *p_twi, uint32_t *p_status)
{
*p_status = p_twi->TWI_WPSR;
}
#endif
#if SAMG55
/**
* \brief Set the prescaler, TLOW:SEXT, TLOW:MEXT and clock high max cycles for SMBUS mode.
*
* \param p_twi Base address of the TWI instance.
* \param ul_timing Parameter for prescaler, TLOW:SEXT, TLOW:MEXT and clock high max cycles.
*/
void twi_smbus_set_timing(Twi *p_twi, uint32_t ul_timing)
{
p_twi->TWI_SMBTR = ul_timing;;
}
/**
* \brief Set length/direction/PEC for alternative command mode.
*
* \param p_twi Base address of the TWI instance.
* \param ul_alt_cmd Alternative command parameters.
*/
void twi_set_alternative_command(Twi *p_twi, uint32_t ul_alt_cmd)
{
p_twi->TWI_ACR = ul_alt_cmd;;
}
/**
* \brief Set the filter for TWI.
*
* \param p_twi Base address of the TWI instance.
* \param ul_filter Filter value.
*/
void twi_set_filter(Twi *p_twi, uint32_t ul_filter)
{
p_twi->TWI_FILTR = ul_filter;;
}
/**
* \brief A mask can be applied on the slave device address in slave mode in order to allow multiple
* address answer. For each bit of the MASK field set to one the corresponding SADR bit will be masked.
*
* \param p_twi Base address of the TWI instance.
* \param ul_mask Mask value.
*/
void twi_mask_slave_addr(Twi *p_twi, uint32_t ul_mask)
{
p_twi->TWI_SMR |= TWI_SMR_MASK(ul_mask);
}
/**
* \brief Set sleepwalking match mode.
*
* \param p_twi Pointer to a TWI instance.
* \param ul_matching_addr1 Address 1 value.
* \param ul_matching_addr2 Address 2 value.
* \param ul_matching_addr3 Address 3 value.
* \param ul_matching_data Data value.
* \param flag1 ture for set, false for no.
* \param flag2 ture for set, false for no.
* \param flag3 ture for set, false for no.
* \param flag ture for set, false for no.
*/
void twi_set_sleepwalking(Twi *p_twi,
uint32_t ul_matching_addr1, bool flag1,
uint32_t ul_matching_addr2, bool flag2,
uint32_t ul_matching_addr3, bool flag3,
uint32_t ul_matching_data, bool flag)
{
uint32_t temp = 0;
if (flag1) {
temp |= TWI_SWMR_SADR1(ul_matching_addr1);
}
if (flag2) {
temp |= TWI_SWMR_SADR2(ul_matching_addr2);
}
if (flag3) {
temp |= TWI_SWMR_SADR3(ul_matching_addr3);
}
if (flag) {
temp |= TWI_SWMR_DATAM(ul_matching_data);
}
p_twi->TWI_SWMR = temp;
}
#endif
//@}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
radio/src/thirdparty/xdk-asf-3.31.0/sam/drivers/twi/twi.h
Vendored
-451
View File
@@ -1,451 +0,0 @@
/**
* \file
*
* \brief Two-Wire Interface (TWI) driver for SAM.
*
* Copyright (c) 2011-2016 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#ifndef TWI_H_INCLUDED
#define TWI_H_INCLUDED
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
extern "C" {
#endif
/**INDENT-ON**/
/// @endcond
#define FAIL 1
#define PASS 0
#define Assert(expr) ((void) 0)
#include "board.h"
/** Time-out value (number of attempts). */
#define TWI_TIMEOUT 15000
/**
* \brief Return codes for TWI APIs.
* @{
*/
#define TWI_SUCCESS 0
#define TWI_INVALID_ARGUMENT 1
#define TWI_ARBITRATION_LOST 2
#define TWI_NO_CHIP_FOUND 3
#define TWI_RECEIVE_OVERRUN 4
#define TWI_RECEIVE_NACK 5
#define TWI_SEND_OVERRUN 6
#define TWI_SEND_NACK 7
#define TWI_BUSY 8
#define TWI_ERROR_TIMEOUT 9
/**
* @}
*/
/**
* \brief Input parameters when initializing the TWI module mode.
*/
typedef struct twi_options {
//! MCK for TWI.
uint32_t master_clk;
//! The baud rate of the TWI bus.
uint32_t speed;
//! The desired address.
uint8_t chip;
//! SMBUS mode (set 1 to use SMBUS quick command, otherwise don't).
uint8_t smbus;
} twi_options_t;
/**
* \brief Information concerning the data transmission.
*/
typedef struct twi_packet {
//! TWI address/commands to issue to the other chip (node).
uint8_t addr[3];
//! Length of the TWI data address segment (1-3 bytes).
uint32_t addr_length;
//! Where to find the data to be transferred.
void *buffer;
//! How many bytes do we want to transfer.
uint32_t length;
//! TWI chip address to communicate with.
uint8_t chip;
} twi_packet_t;
#if SAMG55
enum twi_source_clock {
TWI_SOURCE_PERIPH_CLK = TWI_CWGR_BRSRCCLK_PERIPH_CLK,
TWI_SOURCE_PCK_CLK = TWI_CWGR_BRSRCCLK_PMC_PCK,
};
#endif
void twi_enable_master_mode(Twi *p_twi);
void twi_disable_master_mode(Twi *p_twi);
uint32_t twi_master_init(Twi *p_twi, const twi_options_t *p_opt);
uint32_t twi_set_speed(Twi *p_twi, uint32_t ul_speed, uint32_t ul_mck);
uint32_t twi_probe(Twi *p_twi, uint8_t uc_slave_addr);
uint32_t twi_master_read(Twi *p_twi, twi_packet_t *p_packet);
uint32_t twi_master_write(Twi *p_twi, twi_packet_t *p_packet);
void twi_enable_interrupt(Twi *p_twi, uint32_t ul_sources);
void twi_disable_interrupt(Twi *p_twi, uint32_t ul_sources);
uint32_t twi_get_interrupt_status(Twi *p_twi);
uint32_t twi_get_interrupt_mask(Twi *p_twi);
uint8_t twi_read_byte(Twi *p_twi);
void twi_write_byte(Twi *p_twi, uint8_t uc_byte);
void twi_enable_slave_mode(Twi *p_twi);
void twi_disable_slave_mode(Twi *p_twi);
void twi_slave_init(Twi *p_twi, uint32_t ul_device_addr);
void twi_set_slave_addr(Twi *p_twi, uint32_t ul_device_addr);
uint32_t twi_slave_read(Twi *p_twi, uint8_t *p_data);
uint32_t twi_slave_write(Twi *p_twi, uint8_t *p_data);
void twi_reset(Twi *p_twi);
uint32_t twi_mk_addr(const uint8_t *addr, int len);
Pdc *twi_get_pdc_base(Twi *p_twi);
#if (SAM4E || SAM4C || SAMG || SAM4CP || SAM4CM)
void twi_set_write_protection(Twi *p_twi, bool flag);
void twi_read_write_protection_status(Twi *p_twi, uint32_t *p_status);
#endif
#if SAMG55
void twi_smbus_set_timing(Twi *p_twi, uint32_t ul_timing);
void twi_set_alternative_command(Twi *p_twi, uint32_t ul_alt_cmd);
void twi_set_filter(Twi *p_twi, uint32_t ul_filter);
void twi_mask_slave_addr(Twi *p_twi, uint32_t ul_mask);
void twi_set_sleepwalking(Twi *p_twi,
uint32_t ul_matching_addr1, bool flag1,
uint32_t ul_matching_addr2, bool flag2,
uint32_t ul_matching_addr3, bool flag3,
uint32_t ul_matching_data, bool flag);
/**
* \brief Enable high speed mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_highspeed(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_HSEN;
}
/**
* \brief Disable high speed mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_highspeed(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_HSDIS;
}
/**
* \brief Enable SMBus mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_smbus(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_SMBEN;
}
/**
* \brief Disable SMBus mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_smbus(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_SMBDIS;
}
/**
* \brief Enable packet error checking.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_pec(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_PECEN;
}
/**
* \brief Disable packet error checking.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_pec(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_PECDIS;
}
/**
* \brief Request a packet error checking.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_request_pec(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_PECRQ;
}
/**
* \brief If master mode is enabled, send a bus clear command.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_send_clear(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_CLEAR;
}
/**
* \brief Enable alternative command mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_alternative_command(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_ACMEN;
}
/**
* \brief Enable alternative command mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_alternative_command(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_ACMDIS;
}
/**
* \brief Clear the Transmit Holding Register and set TXRDY, TXCOMP flags.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_thr_clear(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_THRCLR;
}
/**
* \brief Clear the TWI FSM lock.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_lock_clear(Twi *p_twi)
{
p_twi->TWI_CR = TWI_CR_LOCKCLR;
}
/**
* \brief Normal value to be returned in the ACK cycle of the data phase in slave receiver mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_slave_nack(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_NACKEN;
}
/**
* \brief NACK value to be returned in the ACK cycle of the data phase in slave receiver mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_slave_nack(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_NACKEN;
}
/**
* \brief Acknowledge of the SMBus Default Address disabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_slave_default_addr(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_SMDA;
}
/**
* \brief Acknowledge of the SMBus Default Address enabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_slave_default_addr(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_SMDA;
}
/**
* \brief Acknowledge of the SMBus Host Header disabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_smbus_host_header(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_SMHH;
}
/**
* \brief Acknowledge of the SMBus Host Header enabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_smbus_host_header(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_SMHH;
}
/**
* \brief Clock stretching disabled in slave mode, OVRE and UNRE will indicate overrun and underrun.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_clock_wait_state(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_SCLWSDIS;
}
/**
* \brief Clear clock wait state disable mode.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_clear_disable_clock_wait_state(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_SCLWSDIS;
}
/**
* \brief Slave Address 1 matching disabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_slave_addr1_matching(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_SADR1EN;
}
/**
* \brief Slave Address 1 matching enabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_slave_addr1_matching(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_SADR1EN;
}
/**
* \brief Slave Address 2 matching disabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_slave_addr2_matching(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_SADR2EN;
}
/**
* \brief Slave Address 2 matching enabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_slave_addr2_matching(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_SADR2EN;
}
/**
* \brief Slave Address 3 matching disabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_slave_addr3_matching(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_SADR3EN;
}
/**
* \brief Slave Address 3 matching enabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_enable_slave_addr3_matching(Twi *p_twi)
{
p_twi->TWI_SMR |= TWI_SMR_SADR3EN;
}
/**
* \brief First received data matching disabled.
*
* \param p_twi Base address of the TWI instance.
*/
static inline void twi_disable_slave_data_matching(Twi *p_twi)
{
p_twi->TWI_SMR &= ~TWI_SMR_DATAMEN;
}
/**
* \brief Select the souce clock for the bit rate generation.
*
* \param p_twi Base address of the TWI instance.
* \param src_clk Source clock.
*/
static inline void twi_select_source_clock(Twi *p_twi, enum twi_source_clock src_clk)
{
p_twi->TWI_CWGR &= ~TWI_CWGR_BRSRCCLK;
p_twi->TWI_CWGR |= src_clk;
}
#endif
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
#endif
/**INDENT-ON**/
/// @endcond
#endif /* TWI_H_INCLUDED */