[X9D] First compilation OK! Next step: integrate the code for the drivers (only LCD done) from FrSky...
This commit is contained in:
+25
-247
@@ -1,7 +1,24 @@
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/*
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* Author - Erez Raviv <erezraviv@gmail.com>
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* Authors (alphabetical order)
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* - Bertrand Songis <bsongis@gmail.com>
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* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
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* - Cameron Weeks <th9xer@gmail.com>
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* - Erez Raviv
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* - Jean-Pierre Parisy
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* - Karl Szmutny <shadow@privy.de>
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* - Michael Blandford
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* - Michal Hlavinka
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* - Pat Mackenzie
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* - Philip Moss
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* - Rob Thomson
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* - Romolo Manfredini <romolo.manfredini@gmail.com>
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* - Thomas Husterer
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*
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* Based on th9x -> http://code.google.com/p/th9x/
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* open9x is based on code named
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* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
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* er9x by Erez Raviv: http://code.google.com/p/er9x/,
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* and the original (and ongoing) project by
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* Thomas Husterer, th9x: http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@@ -19,7 +36,7 @@
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#include "inttypes.h"
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#include "string.h"
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volatile uint32_t Spi_complete ;
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volatile uint32_t Spi_complete; // TODO in the driver ?
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uint8_t s_eeDirtyMsk;
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uint16_t s_eeDirtyTime10ms;
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@@ -40,10 +57,10 @@ uint16_t s_eeDirtyTime10ms;
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// These may not be needed, or might just be smaller
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// TODO in the driver ?
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uint8_t Spi_tx_buf[24] ;
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uint8_t Spi_rx_buf[24] ;
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struct t_file_entry File_system[MAX_MODELS+1] ;
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char ModelNames[MAX_MODELS][sizeof(g_model.name)] ; // Allow for general
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@@ -60,6 +77,8 @@ uint32_t Eeprom32_data_size ;
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#define EE_NOWAIT 1
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void init_spi();
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void eeDirty(uint8_t msk)
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{
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s_eeDirtyMsk |= msk;
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@@ -155,113 +174,6 @@ void eeSwapModels(uint8_t id1, uint8_t id2)
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eeWaitFinished();
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}
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uint32_t spi_PDC_action( register uint8_t *command, register uint8_t *tx, register uint8_t *rx, register uint32_t comlen, register uint32_t count )
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{
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#ifndef SIMU
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register Spi *spiptr ;
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register uint32_t condition ;
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static uint8_t discard_rx_command[4] ;
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// PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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Spi_complete = 0 ;
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if ( comlen > 4 )
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{
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Spi_complete = 1 ;
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return 0x4FFFF ;
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}
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condition = SPI_SR_TXEMPTY ;
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spiptr = SPI ;
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spiptr->SPI_CR = 1 ; // Enable
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(void) spiptr->SPI_RDR ; // Dump any rx data
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(void) spiptr->SPI_SR ; // Clear error flags
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spiptr->SPI_RPR = (uint32_t)discard_rx_command ;
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spiptr->SPI_RCR = comlen ;
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if ( rx )
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{
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spiptr->SPI_RNPR = (uint32_t)rx ;
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spiptr->SPI_RNCR = count ;
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condition = SPI_SR_RXBUFF ;
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}
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spiptr->SPI_TPR = (uint32_t)command ;
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spiptr->SPI_TCR = comlen ;
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if ( tx )
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{
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spiptr->SPI_TNPR = (uint32_t)tx ;
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}
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else
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{
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spiptr->SPI_TNPR = (uint32_t)rx ;
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}
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spiptr->SPI_TNCR = count ;
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spiptr->SPI_PTCR = SPI_PTCR_RXTEN | SPI_PTCR_TXTEN ; // Start transfers
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// Wait for things to get started, avoids early interrupt
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for ( count = 0 ; count < 1000 ; count += 1 )
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{
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if ( ( spiptr->SPI_SR & SPI_SR_TXEMPTY ) == 0 )
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{
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break ;
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}
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}
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spiptr->SPI_IER = condition ;
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#endif
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return 0 ;
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}
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uint32_t eeprom_write_one( uint8_t byte, uint8_t count )
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{
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#ifndef SIMU
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register Spi *spiptr;
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register uint32_t result;
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spiptr = SPI;
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spiptr->SPI_CR = 1; // Enable
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(void) spiptr->SPI_RDR; // Dump any rx data
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spiptr->SPI_TDR = byte;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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break;
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}
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}
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if (count == 0) {
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spiptr->SPI_CR = 2; // Disable
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return spiptr->SPI_RDR;
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}
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(void) spiptr->SPI_RDR; // Dump the rx data
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spiptr->SPI_TDR = 0;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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break;
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}
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}
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spiptr->SPI_CR = 2; // Disable
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return spiptr->SPI_RDR ;
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#else
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return !Spi_complete;
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#endif
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}
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void eeprom_write_enable()
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{
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eeprom_write_one( 6, 0 ) ;
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}
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uint32_t eeprom_read_status()
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{
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return eeprom_write_one( 5, 1 ) ;
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}
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// Read eeprom data starting at random address
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void read32_eeprom_data(uint32_t eeAddress, register uint8_t *buffer, uint32_t size, uint32_t immediate)
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{
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@@ -470,7 +382,7 @@ void eeLoadModel(uint8_t id)
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memset(&g_model, 0, sizeof(g_model));
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#ifdef SIMU
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#if defined(SIMU)
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if (size > 0 && size != sizeof(g_model)) {
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printf("Model data read=%d bytes vs %d bytes\n", size, (int)sizeof(ModelData));
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}
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@@ -567,125 +479,6 @@ void eeReadAll()
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stickMode = g_eeGeneral.stickMode; // TODO common!
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}
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uint32_t spi_operation( register uint8_t *tx, register uint8_t *rx, register uint32_t count )
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{
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register Spi *spiptr;
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register uint32_t result;
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// PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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result = 0;
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spiptr = SPI;
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spiptr->SPI_CR = 1; // Enable
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(void) spiptr->SPI_RDR; // Dump any rx data
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while (count) {
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_TXEMPTY) == 0) {
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// wait
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if (++result > 10000) {
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result = 0xFFFF;
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break;
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}
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}
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if (result > 10000) {
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break;
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}
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// if ( count == 1 )
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// {
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// spiptr->SPI_CR = SPI_CR_LASTXFER ; // LastXfer bit
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// }
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spiptr->SPI_TDR = *tx++;
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result = 0;
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while ((spiptr->SPI_SR & SPI_SR_RDRF) == 0) {
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// wait for received
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if (++result > 10000) {
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result = 0x2FFFF;
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break;
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}
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}
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if (result > 10000) {
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break;
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}
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*rx++ = spiptr->SPI_RDR;
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count -= 1;
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}
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if (result <= 10000) {
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result = 0;
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}
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spiptr->SPI_CR = 2; // Disable
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// Power save
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// PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI
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return result ;
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}
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// SPI i/f to EEPROM (4Mb)
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// Peripheral ID 21 (0x00200000)
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// Connections:
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// SS PA11 (peripheral A)
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// MISO PA12 (peripheral A)
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// MOSI PA13 (peripheral A)
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// SCK PA14 (peripheral A)
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// Set clock to 3 MHz, AT25 device is rated to 70MHz, 18MHz would be better
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void init_spi()
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{
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register Spi *spiptr ;
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register uint32_t timer ;
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register uint8_t *p ;
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uint8_t spi_buf[4] ;
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PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
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/* Configure PIO */
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configure_pins( 0x00007800, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP ) ;
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spiptr = SPI ;
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timer = ( Master_frequency / 3000000 ) << 8 ; // Baud rate 3Mb/s
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spiptr->SPI_MR = 0x14000011 ; // 0001 0100 0000 0000 0000 0000 0001 0001 Master
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spiptr->SPI_CSR[0] = 0x01180009 | timer ; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
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NVIC_EnableIRQ(SPI_IRQn) ;
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p = spi_buf ;
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// *p = 0x39 ; // Unprotect sector command
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// *(p+1) = 0 ;
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// *(p+2) = 0 ;
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// *(p+3) = 0 ; // 3 bytes address
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// spi_operation( p, spi_buf, 4 ) ;
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eeprom_write_enable() ;
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*p = 1 ; // Write status register command
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*(p+1) = 0 ;
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spi_operation( p, spi_buf, 2 ) ;
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}
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#ifndef SIMU
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extern "C" void SPI_IRQHandler()
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{
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register Spi *spiptr ;
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spiptr = SPI ;
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SPI->SPI_IDR = 0x07FF ; // All interrupts off
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spiptr->SPI_CR = 2 ; // Disable
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(void) spiptr->SPI_RDR ; // Dump any rx data
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(void) spiptr->SPI_SR ; // Clear error flags
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spiptr->SPI_PTCR = SPI_PTCR_RXTDIS | SPI_PTCR_TXTDIS ; // Stop tramsfers
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Spi_complete = 1 ; // Indicate completion
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// Power save
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// PMC->PMC_PCER0 &= ~0x00200000L ; // Disable peripheral clock to SPI
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}
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#endif
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void end_spi()
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{
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SPI->SPI_CR = 2 ; // Disable
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SPI->SPI_IDR = 0x07FF ; // All interrupts off
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NVIC_DisableIRQ(SPI_IRQn) ;
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}
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void eeWaitFinished()
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{
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while (Eeprom32_process_state != E32_IDLE) {
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@@ -901,27 +694,12 @@ void ee32_read_model_names()
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void eeprom_init()
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{
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#ifndef SIMU
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init_spi() ;
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init_spi();
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#endif
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fill_file_index() ;
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Eeprom32_process_state = E32_IDLE ;
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}
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uint32_t unprotect_eeprom()
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{
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register uint8_t *p;
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eeprom_write_enable();
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p = Spi_tx_buf;
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*p = 0x39; // Unprotect sector command
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*(p + 1) = 0;
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*(p + 2) = 0;
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*(p + 3) = 0; // 3 bytes address
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return spi_operation( p, Spi_rx_buf, 4 ) ;
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}
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#if defined(SDCARD)
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const pm_char * eeBackupModel(uint8_t i_fileSrc)
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{
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