Taranis: SBUS trainer driver for external module
This commit is contained in:
committed by
Raphael Coeffic
parent
4eae312cff
commit
ef147671ef
@@ -99,10 +99,14 @@ void stm32_usart_deinit_rx_dma(const stm32_usart_t* usart)
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LL_DMA_DeInit(usart->rxDMA, usart->rxDMA_Stream);
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// Enable IRQ based RX
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LL_USART_EnableIT_RXNE(usart->USARTx);
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NVIC_SetPriority(usart->IRQn, usart->IRQ_Prio);
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NVIC_EnableIRQ(usart->IRQn);
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if ((int32_t)(usart->IRQn) >= 0) {
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// Enable IRQ based RX
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LL_USART_EnableIT_RXNE(usart->USARTx);
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NVIC_SetPriority(usart->IRQn, usart->IRQ_Prio);
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NVIC_EnableIRQ(usart->IRQn);
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}
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}
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void stm32_usart_init(const stm32_usart_t* usart, const etx_serial_init* params)
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@@ -181,7 +185,10 @@ void stm32_usart_deinit(const stm32_usart_t* usart)
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if (usart->txDMA) {
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LL_DMA_DeInit(usart->txDMA, usart->txDMA_Stream);
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}
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NVIC_DisableIRQ(usart->IRQn);
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if ((int32_t)(usart->IRQn) >= 0) {
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NVIC_DisableIRQ(usart->IRQn);
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}
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LL_USART_DeInit(usart->USARTx);
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disable_usart_clock(usart->USARTx);
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@@ -226,7 +233,7 @@ void stm32_usart_send_buffer(const stm32_usart_t* usart, const uint8_t * data, u
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// Please note that we don't use the buffer:
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// it should be set internally by the driver user
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// and each byte is returned individually by on_send()
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LL_USART_EnableIT_TXE(usart->USARTx);
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if ((int32_t)(usart->IRQn) >= 0) LL_USART_EnableIT_TXE(usart->USARTx);
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}
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}
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@@ -338,3 +338,93 @@ extern "C" void TRAINER_MODULE_CPPM_TIMER_IRQHandler()
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#endif
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#endif // TRAINER_MODULE_CPPM
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#if defined(TRAINER_MODULE_SBUS)
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const etx_serial_init sbusTrainerParams = {
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.baudrate = SBUS_BAUDRATE,
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.parity = ETX_Parity_Even,
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.stop_bits = ETX_StopBits_Two,
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.word_length = ETX_WordLength_9,
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.rx_enable = true,
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};
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// external module has a full-duplex USART
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#if defined(EXTMODULE_USART)
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#include "extmodule_serial_driver.h"
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static void* sbus_trainer_ctx = nullptr;
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void init_trainer_module_sbus()
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{
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sbus_trainer_ctx = ExtmoduleSerialDriver.init(&sbusTrainerParams);
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}
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void stop_trainer_module_sbus()
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{
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auto ctx = sbus_trainer_ctx;
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if (ctx) {
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sbus_trainer_ctx = nullptr;
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ExtmoduleSerialDriver.deinit(ctx);
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}
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}
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int trainerModuleSbusGetByte(uint8_t* data)
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{
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auto ctx = sbus_trainer_ctx;
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if (ctx) {
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return ExtmoduleSerialDriver.getByte(ctx, data);
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}
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return 0;
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}
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#elif defined(TRAINER_MODULE_SBUS_USART)
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#include "stm32_usart_driver.h"
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static const LL_GPIO_InitTypeDef sbus_trainer_USART_PinDef = {
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.Pin = TRAINER_MODULE_SBUS_GPIO_PIN,
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.Mode = LL_GPIO_MODE_ALTERNATE,
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.Speed = LL_GPIO_SPEED_FREQ_LOW,
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.OutputType = LL_GPIO_OUTPUT_PUSHPULL,
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.Pull = LL_GPIO_PULL_UP,
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.Alternate = TRAINER_MODULE_SBUS_GPIO_AF,
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};
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static const stm32_usart_t sbus_trainer_USART = {
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.USARTx = TRAINER_MODULE_SBUS_USART,
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.GPIOx = TRAINER_MODULE_SBUS_GPIO,
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.pinInit = &sbus_trainer_USART_PinDef,
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.IRQn = (IRQn_Type)-1,
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.IRQ_Prio = 0,
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.txDMA = nullptr,
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.txDMA_Stream = 0,
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.txDMA_Channel = 0,
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.rxDMA = TRAINER_MODULE_SBUS_DMA,
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.rxDMA_Stream = TRAINER_MODULE_SBUS_DMA_STREAM_LL,
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.rxDMA_Channel = TRAINER_MODULE_SBUS_DMA_CHANNEL,
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};
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static DMAFifo<32> sbus_trainer_fifo __DMA (TRAINER_MODULE_SBUS_DMA_STREAM);
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void init_trainer_module_sbus()
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{
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stm32_usart_init(&sbus_trainer_USART, &sbusTrainerParams);
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stm32_usart_init_rx_dma(&sbus_trainer_USART, sbus_trainer_fifo.buffer(),
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sbus_trainer_fifo.size());
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}
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void stop_trainer_module_sbus()
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{
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stm32_usart_deinit(&sbus_trainer_USART);
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}
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int trainerModuleSbusGetByte(uint8_t* data)
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{
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return sbus_trainer_fifo.pop(*data);
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}
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#else
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#error "No available SBUS trainer implementation"
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#endif
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#endif // TRAINER_MODULE_SBUS
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