[g9x] DSM2=SERIAL FIXED.
I found that wdt_reset() was not being called in the scheduled interrupt iservice routine because HEART_TIMER_PULSES was not being flagged in serial transmit interrupt. This is needed because in DSM2=SERIAL mode, there are no bit-bang functions being used and thus no HEART_TIMER_PULSES 'heart beats' to record. I am at a loss as to how or exactly when this bug crept in. I have gone over everything I committed since r1380 but cannot find anything directly related. So I just don't know. But it's fixed now. Yay \o/ I also added/edited a bunch more code comments along the way to finding this.
This commit is contained in:
gruvin@gmail.com
+13
-3
@@ -3009,7 +3009,12 @@ uint16_t getTmr16KHz()
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}
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#if defined (PCBGRUVIN9X)
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ISR(TIMER5_COMPA_vect, ISR_NOBLOCK) // mixer interrupt
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/**** SCHDULED MIXER INTERRUPT ****/
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// On G9X board, we use TIMER5 to schedule mixer execution, to achieve
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// minimal system latency between reading sticks and outputting data.
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ISR(TIMER5_COMPA_vect, ISR_NOBLOCK)
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{
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#if defined(DEBUG) && !defined(VOICE)
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PORTH |= 0x40; // PORTH:6 LOW->HIGH signals start of mixer interrupt
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@@ -3237,10 +3242,15 @@ FORCEINLINE void FRSKY_USART0_vect()
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#if defined (DSM2_SERIAL) && !defined(PCBSKY9X)
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FORCEINLINE void DSM2_USART0_vect()
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{
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UDR0 = *((uint16_t*)pulses2MHzRPtr);
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UDR0 = *((uint16_t*)pulses2MHzRPtr); // transmit next byte
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pulses2MHzRPtr += sizeof(uint16_t);
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if (pulses2MHzRPtr == pulses2MHzWPtr) {
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#if defined (DSM2_SERIAL)
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heartbeat |= HEART_TIMER_PULSES; // G: WDT will time out before 22ms (no bit-banging int. to flag heartbeat)
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#endif
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if (pulses2MHzRPtr == pulses2MHzWPtr) { // if at end of read buffer ...
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UCSR0B &= ~(1 << UDRIE0); // disable UDRE0 interrupt
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}
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}
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+16
-19
@@ -96,6 +96,7 @@ uint8_t *pulses2MHzWPtr = pulses2MHz;
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#ifndef SIMU
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// TIMER1_COMPA_vect used for PPM and DSM2=SERIAL
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uint8_t g_ppmPulsePolarity = 0;
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ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR)
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{
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@@ -103,7 +104,7 @@ ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR)
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#ifdef DSM2_SERIAL
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if (s_current_protocol == PROTO_DSM2) {
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OCR1A = 40000;
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OCR1A = 44000; // next frame in 22ms
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// sei will be called inside setupPulses()
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setupPulses(); // will call sei()
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cli(); // this blocking ISR will automatically issue sei at exit
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@@ -166,7 +167,7 @@ ISR(TIMER1_COMPA_vect) //2MHz pulse generation (BLOCKING ISR)
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sei();
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}
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}
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}
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} // [else] if (s_current_protocol == PROTO_DSM2)
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if (dt > g_tmr1Latency_max) g_tmr1Latency_max = dt;
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if (dt < g_tmr1Latency_min) g_tmr1Latency_min = dt;
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@@ -764,7 +765,7 @@ void setupPulses()
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switch (required_protocol) {
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#if defined(DSM2_PPM) // Nothing done here for DSM2=SERIAL. See second switch() {...}, below
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#if defined(DSM2_PPM) // For DSM2=SERIAL, the default: case is executed, below
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case PROTO_DSM2:
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set_timer3_capture();
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TCCR1B = 0; // Stop counter
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@@ -861,7 +862,7 @@ void setupPulses()
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PORTB &= ~(1<<OUT_B_PPM); // Hold PPM output low
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break ;
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default:
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default: // PPM and DSM2=SERIAL modes
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set_timer3_capture();
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TCCR1B = 0; // Stop counter
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OCR1A = 40000; // Next frame starts in 20 mS
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@@ -870,7 +871,8 @@ void setupPulses()
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TIMSK1 &= ~0x2F; // All Timer1 interrupts off
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TIFR1 = 0x2F;
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TIMSK1 |= (1<<OCIE1A); // Enable COMPA
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TCCR1A = (3 << COM1B0); // Connect OC1B for hardware PPM switching
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TCCR1A = (3 << COM1B0); // Connect OC1B for hardware PPM switching. G: Not needed
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// for DSM2=SERIAL. But OK.
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#else
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TIMSK &= ~0x3C; // All Timer1 interrupts off
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TIFR = 0x3C;
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@@ -900,9 +902,9 @@ void setupPulses()
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TCNT5 = 0;
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#endif
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sei();
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setupPulsesDsm2();
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setupPulsesDsm2(); // Different versions for DSM2=SERIAL vs. DSM2=PPM
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#if defined(PCBGRUVIN9X) && defined(DSM2_PPM)
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// Ensure each DSM packet starts out with the correct bit polarity
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// Ensure each DSM2=PPM serial packet starts out with the correct bit polarity
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TCCR1A = (0 << WGM10) | (3<<COM1B1); // Make Waveform Generator 'SET' OCR1B pin on next compare event and ...
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TCCR1C = (1<<FOC1B); // ... force compare event, to set OCR1B pin high.
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TCCR1A = (1<<COM1B0); // Output is ready. Now configure OCR1B pin into 'TOGGLE' mode.
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@@ -943,24 +945,19 @@ ISR(TIMER1_CAPT_vect) // 2MHz pulse generation
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{
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#if defined (PCBGRUVIN9X)
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/*** G9X V4 hardware toggled PPM_out avoids interrupt latency jitter on the output.
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/*** G9X V4 hardware toggled PPM_out avoids any chance of output timing jitter ***/
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In most (but not all) foreseeable cases, the jitter removal afforded by this is
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inside the bit timing tolerances of async serial data at 125,000bps. But I cannot
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afford to crash models. So I like to have the extra assurance. Gruvin.
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(It can be done on the stock board's PB7 too. Nove LED BL to PB0.) ***/
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// OCR1B output pin (PPM_OUT) is pre-set to HIGH in setupPulses -- for safety, on each
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// and every frame -- and configured to toggle on each OCR1B / TC1 count register match.
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// All we need to do here then, is update the compare regisiter(s) ...
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// OCR1B output pin (PPM_OUT) is pre-SET in setupPulses -- on every new
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// frame, for safety -- and then configured to toggle on each OCR1B compare match.
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// Thus, all we need do here is update the compare regisiter(s) ...
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uint8_t x ;
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x = *pulses2MHzRPtr++; // Byte size
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ICR1 = x;
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OCR1B = (uint16_t)x; // Duplicate capture compare value for OCR1B, because Timer1 is in CTC mode
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// and thus we cannot use the OCR1B INT vector. (Should have put PPM_OUT
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// and thus we cannot use the OCR1B int. vector. (Should have put PPM_OUT
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// pin on OCR1A. Oh well.)
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#else
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#else // manual bit-bang mode
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uint8_t x ;
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PORTB ^= (1<<OUT_B_PPM); // Toggle PPM_OUT
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@@ -1002,7 +999,7 @@ ISR(TIMER1_COMPB_vect) // PXX main interrupt
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}
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#endif
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ISR(TIMER1_COMPC_vect) // DSM2 or PXX end of frame
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ISR(TIMER1_COMPC_vect) // DSM2_PPM or PXX end of frame
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{
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#if defined(DSM2_PPM) && defined(PXX)
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if ( g_model.protocol == PROTO_DSM2 ) {
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