[Taranis] HEARBEAT now uses the DMA for SBUS reception

This commit is contained in:
Bertrand Songis
2016-03-19 13:41:21 +01:00
parent 244239ff6a
commit f43a790d5c
3 changed files with 27 additions and 29 deletions
@@ -45,7 +45,6 @@ void uart3Setup(unsigned int baudrate, bool dma)
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
USART_Init(SERIAL_USART, &USART_InitStructure);
if (dma) {
+2
View File
@@ -407,6 +407,8 @@
#define HEARTBEAT_USART USART6
#define HEARTBEAT_USART_IRQHandler USART6_IRQHandler
#define HEARTBEAT_USART_IRQn USART6_IRQn
#define HEARTBEAT_DMA_Stream DMA2_Stream2
#define HEARTBEAT_DMA_Channel DMA_Channel_5
// USB
#define USB_RCC_AHB1Periph_GPIO RCC_AHB1Periph_GPIOA
+25 -28
View File
@@ -20,7 +20,7 @@
#include "opentx.h"
Fifo<uint8_t, 32> sbusFifo;
DMAFifo<32> heartbeatFifo __DMA (HEARTBEAT_DMA_Stream);
#define setupTrainerPulses() setupPulsesPPM(TRAINER_MODULE)
@@ -204,13 +204,31 @@ void init_sbus_on_heartbeat_capture()
USART_InitStructure.USART_Parity = USART_Parity_Even;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx;
USART_Init(HEARTBEAT_USART, &USART_InitStructure);
USART_Cmd(HEARTBEAT_USART, ENABLE);
USART_ITConfig(HEARTBEAT_USART, USART_IT_RXNE, ENABLE);
NVIC_SetPriority(HEARTBEAT_USART_IRQn, 6);
NVIC_EnableIRQ(HEARTBEAT_USART_IRQn);
DMA_InitTypeDef DMA_InitStructure;
heartbeatFifo.clear();
USART_ITConfig(HEARTBEAT_USART, USART_IT_RXNE, DISABLE);
USART_ITConfig(HEARTBEAT_USART, USART_IT_TXE, DISABLE);
DMA_InitStructure.DMA_Channel = HEARTBEAT_DMA_Channel;
DMA_InitStructure.DMA_PeripheralBaseAddr = CONVERT_PTR_UINT(&HEARTBEAT_USART->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = CONVERT_PTR_UINT(heartbeatFifo.buffer());
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = heartbeatFifo.size();
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(HEARTBEAT_DMA_Stream, &DMA_InitStructure);
USART_DMACmd(HEARTBEAT_USART, USART_DMAReq_Rx, ENABLE);
USART_Cmd(HEARTBEAT_USART, ENABLE);
DMA_Cmd(HEARTBEAT_DMA_Stream, ENABLE);
}
void stop_sbus_on_heartbeat_capture(void)
@@ -223,32 +241,11 @@ void stop_sbus_on_heartbeat_capture(void)
}
}
#if !defined(SIMU) && !defined(REV9E)
extern "C" void HEARTBEAT_USART_IRQHandler()
{
uint32_t status;
uint8_t data;
status = HEARTBEAT_USART->SR;
while (status & (USART_FLAG_RXNE | USART_FLAG_ERRORS)) {
data = HEARTBEAT_USART->DR;
if (!(status & USART_FLAG_ERRORS)) {
if (currentTrainerMode == TRAINER_MODE_MASTER_SBUS_EXTERNAL_MODULE)
sbusFifo.push(data);
}
status = HEARTBEAT_USART->SR;
}
}
#endif
int sbusGetByte(uint8_t * byte)
{
switch (currentTrainerMode) {
case TRAINER_MODE_MASTER_SBUS_EXTERNAL_MODULE:
return sbusFifo.pop(*byte);
return heartbeatFifo.pop(*byte);
case TRAINER_MODE_MASTER_BATTERY_COMPARTMENT:
return serial2RxFifo.pop(*byte);
default: